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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic16 / pic18f4320.h
blobc33bf1ec4481c775a92a6c808d01e1b2502cc898
1 /*
2 * This declarations of the PIC18F4320 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:45 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC18F4320_H__
26 #define __PIC18F4320_H__
27
28 //==============================================================================
29
30 //==============================================================================
31 //
32 // Register Definitions
33 //
34 //==============================================================================
35
36
37 //==============================================================================
38 // PORTA Bits
39
40 extern __at(0x0F80) __sfr PORTA;
41
42 typedef union
43 {
44 struct
45 {
46 unsigned RA0 : 1;
47 unsigned RA1 : 1;
48 unsigned RA2 : 1;
49 unsigned RA3 : 1;
50 unsigned RA4 : 1;
51 unsigned RA5 : 1;
52 unsigned RA6 : 1;
53 unsigned RA7 : 1;
54 };
55
56 struct
57 {
58 unsigned AN0 : 1;
59 unsigned AN1 : 1;
60 unsigned AN2 : 1;
61 unsigned AN3 : 1;
62 unsigned T0CKI : 1;
63 unsigned AN4 : 1;
64 unsigned CLKO : 1;
65 unsigned CLKI : 1;
66 };
67
68 struct
69 {
70 unsigned : 1;
71 unsigned : 1;
72 unsigned VREFM : 1;
73 unsigned VREFP : 1;
74 unsigned C1OUT : 1;
75 unsigned SS : 1;
76 unsigned OSC2 : 1;
77 unsigned OSC1 : 1;
78 };
79
80 struct
81 {
82 unsigned : 1;
83 unsigned : 1;
84 unsigned CVREF : 1;
85 unsigned : 1;
86 unsigned : 1;
87 unsigned NOT_SS : 1;
88 unsigned : 1;
89 unsigned : 1;
90 };
91
92 struct
93 {
94 unsigned : 1;
95 unsigned : 1;
96 unsigned : 1;
97 unsigned : 1;
98 unsigned : 1;
99 unsigned LVDIN : 1;
100 unsigned : 1;
101 unsigned : 1;
102 };
103
104 struct
105 {
106 unsigned : 1;
107 unsigned : 1;
108 unsigned : 1;
109 unsigned : 1;
110 unsigned : 1;
111 unsigned C2OUT : 1;
112 unsigned : 1;
113 unsigned : 1;
114 };
115 } __PORTAbits_t;
116
117 extern __at(0x0F80) volatile __PORTAbits_t PORTAbits;
118
119 #define _PORTA_RA0 0x01
120 #define _PORTA_AN0 0x01
121 #define _PORTA_RA1 0x02
122 #define _PORTA_AN1 0x02
123 #define _PORTA_RA2 0x04
124 #define _PORTA_AN2 0x04
125 #define _PORTA_VREFM 0x04
126 #define _PORTA_CVREF 0x04
127 #define _PORTA_RA3 0x08
128 #define _PORTA_AN3 0x08
129 #define _PORTA_VREFP 0x08
130 #define _PORTA_RA4 0x10
131 #define _PORTA_T0CKI 0x10
132 #define _PORTA_C1OUT 0x10
133 #define _PORTA_RA5 0x20
134 #define _PORTA_AN4 0x20
135 #define _PORTA_SS 0x20
136 #define _PORTA_NOT_SS 0x20
137 #define _PORTA_LVDIN 0x20
138 #define _PORTA_C2OUT 0x20
139 #define _PORTA_RA6 0x40
140 #define _PORTA_CLKO 0x40
141 #define _PORTA_OSC2 0x40
142 #define _PORTA_RA7 0x80
143 #define _PORTA_CLKI 0x80
144 #define _PORTA_OSC1 0x80
145
146 //==============================================================================
147
148
149 //==============================================================================
150 // PORTB Bits
151
152 extern __at(0x0F81) __sfr PORTB;
153
154 typedef union
155 {
156 struct
157 {
158 unsigned RB0 : 1;
159 unsigned RB1 : 1;
160 unsigned RB2 : 1;
161 unsigned RB3 : 1;
162 unsigned RB4 : 1;
163 unsigned RB5 : 1;
164 unsigned RB6 : 1;
165 unsigned RB7 : 1;
166 };
167
168 struct
169 {
170 unsigned INT0 : 1;
171 unsigned INT1 : 1;
172 unsigned INT2 : 1;
173 unsigned CCP2 : 1;
174 unsigned KBI0 : 1;
175 unsigned KBI1 : 1;
176 unsigned KBI2 : 1;
177 unsigned KBI3 : 1;
178 };
179
180 struct
181 {
182 unsigned AN12 : 1;
183 unsigned AN10 : 1;
184 unsigned AN8 : 1;
185 unsigned AN9 : 1;
186 unsigned AN11 : 1;
187 unsigned PGM : 1;
188 unsigned PGC : 1;
189 unsigned PGD : 1;
190 };
191
192 struct
193 {
194 unsigned : 1;
195 unsigned : 1;
196 unsigned : 1;
197 unsigned CCP2A : 1;
198 unsigned : 1;
199 unsigned : 1;
200 unsigned : 1;
201 unsigned : 1;
202 };
203
204 struct
205 {
206 unsigned INT : 3;
207 unsigned : 5;
208 };
209
210 struct
211 {
212 unsigned : 4;
213 unsigned KBI : 4;
214 };
215 } __PORTBbits_t;
216
217 extern __at(0x0F81) volatile __PORTBbits_t PORTBbits;
218
219 #define _PORTB_RB0 0x01
220 #define _PORTB_INT0 0x01
221 #define _PORTB_AN12 0x01
222 #define _PORTB_RB1 0x02
223 #define _PORTB_INT1 0x02
224 #define _PORTB_AN10 0x02
225 #define _PORTB_RB2 0x04
226 #define _PORTB_INT2 0x04
227 #define _PORTB_AN8 0x04
228 #define _PORTB_RB3 0x08
229 #define _PORTB_CCP2 0x08
230 #define _PORTB_AN9 0x08
231 #define _PORTB_CCP2A 0x08
232 #define _PORTB_RB4 0x10
233 #define _PORTB_KBI0 0x10
234 #define _PORTB_AN11 0x10
235 #define _PORTB_RB5 0x20
236 #define _PORTB_KBI1 0x20
237 #define _PORTB_PGM 0x20
238 #define _PORTB_RB6 0x40
239 #define _PORTB_KBI2 0x40
240 #define _PORTB_PGC 0x40
241 #define _PORTB_RB7 0x80
242 #define _PORTB_KBI3 0x80
243 #define _PORTB_PGD 0x80
244
245 //==============================================================================
246
247
248 //==============================================================================
249 // PORTC Bits
250
251 extern __at(0x0F82) __sfr PORTC;
252
253 typedef union
254 {
255 struct
256 {
257 unsigned RC0 : 1;
258 unsigned RC1 : 1;
259 unsigned RC2 : 1;
260 unsigned RC3 : 1;
261 unsigned RC4 : 1;
262 unsigned RC5 : 1;
263 unsigned RC6 : 1;
264 unsigned RC7 : 1;
265 };
266
267 struct
268 {
269 unsigned T1OSO : 1;
270 unsigned T1OSI : 1;
271 unsigned CCP1 : 1;
272 unsigned SCK : 1;
273 unsigned SDI : 1;
274 unsigned SDO : 1;
275 unsigned TX : 1;
276 unsigned RX : 1;
277 };
278
279 struct
280 {
281 unsigned T13CKI : 1;
282 unsigned CCP2 : 1;
283 unsigned P1A : 1;
284 unsigned SCL : 1;
285 unsigned SDA : 1;
286 unsigned : 1;
287 unsigned CK : 1;
288 unsigned : 1;
289 };
290
291 struct
292 {
293 unsigned T1CKI : 1;
294 unsigned : 1;
295 unsigned : 1;
296 unsigned : 1;
297 unsigned : 1;
298 unsigned : 1;
299 unsigned : 1;
300 unsigned : 1;
301 };
302 } __PORTCbits_t;
303
304 extern __at(0x0F82) volatile __PORTCbits_t PORTCbits;
305
306 #define _PORTC_RC0 0x01
307 #define _PORTC_T1OSO 0x01
308 #define _PORTC_T13CKI 0x01
309 #define _PORTC_T1CKI 0x01
310 #define _PORTC_RC1 0x02
311 #define _PORTC_T1OSI 0x02
312 #define _PORTC_CCP2 0x02
313 #define _PORTC_RC2 0x04
314 #define _PORTC_CCP1 0x04
315 #define _PORTC_P1A 0x04
316 #define _PORTC_RC3 0x08
317 #define _PORTC_SCK 0x08
318 #define _PORTC_SCL 0x08
319 #define _PORTC_RC4 0x10
320 #define _PORTC_SDI 0x10
321 #define _PORTC_SDA 0x10
322 #define _PORTC_RC5 0x20
323 #define _PORTC_SDO 0x20
324 #define _PORTC_RC6 0x40
325 #define _PORTC_TX 0x40
326 #define _PORTC_CK 0x40
327 #define _PORTC_RC7 0x80
328 #define _PORTC_RX 0x80
329
330 //==============================================================================
331
332
333 //==============================================================================
334 // PORTD Bits
335
336 extern __at(0x0F83) __sfr PORTD;
337
338 typedef union
339 {
340 struct
341 {
342 unsigned RD0 : 1;
343 unsigned RD1 : 1;
344 unsigned RD2 : 1;
345 unsigned RD3 : 1;
346 unsigned RD4 : 1;
347 unsigned RD5 : 1;
348 unsigned RD6 : 1;
349 unsigned RD7 : 1;
350 };
351
352 struct
353 {
354 unsigned PSP0 : 1;
355 unsigned PSP1 : 1;
356 unsigned PSP2 : 1;
357 unsigned PSP3 : 1;
358 unsigned PSP4 : 1;
359 unsigned PSP5 : 1;
360 unsigned PSP6 : 1;
361 unsigned PSP7 : 1;
362 };
363
364 struct
365 {
366 unsigned : 1;
367 unsigned : 1;
368 unsigned : 1;
369 unsigned : 1;
370 unsigned : 1;
371 unsigned P1B : 1;
372 unsigned P1C : 1;
373 unsigned P1D : 1;
374 };
375 } __PORTDbits_t;
376
377 extern __at(0x0F83) volatile __PORTDbits_t PORTDbits;
378
379 #define _PORTD_RD0 0x01
380 #define _PORTD_PSP0 0x01
381 #define _PORTD_RD1 0x02
382 #define _PORTD_PSP1 0x02
383 #define _PORTD_RD2 0x04
384 #define _PORTD_PSP2 0x04
385 #define _PORTD_RD3 0x08
386 #define _PORTD_PSP3 0x08
387 #define _PORTD_RD4 0x10
388 #define _PORTD_PSP4 0x10
389 #define _PORTD_RD5 0x20
390 #define _PORTD_PSP5 0x20
391 #define _PORTD_P1B 0x20
392 #define _PORTD_RD6 0x40
393 #define _PORTD_PSP6 0x40
394 #define _PORTD_P1C 0x40
395 #define _PORTD_RD7 0x80
396 #define _PORTD_PSP7 0x80
397 #define _PORTD_P1D 0x80
398
399 //==============================================================================
400
401
402 //==============================================================================
403 // PORTE Bits
404
405 extern __at(0x0F84) __sfr PORTE;
406
407 typedef union
408 {
409 struct
410 {
411 unsigned RE0 : 1;
412 unsigned RE1 : 1;
413 unsigned RE2 : 1;
414 unsigned RE3 : 1;
415 unsigned : 1;
416 unsigned : 1;
417 unsigned : 1;
418 unsigned : 1;
419 };
420
421 struct
422 {
423 unsigned RD : 1;
424 unsigned WR : 1;
425 unsigned CS : 1;
426 unsigned MCLR : 1;
427 unsigned : 1;
428 unsigned : 1;
429 unsigned : 1;
430 unsigned : 1;
431 };
432
433 struct
434 {
435 unsigned NOT_RD : 1;
436 unsigned NOT_WR : 1;
437 unsigned NOT_CS : 1;
438 unsigned : 1;
439 unsigned : 1;
440 unsigned : 1;
441 unsigned : 1;
442 unsigned : 1;
443 };
444
445 struct
446 {
447 unsigned AN5 : 1;
448 unsigned AN6 : 1;
449 unsigned AN7 : 1;
450 unsigned : 1;
451 unsigned : 1;
452 unsigned : 1;
453 unsigned : 1;
454 unsigned : 1;
455 };
456
457 struct
458 {
459 unsigned RE : 4;
460 unsigned : 4;
461 };
462 } __PORTEbits_t;
463
464 extern __at(0x0F84) volatile __PORTEbits_t PORTEbits;
465
466 #define _PORTE_RE0 0x01
467 #define _PORTE_RD 0x01
468 #define _PORTE_NOT_RD 0x01
469 #define _PORTE_AN5 0x01
470 #define _PORTE_RE1 0x02
471 #define _PORTE_WR 0x02
472 #define _PORTE_NOT_WR 0x02
473 #define _PORTE_AN6 0x02
474 #define _PORTE_RE2 0x04
475 #define _PORTE_CS 0x04
476 #define _PORTE_NOT_CS 0x04
477 #define _PORTE_AN7 0x04
478 #define _PORTE_RE3 0x08
479 #define _PORTE_MCLR 0x08
480
481 //==============================================================================
482
483
484 //==============================================================================
485 // LATA Bits
486
487 extern __at(0x0F89) __sfr LATA;
488
489 typedef struct
490 {
491 unsigned LATA0 : 1;
492 unsigned LATA1 : 1;
493 unsigned LATA2 : 1;
494 unsigned LATA3 : 1;
495 unsigned LATA4 : 1;
496 unsigned LATA5 : 1;
497 unsigned LATA6 : 1;
498 unsigned LATA7 : 1;
499 } __LATAbits_t;
500
501 extern __at(0x0F89) volatile __LATAbits_t LATAbits;
502
503 #define _LATA0 0x01
504 #define _LATA1 0x02
505 #define _LATA2 0x04
506 #define _LATA3 0x08
507 #define _LATA4 0x10
508 #define _LATA5 0x20
509 #define _LATA6 0x40
510 #define _LATA7 0x80
511
512 //==============================================================================
513
514
515 //==============================================================================
516 // LATB Bits
517
518 extern __at(0x0F8A) __sfr LATB;
519
520 typedef struct
521 {
522 unsigned LATB0 : 1;
523 unsigned LATB1 : 1;
524 unsigned LATB2 : 1;
525 unsigned LATB3 : 1;
526 unsigned LATB4 : 1;
527 unsigned LATB5 : 1;
528 unsigned LATB6 : 1;
529 unsigned LATB7 : 1;
530 } __LATBbits_t;
531
532 extern __at(0x0F8A) volatile __LATBbits_t LATBbits;
533
534 #define _LATB0 0x01
535 #define _LATB1 0x02
536 #define _LATB2 0x04
537 #define _LATB3 0x08
538 #define _LATB4 0x10
539 #define _LATB5 0x20
540 #define _LATB6 0x40
541 #define _LATB7 0x80
542
543 //==============================================================================
544
545
546 //==============================================================================
547 // LATC Bits
548
549 extern __at(0x0F8B) __sfr LATC;
550
551 typedef struct
552 {
553 unsigned LATC0 : 1;
554 unsigned LATC1 : 1;
555 unsigned LATC2 : 1;
556 unsigned LATC3 : 1;
557 unsigned LATC4 : 1;
558 unsigned LATC5 : 1;
559 unsigned LATC6 : 1;
560 unsigned LATC7 : 1;
561 } __LATCbits_t;
562
563 extern __at(0x0F8B) volatile __LATCbits_t LATCbits;
564
565 #define _LATC0 0x01
566 #define _LATC1 0x02
567 #define _LATC2 0x04
568 #define _LATC3 0x08
569 #define _LATC4 0x10
570 #define _LATC5 0x20
571 #define _LATC6 0x40
572 #define _LATC7 0x80
573
574 //==============================================================================
575
576
577 //==============================================================================
578 // LATD Bits
579
580 extern __at(0x0F8C) __sfr LATD;
581
582 typedef struct
583 {
584 unsigned LATD0 : 1;
585 unsigned LATD1 : 1;
586 unsigned LATD2 : 1;
587 unsigned LATD3 : 1;
588 unsigned LATD4 : 1;
589 unsigned LATD5 : 1;
590 unsigned LATD6 : 1;
591 unsigned LATD7 : 1;
592 } __LATDbits_t;
593
594 extern __at(0x0F8C) volatile __LATDbits_t LATDbits;
595
596 #define _LATD0 0x01
597 #define _LATD1 0x02
598 #define _LATD2 0x04
599 #define _LATD3 0x08
600 #define _LATD4 0x10
601 #define _LATD5 0x20
602 #define _LATD6 0x40
603 #define _LATD7 0x80
604
605 //==============================================================================
606
607
608 //==============================================================================
609 // LATE Bits
610
611 extern __at(0x0F8D) __sfr LATE;
612
613 typedef union
614 {
615 struct
616 {
617 unsigned LATE0 : 1;
618 unsigned LATE1 : 1;
619 unsigned LATE2 : 1;
620 unsigned : 1;
621 unsigned : 1;
622 unsigned : 1;
623 unsigned : 1;
624 unsigned : 1;
625 };
626
627 struct
628 {
629 unsigned LATE : 3;
630 unsigned : 5;
631 };
632 } __LATEbits_t;
633
634 extern __at(0x0F8D) volatile __LATEbits_t LATEbits;
635
636 #define _LATE0 0x01
637 #define _LATE1 0x02
638 #define _LATE2 0x04
639
640 //==============================================================================
641
642
643 //==============================================================================
644 // DDRA Bits
645
646 extern __at(0x0F92) __sfr DDRA;
647
648 typedef union
649 {
650 struct
651 {
652 unsigned TRISA0 : 1;
653 unsigned TRISA1 : 1;
654 unsigned TRISA2 : 1;
655 unsigned TRISA3 : 1;
656 unsigned TRISA4 : 1;
657 unsigned TRISA5 : 1;
658 unsigned TRISA6 : 1;
659 unsigned TRISA7 : 1;
660 };
661
662 struct
663 {
664 unsigned RA0 : 1;
665 unsigned RA1 : 1;
666 unsigned RA2 : 1;
667 unsigned RA3 : 1;
668 unsigned RA4 : 1;
669 unsigned RA5 : 1;
670 unsigned RA6 : 1;
671 unsigned RA7 : 1;
672 };
673 } __DDRAbits_t;
674
675 extern __at(0x0F92) volatile __DDRAbits_t DDRAbits;
676
677 #define _TRISA0 0x01
678 #define _RA0 0x01
679 #define _TRISA1 0x02
680 #define _RA1 0x02
681 #define _TRISA2 0x04
682 #define _RA2 0x04
683 #define _TRISA3 0x08
684 #define _RA3 0x08
685 #define _TRISA4 0x10
686 #define _RA4 0x10
687 #define _TRISA5 0x20
688 #define _RA5 0x20
689 #define _TRISA6 0x40
690 #define _RA6 0x40
691 #define _TRISA7 0x80
692 #define _RA7 0x80
693
694 //==============================================================================
695
696
697 //==============================================================================
698 // TRISA Bits
699
700 extern __at(0x0F92) __sfr TRISA;
701
702 typedef union
703 {
704 struct
705 {
706 unsigned TRISA0 : 1;
707 unsigned TRISA1 : 1;
708 unsigned TRISA2 : 1;
709 unsigned TRISA3 : 1;
710 unsigned TRISA4 : 1;
711 unsigned TRISA5 : 1;
712 unsigned TRISA6 : 1;
713 unsigned TRISA7 : 1;
714 };
715
716 struct
717 {
718 unsigned RA0 : 1;
719 unsigned RA1 : 1;
720 unsigned RA2 : 1;
721 unsigned RA3 : 1;
722 unsigned RA4 : 1;
723 unsigned RA5 : 1;
724 unsigned RA6 : 1;
725 unsigned RA7 : 1;
726 };
727 } __TRISAbits_t;
728
729 extern __at(0x0F92) volatile __TRISAbits_t TRISAbits;
730
731 #define _TRISA_TRISA0 0x01
732 #define _TRISA_RA0 0x01
733 #define _TRISA_TRISA1 0x02
734 #define _TRISA_RA1 0x02
735 #define _TRISA_TRISA2 0x04
736 #define _TRISA_RA2 0x04
737 #define _TRISA_TRISA3 0x08
738 #define _TRISA_RA3 0x08
739 #define _TRISA_TRISA4 0x10
740 #define _TRISA_RA4 0x10
741 #define _TRISA_TRISA5 0x20
742 #define _TRISA_RA5 0x20
743 #define _TRISA_TRISA6 0x40
744 #define _TRISA_RA6 0x40
745 #define _TRISA_TRISA7 0x80
746 #define _TRISA_RA7 0x80
747
748 //==============================================================================
749
750
751 //==============================================================================
752 // DDRB Bits
753
754 extern __at(0x0F93) __sfr DDRB;
755
756 typedef union
757 {
758 struct
759 {
760 unsigned TRISB0 : 1;
761 unsigned TRISB1 : 1;
762 unsigned TRISB2 : 1;
763 unsigned TRISB3 : 1;
764 unsigned TRISB4 : 1;
765 unsigned TRISB5 : 1;
766 unsigned TRISB6 : 1;
767 unsigned TRISB7 : 1;
768 };
769
770 struct
771 {
772 unsigned RB0 : 1;
773 unsigned RB1 : 1;
774 unsigned RB2 : 1;
775 unsigned RB3 : 1;
776 unsigned RB4 : 1;
777 unsigned RB5 : 1;
778 unsigned RB6 : 1;
779 unsigned RB7 : 1;
780 };
781 } __DDRBbits_t;
782
783 extern __at(0x0F93) volatile __DDRBbits_t DDRBbits;
784
785 #define _TRISB0 0x01
786 #define _RB0 0x01
787 #define _TRISB1 0x02
788 #define _RB1 0x02
789 #define _TRISB2 0x04
790 #define _RB2 0x04
791 #define _TRISB3 0x08
792 #define _RB3 0x08
793 #define _TRISB4 0x10
794 #define _RB4 0x10
795 #define _TRISB5 0x20
796 #define _RB5 0x20
797 #define _TRISB6 0x40
798 #define _RB6 0x40
799 #define _TRISB7 0x80
800 #define _RB7 0x80
801
802 //==============================================================================
803
804
805 //==============================================================================
806 // TRISB Bits
807
808 extern __at(0x0F93) __sfr TRISB;
809
810 typedef union
811 {
812 struct
813 {
814 unsigned TRISB0 : 1;
815 unsigned TRISB1 : 1;
816 unsigned TRISB2 : 1;
817 unsigned TRISB3 : 1;
818 unsigned TRISB4 : 1;
819 unsigned TRISB5 : 1;
820 unsigned TRISB6 : 1;
821 unsigned TRISB7 : 1;
822 };
823
824 struct
825 {
826 unsigned RB0 : 1;
827 unsigned RB1 : 1;
828 unsigned RB2 : 1;
829 unsigned RB3 : 1;
830 unsigned RB4 : 1;
831 unsigned RB5 : 1;
832 unsigned RB6 : 1;
833 unsigned RB7 : 1;
834 };
835 } __TRISBbits_t;
836
837 extern __at(0x0F93) volatile __TRISBbits_t TRISBbits;
838
839 #define _TRISB_TRISB0 0x01
840 #define _TRISB_RB0 0x01
841 #define _TRISB_TRISB1 0x02
842 #define _TRISB_RB1 0x02
843 #define _TRISB_TRISB2 0x04
844 #define _TRISB_RB2 0x04
845 #define _TRISB_TRISB3 0x08
846 #define _TRISB_RB3 0x08
847 #define _TRISB_TRISB4 0x10
848 #define _TRISB_RB4 0x10
849 #define _TRISB_TRISB5 0x20
850 #define _TRISB_RB5 0x20
851 #define _TRISB_TRISB6 0x40
852 #define _TRISB_RB6 0x40
853 #define _TRISB_TRISB7 0x80
854 #define _TRISB_RB7 0x80
855
856 //==============================================================================
857
858
859 //==============================================================================
860 // DDRC Bits
861
862 extern __at(0x0F94) __sfr DDRC;
863
864 typedef union
865 {
866 struct
867 {
868 unsigned TRISC0 : 1;
869 unsigned TRISC1 : 1;
870 unsigned TRISC2 : 1;
871 unsigned TRISC3 : 1;
872 unsigned TRISC4 : 1;
873 unsigned TRISC5 : 1;
874 unsigned TRISC6 : 1;
875 unsigned TRISC7 : 1;
876 };
877
878 struct
879 {
880 unsigned RC0 : 1;
881 unsigned RC1 : 1;
882 unsigned RC2 : 1;
883 unsigned RC3 : 1;
884 unsigned RC4 : 1;
885 unsigned RC5 : 1;
886 unsigned RC6 : 1;
887 unsigned RC7 : 1;
888 };
889 } __DDRCbits_t;
890
891 extern __at(0x0F94) volatile __DDRCbits_t DDRCbits;
892
893 #define _TRISC0 0x01
894 #define _RC0 0x01
895 #define _TRISC1 0x02
896 #define _RC1 0x02
897 #define _TRISC2 0x04
898 #define _RC2 0x04
899 #define _TRISC3 0x08
900 #define _RC3 0x08
901 #define _TRISC4 0x10
902 #define _RC4 0x10
903 #define _TRISC5 0x20
904 #define _RC5 0x20
905 #define _TRISC6 0x40
906 #define _RC6 0x40
907 #define _TRISC7 0x80
908 #define _RC7 0x80
909
910 //==============================================================================
911
912
913 //==============================================================================
914 // TRISC Bits
915
916 extern __at(0x0F94) __sfr TRISC;
917
918 typedef union
919 {
920 struct
921 {
922 unsigned TRISC0 : 1;
923 unsigned TRISC1 : 1;
924 unsigned TRISC2 : 1;
925 unsigned TRISC3 : 1;
926 unsigned TRISC4 : 1;
927 unsigned TRISC5 : 1;
928 unsigned TRISC6 : 1;
929 unsigned TRISC7 : 1;
930 };
931
932 struct
933 {
934 unsigned RC0 : 1;
935 unsigned RC1 : 1;
936 unsigned RC2 : 1;
937 unsigned RC3 : 1;
938 unsigned RC4 : 1;
939 unsigned RC5 : 1;
940 unsigned RC6 : 1;
941 unsigned RC7 : 1;
942 };
943 } __TRISCbits_t;
944
945 extern __at(0x0F94) volatile __TRISCbits_t TRISCbits;
946
947 #define _TRISC_TRISC0 0x01
948 #define _TRISC_RC0 0x01
949 #define _TRISC_TRISC1 0x02
950 #define _TRISC_RC1 0x02
951 #define _TRISC_TRISC2 0x04
952 #define _TRISC_RC2 0x04
953 #define _TRISC_TRISC3 0x08
954 #define _TRISC_RC3 0x08
955 #define _TRISC_TRISC4 0x10
956 #define _TRISC_RC4 0x10
957 #define _TRISC_TRISC5 0x20
958 #define _TRISC_RC5 0x20
959 #define _TRISC_TRISC6 0x40
960 #define _TRISC_RC6 0x40
961 #define _TRISC_TRISC7 0x80
962 #define _TRISC_RC7 0x80
963
964 //==============================================================================
965
966
967 //==============================================================================
968 // DDRD Bits
969
970 extern __at(0x0F95) __sfr DDRD;
971
972 typedef union
973 {
974 struct
975 {
976 unsigned TRISD0 : 1;
977 unsigned TRISD1 : 1;
978 unsigned TRISD2 : 1;
979 unsigned TRISD3 : 1;
980 unsigned TRISD4 : 1;
981 unsigned TRISD5 : 1;
982 unsigned TRISD6 : 1;
983 unsigned TRISD7 : 1;
984 };
985
986 struct
987 {
988 unsigned RD0 : 1;
989 unsigned RD1 : 1;
990 unsigned RD2 : 1;
991 unsigned RD3 : 1;
992 unsigned RD4 : 1;
993 unsigned RD5 : 1;
994 unsigned RD6 : 1;
995 unsigned RD7 : 1;
996 };
997 } __DDRDbits_t;
998
999 extern __at(0x0F95) volatile __DDRDbits_t DDRDbits;
1000
1001 #define _TRISD0 0x01
1002 #define _RD0 0x01
1003 #define _TRISD1 0x02
1004 #define _RD1 0x02
1005 #define _TRISD2 0x04
1006 #define _RD2 0x04
1007 #define _TRISD3 0x08
1008 #define _RD3 0x08
1009 #define _TRISD4 0x10
1010 #define _RD4 0x10
1011 #define _TRISD5 0x20
1012 #define _RD5 0x20
1013 #define _TRISD6 0x40
1014 #define _RD6 0x40
1015 #define _TRISD7 0x80
1016 #define _RD7 0x80
1017
1018 //==============================================================================
1019
1020
1021 //==============================================================================
1022 // TRISD Bits
1023
1024 extern __at(0x0F95) __sfr TRISD;
1025
1026 typedef union
1027 {
1028 struct
1029 {
1030 unsigned TRISD0 : 1;
1031 unsigned TRISD1 : 1;
1032 unsigned TRISD2 : 1;
1033 unsigned TRISD3 : 1;
1034 unsigned TRISD4 : 1;
1035 unsigned TRISD5 : 1;
1036 unsigned TRISD6 : 1;
1037 unsigned TRISD7 : 1;
1038 };
1039
1040 struct
1041 {
1042 unsigned RD0 : 1;
1043 unsigned RD1 : 1;
1044 unsigned RD2 : 1;
1045 unsigned RD3 : 1;
1046 unsigned RD4 : 1;
1047 unsigned RD5 : 1;
1048 unsigned RD6 : 1;
1049 unsigned RD7 : 1;
1050 };
1051 } __TRISDbits_t;
1052
1053 extern __at(0x0F95) volatile __TRISDbits_t TRISDbits;
1054
1055 #define _TRISD_TRISD0 0x01
1056 #define _TRISD_RD0 0x01
1057 #define _TRISD_TRISD1 0x02
1058 #define _TRISD_RD1 0x02
1059 #define _TRISD_TRISD2 0x04
1060 #define _TRISD_RD2 0x04
1061 #define _TRISD_TRISD3 0x08
1062 #define _TRISD_RD3 0x08
1063 #define _TRISD_TRISD4 0x10
1064 #define _TRISD_RD4 0x10
1065 #define _TRISD_TRISD5 0x20
1066 #define _TRISD_RD5 0x20
1067 #define _TRISD_TRISD6 0x40
1068 #define _TRISD_RD6 0x40
1069 #define _TRISD_TRISD7 0x80
1070 #define _TRISD_RD7 0x80
1071
1072 //==============================================================================
1073
1074
1075 //==============================================================================
1076 // DDRE Bits
1077
1078 extern __at(0x0F96) __sfr DDRE;
1079
1080 typedef union
1081 {
1082 struct
1083 {
1084 unsigned TRISE0 : 1;
1085 unsigned TRISE1 : 1;
1086 unsigned TRISE2 : 1;
1087 unsigned RE3 : 1;
1088 unsigned PSPMODE : 1;
1089 unsigned IBOV : 1;
1090 unsigned OBF : 1;
1091 unsigned IBF : 1;
1092 };
1093
1094 struct
1095 {
1096 unsigned RE0 : 1;
1097 unsigned RE1 : 1;
1098 unsigned RE2 : 1;
1099 unsigned : 1;
1100 unsigned : 1;
1101 unsigned : 1;
1102 unsigned : 1;
1103 unsigned : 1;
1104 };
1105
1106 struct
1107 {
1108 unsigned TRISE : 3;
1109 unsigned : 5;
1110 };
1111
1112 struct
1113 {
1114 unsigned RE : 4;
1115 unsigned : 4;
1116 };
1117 } __DDREbits_t;
1118
1119 extern __at(0x0F96) volatile __DDREbits_t DDREbits;
1120
1121 #define _TRISE0 0x01
1122 #define _RE0 0x01
1123 #define _TRISE1 0x02
1124 #define _RE1 0x02
1125 #define _TRISE2 0x04
1126 #define _RE2 0x04
1127 #define _RE3 0x08
1128 #define _PSPMODE 0x10
1129 #define _IBOV 0x20
1130 #define _OBF 0x40
1131 #define _IBF 0x80
1132
1133 //==============================================================================
1134
1135
1136 //==============================================================================
1137 // TRISE Bits
1138
1139 extern __at(0x0F96) __sfr TRISE;
1140
1141 typedef union
1142 {
1143 struct
1144 {
1145 unsigned TRISE0 : 1;
1146 unsigned TRISE1 : 1;
1147 unsigned TRISE2 : 1;
1148 unsigned RE3 : 1;
1149 unsigned PSPMODE : 1;
1150 unsigned IBOV : 1;
1151 unsigned OBF : 1;
1152 unsigned IBF : 1;
1153 };
1154
1155 struct
1156 {
1157 unsigned RE0 : 1;
1158 unsigned RE1 : 1;
1159 unsigned RE2 : 1;
1160 unsigned : 1;
1161 unsigned : 1;
1162 unsigned : 1;
1163 unsigned : 1;
1164 unsigned : 1;
1165 };
1166
1167 struct
1168 {
1169 unsigned TRISE : 3;
1170 unsigned : 5;
1171 };
1172
1173 struct
1174 {
1175 unsigned RE : 4;
1176 unsigned : 4;
1177 };
1178 } __TRISEbits_t;
1179
1180 extern __at(0x0F96) volatile __TRISEbits_t TRISEbits;
1181
1182 #define _TRISE_TRISE0 0x01
1183 #define _TRISE_RE0 0x01
1184 #define _TRISE_TRISE1 0x02
1185 #define _TRISE_RE1 0x02
1186 #define _TRISE_TRISE2 0x04
1187 #define _TRISE_RE2 0x04
1188 #define _TRISE_RE3 0x08
1189 #define _TRISE_PSPMODE 0x10
1190 #define _TRISE_IBOV 0x20
1191 #define _TRISE_OBF 0x40
1192 #define _TRISE_IBF 0x80
1193
1194 //==============================================================================
1195
1196
1197 //==============================================================================
1198 // OSCTUN2 Bits
1199
1200 extern __at(0x0F9A) __sfr OSCTUN2;
1201
1202 typedef union
1203 {
1204 struct
1205 {
1206 unsigned TUN0 : 1;
1207 unsigned TUN1 : 1;
1208 unsigned TUN2 : 1;
1209 unsigned TUN3 : 1;
1210 unsigned TUN4 : 1;
1211 unsigned TUN5 : 1;
1212 unsigned : 1;
1213 unsigned TUNSEL : 1;
1214 };
1215
1216 struct
1217 {
1218 unsigned TUN : 6;
1219 unsigned : 2;
1220 };
1221 } __OSCTUN2bits_t;
1222
1223 extern __at(0x0F9A) volatile __OSCTUN2bits_t OSCTUN2bits;
1224
1225 #define _TUN0 0x01
1226 #define _TUN1 0x02
1227 #define _TUN2 0x04
1228 #define _TUN3 0x08
1229 #define _TUN4 0x10
1230 #define _TUN5 0x20
1231 #define _TUNSEL 0x80
1232
1233 //==============================================================================
1234
1235
1236 //==============================================================================
1237 // OSCTUNE Bits
1238
1239 extern __at(0x0F9B) __sfr OSCTUNE;
1240
1241 typedef union
1242 {
1243 struct
1244 {
1245 unsigned TUN0 : 1;
1246 unsigned TUN1 : 1;
1247 unsigned TUN2 : 1;
1248 unsigned TUN3 : 1;
1249 unsigned TUN4 : 1;
1250 unsigned TUN5 : 1;
1251 unsigned : 1;
1252 unsigned : 1;
1253 };
1254
1255 struct
1256 {
1257 unsigned TUN : 6;
1258 unsigned : 2;
1259 };
1260 } __OSCTUNEbits_t;
1261
1262 extern __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits;
1263
1264 #define _OSCTUNE_TUN0 0x01
1265 #define _OSCTUNE_TUN1 0x02
1266 #define _OSCTUNE_TUN2 0x04
1267 #define _OSCTUNE_TUN3 0x08
1268 #define _OSCTUNE_TUN4 0x10
1269 #define _OSCTUNE_TUN5 0x20
1270
1271 //==============================================================================
1272
1273
1274 //==============================================================================
1275 // PIE1 Bits
1276
1277 extern __at(0x0F9D) __sfr PIE1;
1278
1279 typedef struct
1280 {
1281 unsigned TMR1IE : 1;
1282 unsigned TMR2IE : 1;
1283 unsigned CCP1IE : 1;
1284 unsigned SSPIE : 1;
1285 unsigned TXIE : 1;
1286 unsigned RCIE : 1;
1287 unsigned ADIE : 1;
1288 unsigned PSPIE : 1;
1289 } __PIE1bits_t;
1290
1291 extern __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
1292
1293 #define _TMR1IE 0x01
1294 #define _TMR2IE 0x02
1295 #define _CCP1IE 0x04
1296 #define _SSPIE 0x08
1297 #define _TXIE 0x10
1298 #define _RCIE 0x20
1299 #define _ADIE 0x40
1300 #define _PSPIE 0x80
1301
1302 //==============================================================================
1303
1304
1305 //==============================================================================
1306 // PIR1 Bits
1307
1308 extern __at(0x0F9E) __sfr PIR1;
1309
1310 typedef struct
1311 {
1312 unsigned TMR1IF : 1;
1313 unsigned TMR2IF : 1;
1314 unsigned CCP1IF : 1;
1315 unsigned SSPIF : 1;
1316 unsigned TXIF : 1;
1317 unsigned RCIF : 1;
1318 unsigned ADIF : 1;
1319 unsigned PSPIF : 1;
1320 } __PIR1bits_t;
1321
1322 extern __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
1323
1324 #define _TMR1IF 0x01
1325 #define _TMR2IF 0x02
1326 #define _CCP1IF 0x04
1327 #define _SSPIF 0x08
1328 #define _TXIF 0x10
1329 #define _RCIF 0x20
1330 #define _ADIF 0x40
1331 #define _PSPIF 0x80
1332
1333 //==============================================================================
1334
1335
1336 //==============================================================================
1337 // IPR1 Bits
1338
1339 extern __at(0x0F9F) __sfr IPR1;
1340
1341 typedef struct
1342 {
1343 unsigned TMR1IP : 1;
1344 unsigned TMR2IP : 1;
1345 unsigned CCP1IP : 1;
1346 unsigned SSPIP : 1;
1347 unsigned TXIP : 1;
1348 unsigned RCIP : 1;
1349 unsigned ADIP : 1;
1350 unsigned PSPIP : 1;
1351 } __IPR1bits_t;
1352
1353 extern __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
1354
1355 #define _TMR1IP 0x01
1356 #define _TMR2IP 0x02
1357 #define _CCP1IP 0x04
1358 #define _SSPIP 0x08
1359 #define _TXIP 0x10
1360 #define _RCIP 0x20
1361 #define _ADIP 0x40
1362 #define _PSPIP 0x80
1363
1364 //==============================================================================
1365
1366
1367 //==============================================================================
1368 // PIE2 Bits
1369
1370 extern __at(0x0FA0) __sfr PIE2;
1371
1372 typedef struct
1373 {
1374 unsigned CCP2IE : 1;
1375 unsigned TMR3IE : 1;
1376 unsigned LVDIE : 1;
1377 unsigned BCLIE : 1;
1378 unsigned EEIE : 1;
1379 unsigned : 1;
1380 unsigned CMIE : 1;
1381 unsigned OSCFIE : 1;
1382 } __PIE2bits_t;
1383
1384 extern __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
1385
1386 #define _CCP2IE 0x01
1387 #define _TMR3IE 0x02
1388 #define _LVDIE 0x04
1389 #define _BCLIE 0x08
1390 #define _EEIE 0x10
1391 #define _CMIE 0x40
1392 #define _OSCFIE 0x80
1393
1394 //==============================================================================
1395
1396
1397 //==============================================================================
1398 // PIR2 Bits
1399
1400 extern __at(0x0FA1) __sfr PIR2;
1401
1402 typedef struct
1403 {
1404 unsigned CCP2IF : 1;
1405 unsigned TMR3IF : 1;
1406 unsigned LVDIF : 1;
1407 unsigned BCLIF : 1;
1408 unsigned EEIF : 1;
1409 unsigned : 1;
1410 unsigned CMIF : 1;
1411 unsigned OSCFIF : 1;
1412 } __PIR2bits_t;
1413
1414 extern __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
1415
1416 #define _CCP2IF 0x01
1417 #define _TMR3IF 0x02
1418 #define _LVDIF 0x04
1419 #define _BCLIF 0x08
1420 #define _EEIF 0x10
1421 #define _CMIF 0x40
1422 #define _OSCFIF 0x80
1423
1424 //==============================================================================
1425
1426
1427 //==============================================================================
1428 // IPR2 Bits
1429
1430 extern __at(0x0FA2) __sfr IPR2;
1431
1432 typedef struct
1433 {
1434 unsigned CCP2IP : 1;
1435 unsigned TMR3IP : 1;
1436 unsigned LVDIP : 1;
1437 unsigned BCLIP : 1;
1438 unsigned EEIP : 1;
1439 unsigned : 1;
1440 unsigned CMIP : 1;
1441 unsigned OSCFIP : 1;
1442 } __IPR2bits_t;
1443
1444 extern __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
1445
1446 #define _CCP2IP 0x01
1447 #define _TMR3IP 0x02
1448 #define _LVDIP 0x04
1449 #define _BCLIP 0x08
1450 #define _EEIP 0x10
1451 #define _CMIP 0x40
1452 #define _OSCFIP 0x80
1453
1454 //==============================================================================
1455
1456
1457 //==============================================================================
1458 // EECON1 Bits
1459
1460 extern __at(0x0FA6) __sfr EECON1;
1461
1462 typedef struct
1463 {
1464 unsigned RD : 1;
1465 unsigned WR : 1;
1466 unsigned WREN : 1;
1467 unsigned WRERR : 1;
1468 unsigned FREE : 1;
1469 unsigned : 1;
1470 unsigned CFGS : 1;
1471 unsigned EEPGD : 1;
1472 } __EECON1bits_t;
1473
1474 extern __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
1475
1476 #define _RD 0x01
1477 #define _WR 0x02
1478 #define _WREN 0x04
1479 #define _WRERR 0x08
1480 #define _FREE 0x10
1481 #define _CFGS 0x40
1482 #define _EEPGD 0x80
1483
1484 //==============================================================================
1485
1486 extern __at(0x0FA7) __sfr EECON2;
1487 extern __at(0x0FA8) __sfr EEDATA;
1488 extern __at(0x0FA9) __sfr EEADR;
1489
1490 //==============================================================================
1491 // RCSTA Bits
1492
1493 extern __at(0x0FAB) __sfr RCSTA;
1494
1495 typedef union
1496 {
1497 struct
1498 {
1499 unsigned RX9D : 1;
1500 unsigned OERR : 1;
1501 unsigned FERR : 1;
1502 unsigned ADDEN : 1;
1503 unsigned CREN : 1;
1504 unsigned SREN : 1;
1505 unsigned RX9 : 1;
1506 unsigned SPEN : 1;
1507 };
1508
1509 struct
1510 {
1511 unsigned : 1;
1512 unsigned : 1;
1513 unsigned : 1;
1514 unsigned ADEN : 1;
1515 unsigned : 1;
1516 unsigned : 1;
1517 unsigned : 1;
1518 unsigned : 1;
1519 };
1520 } __RCSTAbits_t;
1521
1522 extern __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
1523
1524 #define _RX9D 0x01
1525 #define _OERR 0x02
1526 #define _FERR 0x04
1527 #define _ADDEN 0x08
1528 #define _ADEN 0x08
1529 #define _CREN 0x10
1530 #define _SREN 0x20
1531 #define _RX9 0x40
1532 #define _SPEN 0x80
1533
1534 //==============================================================================
1535
1536
1537 //==============================================================================
1538 // TXSTA Bits
1539
1540 extern __at(0x0FAC) __sfr TXSTA;
1541
1542 typedef struct
1543 {
1544 unsigned TX9D : 1;
1545 unsigned TRMT : 1;
1546 unsigned BRGH : 1;
1547 unsigned : 1;
1548 unsigned SYNC : 1;
1549 unsigned TXEN : 1;
1550 unsigned TX9 : 1;
1551 unsigned CSRC : 1;
1552 } __TXSTAbits_t;
1553
1554 extern __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
1555
1556 #define _TX9D 0x01
1557 #define _TRMT 0x02
1558 #define _BRGH 0x04
1559 #define _SYNC 0x10
1560 #define _TXEN 0x20
1561 #define _TX9 0x40
1562 #define _CSRC 0x80
1563
1564 //==============================================================================
1565
1566 extern __at(0x0FAD) __sfr TXREG;
1567 extern __at(0x0FAE) __sfr RCREG;
1568 extern __at(0x0FAF) __sfr SPBRG;
1569
1570 //==============================================================================
1571 // T3CON Bits
1572
1573 extern __at(0x0FB1) __sfr T3CON;
1574
1575 typedef union
1576 {
1577 struct
1578 {
1579 unsigned TMR3ON : 1;
1580 unsigned TMR3CS : 1;
1581 unsigned NOT_T3SYNC : 1;
1582 unsigned T3CCP1 : 1;
1583 unsigned T3CKPS0 : 1;
1584 unsigned T3CKPS1 : 1;
1585 unsigned T3CCP2 : 1;
1586 unsigned RD16 : 1;
1587 };
1588
1589 struct
1590 {
1591 unsigned : 1;
1592 unsigned : 1;
1593 unsigned T3SYNC : 1;
1594 unsigned : 1;
1595 unsigned : 1;
1596 unsigned : 1;
1597 unsigned : 1;
1598 unsigned : 1;
1599 };
1600
1601 struct
1602 {
1603 unsigned : 4;
1604 unsigned T3CKPS : 2;
1605 unsigned : 2;
1606 };
1607 } __T3CONbits_t;
1608
1609 extern __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
1610
1611 #define _T3CON_TMR3ON 0x01
1612 #define _T3CON_TMR3CS 0x02
1613 #define _T3CON_NOT_T3SYNC 0x04
1614 #define _T3CON_T3SYNC 0x04
1615 #define _T3CON_T3CCP1 0x08
1616 #define _T3CON_T3CKPS0 0x10
1617 #define _T3CON_T3CKPS1 0x20
1618 #define _T3CON_T3CCP2 0x40
1619 #define _T3CON_RD16 0x80
1620
1621 //==============================================================================
1622
1623 extern __at(0x0FB2) __sfr TMR3;
1624 extern __at(0x0FB2) __sfr TMR3L;
1625 extern __at(0x0FB3) __sfr TMR3H;
1626
1627 //==============================================================================
1628 // CMCON Bits
1629
1630 extern __at(0x0FB4) __sfr CMCON;
1631
1632 typedef union
1633 {
1634 struct
1635 {
1636 unsigned CM0 : 1;
1637 unsigned CM1 : 1;
1638 unsigned CM2 : 1;
1639 unsigned CIS : 1;
1640 unsigned C1INV : 1;
1641 unsigned C2INV : 1;
1642 unsigned C1OUT : 1;
1643 unsigned C2OUT : 1;
1644 };
1645
1646 struct
1647 {
1648 unsigned CM : 3;
1649 unsigned : 5;
1650 };
1651 } __CMCONbits_t;
1652
1653 extern __at(0x0FB4) volatile __CMCONbits_t CMCONbits;
1654
1655 #define _CM0 0x01
1656 #define _CM1 0x02
1657 #define _CM2 0x04
1658 #define _CIS 0x08
1659 #define _C1INV 0x10
1660 #define _C2INV 0x20
1661 #define _C1OUT 0x40
1662 #define _C2OUT 0x80
1663
1664 //==============================================================================
1665
1666
1667 //==============================================================================
1668 // CVRCON Bits
1669
1670 extern __at(0x0FB5) __sfr CVRCON;
1671
1672 typedef union
1673 {
1674 struct
1675 {
1676 unsigned CVR0 : 1;
1677 unsigned CVR1 : 1;
1678 unsigned CVR2 : 1;
1679 unsigned CVR3 : 1;
1680 unsigned : 1;
1681 unsigned CVRR : 1;
1682 unsigned CVROE : 1;
1683 unsigned CVREN : 1;
1684 };
1685
1686 struct
1687 {
1688 unsigned CVR : 4;
1689 unsigned : 4;
1690 };
1691 } __CVRCONbits_t;
1692
1693 extern __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
1694
1695 #define _CVR0 0x01
1696 #define _CVR1 0x02
1697 #define _CVR2 0x04
1698 #define _CVR3 0x08
1699 #define _CVRR 0x20
1700 #define _CVROE 0x40
1701 #define _CVREN 0x80
1702
1703 //==============================================================================
1704
1705
1706 //==============================================================================
1707 // ECCPAS Bits
1708
1709 extern __at(0x0FB6) __sfr ECCPAS;
1710
1711 typedef union
1712 {
1713 struct
1714 {
1715 unsigned PSSBD0 : 1;
1716 unsigned PSSBD1 : 1;
1717 unsigned PSSAC0 : 1;
1718 unsigned PSSAC1 : 1;
1719 unsigned ECCPAS0 : 1;
1720 unsigned ECCPAS1 : 1;
1721 unsigned ECCPAS2 : 1;
1722 unsigned ECCPASE : 1;
1723 };
1724
1725 struct
1726 {
1727 unsigned PSSBD : 2;
1728 unsigned : 6;
1729 };
1730
1731 struct
1732 {
1733 unsigned : 2;
1734 unsigned PSSAC : 2;
1735 unsigned : 4;
1736 };
1737
1738 struct
1739 {
1740 unsigned : 4;
1741 unsigned ECCPAS : 3;
1742 unsigned : 1;
1743 };
1744 } __ECCPASbits_t;
1745
1746 extern __at(0x0FB6) volatile __ECCPASbits_t ECCPASbits;
1747
1748 #define _PSSBD0 0x01
1749 #define _PSSBD1 0x02
1750 #define _PSSAC0 0x04
1751 #define _PSSAC1 0x08
1752 #define _ECCPAS0 0x10
1753 #define _ECCPAS1 0x20
1754 #define _ECCPAS2 0x40
1755 #define _ECCPASE 0x80
1756
1757 //==============================================================================
1758
1759
1760 //==============================================================================
1761 // PWM1CON Bits
1762
1763 extern __at(0x0FB7) __sfr PWM1CON;
1764
1765 typedef union
1766 {
1767 struct
1768 {
1769 unsigned PDC0 : 1;
1770 unsigned PDC1 : 1;
1771 unsigned PDC2 : 1;
1772 unsigned PDC3 : 1;
1773 unsigned PDC4 : 1;
1774 unsigned PDC5 : 1;
1775 unsigned PDC6 : 1;
1776 unsigned PRSEN : 1;
1777 };
1778
1779 struct
1780 {
1781 unsigned PDC : 7;
1782 unsigned : 1;
1783 };
1784 } __PWM1CONbits_t;
1785
1786 extern __at(0x0FB7) volatile __PWM1CONbits_t PWM1CONbits;
1787
1788 #define _PDC0 0x01
1789 #define _PDC1 0x02
1790 #define _PDC2 0x04
1791 #define _PDC3 0x08
1792 #define _PDC4 0x10
1793 #define _PDC5 0x20
1794 #define _PDC6 0x40
1795 #define _PRSEN 0x80
1796
1797 //==============================================================================
1798
1799
1800 //==============================================================================
1801 // CCP2CON Bits
1802
1803 extern __at(0x0FBA) __sfr CCP2CON;
1804
1805 typedef union
1806 {
1807 struct
1808 {
1809 unsigned CCP2M0 : 1;
1810 unsigned CCP2M1 : 1;
1811 unsigned CCP2M2 : 1;
1812 unsigned CCP2M3 : 1;
1813 unsigned DC2B0 : 1;
1814 unsigned DC2B1 : 1;
1815 unsigned : 1;
1816 unsigned : 1;
1817 };
1818
1819 struct
1820 {
1821 unsigned : 1;
1822 unsigned : 1;
1823 unsigned : 1;
1824 unsigned : 1;
1825 unsigned CCP2Y : 1;
1826 unsigned CCP2X : 1;
1827 unsigned : 1;
1828 unsigned : 1;
1829 };
1830
1831 struct
1832 {
1833 unsigned : 1;
1834 unsigned : 1;
1835 unsigned : 1;
1836 unsigned : 1;
1837 unsigned DCP2Y : 1;
1838 unsigned DCP2X : 1;
1839 unsigned : 1;
1840 unsigned : 1;
1841 };
1842
1843 struct
1844 {
1845 unsigned CCP2M : 4;
1846 unsigned : 4;
1847 };
1848
1849 struct
1850 {
1851 unsigned : 4;
1852 unsigned DC2B : 2;
1853 unsigned : 2;
1854 };
1855 } __CCP2CONbits_t;
1856
1857 extern __at(0x0FBA) volatile __CCP2CONbits_t CCP2CONbits;
1858
1859 #define _CCP2M0 0x01
1860 #define _CCP2M1 0x02
1861 #define _CCP2M2 0x04
1862 #define _CCP2M3 0x08
1863 #define _DC2B0 0x10
1864 #define _CCP2Y 0x10
1865 #define _DCP2Y 0x10
1866 #define _DC2B1 0x20
1867 #define _CCP2X 0x20
1868 #define _DCP2X 0x20
1869
1870 //==============================================================================
1871
1872 extern __at(0x0FBB) __sfr CCPR2;
1873 extern __at(0x0FBB) __sfr CCPR2L;
1874 extern __at(0x0FBC) __sfr CCPR2H;
1875
1876 //==============================================================================
1877 // CCP1CON Bits
1878
1879 extern __at(0x0FBD) __sfr CCP1CON;
1880
1881 typedef union
1882 {
1883 struct
1884 {
1885 unsigned CCP1M0 : 1;
1886 unsigned CCP1M1 : 1;
1887 unsigned CCP1M2 : 1;
1888 unsigned CCP1M3 : 1;
1889 unsigned DC1B0 : 1;
1890 unsigned DC1B1 : 1;
1891 unsigned P1M0 : 1;
1892 unsigned P1M1 : 1;
1893 };
1894
1895 struct
1896 {
1897 unsigned : 1;
1898 unsigned : 1;
1899 unsigned : 1;
1900 unsigned : 1;
1901 unsigned CCP1Y : 1;
1902 unsigned CCP1X : 1;
1903 unsigned : 1;
1904 unsigned : 1;
1905 };
1906
1907 struct
1908 {
1909 unsigned : 1;
1910 unsigned : 1;
1911 unsigned : 1;
1912 unsigned : 1;
1913 unsigned DCP1Y : 1;
1914 unsigned DCP1X : 1;
1915 unsigned : 1;
1916 unsigned : 1;
1917 };
1918
1919 struct
1920 {
1921 unsigned CCP1M : 4;
1922 unsigned : 4;
1923 };
1924
1925 struct
1926 {
1927 unsigned : 4;
1928 unsigned DC1B : 2;
1929 unsigned : 2;
1930 };
1931
1932 struct
1933 {
1934 unsigned : 6;
1935 unsigned P1M : 2;
1936 };
1937 } __CCP1CONbits_t;
1938
1939 extern __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits;
1940
1941 #define _CCP1M0 0x01
1942 #define _CCP1M1 0x02
1943 #define _CCP1M2 0x04
1944 #define _CCP1M3 0x08
1945 #define _DC1B0 0x10
1946 #define _CCP1Y 0x10
1947 #define _DCP1Y 0x10
1948 #define _DC1B1 0x20
1949 #define _CCP1X 0x20
1950 #define _DCP1X 0x20
1951 #define _P1M0 0x40
1952 #define _P1M1 0x80
1953
1954 //==============================================================================
1955
1956 extern __at(0x0FBE) __sfr CCPR1;
1957 extern __at(0x0FBE) __sfr CCPR1L;
1958 extern __at(0x0FBF) __sfr CCPR1H;
1959
1960 //==============================================================================
1961 // ADCON2 Bits
1962
1963 extern __at(0x0FC0) __sfr ADCON2;
1964
1965 typedef union
1966 {
1967 struct
1968 {
1969 unsigned ADCS0 : 1;
1970 unsigned ADCS1 : 1;
1971 unsigned ADCS2 : 1;
1972 unsigned ACQT0 : 1;
1973 unsigned ACQT1 : 1;
1974 unsigned ACQT2 : 1;
1975 unsigned : 1;
1976 unsigned ADFM : 1;
1977 };
1978
1979 struct
1980 {
1981 unsigned ADCS : 3;
1982 unsigned : 5;
1983 };
1984
1985 struct
1986 {
1987 unsigned : 3;
1988 unsigned ACQT : 3;
1989 unsigned : 2;
1990 };
1991 } __ADCON2bits_t;
1992
1993 extern __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
1994
1995 #define _ADCS0 0x01
1996 #define _ADCS1 0x02
1997 #define _ADCS2 0x04
1998 #define _ACQT0 0x08
1999 #define _ACQT1 0x10
2000 #define _ACQT2 0x20
2001 #define _ADFM 0x80
2002
2003 //==============================================================================
2004
2005
2006 //==============================================================================
2007 // ADCON1 Bits
2008
2009 extern __at(0x0FC1) __sfr ADCON1;
2010
2011 typedef union
2012 {
2013 struct
2014 {
2015 unsigned PCFG0 : 1;
2016 unsigned PCFG1 : 1;
2017 unsigned PCFG2 : 1;
2018 unsigned PCFG3 : 1;
2019 unsigned VCFG0 : 1;
2020 unsigned VCFG1 : 1;
2021 unsigned : 1;
2022 unsigned : 1;
2023 };
2024
2025 struct
2026 {
2027 unsigned PCFG : 4;
2028 unsigned : 4;
2029 };
2030
2031 struct
2032 {
2033 unsigned : 4;
2034 unsigned VCFG : 2;
2035 unsigned : 2;
2036 };
2037 } __ADCON1bits_t;
2038
2039 extern __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
2040
2041 #define _PCFG0 0x01
2042 #define _PCFG1 0x02
2043 #define _PCFG2 0x04
2044 #define _PCFG3 0x08
2045 #define _VCFG0 0x10
2046 #define _VCFG1 0x20
2047
2048 //==============================================================================
2049
2050
2051 //==============================================================================
2052 // ADCON0 Bits
2053
2054 extern __at(0x0FC2) __sfr ADCON0;
2055
2056 typedef union
2057 {
2058 struct
2059 {
2060 unsigned ADON : 1;
2061 unsigned GO_NOT_DONE : 1;
2062 unsigned CHS0 : 1;
2063 unsigned CHS1 : 1;
2064 unsigned CHS2 : 1;
2065 unsigned CHS3 : 1;
2066 unsigned : 1;
2067 unsigned : 1;
2068 };
2069
2070 struct
2071 {
2072 unsigned : 1;
2073 unsigned GO : 1;
2074 unsigned : 1;
2075 unsigned : 1;
2076 unsigned : 1;
2077 unsigned : 1;
2078 unsigned : 1;
2079 unsigned : 1;
2080 };
2081
2082 struct
2083 {
2084 unsigned : 1;
2085 unsigned DONE : 1;
2086 unsigned : 1;
2087 unsigned : 1;
2088 unsigned : 1;
2089 unsigned : 1;
2090 unsigned : 1;
2091 unsigned : 1;
2092 };
2093
2094 struct
2095 {
2096 unsigned : 1;
2097 unsigned NOT_DONE : 1;
2098 unsigned : 1;
2099 unsigned : 1;
2100 unsigned : 1;
2101 unsigned : 1;
2102 unsigned : 1;
2103 unsigned : 1;
2104 };
2105
2106 struct
2107 {
2108 unsigned : 1;
2109 unsigned GO_DONE : 1;
2110 unsigned : 1;
2111 unsigned : 1;
2112 unsigned : 1;
2113 unsigned : 1;
2114 unsigned : 1;
2115 unsigned : 1;
2116 };
2117
2118 struct
2119 {
2120 unsigned : 2;
2121 unsigned CHS : 4;
2122 unsigned : 2;
2123 };
2124 } __ADCON0bits_t;
2125
2126 extern __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
2127
2128 #define _ADON 0x01
2129 #define _GO_NOT_DONE 0x02
2130 #define _GO 0x02
2131 #define _DONE 0x02
2132 #define _NOT_DONE 0x02
2133 #define _GO_DONE 0x02
2134 #define _CHS0 0x04
2135 #define _CHS1 0x08
2136 #define _CHS2 0x10
2137 #define _CHS3 0x20
2138
2139 //==============================================================================
2140
2141 extern __at(0x0FC3) __sfr ADRES;
2142 extern __at(0x0FC3) __sfr ADRESL;
2143 extern __at(0x0FC4) __sfr ADRESH;
2144
2145 //==============================================================================
2146 // SSPCON2 Bits
2147
2148 extern __at(0x0FC5) __sfr SSPCON2;
2149
2150 typedef struct
2151 {
2152 unsigned SEN : 1;
2153 unsigned RSEN : 1;
2154 unsigned PEN : 1;
2155 unsigned RCEN : 1;
2156 unsigned ACKEN : 1;
2157 unsigned ACKDT : 1;
2158 unsigned ACKSTAT : 1;
2159 unsigned GCEN : 1;
2160 } __SSPCON2bits_t;
2161
2162 extern __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
2163
2164 #define _SEN 0x01
2165 #define _RSEN 0x02
2166 #define _PEN 0x04
2167 #define _RCEN 0x08
2168 #define _ACKEN 0x10
2169 #define _ACKDT 0x20
2170 #define _ACKSTAT 0x40
2171 #define _GCEN 0x80
2172
2173 //==============================================================================
2174
2175
2176 //==============================================================================
2177 // SSPCON1 Bits
2178
2179 extern __at(0x0FC6) __sfr SSPCON1;
2180
2181 typedef union
2182 {
2183 struct
2184 {
2185 unsigned SSPM0 : 1;
2186 unsigned SSPM1 : 1;
2187 unsigned SSPM2 : 1;
2188 unsigned SSPM3 : 1;
2189 unsigned CKP : 1;
2190 unsigned SSPEN : 1;
2191 unsigned SSPOV : 1;
2192 unsigned WCOL : 1;
2193 };
2194
2195 struct
2196 {
2197 unsigned SSPM : 4;
2198 unsigned : 4;
2199 };
2200 } __SSPCON1bits_t;
2201
2202 extern __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
2203
2204 #define _SSPM0 0x01
2205 #define _SSPM1 0x02
2206 #define _SSPM2 0x04
2207 #define _SSPM3 0x08
2208 #define _CKP 0x10
2209 #define _SSPEN 0x20
2210 #define _SSPOV 0x40
2211 #define _WCOL 0x80
2212
2213 //==============================================================================
2214
2215
2216 //==============================================================================
2217 // SSPSTAT Bits
2218
2219 extern __at(0x0FC7) __sfr SSPSTAT;
2220
2221 typedef union
2222 {
2223 struct
2224 {
2225 unsigned BF : 1;
2226 unsigned UA : 1;
2227 unsigned R_NOT_W : 1;
2228 unsigned S : 1;
2229 unsigned P : 1;
2230 unsigned D_NOT_A : 1;
2231 unsigned CKE : 1;
2232 unsigned SMP : 1;
2233 };
2234
2235 struct
2236 {
2237 unsigned : 1;
2238 unsigned : 1;
2239 unsigned I2C_READ : 1;
2240 unsigned I2C_START : 1;
2241 unsigned I2C_STOP : 1;
2242 unsigned I2C_DATA : 1;
2243 unsigned : 1;
2244 unsigned : 1;
2245 };
2246
2247 struct
2248 {
2249 unsigned : 1;
2250 unsigned : 1;
2251 unsigned R : 1;
2252 unsigned : 1;
2253 unsigned : 1;
2254 unsigned D : 1;
2255 unsigned : 1;
2256 unsigned : 1;
2257 };
2258
2259 struct
2260 {
2261 unsigned : 1;
2262 unsigned : 1;
2263 unsigned READ_WRITE : 1;
2264 unsigned : 1;
2265 unsigned : 1;
2266 unsigned DATA_ADDRESS : 1;
2267 unsigned : 1;
2268 unsigned : 1;
2269 };
2270
2271 struct
2272 {
2273 unsigned : 1;
2274 unsigned : 1;
2275 unsigned NOT_WRITE : 1;
2276 unsigned : 1;
2277 unsigned : 1;
2278 unsigned NOT_ADDRESS : 1;
2279 unsigned : 1;
2280 unsigned : 1;
2281 };
2282
2283 struct
2284 {
2285 unsigned : 1;
2286 unsigned : 1;
2287 unsigned NOT_W : 1;
2288 unsigned : 1;
2289 unsigned : 1;
2290 unsigned NOT_A : 1;
2291 unsigned : 1;
2292 unsigned : 1;
2293 };
2294
2295 struct
2296 {
2297 unsigned : 1;
2298 unsigned : 1;
2299 unsigned R_W : 1;
2300 unsigned : 1;
2301 unsigned : 1;
2302 unsigned D_A : 1;
2303 unsigned : 1;
2304 unsigned : 1;
2305 };
2306
2307 struct
2308 {
2309 unsigned : 1;
2310 unsigned : 1;
2311 unsigned : 1;
2312 unsigned : 1;
2313 unsigned : 1;
2314 unsigned I2C_DAT : 1;
2315 unsigned : 1;
2316 unsigned : 1;
2317 };
2318 } __SSPSTATbits_t;
2319
2320 extern __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
2321
2322 #define _BF 0x01
2323 #define _UA 0x02
2324 #define _R_NOT_W 0x04
2325 #define _I2C_READ 0x04
2326 #define _R 0x04
2327 #define _READ_WRITE 0x04
2328 #define _NOT_WRITE 0x04
2329 #define _NOT_W 0x04
2330 #define _R_W 0x04
2331 #define _S 0x08
2332 #define _I2C_START 0x08
2333 #define _P 0x10
2334 #define _I2C_STOP 0x10
2335 #define _D_NOT_A 0x20
2336 #define _I2C_DATA 0x20
2337 #define _D 0x20
2338 #define _DATA_ADDRESS 0x20
2339 #define _NOT_ADDRESS 0x20
2340 #define _NOT_A 0x20
2341 #define _D_A 0x20
2342 #define _I2C_DAT 0x20
2343 #define _CKE 0x40
2344 #define _SMP 0x80
2345
2346 //==============================================================================
2347
2348 extern __at(0x0FC8) __sfr SSPADD;
2349 extern __at(0x0FC9) __sfr SSPBUF;
2350
2351 //==============================================================================
2352 // T2CON Bits
2353
2354 extern __at(0x0FCA) __sfr T2CON;
2355
2356 typedef union
2357 {
2358 struct
2359 {
2360 unsigned T2CKPS0 : 1;
2361 unsigned T2CKPS1 : 1;
2362 unsigned TMR2ON : 1;
2363 unsigned TOUTPS0 : 1;
2364 unsigned TOUTPS1 : 1;
2365 unsigned TOUTPS2 : 1;
2366 unsigned TOUTPS3 : 1;
2367 unsigned : 1;
2368 };
2369
2370 struct
2371 {
2372 unsigned T2CKPS : 2;
2373 unsigned : 6;
2374 };
2375
2376 struct
2377 {
2378 unsigned : 3;
2379 unsigned TOUTPS : 4;
2380 unsigned : 1;
2381 };
2382 } __T2CONbits_t;
2383
2384 extern __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
2385
2386 #define _T2CKPS0 0x01
2387 #define _T2CKPS1 0x02
2388 #define _TMR2ON 0x04
2389 #define _TOUTPS0 0x08
2390 #define _TOUTPS1 0x10
2391 #define _TOUTPS2 0x20
2392 #define _TOUTPS3 0x40
2393
2394 //==============================================================================
2395
2396 extern __at(0x0FCB) __sfr PR2;
2397 extern __at(0x0FCC) __sfr TMR2;
2398
2399 //==============================================================================
2400 // T1CON Bits
2401
2402 extern __at(0x0FCD) __sfr T1CON;
2403
2404 typedef union
2405 {
2406 struct
2407 {
2408 unsigned TMR1ON : 1;
2409 unsigned TMR1CS : 1;
2410 unsigned NOT_T1SYNC : 1;
2411 unsigned T1OSCEN : 1;
2412 unsigned T1CKPS0 : 1;
2413 unsigned T1CKPS1 : 1;
2414 unsigned T1RUN : 1;
2415 unsigned RD16 : 1;
2416 };
2417
2418 struct
2419 {
2420 unsigned : 1;
2421 unsigned : 1;
2422 unsigned T1SYNC : 1;
2423 unsigned : 1;
2424 unsigned : 1;
2425 unsigned : 1;
2426 unsigned : 1;
2427 unsigned : 1;
2428 };
2429
2430 struct
2431 {
2432 unsigned : 4;
2433 unsigned T1CKPS : 2;
2434 unsigned : 2;
2435 };
2436 } __T1CONbits_t;
2437
2438 extern __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
2439
2440 #define _TMR1ON 0x01
2441 #define _TMR1CS 0x02
2442 #define _NOT_T1SYNC 0x04
2443 #define _T1SYNC 0x04
2444 #define _T1OSCEN 0x08
2445 #define _T1CKPS0 0x10
2446 #define _T1CKPS1 0x20
2447 #define _T1RUN 0x40
2448 #define _RD16 0x80
2449
2450 //==============================================================================
2451
2452 extern __at(0x0FCE) __sfr TMR1;
2453 extern __at(0x0FCE) __sfr TMR1L;
2454 extern __at(0x0FCF) __sfr TMR1H;
2455
2456 //==============================================================================
2457 // RCON Bits
2458
2459 extern __at(0x0FD0) __sfr RCON;
2460
2461 typedef union
2462 {
2463 struct
2464 {
2465 unsigned NOT_BOR : 1;
2466 unsigned NOT_POR : 1;
2467 unsigned NOT_PD : 1;
2468 unsigned NOT_TO : 1;
2469 unsigned NOT_RI : 1;
2470 unsigned : 1;
2471 unsigned : 1;
2472 unsigned IPEN : 1;
2473 };
2474
2475 struct
2476 {
2477 unsigned BOR : 1;
2478 unsigned POR : 1;
2479 unsigned PD : 1;
2480 unsigned TO : 1;
2481 unsigned RI : 1;
2482 unsigned : 1;
2483 unsigned : 1;
2484 unsigned : 1;
2485 };
2486 } __RCONbits_t;
2487
2488 extern __at(0x0FD0) volatile __RCONbits_t RCONbits;
2489
2490 #define _NOT_BOR 0x01
2491 #define _BOR 0x01
2492 #define _NOT_POR 0x02
2493 #define _POR 0x02
2494 #define _NOT_PD 0x04
2495 #define _PD 0x04
2496 #define _NOT_TO 0x08
2497 #define _TO 0x08
2498 #define _NOT_RI 0x10
2499 #define _RI 0x10
2500 #define _IPEN 0x80
2501
2502 //==============================================================================
2503
2504
2505 //==============================================================================
2506 // WDTCON Bits
2507
2508 extern __at(0x0FD1) __sfr WDTCON;
2509
2510 typedef union
2511 {
2512 struct
2513 {
2514 unsigned SWDTEN : 1;
2515 unsigned : 1;
2516 unsigned : 1;
2517 unsigned : 1;
2518 unsigned : 1;
2519 unsigned : 1;
2520 unsigned : 1;
2521 unsigned : 1;
2522 };
2523
2524 struct
2525 {
2526 unsigned SWDTE : 1;
2527 unsigned : 1;
2528 unsigned : 1;
2529 unsigned : 1;
2530 unsigned : 1;
2531 unsigned : 1;
2532 unsigned : 1;
2533 unsigned : 1;
2534 };
2535 } __WDTCONbits_t;
2536
2537 extern __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
2538
2539 #define _SWDTEN 0x01
2540 #define _SWDTE 0x01
2541
2542 //==============================================================================
2543
2544
2545 //==============================================================================
2546 // LVDCON Bits
2547
2548 extern __at(0x0FD2) __sfr LVDCON;
2549
2550 typedef union
2551 {
2552 struct
2553 {
2554 unsigned LVDL0 : 1;
2555 unsigned LVDL1 : 1;
2556 unsigned LVDL2 : 1;
2557 unsigned LVDL3 : 1;
2558 unsigned LVDEN : 1;
2559 unsigned IRVST : 1;
2560 unsigned : 1;
2561 unsigned : 1;
2562 };
2563
2564 struct
2565 {
2566 unsigned : 1;
2567 unsigned : 1;
2568 unsigned : 1;
2569 unsigned : 1;
2570 unsigned : 1;
2571 unsigned IVRST : 1;
2572 unsigned : 1;
2573 unsigned : 1;
2574 };
2575
2576 struct
2577 {
2578 unsigned LVDL : 4;
2579 unsigned : 4;
2580 };
2581 } __LVDCONbits_t;
2582
2583 extern __at(0x0FD2) volatile __LVDCONbits_t LVDCONbits;
2584
2585 #define _LVDL0 0x01
2586 #define _LVDL1 0x02
2587 #define _LVDL2 0x04
2588 #define _LVDL3 0x08
2589 #define _LVDEN 0x10
2590 #define _IRVST 0x20
2591 #define _IVRST 0x20
2592
2593 //==============================================================================
2594
2595
2596 //==============================================================================
2597 // OSCCON Bits
2598
2599 extern __at(0x0FD3) __sfr OSCCON;
2600
2601 typedef union
2602 {
2603 struct
2604 {
2605 unsigned SCS0 : 1;
2606 unsigned SCS1 : 1;
2607 unsigned IOFS : 1;
2608 unsigned OSTS : 1;
2609 unsigned IRCF0 : 1;
2610 unsigned IRCF1 : 1;
2611 unsigned IRCF2 : 1;
2612 unsigned IDLEN : 1;
2613 };
2614
2615 struct
2616 {
2617 unsigned SCS : 1;
2618 unsigned : 1;
2619 unsigned FLTS : 1;
2620 unsigned : 1;
2621 unsigned : 1;
2622 unsigned : 1;
2623 unsigned : 1;
2624 unsigned : 1;
2625 };
2626
2627 struct
2628 {
2629 unsigned : 4;
2630 unsigned IRCF : 3;
2631 unsigned : 1;
2632 };
2633 } __OSCCONbits_t;
2634
2635 extern __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
2636
2637 #define _SCS0 0x01
2638 #define _SCS 0x01
2639 #define _SCS1 0x02
2640 #define _IOFS 0x04
2641 #define _FLTS 0x04
2642 #define _OSTS 0x08
2643 #define _IRCF0 0x10
2644 #define _IRCF1 0x20
2645 #define _IRCF2 0x40
2646 #define _IDLEN 0x80
2647
2648 //==============================================================================
2649
2650
2651 //==============================================================================
2652 // T0CON Bits
2653
2654 extern __at(0x0FD5) __sfr T0CON;
2655
2656 typedef union
2657 {
2658 struct
2659 {
2660 unsigned T0PS0 : 1;
2661 unsigned T0PS1 : 1;
2662 unsigned T0PS2 : 1;
2663 unsigned PSA : 1;
2664 unsigned T0SE : 1;
2665 unsigned T0CS : 1;
2666 unsigned T08BIT : 1;
2667 unsigned TMR0ON : 1;
2668 };
2669
2670 struct
2671 {
2672 unsigned : 1;
2673 unsigned : 1;
2674 unsigned : 1;
2675 unsigned T0PS3 : 1;
2676 unsigned : 1;
2677 unsigned : 1;
2678 unsigned T016BIT : 1;
2679 unsigned : 1;
2680 };
2681
2682 struct
2683 {
2684 unsigned T0PS : 4;
2685 unsigned : 4;
2686 };
2687 } __T0CONbits_t;
2688
2689 extern __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
2690
2691 #define _T0PS0 0x01
2692 #define _T0PS1 0x02
2693 #define _T0PS2 0x04
2694 #define _PSA 0x08
2695 #define _T0PS3 0x08
2696 #define _T0SE 0x10
2697 #define _T0CS 0x20
2698 #define _T08BIT 0x40
2699 #define _T016BIT 0x40
2700 #define _TMR0ON 0x80
2701
2702 //==============================================================================
2703
2704 extern __at(0x0FD6) __sfr TMR0;
2705 extern __at(0x0FD6) __sfr TMR0L;
2706 extern __at(0x0FD7) __sfr TMR0H;
2707
2708 //==============================================================================
2709 // STATUS Bits
2710
2711 extern __at(0x0FD8) __sfr STATUS;
2712
2713 typedef struct
2714 {
2715 unsigned C : 1;
2716 unsigned DC : 1;
2717 unsigned Z : 1;
2718 unsigned OV : 1;
2719 unsigned N : 1;
2720 unsigned : 1;
2721 unsigned : 1;
2722 unsigned : 1;
2723 } __STATUSbits_t;
2724
2725 extern __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
2726
2727 #define _C 0x01
2728 #define _DC 0x02
2729 #define _Z 0x04
2730 #define _OV 0x08
2731 #define _N 0x10
2732
2733 //==============================================================================
2734
2735 extern __at(0x0FD9) __sfr FSR2L;
2736 extern __at(0x0FDA) __sfr FSR2H;
2737 extern __at(0x0FDB) __sfr PLUSW2;
2738 extern __at(0x0FDC) __sfr PREINC2;
2739 extern __at(0x0FDD) __sfr POSTDEC2;
2740 extern __at(0x0FDE) __sfr POSTINC2;
2741 extern __at(0x0FDF) __sfr INDF2;
2742 extern __at(0x0FE0) __sfr BSR;
2743 extern __at(0x0FE1) __sfr FSR1L;
2744 extern __at(0x0FE2) __sfr FSR1H;
2745 extern __at(0x0FE3) __sfr PLUSW1;
2746 extern __at(0x0FE4) __sfr PREINC1;
2747 extern __at(0x0FE5) __sfr POSTDEC1;
2748 extern __at(0x0FE6) __sfr POSTINC1;
2749 extern __at(0x0FE7) __sfr INDF1;
2750 extern __at(0x0FE8) __sfr WREG;
2751 extern __at(0x0FE9) __sfr FSR0L;
2752 extern __at(0x0FEA) __sfr FSR0H;
2753 extern __at(0x0FEB) __sfr PLUSW0;
2754 extern __at(0x0FEC) __sfr PREINC0;
2755 extern __at(0x0FED) __sfr POSTDEC0;
2756 extern __at(0x0FEE) __sfr POSTINC0;
2757 extern __at(0x0FEF) __sfr INDF0;
2758
2759 //==============================================================================
2760 // INTCON3 Bits
2761
2762 extern __at(0x0FF0) __sfr INTCON3;
2763
2764 typedef union
2765 {
2766 struct
2767 {
2768 unsigned INT1IF : 1;
2769 unsigned INT2IF : 1;
2770 unsigned : 1;
2771 unsigned INT1IE : 1;
2772 unsigned INT2IE : 1;
2773 unsigned : 1;
2774 unsigned INT1IP : 1;
2775 unsigned INT2IP : 1;
2776 };
2777
2778 struct
2779 {
2780 unsigned INT1F : 1;
2781 unsigned INT2F : 1;
2782 unsigned : 1;
2783 unsigned INT1E : 1;
2784 unsigned INT2E : 1;
2785 unsigned : 1;
2786 unsigned INT1P : 1;
2787 unsigned INT2P : 1;
2788 };
2789 } __INTCON3bits_t;
2790
2791 extern __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
2792
2793 #define _INT1IF 0x01
2794 #define _INT1F 0x01
2795 #define _INT2IF 0x02
2796 #define _INT2F 0x02
2797 #define _INT1IE 0x08
2798 #define _INT1E 0x08
2799 #define _INT2IE 0x10
2800 #define _INT2E 0x10
2801 #define _INT1IP 0x40
2802 #define _INT1P 0x40
2803 #define _INT2IP 0x80
2804 #define _INT2P 0x80
2805
2806 //==============================================================================
2807
2808
2809 //==============================================================================
2810 // INTCON2 Bits
2811
2812 extern __at(0x0FF1) __sfr INTCON2;
2813
2814 typedef union
2815 {
2816 struct
2817 {
2818 unsigned RBIP : 1;
2819 unsigned : 1;
2820 unsigned TMR0IP : 1;
2821 unsigned : 1;
2822 unsigned INTEDG2 : 1;
2823 unsigned INTEDG1 : 1;
2824 unsigned INTEDG0 : 1;
2825 unsigned NOT_RBPU : 1;
2826 };
2827
2828 struct
2829 {
2830 unsigned : 1;
2831 unsigned : 1;
2832 unsigned T0IP : 1;
2833 unsigned : 1;
2834 unsigned : 1;
2835 unsigned : 1;
2836 unsigned : 1;
2837 unsigned RBPU : 1;
2838 };
2839 } __INTCON2bits_t;
2840
2841 extern __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
2842
2843 #define _RBIP 0x01
2844 #define _TMR0IP 0x04
2845 #define _T0IP 0x04
2846 #define _INTEDG2 0x10
2847 #define _INTEDG1 0x20
2848 #define _INTEDG0 0x40
2849 #define _NOT_RBPU 0x80
2850 #define _RBPU 0x80
2851
2852 //==============================================================================
2853
2854
2855 //==============================================================================
2856 // INTCON Bits
2857
2858 extern __at(0x0FF2) __sfr INTCON;
2859
2860 typedef union
2861 {
2862 struct
2863 {
2864 unsigned RBIF : 1;
2865 unsigned INT0IF : 1;
2866 unsigned TMR0IF : 1;
2867 unsigned RBIE : 1;
2868 unsigned INT0IE : 1;
2869 unsigned TMR0IE : 1;
2870 unsigned PEIE_GIEL : 1;
2871 unsigned GIE_GIEH : 1;
2872 };
2873
2874 struct
2875 {
2876 unsigned : 1;
2877 unsigned INT0F : 1;
2878 unsigned T0IF : 1;
2879 unsigned : 1;
2880 unsigned INT0E : 1;
2881 unsigned T0IE : 1;
2882 unsigned PEIE : 1;
2883 unsigned GIE : 1;
2884 };
2885
2886 struct
2887 {
2888 unsigned : 1;
2889 unsigned INTF : 1;
2890 unsigned : 1;
2891 unsigned : 1;
2892 unsigned INTE : 1;
2893 unsigned : 1;
2894 unsigned GIEL : 1;
2895 unsigned GIEH : 1;
2896 };
2897 } __INTCONbits_t;
2898
2899 extern __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
2900
2901 #define _RBIF 0x01
2902 #define _INT0IF 0x02
2903 #define _INT0F 0x02
2904 #define _INTF 0x02
2905 #define _TMR0IF 0x04
2906 #define _T0IF 0x04
2907 #define _RBIE 0x08
2908 #define _INT0IE 0x10
2909 #define _INT0E 0x10
2910 #define _INTE 0x10
2911 #define _TMR0IE 0x20
2912 #define _T0IE 0x20
2913 #define _PEIE_GIEL 0x40
2914 #define _PEIE 0x40
2915 #define _GIEL 0x40
2916 #define _GIE_GIEH 0x80
2917 #define _GIE 0x80
2918 #define _GIEH 0x80
2919
2920 //==============================================================================
2921
2922 extern __at(0x0FF3) __sfr PROD;
2923 extern __at(0x0FF3) __sfr PRODL;
2924 extern __at(0x0FF4) __sfr PRODH;
2925 extern __at(0x0FF5) __sfr TABLAT;
2926 extern __at(0x0FF6) __sfr TBLPTR;
2927 extern __at(0x0FF6) __sfr TBLPTRL;
2928 extern __at(0x0FF7) __sfr TBLPTRH;
2929 extern __at(0x0FF8) __sfr TBLPTRU;
2930 extern __at(0x0FF9) __sfr PC;
2931 extern __at(0x0FF9) __sfr PCL;
2932 extern __at(0x0FFA) __sfr PCLATH;
2933 extern __at(0x0FFB) __sfr PCLATU;
2934
2935 //==============================================================================
2936 // STKPTR Bits
2937
2938 extern __at(0x0FFC) __sfr STKPTR;
2939
2940 typedef union
2941 {
2942 struct
2943 {
2944 unsigned STKPTR0 : 1;
2945 unsigned STKPTR1 : 1;
2946 unsigned STKPTR2 : 1;
2947 unsigned STKPTR3 : 1;
2948 unsigned STKPTR4 : 1;
2949 unsigned : 1;
2950 unsigned STKUNF : 1;
2951 unsigned STKFUL : 1;
2952 };
2953
2954 struct
2955 {
2956 unsigned SP0 : 1;
2957 unsigned SP1 : 1;
2958 unsigned SP2 : 1;
2959 unsigned SP3 : 1;
2960 unsigned SP4 : 1;
2961 unsigned : 1;
2962 unsigned : 1;
2963 unsigned STKOVF : 1;
2964 };
2965
2966 struct
2967 {
2968 unsigned STKPTR : 5;
2969 unsigned : 3;
2970 };
2971
2972 struct
2973 {
2974 unsigned SP : 5;
2975 unsigned : 3;
2976 };
2977 } __STKPTRbits_t;
2978
2979 extern __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
2980
2981 #define _STKPTR0 0x01
2982 #define _SP0 0x01
2983 #define _STKPTR1 0x02
2984 #define _SP1 0x02
2985 #define _STKPTR2 0x04
2986 #define _SP2 0x04
2987 #define _STKPTR3 0x08
2988 #define _SP3 0x08
2989 #define _STKPTR4 0x10
2990 #define _SP4 0x10
2991 #define _STKUNF 0x40
2992 #define _STKFUL 0x80
2993 #define _STKOVF 0x80
2994
2995 //==============================================================================
2996
2997 extern __at(0x0FFD) __sfr TOS;
2998 extern __at(0x0FFD) __sfr TOSL;
2999 extern __at(0x0FFE) __sfr TOSH;
3000 extern __at(0x0FFF) __sfr TOSU;
3001
3002 //==============================================================================
3003 //
3004 // Configuration Bits
3005 //
3006 //==============================================================================
3007
3008 #define __CONFIG1H 0x300001
3009 #define __CONFIG2L 0x300002
3010 #define __CONFIG2H 0x300003
3011 #define __CONFIG3H 0x300005
3012 #define __CONFIG4L 0x300006
3013 #define __CONFIG5L 0x300008
3014 #define __CONFIG5H 0x300009
3015 #define __CONFIG6L 0x30000A
3016 #define __CONFIG6H 0x30000B
3017 #define __CONFIG7L 0x30000C
3018 #define __CONFIG7H 0x30000D
3019
3020 //----------------------------- CONFIG1H Options -------------------------------
3021
3022 #define _LP_OSC 0xF0 // LP Oscillator.
3023 #define _LP_OSC_1H 0xF0 // LP Oscillator.
3024 #define _XT_OSC 0xF1 // XT Oscillator.
3025 #define _XT_OSC_1H 0xF1 // XT Oscillator.
3026 #define _HS_OSC 0xF2 // HS Oscillator.
3027 #define _HS_OSC_1H 0xF2 // HS Oscillator.
3028 #define _EC_OSC 0xF4 // EC oscillator, CLKO function on RA6.
3029 #define _EC_OSC_1H 0xF4 // EC oscillator, CLKO function on RA6.
3030 #define _ECIOP_OSC 0xF5 // EC oscillator, port function on RA6.
3031 #define _ECIO_OSC_1H 0xF5 // EC oscillator, port function on RA6.
3032 #define _ECIOP_OSC_1H 0xF5 // EC oscillator, port function on RA6.
3033 #define _HSPLL_OSC 0xF6 // HS oscillator, PLL enabled (clock frequency = 4 x FOSC1).
3034 #define _HSPLL_OSC_1H 0xF6 // HS oscillator, PLL enabled (clock frequency = 4 x FOSC1).
3035 #define _RCIO_OSC 0xF7 // External RC oscillator, port function on RA6.
3036 #define _RCIO_OSC_1H 0xF7 // External RC oscillator, port function on RA6.
3037 #define _INTIO2_OSC 0xF8 // Internal RC oscillator, port function on RA6 and port function on RA7.
3038 #define _INTIO2_OSC_1H 0xF8 // Internal RC oscillator, port function on RA6 and port function on RA7.
3039 #define _INTIO1_OSC 0xF9 // Internal RC oscillator, CLKO function on RA6 and port function on RA7.
3040 #define _INTIO1_OSC_1H 0xF9 // Internal RC oscillator, CLKO function on RA6 and port function on RA7.
3041 #define _RC_OSC 0xFC // External RC oscillator, CLKO function on RA6.
3042 #define _RC_OSC_1H 0xFC // External RC oscillator, CLKO function on RA6.
3043 #define _FSCM_OFF_1H 0xBF // Fail-Safe Clock Monitor disabled.
3044 #define _FSCM_ON_1H 0xFF // Fail-Safe Clock Monitor enabled.
3045 #define _IESO_OFF_1H 0x7F // Internal/External Switchover mode disabled.
3046 #define _IESO_ON_1H 0xFF // Internal/External Switchover mode enabled.
3047
3048 //----------------------------- CONFIG2L Options -------------------------------
3049
3050 #define _PWRT_ON_2L 0xFE // PWRT enabled.
3051 #define _PWRT_OFF_2L 0xFF // PWRT disabled.
3052 #define _BOR_OFF_2L 0xFD // Brown-out Reset disabled.
3053 #define _BOR_ON_2L 0xFF // Brown-out Reset enabled.
3054 #define _BORV_45_2L 0xF3 // VBOR set to 4.5V.
3055 #define _BORV_42_2L 0xF7 // VBOR set to 4.2V.
3056 #define _BORV_27_2L 0xFB // VBOR set to 2.7V.
3057 #define _BORV_20_2L 0xFF // VBOR set to 2.0V.
3058
3059 //----------------------------- CONFIG2H Options -------------------------------
3060
3061 #define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit).
3062 #define _WDT_ON_2H 0xFF // WDT enabled.
3063 #define _WDTPS_1_2H 0xE1 // 1:1.
3064 #define _WDTPS_2_2H 0xE3 // 1:2.
3065 #define _WDTPS_4_2H 0xE5 // 1:4.
3066 #define _WDTPS_8_2H 0xE7 // 1:8.
3067 #define _WDTPS_16_2H 0xE9 // 1:16.
3068 #define _WDTPS_32_2H 0xEB // 1:32.
3069 #define _WDTPS_64_2H 0xED // 1:64.
3070 #define _WDTPS_128_2H 0xEF // 1:128.
3071 #define _WDTPS_256_2H 0xF1 // 1:256.
3072 #define _WDTPS_512_2H 0xF3 // 1:512.
3073 #define _1K 0xF5 // 1:1024.
3074 #define _WDTPS_1K_2H 0xF5 // 1:1024.
3075 #define _2K 0xF7 // 1:2048.
3076 #define _WDTPS_2K_2H 0xF7 // 1:2048.
3077 #define _4K 0xF9 // 1:4096.
3078 #define _WDTPS_4K_2H 0xF9 // 1:4096.
3079 #define _8K 0xFB // 1:8192.
3080 #define _WDTPS_8K_2H 0xFB // 1:8192.
3081 #define _16K 0xFD // 1:16384.
3082 #define _WDTPS_16K_2H 0xFD // 1:16384.
3083 #define _32K 0xFF // 1:32768.
3084 #define _WDTPS_32K_2H 0xFF // 1:32768.
3085
3086 //----------------------------- CONFIG3H Options -------------------------------
3087
3088 #define _CCP2MX_OFF 0xFE // CCP2 input/output is multiplexed with RB3.
3089 #define _CCP2MX_OFF_3H 0xFE // CCP2 input/output is multiplexed with RB3.
3090 #define _CCP2MX_B3 0xFE // CCP2 input/output is multiplexed with RB3.
3091 #define _CCP2MX_B3_3H 0xFE // CCP2 input/output is multiplexed with RB3.
3092 #define _CCP2MX_ON 0xFF // CCP2 input/output is multiplexed with RC1.
3093 #define _CCP2MX_ON_3H 0xFF // CCP2 input/output is multiplexed with RC1.
3094 #define _CCP2MX_C1 0xFF // CCP2 input/output is multiplexed with RC1.
3095 #define _CCP2MX_C1_3H 0xFF // CCP2 input/output is multiplexed with RC1.
3096 #define _PBAD_DIG_3H 0xFD // PORTB<4:0> pins are configured as digital I/O on Reset.
3097 #define _PBAD_ANA_3H 0xFF // PORTB<4:0> pins are configured as analog input channels on Reset.
3098 #define _MCLRE_OFF_3H 0x7F // MCLR disabled; RE3 input is enabled in 40-pin devices only (PIC18F4X20).
3099 #define _MCLRE_ON_3H 0xFF // MCLR pin enabled; RE3 input pin disabled.
3100
3101 //----------------------------- CONFIG4L Options -------------------------------
3102
3103 #define _STVR_OFF_4L 0xFE // Stack full/underflow will not cause Reset.
3104 #define _STVR_ON_4L 0xFF // Stack full/underflow will cause Reset.
3105 #define _LVP_OFF_4L 0xFB // Single-Supply ICSP disabled.
3106 #define _LVP_ON_4L 0xFF // Single-Supply ICSP enabled.
3107 #define _DEBUG_ON_4L 0x7F // Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug.
3108 #define _DEBUG_OFF_4L 0xFF // Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins.
3109
3110 //----------------------------- CONFIG5L Options -------------------------------
3111
3112 #define _CP0_ON_5L 0xFE // Block 0 (000200-0007FFh) code-protected.
3113 #define _CP0_OFF_5L 0xFF // Block 0 (000200-0007FFh) not code-protected.
3114 #define _CP1_ON_5L 0xFD // Block 1 (000800-000FFFh) code-protected.
3115 #define _CP1_OFF_5L 0xFF // Block 1 (000800-000FFFh) not code-protected.
3116 #define _CP2_ON_5L 0xFB // Block 2 (001000-0017FFh) code-protected.
3117 #define _CP2_OFF_5L 0xFF // Block 2 (001000-0017FFh) not code-protected.
3118 #define _CP3_ON_5L 0xF7 // Block 3 (001800-001FFFh) code-protected.
3119 #define _CP3_OFF_5L 0xFF // Block 3 (001800-001FFFh) not code-protected.
3120
3121 //----------------------------- CONFIG5H Options -------------------------------
3122
3123 #define _CPB_ON_5H 0xBF // Boot block (000000-0001FFh) is code-protected.
3124 #define _CPB_OFF_5H 0xFF // Boot block (000000-0001FFh) is not code-protected.
3125 #define _CPD_ON_5H 0x7F // Data EEPROM is code-protected.
3126 #define _CPD_OFF_5H 0xFF // Data EEPROM is not code-protected.
3127
3128 //----------------------------- CONFIG6L Options -------------------------------
3129
3130 #define _WRT0_ON_6L 0xFE // Block 0 (000200-0007FFh) write-protected.
3131 #define _WRT0_OFF_6L 0xFF // Block 0 (000200-0007FFh) not write-protected.
3132 #define _WRT1_ON_6L 0xFD // Block 1 (000800-000FFFh) write-protected.
3133 #define _WRT1_OFF_6L 0xFF // Block 1 (000800-000FFFh) not write-protected.
3134 #define _WRT2_ON_6L 0xFB // Block 2 (001000-0017FFh) write-protected.
3135 #define _WRT2_OFF_6L 0xFF // Block 2 (001000-0017FFh) not write-protected.
3136 #define _WRT3_ON_6L 0xF7 // Block 3 (001800-001FFFh) write-protected.
3137 #define _WRT3_OFF_6L 0xFF // Block 3 (001800-001FFFh) not write-protected.
3138
3139 //----------------------------- CONFIG6H Options -------------------------------
3140
3141 #define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) are write-protected.
3142 #define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) are not write-protected.
3143 #define _WRTB_ON_6H 0xBF // Boot block (000000-0001FFh) is write-protected.
3144 #define _WRTB_OFF_6H 0xFF // Boot block (000000-0001FFh) is not write-protected.
3145 #define _WRTD_ON_6H 0x7F // Data EEPROM is write-protected.
3146 #define _WRTD_OFF_6H 0xFF // Data EEPROM is not write-protected.
3147
3148 //----------------------------- CONFIG7L Options -------------------------------
3149
3150 #define _EBTR0_ON_7L 0xFE // Block 0 (000200-0007FFh) protected from table reads executed in other blocks.
3151 #define _EBTR0_OFF_7L 0xFF // Block 0 (000200-0007FFh) not protected from table reads executed in other blocks.
3152 #define _EBTR1_ON_7L 0xFD // Block 1 (000800-000FFFh) protected from table reads executed in other blocks.
3153 #define _EBTR1_OFF_7L 0xFF // Block 1 (000800-000FFFh) not protected from table reads executed in other blocks.
3154 #define _EBTR2_ON_7L 0xFB // Block 2 (001000-0017FFh) protected from table reads executed in other blocks.
3155 #define _EBTR2_OFF_7L 0xFF // Block 2 (001000-0017FFh) not protected from table reads executed in other blocks.
3156 #define _EBTR3_ON_7L 0xF7 // Block 3 (001800-001FFFh) protected from table reads executed in other blocks.
3157 #define _EBTR3_OFF_7L 0xFF // Block 3 (001800-001FFFh) not protected from table reads executed in other blocks.
3158
3159 //----------------------------- CONFIG7H Options -------------------------------
3160
3161 #define _EBTRB_ON_7H 0xBF // Boot block (000000-0001FFh) is protected from table reads executed in other blocks.
3162 #define _EBTRB_OFF_7H 0xFF // Boot block (000000-0001FFh) is not protected from table reads executed in other blocks.
3163
3164 //==============================================================================
3165
3166 #define __DEVID1 0x3FFFFE
3167 #define __DEVID2 0x3FFFFF
3168
3169 #define __IDLOC0 0x200000
3170 #define __IDLOC1 0x200001
3171 #define __IDLOC2 0x200002
3172 #define __IDLOC3 0x200003
3173 #define __IDLOC4 0x200004
3174 #define __IDLOC5 0x200005
3175 #define __IDLOC6 0x200006
3176 #define __IDLOC7 0x200007
3177
3178 #endif // #ifndef __PIC18F4320_H__
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