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Hackfix and re-enable strtoull and wcstoull, see bug #3798.
[sdcc.git] / sdcc / device / non-free / include / pic16 / pic18f8520.h
blob40f317aa9f9b504b4c536dadc4add21c0e2d23f8
1 /*
2 * This declarations of the PIC18F8520 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:51 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC18F8520_H__
26 #define __PIC18F8520_H__
27
28 //==============================================================================
29
30 //==============================================================================
31 //
32 // Register Definitions
33 //
34 //==============================================================================
35
36
37 //==============================================================================
38 // RCSTA2 Bits
39
40 extern __at(0x0F6B) __sfr RCSTA2;
41
42 typedef union
43 {
44 struct
45 {
46 unsigned RX9D : 1;
47 unsigned OERR : 1;
48 unsigned FERR : 1;
49 unsigned ADDEN : 1;
50 unsigned CREN : 1;
51 unsigned SREN : 1;
52 unsigned RX9 : 1;
53 unsigned SPEN : 1;
54 };
55
56 struct
57 {
58 unsigned RCD8 : 1;
59 unsigned OERR2 : 1;
60 unsigned FERR2 : 1;
61 unsigned ADEN : 1;
62 unsigned CREN2 : 1;
63 unsigned SREN2 : 1;
64 unsigned RC9 : 1;
65 unsigned SPEN2 : 1;
66 };
67
68 struct
69 {
70 unsigned RX9D2 : 1;
71 unsigned : 1;
72 unsigned : 1;
73 unsigned ADDEN2 : 1;
74 unsigned : 1;
75 unsigned : 1;
76 unsigned NOT_RC8 : 1;
77 unsigned : 1;
78 };
79
80 struct
81 {
82 unsigned : 1;
83 unsigned : 1;
84 unsigned : 1;
85 unsigned : 1;
86 unsigned : 1;
87 unsigned : 1;
88 unsigned RC8_9 : 1;
89 unsigned : 1;
90 };
91
92 struct
93 {
94 unsigned : 1;
95 unsigned : 1;
96 unsigned : 1;
97 unsigned : 1;
98 unsigned : 1;
99 unsigned : 1;
100 unsigned RX92 : 1;
101 unsigned : 1;
102 };
103 } __RCSTA2bits_t;
104
105 extern __at(0x0F6B) volatile __RCSTA2bits_t RCSTA2bits;
106
107 #define _RCSTA2_RX9D 0x01
108 #define _RCSTA2_RCD8 0x01
109 #define _RCSTA2_RX9D2 0x01
110 #define _RCSTA2_OERR 0x02
111 #define _RCSTA2_OERR2 0x02
112 #define _RCSTA2_FERR 0x04
113 #define _RCSTA2_FERR2 0x04
114 #define _RCSTA2_ADDEN 0x08
115 #define _RCSTA2_ADEN 0x08
116 #define _RCSTA2_ADDEN2 0x08
117 #define _RCSTA2_CREN 0x10
118 #define _RCSTA2_CREN2 0x10
119 #define _RCSTA2_SREN 0x20
120 #define _RCSTA2_SREN2 0x20
121 #define _RCSTA2_RX9 0x40
122 #define _RCSTA2_RC9 0x40
123 #define _RCSTA2_NOT_RC8 0x40
124 #define _RCSTA2_RC8_9 0x40
125 #define _RCSTA2_RX92 0x40
126 #define _RCSTA2_SPEN 0x80
127 #define _RCSTA2_SPEN2 0x80
128
129 //==============================================================================
130
131
132 //==============================================================================
133 // TXSTA2 Bits
134
135 extern __at(0x0F6C) __sfr TXSTA2;
136
137 typedef union
138 {
139 struct
140 {
141 unsigned TX9D : 1;
142 unsigned TRMT : 1;
143 unsigned BRGH : 1;
144 unsigned SENDB2 : 1;
145 unsigned SYNC : 1;
146 unsigned TXEN : 1;
147 unsigned TX9 : 1;
148 unsigned CSRC : 1;
149 };
150
151 struct
152 {
153 unsigned TXD8 : 1;
154 unsigned TRMT2 : 1;
155 unsigned BRGH2 : 1;
156 unsigned : 1;
157 unsigned SYNC2 : 1;
158 unsigned TXEN2 : 1;
159 unsigned TX8_9 : 1;
160 unsigned CSRC2 : 1;
161 };
162
163 struct
164 {
165 unsigned TX9D2 : 1;
166 unsigned : 1;
167 unsigned : 1;
168 unsigned : 1;
169 unsigned : 1;
170 unsigned : 1;
171 unsigned NOT_TX8 : 1;
172 unsigned : 1;
173 };
174
175 struct
176 {
177 unsigned : 1;
178 unsigned : 1;
179 unsigned : 1;
180 unsigned : 1;
181 unsigned : 1;
182 unsigned : 1;
183 unsigned TX92 : 1;
184 unsigned : 1;
185 };
186 } __TXSTA2bits_t;
187
188 extern __at(0x0F6C) volatile __TXSTA2bits_t TXSTA2bits;
189
190 #define _TXSTA2_TX9D 0x01
191 #define _TXSTA2_TXD8 0x01
192 #define _TXSTA2_TX9D2 0x01
193 #define _TXSTA2_TRMT 0x02
194 #define _TXSTA2_TRMT2 0x02
195 #define _TXSTA2_BRGH 0x04
196 #define _TXSTA2_BRGH2 0x04
197 #define _TXSTA2_SENDB2 0x08
198 #define _TXSTA2_SYNC 0x10
199 #define _TXSTA2_SYNC2 0x10
200 #define _TXSTA2_TXEN 0x20
201 #define _TXSTA2_TXEN2 0x20
202 #define _TXSTA2_TX9 0x40
203 #define _TXSTA2_TX8_9 0x40
204 #define _TXSTA2_NOT_TX8 0x40
205 #define _TXSTA2_TX92 0x40
206 #define _TXSTA2_CSRC 0x80
207 #define _TXSTA2_CSRC2 0x80
208
209 //==============================================================================
210
211 extern __at(0x0F6D) __sfr TXREG2;
212 extern __at(0x0F6E) __sfr RCREG2;
213 extern __at(0x0F6F) __sfr SPBRG2;
214
215 //==============================================================================
216 // CCP5CON Bits
217
218 extern __at(0x0F70) __sfr CCP5CON;
219
220 typedef union
221 {
222 struct
223 {
224 unsigned CCP5M0 : 1;
225 unsigned CCP5M1 : 1;
226 unsigned CCP5M2 : 1;
227 unsigned CCP5M3 : 1;
228 unsigned DC5B0 : 1;
229 unsigned DC5B1 : 1;
230 unsigned : 1;
231 unsigned : 1;
232 };
233
234 struct
235 {
236 unsigned : 1;
237 unsigned : 1;
238 unsigned : 1;
239 unsigned : 1;
240 unsigned DCCP5Y : 1;
241 unsigned DCCP5X : 1;
242 unsigned : 1;
243 unsigned : 1;
244 };
245
246 struct
247 {
248 unsigned CCP5M : 4;
249 unsigned : 4;
250 };
251
252 struct
253 {
254 unsigned : 4;
255 unsigned DC5B : 2;
256 unsigned : 2;
257 };
258 } __CCP5CONbits_t;
259
260 extern __at(0x0F70) volatile __CCP5CONbits_t CCP5CONbits;
261
262 #define _CCP5M0 0x01
263 #define _CCP5M1 0x02
264 #define _CCP5M2 0x04
265 #define _CCP5M3 0x08
266 #define _DC5B0 0x10
267 #define _DCCP5Y 0x10
268 #define _DC5B1 0x20
269 #define _DCCP5X 0x20
270
271 //==============================================================================
272
273 extern __at(0x0F71) __sfr CCPR5;
274 extern __at(0x0F71) __sfr CCPR5L;
275 extern __at(0x0F72) __sfr CCPR5H;
276
277 //==============================================================================
278 // CCP4CON Bits
279
280 extern __at(0x0F73) __sfr CCP4CON;
281
282 typedef union
283 {
284 struct
285 {
286 unsigned CCP4M0 : 1;
287 unsigned CCP4M1 : 1;
288 unsigned CCP4M2 : 1;
289 unsigned CCP4M3 : 1;
290 unsigned DC4B0 : 1;
291 unsigned DC4B1 : 1;
292 unsigned : 1;
293 unsigned : 1;
294 };
295
296 struct
297 {
298 unsigned : 1;
299 unsigned : 1;
300 unsigned : 1;
301 unsigned : 1;
302 unsigned DCCP4Y : 1;
303 unsigned DCCP4X : 1;
304 unsigned : 1;
305 unsigned : 1;
306 };
307
308 struct
309 {
310 unsigned CCP4M : 4;
311 unsigned : 4;
312 };
313
314 struct
315 {
316 unsigned : 4;
317 unsigned DC4B : 2;
318 unsigned : 2;
319 };
320 } __CCP4CONbits_t;
321
322 extern __at(0x0F73) volatile __CCP4CONbits_t CCP4CONbits;
323
324 #define _CCP4M0 0x01
325 #define _CCP4M1 0x02
326 #define _CCP4M2 0x04
327 #define _CCP4M3 0x08
328 #define _DC4B0 0x10
329 #define _DCCP4Y 0x10
330 #define _DC4B1 0x20
331 #define _DCCP4X 0x20
332
333 //==============================================================================
334
335 extern __at(0x0F74) __sfr CCPR4;
336 extern __at(0x0F74) __sfr CCPR4L;
337 extern __at(0x0F75) __sfr CCPR4H;
338
339 //==============================================================================
340 // T4CON Bits
341
342 extern __at(0x0F76) __sfr T4CON;
343
344 typedef union
345 {
346 struct
347 {
348 unsigned T4CKPS0 : 1;
349 unsigned T4CKPS1 : 1;
350 unsigned TMR4ON : 1;
351 unsigned T4OUTPS0 : 1;
352 unsigned T4OUTPS1 : 1;
353 unsigned T4OUTPS2 : 1;
354 unsigned T4OUTPS3 : 1;
355 unsigned : 1;
356 };
357
358 struct
359 {
360 unsigned T4CKPS : 2;
361 unsigned : 6;
362 };
363
364 struct
365 {
366 unsigned : 3;
367 unsigned T4OUTPS : 4;
368 unsigned : 1;
369 };
370 } __T4CONbits_t;
371
372 extern __at(0x0F76) volatile __T4CONbits_t T4CONbits;
373
374 #define _T4CKPS0 0x01
375 #define _T4CKPS1 0x02
376 #define _TMR4ON 0x04
377 #define _T4OUTPS0 0x08
378 #define _T4OUTPS1 0x10
379 #define _T4OUTPS2 0x20
380 #define _T4OUTPS3 0x40
381
382 //==============================================================================
383
384 extern __at(0x0F77) __sfr PR4;
385 extern __at(0x0F78) __sfr TMR4;
386
387 //==============================================================================
388 // PORTA Bits
389
390 extern __at(0x0F80) __sfr PORTA;
391
392 typedef union
393 {
394 struct
395 {
396 unsigned RA0 : 1;
397 unsigned RA1 : 1;
398 unsigned RA2 : 1;
399 unsigned RA3 : 1;
400 unsigned RA4 : 1;
401 unsigned RA5 : 1;
402 unsigned RA6 : 1;
403 unsigned : 1;
404 };
405
406 struct
407 {
408 unsigned AN0 : 1;
409 unsigned AN1 : 1;
410 unsigned AN2 : 1;
411 unsigned AN3 : 1;
412 unsigned T0CKI : 1;
413 unsigned AN4 : 1;
414 unsigned OSC2 : 1;
415 unsigned : 1;
416 };
417
418 struct
419 {
420 unsigned : 1;
421 unsigned : 1;
422 unsigned VREFM : 1;
423 unsigned VREFP : 1;
424 unsigned : 1;
425 unsigned LVDIN : 1;
426 unsigned CLKO : 1;
427 unsigned : 1;
428 };
429
430 struct
431 {
432 unsigned RA : 7;
433 unsigned : 1;
434 };
435 } __PORTAbits_t;
436
437 extern __at(0x0F80) volatile __PORTAbits_t PORTAbits;
438
439 #define _PORTA_RA0 0x01
440 #define _PORTA_AN0 0x01
441 #define _PORTA_RA1 0x02
442 #define _PORTA_AN1 0x02
443 #define _PORTA_RA2 0x04
444 #define _PORTA_AN2 0x04
445 #define _PORTA_VREFM 0x04
446 #define _PORTA_RA3 0x08
447 #define _PORTA_AN3 0x08
448 #define _PORTA_VREFP 0x08
449 #define _PORTA_RA4 0x10
450 #define _PORTA_T0CKI 0x10
451 #define _PORTA_RA5 0x20
452 #define _PORTA_AN4 0x20
453 #define _PORTA_LVDIN 0x20
454 #define _PORTA_RA6 0x40
455 #define _PORTA_OSC2 0x40
456 #define _PORTA_CLKO 0x40
457
458 //==============================================================================
459
460
461 //==============================================================================
462 // PORTB Bits
463
464 extern __at(0x0F81) __sfr PORTB;
465
466 typedef union
467 {
468 struct
469 {
470 unsigned RB0 : 1;
471 unsigned RB1 : 1;
472 unsigned RB2 : 1;
473 unsigned RB3 : 1;
474 unsigned RB4 : 1;
475 unsigned RB5 : 1;
476 unsigned RB6 : 1;
477 unsigned RB7 : 1;
478 };
479
480 struct
481 {
482 unsigned INT0 : 1;
483 unsigned INT1 : 1;
484 unsigned INT2 : 1;
485 unsigned INT3 : 1;
486 unsigned KBI0 : 1;
487 unsigned KBI1 : 1;
488 unsigned KBI2 : 1;
489 unsigned KBI3 : 1;
490 };
491
492 struct
493 {
494 unsigned : 1;
495 unsigned : 1;
496 unsigned : 1;
497 unsigned CCP2 : 1;
498 unsigned : 1;
499 unsigned PGM : 1;
500 unsigned PGC : 1;
501 unsigned PGD : 1;
502 };
503
504 struct
505 {
506 unsigned : 1;
507 unsigned : 1;
508 unsigned : 1;
509 unsigned CCP2A : 1;
510 unsigned : 1;
511 unsigned : 1;
512 unsigned : 1;
513 unsigned : 1;
514 };
515
516 struct
517 {
518 unsigned INT : 4;
519 unsigned : 4;
520 };
521
522 struct
523 {
524 unsigned : 4;
525 unsigned KBI : 4;
526 };
527 } __PORTBbits_t;
528
529 extern __at(0x0F81) volatile __PORTBbits_t PORTBbits;
530
531 #define _PORTB_RB0 0x01
532 #define _PORTB_INT0 0x01
533 #define _PORTB_RB1 0x02
534 #define _PORTB_INT1 0x02
535 #define _PORTB_RB2 0x04
536 #define _PORTB_INT2 0x04
537 #define _PORTB_RB3 0x08
538 #define _PORTB_INT3 0x08
539 #define _PORTB_CCP2 0x08
540 #define _PORTB_CCP2A 0x08
541 #define _PORTB_RB4 0x10
542 #define _PORTB_KBI0 0x10
543 #define _PORTB_RB5 0x20
544 #define _PORTB_KBI1 0x20
545 #define _PORTB_PGM 0x20
546 #define _PORTB_RB6 0x40
547 #define _PORTB_KBI2 0x40
548 #define _PORTB_PGC 0x40
549 #define _PORTB_RB7 0x80
550 #define _PORTB_KBI3 0x80
551 #define _PORTB_PGD 0x80
552
553 //==============================================================================
554
555
556 //==============================================================================
557 // PORTC Bits
558
559 extern __at(0x0F82) __sfr PORTC;
560
561 typedef union
562 {
563 struct
564 {
565 unsigned RC0 : 1;
566 unsigned RC1 : 1;
567 unsigned RC2 : 1;
568 unsigned RC3 : 1;
569 unsigned RC4 : 1;
570 unsigned RC5 : 1;
571 unsigned RC6 : 1;
572 unsigned RC7 : 1;
573 };
574
575 struct
576 {
577 unsigned T1OSO : 1;
578 unsigned T1OSI : 1;
579 unsigned CCP1 : 1;
580 unsigned SCK : 1;
581 unsigned SDI : 1;
582 unsigned SDO : 1;
583 unsigned TX : 1;
584 unsigned RX : 1;
585 };
586
587 struct
588 {
589 unsigned T13CKI : 1;
590 unsigned CCP2 : 1;
591 unsigned : 1;
592 unsigned SCL : 1;
593 unsigned SDA : 1;
594 unsigned : 1;
595 unsigned CK : 1;
596 unsigned : 1;
597 };
598
599 struct
600 {
601 unsigned : 1;
602 unsigned CCP2A : 1;
603 unsigned : 1;
604 unsigned : 1;
605 unsigned : 1;
606 unsigned : 1;
607 unsigned : 1;
608 unsigned : 1;
609 };
610 } __PORTCbits_t;
611
612 extern __at(0x0F82) volatile __PORTCbits_t PORTCbits;
613
614 #define _PORTC_RC0 0x01
615 #define _PORTC_T1OSO 0x01
616 #define _PORTC_T13CKI 0x01
617 #define _PORTC_RC1 0x02
618 #define _PORTC_T1OSI 0x02
619 #define _PORTC_CCP2 0x02
620 #define _PORTC_CCP2A 0x02
621 #define _PORTC_RC2 0x04
622 #define _PORTC_CCP1 0x04
623 #define _PORTC_RC3 0x08
624 #define _PORTC_SCK 0x08
625 #define _PORTC_SCL 0x08
626 #define _PORTC_RC4 0x10
627 #define _PORTC_SDI 0x10
628 #define _PORTC_SDA 0x10
629 #define _PORTC_RC5 0x20
630 #define _PORTC_SDO 0x20
631 #define _PORTC_RC6 0x40
632 #define _PORTC_TX 0x40
633 #define _PORTC_CK 0x40
634 #define _PORTC_RC7 0x80
635 #define _PORTC_RX 0x80
636
637 //==============================================================================
638
639
640 //==============================================================================
641 // PORTD Bits
642
643 extern __at(0x0F83) __sfr PORTD;
644
645 typedef union
646 {
647 struct
648 {
649 unsigned RD0 : 1;
650 unsigned RD1 : 1;
651 unsigned RD2 : 1;
652 unsigned RD3 : 1;
653 unsigned RD4 : 1;
654 unsigned RD5 : 1;
655 unsigned RD6 : 1;
656 unsigned RD7 : 1;
657 };
658
659 struct
660 {
661 unsigned PSP0 : 1;
662 unsigned PSP1 : 1;
663 unsigned PSP2 : 1;
664 unsigned PSP3 : 1;
665 unsigned PSP4 : 1;
666 unsigned PSP5 : 1;
667 unsigned PSP6 : 1;
668 unsigned PSP7 : 1;
669 };
670
671 struct
672 {
673 unsigned AD0 : 1;
674 unsigned AD1 : 1;
675 unsigned AD2 : 1;
676 unsigned AD3 : 1;
677 unsigned AD4 : 1;
678 unsigned AD5 : 1;
679 unsigned AD6 : 1;
680 unsigned AD7 : 1;
681 };
682
683 struct
684 {
685 unsigned AD00 : 1;
686 unsigned AD01 : 1;
687 unsigned AD02 : 1;
688 unsigned AD03 : 1;
689 unsigned AD04 : 1;
690 unsigned AD05 : 1;
691 unsigned AD06 : 1;
692 unsigned AD07 : 1;
693 };
694 } __PORTDbits_t;
695
696 extern __at(0x0F83) volatile __PORTDbits_t PORTDbits;
697
698 #define _PORTD_RD0 0x01
699 #define _PORTD_PSP0 0x01
700 #define _PORTD_AD0 0x01
701 #define _PORTD_AD00 0x01
702 #define _PORTD_RD1 0x02
703 #define _PORTD_PSP1 0x02
704 #define _PORTD_AD1 0x02
705 #define _PORTD_AD01 0x02
706 #define _PORTD_RD2 0x04
707 #define _PORTD_PSP2 0x04
708 #define _PORTD_AD2 0x04
709 #define _PORTD_AD02 0x04
710 #define _PORTD_RD3 0x08
711 #define _PORTD_PSP3 0x08
712 #define _PORTD_AD3 0x08
713 #define _PORTD_AD03 0x08
714 #define _PORTD_RD4 0x10
715 #define _PORTD_PSP4 0x10
716 #define _PORTD_AD4 0x10
717 #define _PORTD_AD04 0x10
718 #define _PORTD_RD5 0x20
719 #define _PORTD_PSP5 0x20
720 #define _PORTD_AD5 0x20
721 #define _PORTD_AD05 0x20
722 #define _PORTD_RD6 0x40
723 #define _PORTD_PSP6 0x40
724 #define _PORTD_AD6 0x40
725 #define _PORTD_AD06 0x40
726 #define _PORTD_RD7 0x80
727 #define _PORTD_PSP7 0x80
728 #define _PORTD_AD7 0x80
729 #define _PORTD_AD07 0x80
730
731 //==============================================================================
732
733
734 //==============================================================================
735 // PORTE Bits
736
737 extern __at(0x0F84) __sfr PORTE;
738
739 typedef union
740 {
741 struct
742 {
743 unsigned RE0 : 1;
744 unsigned RE1 : 1;
745 unsigned RE2 : 1;
746 unsigned RE3 : 1;
747 unsigned RE4 : 1;
748 unsigned RE5 : 1;
749 unsigned RE6 : 1;
750 unsigned RE7 : 1;
751 };
752
753 struct
754 {
755 unsigned RD : 1;
756 unsigned WR : 1;
757 unsigned CS : 1;
758 unsigned AD11 : 1;
759 unsigned AD12 : 1;
760 unsigned AD13 : 1;
761 unsigned AD14 : 1;
762 unsigned CCP2 : 1;
763 };
764
765 struct
766 {
767 unsigned AD8 : 1;
768 unsigned AD9 : 1;
769 unsigned AD10 : 1;
770 unsigned : 1;
771 unsigned : 1;
772 unsigned : 1;
773 unsigned : 1;
774 unsigned AD15 : 1;
775 };
776
777 struct
778 {
779 unsigned AD08 : 1;
780 unsigned AD09 : 1;
781 unsigned : 1;
782 unsigned : 1;
783 unsigned : 1;
784 unsigned : 1;
785 unsigned : 1;
786 unsigned CCP2C : 1;
787 };
788 } __PORTEbits_t;
789
790 extern __at(0x0F84) volatile __PORTEbits_t PORTEbits;
791
792 #define _PORTE_RE0 0x01
793 #define _PORTE_RD 0x01
794 #define _PORTE_AD8 0x01
795 #define _PORTE_AD08 0x01
796 #define _PORTE_RE1 0x02
797 #define _PORTE_WR 0x02
798 #define _PORTE_AD9 0x02
799 #define _PORTE_AD09 0x02
800 #define _PORTE_RE2 0x04
801 #define _PORTE_CS 0x04
802 #define _PORTE_AD10 0x04
803 #define _PORTE_RE3 0x08
804 #define _PORTE_AD11 0x08
805 #define _PORTE_RE4 0x10
806 #define _PORTE_AD12 0x10
807 #define _PORTE_RE5 0x20
808 #define _PORTE_AD13 0x20
809 #define _PORTE_RE6 0x40
810 #define _PORTE_AD14 0x40
811 #define _PORTE_RE7 0x80
812 #define _PORTE_CCP2 0x80
813 #define _PORTE_AD15 0x80
814 #define _PORTE_CCP2C 0x80
815
816 //==============================================================================
817
818
819 //==============================================================================
820 // PORTF Bits
821
822 extern __at(0x0F85) __sfr PORTF;
823
824 typedef union
825 {
826 struct
827 {
828 unsigned RF0 : 1;
829 unsigned RF1 : 1;
830 unsigned RF2 : 1;
831 unsigned RF3 : 1;
832 unsigned RF4 : 1;
833 unsigned RF5 : 1;
834 unsigned RF6 : 1;
835 unsigned RF7 : 1;
836 };
837
838 struct
839 {
840 unsigned AN5 : 1;
841 unsigned AN6 : 1;
842 unsigned AN7 : 1;
843 unsigned AN8 : 1;
844 unsigned AN9 : 1;
845 unsigned AN10 : 1;
846 unsigned AN11 : 1;
847 unsigned SS : 1;
848 };
849
850 struct
851 {
852 unsigned : 1;
853 unsigned C2OUT : 1;
854 unsigned C1OUT : 1;
855 unsigned : 1;
856 unsigned : 1;
857 unsigned CVREF : 1;
858 unsigned : 1;
859 unsigned : 1;
860 };
861 } __PORTFbits_t;
862
863 extern __at(0x0F85) volatile __PORTFbits_t PORTFbits;
864
865 #define _PORTF_RF0 0x01
866 #define _PORTF_AN5 0x01
867 #define _PORTF_RF1 0x02
868 #define _PORTF_AN6 0x02
869 #define _PORTF_C2OUT 0x02
870 #define _PORTF_RF2 0x04
871 #define _PORTF_AN7 0x04
872 #define _PORTF_C1OUT 0x04
873 #define _PORTF_RF3 0x08
874 #define _PORTF_AN8 0x08
875 #define _PORTF_RF4 0x10
876 #define _PORTF_AN9 0x10
877 #define _PORTF_RF5 0x20
878 #define _PORTF_AN10 0x20
879 #define _PORTF_CVREF 0x20
880 #define _PORTF_RF6 0x40
881 #define _PORTF_AN11 0x40
882 #define _PORTF_RF7 0x80
883 #define _PORTF_SS 0x80
884
885 //==============================================================================
886
887
888 //==============================================================================
889 // PORTG Bits
890
891 extern __at(0x0F86) __sfr PORTG;
892
893 typedef union
894 {
895 struct
896 {
897 unsigned RG0 : 1;
898 unsigned RG1 : 1;
899 unsigned RG2 : 1;
900 unsigned RG3 : 1;
901 unsigned RG4 : 1;
902 unsigned : 1;
903 unsigned : 1;
904 unsigned : 1;
905 };
906
907 struct
908 {
909 unsigned CCP3 : 1;
910 unsigned TX2 : 1;
911 unsigned RX2 : 1;
912 unsigned CCP4 : 1;
913 unsigned CCP5 : 1;
914 unsigned : 1;
915 unsigned : 1;
916 unsigned : 1;
917 };
918
919 struct
920 {
921 unsigned : 1;
922 unsigned CK2 : 1;
923 unsigned DT2 : 1;
924 unsigned : 1;
925 unsigned : 1;
926 unsigned : 1;
927 unsigned : 1;
928 unsigned : 1;
929 };
930
931 struct
932 {
933 unsigned RG : 5;
934 unsigned : 3;
935 };
936 } __PORTGbits_t;
937
938 extern __at(0x0F86) volatile __PORTGbits_t PORTGbits;
939
940 #define _PORTG_RG0 0x01
941 #define _PORTG_CCP3 0x01
942 #define _PORTG_RG1 0x02
943 #define _PORTG_TX2 0x02
944 #define _PORTG_CK2 0x02
945 #define _PORTG_RG2 0x04
946 #define _PORTG_RX2 0x04
947 #define _PORTG_DT2 0x04
948 #define _PORTG_RG3 0x08
949 #define _PORTG_CCP4 0x08
950 #define _PORTG_RG4 0x10
951 #define _PORTG_CCP5 0x10
952
953 //==============================================================================
954
955
956 //==============================================================================
957 // PORTH Bits
958
959 extern __at(0x0F87) __sfr PORTH;
960
961 typedef union
962 {
963 struct
964 {
965 unsigned RH0 : 1;
966 unsigned RH1 : 1;
967 unsigned RH2 : 1;
968 unsigned RH3 : 1;
969 unsigned RH4 : 1;
970 unsigned RH5 : 1;
971 unsigned RH6 : 1;
972 unsigned RH7 : 1;
973 };
974
975 struct
976 {
977 unsigned A16 : 1;
978 unsigned A17 : 1;
979 unsigned A18 : 1;
980 unsigned A19 : 1;
981 unsigned AN12 : 1;
982 unsigned AN13 : 1;
983 unsigned AN14 : 1;
984 unsigned AN15 : 1;
985 };
986
987 struct
988 {
989 unsigned AD16 : 1;
990 unsigned AD17 : 1;
991 unsigned AD18 : 1;
992 unsigned AD19 : 1;
993 unsigned : 1;
994 unsigned : 1;
995 unsigned : 1;
996 unsigned : 1;
997 };
998 } __PORTHbits_t;
999
1000 extern __at(0x0F87) volatile __PORTHbits_t PORTHbits;
1001
1002 #define _PORTH_RH0 0x01
1003 #define _PORTH_A16 0x01
1004 #define _PORTH_AD16 0x01
1005 #define _PORTH_RH1 0x02
1006 #define _PORTH_A17 0x02
1007 #define _PORTH_AD17 0x02
1008 #define _PORTH_RH2 0x04
1009 #define _PORTH_A18 0x04
1010 #define _PORTH_AD18 0x04
1011 #define _PORTH_RH3 0x08
1012 #define _PORTH_A19 0x08
1013 #define _PORTH_AD19 0x08
1014 #define _PORTH_RH4 0x10
1015 #define _PORTH_AN12 0x10
1016 #define _PORTH_RH5 0x20
1017 #define _PORTH_AN13 0x20
1018 #define _PORTH_RH6 0x40
1019 #define _PORTH_AN14 0x40
1020 #define _PORTH_RH7 0x80
1021 #define _PORTH_AN15 0x80
1022
1023 //==============================================================================
1024
1025
1026 //==============================================================================
1027 // PORTJ Bits
1028
1029 extern __at(0x0F88) __sfr PORTJ;
1030
1031 typedef union
1032 {
1033 struct
1034 {
1035 unsigned RJ0 : 1;
1036 unsigned RJ1 : 1;
1037 unsigned RJ2 : 1;
1038 unsigned RJ3 : 1;
1039 unsigned RJ4 : 1;
1040 unsigned RJ5 : 1;
1041 unsigned RJ6 : 1;
1042 unsigned RJ7 : 1;
1043 };
1044
1045 struct
1046 {
1047 unsigned ALE : 1;
1048 unsigned OE : 1;
1049 unsigned WRL : 1;
1050 unsigned WRH : 1;
1051 unsigned BA0 : 1;
1052 unsigned CE : 1;
1053 unsigned LB : 1;
1054 unsigned UB : 1;
1055 };
1056 } __PORTJbits_t;
1057
1058 extern __at(0x0F88) volatile __PORTJbits_t PORTJbits;
1059
1060 #define _PORTJ_RJ0 0x01
1061 #define _PORTJ_ALE 0x01
1062 #define _PORTJ_RJ1 0x02
1063 #define _PORTJ_OE 0x02
1064 #define _PORTJ_RJ2 0x04
1065 #define _PORTJ_WRL 0x04
1066 #define _PORTJ_RJ3 0x08
1067 #define _PORTJ_WRH 0x08
1068 #define _PORTJ_RJ4 0x10
1069 #define _PORTJ_BA0 0x10
1070 #define _PORTJ_RJ5 0x20
1071 #define _PORTJ_CE 0x20
1072 #define _PORTJ_RJ6 0x40
1073 #define _PORTJ_LB 0x40
1074 #define _PORTJ_RJ7 0x80
1075 #define _PORTJ_UB 0x80
1076
1077 //==============================================================================
1078
1079
1080 //==============================================================================
1081 // LATA Bits
1082
1083 extern __at(0x0F89) __sfr LATA;
1084
1085 typedef union
1086 {
1087 struct
1088 {
1089 unsigned LATA0 : 1;
1090 unsigned LATA1 : 1;
1091 unsigned LATA2 : 1;
1092 unsigned LATA3 : 1;
1093 unsigned LATA4 : 1;
1094 unsigned LATA5 : 1;
1095 unsigned LATA6 : 1;
1096 unsigned : 1;
1097 };
1098
1099 struct
1100 {
1101 unsigned LATA : 7;
1102 unsigned : 1;
1103 };
1104 } __LATAbits_t;
1105
1106 extern __at(0x0F89) volatile __LATAbits_t LATAbits;
1107
1108 #define _LATA0 0x01
1109 #define _LATA1 0x02
1110 #define _LATA2 0x04
1111 #define _LATA3 0x08
1112 #define _LATA4 0x10
1113 #define _LATA5 0x20
1114 #define _LATA6 0x40
1115
1116 //==============================================================================
1117
1118
1119 //==============================================================================
1120 // LATB Bits
1121
1122 extern __at(0x0F8A) __sfr LATB;
1123
1124 typedef struct
1125 {
1126 unsigned LATB0 : 1;
1127 unsigned LATB1 : 1;
1128 unsigned LATB2 : 1;
1129 unsigned LATB3 : 1;
1130 unsigned LATB4 : 1;
1131 unsigned LATB5 : 1;
1132 unsigned LATB6 : 1;
1133 unsigned LATB7 : 1;
1134 } __LATBbits_t;
1135
1136 extern __at(0x0F8A) volatile __LATBbits_t LATBbits;
1137
1138 #define _LATB0 0x01
1139 #define _LATB1 0x02
1140 #define _LATB2 0x04
1141 #define _LATB3 0x08
1142 #define _LATB4 0x10
1143 #define _LATB5 0x20
1144 #define _LATB6 0x40
1145 #define _LATB7 0x80
1146
1147 //==============================================================================
1148
1149
1150 //==============================================================================
1151 // LATC Bits
1152
1153 extern __at(0x0F8B) __sfr LATC;
1154
1155 typedef struct
1156 {
1157 unsigned LATC0 : 1;
1158 unsigned LATC1 : 1;
1159 unsigned LATC2 : 1;
1160 unsigned LATC3 : 1;
1161 unsigned LATC4 : 1;
1162 unsigned LATC5 : 1;
1163 unsigned LATC6 : 1;
1164 unsigned LATC7 : 1;
1165 } __LATCbits_t;
1166
1167 extern __at(0x0F8B) volatile __LATCbits_t LATCbits;
1168
1169 #define _LATC0 0x01
1170 #define _LATC1 0x02
1171 #define _LATC2 0x04
1172 #define _LATC3 0x08
1173 #define _LATC4 0x10
1174 #define _LATC5 0x20
1175 #define _LATC6 0x40
1176 #define _LATC7 0x80
1177
1178 //==============================================================================
1179
1180
1181 //==============================================================================
1182 // LATD Bits
1183
1184 extern __at(0x0F8C) __sfr LATD;
1185
1186 typedef struct
1187 {
1188 unsigned LATD0 : 1;
1189 unsigned LATD1 : 1;
1190 unsigned LATD2 : 1;
1191 unsigned LATD3 : 1;
1192 unsigned LATD4 : 1;
1193 unsigned LATD5 : 1;
1194 unsigned LATD6 : 1;
1195 unsigned LATD7 : 1;
1196 } __LATDbits_t;
1197
1198 extern __at(0x0F8C) volatile __LATDbits_t LATDbits;
1199
1200 #define _LATD0 0x01
1201 #define _LATD1 0x02
1202 #define _LATD2 0x04
1203 #define _LATD3 0x08
1204 #define _LATD4 0x10
1205 #define _LATD5 0x20
1206 #define _LATD6 0x40
1207 #define _LATD7 0x80
1208
1209 //==============================================================================
1210
1211
1212 //==============================================================================
1213 // LATE Bits
1214
1215 extern __at(0x0F8D) __sfr LATE;
1216
1217 typedef struct
1218 {
1219 unsigned LATE0 : 1;
1220 unsigned LATE1 : 1;
1221 unsigned LATE2 : 1;
1222 unsigned LATE3 : 1;
1223 unsigned LATE4 : 1;
1224 unsigned LATE5 : 1;
1225 unsigned LATE6 : 1;
1226 unsigned LATE7 : 1;
1227 } __LATEbits_t;
1228
1229 extern __at(0x0F8D) volatile __LATEbits_t LATEbits;
1230
1231 #define _LATE0 0x01
1232 #define _LATE1 0x02
1233 #define _LATE2 0x04
1234 #define _LATE3 0x08
1235 #define _LATE4 0x10
1236 #define _LATE5 0x20
1237 #define _LATE6 0x40
1238 #define _LATE7 0x80
1239
1240 //==============================================================================
1241
1242
1243 //==============================================================================
1244 // LATF Bits
1245
1246 extern __at(0x0F8E) __sfr LATF;
1247
1248 typedef struct
1249 {
1250 unsigned LATF0 : 1;
1251 unsigned LATF1 : 1;
1252 unsigned LATF2 : 1;
1253 unsigned LATF3 : 1;
1254 unsigned LATF4 : 1;
1255 unsigned LATF5 : 1;
1256 unsigned LATF6 : 1;
1257 unsigned LATF7 : 1;
1258 } __LATFbits_t;
1259
1260 extern __at(0x0F8E) volatile __LATFbits_t LATFbits;
1261
1262 #define _LATF0 0x01
1263 #define _LATF1 0x02
1264 #define _LATF2 0x04
1265 #define _LATF3 0x08
1266 #define _LATF4 0x10
1267 #define _LATF5 0x20
1268 #define _LATF6 0x40
1269 #define _LATF7 0x80
1270
1271 //==============================================================================
1272
1273
1274 //==============================================================================
1275 // LATG Bits
1276
1277 extern __at(0x0F8F) __sfr LATG;
1278
1279 typedef union
1280 {
1281 struct
1282 {
1283 unsigned LATG0 : 1;
1284 unsigned LATG1 : 1;
1285 unsigned LATG2 : 1;
1286 unsigned LATG3 : 1;
1287 unsigned LATG4 : 1;
1288 unsigned : 1;
1289 unsigned : 1;
1290 unsigned : 1;
1291 };
1292
1293 struct
1294 {
1295 unsigned LATG : 5;
1296 unsigned : 3;
1297 };
1298 } __LATGbits_t;
1299
1300 extern __at(0x0F8F) volatile __LATGbits_t LATGbits;
1301
1302 #define _LATG0 0x01
1303 #define _LATG1 0x02
1304 #define _LATG2 0x04
1305 #define _LATG3 0x08
1306 #define _LATG4 0x10
1307
1308 //==============================================================================
1309
1310
1311 //==============================================================================
1312 // LATH Bits
1313
1314 extern __at(0x0F90) __sfr LATH;
1315
1316 typedef struct
1317 {
1318 unsigned LATH0 : 1;
1319 unsigned LATH1 : 1;
1320 unsigned LATH2 : 1;
1321 unsigned LATH3 : 1;
1322 unsigned LATH4 : 1;
1323 unsigned LATH5 : 1;
1324 unsigned LATH6 : 1;
1325 unsigned LATH7 : 1;
1326 } __LATHbits_t;
1327
1328 extern __at(0x0F90) volatile __LATHbits_t LATHbits;
1329
1330 #define _LATH0 0x01
1331 #define _LATH1 0x02
1332 #define _LATH2 0x04
1333 #define _LATH3 0x08
1334 #define _LATH4 0x10
1335 #define _LATH5 0x20
1336 #define _LATH6 0x40
1337 #define _LATH7 0x80
1338
1339 //==============================================================================
1340
1341
1342 //==============================================================================
1343 // LATJ Bits
1344
1345 extern __at(0x0F91) __sfr LATJ;
1346
1347 typedef struct
1348 {
1349 unsigned LATJ0 : 1;
1350 unsigned LATJ1 : 1;
1351 unsigned LATJ2 : 1;
1352 unsigned LATJ3 : 1;
1353 unsigned LATJ4 : 1;
1354 unsigned LATJ5 : 1;
1355 unsigned LATJ6 : 1;
1356 unsigned LATJ7 : 1;
1357 } __LATJbits_t;
1358
1359 extern __at(0x0F91) volatile __LATJbits_t LATJbits;
1360
1361 #define _LATJ0 0x01
1362 #define _LATJ1 0x02
1363 #define _LATJ2 0x04
1364 #define _LATJ3 0x08
1365 #define _LATJ4 0x10
1366 #define _LATJ5 0x20
1367 #define _LATJ6 0x40
1368 #define _LATJ7 0x80
1369
1370 //==============================================================================
1371
1372
1373 //==============================================================================
1374 // DDRA Bits
1375
1376 extern __at(0x0F92) __sfr DDRA;
1377
1378 typedef union
1379 {
1380 struct
1381 {
1382 unsigned TRISA0 : 1;
1383 unsigned TRISA1 : 1;
1384 unsigned TRISA2 : 1;
1385 unsigned TRISA3 : 1;
1386 unsigned TRISA4 : 1;
1387 unsigned TRISA5 : 1;
1388 unsigned TRISA6 : 1;
1389 unsigned : 1;
1390 };
1391
1392 struct
1393 {
1394 unsigned RA0 : 1;
1395 unsigned RA1 : 1;
1396 unsigned RA2 : 1;
1397 unsigned RA3 : 1;
1398 unsigned RA4 : 1;
1399 unsigned RA5 : 1;
1400 unsigned RA6 : 1;
1401 unsigned : 1;
1402 };
1403
1404 struct
1405 {
1406 unsigned TRISA : 7;
1407 unsigned : 1;
1408 };
1409
1410 struct
1411 {
1412 unsigned RA : 7;
1413 unsigned : 1;
1414 };
1415 } __DDRAbits_t;
1416
1417 extern __at(0x0F92) volatile __DDRAbits_t DDRAbits;
1418
1419 #define _TRISA0 0x01
1420 #define _RA0 0x01
1421 #define _TRISA1 0x02
1422 #define _RA1 0x02
1423 #define _TRISA2 0x04
1424 #define _RA2 0x04
1425 #define _TRISA3 0x08
1426 #define _RA3 0x08
1427 #define _TRISA4 0x10
1428 #define _RA4 0x10
1429 #define _TRISA5 0x20
1430 #define _RA5 0x20
1431 #define _TRISA6 0x40
1432 #define _RA6 0x40
1433
1434 //==============================================================================
1435
1436
1437 //==============================================================================
1438 // TRISA Bits
1439
1440 extern __at(0x0F92) __sfr TRISA;
1441
1442 typedef union
1443 {
1444 struct
1445 {
1446 unsigned TRISA0 : 1;
1447 unsigned TRISA1 : 1;
1448 unsigned TRISA2 : 1;
1449 unsigned TRISA3 : 1;
1450 unsigned TRISA4 : 1;
1451 unsigned TRISA5 : 1;
1452 unsigned TRISA6 : 1;
1453 unsigned : 1;
1454 };
1455
1456 struct
1457 {
1458 unsigned RA0 : 1;
1459 unsigned RA1 : 1;
1460 unsigned RA2 : 1;
1461 unsigned RA3 : 1;
1462 unsigned RA4 : 1;
1463 unsigned RA5 : 1;
1464 unsigned RA6 : 1;
1465 unsigned : 1;
1466 };
1467
1468 struct
1469 {
1470 unsigned RA : 7;
1471 unsigned : 1;
1472 };
1473
1474 struct
1475 {
1476 unsigned TRISA : 7;
1477 unsigned : 1;
1478 };
1479 } __TRISAbits_t;
1480
1481 extern __at(0x0F92) volatile __TRISAbits_t TRISAbits;
1482
1483 #define _TRISA_TRISA0 0x01
1484 #define _TRISA_RA0 0x01
1485 #define _TRISA_TRISA1 0x02
1486 #define _TRISA_RA1 0x02
1487 #define _TRISA_TRISA2 0x04
1488 #define _TRISA_RA2 0x04
1489 #define _TRISA_TRISA3 0x08
1490 #define _TRISA_RA3 0x08
1491 #define _TRISA_TRISA4 0x10
1492 #define _TRISA_RA4 0x10
1493 #define _TRISA_TRISA5 0x20
1494 #define _TRISA_RA5 0x20
1495 #define _TRISA_TRISA6 0x40
1496 #define _TRISA_RA6 0x40
1497
1498 //==============================================================================
1499
1500
1501 //==============================================================================
1502 // DDRB Bits
1503
1504 extern __at(0x0F93) __sfr DDRB;
1505
1506 typedef union
1507 {
1508 struct
1509 {
1510 unsigned TRISB0 : 1;
1511 unsigned TRISB1 : 1;
1512 unsigned TRISB2 : 1;
1513 unsigned TRISB3 : 1;
1514 unsigned TRISB4 : 1;
1515 unsigned TRISB5 : 1;
1516 unsigned TRISB6 : 1;
1517 unsigned TRISB7 : 1;
1518 };
1519
1520 struct
1521 {
1522 unsigned RB0 : 1;
1523 unsigned RB1 : 1;
1524 unsigned RB2 : 1;
1525 unsigned RB3 : 1;
1526 unsigned RB4 : 1;
1527 unsigned RB5 : 1;
1528 unsigned RB6 : 1;
1529 unsigned RB7 : 1;
1530 };
1531 } __DDRBbits_t;
1532
1533 extern __at(0x0F93) volatile __DDRBbits_t DDRBbits;
1534
1535 #define _TRISB0 0x01
1536 #define _RB0 0x01
1537 #define _TRISB1 0x02
1538 #define _RB1 0x02
1539 #define _TRISB2 0x04
1540 #define _RB2 0x04
1541 #define _TRISB3 0x08
1542 #define _RB3 0x08
1543 #define _TRISB4 0x10
1544 #define _RB4 0x10
1545 #define _TRISB5 0x20
1546 #define _RB5 0x20
1547 #define _TRISB6 0x40
1548 #define _RB6 0x40
1549 #define _TRISB7 0x80
1550 #define _RB7 0x80
1551
1552 //==============================================================================
1553
1554
1555 //==============================================================================
1556 // TRISB Bits
1557
1558 extern __at(0x0F93) __sfr TRISB;
1559
1560 typedef union
1561 {
1562 struct
1563 {
1564 unsigned TRISB0 : 1;
1565 unsigned TRISB1 : 1;
1566 unsigned TRISB2 : 1;
1567 unsigned TRISB3 : 1;
1568 unsigned TRISB4 : 1;
1569 unsigned TRISB5 : 1;
1570 unsigned TRISB6 : 1;
1571 unsigned TRISB7 : 1;
1572 };
1573
1574 struct
1575 {
1576 unsigned RB0 : 1;
1577 unsigned RB1 : 1;
1578 unsigned RB2 : 1;
1579 unsigned RB3 : 1;
1580 unsigned RB4 : 1;
1581 unsigned RB5 : 1;
1582 unsigned RB6 : 1;
1583 unsigned RB7 : 1;
1584 };
1585 } __TRISBbits_t;
1586
1587 extern __at(0x0F93) volatile __TRISBbits_t TRISBbits;
1588
1589 #define _TRISB_TRISB0 0x01
1590 #define _TRISB_RB0 0x01
1591 #define _TRISB_TRISB1 0x02
1592 #define _TRISB_RB1 0x02
1593 #define _TRISB_TRISB2 0x04
1594 #define _TRISB_RB2 0x04
1595 #define _TRISB_TRISB3 0x08
1596 #define _TRISB_RB3 0x08
1597 #define _TRISB_TRISB4 0x10
1598 #define _TRISB_RB4 0x10
1599 #define _TRISB_TRISB5 0x20
1600 #define _TRISB_RB5 0x20
1601 #define _TRISB_TRISB6 0x40
1602 #define _TRISB_RB6 0x40
1603 #define _TRISB_TRISB7 0x80
1604 #define _TRISB_RB7 0x80
1605
1606 //==============================================================================
1607
1608
1609 //==============================================================================
1610 // DDRC Bits
1611
1612 extern __at(0x0F94) __sfr DDRC;
1613
1614 typedef union
1615 {
1616 struct
1617 {
1618 unsigned TRISC0 : 1;
1619 unsigned TRISC1 : 1;
1620 unsigned TRISC2 : 1;
1621 unsigned TRISC3 : 1;
1622 unsigned TRISC4 : 1;
1623 unsigned TRISC5 : 1;
1624 unsigned TRISC6 : 1;
1625 unsigned TRISC7 : 1;
1626 };
1627
1628 struct
1629 {
1630 unsigned RC0 : 1;
1631 unsigned RC1 : 1;
1632 unsigned RC2 : 1;
1633 unsigned RC3 : 1;
1634 unsigned RC4 : 1;
1635 unsigned RC5 : 1;
1636 unsigned RC6 : 1;
1637 unsigned RC7 : 1;
1638 };
1639 } __DDRCbits_t;
1640
1641 extern __at(0x0F94) volatile __DDRCbits_t DDRCbits;
1642
1643 #define _TRISC0 0x01
1644 #define _RC0 0x01
1645 #define _TRISC1 0x02
1646 #define _RC1 0x02
1647 #define _TRISC2 0x04
1648 #define _RC2 0x04
1649 #define _TRISC3 0x08
1650 #define _RC3 0x08
1651 #define _TRISC4 0x10
1652 #define _RC4 0x10
1653 #define _TRISC5 0x20
1654 #define _RC5 0x20
1655 #define _TRISC6 0x40
1656 #define _RC6 0x40
1657 #define _TRISC7 0x80
1658 #define _RC7 0x80
1659
1660 //==============================================================================
1661
1662
1663 //==============================================================================
1664 // TRISC Bits
1665
1666 extern __at(0x0F94) __sfr TRISC;
1667
1668 typedef union
1669 {
1670 struct
1671 {
1672 unsigned TRISC0 : 1;
1673 unsigned TRISC1 : 1;
1674 unsigned TRISC2 : 1;
1675 unsigned TRISC3 : 1;
1676 unsigned TRISC4 : 1;
1677 unsigned TRISC5 : 1;
1678 unsigned TRISC6 : 1;
1679 unsigned TRISC7 : 1;
1680 };
1681
1682 struct
1683 {
1684 unsigned RC0 : 1;
1685 unsigned RC1 : 1;
1686 unsigned RC2 : 1;
1687 unsigned RC3 : 1;
1688 unsigned RC4 : 1;
1689 unsigned RC5 : 1;
1690 unsigned RC6 : 1;
1691 unsigned RC7 : 1;
1692 };
1693 } __TRISCbits_t;
1694
1695 extern __at(0x0F94) volatile __TRISCbits_t TRISCbits;
1696
1697 #define _TRISC_TRISC0 0x01
1698 #define _TRISC_RC0 0x01
1699 #define _TRISC_TRISC1 0x02
1700 #define _TRISC_RC1 0x02
1701 #define _TRISC_TRISC2 0x04
1702 #define _TRISC_RC2 0x04
1703 #define _TRISC_TRISC3 0x08
1704 #define _TRISC_RC3 0x08
1705 #define _TRISC_TRISC4 0x10
1706 #define _TRISC_RC4 0x10
1707 #define _TRISC_TRISC5 0x20
1708 #define _TRISC_RC5 0x20
1709 #define _TRISC_TRISC6 0x40
1710 #define _TRISC_RC6 0x40
1711 #define _TRISC_TRISC7 0x80
1712 #define _TRISC_RC7 0x80
1713
1714 //==============================================================================
1715
1716
1717 //==============================================================================
1718 // DDRD Bits
1719
1720 extern __at(0x0F95) __sfr DDRD;
1721
1722 typedef union
1723 {
1724 struct
1725 {
1726 unsigned TRISD0 : 1;
1727 unsigned TRISD1 : 1;
1728 unsigned TRISD2 : 1;
1729 unsigned TRISD3 : 1;
1730 unsigned TRISD4 : 1;
1731 unsigned TRISD5 : 1;
1732 unsigned TRISD6 : 1;
1733 unsigned TRISD7 : 1;
1734 };
1735
1736 struct
1737 {
1738 unsigned RD0 : 1;
1739 unsigned RD1 : 1;
1740 unsigned RD2 : 1;
1741 unsigned RD3 : 1;
1742 unsigned RD4 : 1;
1743 unsigned RD5 : 1;
1744 unsigned RD6 : 1;
1745 unsigned RD7 : 1;
1746 };
1747 } __DDRDbits_t;
1748
1749 extern __at(0x0F95) volatile __DDRDbits_t DDRDbits;
1750
1751 #define _TRISD0 0x01
1752 #define _RD0 0x01
1753 #define _TRISD1 0x02
1754 #define _RD1 0x02
1755 #define _TRISD2 0x04
1756 #define _RD2 0x04
1757 #define _TRISD3 0x08
1758 #define _RD3 0x08
1759 #define _TRISD4 0x10
1760 #define _RD4 0x10
1761 #define _TRISD5 0x20
1762 #define _RD5 0x20
1763 #define _TRISD6 0x40
1764 #define _RD6 0x40
1765 #define _TRISD7 0x80
1766 #define _RD7 0x80
1767
1768 //==============================================================================
1769
1770
1771 //==============================================================================
1772 // TRISD Bits
1773
1774 extern __at(0x0F95) __sfr TRISD;
1775
1776 typedef union
1777 {
1778 struct
1779 {
1780 unsigned TRISD0 : 1;
1781 unsigned TRISD1 : 1;
1782 unsigned TRISD2 : 1;
1783 unsigned TRISD3 : 1;
1784 unsigned TRISD4 : 1;
1785 unsigned TRISD5 : 1;
1786 unsigned TRISD6 : 1;
1787 unsigned TRISD7 : 1;
1788 };
1789
1790 struct
1791 {
1792 unsigned RD0 : 1;
1793 unsigned RD1 : 1;
1794 unsigned RD2 : 1;
1795 unsigned RD3 : 1;
1796 unsigned RD4 : 1;
1797 unsigned RD5 : 1;
1798 unsigned RD6 : 1;
1799 unsigned RD7 : 1;
1800 };
1801 } __TRISDbits_t;
1802
1803 extern __at(0x0F95) volatile __TRISDbits_t TRISDbits;
1804
1805 #define _TRISD_TRISD0 0x01
1806 #define _TRISD_RD0 0x01
1807 #define _TRISD_TRISD1 0x02
1808 #define _TRISD_RD1 0x02
1809 #define _TRISD_TRISD2 0x04
1810 #define _TRISD_RD2 0x04
1811 #define _TRISD_TRISD3 0x08
1812 #define _TRISD_RD3 0x08
1813 #define _TRISD_TRISD4 0x10
1814 #define _TRISD_RD4 0x10
1815 #define _TRISD_TRISD5 0x20
1816 #define _TRISD_RD5 0x20
1817 #define _TRISD_TRISD6 0x40
1818 #define _TRISD_RD6 0x40
1819 #define _TRISD_TRISD7 0x80
1820 #define _TRISD_RD7 0x80
1821
1822 //==============================================================================
1823
1824
1825 //==============================================================================
1826 // DDRE Bits
1827
1828 extern __at(0x0F96) __sfr DDRE;
1829
1830 typedef union
1831 {
1832 struct
1833 {
1834 unsigned TRISE0 : 1;
1835 unsigned TRISE1 : 1;
1836 unsigned TRISE2 : 1;
1837 unsigned TRISE3 : 1;
1838 unsigned TRISE4 : 1;
1839 unsigned TRISE5 : 1;
1840 unsigned TRISE6 : 1;
1841 unsigned TRISE7 : 1;
1842 };
1843
1844 struct
1845 {
1846 unsigned RE0 : 1;
1847 unsigned RE1 : 1;
1848 unsigned RE2 : 1;
1849 unsigned RE3 : 1;
1850 unsigned RE4 : 1;
1851 unsigned RE5 : 1;
1852 unsigned RE6 : 1;
1853 unsigned RE7 : 1;
1854 };
1855 } __DDREbits_t;
1856
1857 extern __at(0x0F96) volatile __DDREbits_t DDREbits;
1858
1859 #define _TRISE0 0x01
1860 #define _RE0 0x01
1861 #define _TRISE1 0x02
1862 #define _RE1 0x02
1863 #define _TRISE2 0x04
1864 #define _RE2 0x04
1865 #define _TRISE3 0x08
1866 #define _RE3 0x08
1867 #define _TRISE4 0x10
1868 #define _RE4 0x10
1869 #define _TRISE5 0x20
1870 #define _RE5 0x20
1871 #define _TRISE6 0x40
1872 #define _RE6 0x40
1873 #define _TRISE7 0x80
1874 #define _RE7 0x80
1875
1876 //==============================================================================
1877
1878
1879 //==============================================================================
1880 // TRISE Bits
1881
1882 extern __at(0x0F96) __sfr TRISE;
1883
1884 typedef union
1885 {
1886 struct
1887 {
1888 unsigned TRISE0 : 1;
1889 unsigned TRISE1 : 1;
1890 unsigned TRISE2 : 1;
1891 unsigned TRISE3 : 1;
1892 unsigned TRISE4 : 1;
1893 unsigned TRISE5 : 1;
1894 unsigned TRISE6 : 1;
1895 unsigned TRISE7 : 1;
1896 };
1897
1898 struct
1899 {
1900 unsigned RE0 : 1;
1901 unsigned RE1 : 1;
1902 unsigned RE2 : 1;
1903 unsigned RE3 : 1;
1904 unsigned RE4 : 1;
1905 unsigned RE5 : 1;
1906 unsigned RE6 : 1;
1907 unsigned RE7 : 1;
1908 };
1909 } __TRISEbits_t;
1910
1911 extern __at(0x0F96) volatile __TRISEbits_t TRISEbits;
1912
1913 #define _TRISE_TRISE0 0x01
1914 #define _TRISE_RE0 0x01
1915 #define _TRISE_TRISE1 0x02
1916 #define _TRISE_RE1 0x02
1917 #define _TRISE_TRISE2 0x04
1918 #define _TRISE_RE2 0x04
1919 #define _TRISE_TRISE3 0x08
1920 #define _TRISE_RE3 0x08
1921 #define _TRISE_TRISE4 0x10
1922 #define _TRISE_RE4 0x10
1923 #define _TRISE_TRISE5 0x20
1924 #define _TRISE_RE5 0x20
1925 #define _TRISE_TRISE6 0x40
1926 #define _TRISE_RE6 0x40
1927 #define _TRISE_TRISE7 0x80
1928 #define _TRISE_RE7 0x80
1929
1930 //==============================================================================
1931
1932
1933 //==============================================================================
1934 // DDRF Bits
1935
1936 extern __at(0x0F97) __sfr DDRF;
1937
1938 typedef union
1939 {
1940 struct
1941 {
1942 unsigned TRISF0 : 1;
1943 unsigned TRISF1 : 1;
1944 unsigned TRISF2 : 1;
1945 unsigned TRISF3 : 1;
1946 unsigned TRISF4 : 1;
1947 unsigned TRISF5 : 1;
1948 unsigned TRISF6 : 1;
1949 unsigned TRISF7 : 1;
1950 };
1951
1952 struct
1953 {
1954 unsigned RF0 : 1;
1955 unsigned RF1 : 1;
1956 unsigned RF2 : 1;
1957 unsigned RF3 : 1;
1958 unsigned RF4 : 1;
1959 unsigned RF5 : 1;
1960 unsigned RF6 : 1;
1961 unsigned RF7 : 1;
1962 };
1963 } __DDRFbits_t;
1964
1965 extern __at(0x0F97) volatile __DDRFbits_t DDRFbits;
1966
1967 #define _TRISF0 0x01
1968 #define _RF0 0x01
1969 #define _TRISF1 0x02
1970 #define _RF1 0x02
1971 #define _TRISF2 0x04
1972 #define _RF2 0x04
1973 #define _TRISF3 0x08
1974 #define _RF3 0x08
1975 #define _TRISF4 0x10
1976 #define _RF4 0x10
1977 #define _TRISF5 0x20
1978 #define _RF5 0x20
1979 #define _TRISF6 0x40
1980 #define _RF6 0x40
1981 #define _TRISF7 0x80
1982 #define _RF7 0x80
1983
1984 //==============================================================================
1985
1986
1987 //==============================================================================
1988 // TRISF Bits
1989
1990 extern __at(0x0F97) __sfr TRISF;
1991
1992 typedef union
1993 {
1994 struct
1995 {
1996 unsigned TRISF0 : 1;
1997 unsigned TRISF1 : 1;
1998 unsigned TRISF2 : 1;
1999 unsigned TRISF3 : 1;
2000 unsigned TRISF4 : 1;
2001 unsigned TRISF5 : 1;
2002 unsigned TRISF6 : 1;
2003 unsigned TRISF7 : 1;
2004 };
2005
2006 struct
2007 {
2008 unsigned RF0 : 1;
2009 unsigned RF1 : 1;
2010 unsigned RF2 : 1;
2011 unsigned RF3 : 1;
2012 unsigned RF4 : 1;
2013 unsigned RF5 : 1;
2014 unsigned RF6 : 1;
2015 unsigned RF7 : 1;
2016 };
2017 } __TRISFbits_t;
2018
2019 extern __at(0x0F97) volatile __TRISFbits_t TRISFbits;
2020
2021 #define _TRISF_TRISF0 0x01
2022 #define _TRISF_RF0 0x01
2023 #define _TRISF_TRISF1 0x02
2024 #define _TRISF_RF1 0x02
2025 #define _TRISF_TRISF2 0x04
2026 #define _TRISF_RF2 0x04
2027 #define _TRISF_TRISF3 0x08
2028 #define _TRISF_RF3 0x08
2029 #define _TRISF_TRISF4 0x10
2030 #define _TRISF_RF4 0x10
2031 #define _TRISF_TRISF5 0x20
2032 #define _TRISF_RF5 0x20
2033 #define _TRISF_TRISF6 0x40
2034 #define _TRISF_RF6 0x40
2035 #define _TRISF_TRISF7 0x80
2036 #define _TRISF_RF7 0x80
2037
2038 //==============================================================================
2039
2040
2041 //==============================================================================
2042 // DDRG Bits
2043
2044 extern __at(0x0F98) __sfr DDRG;
2045
2046 typedef union
2047 {
2048 struct
2049 {
2050 unsigned TRISG0 : 1;
2051 unsigned TRISG1 : 1;
2052 unsigned TRISG2 : 1;
2053 unsigned TRISG3 : 1;
2054 unsigned TRISG4 : 1;
2055 unsigned : 1;
2056 unsigned : 1;
2057 unsigned : 1;
2058 };
2059
2060 struct
2061 {
2062 unsigned RG0 : 1;
2063 unsigned RG1 : 1;
2064 unsigned RG2 : 1;
2065 unsigned RG3 : 1;
2066 unsigned RG4 : 1;
2067 unsigned : 1;
2068 unsigned : 1;
2069 unsigned : 1;
2070 };
2071
2072 struct
2073 {
2074 unsigned RG : 5;
2075 unsigned : 3;
2076 };
2077
2078 struct
2079 {
2080 unsigned TRISG : 5;
2081 unsigned : 3;
2082 };
2083 } __DDRGbits_t;
2084
2085 extern __at(0x0F98) volatile __DDRGbits_t DDRGbits;
2086
2087 #define _TRISG0 0x01
2088 #define _RG0 0x01
2089 #define _TRISG1 0x02
2090 #define _RG1 0x02
2091 #define _TRISG2 0x04
2092 #define _RG2 0x04
2093 #define _TRISG3 0x08
2094 #define _RG3 0x08
2095 #define _TRISG4 0x10
2096 #define _RG4 0x10
2097
2098 //==============================================================================
2099
2100
2101 //==============================================================================
2102 // TRISG Bits
2103
2104 extern __at(0x0F98) __sfr TRISG;
2105
2106 typedef union
2107 {
2108 struct
2109 {
2110 unsigned TRISG0 : 1;
2111 unsigned TRISG1 : 1;
2112 unsigned TRISG2 : 1;
2113 unsigned TRISG3 : 1;
2114 unsigned TRISG4 : 1;
2115 unsigned : 1;
2116 unsigned : 1;
2117 unsigned : 1;
2118 };
2119
2120 struct
2121 {
2122 unsigned RG0 : 1;
2123 unsigned RG1 : 1;
2124 unsigned RG2 : 1;
2125 unsigned RG3 : 1;
2126 unsigned RG4 : 1;
2127 unsigned : 1;
2128 unsigned : 1;
2129 unsigned : 1;
2130 };
2131
2132 struct
2133 {
2134 unsigned TRISG : 5;
2135 unsigned : 3;
2136 };
2137
2138 struct
2139 {
2140 unsigned RG : 5;
2141 unsigned : 3;
2142 };
2143 } __TRISGbits_t;
2144
2145 extern __at(0x0F98) volatile __TRISGbits_t TRISGbits;
2146
2147 #define _TRISG_TRISG0 0x01
2148 #define _TRISG_RG0 0x01
2149 #define _TRISG_TRISG1 0x02
2150 #define _TRISG_RG1 0x02
2151 #define _TRISG_TRISG2 0x04
2152 #define _TRISG_RG2 0x04
2153 #define _TRISG_TRISG3 0x08
2154 #define _TRISG_RG3 0x08
2155 #define _TRISG_TRISG4 0x10
2156 #define _TRISG_RG4 0x10
2157
2158 //==============================================================================
2159
2160
2161 //==============================================================================
2162 // DDRH Bits
2163
2164 extern __at(0x0F99) __sfr DDRH;
2165
2166 typedef union
2167 {
2168 struct
2169 {
2170 unsigned TRISH0 : 1;
2171 unsigned TRISH1 : 1;
2172 unsigned TRISH2 : 1;
2173 unsigned TRISH3 : 1;
2174 unsigned TRISH4 : 1;
2175 unsigned TRISH5 : 1;
2176 unsigned TRISH6 : 1;
2177 unsigned TRISH7 : 1;
2178 };
2179
2180 struct
2181 {
2182 unsigned RH0 : 1;
2183 unsigned RH1 : 1;
2184 unsigned RH2 : 1;
2185 unsigned RH3 : 1;
2186 unsigned RH4 : 1;
2187 unsigned RH5 : 1;
2188 unsigned RH6 : 1;
2189 unsigned RH7 : 1;
2190 };
2191 } __DDRHbits_t;
2192
2193 extern __at(0x0F99) volatile __DDRHbits_t DDRHbits;
2194
2195 #define _TRISH0 0x01
2196 #define _RH0 0x01
2197 #define _TRISH1 0x02
2198 #define _RH1 0x02
2199 #define _TRISH2 0x04
2200 #define _RH2 0x04
2201 #define _TRISH3 0x08
2202 #define _RH3 0x08
2203 #define _TRISH4 0x10
2204 #define _RH4 0x10
2205 #define _TRISH5 0x20
2206 #define _RH5 0x20
2207 #define _TRISH6 0x40
2208 #define _RH6 0x40
2209 #define _TRISH7 0x80
2210 #define _RH7 0x80
2211
2212 //==============================================================================
2213
2214
2215 //==============================================================================
2216 // TRISH Bits
2217
2218 extern __at(0x0F99) __sfr TRISH;
2219
2220 typedef union
2221 {
2222 struct
2223 {
2224 unsigned TRISH0 : 1;
2225 unsigned TRISH1 : 1;
2226 unsigned TRISH2 : 1;
2227 unsigned TRISH3 : 1;
2228 unsigned TRISH4 : 1;
2229 unsigned TRISH5 : 1;
2230 unsigned TRISH6 : 1;
2231 unsigned TRISH7 : 1;
2232 };
2233
2234 struct
2235 {
2236 unsigned RH0 : 1;
2237 unsigned RH1 : 1;
2238 unsigned RH2 : 1;
2239 unsigned RH3 : 1;
2240 unsigned RH4 : 1;
2241 unsigned RH5 : 1;
2242 unsigned RH6 : 1;
2243 unsigned RH7 : 1;
2244 };
2245 } __TRISHbits_t;
2246
2247 extern __at(0x0F99) volatile __TRISHbits_t TRISHbits;
2248
2249 #define _TRISH_TRISH0 0x01
2250 #define _TRISH_RH0 0x01
2251 #define _TRISH_TRISH1 0x02
2252 #define _TRISH_RH1 0x02
2253 #define _TRISH_TRISH2 0x04
2254 #define _TRISH_RH2 0x04
2255 #define _TRISH_TRISH3 0x08
2256 #define _TRISH_RH3 0x08
2257 #define _TRISH_TRISH4 0x10
2258 #define _TRISH_RH4 0x10
2259 #define _TRISH_TRISH5 0x20
2260 #define _TRISH_RH5 0x20
2261 #define _TRISH_TRISH6 0x40
2262 #define _TRISH_RH6 0x40
2263 #define _TRISH_TRISH7 0x80
2264 #define _TRISH_RH7 0x80
2265
2266 //==============================================================================
2267
2268
2269 //==============================================================================
2270 // DDRJ Bits
2271
2272 extern __at(0x0F9A) __sfr DDRJ;
2273
2274 typedef union
2275 {
2276 struct
2277 {
2278 unsigned TRISJ0 : 1;
2279 unsigned TRISJ1 : 1;
2280 unsigned TRISJ2 : 1;
2281 unsigned TRISJ3 : 1;
2282 unsigned TRISJ4 : 1;
2283 unsigned TRISJ5 : 1;
2284 unsigned TRISJ6 : 1;
2285 unsigned TRISJ7 : 1;
2286 };
2287
2288 struct
2289 {
2290 unsigned RJ0 : 1;
2291 unsigned RJ1 : 1;
2292 unsigned RJ2 : 1;
2293 unsigned RJ3 : 1;
2294 unsigned RJ4 : 1;
2295 unsigned RJ5 : 1;
2296 unsigned RJ6 : 1;
2297 unsigned RJ7 : 1;
2298 };
2299 } __DDRJbits_t;
2300
2301 extern __at(0x0F9A) volatile __DDRJbits_t DDRJbits;
2302
2303 #define _TRISJ0 0x01
2304 #define _RJ0 0x01
2305 #define _TRISJ1 0x02
2306 #define _RJ1 0x02
2307 #define _TRISJ2 0x04
2308 #define _RJ2 0x04
2309 #define _TRISJ3 0x08
2310 #define _RJ3 0x08
2311 #define _TRISJ4 0x10
2312 #define _RJ4 0x10
2313 #define _TRISJ5 0x20
2314 #define _RJ5 0x20
2315 #define _TRISJ6 0x40
2316 #define _RJ6 0x40
2317 #define _TRISJ7 0x80
2318 #define _RJ7 0x80
2319
2320 //==============================================================================
2321
2322
2323 //==============================================================================
2324 // TRISJ Bits
2325
2326 extern __at(0x0F9A) __sfr TRISJ;
2327
2328 typedef union
2329 {
2330 struct
2331 {
2332 unsigned TRISJ0 : 1;
2333 unsigned TRISJ1 : 1;
2334 unsigned TRISJ2 : 1;
2335 unsigned TRISJ3 : 1;
2336 unsigned TRISJ4 : 1;
2337 unsigned TRISJ5 : 1;
2338 unsigned TRISJ6 : 1;
2339 unsigned TRISJ7 : 1;
2340 };
2341
2342 struct
2343 {
2344 unsigned RJ0 : 1;
2345 unsigned RJ1 : 1;
2346 unsigned RJ2 : 1;
2347 unsigned RJ3 : 1;
2348 unsigned RJ4 : 1;
2349 unsigned RJ5 : 1;
2350 unsigned RJ6 : 1;
2351 unsigned RJ7 : 1;
2352 };
2353 } __TRISJbits_t;
2354
2355 extern __at(0x0F9A) volatile __TRISJbits_t TRISJbits;
2356
2357 #define _TRISJ_TRISJ0 0x01
2358 #define _TRISJ_RJ0 0x01
2359 #define _TRISJ_TRISJ1 0x02
2360 #define _TRISJ_RJ1 0x02
2361 #define _TRISJ_TRISJ2 0x04
2362 #define _TRISJ_RJ2 0x04
2363 #define _TRISJ_TRISJ3 0x08
2364 #define _TRISJ_RJ3 0x08
2365 #define _TRISJ_TRISJ4 0x10
2366 #define _TRISJ_RJ4 0x10
2367 #define _TRISJ_TRISJ5 0x20
2368 #define _TRISJ_RJ5 0x20
2369 #define _TRISJ_TRISJ6 0x40
2370 #define _TRISJ_RJ6 0x40
2371 #define _TRISJ_TRISJ7 0x80
2372 #define _TRISJ_RJ7 0x80
2373
2374 //==============================================================================
2375
2376
2377 //==============================================================================
2378 // MEMCON Bits
2379
2380 extern __at(0x0F9C) __sfr MEMCON;
2381
2382 typedef union
2383 {
2384 struct
2385 {
2386 unsigned WM0 : 1;
2387 unsigned WM1 : 1;
2388 unsigned : 1;
2389 unsigned : 1;
2390 unsigned WAIT0 : 1;
2391 unsigned WAIT1 : 1;
2392 unsigned : 1;
2393 unsigned EBDIS : 1;
2394 };
2395
2396 struct
2397 {
2398 unsigned WM : 2;
2399 unsigned : 6;
2400 };
2401
2402 struct
2403 {
2404 unsigned : 4;
2405 unsigned WAIT : 2;
2406 unsigned : 2;
2407 };
2408 } __MEMCONbits_t;
2409
2410 extern __at(0x0F9C) volatile __MEMCONbits_t MEMCONbits;
2411
2412 #define _WM0 0x01
2413 #define _WM1 0x02
2414 #define _WAIT0 0x10
2415 #define _WAIT1 0x20
2416 #define _EBDIS 0x80
2417
2418 //==============================================================================
2419
2420
2421 //==============================================================================
2422 // PIE1 Bits
2423
2424 extern __at(0x0F9D) __sfr PIE1;
2425
2426 typedef union
2427 {
2428 struct
2429 {
2430 unsigned TMR1IE : 1;
2431 unsigned TMR2IE : 1;
2432 unsigned CCP1IE : 1;
2433 unsigned SSPIE : 1;
2434 unsigned TXIE : 1;
2435 unsigned RCIE : 1;
2436 unsigned ADIE : 1;
2437 unsigned PSPIE : 1;
2438 };
2439
2440 struct
2441 {
2442 unsigned : 1;
2443 unsigned : 1;
2444 unsigned : 1;
2445 unsigned : 1;
2446 unsigned TX1IE : 1;
2447 unsigned RC1IE : 1;
2448 unsigned : 1;
2449 unsigned : 1;
2450 };
2451 } __PIE1bits_t;
2452
2453 extern __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
2454
2455 #define _TMR1IE 0x01
2456 #define _TMR2IE 0x02
2457 #define _CCP1IE 0x04
2458 #define _SSPIE 0x08
2459 #define _TXIE 0x10
2460 #define _TX1IE 0x10
2461 #define _RCIE 0x20
2462 #define _RC1IE 0x20
2463 #define _ADIE 0x40
2464 #define _PSPIE 0x80
2465
2466 //==============================================================================
2467
2468
2469 //==============================================================================
2470 // PIR1 Bits
2471
2472 extern __at(0x0F9E) __sfr PIR1;
2473
2474 typedef union
2475 {
2476 struct
2477 {
2478 unsigned TMR1IF : 1;
2479 unsigned TMR2IF : 1;
2480 unsigned CCP1IF : 1;
2481 unsigned SSPIF : 1;
2482 unsigned TXIF : 1;
2483 unsigned RCIF : 1;
2484 unsigned ADIF : 1;
2485 unsigned PSPIF : 1;
2486 };
2487
2488 struct
2489 {
2490 unsigned : 1;
2491 unsigned : 1;
2492 unsigned : 1;
2493 unsigned : 1;
2494 unsigned TX1IF : 1;
2495 unsigned RC1IF : 1;
2496 unsigned : 1;
2497 unsigned : 1;
2498 };
2499 } __PIR1bits_t;
2500
2501 extern __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
2502
2503 #define _TMR1IF 0x01
2504 #define _TMR2IF 0x02
2505 #define _CCP1IF 0x04
2506 #define _SSPIF 0x08
2507 #define _TXIF 0x10
2508 #define _TX1IF 0x10
2509 #define _RCIF 0x20
2510 #define _RC1IF 0x20
2511 #define _ADIF 0x40
2512 #define _PSPIF 0x80
2513
2514 //==============================================================================
2515
2516
2517 //==============================================================================
2518 // IPR1 Bits
2519
2520 extern __at(0x0F9F) __sfr IPR1;
2521
2522 typedef union
2523 {
2524 struct
2525 {
2526 unsigned TMR1IP : 1;
2527 unsigned TMR2IP : 1;
2528 unsigned CCP1IP : 1;
2529 unsigned SSPIP : 1;
2530 unsigned TXIP : 1;
2531 unsigned RCIP : 1;
2532 unsigned ADIP : 1;
2533 unsigned PSPIP : 1;
2534 };
2535
2536 struct
2537 {
2538 unsigned : 1;
2539 unsigned : 1;
2540 unsigned : 1;
2541 unsigned : 1;
2542 unsigned TX1IP : 1;
2543 unsigned RC1IP : 1;
2544 unsigned : 1;
2545 unsigned : 1;
2546 };
2547 } __IPR1bits_t;
2548
2549 extern __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
2550
2551 #define _TMR1IP 0x01
2552 #define _TMR2IP 0x02
2553 #define _CCP1IP 0x04
2554 #define _SSPIP 0x08
2555 #define _TXIP 0x10
2556 #define _TX1IP 0x10
2557 #define _RCIP 0x20
2558 #define _RC1IP 0x20
2559 #define _ADIP 0x40
2560 #define _PSPIP 0x80
2561
2562 //==============================================================================
2563
2564
2565 //==============================================================================
2566 // PIE2 Bits
2567
2568 extern __at(0x0FA0) __sfr PIE2;
2569
2570 typedef struct
2571 {
2572 unsigned CCP2IE : 1;
2573 unsigned TMR3IE : 1;
2574 unsigned LVDIE : 1;
2575 unsigned BCLIE : 1;
2576 unsigned EEIE : 1;
2577 unsigned : 1;
2578 unsigned CMIE : 1;
2579 unsigned : 1;
2580 } __PIE2bits_t;
2581
2582 extern __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
2583
2584 #define _CCP2IE 0x01
2585 #define _TMR3IE 0x02
2586 #define _LVDIE 0x04
2587 #define _BCLIE 0x08
2588 #define _EEIE 0x10
2589 #define _CMIE 0x40
2590
2591 //==============================================================================
2592
2593
2594 //==============================================================================
2595 // PIR2 Bits
2596
2597 extern __at(0x0FA1) __sfr PIR2;
2598
2599 typedef struct
2600 {
2601 unsigned CCP2IF : 1;
2602 unsigned TMR3IF : 1;
2603 unsigned LVDIF : 1;
2604 unsigned BCLIF : 1;
2605 unsigned EEIF : 1;
2606 unsigned : 1;
2607 unsigned CMIF : 1;
2608 unsigned : 1;
2609 } __PIR2bits_t;
2610
2611 extern __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
2612
2613 #define _CCP2IF 0x01
2614 #define _TMR3IF 0x02
2615 #define _LVDIF 0x04
2616 #define _BCLIF 0x08
2617 #define _EEIF 0x10
2618 #define _CMIF 0x40
2619
2620 //==============================================================================
2621
2622
2623 //==============================================================================
2624 // IPR2 Bits
2625
2626 extern __at(0x0FA2) __sfr IPR2;
2627
2628 typedef struct
2629 {
2630 unsigned CCP2IP : 1;
2631 unsigned TMR3IP : 1;
2632 unsigned LVDIP : 1;
2633 unsigned BCLIP : 1;
2634 unsigned EEIP : 1;
2635 unsigned : 1;
2636 unsigned CMIP : 1;
2637 unsigned : 1;
2638 } __IPR2bits_t;
2639
2640 extern __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
2641
2642 #define _CCP2IP 0x01
2643 #define _TMR3IP 0x02
2644 #define _LVDIP 0x04
2645 #define _BCLIP 0x08
2646 #define _EEIP 0x10
2647 #define _CMIP 0x40
2648
2649 //==============================================================================
2650
2651
2652 //==============================================================================
2653 // PIE3 Bits
2654
2655 extern __at(0x0FA3) __sfr PIE3;
2656
2657 typedef struct
2658 {
2659 unsigned CCP3IE : 1;
2660 unsigned CCP4IE : 1;
2661 unsigned CCP5IE : 1;
2662 unsigned TMR4IE : 1;
2663 unsigned TX2IE : 1;
2664 unsigned RC2IE : 1;
2665 unsigned : 1;
2666 unsigned : 1;
2667 } __PIE3bits_t;
2668
2669 extern __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
2670
2671 #define _CCP3IE 0x01
2672 #define _CCP4IE 0x02
2673 #define _CCP5IE 0x04
2674 #define _TMR4IE 0x08
2675 #define _TX2IE 0x10
2676 #define _RC2IE 0x20
2677
2678 //==============================================================================
2679
2680
2681 //==============================================================================
2682 // PIR3 Bits
2683
2684 extern __at(0x0FA4) __sfr PIR3;
2685
2686 typedef struct
2687 {
2688 unsigned CCP3IF : 1;
2689 unsigned CCP4IF : 1;
2690 unsigned CCP5IF : 1;
2691 unsigned TMR4IF : 1;
2692 unsigned TX2IF : 1;
2693 unsigned RC2IF : 1;
2694 unsigned : 1;
2695 unsigned : 1;
2696 } __PIR3bits_t;
2697
2698 extern __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
2699
2700 #define _CCP3IF 0x01
2701 #define _CCP4IF 0x02
2702 #define _CCP5IF 0x04
2703 #define _TMR4IF 0x08
2704 #define _TX2IF 0x10
2705 #define _RC2IF 0x20
2706
2707 //==============================================================================
2708
2709
2710 //==============================================================================
2711 // IPR3 Bits
2712
2713 extern __at(0x0FA5) __sfr IPR3;
2714
2715 typedef struct
2716 {
2717 unsigned CCP3IP : 1;
2718 unsigned CCP4IP : 1;
2719 unsigned CCP5IP : 1;
2720 unsigned TMR4IP : 1;
2721 unsigned TX2IP : 1;
2722 unsigned RC2IP : 1;
2723 unsigned : 1;
2724 unsigned : 1;
2725 } __IPR3bits_t;
2726
2727 extern __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
2728
2729 #define _CCP3IP 0x01
2730 #define _CCP4IP 0x02
2731 #define _CCP5IP 0x04
2732 #define _TMR4IP 0x08
2733 #define _TX2IP 0x10
2734 #define _RC2IP 0x20
2735
2736 //==============================================================================
2737
2738
2739 //==============================================================================
2740 // EECON1 Bits
2741
2742 extern __at(0x0FA6) __sfr EECON1;
2743
2744 typedef union
2745 {
2746 struct
2747 {
2748 unsigned RD : 1;
2749 unsigned WR : 1;
2750 unsigned WREN : 1;
2751 unsigned WRERR : 1;
2752 unsigned FREE : 1;
2753 unsigned : 1;
2754 unsigned CFGS : 1;
2755 unsigned EEPGD : 1;
2756 };
2757
2758 struct
2759 {
2760 unsigned : 1;
2761 unsigned : 1;
2762 unsigned : 1;
2763 unsigned : 1;
2764 unsigned : 1;
2765 unsigned : 1;
2766 unsigned EEFS : 1;
2767 unsigned : 1;
2768 };
2769 } __EECON1bits_t;
2770
2771 extern __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
2772
2773 #define _RD 0x01
2774 #define _WR 0x02
2775 #define _WREN 0x04
2776 #define _WRERR 0x08
2777 #define _FREE 0x10
2778 #define _CFGS 0x40
2779 #define _EEFS 0x40
2780 #define _EEPGD 0x80
2781
2782 //==============================================================================
2783
2784 extern __at(0x0FA7) __sfr EECON2;
2785 extern __at(0x0FA8) __sfr EEDATA;
2786 extern __at(0x0FA9) __sfr EEADR;
2787 extern __at(0x0FAA) __sfr EEADRH;
2788
2789 //==============================================================================
2790 // RCSTA Bits
2791
2792 extern __at(0x0FAB) __sfr RCSTA;
2793
2794 typedef union
2795 {
2796 struct
2797 {
2798 unsigned RX9D : 1;
2799 unsigned OERR : 1;
2800 unsigned FERR : 1;
2801 unsigned ADDEN : 1;
2802 unsigned CREN : 1;
2803 unsigned SREN : 1;
2804 unsigned RX9 : 1;
2805 unsigned SPEN : 1;
2806 };
2807
2808 struct
2809 {
2810 unsigned RCD8 : 1;
2811 unsigned OERR1 : 1;
2812 unsigned FERR1 : 1;
2813 unsigned ADEN : 1;
2814 unsigned CREN1 : 1;
2815 unsigned SREN1 : 1;
2816 unsigned RC9 : 1;
2817 unsigned SPEN1 : 1;
2818 };
2819
2820 struct
2821 {
2822 unsigned RX9D1 : 1;
2823 unsigned : 1;
2824 unsigned : 1;
2825 unsigned ADDEN1 : 1;
2826 unsigned : 1;
2827 unsigned : 1;
2828 unsigned NOT_RC8 : 1;
2829 unsigned : 1;
2830 };
2831
2832 struct
2833 {
2834 unsigned : 1;
2835 unsigned : 1;
2836 unsigned : 1;
2837 unsigned : 1;
2838 unsigned : 1;
2839 unsigned : 1;
2840 unsigned RC8_9 : 1;
2841 unsigned : 1;
2842 };
2843
2844 struct
2845 {
2846 unsigned : 1;
2847 unsigned : 1;
2848 unsigned : 1;
2849 unsigned : 1;
2850 unsigned : 1;
2851 unsigned : 1;
2852 unsigned RX91 : 1;
2853 unsigned : 1;
2854 };
2855 } __RCSTAbits_t;
2856
2857 extern __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
2858
2859 #define _RX9D 0x01
2860 #define _RCD8 0x01
2861 #define _RX9D1 0x01
2862 #define _OERR 0x02
2863 #define _OERR1 0x02
2864 #define _FERR 0x04
2865 #define _FERR1 0x04
2866 #define _ADDEN 0x08
2867 #define _ADEN 0x08
2868 #define _ADDEN1 0x08
2869 #define _CREN 0x10
2870 #define _CREN1 0x10
2871 #define _SREN 0x20
2872 #define _SREN1 0x20
2873 #define _RX9 0x40
2874 #define _RC9 0x40
2875 #define _NOT_RC8 0x40
2876 #define _RC8_9 0x40
2877 #define _RX91 0x40
2878 #define _SPEN 0x80
2879 #define _SPEN1 0x80
2880
2881 //==============================================================================
2882
2883
2884 //==============================================================================
2885 // RCSTA1 Bits
2886
2887 extern __at(0x0FAB) __sfr RCSTA1;
2888
2889 typedef union
2890 {
2891 struct
2892 {
2893 unsigned RX9D : 1;
2894 unsigned OERR : 1;
2895 unsigned FERR : 1;
2896 unsigned ADDEN : 1;
2897 unsigned CREN : 1;
2898 unsigned SREN : 1;
2899 unsigned RX9 : 1;
2900 unsigned SPEN : 1;
2901 };
2902
2903 struct
2904 {
2905 unsigned RCD8 : 1;
2906 unsigned OERR1 : 1;
2907 unsigned FERR1 : 1;
2908 unsigned ADEN : 1;
2909 unsigned CREN1 : 1;
2910 unsigned SREN1 : 1;
2911 unsigned RC9 : 1;
2912 unsigned SPEN1 : 1;
2913 };
2914
2915 struct
2916 {
2917 unsigned RX9D1 : 1;
2918 unsigned : 1;
2919 unsigned : 1;
2920 unsigned ADDEN1 : 1;
2921 unsigned : 1;
2922 unsigned : 1;
2923 unsigned NOT_RC8 : 1;
2924 unsigned : 1;
2925 };
2926
2927 struct
2928 {
2929 unsigned : 1;
2930 unsigned : 1;
2931 unsigned : 1;
2932 unsigned : 1;
2933 unsigned : 1;
2934 unsigned : 1;
2935 unsigned RC8_9 : 1;
2936 unsigned : 1;
2937 };
2938
2939 struct
2940 {
2941 unsigned : 1;
2942 unsigned : 1;
2943 unsigned : 1;
2944 unsigned : 1;
2945 unsigned : 1;
2946 unsigned : 1;
2947 unsigned RX91 : 1;
2948 unsigned : 1;
2949 };
2950 } __RCSTA1bits_t;
2951
2952 extern __at(0x0FAB) volatile __RCSTA1bits_t RCSTA1bits;
2953
2954 #define _RCSTA1_RX9D 0x01
2955 #define _RCSTA1_RCD8 0x01
2956 #define _RCSTA1_RX9D1 0x01
2957 #define _RCSTA1_OERR 0x02
2958 #define _RCSTA1_OERR1 0x02
2959 #define _RCSTA1_FERR 0x04
2960 #define _RCSTA1_FERR1 0x04
2961 #define _RCSTA1_ADDEN 0x08
2962 #define _RCSTA1_ADEN 0x08
2963 #define _RCSTA1_ADDEN1 0x08
2964 #define _RCSTA1_CREN 0x10
2965 #define _RCSTA1_CREN1 0x10
2966 #define _RCSTA1_SREN 0x20
2967 #define _RCSTA1_SREN1 0x20
2968 #define _RCSTA1_RX9 0x40
2969 #define _RCSTA1_RC9 0x40
2970 #define _RCSTA1_NOT_RC8 0x40
2971 #define _RCSTA1_RC8_9 0x40
2972 #define _RCSTA1_RX91 0x40
2973 #define _RCSTA1_SPEN 0x80
2974 #define _RCSTA1_SPEN1 0x80
2975
2976 //==============================================================================
2977
2978
2979 //==============================================================================
2980 // TXSTA Bits
2981
2982 extern __at(0x0FAC) __sfr TXSTA;
2983
2984 typedef union
2985 {
2986 struct
2987 {
2988 unsigned TX9D : 1;
2989 unsigned TRMT : 1;
2990 unsigned BRGH : 1;
2991 unsigned SENDB1 : 1;
2992 unsigned SYNC : 1;
2993 unsigned TXEN : 1;
2994 unsigned TX9 : 1;
2995 unsigned CSRC : 1;
2996 };
2997
2998 struct
2999 {
3000 unsigned TXD8 : 1;
3001 unsigned TRMT1 : 1;
3002 unsigned BRGH1 : 1;
3003 unsigned : 1;
3004 unsigned SYNC1 : 1;
3005 unsigned TXEN1 : 1;
3006 unsigned TX8_9 : 1;
3007 unsigned CSRC1 : 1;
3008 };
3009
3010 struct
3011 {
3012 unsigned TX9D1 : 1;
3013 unsigned : 1;
3014 unsigned : 1;
3015 unsigned : 1;
3016 unsigned : 1;
3017 unsigned : 1;
3018 unsigned NOT_TX8 : 1;
3019 unsigned : 1;
3020 };
3021
3022 struct
3023 {
3024 unsigned : 1;
3025 unsigned : 1;
3026 unsigned : 1;
3027 unsigned : 1;
3028 unsigned : 1;
3029 unsigned : 1;
3030 unsigned TX91 : 1;
3031 unsigned : 1;
3032 };
3033 } __TXSTAbits_t;
3034
3035 extern __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
3036
3037 #define _TX9D 0x01
3038 #define _TXD8 0x01
3039 #define _TX9D1 0x01
3040 #define _TRMT 0x02
3041 #define _TRMT1 0x02
3042 #define _BRGH 0x04
3043 #define _BRGH1 0x04
3044 #define _SENDB1 0x08
3045 #define _SYNC 0x10
3046 #define _SYNC1 0x10
3047 #define _TXEN 0x20
3048 #define _TXEN1 0x20
3049 #define _TX9 0x40
3050 #define _TX8_9 0x40
3051 #define _NOT_TX8 0x40
3052 #define _TX91 0x40
3053 #define _CSRC 0x80
3054 #define _CSRC1 0x80
3055
3056 //==============================================================================
3057
3058
3059 //==============================================================================
3060 // TXSTA1 Bits
3061
3062 extern __at(0x0FAC) __sfr TXSTA1;
3063
3064 typedef union
3065 {
3066 struct
3067 {
3068 unsigned TX9D : 1;
3069 unsigned TRMT : 1;
3070 unsigned BRGH : 1;
3071 unsigned SENDB1 : 1;
3072 unsigned SYNC : 1;
3073 unsigned TXEN : 1;
3074 unsigned TX9 : 1;
3075 unsigned CSRC : 1;
3076 };
3077
3078 struct
3079 {
3080 unsigned TXD8 : 1;
3081 unsigned TRMT1 : 1;
3082 unsigned BRGH1 : 1;
3083 unsigned : 1;
3084 unsigned SYNC1 : 1;
3085 unsigned TXEN1 : 1;
3086 unsigned TX8_9 : 1;
3087 unsigned CSRC1 : 1;
3088 };
3089
3090 struct
3091 {
3092 unsigned TX9D1 : 1;
3093 unsigned : 1;
3094 unsigned : 1;
3095 unsigned : 1;
3096 unsigned : 1;
3097 unsigned : 1;
3098 unsigned NOT_TX8 : 1;
3099 unsigned : 1;
3100 };
3101
3102 struct
3103 {
3104 unsigned : 1;
3105 unsigned : 1;
3106 unsigned : 1;
3107 unsigned : 1;
3108 unsigned : 1;
3109 unsigned : 1;
3110 unsigned TX91 : 1;
3111 unsigned : 1;
3112 };
3113 } __TXSTA1bits_t;
3114
3115 extern __at(0x0FAC) volatile __TXSTA1bits_t TXSTA1bits;
3116
3117 #define _TXSTA1_TX9D 0x01
3118 #define _TXSTA1_TXD8 0x01
3119 #define _TXSTA1_TX9D1 0x01
3120 #define _TXSTA1_TRMT 0x02
3121 #define _TXSTA1_TRMT1 0x02
3122 #define _TXSTA1_BRGH 0x04
3123 #define _TXSTA1_BRGH1 0x04
3124 #define _TXSTA1_SENDB1 0x08
3125 #define _TXSTA1_SYNC 0x10
3126 #define _TXSTA1_SYNC1 0x10
3127 #define _TXSTA1_TXEN 0x20
3128 #define _TXSTA1_TXEN1 0x20
3129 #define _TXSTA1_TX9 0x40
3130 #define _TXSTA1_TX8_9 0x40
3131 #define _TXSTA1_NOT_TX8 0x40
3132 #define _TXSTA1_TX91 0x40
3133 #define _TXSTA1_CSRC 0x80
3134 #define _TXSTA1_CSRC1 0x80
3135
3136 //==============================================================================
3137
3138 extern __at(0x0FAD) __sfr TXREG;
3139 extern __at(0x0FAD) __sfr TXREG1;
3140 extern __at(0x0FAE) __sfr RCREG;
3141 extern __at(0x0FAE) __sfr RCREG1;
3142 extern __at(0x0FAF) __sfr SPBRG;
3143 extern __at(0x0FAF) __sfr SPBRG1;
3144
3145 //==============================================================================
3146 // PSPCON Bits
3147
3148 extern __at(0x0FB0) __sfr PSPCON;
3149
3150 typedef struct
3151 {
3152 unsigned : 1;
3153 unsigned : 1;
3154 unsigned : 1;
3155 unsigned : 1;
3156 unsigned PSPMODE : 1;
3157 unsigned IBOV : 1;
3158 unsigned OBF : 1;
3159 unsigned IBF : 1;
3160 } __PSPCONbits_t;
3161
3162 extern __at(0x0FB0) volatile __PSPCONbits_t PSPCONbits;
3163
3164 #define _PSPMODE 0x10
3165 #define _IBOV 0x20
3166 #define _OBF 0x40
3167 #define _IBF 0x80
3168
3169 //==============================================================================
3170
3171
3172 //==============================================================================
3173 // T3CON Bits
3174
3175 extern __at(0x0FB1) __sfr T3CON;
3176
3177 typedef union
3178 {
3179 struct
3180 {
3181 unsigned TMR3ON : 1;
3182 unsigned TMR3CS : 1;
3183 unsigned NOT_T3SYNC : 1;
3184 unsigned T3CCP1 : 1;
3185 unsigned T3CKPS0 : 1;
3186 unsigned T3CKPS1 : 1;
3187 unsigned T3CCP2 : 1;
3188 unsigned RD16 : 1;
3189 };
3190
3191 struct
3192 {
3193 unsigned : 1;
3194 unsigned : 1;
3195 unsigned T3SYNC : 1;
3196 unsigned : 1;
3197 unsigned : 1;
3198 unsigned : 1;
3199 unsigned : 1;
3200 unsigned : 1;
3201 };
3202
3203 struct
3204 {
3205 unsigned : 1;
3206 unsigned : 1;
3207 unsigned T3INSYNC : 1;
3208 unsigned : 1;
3209 unsigned : 1;
3210 unsigned : 1;
3211 unsigned : 1;
3212 unsigned : 1;
3213 };
3214
3215 struct
3216 {
3217 unsigned : 1;
3218 unsigned : 1;
3219 unsigned T3NSYNC : 1;
3220 unsigned : 1;
3221 unsigned : 1;
3222 unsigned : 1;
3223 unsigned : 1;
3224 unsigned : 1;
3225 };
3226
3227 struct
3228 {
3229 unsigned : 4;
3230 unsigned T3CKPS : 2;
3231 unsigned : 2;
3232 };
3233 } __T3CONbits_t;
3234
3235 extern __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
3236
3237 #define _T3CON_TMR3ON 0x01
3238 #define _T3CON_TMR3CS 0x02
3239 #define _T3CON_NOT_T3SYNC 0x04
3240 #define _T3CON_T3SYNC 0x04
3241 #define _T3CON_T3INSYNC 0x04
3242 #define _T3CON_T3NSYNC 0x04
3243 #define _T3CON_T3CCP1 0x08
3244 #define _T3CON_T3CKPS0 0x10
3245 #define _T3CON_T3CKPS1 0x20
3246 #define _T3CON_T3CCP2 0x40
3247 #define _T3CON_RD16 0x80
3248
3249 //==============================================================================
3250
3251 extern __at(0x0FB2) __sfr TMR3;
3252 extern __at(0x0FB2) __sfr TMR3L;
3253 extern __at(0x0FB3) __sfr TMR3H;
3254
3255 //==============================================================================
3256 // CMCON Bits
3257
3258 extern __at(0x0FB4) __sfr CMCON;
3259
3260 typedef union
3261 {
3262 struct
3263 {
3264 unsigned CM0 : 1;
3265 unsigned CM1 : 1;
3266 unsigned CM2 : 1;
3267 unsigned CIS : 1;
3268 unsigned C1INV : 1;
3269 unsigned C2INV : 1;
3270 unsigned C1OUT : 1;
3271 unsigned C2OUT : 1;
3272 };
3273
3274 struct
3275 {
3276 unsigned CM : 3;
3277 unsigned : 5;
3278 };
3279 } __CMCONbits_t;
3280
3281 extern __at(0x0FB4) volatile __CMCONbits_t CMCONbits;
3282
3283 #define _CM0 0x01
3284 #define _CM1 0x02
3285 #define _CM2 0x04
3286 #define _CIS 0x08
3287 #define _C1INV 0x10
3288 #define _C2INV 0x20
3289 #define _C1OUT 0x40
3290 #define _C2OUT 0x80
3291
3292 //==============================================================================
3293
3294
3295 //==============================================================================
3296 // CVRCON Bits
3297
3298 extern __at(0x0FB5) __sfr CVRCON;
3299
3300 typedef union
3301 {
3302 struct
3303 {
3304 unsigned CVR0 : 1;
3305 unsigned CVR1 : 1;
3306 unsigned CVR2 : 1;
3307 unsigned CVR3 : 1;
3308 unsigned CVRSS : 1;
3309 unsigned CVRR : 1;
3310 unsigned CVROE : 1;
3311 unsigned CVREN : 1;
3312 };
3313
3314 struct
3315 {
3316 unsigned : 1;
3317 unsigned : 1;
3318 unsigned : 1;
3319 unsigned : 1;
3320 unsigned CVREF : 1;
3321 unsigned : 1;
3322 unsigned : 1;
3323 unsigned : 1;
3324 };
3325
3326 struct
3327 {
3328 unsigned CVR : 4;
3329 unsigned : 4;
3330 };
3331 } __CVRCONbits_t;
3332
3333 extern __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
3334
3335 #define _CVR0 0x01
3336 #define _CVR1 0x02
3337 #define _CVR2 0x04
3338 #define _CVR3 0x08
3339 #define _CVRSS 0x10
3340 #define _CVREF 0x10
3341 #define _CVRR 0x20
3342 #define _CVROE 0x40
3343 #define _CVREN 0x80
3344
3345 //==============================================================================
3346
3347
3348 //==============================================================================
3349 // CCP3CON Bits
3350
3351 extern __at(0x0FB7) __sfr CCP3CON;
3352
3353 typedef union
3354 {
3355 struct
3356 {
3357 unsigned CCP3M0 : 1;
3358 unsigned CCP3M1 : 1;
3359 unsigned CCP3M2 : 1;
3360 unsigned CCP3M3 : 1;
3361 unsigned DC3B0 : 1;
3362 unsigned DC3B1 : 1;
3363 unsigned : 1;
3364 unsigned : 1;
3365 };
3366
3367 struct
3368 {
3369 unsigned : 1;
3370 unsigned : 1;
3371 unsigned : 1;
3372 unsigned : 1;
3373 unsigned DCCP3Y : 1;
3374 unsigned DCCP3X : 1;
3375 unsigned : 1;
3376 unsigned : 1;
3377 };
3378
3379 struct
3380 {
3381 unsigned CCP3M : 4;
3382 unsigned : 4;
3383 };
3384
3385 struct
3386 {
3387 unsigned : 4;
3388 unsigned DC3B : 2;
3389 unsigned : 2;
3390 };
3391 } __CCP3CONbits_t;
3392
3393 extern __at(0x0FB7) volatile __CCP3CONbits_t CCP3CONbits;
3394
3395 #define _CCP3M0 0x01
3396 #define _CCP3M1 0x02
3397 #define _CCP3M2 0x04
3398 #define _CCP3M3 0x08
3399 #define _DC3B0 0x10
3400 #define _DCCP3Y 0x10
3401 #define _DC3B1 0x20
3402 #define _DCCP3X 0x20
3403
3404 //==============================================================================
3405
3406 extern __at(0x0FB8) __sfr CCPR3;
3407 extern __at(0x0FB8) __sfr CCPR3L;
3408 extern __at(0x0FB9) __sfr CCPR3H;
3409
3410 //==============================================================================
3411 // CCP2CON Bits
3412
3413 extern __at(0x0FBA) __sfr CCP2CON;
3414
3415 typedef union
3416 {
3417 struct
3418 {
3419 unsigned CCP2M0 : 1;
3420 unsigned CCP2M1 : 1;
3421 unsigned CCP2M2 : 1;
3422 unsigned CCP2M3 : 1;
3423 unsigned DC2B0 : 1;
3424 unsigned DC2B1 : 1;
3425 unsigned : 1;
3426 unsigned : 1;
3427 };
3428
3429 struct
3430 {
3431 unsigned : 1;
3432 unsigned : 1;
3433 unsigned : 1;
3434 unsigned : 1;
3435 unsigned CCP2Y : 1;
3436 unsigned CCP2X : 1;
3437 unsigned : 1;
3438 unsigned : 1;
3439 };
3440
3441 struct
3442 {
3443 unsigned : 1;
3444 unsigned : 1;
3445 unsigned : 1;
3446 unsigned : 1;
3447 unsigned DCCP2Y : 1;
3448 unsigned DCCP2X : 1;
3449 unsigned : 1;
3450 unsigned : 1;
3451 };
3452
3453 struct
3454 {
3455 unsigned CCP2M : 4;
3456 unsigned : 4;
3457 };
3458
3459 struct
3460 {
3461 unsigned : 4;
3462 unsigned DC2B : 2;
3463 unsigned : 2;
3464 };
3465 } __CCP2CONbits_t;
3466
3467 extern __at(0x0FBA) volatile __CCP2CONbits_t CCP2CONbits;
3468
3469 #define _CCP2M0 0x01
3470 #define _CCP2M1 0x02
3471 #define _CCP2M2 0x04
3472 #define _CCP2M3 0x08
3473 #define _DC2B0 0x10
3474 #define _CCP2Y 0x10
3475 #define _DCCP2Y 0x10
3476 #define _DC2B1 0x20
3477 #define _CCP2X 0x20
3478 #define _DCCP2X 0x20
3479
3480 //==============================================================================
3481
3482 extern __at(0x0FBB) __sfr CCPR2;
3483 extern __at(0x0FBB) __sfr CCPR2L;
3484 extern __at(0x0FBC) __sfr CCPR2H;
3485
3486 //==============================================================================
3487 // CCP1CON Bits
3488
3489 extern __at(0x0FBD) __sfr CCP1CON;
3490
3491 typedef union
3492 {
3493 struct
3494 {
3495 unsigned CCP1M0 : 1;
3496 unsigned CCP1M1 : 1;
3497 unsigned CCP1M2 : 1;
3498 unsigned CCP1M3 : 1;
3499 unsigned DC1B0 : 1;
3500 unsigned DC1B1 : 1;
3501 unsigned : 1;
3502 unsigned : 1;
3503 };
3504
3505 struct
3506 {
3507 unsigned : 1;
3508 unsigned : 1;
3509 unsigned : 1;
3510 unsigned : 1;
3511 unsigned CCP1Y : 1;
3512 unsigned CCP1X : 1;
3513 unsigned : 1;
3514 unsigned : 1;
3515 };
3516
3517 struct
3518 {
3519 unsigned : 1;
3520 unsigned : 1;
3521 unsigned : 1;
3522 unsigned : 1;
3523 unsigned DCCP1Y : 1;
3524 unsigned DCCP1X : 1;
3525 unsigned : 1;
3526 unsigned : 1;
3527 };
3528
3529 struct
3530 {
3531 unsigned CCP1M : 4;
3532 unsigned : 4;
3533 };
3534
3535 struct
3536 {
3537 unsigned : 4;
3538 unsigned DC1B : 2;
3539 unsigned : 2;
3540 };
3541 } __CCP1CONbits_t;
3542
3543 extern __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits;
3544
3545 #define _CCP1M0 0x01
3546 #define _CCP1M1 0x02
3547 #define _CCP1M2 0x04
3548 #define _CCP1M3 0x08
3549 #define _DC1B0 0x10
3550 #define _CCP1Y 0x10
3551 #define _DCCP1Y 0x10
3552 #define _DC1B1 0x20
3553 #define _CCP1X 0x20
3554 #define _DCCP1X 0x20
3555
3556 //==============================================================================
3557
3558 extern __at(0x0FBE) __sfr CCPR1;
3559 extern __at(0x0FBE) __sfr CCPR1L;
3560 extern __at(0x0FBF) __sfr CCPR1H;
3561
3562 //==============================================================================
3563 // ADCON2 Bits
3564
3565 extern __at(0x0FC0) __sfr ADCON2;
3566
3567 typedef union
3568 {
3569 struct
3570 {
3571 unsigned ADCS0 : 1;
3572 unsigned ADCS1 : 1;
3573 unsigned ADCS2 : 1;
3574 unsigned : 1;
3575 unsigned : 1;
3576 unsigned : 1;
3577 unsigned : 1;
3578 unsigned ADFM : 1;
3579 };
3580
3581 struct
3582 {
3583 unsigned ADCS : 3;
3584 unsigned : 5;
3585 };
3586 } __ADCON2bits_t;
3587
3588 extern __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
3589
3590 #define _ADCS0 0x01
3591 #define _ADCS1 0x02
3592 #define _ADCS2 0x04
3593 #define _ADFM 0x80
3594
3595 //==============================================================================
3596
3597
3598 //==============================================================================
3599 // ADCON1 Bits
3600
3601 extern __at(0x0FC1) __sfr ADCON1;
3602
3603 typedef union
3604 {
3605 struct
3606 {
3607 unsigned PCFG0 : 1;
3608 unsigned PCFG1 : 1;
3609 unsigned PCFG2 : 1;
3610 unsigned PCFG3 : 1;
3611 unsigned VCFG0 : 1;
3612 unsigned VCFG1 : 1;
3613 unsigned : 1;
3614 unsigned : 1;
3615 };
3616
3617 struct
3618 {
3619 unsigned PCFG : 4;
3620 unsigned : 4;
3621 };
3622
3623 struct
3624 {
3625 unsigned : 4;
3626 unsigned VCFG : 2;
3627 unsigned : 2;
3628 };
3629 } __ADCON1bits_t;
3630
3631 extern __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
3632
3633 #define _PCFG0 0x01
3634 #define _PCFG1 0x02
3635 #define _PCFG2 0x04
3636 #define _PCFG3 0x08
3637 #define _VCFG0 0x10
3638 #define _VCFG1 0x20
3639
3640 //==============================================================================
3641
3642
3643 //==============================================================================
3644 // ADCON0 Bits
3645
3646 extern __at(0x0FC2) __sfr ADCON0;
3647
3648 typedef union
3649 {
3650 struct
3651 {
3652 unsigned ADON : 1;
3653 unsigned GO_NOT_DONE : 1;
3654 unsigned CHS0 : 1;
3655 unsigned CHS1 : 1;
3656 unsigned CHS2 : 1;
3657 unsigned CHS3 : 1;
3658 unsigned : 1;
3659 unsigned : 1;
3660 };
3661
3662 struct
3663 {
3664 unsigned : 1;
3665 unsigned DONE : 1;
3666 unsigned : 1;
3667 unsigned : 1;
3668 unsigned : 1;
3669 unsigned : 1;
3670 unsigned : 1;
3671 unsigned : 1;
3672 };
3673
3674 struct
3675 {
3676 unsigned : 1;
3677 unsigned GO_DONE : 1;
3678 unsigned : 1;
3679 unsigned : 1;
3680 unsigned : 1;
3681 unsigned : 1;
3682 unsigned : 1;
3683 unsigned : 1;
3684 };
3685
3686 struct
3687 {
3688 unsigned : 1;
3689 unsigned GO : 1;
3690 unsigned : 1;
3691 unsigned : 1;
3692 unsigned : 1;
3693 unsigned : 1;
3694 unsigned : 1;
3695 unsigned : 1;
3696 };
3697
3698 struct
3699 {
3700 unsigned : 1;
3701 unsigned NOT_DONE : 1;
3702 unsigned : 1;
3703 unsigned : 1;
3704 unsigned : 1;
3705 unsigned : 1;
3706 unsigned : 1;
3707 unsigned : 1;
3708 };
3709
3710 struct
3711 {
3712 unsigned : 1;
3713 unsigned GODONE : 1;
3714 unsigned : 1;
3715 unsigned : 1;
3716 unsigned : 1;
3717 unsigned : 1;
3718 unsigned : 1;
3719 unsigned : 1;
3720 };
3721
3722 struct
3723 {
3724 unsigned : 2;
3725 unsigned CHS : 4;
3726 unsigned : 2;
3727 };
3728 } __ADCON0bits_t;
3729
3730 extern __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
3731
3732 #define _ADON 0x01
3733 #define _GO_NOT_DONE 0x02
3734 #define _DONE 0x02
3735 #define _GO_DONE 0x02
3736 #define _GO 0x02
3737 #define _NOT_DONE 0x02
3738 #define _GODONE 0x02
3739 #define _CHS0 0x04
3740 #define _CHS1 0x08
3741 #define _CHS2 0x10
3742 #define _CHS3 0x20
3743
3744 //==============================================================================
3745
3746 extern __at(0x0FC3) __sfr ADRES;
3747 extern __at(0x0FC3) __sfr ADRESL;
3748 extern __at(0x0FC4) __sfr ADRESH;
3749
3750 //==============================================================================
3751 // SSPCON2 Bits
3752
3753 extern __at(0x0FC5) __sfr SSPCON2;
3754
3755 typedef struct
3756 {
3757 unsigned SEN : 1;
3758 unsigned RSEN : 1;
3759 unsigned PEN : 1;
3760 unsigned RCEN : 1;
3761 unsigned ACKEN : 1;
3762 unsigned ACKDT : 1;
3763 unsigned ACKSTAT : 1;
3764 unsigned GCEN : 1;
3765 } __SSPCON2bits_t;
3766
3767 extern __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
3768
3769 #define _SEN 0x01
3770 #define _RSEN 0x02
3771 #define _PEN 0x04
3772 #define _RCEN 0x08
3773 #define _ACKEN 0x10
3774 #define _ACKDT 0x20
3775 #define _ACKSTAT 0x40
3776 #define _GCEN 0x80
3777
3778 //==============================================================================
3779
3780
3781 //==============================================================================
3782 // SSPCON1 Bits
3783
3784 extern __at(0x0FC6) __sfr SSPCON1;
3785
3786 typedef union
3787 {
3788 struct
3789 {
3790 unsigned SSPM0 : 1;
3791 unsigned SSPM1 : 1;
3792 unsigned SSPM2 : 1;
3793 unsigned SSPM3 : 1;
3794 unsigned CKP : 1;
3795 unsigned SSPEN : 1;
3796 unsigned SSPOV : 1;
3797 unsigned WCOL : 1;
3798 };
3799
3800 struct
3801 {
3802 unsigned SSPM : 4;
3803 unsigned : 4;
3804 };
3805 } __SSPCON1bits_t;
3806
3807 extern __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
3808
3809 #define _SSPM0 0x01
3810 #define _SSPM1 0x02
3811 #define _SSPM2 0x04
3812 #define _SSPM3 0x08
3813 #define _CKP 0x10
3814 #define _SSPEN 0x20
3815 #define _SSPOV 0x40
3816 #define _WCOL 0x80
3817
3818 //==============================================================================
3819
3820
3821 //==============================================================================
3822 // SSPSTAT Bits
3823
3824 extern __at(0x0FC7) __sfr SSPSTAT;
3825
3826 typedef union
3827 {
3828 struct
3829 {
3830 unsigned BF : 1;
3831 unsigned UA : 1;
3832 unsigned R_NOT_W : 1;
3833 unsigned S : 1;
3834 unsigned P : 1;
3835 unsigned D_NOT_A : 1;
3836 unsigned CKE : 1;
3837 unsigned SMP : 1;
3838 };
3839
3840 struct
3841 {
3842 unsigned : 1;
3843 unsigned : 1;
3844 unsigned R_W : 1;
3845 unsigned I2C_START : 1;
3846 unsigned I2C_STOP : 1;
3847 unsigned D_A : 1;
3848 unsigned : 1;
3849 unsigned : 1;
3850 };
3851
3852 struct
3853 {
3854 unsigned : 1;
3855 unsigned : 1;
3856 unsigned I2C_READ : 1;
3857 unsigned : 1;
3858 unsigned : 1;
3859 unsigned I2C_DAT : 1;
3860 unsigned : 1;
3861 unsigned : 1;
3862 };
3863
3864 struct
3865 {
3866 unsigned : 1;
3867 unsigned : 1;
3868 unsigned NOT_W : 1;
3869 unsigned : 1;
3870 unsigned : 1;
3871 unsigned NOT_A : 1;
3872 unsigned : 1;
3873 unsigned : 1;
3874 };
3875
3876 struct
3877 {
3878 unsigned : 1;
3879 unsigned : 1;
3880 unsigned NOT_WRITE : 1;
3881 unsigned : 1;
3882 unsigned : 1;
3883 unsigned NOT_ADDRESS : 1;
3884 unsigned : 1;
3885 unsigned : 1;
3886 };
3887
3888 struct
3889 {
3890 unsigned : 1;
3891 unsigned : 1;
3892 unsigned READ_WRITE : 1;
3893 unsigned : 1;
3894 unsigned : 1;
3895 unsigned DATA_ADDRESS : 1;
3896 unsigned : 1;
3897 unsigned : 1;
3898 };
3899
3900 struct
3901 {
3902 unsigned : 1;
3903 unsigned : 1;
3904 unsigned R : 1;
3905 unsigned : 1;
3906 unsigned : 1;
3907 unsigned D : 1;
3908 unsigned : 1;
3909 unsigned : 1;
3910 };
3911 } __SSPSTATbits_t;
3912
3913 extern __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
3914
3915 #define _BF 0x01
3916 #define _UA 0x02
3917 #define _R_NOT_W 0x04
3918 #define _R_W 0x04
3919 #define _I2C_READ 0x04
3920 #define _NOT_W 0x04
3921 #define _NOT_WRITE 0x04
3922 #define _READ_WRITE 0x04
3923 #define _R 0x04
3924 #define _S 0x08
3925 #define _I2C_START 0x08
3926 #define _P 0x10
3927 #define _I2C_STOP 0x10
3928 #define _D_NOT_A 0x20
3929 #define _D_A 0x20
3930 #define _I2C_DAT 0x20
3931 #define _NOT_A 0x20
3932 #define _NOT_ADDRESS 0x20
3933 #define _DATA_ADDRESS 0x20
3934 #define _D 0x20
3935 #define _CKE 0x40
3936 #define _SMP 0x80
3937
3938 //==============================================================================
3939
3940 extern __at(0x0FC8) __sfr SSPADD;
3941 extern __at(0x0FC9) __sfr SSPBUF;
3942
3943 //==============================================================================
3944 // T2CON Bits
3945
3946 extern __at(0x0FCA) __sfr T2CON;
3947
3948 typedef union
3949 {
3950 struct
3951 {
3952 unsigned T2CKPS0 : 1;
3953 unsigned T2CKPS1 : 1;
3954 unsigned TMR2ON : 1;
3955 unsigned T2OUTPS0 : 1;
3956 unsigned T2OUTPS1 : 1;
3957 unsigned T2OUTPS2 : 1;
3958 unsigned T2OUTPS3 : 1;
3959 unsigned : 1;
3960 };
3961
3962 struct
3963 {
3964 unsigned T2CKPS : 2;
3965 unsigned : 6;
3966 };
3967
3968 struct
3969 {
3970 unsigned : 3;
3971 unsigned T2OUTPS : 4;
3972 unsigned : 1;
3973 };
3974 } __T2CONbits_t;
3975
3976 extern __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
3977
3978 #define _T2CKPS0 0x01
3979 #define _T2CKPS1 0x02
3980 #define _TMR2ON 0x04
3981 #define _T2OUTPS0 0x08
3982 #define _T2OUTPS1 0x10
3983 #define _T2OUTPS2 0x20
3984 #define _T2OUTPS3 0x40
3985
3986 //==============================================================================
3987
3988 extern __at(0x0FCB) __sfr PR2;
3989 extern __at(0x0FCC) __sfr TMR2;
3990
3991 //==============================================================================
3992 // T1CON Bits
3993
3994 extern __at(0x0FCD) __sfr T1CON;
3995
3996 typedef union
3997 {
3998 struct
3999 {
4000 unsigned TMR1ON : 1;
4001 unsigned TMR1CS : 1;
4002 unsigned NOT_T1SYNC : 1;
4003 unsigned T1OSCEN : 1;
4004 unsigned T1CKPS0 : 1;
4005 unsigned T1CKPS1 : 1;
4006 unsigned : 1;
4007 unsigned RD16 : 1;
4008 };
4009
4010 struct
4011 {
4012 unsigned : 1;
4013 unsigned : 1;
4014 unsigned T1SYNC : 1;
4015 unsigned : 1;
4016 unsigned : 1;
4017 unsigned : 1;
4018 unsigned : 1;
4019 unsigned : 1;
4020 };
4021
4022 struct
4023 {
4024 unsigned : 1;
4025 unsigned : 1;
4026 unsigned T1INSYNC : 1;
4027 unsigned : 1;
4028 unsigned : 1;
4029 unsigned : 1;
4030 unsigned : 1;
4031 unsigned : 1;
4032 };
4033
4034 struct
4035 {
4036 unsigned : 4;
4037 unsigned T1CKPS : 2;
4038 unsigned : 2;
4039 };
4040 } __T1CONbits_t;
4041
4042 extern __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
4043
4044 #define _TMR1ON 0x01
4045 #define _TMR1CS 0x02
4046 #define _NOT_T1SYNC 0x04
4047 #define _T1SYNC 0x04
4048 #define _T1INSYNC 0x04
4049 #define _T1OSCEN 0x08
4050 #define _T1CKPS0 0x10
4051 #define _T1CKPS1 0x20
4052 #define _RD16 0x80
4053
4054 //==============================================================================
4055
4056 extern __at(0x0FCE) __sfr TMR1;
4057 extern __at(0x0FCE) __sfr TMR1L;
4058 extern __at(0x0FCF) __sfr TMR1H;
4059
4060 //==============================================================================
4061 // RCON Bits
4062
4063 extern __at(0x0FD0) __sfr RCON;
4064
4065 typedef union
4066 {
4067 struct
4068 {
4069 unsigned NOT_BOR : 1;
4070 unsigned NOT_POR : 1;
4071 unsigned NOT_PD : 1;
4072 unsigned NOT_TO : 1;
4073 unsigned NOT_RI : 1;
4074 unsigned : 1;
4075 unsigned : 1;
4076 unsigned IPEN : 1;
4077 };
4078
4079 struct
4080 {
4081 unsigned BOR : 1;
4082 unsigned POR : 1;
4083 unsigned PD : 1;
4084 unsigned TO : 1;
4085 unsigned RI : 1;
4086 unsigned : 1;
4087 unsigned : 1;
4088 unsigned NOT_IPEN : 1;
4089 };
4090 } __RCONbits_t;
4091
4092 extern __at(0x0FD0) volatile __RCONbits_t RCONbits;
4093
4094 #define _NOT_BOR 0x01
4095 #define _BOR 0x01
4096 #define _NOT_POR 0x02
4097 #define _POR 0x02
4098 #define _NOT_PD 0x04
4099 #define _PD 0x04
4100 #define _NOT_TO 0x08
4101 #define _TO 0x08
4102 #define _NOT_RI 0x10
4103 #define _RI 0x10
4104 #define _IPEN 0x80
4105 #define _NOT_IPEN 0x80
4106
4107 //==============================================================================
4108
4109
4110 //==============================================================================
4111 // WDTCON Bits
4112
4113 extern __at(0x0FD1) __sfr WDTCON;
4114
4115 typedef union
4116 {
4117 struct
4118 {
4119 unsigned SWDTEN : 1;
4120 unsigned : 1;
4121 unsigned : 1;
4122 unsigned : 1;
4123 unsigned : 1;
4124 unsigned : 1;
4125 unsigned : 1;
4126 unsigned : 1;
4127 };
4128
4129 struct
4130 {
4131 unsigned SWDTE : 1;
4132 unsigned : 1;
4133 unsigned : 1;
4134 unsigned : 1;
4135 unsigned : 1;
4136 unsigned : 1;
4137 unsigned : 1;
4138 unsigned : 1;
4139 };
4140 } __WDTCONbits_t;
4141
4142 extern __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
4143
4144 #define _SWDTEN 0x01
4145 #define _SWDTE 0x01
4146
4147 //==============================================================================
4148
4149
4150 //==============================================================================
4151 // LVDCON Bits
4152
4153 extern __at(0x0FD2) __sfr LVDCON;
4154
4155 typedef union
4156 {
4157 struct
4158 {
4159 unsigned LVDL0 : 1;
4160 unsigned LVDL1 : 1;
4161 unsigned LVDL2 : 1;
4162 unsigned LVDL3 : 1;
4163 unsigned LVDEN : 1;
4164 unsigned IRVST : 1;
4165 unsigned : 1;
4166 unsigned : 1;
4167 };
4168
4169 struct
4170 {
4171 unsigned LVV0 : 1;
4172 unsigned LVV1 : 1;
4173 unsigned LVV2 : 1;
4174 unsigned LVV3 : 1;
4175 unsigned : 1;
4176 unsigned BGST : 1;
4177 unsigned : 1;
4178 unsigned : 1;
4179 };
4180
4181 struct
4182 {
4183 unsigned LVV : 4;
4184 unsigned : 4;
4185 };
4186
4187 struct
4188 {
4189 unsigned LVDL : 4;
4190 unsigned : 4;
4191 };
4192 } __LVDCONbits_t;
4193
4194 extern __at(0x0FD2) volatile __LVDCONbits_t LVDCONbits;
4195
4196 #define _LVDL0 0x01
4197 #define _LVV0 0x01
4198 #define _LVDL1 0x02
4199 #define _LVV1 0x02
4200 #define _LVDL2 0x04
4201 #define _LVV2 0x04
4202 #define _LVDL3 0x08
4203 #define _LVV3 0x08
4204 #define _LVDEN 0x10
4205 #define _IRVST 0x20
4206 #define _BGST 0x20
4207
4208 //==============================================================================
4209
4210
4211 //==============================================================================
4212 // OSCCON Bits
4213
4214 extern __at(0x0FD3) __sfr OSCCON;
4215
4216 typedef struct
4217 {
4218 unsigned SCS : 1;
4219 unsigned : 1;
4220 unsigned : 1;
4221 unsigned : 1;
4222 unsigned : 1;
4223 unsigned : 1;
4224 unsigned : 1;
4225 unsigned : 1;
4226 } __OSCCONbits_t;
4227
4228 extern __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
4229
4230 #define _SCS 0x01
4231
4232 //==============================================================================
4233
4234
4235 //==============================================================================
4236 // T0CON Bits
4237
4238 extern __at(0x0FD5) __sfr T0CON;
4239
4240 typedef union
4241 {
4242 struct
4243 {
4244 unsigned T0PS0 : 1;
4245 unsigned T0PS1 : 1;
4246 unsigned T0PS2 : 1;
4247 unsigned PSA : 1;
4248 unsigned T0SE : 1;
4249 unsigned T0CS : 1;
4250 unsigned T08BIT : 1;
4251 unsigned TMR0ON : 1;
4252 };
4253
4254 struct
4255 {
4256 unsigned T0PS : 3;
4257 unsigned : 5;
4258 };
4259 } __T0CONbits_t;
4260
4261 extern __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
4262
4263 #define _T0PS0 0x01
4264 #define _T0PS1 0x02
4265 #define _T0PS2 0x04
4266 #define _PSA 0x08
4267 #define _T0SE 0x10
4268 #define _T0CS 0x20
4269 #define _T08BIT 0x40
4270 #define _TMR0ON 0x80
4271
4272 //==============================================================================
4273
4274 extern __at(0x0FD6) __sfr TMR0;
4275 extern __at(0x0FD6) __sfr TMR0L;
4276 extern __at(0x0FD7) __sfr TMR0H;
4277
4278 //==============================================================================
4279 // STATUS Bits
4280
4281 extern __at(0x0FD8) __sfr STATUS;
4282
4283 typedef struct
4284 {
4285 unsigned C : 1;
4286 unsigned DC : 1;
4287 unsigned Z : 1;
4288 unsigned OV : 1;
4289 unsigned N : 1;
4290 unsigned : 1;
4291 unsigned : 1;
4292 unsigned : 1;
4293 } __STATUSbits_t;
4294
4295 extern __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
4296
4297 #define _C 0x01
4298 #define _DC 0x02
4299 #define _Z 0x04
4300 #define _OV 0x08
4301 #define _N 0x10
4302
4303 //==============================================================================
4304
4305 extern __at(0x0FD9) __sfr FSR2L;
4306 extern __at(0x0FDA) __sfr FSR2H;
4307 extern __at(0x0FDB) __sfr PLUSW2;
4308 extern __at(0x0FDC) __sfr PREINC2;
4309 extern __at(0x0FDD) __sfr POSTDEC2;
4310 extern __at(0x0FDE) __sfr POSTINC2;
4311 extern __at(0x0FDF) __sfr INDF2;
4312 extern __at(0x0FE0) __sfr BSR;
4313 extern __at(0x0FE1) __sfr FSR1L;
4314 extern __at(0x0FE2) __sfr FSR1H;
4315 extern __at(0x0FE3) __sfr PLUSW1;
4316 extern __at(0x0FE4) __sfr PREINC1;
4317 extern __at(0x0FE5) __sfr POSTDEC1;
4318 extern __at(0x0FE6) __sfr POSTINC1;
4319 extern __at(0x0FE7) __sfr INDF1;
4320 extern __at(0x0FE8) __sfr WREG;
4321 extern __at(0x0FE9) __sfr FSR0L;
4322 extern __at(0x0FEA) __sfr FSR0H;
4323 extern __at(0x0FEB) __sfr PLUSW0;
4324 extern __at(0x0FEC) __sfr PREINC0;
4325 extern __at(0x0FED) __sfr POSTDEC0;
4326 extern __at(0x0FEE) __sfr POSTINC0;
4327 extern __at(0x0FEF) __sfr INDF0;
4328
4329 //==============================================================================
4330 // INTCON3 Bits
4331
4332 extern __at(0x0FF0) __sfr INTCON3;
4333
4334 typedef union
4335 {
4336 struct
4337 {
4338 unsigned INT1IF : 1;
4339 unsigned INT2IF : 1;
4340 unsigned INT3IF : 1;
4341 unsigned INT1IE : 1;
4342 unsigned INT2IE : 1;
4343 unsigned INT3IE : 1;
4344 unsigned INT1IP : 1;
4345 unsigned INT2IP : 1;
4346 };
4347
4348 struct
4349 {
4350 unsigned INT1F : 1;
4351 unsigned INT2F : 1;
4352 unsigned INT3F : 1;
4353 unsigned INT1E : 1;
4354 unsigned INT2E : 1;
4355 unsigned INT3E : 1;
4356 unsigned INT1P : 1;
4357 unsigned INT2P : 1;
4358 };
4359 } __INTCON3bits_t;
4360
4361 extern __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
4362
4363 #define _INT1IF 0x01
4364 #define _INT1F 0x01
4365 #define _INT2IF 0x02
4366 #define _INT2F 0x02
4367 #define _INT3IF 0x04
4368 #define _INT3F 0x04
4369 #define _INT1IE 0x08
4370 #define _INT1E 0x08
4371 #define _INT2IE 0x10
4372 #define _INT2E 0x10
4373 #define _INT3IE 0x20
4374 #define _INT3E 0x20
4375 #define _INT1IP 0x40
4376 #define _INT1P 0x40
4377 #define _INT2IP 0x80
4378 #define _INT2P 0x80
4379
4380 //==============================================================================
4381
4382
4383 //==============================================================================
4384 // INTCON2 Bits
4385
4386 extern __at(0x0FF1) __sfr INTCON2;
4387
4388 typedef union
4389 {
4390 struct
4391 {
4392 unsigned RBIP : 1;
4393 unsigned INT3IP : 1;
4394 unsigned TMR0IP : 1;
4395 unsigned INTEDG3 : 1;
4396 unsigned INTEDG2 : 1;
4397 unsigned INTEDG1 : 1;
4398 unsigned INTEDG0 : 1;
4399 unsigned NOT_RBPU : 1;
4400 };
4401
4402 struct
4403 {
4404 unsigned : 1;
4405 unsigned INT3P : 1;
4406 unsigned T0IP : 1;
4407 unsigned : 1;
4408 unsigned : 1;
4409 unsigned : 1;
4410 unsigned : 1;
4411 unsigned RBPU : 1;
4412 };
4413 } __INTCON2bits_t;
4414
4415 extern __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
4416
4417 #define _RBIP 0x01
4418 #define _INT3IP 0x02
4419 #define _INT3P 0x02
4420 #define _TMR0IP 0x04
4421 #define _T0IP 0x04
4422 #define _INTEDG3 0x08
4423 #define _INTEDG2 0x10
4424 #define _INTEDG1 0x20
4425 #define _INTEDG0 0x40
4426 #define _NOT_RBPU 0x80
4427 #define _RBPU 0x80
4428
4429 //==============================================================================
4430
4431
4432 //==============================================================================
4433 // INTCON Bits
4434
4435 extern __at(0x0FF2) __sfr INTCON;
4436
4437 typedef union
4438 {
4439 struct
4440 {
4441 unsigned RBIF : 1;
4442 unsigned INT0IF : 1;
4443 unsigned TMR0IF : 1;
4444 unsigned RBIE : 1;
4445 unsigned INT0IE : 1;
4446 unsigned TMR0IE : 1;
4447 unsigned PEIE_GIEL : 1;
4448 unsigned GIE_GIEH : 1;
4449 };
4450
4451 struct
4452 {
4453 unsigned : 1;
4454 unsigned INT0F : 1;
4455 unsigned T0IF : 1;
4456 unsigned : 1;
4457 unsigned INT0E : 1;
4458 unsigned T0IE : 1;
4459 unsigned PEIE : 1;
4460 unsigned GIE : 1;
4461 };
4462
4463 struct
4464 {
4465 unsigned : 1;
4466 unsigned : 1;
4467 unsigned : 1;
4468 unsigned : 1;
4469 unsigned : 1;
4470 unsigned : 1;
4471 unsigned GIEL : 1;
4472 unsigned GIEH : 1;
4473 };
4474 } __INTCONbits_t;
4475
4476 extern __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
4477
4478 #define _RBIF 0x01
4479 #define _INT0IF 0x02
4480 #define _INT0F 0x02
4481 #define _TMR0IF 0x04
4482 #define _T0IF 0x04
4483 #define _RBIE 0x08
4484 #define _INT0IE 0x10
4485 #define _INT0E 0x10
4486 #define _TMR0IE 0x20
4487 #define _T0IE 0x20
4488 #define _PEIE_GIEL 0x40
4489 #define _PEIE 0x40
4490 #define _GIEL 0x40
4491 #define _GIE_GIEH 0x80
4492 #define _GIE 0x80
4493 #define _GIEH 0x80
4494
4495 //==============================================================================
4496
4497
4498 //==============================================================================
4499 // INTCON1 Bits
4500
4501 extern __at(0x0FF2) __sfr INTCON1;
4502
4503 typedef union
4504 {
4505 struct
4506 {
4507 unsigned RBIF : 1;
4508 unsigned INT0IF : 1;
4509 unsigned TMR0IF : 1;
4510 unsigned RBIE : 1;
4511 unsigned INT0IE : 1;
4512 unsigned TMR0IE : 1;
4513 unsigned PEIE_GIEL : 1;
4514 unsigned GIE_GIEH : 1;
4515 };
4516
4517 struct
4518 {
4519 unsigned : 1;
4520 unsigned INT0F : 1;
4521 unsigned T0IF : 1;
4522 unsigned : 1;
4523 unsigned INT0E : 1;
4524 unsigned T0IE : 1;
4525 unsigned PEIE : 1;
4526 unsigned GIE : 1;
4527 };
4528
4529 struct
4530 {
4531 unsigned : 1;
4532 unsigned : 1;
4533 unsigned : 1;
4534 unsigned : 1;
4535 unsigned : 1;
4536 unsigned : 1;
4537 unsigned GIEL : 1;
4538 unsigned GIEH : 1;
4539 };
4540 } __INTCON1bits_t;
4541
4542 extern __at(0x0FF2) volatile __INTCON1bits_t INTCON1bits;
4543
4544 #define _INTCON1_RBIF 0x01
4545 #define _INTCON1_INT0IF 0x02
4546 #define _INTCON1_INT0F 0x02
4547 #define _INTCON1_TMR0IF 0x04
4548 #define _INTCON1_T0IF 0x04
4549 #define _INTCON1_RBIE 0x08
4550 #define _INTCON1_INT0IE 0x10
4551 #define _INTCON1_INT0E 0x10
4552 #define _INTCON1_TMR0IE 0x20
4553 #define _INTCON1_T0IE 0x20
4554 #define _INTCON1_PEIE_GIEL 0x40
4555 #define _INTCON1_PEIE 0x40
4556 #define _INTCON1_GIEL 0x40
4557 #define _INTCON1_GIE_GIEH 0x80
4558 #define _INTCON1_GIE 0x80
4559 #define _INTCON1_GIEH 0x80
4560
4561 //==============================================================================
4562
4563 extern __at(0x0FF3) __sfr PROD;
4564 extern __at(0x0FF3) __sfr PRODL;
4565 extern __at(0x0FF4) __sfr PRODH;
4566 extern __at(0x0FF5) __sfr TABLAT;
4567 extern __at(0x0FF6) __sfr TBLPTR;
4568 extern __at(0x0FF6) __sfr TBLPTRL;
4569 extern __at(0x0FF7) __sfr TBLPTRH;
4570 extern __at(0x0FF8) __sfr TBLPTRU;
4571 extern __at(0x0FF9) __sfr PC;
4572 extern __at(0x0FF9) __sfr PCL;
4573 extern __at(0x0FFA) __sfr PCLATH;
4574 extern __at(0x0FFB) __sfr PCLATU;
4575
4576 //==============================================================================
4577 // STKPTR Bits
4578
4579 extern __at(0x0FFC) __sfr STKPTR;
4580
4581 typedef union
4582 {
4583 struct
4584 {
4585 unsigned STKPTR0 : 1;
4586 unsigned STKPTR1 : 1;
4587 unsigned STKPTR2 : 1;
4588 unsigned STKPTR3 : 1;
4589 unsigned STKPTR4 : 1;
4590 unsigned : 1;
4591 unsigned STKUNF : 1;
4592 unsigned STKFUL : 1;
4593 };
4594
4595 struct
4596 {
4597 unsigned SP0 : 1;
4598 unsigned SP1 : 1;
4599 unsigned SP2 : 1;
4600 unsigned SP3 : 1;
4601 unsigned SP4 : 1;
4602 unsigned : 1;
4603 unsigned : 1;
4604 unsigned STKOVF : 1;
4605 };
4606
4607 struct
4608 {
4609 unsigned SP : 5;
4610 unsigned : 3;
4611 };
4612
4613 struct
4614 {
4615 unsigned STKPTR : 5;
4616 unsigned : 3;
4617 };
4618 } __STKPTRbits_t;
4619
4620 extern __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
4621
4622 #define _STKPTR0 0x01
4623 #define _SP0 0x01
4624 #define _STKPTR1 0x02
4625 #define _SP1 0x02
4626 #define _STKPTR2 0x04
4627 #define _SP2 0x04
4628 #define _STKPTR3 0x08
4629 #define _SP3 0x08
4630 #define _STKPTR4 0x10
4631 #define _SP4 0x10
4632 #define _STKUNF 0x40
4633 #define _STKFUL 0x80
4634 #define _STKOVF 0x80
4635
4636 //==============================================================================
4637
4638 extern __at(0x0FFD) __sfr TOS;
4639 extern __at(0x0FFD) __sfr TOSL;
4640 extern __at(0x0FFE) __sfr TOSH;
4641 extern __at(0x0FFF) __sfr TOSU;
4642
4643 //==============================================================================
4644 //
4645 // Configuration Bits
4646 //
4647 //==============================================================================
4648
4649 #define __CONFIG1H 0x300001
4650 #define __CONFIG2L 0x300002
4651 #define __CONFIG2H 0x300003
4652 #define __CONFIG3L 0x300004
4653 #define __CONFIG3H 0x300005
4654 #define __CONFIG4L 0x300006
4655 #define __CONFIG5L 0x300008
4656 #define __CONFIG5H 0x300009
4657 #define __CONFIG6L 0x30000A
4658 #define __CONFIG6H 0x30000B
4659 #define __CONFIG7L 0x30000C
4660 #define __CONFIG7H 0x30000D
4661
4662 //----------------------------- CONFIG1H Options -------------------------------
4663
4664 #define _LP_OSC 0xF8 // LP oscillator.
4665 #define _OSC_LP_1H 0xF8 // LP oscillator.
4666 #define _XT_OSC 0xF9 // XT oscillator.
4667 #define _OSC_XT_1H 0xF9 // XT oscillator.
4668 #define _HS_OSC 0xFA // HS oscillator.
4669 #define _OSC_HS_1H 0xFA // HS oscillator.
4670 #define _RC_OSC 0xFB // RC oscillator w/ OSC2 configured as divide-by-4 clock output.
4671 #define _OSC_RC_1H 0xFB // RC oscillator w/ OSC2 configured as divide-by-4 clock output.
4672 #define _EC_OSC 0xFC // EC oscillator w/ OSC2 configured as divide-by-4 clock output.
4673 #define _OSC_EC_1H 0xFC // EC oscillator w/ OSC2 configured as divide-by-4 clock output.
4674 #define _ECIO_OSC 0xFD // EC oscillator w/ OSC2 configured as RA6.
4675 #define _OSC_ECIO_1H 0xFD // EC oscillator w/ OSC2 configured as RA6.
4676 #define _HSPLL_OSC 0xFE // HS oscillator with PLL enabled; clock frequency = (4 x FOSC).
4677 #define _OSC_HSPLL_1H 0xFE // HS oscillator with PLL enabled; clock frequency = (4 x FOSC).
4678 #define _RCIO_OSC 0xFF // RC oscillator w/ OSC2 configured as RA6.
4679 #define _OSC_RCIO_1H 0xFF // RC oscillator w/ OSC2 configured as RA6.
4680 #define _OSCS_ON_1H 0xDF // Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled).
4681 #define _OSCS_OFF_1H 0xFF // Oscillator system clock switch option is disabled (main oscillator is source).
4682
4683 //----------------------------- CONFIG2L Options -------------------------------
4684
4685 #define _PWRT_ON_2L 0xFE // PWRT enabled.
4686 #define _PWRT_OFF_2L 0xFF // PWRT disabled.
4687 #define _BOR_OFF_2L 0xFD // Brown-out Reset disabled.
4688 #define _BOR_ON_2L 0xFF // Brown-out Reset enabled.
4689 #define _BORV_45_2L 0xF3 // VBOR set to 4.5V.
4690 #define _BORV_42_2L 0xF7 // VBOR set to 4.2V.
4691 #define _BORV_27_2L 0xFB // VBOR set to 2.7V.
4692 #define _BORV_20 0xFF // VBOR set to 2.5V.
4693 #define _BORV_25_2L 0xFF // VBOR set to 2.5V.
4694
4695 //----------------------------- CONFIG2H Options -------------------------------
4696
4697 #define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit).
4698 #define _WDT_ON_2H 0xFF // WDT enabled.
4699 #define _WDTPS_1_2H 0xF1 // 1:1.
4700 #define _WDTPS_2_2H 0xF3 // 1:2.
4701 #define _WDTPS_4_2H 0xF5 // 1:4.
4702 #define _WDTPS_8_2H 0xF7 // 1:8.
4703 #define _WDTPS_16_2H 0xF9 // 1:16.
4704 #define _WDTPS_32_2H 0xFB // 1:32.
4705 #define _WDTPS_64_2H 0xFD // 1:64.
4706 #define _WDTPS_128_2H 0xFF // 1:128.
4707
4708 //----------------------------- CONFIG3L Options -------------------------------
4709
4710 #define _XMC_MODE 0xFC // Extended Microcontroller mode.
4711 #define _MODE_EM_3L 0xFC // Extended Microcontroller mode.
4712 #define _MPB_MODE 0xFD // Microprocessor with Boot Block mode.
4713 #define _MODE_MPB_3L 0xFD // Microprocessor with Boot Block mode.
4714 #define _MP_MODE 0xFE // Microprocessor mode.
4715 #define _MODE_MP_3L 0xFE // Microprocessor mode.
4716 #define _MC_MODE 0xFF // Microcontroller mode.
4717 #define _MODE_MC_3L 0xFF // Microcontroller mode.
4718 #define _WAIT_ON_3L 0x7F // Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>).
4719 #define _WAIT_OFF_3L 0xFF // Wait selections unavailable for table reads and table writes.
4720
4721 //----------------------------- CONFIG3H Options -------------------------------
4722
4723 #define _CCP2MX_RE7 0xFE // CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.
4724 #define _CCP2MX_OFF 0xFE // CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.
4725 #define _CCP2MUX_OFF_3H 0xFE // CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.
4726 #define _CCP2MX_RE7_3H 0xFE // CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.
4727 #define _CCP2MUX_RE7_3H 0xFE // CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.
4728 #define _CCP2MX_RC1 0xFF // CCP2 input/output is multiplexed with RC1.
4729 #define _CCP2MX_ON 0xFF // CCP2 input/output is multiplexed with RC1.
4730 #define _CCP2MUX_ON_3H 0xFF // CCP2 input/output is multiplexed with RC1.
4731 #define _CCP2MX_RC1_3H 0xFF // CCP2 input/output is multiplexed with RC1.
4732 #define _CCP2MUX_RC1_3H 0xFF // CCP2 input/output is multiplexed with RC1.
4733
4734 //----------------------------- CONFIG4L Options -------------------------------
4735
4736 #define _STVR_OFF_4L 0xFE // Stack full/underflow will not cause Reset.
4737 #define _STVR_ON_4L 0xFF // Stack full/underflow will cause Reset.
4738 #define _LVP_OFF_4L 0xFB // Low-voltage ICSP disabled.
4739 #define _LVP_ON_4L 0xFF // Low-voltage ICSP enabled.
4740 #define _DEBUG_ON_4L 0x7F // Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
4741 #define _DEBUG_OFF_4L 0xFF // Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
4742
4743 //----------------------------- CONFIG5L Options -------------------------------
4744
4745 #define _CP0_ON_5L 0xFE // Block 0 (000800-001FFFh) code-protected.
4746 #define _CP0_OFF_5L 0xFF // Block 0 (000800-001FFFh) not code-protected.
4747 #define _CP1_ON_5L 0xFD // Block 1 (002000-003FFFh) code-protected.
4748 #define _CP1_OFF_5L 0xFF // Block 1 (002000-003FFFh) not code-protected.
4749 #define _CP2_ON_5L 0xFB // Block 2 (004000-005FFFh) code-protected.
4750 #define _CP2_OFF_5L 0xFF // Block 2 (004000-005FFFh) not code-protected.
4751 #define _CP3_ON_5L 0xF7 // Block 3 (006000-007FFFh) code-protected.
4752 #define _CP3_OFF_5L 0xFF // Block 3 (006000-007FFFh) not code-protected.
4753
4754 //----------------------------- CONFIG5H Options -------------------------------
4755
4756 #define _CPB_ON_5H 0xBF // Boot Block (000000-0007FFh) code-protected.
4757 #define _CPB_OFF_5H 0xFF // Boot Block (000000-0007FFh) not code-protected.
4758 #define _CPD_ON_5H 0x7F // Data EEPROM code-protected.
4759 #define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected.
4760
4761 //----------------------------- CONFIG6L Options -------------------------------
4762
4763 #define _WRT0_ON_6L 0xFE // Block 0 (000800-001FFFh) write-protected.
4764 #define _WRT0_OFF_6L 0xFF // Block 0 (000800-001FFFh) not write-protected.
4765 #define _WRT1_ON_6L 0xFD // Block 1 (002000-003FFFh) write-protected.
4766 #define _WRT1_OFF_6L 0xFF // Block 1 (002000-003FFFh) not write-protected.
4767 #define _WRT2_ON_6L 0xFB // Block 2 (004000-005FFFh) write-protected.
4768 #define _WRT2_OFF_6L 0xFF // Block 2 (004000-005FFFh) not write-protected.
4769 #define _WRT3_ON_6L 0xF7 // Block 3 (006000-007FFFh) write-protected.
4770 #define _WRT3_OFF_6L 0xFF // Block 3 (006000-007FFFh) not write-protected.
4771
4772 //----------------------------- CONFIG6H Options -------------------------------
4773
4774 #define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected.
4775 #define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected.
4776 #define _WRTB_ON_6H 0xBF // Boot Block (000000-0007FFh) write-protected.
4777 #define _WRTB_OFF_6H 0xFF // Boot Block (000000-0007FFh) not write-protected.
4778 #define _WRTD_ON_6H 0x7F // Data EEPROM write-protected.
4779 #define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected.
4780
4781 //----------------------------- CONFIG7L Options -------------------------------
4782
4783 #define _EBTR0_ON_7L 0xFE // Block 0 (000800-001FFFh) protected from table reads executed in other blocks.
4784 #define _EBTR0_OFF_7L 0xFF // Block 0 (000800-001FFFh) not protected from table reads executed in other blocks.
4785 #define _EBTR1_ON_7L 0xFD // Block 1 (002000-003FFFh) protected from table reads executed in other blocks.
4786 #define _EBTR1_OFF_7L 0xFF // Block 1 (002000-003FFFh) not protected from table reads executed in other blocks.
4787 #define _EBTR2_ON_7L 0xFB // Block 2 (004000-005FFFh) protected from table reads executed in other blocks.
4788 #define _EBTR2_OFF_7L 0xFF // Block 2 (004000-005FFFh) not protected from table reads executed in other blocks.
4789 #define _EBTR3_ON_7L 0xF7 // Block 3 (006000-007FFFh) protected from table reads executed in other blocks.
4790 #define _EBTR3_OFF_7L 0xFF // Block 3 (006000-007FFFh) not protected from table reads executed in other blocks.
4791
4792 //----------------------------- CONFIG7H Options -------------------------------
4793
4794 #define _EBTRB_ON_7H 0xBF // Boot Block (000000-0007FFh) protected from table reads executed in other blocks.
4795 #define _EBTRB_OFF_7H 0xFF // Boot Block (000000-0007FFh) not protected from table reads executed in other blocks.
4796
4797 //==============================================================================
4798
4799 #define __DEVID1 0x3FFFFE
4800 #define __DEVID2 0x3FFFFF
4801
4802 #define __IDLOC0 0x200000
4803 #define __IDLOC1 0x200001
4804 #define __IDLOC2 0x200002
4805 #define __IDLOC3 0x200003
4806 #define __IDLOC4 0x200004
4807 #define __IDLOC5 0x200005
4808 #define __IDLOC6 0x200006
4809 #define __IDLOC7 0x200007
4810
4811 #endif // #ifndef __PIC18F8520_H__
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