Prepare for SDCC 4.5.0 release.
[sdcc.git] / sdcc / device / non-free / lib / pic14 / libdev / pic16f630.c
blob773fbf7ccca991076992852f2fead51dbce61046
1 /*
2 * This definitions of the PIC16F630 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #include <pic16f630.h>
27 //==============================================================================
29 __at(0x0000) __sfr INDF;
31 __at(0x0001) __sfr TMR0;
33 __at(0x0002) __sfr PCL;
35 __at(0x0003) __sfr STATUS;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
38 __at(0x0004) __sfr FSR;
40 __at(0x0005) __sfr PORTA;
41 __at(0x0005) volatile __PORTAbits_t PORTAbits;
43 __at(0x0007) __sfr PORTC;
44 __at(0x0007) volatile __PORTCbits_t PORTCbits;
46 __at(0x000A) __sfr PCLATH;
48 __at(0x000B) __sfr INTCON;
49 __at(0x000B) volatile __INTCONbits_t INTCONbits;
51 __at(0x000C) __sfr PIR1;
52 __at(0x000C) volatile __PIR1bits_t PIR1bits;
54 __at(0x000E) __sfr TMR1;
56 __at(0x000E) __sfr TMR1L;
58 __at(0x000F) __sfr TMR1H;
60 __at(0x0010) __sfr T1CON;
61 __at(0x0010) volatile __T1CONbits_t T1CONbits;
63 __at(0x0019) __sfr CMCON;
64 __at(0x0019) volatile __CMCONbits_t CMCONbits;
66 __at(0x0081) __sfr OPTION_REG;
67 __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
69 __at(0x0085) __sfr TRISA;
70 __at(0x0085) volatile __TRISAbits_t TRISAbits;
72 __at(0x0087) __sfr TRISC;
73 __at(0x0087) volatile __TRISCbits_t TRISCbits;
75 __at(0x008C) __sfr PIE1;
76 __at(0x008C) volatile __PIE1bits_t PIE1bits;
78 __at(0x008E) __sfr PCON;
79 __at(0x008E) volatile __PCONbits_t PCONbits;
81 __at(0x0090) __sfr OSCCAL;
82 __at(0x0090) volatile __OSCCALbits_t OSCCALbits;
84 __at(0x0095) __sfr WPU;
85 __at(0x0095) volatile __WPUbits_t WPUbits;
87 __at(0x0095) __sfr WPUA;
88 __at(0x0095) volatile __WPUAbits_t WPUAbits;
90 __at(0x0096) __sfr IOC;
91 __at(0x0096) volatile __IOCbits_t IOCbits;
93 __at(0x0096) __sfr IOCA;
94 __at(0x0096) volatile __IOCAbits_t IOCAbits;
96 __at(0x0099) __sfr VRCON;
97 __at(0x0099) volatile __VRCONbits_t VRCONbits;
99 __at(0x009A) __sfr EEDAT;
101 __at(0x009A) __sfr EEDATA;
103 __at(0x009B) __sfr EEADR;
105 __at(0x009C) __sfr EECON1;
106 __at(0x009C) volatile __EECON1bits_t EECON1bits;
108 __at(0x009D) __sfr EECON2;