sdcc/device/non-free/lib/pic16/libdev/pic18f65k22.c

   1 /*
   2  * This definitions of the PIC18F65K22 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:32 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic18f65k22.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0F16) __sfr PMD3;
  30 __at(0x0F16) volatile __PMD3bits_t PMD3bits;
  31
  32 __at(0x0F17) __sfr PMD2;
  33 __at(0x0F17) volatile __PMD2bits_t PMD2bits;
  34
  35 __at(0x0F18) __sfr PMD1;
  36 __at(0x0F18) volatile __PMD1bits_t PMD1bits;
  37
  38 __at(0x0F19) __sfr PMD0;
  39 __at(0x0F19) volatile __PMD0bits_t PMD0bits;
  40
  41 __at(0x0F1A) __sfr PSTR3CON;
  42 __at(0x0F1A) volatile __PSTR3CONbits_t PSTR3CONbits;
  43
  44 __at(0x0F1B) __sfr PSTR2CON;
  45 __at(0x0F1B) volatile __PSTR2CONbits_t PSTR2CONbits;
  46
  47 __at(0x0F1C) __sfr TXREG2;
  48
  49 __at(0x0F1D) __sfr RCREG2;
  50
  51 __at(0x0F1E) __sfr SPBRG2;
  52
  53 __at(0x0F1F) __sfr SPBRGH2;
  54
  55 __at(0x0F20) __sfr BAUDCON2;
  56 __at(0x0F20) volatile __BAUDCON2bits_t BAUDCON2bits;
  57
  58 __at(0x0F21) __sfr TXSTA2;
  59 __at(0x0F21) volatile __TXSTA2bits_t TXSTA2bits;
  60
  61 __at(0x0F22) __sfr RCSTA2;
  62 __at(0x0F22) volatile __RCSTA2bits_t RCSTA2bits;
  63
  64 __at(0x0F23) __sfr ANCON2;
  65 __at(0x0F23) volatile __ANCON2bits_t ANCON2bits;
  66
  67 __at(0x0F24) __sfr ANCON1;
  68 __at(0x0F24) volatile __ANCON1bits_t ANCON1bits;
  69
  70 __at(0x0F25) __sfr ANCON0;
  71 __at(0x0F25) volatile __ANCON0bits_t ANCON0bits;
  72
  73 __at(0x0F27) __sfr ODCON3;
  74 __at(0x0F27) volatile __ODCON3bits_t ODCON3bits;
  75
  76 __at(0x0F28) __sfr ODCON2;
  77 __at(0x0F28) volatile __ODCON2bits_t ODCON2bits;
  78
  79 __at(0x0F29) __sfr ODCON1;
  80 __at(0x0F29) volatile __ODCON1bits_t ODCON1bits;
  81
  82 __at(0x0F2A) __sfr REFOCON;
  83 __at(0x0F2A) volatile __REFOCONbits_t REFOCONbits;
  84
  85 __at(0x0F2B) __sfr CCPTMRS2;
  86 __at(0x0F2B) volatile __CCPTMRS2bits_t CCPTMRS2bits;
  87
  88 __at(0x0F2C) __sfr CCPTMRS1;
  89 __at(0x0F2C) volatile __CCPTMRS1bits_t CCPTMRS1bits;
  90
  91 __at(0x0F2D) __sfr CCPTMRS0;
  92 __at(0x0F2D) volatile __CCPTMRS0bits_t CCPTMRS0bits;
  93
  94 __at(0x0F2E) __sfr CM3CON;
  95 __at(0x0F2E) volatile __CM3CONbits_t CM3CONbits;
  96
  97 __at(0x0F2E) __sfr CM3CON1;
  98 __at(0x0F2E) volatile __CM3CON1bits_t CM3CON1bits;
  99
 100 __at(0x0F2F) __sfr CM2CON;
 101 __at(0x0F2F) volatile __CM2CONbits_t CM2CONbits;
 102
 103 __at(0x0F2F) __sfr CM2CON1;
 104 __at(0x0F2F) volatile __CM2CON1bits_t CM2CON1bits;
 105
 106 __at(0x0F36) __sfr T8CON;
 107 __at(0x0F36) volatile __T8CONbits_t T8CONbits;
 108
 109 __at(0x0F37) __sfr PR8;
 110
 111 __at(0x0F38) __sfr TMR8;
 112
 113 __at(0x0F39) __sfr T6CON;
 114 __at(0x0F39) volatile __T6CONbits_t T6CONbits;
 115
 116 __at(0x0F3A) __sfr PR6;
 117
 118 __at(0x0F3B) __sfr TMR6;
 119
 120 __at(0x0F46) __sfr CCP8CON;
 121 __at(0x0F46) volatile __CCP8CONbits_t CCP8CONbits;
 122
 123 __at(0x0F47) __sfr CCPR8;
 124
 125 __at(0x0F47) __sfr CCPR8L;
 126
 127 __at(0x0F48) __sfr CCPR8H;
 128
 129 __at(0x0F49) __sfr CCP3CON;
 130 __at(0x0F49) volatile __CCP3CONbits_t CCP3CONbits;
 131
 132 __at(0x0F4A) __sfr CCPR3;
 133
 134 __at(0x0F4A) __sfr CCPR3L;
 135
 136 __at(0x0F4B) __sfr CCPR3H;
 137
 138 __at(0x0F4C) __sfr ECCP3DEL;
 139 __at(0x0F4C) volatile __ECCP3DELbits_t ECCP3DELbits;
 140
 141 __at(0x0F4D) __sfr ECCP3AS;
 142 __at(0x0F4D) volatile __ECCP3ASbits_t ECCP3ASbits;
 143
 144 __at(0x0F4E) __sfr CCP2CON;
 145 __at(0x0F4E) volatile __CCP2CONbits_t CCP2CONbits;
 146
 147 __at(0x0F4E) __sfr ECCP2CON;
 148 __at(0x0F4E) volatile __ECCP2CONbits_t ECCP2CONbits;
 149
 150 __at(0x0F4F) __sfr CCPR2;
 151
 152 __at(0x0F4F) __sfr CCPR2L;
 153
 154 __at(0x0F50) __sfr CCPR2H;
 155
 156 __at(0x0F51) __sfr ECCP2DEL;
 157 __at(0x0F51) volatile __ECCP2DELbits_t ECCP2DELbits;
 158
 159 __at(0x0F51) __sfr PWM2CON;
 160 __at(0x0F51) volatile __PWM2CONbits_t PWM2CONbits;
 161
 162 __at(0x0F52) __sfr ECCP2AS;
 163 __at(0x0F52) volatile __ECCP2ASbits_t ECCP2ASbits;
 164
 165 __at(0x0F53) __sfr PADCFG1;
 166 __at(0x0F53) volatile __PADCFG1bits_t PADCFG1bits;
 167
 168 __at(0x0F54) __sfr CM1CON;
 169 __at(0x0F54) volatile __CM1CONbits_t CM1CONbits;
 170
 171 __at(0x0F54) __sfr CM1CON1;
 172 __at(0x0F54) volatile __CM1CON1bits_t CM1CON1bits;
 173
 174 __at(0x0F55) __sfr CTMUICON;
 175 __at(0x0F55) volatile __CTMUICONbits_t CTMUICONbits;
 176
 177 __at(0x0F56) __sfr CTMUCONL;
 178 __at(0x0F56) volatile __CTMUCONLbits_t CTMUCONLbits;
 179
 180 __at(0x0F57) __sfr CTMUCONH;
 181 __at(0x0F57) volatile __CTMUCONHbits_t CTMUCONHbits;
 182
 183 __at(0x0F58) __sfr ALRMVAL;
 184
 185 __at(0x0F58) __sfr ALRMVALL;
 186
 187 __at(0x0F59) __sfr ALRMVALH;
 188
 189 __at(0x0F5A) __sfr ALRMRPT;
 190 __at(0x0F5A) volatile __ALRMRPTbits_t ALRMRPTbits;
 191
 192 __at(0x0F5B) __sfr ALRMCFG;
 193 __at(0x0F5B) volatile __ALRMCFGbits_t ALRMCFGbits;
 194
 195 __at(0x0F5C) __sfr RTCVAL;
 196
 197 __at(0x0F5C) __sfr RTCVALL;
 198
 199 __at(0x0F5D) __sfr RTCVALH;
 200
 201 __at(0x0F5E) __sfr RTCCAL;
 202 __at(0x0F5E) volatile __RTCCALbits_t RTCCALbits;
 203
 204 __at(0x0F5F) __sfr RTCCFG;
 205 __at(0x0F5F) volatile __RTCCFGbits_t RTCCFGbits;
 206
 207 __at(0x0F60) __sfr PIE6;
 208 __at(0x0F60) volatile __PIE6bits_t PIE6bits;
 209
 210 __at(0x0F61) __sfr EEDATA;
 211
 212 __at(0x0F62) __sfr EEADR;
 213
 214 __at(0x0F63) __sfr EEADRH;
 215
 216 __at(0x0F64) __sfr OSCCON2;
 217 __at(0x0F64) volatile __OSCCON2bits_t OSCCON2bits;
 218
 219 __at(0x0F65) __sfr BAUDCON;
 220 __at(0x0F65) volatile __BAUDCONbits_t BAUDCONbits;
 221
 222 __at(0x0F65) __sfr BAUDCON1;
 223 __at(0x0F65) volatile __BAUDCON1bits_t BAUDCON1bits;
 224
 225 __at(0x0F65) __sfr BAUDCTL;
 226 __at(0x0F65) volatile __BAUDCTLbits_t BAUDCTLbits;
 227
 228 __at(0x0F66) __sfr SSP2CON2;
 229 __at(0x0F66) volatile __SSP2CON2bits_t SSP2CON2bits;
 230
 231 __at(0x0F67) __sfr SSP2CON1;
 232 __at(0x0F67) volatile __SSP2CON1bits_t SSP2CON1bits;
 233
 234 __at(0x0F68) __sfr SSP2STAT;
 235 __at(0x0F68) volatile __SSP2STATbits_t SSP2STATbits;
 236
 237 __at(0x0F69) __sfr SSP2ADD;
 238
 239 __at(0x0F69) __sfr SSP2MSK;
 240 __at(0x0F69) volatile __SSP2MSKbits_t SSP2MSKbits;
 241
 242 __at(0x0F6A) __sfr SSP2BUF;
 243
 244 __at(0x0F6B) __sfr T4CON;
 245 __at(0x0F6B) volatile __T4CONbits_t T4CONbits;
 246
 247 __at(0x0F6C) __sfr PR4;
 248
 249 __at(0x0F6D) __sfr TMR4;
 250
 251 __at(0x0F6E) __sfr CCP7CON;
 252 __at(0x0F6E) volatile __CCP7CONbits_t CCP7CONbits;
 253
 254 __at(0x0F6F) __sfr CCPR7;
 255
 256 __at(0x0F6F) __sfr CCPR7L;
 257
 258 __at(0x0F70) __sfr CCPR7H;
 259
 260 __at(0x0F71) __sfr CCP6CON;
 261 __at(0x0F71) volatile __CCP6CONbits_t CCP6CONbits;
 262
 263 __at(0x0F72) __sfr CCPR6;
 264
 265 __at(0x0F72) __sfr CCPR6L;
 266
 267 __at(0x0F73) __sfr CCPR6H;
 268
 269 __at(0x0F74) __sfr CCP5CON;
 270 __at(0x0F74) volatile __CCP5CONbits_t CCP5CONbits;
 271
 272 __at(0x0F75) __sfr CCPR5;
 273
 274 __at(0x0F75) __sfr CCPR5L;
 275
 276 __at(0x0F76) __sfr CCPR5H;
 277
 278 __at(0x0F77) __sfr CCP4CON;
 279 __at(0x0F77) volatile __CCP4CONbits_t CCP4CONbits;
 280
 281 __at(0x0F78) __sfr CCPR4;
 282
 283 __at(0x0F78) __sfr CCPR4L;
 284
 285 __at(0x0F79) __sfr CCPR4H;
 286
 287 __at(0x0F7A) __sfr T5GCON;
 288 __at(0x0F7A) volatile __T5GCONbits_t T5GCONbits;
 289
 290 __at(0x0F7B) __sfr T5CON;
 291 __at(0x0F7B) volatile __T5CONbits_t T5CONbits;
 292
 293 __at(0x0F7C) __sfr TMR5;
 294
 295 __at(0x0F7C) __sfr TMR5L;
 296
 297 __at(0x0F7D) __sfr TMR5H;
 298
 299 __at(0x0F7E) __sfr EECON2;
 300
 301 __at(0x0F7F) __sfr EECON1;
 302 __at(0x0F7F) volatile __EECON1bits_t EECON1bits;
 303
 304 __at(0x0F80) __sfr PORTA;
 305 __at(0x0F80) volatile __PORTAbits_t PORTAbits;
 306
 307 __at(0x0F81) __sfr PORTB;
 308 __at(0x0F81) volatile __PORTBbits_t PORTBbits;
 309
 310 __at(0x0F82) __sfr PORTC;
 311 __at(0x0F82) volatile __PORTCbits_t PORTCbits;
 312
 313 __at(0x0F83) __sfr PORTD;
 314 __at(0x0F83) volatile __PORTDbits_t PORTDbits;
 315
 316 __at(0x0F84) __sfr PORTE;
 317 __at(0x0F84) volatile __PORTEbits_t PORTEbits;
 318
 319 __at(0x0F85) __sfr PORTF;
 320 __at(0x0F85) volatile __PORTFbits_t PORTFbits;
 321
 322 __at(0x0F86) __sfr PORTG;
 323 __at(0x0F86) volatile __PORTGbits_t PORTGbits;
 324
 325 __at(0x0F89) __sfr LATA;
 326 __at(0x0F89) volatile __LATAbits_t LATAbits;
 327
 328 __at(0x0F8A) __sfr LATB;
 329 __at(0x0F8A) volatile __LATBbits_t LATBbits;
 330
 331 __at(0x0F8B) __sfr LATC;
 332 __at(0x0F8B) volatile __LATCbits_t LATCbits;
 333
 334 __at(0x0F8C) __sfr LATD;
 335 __at(0x0F8C) volatile __LATDbits_t LATDbits;
 336
 337 __at(0x0F8D) __sfr LATE;
 338 __at(0x0F8D) volatile __LATEbits_t LATEbits;
 339
 340 __at(0x0F8E) __sfr LATF;
 341 __at(0x0F8E) volatile __LATFbits_t LATFbits;
 342
 343 __at(0x0F8F) __sfr LATG;
 344 __at(0x0F8F) volatile __LATGbits_t LATGbits;
 345
 346 __at(0x0F92) __sfr TRISA;
 347 __at(0x0F92) volatile __TRISAbits_t TRISAbits;
 348
 349 __at(0x0F93) __sfr TRISB;
 350 __at(0x0F93) volatile __TRISBbits_t TRISBbits;
 351
 352 __at(0x0F94) __sfr TRISC;
 353 __at(0x0F94) volatile __TRISCbits_t TRISCbits;
 354
 355 __at(0x0F95) __sfr TRISD;
 356 __at(0x0F95) volatile __TRISDbits_t TRISDbits;
 357
 358 __at(0x0F96) __sfr TRISE;
 359 __at(0x0F96) volatile __TRISEbits_t TRISEbits;
 360
 361 __at(0x0F97) __sfr TRISF;
 362 __at(0x0F97) volatile __TRISFbits_t TRISFbits;
 363
 364 __at(0x0F98) __sfr TRISG;
 365 __at(0x0F98) volatile __TRISGbits_t TRISGbits;
 366
 367 __at(0x0F9B) __sfr OSCTUNE;
 368 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits;
 369
 370 __at(0x0F9C) __sfr PSTR1CON;
 371 __at(0x0F9C) volatile __PSTR1CONbits_t PSTR1CONbits;
 372
 373 __at(0x0F9D) __sfr PIE1;
 374 __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
 375
 376 __at(0x0F9E) __sfr PIR1;
 377 __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
 378
 379 __at(0x0F9F) __sfr IPR1;
 380 __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
 381
 382 __at(0x0FA0) __sfr PIE2;
 383 __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
 384
 385 __at(0x0FA1) __sfr PIR2;
 386 __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
 387
 388 __at(0x0FA2) __sfr IPR2;
 389 __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
 390
 391 __at(0x0FA3) __sfr PIE3;
 392 __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
 393
 394 __at(0x0FA4) __sfr PIR3;
 395 __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
 396
 397 __at(0x0FA5) __sfr IPR3;
 398 __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
 399
 400 __at(0x0FA6) __sfr PIR6;
 401 __at(0x0FA6) volatile __PIR6bits_t PIR6bits;
 402
 403 __at(0x0FA7) __sfr PSPCON;
 404 __at(0x0FA7) volatile __PSPCONbits_t PSPCONbits;
 405
 406 __at(0x0FA8) __sfr HLVDCON;
 407 __at(0x0FA8) volatile __HLVDCONbits_t HLVDCONbits;
 408
 409 __at(0x0FA9) __sfr IPR6;
 410 __at(0x0FA9) volatile __IPR6bits_t IPR6bits;
 411
 412 __at(0x0FAA) __sfr T1GCON;
 413 __at(0x0FAA) volatile __T1GCONbits_t T1GCONbits;
 414
 415 __at(0x0FAB) __sfr RCSTA;
 416 __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
 417
 418 __at(0x0FAB) __sfr RCSTA1;
 419 __at(0x0FAB) volatile __RCSTA1bits_t RCSTA1bits;
 420
 421 __at(0x0FAC) __sfr TXSTA;
 422 __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
 423
 424 __at(0x0FAC) __sfr TXSTA1;
 425 __at(0x0FAC) volatile __TXSTA1bits_t TXSTA1bits;
 426
 427 __at(0x0FAD) __sfr TXREG;
 428
 429 __at(0x0FAD) __sfr TXREG1;
 430
 431 __at(0x0FAE) __sfr RCREG;
 432
 433 __at(0x0FAE) __sfr RCREG1;
 434
 435 __at(0x0FAF) __sfr SPBRG;
 436
 437 __at(0x0FAF) __sfr SPBRG1;
 438
 439 __at(0x0FB0) __sfr T3GCON;
 440 __at(0x0FB0) volatile __T3GCONbits_t T3GCONbits;
 441
 442 __at(0x0FB1) __sfr T3CON;
 443 __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
 444
 445 __at(0x0FB2) __sfr TMR3;
 446
 447 __at(0x0FB2) __sfr TMR3L;
 448
 449 __at(0x0FB3) __sfr TMR3H;
 450
 451 __at(0x0FB4) __sfr CMSTAT;
 452 __at(0x0FB4) volatile __CMSTATbits_t CMSTATbits;
 453
 454 __at(0x0FB4) __sfr CMSTATUS;
 455 __at(0x0FB4) volatile __CMSTATUSbits_t CMSTATUSbits;
 456
 457 __at(0x0FB5) __sfr CVRCON;
 458 __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
 459
 460 __at(0x0FB6) __sfr PIE4;
 461 __at(0x0FB6) volatile __PIE4bits_t PIE4bits;
 462
 463 __at(0x0FB7) __sfr PIR4;
 464 __at(0x0FB7) volatile __PIR4bits_t PIR4bits;
 465
 466 __at(0x0FB8) __sfr IPR4;
 467 __at(0x0FB8) volatile __IPR4bits_t IPR4bits;
 468
 469 __at(0x0FB9) __sfr PIE5;
 470 __at(0x0FB9) volatile __PIE5bits_t PIE5bits;
 471
 472 __at(0x0FBA) __sfr PIR5;
 473 __at(0x0FBA) volatile __PIR5bits_t PIR5bits;
 474
 475 __at(0x0FBB) __sfr CCP1CON;
 476 __at(0x0FBB) volatile __CCP1CONbits_t CCP1CONbits;
 477
 478 __at(0x0FBB) __sfr ECCP1CON;
 479 __at(0x0FBB) volatile __ECCP1CONbits_t ECCP1CONbits;
 480
 481 __at(0x0FBC) __sfr CCPR1;
 482
 483 __at(0x0FBC) __sfr CCPR1L;
 484
 485 __at(0x0FBD) __sfr CCPR1H;
 486
 487 __at(0x0FBE) __sfr ECCP1DEL;
 488 __at(0x0FBE) volatile __ECCP1DELbits_t ECCP1DELbits;
 489
 490 __at(0x0FBE) __sfr PWM1CON;
 491 __at(0x0FBE) volatile __PWM1CONbits_t PWM1CONbits;
 492
 493 __at(0x0FBF) __sfr ECCP1AS;
 494 __at(0x0FBF) volatile __ECCP1ASbits_t ECCP1ASbits;
 495
 496 __at(0x0FC0) __sfr ADCON2;
 497 __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
 498
 499 __at(0x0FC1) __sfr ADCON1;
 500 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
 501
 502 __at(0x0FC2) __sfr ADCON0;
 503 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
 504
 505 __at(0x0FC3) __sfr ADRES;
 506
 507 __at(0x0FC3) __sfr ADRESL;
 508
 509 __at(0x0FC4) __sfr ADRESH;
 510
 511 __at(0x0FC5) __sfr SSP1CON2;
 512 __at(0x0FC5) volatile __SSP1CON2bits_t SSP1CON2bits;
 513
 514 __at(0x0FC5) __sfr SSPCON2;
 515 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
 516
 517 __at(0x0FC6) __sfr SSP1CON1;
 518 __at(0x0FC6) volatile __SSP1CON1bits_t SSP1CON1bits;
 519
 520 __at(0x0FC6) __sfr SSPCON1;
 521 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
 522
 523 __at(0x0FC7) __sfr SSP1STAT;
 524 __at(0x0FC7) volatile __SSP1STATbits_t SSP1STATbits;
 525
 526 __at(0x0FC7) __sfr SSPSTAT;
 527 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
 528
 529 __at(0x0FC8) __sfr SSP1ADD;
 530
 531 __at(0x0FC8) __sfr SSP1MSK;
 532 __at(0x0FC8) volatile __SSP1MSKbits_t SSP1MSKbits;
 533
 534 __at(0x0FC8) __sfr SSPADD;
 535
 536 __at(0x0FC9) __sfr SSP1BUF;
 537
 538 __at(0x0FC9) __sfr SSPBUF;
 539
 540 __at(0x0FCA) __sfr T2CON;
 541 __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
 542
 543 __at(0x0FCB) __sfr PR2;
 544
 545 __at(0x0FCC) __sfr TMR2;
 546
 547 __at(0x0FCD) __sfr T1CON;
 548 __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
 549
 550 __at(0x0FCE) __sfr TMR1;
 551
 552 __at(0x0FCE) __sfr TMR1L;
 553
 554 __at(0x0FCF) __sfr TMR1H;
 555
 556 __at(0x0FD0) __sfr RCON;
 557 __at(0x0FD0) volatile __RCONbits_t RCONbits;
 558
 559 __at(0x0FD1) __sfr WDTCON;
 560 __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
 561
 562 __at(0x0FD2) __sfr IPR5;
 563 __at(0x0FD2) volatile __IPR5bits_t IPR5bits;
 564
 565 __at(0x0FD3) __sfr OSCCON;
 566 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
 567
 568 __at(0x0FD4) __sfr SPBRGH1;
 569
 570 __at(0x0FD5) __sfr T0CON;
 571 __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
 572
 573 __at(0x0FD6) __sfr TMR0;
 574
 575 __at(0x0FD6) __sfr TMR0L;
 576
 577 __at(0x0FD7) __sfr TMR0H;
 578
 579 __at(0x0FD8) __sfr STATUS;
 580 __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
 581
 582 __at(0x0FD9) __sfr FSR2L;
 583
 584 __at(0x0FDA) __sfr FSR2H;
 585
 586 __at(0x0FDB) __sfr PLUSW2;
 587
 588 __at(0x0FDC) __sfr PREINC2;
 589
 590 __at(0x0FDD) __sfr POSTDEC2;
 591
 592 __at(0x0FDE) __sfr POSTINC2;
 593
 594 __at(0x0FDF) __sfr INDF2;
 595
 596 __at(0x0FE0) __sfr BSR;
 597
 598 __at(0x0FE1) __sfr FSR1L;
 599
 600 __at(0x0FE2) __sfr FSR1H;
 601
 602 __at(0x0FE3) __sfr PLUSW1;
 603
 604 __at(0x0FE4) __sfr PREINC1;
 605
 606 __at(0x0FE5) __sfr POSTDEC1;
 607
 608 __at(0x0FE6) __sfr POSTINC1;
 609
 610 __at(0x0FE7) __sfr INDF1;
 611
 612 __at(0x0FE8) __sfr WREG;
 613
 614 __at(0x0FE9) __sfr FSR0L;
 615
 616 __at(0x0FEA) __sfr FSR0H;
 617
 618 __at(0x0FEB) __sfr PLUSW0;
 619
 620 __at(0x0FEC) __sfr PREINC0;
 621
 622 __at(0x0FED) __sfr POSTDEC0;
 623
 624 __at(0x0FEE) __sfr POSTINC0;
 625
 626 __at(0x0FEF) __sfr INDF0;
 627
 628 __at(0x0FF0) __sfr INTCON3;
 629 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
 630
 631 __at(0x0FF1) __sfr INTCON2;
 632 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
 633
 634 __at(0x0FF2) __sfr INTCON;
 635 __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
 636
 637 __at(0x0FF3) __sfr PROD;
 638
 639 __at(0x0FF3) __sfr PRODL;
 640
 641 __at(0x0FF4) __sfr PRODH;
 642
 643 __at(0x0FF5) __sfr TABLAT;
 644
 645 __at(0x0FF6) __sfr TBLPTR;
 646
 647 __at(0x0FF6) __sfr TBLPTRL;
 648
 649 __at(0x0FF7) __sfr TBLPTRH;
 650
 651 __at(0x0FF8) __sfr TBLPTRU;
 652
 653 __at(0x0FF9) __sfr PC;
 654
 655 __at(0x0FF9) __sfr PCL;
 656
 657 __at(0x0FFA) __sfr PCLATH;
 658
 659 __at(0x0FFB) __sfr PCLATU;
 660
 661 __at(0x0FFC) __sfr STKPTR;
 662 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
 663
 664 __at(0x0FFD) __sfr TOS;
 665
 666 __at(0x0FFD) __sfr TOSL;
 667
 668 __at(0x0FFE) __sfr TOSH;
 669
 670 __at(0x0FFF) __sfr TOSU;