sdcc/device/non-free/lib/pic16/libdev/pic18f67j93.c

   1 /*
   2  * This definitions of the PIC18F67J93 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:35 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic18f67j93.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0F54) __sfr PADCFG1;
  30 __at(0x0F54) volatile __PADCFG1bits_t PADCFG1bits;
  31
  32 __at(0x0F55) __sfr CTMUICON;
  33 __at(0x0F55) volatile __CTMUICONbits_t CTMUICONbits;
  34
  35 __at(0x0F56) __sfr CTMUCONL;
  36 __at(0x0F56) volatile __CTMUCONLbits_t CTMUCONLbits;
  37
  38 __at(0x0F57) __sfr CTMUCONH;
  39 __at(0x0F57) volatile __CTMUCONHbits_t CTMUCONHbits;
  40
  41 __at(0x0F58) __sfr ALRMVALL;
  42
  43 __at(0x0F59) __sfr ALRMVALH;
  44
  45 __at(0x0F5A) __sfr ALRMRPT;
  46 __at(0x0F5A) volatile __ALRMRPTbits_t ALRMRPTbits;
  47
  48 __at(0x0F5B) __sfr ALRMCFG;
  49 __at(0x0F5B) volatile __ALRMCFGbits_t ALRMCFGbits;
  50
  51 __at(0x0F5C) __sfr RTCVALL;
  52
  53 __at(0x0F5D) __sfr RTCVALH;
  54
  55 __at(0x0F5E) __sfr RTCCAL;
  56 __at(0x0F5E) volatile __RTCCALbits_t RTCCALbits;
  57
  58 __at(0x0F5F) __sfr RTCCFG;
  59 __at(0x0F5F) volatile __RTCCFGbits_t RTCCFGbits;
  60
  61 __at(0x0F60) __sfr RCSTA2;
  62 __at(0x0F60) volatile __RCSTA2bits_t RCSTA2bits;
  63
  64 __at(0x0F61) __sfr TXSTA2;
  65 __at(0x0F61) volatile __TXSTA2bits_t TXSTA2bits;
  66
  67 __at(0x0F62) __sfr TXREG2;
  68
  69 __at(0x0F63) __sfr RCREG2;
  70
  71 __at(0x0F64) __sfr SPBRG2;
  72
  73 __at(0x0F65) __sfr CCP2CON;
  74 __at(0x0F65) volatile __CCP2CONbits_t CCP2CONbits;
  75
  76 __at(0x0F65) __sfr ECCP2CON;
  77 __at(0x0F65) volatile __ECCP2CONbits_t ECCP2CONbits;
  78
  79 __at(0x0F66) __sfr CCPR2;
  80
  81 __at(0x0F66) __sfr CCPR2L;
  82
  83 __at(0x0F67) __sfr CCPR2H;
  84
  85 __at(0x0F68) __sfr CCP1CON;
  86 __at(0x0F68) volatile __CCP1CONbits_t CCP1CONbits;
  87
  88 __at(0x0F68) __sfr ECCP1CON;
  89 __at(0x0F68) volatile __ECCP1CONbits_t ECCP1CONbits;
  90
  91 __at(0x0F69) __sfr CCPR1;
  92
  93 __at(0x0F69) __sfr CCPR1L;
  94
  95 __at(0x0F6A) __sfr CCPR1H;
  96
  97 __at(0x0F6C) __sfr LCDDATA6;
  98 __at(0x0F6C) volatile __LCDDATA6bits_t LCDDATA6bits;
  99
 100 __at(0x0F6D) __sfr LCDDATA7;
 101 __at(0x0F6D) volatile __LCDDATA7bits_t LCDDATA7bits;
 102
 103 __at(0x0F6E) __sfr LCDDATA8;
 104 __at(0x0F6E) volatile __LCDDATA8bits_t LCDDATA8bits;
 105
 106 __at(0x0F6F) __sfr LCDDATA9;
 107 __at(0x0F6F) volatile __LCDDATA9bits_t LCDDATA9bits;
 108
 109 __at(0x0F70) __sfr LCDDATA10;
 110 __at(0x0F70) volatile __LCDDATA10bits_t LCDDATA10bits;
 111
 112 __at(0x0F72) __sfr LCDDATA12;
 113 __at(0x0F72) volatile __LCDDATA12bits_t LCDDATA12bits;
 114
 115 __at(0x0F73) __sfr LCDDATA13;
 116 __at(0x0F73) volatile __LCDDATA13bits_t LCDDATA13bits;
 117
 118 __at(0x0F74) __sfr LCDDATA14;
 119 __at(0x0F74) volatile __LCDDATA14bits_t LCDDATA14bits;
 120
 121 __at(0x0F75) __sfr LCDDATA15;
 122 __at(0x0F75) volatile __LCDDATA15bits_t LCDDATA15bits;
 123
 124 __at(0x0F76) __sfr LCDDATA16;
 125 __at(0x0F76) volatile __LCDDATA16bits_t LCDDATA16bits;
 126
 127 __at(0x0F78) __sfr LCDDATA18;
 128 __at(0x0F78) volatile __LCDDATA18bits_t LCDDATA18bits;
 129
 130 __at(0x0F79) __sfr LCDDATA19;
 131 __at(0x0F79) volatile __LCDDATA19bits_t LCDDATA19bits;
 132
 133 __at(0x0F7A) __sfr LCDDATA20;
 134 __at(0x0F7A) volatile __LCDDATA20bits_t LCDDATA20bits;
 135
 136 __at(0x0F7B) __sfr LCDDATA21;
 137 __at(0x0F7B) volatile __LCDDATA21bits_t LCDDATA21bits;
 138
 139 __at(0x0F7C) __sfr LCDDATA22;
 140 __at(0x0F7C) volatile __LCDDATA22bits_t LCDDATA22bits;
 141
 142 __at(0x0F7E) __sfr BAUDCON;
 143 __at(0x0F7E) volatile __BAUDCONbits_t BAUDCONbits;
 144
 145 __at(0x0F7E) __sfr BAUDCON1;
 146 __at(0x0F7E) volatile __BAUDCON1bits_t BAUDCON1bits;
 147
 148 __at(0x0F7F) __sfr SPBRGH;
 149
 150 __at(0x0F7F) __sfr SPBRGH1;
 151
 152 __at(0x0F80) __sfr PORTA;
 153 __at(0x0F80) volatile __PORTAbits_t PORTAbits;
 154
 155 __at(0x0F81) __sfr PORTB;
 156 __at(0x0F81) volatile __PORTBbits_t PORTBbits;
 157
 158 __at(0x0F82) __sfr PORTC;
 159 __at(0x0F82) volatile __PORTCbits_t PORTCbits;
 160
 161 __at(0x0F83) __sfr PORTD;
 162 __at(0x0F83) volatile __PORTDbits_t PORTDbits;
 163
 164 __at(0x0F84) __sfr PORTE;
 165 __at(0x0F84) volatile __PORTEbits_t PORTEbits;
 166
 167 __at(0x0F85) __sfr PORTF;
 168 __at(0x0F85) volatile __PORTFbits_t PORTFbits;
 169
 170 __at(0x0F86) __sfr PORTG;
 171 __at(0x0F86) volatile __PORTGbits_t PORTGbits;
 172
 173 __at(0x0F89) __sfr LATA;
 174 __at(0x0F89) volatile __LATAbits_t LATAbits;
 175
 176 __at(0x0F8A) __sfr LATB;
 177 __at(0x0F8A) volatile __LATBbits_t LATBbits;
 178
 179 __at(0x0F8B) __sfr LATC;
 180 __at(0x0F8B) volatile __LATCbits_t LATCbits;
 181
 182 __at(0x0F8C) __sfr LATD;
 183 __at(0x0F8C) volatile __LATDbits_t LATDbits;
 184
 185 __at(0x0F8D) __sfr LATE;
 186 __at(0x0F8D) volatile __LATEbits_t LATEbits;
 187
 188 __at(0x0F8E) __sfr LATF;
 189 __at(0x0F8E) volatile __LATFbits_t LATFbits;
 190
 191 __at(0x0F8F) __sfr LATG;
 192 __at(0x0F8F) volatile __LATGbits_t LATGbits;
 193
 194 __at(0x0F92) __sfr TRISA;
 195 __at(0x0F92) volatile __TRISAbits_t TRISAbits;
 196
 197 __at(0x0F93) __sfr TRISB;
 198 __at(0x0F93) volatile __TRISBbits_t TRISBbits;
 199
 200 __at(0x0F94) __sfr TRISC;
 201 __at(0x0F94) volatile __TRISCbits_t TRISCbits;
 202
 203 __at(0x0F95) __sfr TRISD;
 204 __at(0x0F95) volatile __TRISDbits_t TRISDbits;
 205
 206 __at(0x0F96) __sfr TRISE;
 207 __at(0x0F96) volatile __TRISEbits_t TRISEbits;
 208
 209 __at(0x0F97) __sfr TRISF;
 210 __at(0x0F97) volatile __TRISFbits_t TRISFbits;
 211
 212 __at(0x0F98) __sfr TRISG;
 213 __at(0x0F98) volatile __TRISGbits_t TRISGbits;
 214
 215 __at(0x0F9B) __sfr OSCTUNE;
 216 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits;
 217
 218 __at(0x0F9D) __sfr PIE1;
 219 __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
 220
 221 __at(0x0F9E) __sfr PIR1;
 222 __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
 223
 224 __at(0x0F9F) __sfr IPR1;
 225 __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
 226
 227 __at(0x0FA0) __sfr PIE2;
 228 __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
 229
 230 __at(0x0FA1) __sfr PIR2;
 231 __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
 232
 233 __at(0x0FA2) __sfr IPR2;
 234 __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
 235
 236 __at(0x0FA3) __sfr PIE3;
 237 __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
 238
 239 __at(0x0FA4) __sfr PIR3;
 240 __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
 241
 242 __at(0x0FA5) __sfr IPR3;
 243 __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
 244
 245 __at(0x0FA6) __sfr EECON1;
 246 __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
 247
 248 __at(0x0FA7) __sfr EECON2;
 249
 250 __at(0x0FA8) __sfr LCDCON;
 251 __at(0x0FA8) volatile __LCDCONbits_t LCDCONbits;
 252
 253 __at(0x0FA9) __sfr LCDSE0;
 254 __at(0x0FA9) volatile __LCDSE0bits_t LCDSE0bits;
 255
 256 __at(0x0FAA) __sfr LCDPS;
 257 __at(0x0FAA) volatile __LCDPSbits_t LCDPSbits;
 258
 259 __at(0x0FAB) __sfr RCSTA;
 260 __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
 261
 262 __at(0x0FAB) __sfr RCSTA1;
 263 __at(0x0FAB) volatile __RCSTA1bits_t RCSTA1bits;
 264
 265 __at(0x0FAC) __sfr TXSTA;
 266 __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
 267
 268 __at(0x0FAC) __sfr TXSTA1;
 269 __at(0x0FAC) volatile __TXSTA1bits_t TXSTA1bits;
 270
 271 __at(0x0FAD) __sfr TXREG;
 272
 273 __at(0x0FAD) __sfr TXREG1;
 274
 275 __at(0x0FAE) __sfr RCREG;
 276
 277 __at(0x0FAE) __sfr RCREG1;
 278
 279 __at(0x0FAF) __sfr SPBRG;
 280
 281 __at(0x0FAF) __sfr SPBRG1;
 282
 283 __at(0x0FB1) __sfr T3CON;
 284 __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
 285
 286 __at(0x0FB2) __sfr TMR3;
 287
 288 __at(0x0FB2) __sfr TMR3L;
 289
 290 __at(0x0FB3) __sfr TMR3H;
 291
 292 __at(0x0FB4) __sfr CMCON;
 293 __at(0x0FB4) volatile __CMCONbits_t CMCONbits;
 294
 295 __at(0x0FB5) __sfr CVRCON;
 296 __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
 297
 298 __at(0x0FB6) __sfr LCDSE1;
 299 __at(0x0FB6) volatile __LCDSE1bits_t LCDSE1bits;
 300
 301 __at(0x0FB7) __sfr LCDSE2;
 302 __at(0x0FB7) volatile __LCDSE2bits_t LCDSE2bits;
 303
 304 __at(0x0FB8) __sfr LCDSE3;
 305 __at(0x0FB8) volatile __LCDSE3bits_t LCDSE3bits;
 306
 307 __at(0x0FB9) __sfr LCDSE4;
 308 __at(0x0FB9) volatile __LCDSE4bits_t LCDSE4bits;
 309
 310 __at(0x0FBB) __sfr LCDDATA0;
 311 __at(0x0FBB) volatile __LCDDATA0bits_t LCDDATA0bits;
 312
 313 __at(0x0FBC) __sfr LCDDATA1;
 314 __at(0x0FBC) volatile __LCDDATA1bits_t LCDDATA1bits;
 315
 316 __at(0x0FBD) __sfr LCDDATA2;
 317 __at(0x0FBD) volatile __LCDDATA2bits_t LCDDATA2bits;
 318
 319 __at(0x0FBE) __sfr LCDDATA3;
 320 __at(0x0FBE) volatile __LCDDATA3bits_t LCDDATA3bits;
 321
 322 __at(0x0FBF) __sfr LCDDATA4;
 323 __at(0x0FBF) volatile __LCDDATA4bits_t LCDDATA4bits;
 324
 325 __at(0x0FC0) __sfr ADCON2;
 326 __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
 327
 328 __at(0x0FC1) __sfr ADCON1;
 329 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
 330
 331 __at(0x0FC2) __sfr ADCON0;
 332 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
 333
 334 __at(0x0FC3) __sfr ADRES;
 335
 336 __at(0x0FC3) __sfr ADRESL;
 337
 338 __at(0x0FC4) __sfr ADRESH;
 339
 340 __at(0x0FC5) __sfr SSP1CON2;
 341 __at(0x0FC5) volatile __SSP1CON2bits_t SSP1CON2bits;
 342
 343 __at(0x0FC5) __sfr SSPCON2;
 344 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
 345
 346 __at(0x0FC6) __sfr SSP1CON1;
 347 __at(0x0FC6) volatile __SSP1CON1bits_t SSP1CON1bits;
 348
 349 __at(0x0FC6) __sfr SSPCON1;
 350 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
 351
 352 __at(0x0FC7) __sfr SSP1STAT;
 353 __at(0x0FC7) volatile __SSP1STATbits_t SSP1STATbits;
 354
 355 __at(0x0FC7) __sfr SSPSTAT;
 356 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
 357
 358 __at(0x0FC8) __sfr SSP1ADD;
 359 __at(0x0FC8) volatile __SSP1ADDbits_t SSP1ADDbits;
 360
 361 __at(0x0FC8) __sfr SSPADD;
 362 __at(0x0FC8) volatile __SSPADDbits_t SSPADDbits;
 363
 364 __at(0x0FC9) __sfr SSP1BUF;
 365
 366 __at(0x0FC9) __sfr SSPBUF;
 367
 368 __at(0x0FCA) __sfr T2CON;
 369 __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
 370
 371 __at(0x0FCB) __sfr PR2;
 372
 373 __at(0x0FCC) __sfr TMR2;
 374
 375 __at(0x0FCD) __sfr T1CON;
 376 __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
 377
 378 __at(0x0FCE) __sfr TMR1;
 379
 380 __at(0x0FCE) __sfr TMR1L;
 381
 382 __at(0x0FCF) __sfr TMR1H;
 383
 384 __at(0x0FD0) __sfr RCON;
 385 __at(0x0FD0) volatile __RCONbits_t RCONbits;
 386
 387 __at(0x0FD1) __sfr WDTCON;
 388 __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
 389
 390 __at(0x0FD2) __sfr LCDREG;
 391 __at(0x0FD2) volatile __LCDREGbits_t LCDREGbits;
 392
 393 __at(0x0FD3) __sfr OSCCON;
 394 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
 395
 396 __at(0x0FD5) __sfr T0CON;
 397 __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
 398
 399 __at(0x0FD6) __sfr TMR0;
 400
 401 __at(0x0FD6) __sfr TMR0L;
 402
 403 __at(0x0FD7) __sfr TMR0H;
 404
 405 __at(0x0FD8) __sfr STATUS;
 406 __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
 407
 408 __at(0x0FD9) __sfr FSR2L;
 409
 410 __at(0x0FDA) __sfr FSR2H;
 411
 412 __at(0x0FDB) __sfr PLUSW2;
 413
 414 __at(0x0FDC) __sfr PREINC2;
 415
 416 __at(0x0FDD) __sfr POSTDEC2;
 417
 418 __at(0x0FDE) __sfr POSTINC2;
 419
 420 __at(0x0FDF) __sfr INDF2;
 421
 422 __at(0x0FE0) __sfr BSR;
 423
 424 __at(0x0FE1) __sfr FSR1L;
 425
 426 __at(0x0FE2) __sfr FSR1H;
 427
 428 __at(0x0FE3) __sfr PLUSW1;
 429
 430 __at(0x0FE4) __sfr PREINC1;
 431
 432 __at(0x0FE5) __sfr POSTDEC1;
 433
 434 __at(0x0FE6) __sfr POSTINC1;
 435
 436 __at(0x0FE7) __sfr INDF1;
 437
 438 __at(0x0FE8) __sfr WREG;
 439
 440 __at(0x0FE9) __sfr FSR0L;
 441
 442 __at(0x0FEA) __sfr FSR0H;
 443
 444 __at(0x0FEB) __sfr PLUSW0;
 445
 446 __at(0x0FEC) __sfr PREINC0;
 447
 448 __at(0x0FED) __sfr POSTDEC0;
 449
 450 __at(0x0FEE) __sfr POSTINC0;
 451
 452 __at(0x0FEF) __sfr INDF0;
 453
 454 __at(0x0FF0) __sfr INTCON3;
 455 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
 456
 457 __at(0x0FF1) __sfr INTCON2;
 458 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
 459
 460 __at(0x0FF2) __sfr INTCON;
 461 __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
 462
 463 __at(0x0FF3) __sfr PROD;
 464
 465 __at(0x0FF3) __sfr PRODL;
 466
 467 __at(0x0FF4) __sfr PRODH;
 468
 469 __at(0x0FF5) __sfr TABLAT;
 470
 471 __at(0x0FF6) __sfr TBLPTR;
 472
 473 __at(0x0FF6) __sfr TBLPTRL;
 474
 475 __at(0x0FF7) __sfr TBLPTRH;
 476
 477 __at(0x0FF8) __sfr TBLPTRU;
 478
 479 __at(0x0FF9) __sfr PC;
 480
 481 __at(0x0FF9) __sfr PCL;
 482
 483 __at(0x0FFA) __sfr PCLATH;
 484
 485 __at(0x0FFB) __sfr PCLATU;
 486
 487 __at(0x0FFC) __sfr STKPTR;
 488 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
 489
 490 __at(0x0FFD) __sfr TOS;
 491
 492 __at(0x0FFD) __sfr TOSL;
 493
 494 __at(0x0FFE) __sfr TOSH;
 495
 496 __at(0x0FFF) __sfr TOSU;