sdcc/device/non-free/lib/pic16/libdev/pic18f85j50.c

   1 /*
   2  * This definitions of the PIC18F85J50 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:36 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic18f85j50.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0F40) __sfr PMSTAT;
  30
  31 __at(0x0F40) __sfr PMSTATL;
  32 __at(0x0F40) volatile __PMSTATLbits_t PMSTATLbits;
  33
  34 __at(0x0F41) __sfr PMSTATH;
  35 __at(0x0F41) volatile __PMSTATHbits_t PMSTATHbits;
  36
  37 __at(0x0F42) __sfr PMEL;
  38 __at(0x0F42) volatile __PMELbits_t PMELbits;
  39
  40 __at(0x0F42) __sfr PMEN;
  41
  42 __at(0x0F43) __sfr PMEH;
  43 __at(0x0F43) volatile __PMEHbits_t PMEHbits;
  44
  45 __at(0x0F44) __sfr PMDIN2;
  46
  47 __at(0x0F44) __sfr PMDIN2L;
  48
  49 __at(0x0F45) __sfr PMDIN2H;
  50
  51 __at(0x0F46) __sfr PMDOUT2;
  52
  53 __at(0x0F46) __sfr PMDOUT2L;
  54
  55 __at(0x0F47) __sfr PMDOUT2H;
  56
  57 __at(0x0F48) __sfr PMMODE;
  58
  59 __at(0x0F48) __sfr PMMODEL;
  60 __at(0x0F48) volatile __PMMODELbits_t PMMODELbits;
  61
  62 __at(0x0F49) __sfr PMMODEH;
  63 __at(0x0F49) volatile __PMMODEHbits_t PMMODEHbits;
  64
  65 __at(0x0F4A) __sfr PMCON;
  66
  67 __at(0x0F4A) __sfr PMCONL;
  68 __at(0x0F4A) volatile __PMCONLbits_t PMCONLbits;
  69
  70 __at(0x0F4B) __sfr PMCONH;
  71 __at(0x0F4B) volatile __PMCONHbits_t PMCONHbits;
  72
  73 __at(0x0F4C) __sfr UEP0;
  74 __at(0x0F4C) volatile __UEP0bits_t UEP0bits;
  75
  76 __at(0x0F4D) __sfr UEP1;
  77 __at(0x0F4D) volatile __UEP1bits_t UEP1bits;
  78
  79 __at(0x0F4E) __sfr UEP2;
  80 __at(0x0F4E) volatile __UEP2bits_t UEP2bits;
  81
  82 __at(0x0F4F) __sfr UEP3;
  83 __at(0x0F4F) volatile __UEP3bits_t UEP3bits;
  84
  85 __at(0x0F50) __sfr UEP4;
  86 __at(0x0F50) volatile __UEP4bits_t UEP4bits;
  87
  88 __at(0x0F51) __sfr UEP5;
  89 __at(0x0F51) volatile __UEP5bits_t UEP5bits;
  90
  91 __at(0x0F52) __sfr UEP6;
  92 __at(0x0F52) volatile __UEP6bits_t UEP6bits;
  93
  94 __at(0x0F53) __sfr UEP7;
  95 __at(0x0F53) volatile __UEP7bits_t UEP7bits;
  96
  97 __at(0x0F54) __sfr UEP8;
  98 __at(0x0F54) volatile __UEP8bits_t UEP8bits;
  99
 100 __at(0x0F55) __sfr UEP9;
 101 __at(0x0F55) volatile __UEP9bits_t UEP9bits;
 102
 103 __at(0x0F56) __sfr UEP10;
 104 __at(0x0F56) volatile __UEP10bits_t UEP10bits;
 105
 106 __at(0x0F57) __sfr UEP11;
 107 __at(0x0F57) volatile __UEP11bits_t UEP11bits;
 108
 109 __at(0x0F58) __sfr UEP12;
 110 __at(0x0F58) volatile __UEP12bits_t UEP12bits;
 111
 112 __at(0x0F59) __sfr UEP13;
 113 __at(0x0F59) volatile __UEP13bits_t UEP13bits;
 114
 115 __at(0x0F5A) __sfr UEP14;
 116 __at(0x0F5A) volatile __UEP14bits_t UEP14bits;
 117
 118 __at(0x0F5B) __sfr UEP15;
 119 __at(0x0F5B) volatile __UEP15bits_t UEP15bits;
 120
 121 __at(0x0F5C) __sfr UIE;
 122 __at(0x0F5C) volatile __UIEbits_t UIEbits;
 123
 124 __at(0x0F5D) __sfr UEIE;
 125 __at(0x0F5D) volatile __UEIEbits_t UEIEbits;
 126
 127 __at(0x0F5E) __sfr UADDR;
 128 __at(0x0F5E) volatile __UADDRbits_t UADDRbits;
 129
 130 __at(0x0F5F) __sfr UCFG;
 131 __at(0x0F5F) volatile __UCFGbits_t UCFGbits;
 132
 133 __at(0x0F60) __sfr UFRM;
 134
 135 __at(0x0F60) __sfr UFRML;
 136 __at(0x0F60) volatile __UFRMLbits_t UFRMLbits;
 137
 138 __at(0x0F61) __sfr UFRMH;
 139 __at(0x0F61) volatile __UFRMHbits_t UFRMHbits;
 140
 141 __at(0x0F62) __sfr UIR;
 142 __at(0x0F62) volatile __UIRbits_t UIRbits;
 143
 144 __at(0x0F63) __sfr UEIR;
 145 __at(0x0F63) volatile __UEIRbits_t UEIRbits;
 146
 147 __at(0x0F64) __sfr USTAT;
 148 __at(0x0F64) volatile __USTATbits_t USTATbits;
 149
 150 __at(0x0F65) __sfr UCON;
 151 __at(0x0F65) volatile __UCONbits_t UCONbits;
 152
 153 __at(0x0F66) __sfr PMDIN1;
 154
 155 __at(0x0F66) __sfr PMDIN1L;
 156
 157 __at(0x0F67) __sfr PMDIN1H;
 158
 159 __at(0x0F68) __sfr PMADDR;
 160
 161 __at(0x0F68) __sfr PMADDRL;
 162
 163 __at(0x0F68) __sfr PMDOUT1;
 164
 165 __at(0x0F68) __sfr PMDOUT1L;
 166
 167 __at(0x0F69) __sfr PMADDRH;
 168 __at(0x0F69) volatile __PMADDRHbits_t PMADDRHbits;
 169
 170 __at(0x0F69) __sfr PMDOUT1H;
 171
 172 __at(0x0F6A) __sfr CMSTAT;
 173 __at(0x0F6A) volatile __CMSTATbits_t CMSTATbits;
 174
 175 __at(0x0F6A) __sfr CMSTATUS;
 176 __at(0x0F6A) volatile __CMSTATUSbits_t CMSTATUSbits;
 177
 178 __at(0x0F6B) __sfr SSP2CON2;
 179 __at(0x0F6B) volatile __SSP2CON2bits_t SSP2CON2bits;
 180
 181 __at(0x0F6C) __sfr SSP2CON1;
 182 __at(0x0F6C) volatile __SSP2CON1bits_t SSP2CON1bits;
 183
 184 __at(0x0F6D) __sfr SSP2STAT;
 185 __at(0x0F6D) volatile __SSP2STATbits_t SSP2STATbits;
 186
 187 __at(0x0F6E) __sfr SSP2ADD;
 188
 189 __at(0x0F6E) __sfr SSP2MSK;
 190 __at(0x0F6E) volatile __SSP2MSKbits_t SSP2MSKbits;
 191
 192 __at(0x0F6F) __sfr SSP2BUF;
 193
 194 __at(0x0F70) __sfr CCP5CON;
 195 __at(0x0F70) volatile __CCP5CONbits_t CCP5CONbits;
 196
 197 __at(0x0F71) __sfr CCPR5;
 198
 199 __at(0x0F71) __sfr CCPR5L;
 200
 201 __at(0x0F72) __sfr CCPR5H;
 202
 203 __at(0x0F73) __sfr CCP4CON;
 204 __at(0x0F73) volatile __CCP4CONbits_t CCP4CONbits;
 205
 206 __at(0x0F74) __sfr CCPR4;
 207
 208 __at(0x0F74) __sfr CCPR4L;
 209
 210 __at(0x0F75) __sfr CCPR4H;
 211
 212 __at(0x0F76) __sfr T4CON;
 213 __at(0x0F76) volatile __T4CONbits_t T4CONbits;
 214
 215 __at(0x0F77) __sfr CVRCON;
 216 __at(0x0F77) volatile __CVRCONbits_t CVRCONbits;
 217
 218 __at(0x0F77) __sfr PR4;
 219
 220 __at(0x0F78) __sfr TMR4;
 221
 222 __at(0x0F79) __sfr T3CON;
 223 __at(0x0F79) volatile __T3CONbits_t T3CONbits;
 224
 225 __at(0x0F7A) __sfr TMR3;
 226
 227 __at(0x0F7A) __sfr TMR3L;
 228
 229 __at(0x0F7B) __sfr TMR3H;
 230
 231 __at(0x0F7C) __sfr BAUDCON2;
 232 __at(0x0F7C) volatile __BAUDCON2bits_t BAUDCON2bits;
 233
 234 __at(0x0F7D) __sfr SPBRGH2;
 235
 236 __at(0x0F7E) __sfr BAUDCON;
 237 __at(0x0F7E) volatile __BAUDCONbits_t BAUDCONbits;
 238
 239 __at(0x0F7E) __sfr BAUDCON1;
 240 __at(0x0F7E) volatile __BAUDCON1bits_t BAUDCON1bits;
 241
 242 __at(0x0F7F) __sfr SPBRGH;
 243
 244 __at(0x0F7F) __sfr SPBRGH1;
 245
 246 __at(0x0F80) __sfr PORTA;
 247 __at(0x0F80) volatile __PORTAbits_t PORTAbits;
 248
 249 __at(0x0F81) __sfr PORTB;
 250 __at(0x0F81) volatile __PORTBbits_t PORTBbits;
 251
 252 __at(0x0F82) __sfr PORTC;
 253 __at(0x0F82) volatile __PORTCbits_t PORTCbits;
 254
 255 __at(0x0F83) __sfr PORTD;
 256 __at(0x0F83) volatile __PORTDbits_t PORTDbits;
 257
 258 __at(0x0F84) __sfr PORTE;
 259 __at(0x0F84) volatile __PORTEbits_t PORTEbits;
 260
 261 __at(0x0F85) __sfr PORTF;
 262 __at(0x0F85) volatile __PORTFbits_t PORTFbits;
 263
 264 __at(0x0F86) __sfr PORTG;
 265 __at(0x0F86) volatile __PORTGbits_t PORTGbits;
 266
 267 __at(0x0F87) __sfr PORTH;
 268 __at(0x0F87) volatile __PORTHbits_t PORTHbits;
 269
 270 __at(0x0F88) __sfr PORTJ;
 271 __at(0x0F88) volatile __PORTJbits_t PORTJbits;
 272
 273 __at(0x0F89) __sfr LATA;
 274 __at(0x0F89) volatile __LATAbits_t LATAbits;
 275
 276 __at(0x0F8A) __sfr LATB;
 277 __at(0x0F8A) volatile __LATBbits_t LATBbits;
 278
 279 __at(0x0F8B) __sfr LATC;
 280 __at(0x0F8B) volatile __LATCbits_t LATCbits;
 281
 282 __at(0x0F8C) __sfr LATD;
 283 __at(0x0F8C) volatile __LATDbits_t LATDbits;
 284
 285 __at(0x0F8D) __sfr LATE;
 286 __at(0x0F8D) volatile __LATEbits_t LATEbits;
 287
 288 __at(0x0F8E) __sfr LATF;
 289 __at(0x0F8E) volatile __LATFbits_t LATFbits;
 290
 291 __at(0x0F8F) __sfr LATG;
 292 __at(0x0F8F) volatile __LATGbits_t LATGbits;
 293
 294 __at(0x0F90) __sfr LATH;
 295 __at(0x0F90) volatile __LATHbits_t LATHbits;
 296
 297 __at(0x0F91) __sfr LATJ;
 298 __at(0x0F91) volatile __LATJbits_t LATJbits;
 299
 300 __at(0x0F92) __sfr DDRA;
 301 __at(0x0F92) volatile __DDRAbits_t DDRAbits;
 302
 303 __at(0x0F92) __sfr TRISA;
 304 __at(0x0F92) volatile __TRISAbits_t TRISAbits;
 305
 306 __at(0x0F93) __sfr DDRB;
 307 __at(0x0F93) volatile __DDRBbits_t DDRBbits;
 308
 309 __at(0x0F93) __sfr TRISB;
 310 __at(0x0F93) volatile __TRISBbits_t TRISBbits;
 311
 312 __at(0x0F94) __sfr DDRC;
 313 __at(0x0F94) volatile __DDRCbits_t DDRCbits;
 314
 315 __at(0x0F94) __sfr TRISC;
 316 __at(0x0F94) volatile __TRISCbits_t TRISCbits;
 317
 318 __at(0x0F95) __sfr DDRD;
 319 __at(0x0F95) volatile __DDRDbits_t DDRDbits;
 320
 321 __at(0x0F95) __sfr TRISD;
 322 __at(0x0F95) volatile __TRISDbits_t TRISDbits;
 323
 324 __at(0x0F96) __sfr DDRE;
 325 __at(0x0F96) volatile __DDREbits_t DDREbits;
 326
 327 __at(0x0F96) __sfr TRISE;
 328 __at(0x0F96) volatile __TRISEbits_t TRISEbits;
 329
 330 __at(0x0F97) __sfr DDRF;
 331 __at(0x0F97) volatile __DDRFbits_t DDRFbits;
 332
 333 __at(0x0F97) __sfr TRISF;
 334 __at(0x0F97) volatile __TRISFbits_t TRISFbits;
 335
 336 __at(0x0F98) __sfr DDRG;
 337 __at(0x0F98) volatile __DDRGbits_t DDRGbits;
 338
 339 __at(0x0F98) __sfr TRISG;
 340 __at(0x0F98) volatile __TRISGbits_t TRISGbits;
 341
 342 __at(0x0F99) __sfr DDRH;
 343 __at(0x0F99) volatile __DDRHbits_t DDRHbits;
 344
 345 __at(0x0F99) __sfr TRISH;
 346 __at(0x0F99) volatile __TRISHbits_t TRISHbits;
 347
 348 __at(0x0F9A) __sfr DDRJ;
 349 __at(0x0F9A) volatile __DDRJbits_t DDRJbits;
 350
 351 __at(0x0F9A) __sfr TRISJ;
 352 __at(0x0F9A) volatile __TRISJbits_t TRISJbits;
 353
 354 __at(0x0F9B) __sfr OSCTUNE;
 355 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits;
 356
 357 __at(0x0F9C) __sfr RCSTA2;
 358 __at(0x0F9C) volatile __RCSTA2bits_t RCSTA2bits;
 359
 360 __at(0x0F9D) __sfr PIE1;
 361 __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
 362
 363 __at(0x0F9E) __sfr PIR1;
 364 __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
 365
 366 __at(0x0F9F) __sfr IPR1;
 367 __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
 368
 369 __at(0x0FA0) __sfr PIE2;
 370 __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
 371
 372 __at(0x0FA1) __sfr PIR2;
 373 __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
 374
 375 __at(0x0FA2) __sfr IPR2;
 376 __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
 377
 378 __at(0x0FA3) __sfr PIE3;
 379 __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
 380
 381 __at(0x0FA4) __sfr PIR3;
 382 __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
 383
 384 __at(0x0FA5) __sfr IPR3;
 385 __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
 386
 387 __at(0x0FA6) __sfr EECON1;
 388 __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
 389
 390 __at(0x0FA7) __sfr EECON2;
 391
 392 __at(0x0FA8) __sfr TXSTA2;
 393 __at(0x0FA8) volatile __TXSTA2bits_t TXSTA2bits;
 394
 395 __at(0x0FA9) __sfr TXREG2;
 396
 397 __at(0x0FAA) __sfr RCREG2;
 398
 399 __at(0x0FAB) __sfr SPBRG2;
 400
 401 __at(0x0FAC) __sfr RCSTA;
 402 __at(0x0FAC) volatile __RCSTAbits_t RCSTAbits;
 403
 404 __at(0x0FAC) __sfr RCSTA1;
 405 __at(0x0FAC) volatile __RCSTA1bits_t RCSTA1bits;
 406
 407 __at(0x0FAD) __sfr TXSTA;
 408 __at(0x0FAD) volatile __TXSTAbits_t TXSTAbits;
 409
 410 __at(0x0FAD) __sfr TXSTA1;
 411 __at(0x0FAD) volatile __TXSTA1bits_t TXSTA1bits;
 412
 413 __at(0x0FAE) __sfr TXREG;
 414
 415 __at(0x0FAE) __sfr TXREG1;
 416
 417 __at(0x0FAF) __sfr RCREG;
 418
 419 __at(0x0FAF) __sfr RCREG1;
 420
 421 __at(0x0FB0) __sfr SPBRG;
 422
 423 __at(0x0FB0) __sfr SPBRG1;
 424
 425 __at(0x0FB1) __sfr CCP3CON;
 426 __at(0x0FB1) volatile __CCP3CONbits_t CCP3CONbits;
 427
 428 __at(0x0FB1) __sfr ECCP3CON;
 429 __at(0x0FB1) volatile __ECCP3CONbits_t ECCP3CONbits;
 430
 431 __at(0x0FB2) __sfr CCPR3;
 432
 433 __at(0x0FB2) __sfr CCPR3L;
 434
 435 __at(0x0FB3) __sfr CCPR3H;
 436
 437 __at(0x0FB4) __sfr ECCP3DEL;
 438 __at(0x0FB4) volatile __ECCP3DELbits_t ECCP3DELbits;
 439
 440 __at(0x0FB5) __sfr ECCP3AS;
 441 __at(0x0FB5) volatile __ECCP3ASbits_t ECCP3ASbits;
 442
 443 __at(0x0FB6) __sfr CCP2CON;
 444 __at(0x0FB6) volatile __CCP2CONbits_t CCP2CONbits;
 445
 446 __at(0x0FB6) __sfr ECCP2CON;
 447 __at(0x0FB6) volatile __ECCP2CONbits_t ECCP2CONbits;
 448
 449 __at(0x0FB7) __sfr CCPR2;
 450
 451 __at(0x0FB7) __sfr CCPR2L;
 452
 453 __at(0x0FB8) __sfr CCPR2H;
 454
 455 __at(0x0FB9) __sfr ECCP2DEL;
 456 __at(0x0FB9) volatile __ECCP2DELbits_t ECCP2DELbits;
 457
 458 __at(0x0FBA) __sfr ECCP2AS;
 459 __at(0x0FBA) volatile __ECCP2ASbits_t ECCP2ASbits;
 460
 461 __at(0x0FBB) __sfr CCP1CON;
 462 __at(0x0FBB) volatile __CCP1CONbits_t CCP1CONbits;
 463
 464 __at(0x0FBB) __sfr ECCP1CON;
 465 __at(0x0FBB) volatile __ECCP1CONbits_t ECCP1CONbits;
 466
 467 __at(0x0FBC) __sfr CCPR1;
 468
 469 __at(0x0FBC) __sfr CCPR1L;
 470
 471 __at(0x0FBD) __sfr CCPR1H;
 472
 473 __at(0x0FBE) __sfr ECCP1DEL;
 474 __at(0x0FBE) volatile __ECCP1DELbits_t ECCP1DELbits;
 475
 476 __at(0x0FBF) __sfr ECCP1AS;
 477 __at(0x0FBF) volatile __ECCP1ASbits_t ECCP1ASbits;
 478
 479 __at(0x0FC0) __sfr WDTCON;
 480 __at(0x0FC0) volatile __WDTCONbits_t WDTCONbits;
 481
 482 __at(0x0FC1) __sfr ADCON1;
 483 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
 484
 485 __at(0x0FC1) __sfr ANCON0;
 486 __at(0x0FC1) volatile __ANCON0bits_t ANCON0bits;
 487
 488 __at(0x0FC2) __sfr ADCON0;
 489 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
 490
 491 __at(0x0FC2) __sfr ANCON1;
 492 __at(0x0FC2) volatile __ANCON1bits_t ANCON1bits;
 493
 494 __at(0x0FC3) __sfr ADRES;
 495
 496 __at(0x0FC3) __sfr ADRESL;
 497
 498 __at(0x0FC4) __sfr ADRESH;
 499
 500 __at(0x0FC5) __sfr SSP1CON2;
 501 __at(0x0FC5) volatile __SSP1CON2bits_t SSP1CON2bits;
 502
 503 __at(0x0FC5) __sfr SSPCON2;
 504 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
 505
 506 __at(0x0FC6) __sfr SSP1CON1;
 507 __at(0x0FC6) volatile __SSP1CON1bits_t SSP1CON1bits;
 508
 509 __at(0x0FC6) __sfr SSPCON1;
 510 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
 511
 512 __at(0x0FC7) __sfr SSP1STAT;
 513 __at(0x0FC7) volatile __SSP1STATbits_t SSP1STATbits;
 514
 515 __at(0x0FC7) __sfr SSPSTAT;
 516 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
 517
 518 __at(0x0FC8) __sfr SSP1ADD;
 519
 520 __at(0x0FC8) __sfr SSP1MSK;
 521 __at(0x0FC8) volatile __SSP1MSKbits_t SSP1MSKbits;
 522
 523 __at(0x0FC8) __sfr SSPADD;
 524
 525 __at(0x0FC9) __sfr SSP1BUF;
 526
 527 __at(0x0FC9) __sfr SSPBUF;
 528
 529 __at(0x0FCA) __sfr T2CON;
 530 __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
 531
 532 __at(0x0FCB) __sfr MEMCON;
 533 __at(0x0FCB) volatile __MEMCONbits_t MEMCONbits;
 534
 535 __at(0x0FCB) __sfr PR2;
 536
 537 __at(0x0FCC) __sfr PADCFG1;
 538 __at(0x0FCC) volatile __PADCFG1bits_t PADCFG1bits;
 539
 540 __at(0x0FCC) __sfr TMR2;
 541
 542 __at(0x0FCD) __sfr ODCON3;
 543 __at(0x0FCD) volatile __ODCON3bits_t ODCON3bits;
 544
 545 __at(0x0FCD) __sfr T1CON;
 546 __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
 547
 548 __at(0x0FCE) __sfr ODCON2;
 549 __at(0x0FCE) volatile __ODCON2bits_t ODCON2bits;
 550
 551 __at(0x0FCE) __sfr TMR1;
 552
 553 __at(0x0FCE) __sfr TMR1L;
 554
 555 __at(0x0FCF) __sfr ODCON1;
 556 __at(0x0FCF) volatile __ODCON1bits_t ODCON1bits;
 557
 558 __at(0x0FCF) __sfr TMR1H;
 559
 560 __at(0x0FD0) __sfr RCON;
 561 __at(0x0FD0) volatile __RCONbits_t RCONbits;
 562
 563 __at(0x0FD1) __sfr CM2CON;
 564 __at(0x0FD1) volatile __CM2CONbits_t CM2CONbits;
 565
 566 __at(0x0FD1) __sfr CM2CON1;
 567 __at(0x0FD1) volatile __CM2CON1bits_t CM2CON1bits;
 568
 569 __at(0x0FD2) __sfr CM1CON;
 570 __at(0x0FD2) volatile __CM1CONbits_t CM1CONbits;
 571
 572 __at(0x0FD2) __sfr CM1CON1;
 573 __at(0x0FD2) volatile __CM1CON1bits_t CM1CON1bits;
 574
 575 __at(0x0FD3) __sfr OSCCON;
 576 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
 577
 578 __at(0x0FD3) __sfr REFOCON;
 579 __at(0x0FD3) volatile __REFOCONbits_t REFOCONbits;
 580
 581 __at(0x0FD5) __sfr T0CON;
 582 __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
 583
 584 __at(0x0FD6) __sfr TMR0;
 585
 586 __at(0x0FD6) __sfr TMR0L;
 587
 588 __at(0x0FD7) __sfr TMR0H;
 589
 590 __at(0x0FD8) __sfr STATUS;
 591 __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
 592
 593 __at(0x0FD9) __sfr FSR2L;
 594
 595 __at(0x0FDA) __sfr FSR2H;
 596
 597 __at(0x0FDB) __sfr PLUSW2;
 598
 599 __at(0x0FDC) __sfr PREINC2;
 600
 601 __at(0x0FDD) __sfr POSTDEC2;
 602
 603 __at(0x0FDE) __sfr POSTINC2;
 604
 605 __at(0x0FDF) __sfr INDF2;
 606
 607 __at(0x0FE0) __sfr BSR;
 608
 609 __at(0x0FE1) __sfr FSR1L;
 610
 611 __at(0x0FE2) __sfr FSR1H;
 612
 613 __at(0x0FE3) __sfr PLUSW1;
 614
 615 __at(0x0FE4) __sfr PREINC1;
 616
 617 __at(0x0FE5) __sfr POSTDEC1;
 618
 619 __at(0x0FE6) __sfr POSTINC1;
 620
 621 __at(0x0FE7) __sfr INDF1;
 622
 623 __at(0x0FE8) __sfr WREG;
 624
 625 __at(0x0FE9) __sfr FSR0L;
 626
 627 __at(0x0FEA) __sfr FSR0H;
 628
 629 __at(0x0FEB) __sfr PLUSW0;
 630
 631 __at(0x0FEC) __sfr PREINC0;
 632
 633 __at(0x0FED) __sfr POSTDEC0;
 634
 635 __at(0x0FEE) __sfr POSTINC0;
 636
 637 __at(0x0FEF) __sfr INDF0;
 638
 639 __at(0x0FF0) __sfr INTCON3;
 640 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
 641
 642 __at(0x0FF1) __sfr INTCON2;
 643 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
 644
 645 __at(0x0FF2) __sfr INTCON;
 646 __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
 647
 648 __at(0x0FF3) __sfr PROD;
 649
 650 __at(0x0FF3) __sfr PRODL;
 651
 652 __at(0x0FF4) __sfr PRODH;
 653
 654 __at(0x0FF5) __sfr TABLAT;
 655
 656 __at(0x0FF6) __sfr TBLPTR;
 657
 658 __at(0x0FF6) __sfr TBLPTRL;
 659
 660 __at(0x0FF7) __sfr TBLPTRH;
 661
 662 __at(0x0FF8) __sfr TBLPTRU;
 663
 664 __at(0x0FF9) __sfr PC;
 665
 666 __at(0x0FF9) __sfr PCL;
 667
 668 __at(0x0FFA) __sfr PCLATH;
 669
 670 __at(0x0FFB) __sfr PCLATU;
 671
 672 __at(0x0FFC) __sfr STKPTR;
 673 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
 674
 675 __at(0x0FFD) __sfr TOS;
 676
 677 __at(0x0FFD) __sfr TOSL;
 678
 679 __at(0x0FFE) __sfr TOSH;
 680
 681 __at(0x0FFF) __sfr TOSU;