sdcc/device/non-free/lib/pic16/libdev/pic18lf26k80.c

   1 /*
   2  * This definitions of the PIC18LF26K80 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:55 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic18lf26k80.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0E41) __sfr RXERRCNT;
  30 __at(0x0E41) volatile __RXERRCNTbits_t RXERRCNTbits;
  31
  32 __at(0x0E42) __sfr TXERRCNT;
  33 __at(0x0E42) volatile __TXERRCNTbits_t TXERRCNTbits;
  34
  35 __at(0x0E43) __sfr BRGCON1;
  36 __at(0x0E43) volatile __BRGCON1bits_t BRGCON1bits;
  37
  38 __at(0x0E44) __sfr BRGCON2;
  39 __at(0x0E44) volatile __BRGCON2bits_t BRGCON2bits;
  40
  41 __at(0x0E45) __sfr BRGCON3;
  42 __at(0x0E45) volatile __BRGCON3bits_t BRGCON3bits;
  43
  44 __at(0x0E46) __sfr RXFCON0;
  45 __at(0x0E46) volatile __RXFCON0bits_t RXFCON0bits;
  46
  47 __at(0x0E47) __sfr RXFCON1;
  48 __at(0x0E47) volatile __RXFCON1bits_t RXFCON1bits;
  49
  50 __at(0x0E48) __sfr RXF6SIDH;
  51 __at(0x0E48) volatile __RXF6SIDHbits_t RXF6SIDHbits;
  52
  53 __at(0x0E49) __sfr RXF6SIDL;
  54 __at(0x0E49) volatile __RXF6SIDLbits_t RXF6SIDLbits;
  55
  56 __at(0x0E4A) __sfr RXF6EIDH;
  57 __at(0x0E4A) volatile __RXF6EIDHbits_t RXF6EIDHbits;
  58
  59 __at(0x0E4B) __sfr RXF6EIDL;
  60 __at(0x0E4B) volatile __RXF6EIDLbits_t RXF6EIDLbits;
  61
  62 __at(0x0E4C) __sfr RXF7SIDH;
  63 __at(0x0E4C) volatile __RXF7SIDHbits_t RXF7SIDHbits;
  64
  65 __at(0x0E4D) __sfr RXF7SIDL;
  66 __at(0x0E4D) volatile __RXF7SIDLbits_t RXF7SIDLbits;
  67
  68 __at(0x0E4E) __sfr RXF7EIDH;
  69 __at(0x0E4E) volatile __RXF7EIDHbits_t RXF7EIDHbits;
  70
  71 __at(0x0E4F) __sfr RXF7EIDL;
  72 __at(0x0E4F) volatile __RXF7EIDLbits_t RXF7EIDLbits;
  73
  74 __at(0x0E50) __sfr RXF8SIDH;
  75 __at(0x0E50) volatile __RXF8SIDHbits_t RXF8SIDHbits;
  76
  77 __at(0x0E51) __sfr RXF8SIDL;
  78 __at(0x0E51) volatile __RXF8SIDLbits_t RXF8SIDLbits;
  79
  80 __at(0x0E52) __sfr RXF8EIDH;
  81 __at(0x0E52) volatile __RXF8EIDHbits_t RXF8EIDHbits;
  82
  83 __at(0x0E53) __sfr RXF8EIDL;
  84 __at(0x0E53) volatile __RXF8EIDLbits_t RXF8EIDLbits;
  85
  86 __at(0x0E54) __sfr RXF9SIDH;
  87 __at(0x0E54) volatile __RXF9SIDHbits_t RXF9SIDHbits;
  88
  89 __at(0x0E55) __sfr RXF9SIDL;
  90 __at(0x0E55) volatile __RXF9SIDLbits_t RXF9SIDLbits;
  91
  92 __at(0x0E56) __sfr RXF9EIDH;
  93 __at(0x0E56) volatile __RXF9EIDHbits_t RXF9EIDHbits;
  94
  95 __at(0x0E57) __sfr RXF9EIDL;
  96 __at(0x0E57) volatile __RXF9EIDLbits_t RXF9EIDLbits;
  97
  98 __at(0x0E58) __sfr RXF10SIDH;
  99 __at(0x0E58) volatile __RXF10SIDHbits_t RXF10SIDHbits;
 100
 101 __at(0x0E59) __sfr RXF10SIDL;
 102 __at(0x0E59) volatile __RXF10SIDLbits_t RXF10SIDLbits;
 103
 104 __at(0x0E5A) __sfr RXF10EIDH;
 105 __at(0x0E5A) volatile __RXF10EIDHbits_t RXF10EIDHbits;
 106
 107 __at(0x0E5B) __sfr RXF10EIDL;
 108 __at(0x0E5B) volatile __RXF10EIDLbits_t RXF10EIDLbits;
 109
 110 __at(0x0E5C) __sfr RXF11SIDH;
 111 __at(0x0E5C) volatile __RXF11SIDHbits_t RXF11SIDHbits;
 112
 113 __at(0x0E5D) __sfr RXF11SIDL;
 114 __at(0x0E5D) volatile __RXF11SIDLbits_t RXF11SIDLbits;
 115
 116 __at(0x0E5E) __sfr RXF11EIDH;
 117 __at(0x0E5E) volatile __RXF11EIDHbits_t RXF11EIDHbits;
 118
 119 __at(0x0E5F) __sfr RXF11EIDL;
 120 __at(0x0E5F) volatile __RXF11EIDLbits_t RXF11EIDLbits;
 121
 122 __at(0x0E60) __sfr RXF12SIDH;
 123 __at(0x0E60) volatile __RXF12SIDHbits_t RXF12SIDHbits;
 124
 125 __at(0x0E61) __sfr RXF12SIDL;
 126 __at(0x0E61) volatile __RXF12SIDLbits_t RXF12SIDLbits;
 127
 128 __at(0x0E62) __sfr RXF12EIDH;
 129 __at(0x0E62) volatile __RXF12EIDHbits_t RXF12EIDHbits;
 130
 131 __at(0x0E63) __sfr RXF12EIDL;
 132 __at(0x0E63) volatile __RXF12EIDLbits_t RXF12EIDLbits;
 133
 134 __at(0x0E64) __sfr RXF13SIDH;
 135 __at(0x0E64) volatile __RXF13SIDHbits_t RXF13SIDHbits;
 136
 137 __at(0x0E65) __sfr RXF13SIDL;
 138 __at(0x0E65) volatile __RXF13SIDLbits_t RXF13SIDLbits;
 139
 140 __at(0x0E66) __sfr RXF13EIDH;
 141 __at(0x0E66) volatile __RXF13EIDHbits_t RXF13EIDHbits;
 142
 143 __at(0x0E67) __sfr RXF13EIDL;
 144 __at(0x0E67) volatile __RXF13EIDLbits_t RXF13EIDLbits;
 145
 146 __at(0x0E68) __sfr RXF14SIDH;
 147 __at(0x0E68) volatile __RXF14SIDHbits_t RXF14SIDHbits;
 148
 149 __at(0x0E69) __sfr RXF14SIDL;
 150 __at(0x0E69) volatile __RXF14SIDLbits_t RXF14SIDLbits;
 151
 152 __at(0x0E6A) __sfr RXF14EIDH;
 153 __at(0x0E6A) volatile __RXF14EIDHbits_t RXF14EIDHbits;
 154
 155 __at(0x0E6B) __sfr RXF14EIDL;
 156 __at(0x0E6B) volatile __RXF14EIDLbits_t RXF14EIDLbits;
 157
 158 __at(0x0E6C) __sfr RXF15SIDH;
 159 __at(0x0E6C) volatile __RXF15SIDHbits_t RXF15SIDHbits;
 160
 161 __at(0x0E6D) __sfr RXF15SIDL;
 162 __at(0x0E6D) volatile __RXF15SIDLbits_t RXF15SIDLbits;
 163
 164 __at(0x0E6E) __sfr RXF15EIDH;
 165 __at(0x0E6E) volatile __RXF15EIDHbits_t RXF15EIDHbits;
 166
 167 __at(0x0E6F) __sfr RXF15EIDL;
 168 __at(0x0E6F) volatile __RXF15EIDLbits_t RXF15EIDLbits;
 169
 170 __at(0x0E70) __sfr SDFLC;
 171 __at(0x0E70) volatile __SDFLCbits_t SDFLCbits;
 172
 173 __at(0x0E71) __sfr RXFBCON0;
 174 __at(0x0E71) volatile __RXFBCON0bits_t RXFBCON0bits;
 175
 176 __at(0x0E72) __sfr RXFBCON1;
 177 __at(0x0E72) volatile __RXFBCON1bits_t RXFBCON1bits;
 178
 179 __at(0x0E73) __sfr RXFBCON2;
 180 __at(0x0E73) volatile __RXFBCON2bits_t RXFBCON2bits;
 181
 182 __at(0x0E74) __sfr RXFBCON3;
 183 __at(0x0E74) volatile __RXFBCON3bits_t RXFBCON3bits;
 184
 185 __at(0x0E75) __sfr RXFBCON4;
 186 __at(0x0E75) volatile __RXFBCON4bits_t RXFBCON4bits;
 187
 188 __at(0x0E76) __sfr RXFBCON5;
 189 __at(0x0E76) volatile __RXFBCON5bits_t RXFBCON5bits;
 190
 191 __at(0x0E77) __sfr RXFBCON6;
 192 __at(0x0E77) volatile __RXFBCON6bits_t RXFBCON6bits;
 193
 194 __at(0x0E78) __sfr RXFBCON7;
 195 __at(0x0E78) volatile __RXFBCON7bits_t RXFBCON7bits;
 196
 197 __at(0x0E79) __sfr MSEL0;
 198 __at(0x0E79) volatile __MSEL0bits_t MSEL0bits;
 199
 200 __at(0x0E7A) __sfr MSEL1;
 201 __at(0x0E7A) volatile __MSEL1bits_t MSEL1bits;
 202
 203 __at(0x0E7B) __sfr MSEL2;
 204 __at(0x0E7B) volatile __MSEL2bits_t MSEL2bits;
 205
 206 __at(0x0E7C) __sfr MSEL3;
 207 __at(0x0E7C) volatile __MSEL3bits_t MSEL3bits;
 208
 209 __at(0x0E7D) __sfr BSEL0;
 210 __at(0x0E7D) volatile __BSEL0bits_t BSEL0bits;
 211
 212 __at(0x0E7E) __sfr BIE0;
 213 __at(0x0E7E) volatile __BIE0bits_t BIE0bits;
 214
 215 __at(0x0E7F) __sfr TXBIE;
 216 __at(0x0E7F) volatile __TXBIEbits_t TXBIEbits;
 217
 218 __at(0x0E80) __sfr B0CON;
 219 __at(0x0E80) volatile __B0CONbits_t B0CONbits;
 220
 221 __at(0x0E81) __sfr B0SIDH;
 222 __at(0x0E81) volatile __B0SIDHbits_t B0SIDHbits;
 223
 224 __at(0x0E82) __sfr B0SIDL;
 225 __at(0x0E82) volatile __B0SIDLbits_t B0SIDLbits;
 226
 227 __at(0x0E83) __sfr B0EIDH;
 228 __at(0x0E83) volatile __B0EIDHbits_t B0EIDHbits;
 229
 230 __at(0x0E84) __sfr B0EIDL;
 231 __at(0x0E84) volatile __B0EIDLbits_t B0EIDLbits;
 232
 233 __at(0x0E85) __sfr B0DLC;
 234 __at(0x0E85) volatile __B0DLCbits_t B0DLCbits;
 235
 236 __at(0x0E86) __sfr B0D0;
 237 __at(0x0E86) volatile __B0D0bits_t B0D0bits;
 238
 239 __at(0x0E87) __sfr B0D1;
 240 __at(0x0E87) volatile __B0D1bits_t B0D1bits;
 241
 242 __at(0x0E88) __sfr B0D2;
 243 __at(0x0E88) volatile __B0D2bits_t B0D2bits;
 244
 245 __at(0x0E89) __sfr B0D3;
 246 __at(0x0E89) volatile __B0D3bits_t B0D3bits;
 247
 248 __at(0x0E8A) __sfr B0D4;
 249 __at(0x0E8A) volatile __B0D4bits_t B0D4bits;
 250
 251 __at(0x0E8B) __sfr B0D5;
 252 __at(0x0E8B) volatile __B0D5bits_t B0D5bits;
 253
 254 __at(0x0E8C) __sfr B0D6;
 255 __at(0x0E8C) volatile __B0D6bits_t B0D6bits;
 256
 257 __at(0x0E8D) __sfr B0D7;
 258 __at(0x0E8D) volatile __B0D7bits_t B0D7bits;
 259
 260 __at(0x0E8E) __sfr CANSTAT_RO9;
 261 __at(0x0E8E) volatile __CANSTAT_RO9bits_t CANSTAT_RO9bits;
 262
 263 __at(0x0E8F) __sfr CANCON_RO9;
 264 __at(0x0E8F) volatile __CANCON_RO9bits_t CANCON_RO9bits;
 265
 266 __at(0x0E90) __sfr B1CON;
 267 __at(0x0E90) volatile __B1CONbits_t B1CONbits;
 268
 269 __at(0x0E91) __sfr B1SIDH;
 270 __at(0x0E91) volatile __B1SIDHbits_t B1SIDHbits;
 271
 272 __at(0x0E92) __sfr B1SIDL;
 273 __at(0x0E92) volatile __B1SIDLbits_t B1SIDLbits;
 274
 275 __at(0x0E93) __sfr B1EIDH;
 276 __at(0x0E93) volatile __B1EIDHbits_t B1EIDHbits;
 277
 278 __at(0x0E94) __sfr B1EIDL;
 279 __at(0x0E94) volatile __B1EIDLbits_t B1EIDLbits;
 280
 281 __at(0x0E95) __sfr B1DLC;
 282 __at(0x0E95) volatile __B1DLCbits_t B1DLCbits;
 283
 284 __at(0x0E96) __sfr B1D0;
 285 __at(0x0E96) volatile __B1D0bits_t B1D0bits;
 286
 287 __at(0x0E97) __sfr B1D1;
 288 __at(0x0E97) volatile __B1D1bits_t B1D1bits;
 289
 290 __at(0x0E98) __sfr B1D2;
 291 __at(0x0E98) volatile __B1D2bits_t B1D2bits;
 292
 293 __at(0x0E99) __sfr B1D3;
 294 __at(0x0E99) volatile __B1D3bits_t B1D3bits;
 295
 296 __at(0x0E9A) __sfr B1D4;
 297 __at(0x0E9A) volatile __B1D4bits_t B1D4bits;
 298
 299 __at(0x0E9B) __sfr B1D5;
 300 __at(0x0E9B) volatile __B1D5bits_t B1D5bits;
 301
 302 __at(0x0E9C) __sfr B1D6;
 303 __at(0x0E9C) volatile __B1D6bits_t B1D6bits;
 304
 305 __at(0x0E9D) __sfr B1D7;
 306 __at(0x0E9D) volatile __B1D7bits_t B1D7bits;
 307
 308 __at(0x0E9E) __sfr CANSTAT_RO8;
 309 __at(0x0E9E) volatile __CANSTAT_RO8bits_t CANSTAT_RO8bits;
 310
 311 __at(0x0E9F) __sfr CANCON_RO8;
 312 __at(0x0E9F) volatile __CANCON_RO8bits_t CANCON_RO8bits;
 313
 314 __at(0x0EA0) __sfr B2CON;
 315 __at(0x0EA0) volatile __B2CONbits_t B2CONbits;
 316
 317 __at(0x0EA1) __sfr B2SIDH;
 318 __at(0x0EA1) volatile __B2SIDHbits_t B2SIDHbits;
 319
 320 __at(0x0EA2) __sfr B2SIDL;
 321 __at(0x0EA2) volatile __B2SIDLbits_t B2SIDLbits;
 322
 323 __at(0x0EA3) __sfr B2EIDH;
 324 __at(0x0EA3) volatile __B2EIDHbits_t B2EIDHbits;
 325
 326 __at(0x0EA4) __sfr B2EIDL;
 327 __at(0x0EA4) volatile __B2EIDLbits_t B2EIDLbits;
 328
 329 __at(0x0EA5) __sfr B2DLC;
 330 __at(0x0EA5) volatile __B2DLCbits_t B2DLCbits;
 331
 332 __at(0x0EA6) __sfr B2D0;
 333 __at(0x0EA6) volatile __B2D0bits_t B2D0bits;
 334
 335 __at(0x0EA7) __sfr B2D1;
 336 __at(0x0EA7) volatile __B2D1bits_t B2D1bits;
 337
 338 __at(0x0EA8) __sfr B2D2;
 339 __at(0x0EA8) volatile __B2D2bits_t B2D2bits;
 340
 341 __at(0x0EA9) __sfr B2D3;
 342 __at(0x0EA9) volatile __B2D3bits_t B2D3bits;
 343
 344 __at(0x0EAA) __sfr B2D4;
 345 __at(0x0EAA) volatile __B2D4bits_t B2D4bits;
 346
 347 __at(0x0EAB) __sfr B2D5;
 348 __at(0x0EAB) volatile __B2D5bits_t B2D5bits;
 349
 350 __at(0x0EAC) __sfr B2D6;
 351 __at(0x0EAC) volatile __B2D6bits_t B2D6bits;
 352
 353 __at(0x0EAD) __sfr B2D7;
 354 __at(0x0EAD) volatile __B2D7bits_t B2D7bits;
 355
 356 __at(0x0EAE) __sfr CANSTAT_RO7;
 357 __at(0x0EAE) volatile __CANSTAT_RO7bits_t CANSTAT_RO7bits;
 358
 359 __at(0x0EAF) __sfr CANCON_RO7;
 360 __at(0x0EAF) volatile __CANCON_RO7bits_t CANCON_RO7bits;
 361
 362 __at(0x0EB0) __sfr B3CON;
 363 __at(0x0EB0) volatile __B3CONbits_t B3CONbits;
 364
 365 __at(0x0EB1) __sfr B3SIDH;
 366 __at(0x0EB1) volatile __B3SIDHbits_t B3SIDHbits;
 367
 368 __at(0x0EB2) __sfr B3SIDL;
 369 __at(0x0EB2) volatile __B3SIDLbits_t B3SIDLbits;
 370
 371 __at(0x0EB3) __sfr B3EIDH;
 372 __at(0x0EB3) volatile __B3EIDHbits_t B3EIDHbits;
 373
 374 __at(0x0EB4) __sfr B3EIDL;
 375 __at(0x0EB4) volatile __B3EIDLbits_t B3EIDLbits;
 376
 377 __at(0x0EB5) __sfr B3DLC;
 378 __at(0x0EB5) volatile __B3DLCbits_t B3DLCbits;
 379
 380 __at(0x0EB6) __sfr B3D0;
 381 __at(0x0EB6) volatile __B3D0bits_t B3D0bits;
 382
 383 __at(0x0EB7) __sfr B3D1;
 384 __at(0x0EB7) volatile __B3D1bits_t B3D1bits;
 385
 386 __at(0x0EB8) __sfr B3D2;
 387 __at(0x0EB8) volatile __B3D2bits_t B3D2bits;
 388
 389 __at(0x0EB9) __sfr B3D3;
 390 __at(0x0EB9) volatile __B3D3bits_t B3D3bits;
 391
 392 __at(0x0EBA) __sfr B3D4;
 393 __at(0x0EBA) volatile __B3D4bits_t B3D4bits;
 394
 395 __at(0x0EBB) __sfr B3D5;
 396 __at(0x0EBB) volatile __B3D5bits_t B3D5bits;
 397
 398 __at(0x0EBC) __sfr B3D6;
 399 __at(0x0EBC) volatile __B3D6bits_t B3D6bits;
 400
 401 __at(0x0EBD) __sfr B3D7;
 402 __at(0x0EBD) volatile __B3D7bits_t B3D7bits;
 403
 404 __at(0x0EBE) __sfr CANSTAT_RO6;
 405 __at(0x0EBE) volatile __CANSTAT_RO6bits_t CANSTAT_RO6bits;
 406
 407 __at(0x0EBF) __sfr CANCON_RO6;
 408 __at(0x0EBF) volatile __CANCON_RO6bits_t CANCON_RO6bits;
 409
 410 __at(0x0EC0) __sfr B4CON;
 411 __at(0x0EC0) volatile __B4CONbits_t B4CONbits;
 412
 413 __at(0x0EC1) __sfr B4SIDH;
 414 __at(0x0EC1) volatile __B4SIDHbits_t B4SIDHbits;
 415
 416 __at(0x0EC2) __sfr B4SIDL;
 417 __at(0x0EC2) volatile __B4SIDLbits_t B4SIDLbits;
 418
 419 __at(0x0EC3) __sfr B4EIDH;
 420 __at(0x0EC3) volatile __B4EIDHbits_t B4EIDHbits;
 421
 422 __at(0x0EC4) __sfr B4EIDL;
 423 __at(0x0EC4) volatile __B4EIDLbits_t B4EIDLbits;
 424
 425 __at(0x0EC5) __sfr B4DLC;
 426 __at(0x0EC5) volatile __B4DLCbits_t B4DLCbits;
 427
 428 __at(0x0EC6) __sfr B4D0;
 429 __at(0x0EC6) volatile __B4D0bits_t B4D0bits;
 430
 431 __at(0x0EC7) __sfr B4D1;
 432 __at(0x0EC7) volatile __B4D1bits_t B4D1bits;
 433
 434 __at(0x0EC8) __sfr B4D2;
 435 __at(0x0EC8) volatile __B4D2bits_t B4D2bits;
 436
 437 __at(0x0EC9) __sfr B4D3;
 438 __at(0x0EC9) volatile __B4D3bits_t B4D3bits;
 439
 440 __at(0x0ECA) __sfr B4D4;
 441 __at(0x0ECA) volatile __B4D4bits_t B4D4bits;
 442
 443 __at(0x0ECB) __sfr B4D5;
 444 __at(0x0ECB) volatile __B4D5bits_t B4D5bits;
 445
 446 __at(0x0ECC) __sfr B4D6;
 447 __at(0x0ECC) volatile __B4D6bits_t B4D6bits;
 448
 449 __at(0x0ECD) __sfr B4D7;
 450 __at(0x0ECD) volatile __B4D7bits_t B4D7bits;
 451
 452 __at(0x0ECE) __sfr CANSTAT_RO5;
 453 __at(0x0ECE) volatile __CANSTAT_RO5bits_t CANSTAT_RO5bits;
 454
 455 __at(0x0ECF) __sfr CANCON_RO5;
 456 __at(0x0ECF) volatile __CANCON_RO5bits_t CANCON_RO5bits;
 457
 458 __at(0x0ED0) __sfr B5CON;
 459 __at(0x0ED0) volatile __B5CONbits_t B5CONbits;
 460
 461 __at(0x0ED1) __sfr B5SIDH;
 462 __at(0x0ED1) volatile __B5SIDHbits_t B5SIDHbits;
 463
 464 __at(0x0ED2) __sfr B5SIDL;
 465 __at(0x0ED2) volatile __B5SIDLbits_t B5SIDLbits;
 466
 467 __at(0x0ED3) __sfr B5EIDH;
 468 __at(0x0ED3) volatile __B5EIDHbits_t B5EIDHbits;
 469
 470 __at(0x0ED4) __sfr B5EIDL;
 471 __at(0x0ED4) volatile __B5EIDLbits_t B5EIDLbits;
 472
 473 __at(0x0ED5) __sfr B5DLC;
 474 __at(0x0ED5) volatile __B5DLCbits_t B5DLCbits;
 475
 476 __at(0x0ED6) __sfr B5D0;
 477 __at(0x0ED6) volatile __B5D0bits_t B5D0bits;
 478
 479 __at(0x0ED7) __sfr B5D1;
 480 __at(0x0ED7) volatile __B5D1bits_t B5D1bits;
 481
 482 __at(0x0ED8) __sfr B5D2;
 483 __at(0x0ED8) volatile __B5D2bits_t B5D2bits;
 484
 485 __at(0x0ED9) __sfr B5D3;
 486 __at(0x0ED9) volatile __B5D3bits_t B5D3bits;
 487
 488 __at(0x0EDA) __sfr B5D4;
 489 __at(0x0EDA) volatile __B5D4bits_t B5D4bits;
 490
 491 __at(0x0EDB) __sfr B5D5;
 492 __at(0x0EDB) volatile __B5D5bits_t B5D5bits;
 493
 494 __at(0x0EDC) __sfr B5D6;
 495 __at(0x0EDC) volatile __B5D6bits_t B5D6bits;
 496
 497 __at(0x0EDD) __sfr B5D7;
 498 __at(0x0EDD) volatile __B5D7bits_t B5D7bits;
 499
 500 __at(0x0EDE) __sfr CANSTAT_RO4;
 501 __at(0x0EDE) volatile __CANSTAT_RO4bits_t CANSTAT_RO4bits;
 502
 503 __at(0x0EDF) __sfr CANCON_RO4;
 504 __at(0x0EDF) volatile __CANCON_RO4bits_t CANCON_RO4bits;
 505
 506 __at(0x0EE0) __sfr RXF0SIDH;
 507 __at(0x0EE0) volatile __RXF0SIDHbits_t RXF0SIDHbits;
 508
 509 __at(0x0EE1) __sfr RXF0SIDL;
 510 __at(0x0EE1) volatile __RXF0SIDLbits_t RXF0SIDLbits;
 511
 512 __at(0x0EE2) __sfr RXF0EIDH;
 513 __at(0x0EE2) volatile __RXF0EIDHbits_t RXF0EIDHbits;
 514
 515 __at(0x0EE3) __sfr RXF0EIDL;
 516 __at(0x0EE3) volatile __RXF0EIDLbits_t RXF0EIDLbits;
 517
 518 __at(0x0EE4) __sfr RXF1SIDH;
 519 __at(0x0EE4) volatile __RXF1SIDHbits_t RXF1SIDHbits;
 520
 521 __at(0x0EE5) __sfr RXF1SIDL;
 522 __at(0x0EE5) volatile __RXF1SIDLbits_t RXF1SIDLbits;
 523
 524 __at(0x0EE6) __sfr RXF1EIDH;
 525 __at(0x0EE6) volatile __RXF1EIDHbits_t RXF1EIDHbits;
 526
 527 __at(0x0EE7) __sfr RXF1EIDL;
 528 __at(0x0EE7) volatile __RXF1EIDLbits_t RXF1EIDLbits;
 529
 530 __at(0x0EE8) __sfr RXF2SIDH;
 531 __at(0x0EE8) volatile __RXF2SIDHbits_t RXF2SIDHbits;
 532
 533 __at(0x0EE9) __sfr RXF2SIDL;
 534 __at(0x0EE9) volatile __RXF2SIDLbits_t RXF2SIDLbits;
 535
 536 __at(0x0EEA) __sfr RXF2EIDH;
 537 __at(0x0EEA) volatile __RXF2EIDHbits_t RXF2EIDHbits;
 538
 539 __at(0x0EEB) __sfr RXF2EIDL;
 540 __at(0x0EEB) volatile __RXF2EIDLbits_t RXF2EIDLbits;
 541
 542 __at(0x0EEC) __sfr RXF3SIDH;
 543 __at(0x0EEC) volatile __RXF3SIDHbits_t RXF3SIDHbits;
 544
 545 __at(0x0EED) __sfr RXF3SIDL;
 546 __at(0x0EED) volatile __RXF3SIDLbits_t RXF3SIDLbits;
 547
 548 __at(0x0EEE) __sfr RXF3EIDH;
 549 __at(0x0EEE) volatile __RXF3EIDHbits_t RXF3EIDHbits;
 550
 551 __at(0x0EEF) __sfr RXF3EIDL;
 552 __at(0x0EEF) volatile __RXF3EIDLbits_t RXF3EIDLbits;
 553
 554 __at(0x0EF0) __sfr RXF4SIDH;
 555 __at(0x0EF0) volatile __RXF4SIDHbits_t RXF4SIDHbits;
 556
 557 __at(0x0EF1) __sfr RXF4SIDL;
 558 __at(0x0EF1) volatile __RXF4SIDLbits_t RXF4SIDLbits;
 559
 560 __at(0x0EF2) __sfr RXF4EIDH;
 561 __at(0x0EF2) volatile __RXF4EIDHbits_t RXF4EIDHbits;
 562
 563 __at(0x0EF3) __sfr RXF4EIDL;
 564 __at(0x0EF3) volatile __RXF4EIDLbits_t RXF4EIDLbits;
 565
 566 __at(0x0EF4) __sfr RXF5SIDH;
 567 __at(0x0EF4) volatile __RXF5SIDHbits_t RXF5SIDHbits;
 568
 569 __at(0x0EF5) __sfr RXF5SIDL;
 570 __at(0x0EF5) volatile __RXF5SIDLbits_t RXF5SIDLbits;
 571
 572 __at(0x0EF6) __sfr RXF5EIDH;
 573 __at(0x0EF6) volatile __RXF5EIDHbits_t RXF5EIDHbits;
 574
 575 __at(0x0EF7) __sfr RXF5EIDL;
 576 __at(0x0EF7) volatile __RXF5EIDLbits_t RXF5EIDLbits;
 577
 578 __at(0x0EF8) __sfr RXM0SIDH;
 579 __at(0x0EF8) volatile __RXM0SIDHbits_t RXM0SIDHbits;
 580
 581 __at(0x0EF9) __sfr RXM0SIDL;
 582 __at(0x0EF9) volatile __RXM0SIDLbits_t RXM0SIDLbits;
 583
 584 __at(0x0EFA) __sfr RXM0EIDH;
 585 __at(0x0EFA) volatile __RXM0EIDHbits_t RXM0EIDHbits;
 586
 587 __at(0x0EFB) __sfr RXM0EIDL;
 588 __at(0x0EFB) volatile __RXM0EIDLbits_t RXM0EIDLbits;
 589
 590 __at(0x0EFC) __sfr RXM1SIDH;
 591 __at(0x0EFC) volatile __RXM1SIDHbits_t RXM1SIDHbits;
 592
 593 __at(0x0EFD) __sfr RXM1SIDL;
 594 __at(0x0EFD) volatile __RXM1SIDLbits_t RXM1SIDLbits;
 595
 596 __at(0x0EFE) __sfr RXM1EIDH;
 597 __at(0x0EFE) volatile __RXM1EIDHbits_t RXM1EIDHbits;
 598
 599 __at(0x0EFF) __sfr RXM1EIDL;
 600 __at(0x0EFF) volatile __RXM1EIDLbits_t RXM1EIDLbits;
 601
 602 __at(0x0F00) __sfr TXB2CON;
 603 __at(0x0F00) volatile __TXB2CONbits_t TXB2CONbits;
 604
 605 __at(0x0F01) __sfr TXB2SIDH;
 606 __at(0x0F01) volatile __TXB2SIDHbits_t TXB2SIDHbits;
 607
 608 __at(0x0F02) __sfr TXB2SIDL;
 609 __at(0x0F02) volatile __TXB2SIDLbits_t TXB2SIDLbits;
 610
 611 __at(0x0F03) __sfr TXB2EIDH;
 612 __at(0x0F03) volatile __TXB2EIDHbits_t TXB2EIDHbits;
 613
 614 __at(0x0F04) __sfr TXB2EIDL;
 615 __at(0x0F04) volatile __TXB2EIDLbits_t TXB2EIDLbits;
 616
 617 __at(0x0F05) __sfr TXB2DLC;
 618 __at(0x0F05) volatile __TXB2DLCbits_t TXB2DLCbits;
 619
 620 __at(0x0F06) __sfr TXB2D0;
 621 __at(0x0F06) volatile __TXB2D0bits_t TXB2D0bits;
 622
 623 __at(0x0F07) __sfr TXB2D1;
 624 __at(0x0F07) volatile __TXB2D1bits_t TXB2D1bits;
 625
 626 __at(0x0F08) __sfr TXB2D2;
 627 __at(0x0F08) volatile __TXB2D2bits_t TXB2D2bits;
 628
 629 __at(0x0F09) __sfr TXB2D3;
 630 __at(0x0F09) volatile __TXB2D3bits_t TXB2D3bits;
 631
 632 __at(0x0F0A) __sfr TXB2D4;
 633 __at(0x0F0A) volatile __TXB2D4bits_t TXB2D4bits;
 634
 635 __at(0x0F0B) __sfr TXB2D5;
 636 __at(0x0F0B) volatile __TXB2D5bits_t TXB2D5bits;
 637
 638 __at(0x0F0C) __sfr TXB2D6;
 639 __at(0x0F0C) volatile __TXB2D6bits_t TXB2D6bits;
 640
 641 __at(0x0F0D) __sfr TXB2D7;
 642 __at(0x0F0D) volatile __TXB2D7bits_t TXB2D7bits;
 643
 644 __at(0x0F0E) __sfr CANSTAT_RO3;
 645 __at(0x0F0E) volatile __CANSTAT_RO3bits_t CANSTAT_RO3bits;
 646
 647 __at(0x0F0F) __sfr CANCON_RO3;
 648 __at(0x0F0F) volatile __CANCON_RO3bits_t CANCON_RO3bits;
 649
 650 __at(0x0F10) __sfr TXB1CON;
 651 __at(0x0F10) volatile __TXB1CONbits_t TXB1CONbits;
 652
 653 __at(0x0F11) __sfr TXB1SIDH;
 654 __at(0x0F11) volatile __TXB1SIDHbits_t TXB1SIDHbits;
 655
 656 __at(0x0F12) __sfr TXB1SIDL;
 657 __at(0x0F12) volatile __TXB1SIDLbits_t TXB1SIDLbits;
 658
 659 __at(0x0F13) __sfr TXB1EIDH;
 660 __at(0x0F13) volatile __TXB1EIDHbits_t TXB1EIDHbits;
 661
 662 __at(0x0F14) __sfr TXB1EIDL;
 663 __at(0x0F14) volatile __TXB1EIDLbits_t TXB1EIDLbits;
 664
 665 __at(0x0F15) __sfr TXB1DLC;
 666 __at(0x0F15) volatile __TXB1DLCbits_t TXB1DLCbits;
 667
 668 __at(0x0F16) __sfr TXB1D0;
 669 __at(0x0F16) volatile __TXB1D0bits_t TXB1D0bits;
 670
 671 __at(0x0F17) __sfr TXB1D1;
 672 __at(0x0F17) volatile __TXB1D1bits_t TXB1D1bits;
 673
 674 __at(0x0F18) __sfr TXB1D2;
 675 __at(0x0F18) volatile __TXB1D2bits_t TXB1D2bits;
 676
 677 __at(0x0F19) __sfr TXB1D3;
 678 __at(0x0F19) volatile __TXB1D3bits_t TXB1D3bits;
 679
 680 __at(0x0F1A) __sfr TXB1D4;
 681 __at(0x0F1A) volatile __TXB1D4bits_t TXB1D4bits;
 682
 683 __at(0x0F1B) __sfr TXB1D5;
 684 __at(0x0F1B) volatile __TXB1D5bits_t TXB1D5bits;
 685
 686 __at(0x0F1C) __sfr TXB1D6;
 687 __at(0x0F1C) volatile __TXB1D6bits_t TXB1D6bits;
 688
 689 __at(0x0F1D) __sfr TXB1D7;
 690 __at(0x0F1D) volatile __TXB1D7bits_t TXB1D7bits;
 691
 692 __at(0x0F1E) __sfr CANSTAT_RO2;
 693 __at(0x0F1E) volatile __CANSTAT_RO2bits_t CANSTAT_RO2bits;
 694
 695 __at(0x0F1F) __sfr CANCON_RO2;
 696 __at(0x0F1F) volatile __CANCON_RO2bits_t CANCON_RO2bits;
 697
 698 __at(0x0F20) __sfr TXB0CON;
 699 __at(0x0F20) volatile __TXB0CONbits_t TXB0CONbits;
 700
 701 __at(0x0F21) __sfr TXB0SIDH;
 702 __at(0x0F21) volatile __TXB0SIDHbits_t TXB0SIDHbits;
 703
 704 __at(0x0F22) __sfr TXB0SIDL;
 705 __at(0x0F22) volatile __TXB0SIDLbits_t TXB0SIDLbits;
 706
 707 __at(0x0F23) __sfr TXB0EIDH;
 708 __at(0x0F23) volatile __TXB0EIDHbits_t TXB0EIDHbits;
 709
 710 __at(0x0F24) __sfr TXB0EIDL;
 711 __at(0x0F24) volatile __TXB0EIDLbits_t TXB0EIDLbits;
 712
 713 __at(0x0F25) __sfr TXB0DLC;
 714 __at(0x0F25) volatile __TXB0DLCbits_t TXB0DLCbits;
 715
 716 __at(0x0F26) __sfr TXB0D0;
 717 __at(0x0F26) volatile __TXB0D0bits_t TXB0D0bits;
 718
 719 __at(0x0F27) __sfr TXB0D1;
 720 __at(0x0F27) volatile __TXB0D1bits_t TXB0D1bits;
 721
 722 __at(0x0F28) __sfr TXB0D2;
 723 __at(0x0F28) volatile __TXB0D2bits_t TXB0D2bits;
 724
 725 __at(0x0F29) __sfr TXB0D3;
 726 __at(0x0F29) volatile __TXB0D3bits_t TXB0D3bits;
 727
 728 __at(0x0F2A) __sfr TXB0D4;
 729 __at(0x0F2A) volatile __TXB0D4bits_t TXB0D4bits;
 730
 731 __at(0x0F2B) __sfr TXB0D5;
 732 __at(0x0F2B) volatile __TXB0D5bits_t TXB0D5bits;
 733
 734 __at(0x0F2C) __sfr TXB0D6;
 735 __at(0x0F2C) volatile __TXB0D6bits_t TXB0D6bits;
 736
 737 __at(0x0F2D) __sfr TXB0D7;
 738 __at(0x0F2D) volatile __TXB0D7bits_t TXB0D7bits;
 739
 740 __at(0x0F2E) __sfr CANSTAT_RO1;
 741 __at(0x0F2E) volatile __CANSTAT_RO1bits_t CANSTAT_RO1bits;
 742
 743 __at(0x0F2F) __sfr CANCON_RO1;
 744 __at(0x0F2F) volatile __CANCON_RO1bits_t CANCON_RO1bits;
 745
 746 __at(0x0F30) __sfr RXB1CON;
 747 __at(0x0F30) volatile __RXB1CONbits_t RXB1CONbits;
 748
 749 __at(0x0F31) __sfr RXB1SIDH;
 750 __at(0x0F31) volatile __RXB1SIDHbits_t RXB1SIDHbits;
 751
 752 __at(0x0F32) __sfr RXB1SIDL;
 753 __at(0x0F32) volatile __RXB1SIDLbits_t RXB1SIDLbits;
 754
 755 __at(0x0F33) __sfr RXB1EIDH;
 756 __at(0x0F33) volatile __RXB1EIDHbits_t RXB1EIDHbits;
 757
 758 __at(0x0F34) __sfr RXB1EIDL;
 759 __at(0x0F34) volatile __RXB1EIDLbits_t RXB1EIDLbits;
 760
 761 __at(0x0F35) __sfr RXB1DLC;
 762 __at(0x0F35) volatile __RXB1DLCbits_t RXB1DLCbits;
 763
 764 __at(0x0F36) __sfr RXB1D0;
 765 __at(0x0F36) volatile __RXB1D0bits_t RXB1D0bits;
 766
 767 __at(0x0F37) __sfr RXB1D1;
 768 __at(0x0F37) volatile __RXB1D1bits_t RXB1D1bits;
 769
 770 __at(0x0F38) __sfr RXB1D2;
 771 __at(0x0F38) volatile __RXB1D2bits_t RXB1D2bits;
 772
 773 __at(0x0F39) __sfr RXB1D3;
 774 __at(0x0F39) volatile __RXB1D3bits_t RXB1D3bits;
 775
 776 __at(0x0F3A) __sfr RXB1D4;
 777 __at(0x0F3A) volatile __RXB1D4bits_t RXB1D4bits;
 778
 779 __at(0x0F3B) __sfr RXB1D5;
 780 __at(0x0F3B) volatile __RXB1D5bits_t RXB1D5bits;
 781
 782 __at(0x0F3C) __sfr RXB1D6;
 783 __at(0x0F3C) volatile __RXB1D6bits_t RXB1D6bits;
 784
 785 __at(0x0F3D) __sfr RXB1D7;
 786 __at(0x0F3D) volatile __RXB1D7bits_t RXB1D7bits;
 787
 788 __at(0x0F3E) __sfr CANSTAT_RO0;
 789 __at(0x0F3E) volatile __CANSTAT_RO0bits_t CANSTAT_RO0bits;
 790
 791 __at(0x0F3F) __sfr CANCON_RO0;
 792 __at(0x0F3F) volatile __CANCON_RO0bits_t CANCON_RO0bits;
 793
 794 __at(0x0F47) __sfr CCP5CON;
 795 __at(0x0F47) volatile __CCP5CONbits_t CCP5CONbits;
 796
 797 __at(0x0F48) __sfr CCPR5;
 798
 799 __at(0x0F48) __sfr CCPR5L;
 800
 801 __at(0x0F49) __sfr CCPR5H;
 802
 803 __at(0x0F4A) __sfr CCP4CON;
 804 __at(0x0F4A) volatile __CCP4CONbits_t CCP4CONbits;
 805
 806 __at(0x0F4B) __sfr CCPR4;
 807
 808 __at(0x0F4B) __sfr CCPR4L;
 809
 810 __at(0x0F4C) __sfr CCPR4H;
 811
 812 __at(0x0F4D) __sfr CCP3CON;
 813 __at(0x0F4D) volatile __CCP3CONbits_t CCP3CONbits;
 814
 815 __at(0x0F4E) __sfr CCPR3;
 816
 817 __at(0x0F4E) __sfr CCPR3L;
 818
 819 __at(0x0F4F) __sfr CCPR3H;
 820
 821 __at(0x0F50) __sfr CCP2CON;
 822 __at(0x0F50) volatile __CCP2CONbits_t CCP2CONbits;
 823
 824 __at(0x0F50) __sfr ECCP2CON;
 825 __at(0x0F50) volatile __ECCP2CONbits_t ECCP2CONbits;
 826
 827 __at(0x0F51) __sfr CCPR2;
 828
 829 __at(0x0F51) __sfr CCPR2L;
 830
 831 __at(0x0F52) __sfr CCPR2H;
 832
 833 __at(0x0F53) __sfr CTMUICON;
 834 __at(0x0F53) volatile __CTMUICONbits_t CTMUICONbits;
 835
 836 __at(0x0F54) __sfr CTMUCONL;
 837 __at(0x0F54) volatile __CTMUCONLbits_t CTMUCONLbits;
 838
 839 __at(0x0F55) __sfr CTMUCONH;
 840 __at(0x0F55) volatile __CTMUCONHbits_t CTMUCONHbits;
 841
 842 __at(0x0F56) __sfr PADCFG1;
 843 __at(0x0F56) volatile __PADCFG1bits_t PADCFG1bits;
 844
 845 __at(0x0F57) __sfr PMD2;
 846 __at(0x0F57) volatile __PMD2bits_t PMD2bits;
 847
 848 __at(0x0F58) __sfr PMD1;
 849 __at(0x0F58) volatile __PMD1bits_t PMD1bits;
 850
 851 __at(0x0F59) __sfr PMD0;
 852 __at(0x0F59) volatile __PMD0bits_t PMD0bits;
 853
 854 __at(0x0F5A) __sfr IOCB;
 855 __at(0x0F5A) volatile __IOCBbits_t IOCBbits;
 856
 857 __at(0x0F5B) __sfr WPUB;
 858 __at(0x0F5B) volatile __WPUBbits_t WPUBbits;
 859
 860 __at(0x0F5C) __sfr ANCON1;
 861 __at(0x0F5C) volatile __ANCON1bits_t ANCON1bits;
 862
 863 __at(0x0F5D) __sfr ANCON0;
 864 __at(0x0F5D) volatile __ANCON0bits_t ANCON0bits;
 865
 866 __at(0x0F5E) __sfr CM2CON;
 867 __at(0x0F5E) volatile __CM2CONbits_t CM2CONbits;
 868
 869 __at(0x0F5E) __sfr CM2CON1;
 870 __at(0x0F5E) volatile __CM2CON1bits_t CM2CON1bits;
 871
 872 __at(0x0F5F) __sfr CM1CON;
 873 __at(0x0F5F) volatile __CM1CONbits_t CM1CONbits;
 874
 875 __at(0x0F5F) __sfr CM1CON1;
 876 __at(0x0F5F) volatile __CM1CON1bits_t CM1CON1bits;
 877
 878 __at(0x0F60) __sfr RXB0CON;
 879 __at(0x0F60) volatile __RXB0CONbits_t RXB0CONbits;
 880
 881 __at(0x0F61) __sfr RXB0SIDH;
 882 __at(0x0F61) volatile __RXB0SIDHbits_t RXB0SIDHbits;
 883
 884 __at(0x0F62) __sfr RXB0SIDL;
 885 __at(0x0F62) volatile __RXB0SIDLbits_t RXB0SIDLbits;
 886
 887 __at(0x0F63) __sfr RXB0EIDH;
 888 __at(0x0F63) volatile __RXB0EIDHbits_t RXB0EIDHbits;
 889
 890 __at(0x0F64) __sfr RXB0EIDL;
 891 __at(0x0F64) volatile __RXB0EIDLbits_t RXB0EIDLbits;
 892
 893 __at(0x0F65) __sfr RXB0DLC;
 894 __at(0x0F65) volatile __RXB0DLCbits_t RXB0DLCbits;
 895
 896 __at(0x0F66) __sfr RXB0D0;
 897 __at(0x0F66) volatile __RXB0D0bits_t RXB0D0bits;
 898
 899 __at(0x0F67) __sfr RXB0D1;
 900 __at(0x0F67) volatile __RXB0D1bits_t RXB0D1bits;
 901
 902 __at(0x0F68) __sfr RXB0D2;
 903 __at(0x0F68) volatile __RXB0D2bits_t RXB0D2bits;
 904
 905 __at(0x0F69) __sfr RXB0D3;
 906 __at(0x0F69) volatile __RXB0D3bits_t RXB0D3bits;
 907
 908 __at(0x0F6A) __sfr RXB0D4;
 909 __at(0x0F6A) volatile __RXB0D4bits_t RXB0D4bits;
 910
 911 __at(0x0F6B) __sfr RXB0D5;
 912 __at(0x0F6B) volatile __RXB0D5bits_t RXB0D5bits;
 913
 914 __at(0x0F6C) __sfr RXB0D6;
 915 __at(0x0F6C) volatile __RXB0D6bits_t RXB0D6bits;
 916
 917 __at(0x0F6D) __sfr RXB0D7;
 918 __at(0x0F6D) volatile __RXB0D7bits_t RXB0D7bits;
 919
 920 __at(0x0F6E) __sfr CANSTAT;
 921 __at(0x0F6E) volatile __CANSTATbits_t CANSTATbits;
 922
 923 __at(0x0F6F) __sfr CANCON;
 924 __at(0x0F6F) volatile __CANCONbits_t CANCONbits;
 925
 926 __at(0x0F70) __sfr CIOCON;
 927 __at(0x0F70) volatile __CIOCONbits_t CIOCONbits;
 928
 929 __at(0x0F71) __sfr COMSTAT;
 930 __at(0x0F71) volatile __COMSTATbits_t COMSTATbits;
 931
 932 __at(0x0F72) __sfr ECANCON;
 933 __at(0x0F72) volatile __ECANCONbits_t ECANCONbits;
 934
 935 __at(0x0F73) __sfr EEDATA;
 936
 937 __at(0x0F74) __sfr EEADR;
 938
 939 __at(0x0F75) __sfr EEADRH;
 940
 941 __at(0x0F76) __sfr PIE5;
 942 __at(0x0F76) volatile __PIE5bits_t PIE5bits;
 943
 944 __at(0x0F77) __sfr PIR5;
 945 __at(0x0F77) volatile __PIR5bits_t PIR5bits;
 946
 947 __at(0x0F78) __sfr IPR5;
 948 __at(0x0F78) volatile __IPR5bits_t IPR5bits;
 949
 950 __at(0x0F79) __sfr TXREG2;
 951
 952 __at(0x0F7A) __sfr RCREG2;
 953
 954 __at(0x0F7B) __sfr SPBRG2;
 955
 956 __at(0x0F7C) __sfr SPBRGH2;
 957
 958 __at(0x0F7D) __sfr SPBRGH1;
 959
 960 __at(0x0F7E) __sfr EECON2;
 961
 962 __at(0x0F7F) __sfr EECON1;
 963 __at(0x0F7F) volatile __EECON1bits_t EECON1bits;
 964
 965 __at(0x0F80) __sfr PORTA;
 966 __at(0x0F80) volatile __PORTAbits_t PORTAbits;
 967
 968 __at(0x0F81) __sfr PORTB;
 969 __at(0x0F81) volatile __PORTBbits_t PORTBbits;
 970
 971 __at(0x0F82) __sfr PORTC;
 972 __at(0x0F82) volatile __PORTCbits_t PORTCbits;
 973
 974 __at(0x0F84) __sfr PORTE;
 975 __at(0x0F84) volatile __PORTEbits_t PORTEbits;
 976
 977 __at(0x0F87) __sfr TMR4;
 978
 979 __at(0x0F88) __sfr T4CON;
 980 __at(0x0F88) volatile __T4CONbits_t T4CONbits;
 981
 982 __at(0x0F89) __sfr LATA;
 983 __at(0x0F89) volatile __LATAbits_t LATAbits;
 984
 985 __at(0x0F8A) __sfr LATB;
 986 __at(0x0F8A) volatile __LATBbits_t LATBbits;
 987
 988 __at(0x0F8B) __sfr LATC;
 989 __at(0x0F8B) volatile __LATCbits_t LATCbits;
 990
 991 __at(0x0F90) __sfr SLRCON;
 992 __at(0x0F90) volatile __SLRCONbits_t SLRCONbits;
 993
 994 __at(0x0F91) __sfr ODCON;
 995 __at(0x0F91) volatile __ODCONbits_t ODCONbits;
 996
 997 __at(0x0F92) __sfr TRISA;
 998 __at(0x0F92) volatile __TRISAbits_t TRISAbits;
 999
1000 __at(0x0F93) __sfr TRISB;
1001 __at(0x0F93) volatile __TRISBbits_t TRISBbits;
1002
1003 __at(0x0F94) __sfr TRISC;
1004 __at(0x0F94) volatile __TRISCbits_t TRISCbits;
1005
1006 __at(0x0F99) __sfr CCPTMRS;
1007 __at(0x0F99) volatile __CCPTMRSbits_t CCPTMRSbits;
1008
1009 __at(0x0F9A) __sfr REFOCON;
1010 __at(0x0F9A) volatile __REFOCONbits_t REFOCONbits;
1011
1012 __at(0x0F9B) __sfr OSCTUNE;
1013 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits;
1014
1015 __at(0x0F9C) __sfr PSTR1CON;
1016 __at(0x0F9C) volatile __PSTR1CONbits_t PSTR1CONbits;
1017
1018 __at(0x0F9D) __sfr PIE1;
1019 __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
1020
1021 __at(0x0F9E) __sfr PIR1;
1022 __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
1023
1024 __at(0x0F9F) __sfr IPR1;
1025 __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
1026
1027 __at(0x0FA0) __sfr PIE2;
1028 __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
1029
1030 __at(0x0FA1) __sfr PIR2;
1031 __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
1032
1033 __at(0x0FA2) __sfr IPR2;
1034 __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
1035
1036 __at(0x0FA3) __sfr PIE3;
1037 __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
1038
1039 __at(0x0FA4) __sfr PIR3;
1040 __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
1041
1042 __at(0x0FA5) __sfr IPR3;
1043 __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
1044
1045 __at(0x0FA6) __sfr RCSTA2;
1046 __at(0x0FA6) volatile __RCSTA2bits_t RCSTA2bits;
1047
1048 __at(0x0FA7) __sfr BAUDCON1;
1049 __at(0x0FA7) volatile __BAUDCON1bits_t BAUDCON1bits;
1050
1051 __at(0x0FA8) __sfr HLVDCON;
1052 __at(0x0FA8) volatile __HLVDCONbits_t HLVDCONbits;
1053
1054 __at(0x0FA9) __sfr PR4;
1055
1056 __at(0x0FAA) __sfr T1GCON;
1057 __at(0x0FAA) volatile __T1GCONbits_t T1GCONbits;
1058
1059 __at(0x0FAB) __sfr RCSTA;
1060 __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
1061
1062 __at(0x0FAB) __sfr RCSTA1;
1063 __at(0x0FAB) volatile __RCSTA1bits_t RCSTA1bits;
1064
1065 __at(0x0FAC) __sfr TXSTA;
1066 __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
1067
1068 __at(0x0FAC) __sfr TXSTA1;
1069 __at(0x0FAC) volatile __TXSTA1bits_t TXSTA1bits;
1070
1071 __at(0x0FAD) __sfr TXREG;
1072
1073 __at(0x0FAD) __sfr TXREG1;
1074
1075 __at(0x0FAE) __sfr RCREG;
1076
1077 __at(0x0FAE) __sfr RCREG1;
1078
1079 __at(0x0FAF) __sfr SPBRG;
1080
1081 __at(0x0FAF) __sfr SPBRG1;
1082
1083 __at(0x0FB0) __sfr T3GCON;
1084 __at(0x0FB0) volatile __T3GCONbits_t T3GCONbits;
1085
1086 __at(0x0FB1) __sfr T3CON;
1087 __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
1088
1089 __at(0x0FB2) __sfr TMR3;
1090
1091 __at(0x0FB2) __sfr TMR3L;
1092
1093 __at(0x0FB3) __sfr TMR3H;
1094
1095 __at(0x0FB4) __sfr CMSTAT;
1096 __at(0x0FB4) volatile __CMSTATbits_t CMSTATbits;
1097
1098 __at(0x0FB4) __sfr CMSTATUS;
1099 __at(0x0FB4) volatile __CMSTATUSbits_t CMSTATUSbits;
1100
1101 __at(0x0FB5) __sfr CVRCON;
1102 __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
1103
1104 __at(0x0FB6) __sfr PIE4;
1105 __at(0x0FB6) volatile __PIE4bits_t PIE4bits;
1106
1107 __at(0x0FB7) __sfr PIR4;
1108 __at(0x0FB7) volatile __PIR4bits_t PIR4bits;
1109
1110 __at(0x0FB8) __sfr IPR4;
1111 __at(0x0FB8) volatile __IPR4bits_t IPR4bits;
1112
1113 __at(0x0FB9) __sfr BAUDCON2;
1114 __at(0x0FB9) volatile __BAUDCON2bits_t BAUDCON2bits;
1115
1116 __at(0x0FBA) __sfr TXSTA2;
1117 __at(0x0FBA) volatile __TXSTA2bits_t TXSTA2bits;
1118
1119 __at(0x0FBB) __sfr CCP1CON;
1120 __at(0x0FBB) volatile __CCP1CONbits_t CCP1CONbits;
1121
1122 __at(0x0FBB) __sfr ECCP1CON;
1123 __at(0x0FBB) volatile __ECCP1CONbits_t ECCP1CONbits;
1124
1125 __at(0x0FBC) __sfr CCPR1;
1126
1127 __at(0x0FBC) __sfr CCPR1L;
1128
1129 __at(0x0FBD) __sfr CCPR1H;
1130
1131 __at(0x0FBE) __sfr ECCP1DEL;
1132 __at(0x0FBE) volatile __ECCP1DELbits_t ECCP1DELbits;
1133
1134 __at(0x0FBE) __sfr PWM1CON;
1135 __at(0x0FBE) volatile __PWM1CONbits_t PWM1CONbits;
1136
1137 __at(0x0FBF) __sfr ECCP1AS;
1138 __at(0x0FBF) volatile __ECCP1ASbits_t ECCP1ASbits;
1139
1140 __at(0x0FC0) __sfr ADCON2;
1141 __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
1142
1143 __at(0x0FC1) __sfr ADCON1;
1144 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
1145
1146 __at(0x0FC2) __sfr ADCON0;
1147 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
1148
1149 __at(0x0FC3) __sfr ADRES;
1150
1151 __at(0x0FC3) __sfr ADRESL;
1152
1153 __at(0x0FC4) __sfr ADRESH;
1154
1155 __at(0x0FC5) __sfr SSPCON2;
1156 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
1157
1158 __at(0x0FC6) __sfr SSPCON1;
1159 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
1160
1161 __at(0x0FC7) __sfr SSPSTAT;
1162 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
1163
1164 __at(0x0FC8) __sfr SSPADD;
1165 __at(0x0FC8) volatile __SSPADDbits_t SSPADDbits;
1166
1167 __at(0x0FC9) __sfr SSPBUF;
1168
1169 __at(0x0FCA) __sfr T2CON;
1170 __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
1171
1172 __at(0x0FCB) __sfr PR2;
1173
1174 __at(0x0FCC) __sfr TMR2;
1175
1176 __at(0x0FCD) __sfr T1CON;
1177 __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
1178
1179 __at(0x0FCE) __sfr TMR1;
1180
1181 __at(0x0FCE) __sfr TMR1L;
1182
1183 __at(0x0FCF) __sfr TMR1H;
1184
1185 __at(0x0FD0) __sfr RCON;
1186 __at(0x0FD0) volatile __RCONbits_t RCONbits;
1187
1188 __at(0x0FD1) __sfr WDTCON;
1189 __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
1190
1191 __at(0x0FD2) __sfr OSCCON2;
1192 __at(0x0FD2) volatile __OSCCON2bits_t OSCCON2bits;
1193
1194 __at(0x0FD3) __sfr OSCCON;
1195 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
1196
1197 __at(0x0FD5) __sfr T0CON;
1198 __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
1199
1200 __at(0x0FD6) __sfr TMR0;
1201
1202 __at(0x0FD6) __sfr TMR0L;
1203
1204 __at(0x0FD7) __sfr TMR0H;
1205
1206 __at(0x0FD8) __sfr STATUS;
1207 __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
1208
1209 __at(0x0FD9) __sfr FSR2L;
1210
1211 __at(0x0FDA) __sfr FSR2H;
1212
1213 __at(0x0FDB) __sfr PLUSW2;
1214
1215 __at(0x0FDC) __sfr PREINC2;
1216
1217 __at(0x0FDD) __sfr POSTDEC2;
1218
1219 __at(0x0FDE) __sfr POSTINC2;
1220
1221 __at(0x0FDF) __sfr INDF2;
1222
1223 __at(0x0FE0) __sfr BSR;
1224
1225 __at(0x0FE1) __sfr FSR1L;
1226
1227 __at(0x0FE2) __sfr FSR1H;
1228
1229 __at(0x0FE3) __sfr PLUSW1;
1230
1231 __at(0x0FE4) __sfr PREINC1;
1232
1233 __at(0x0FE5) __sfr POSTDEC1;
1234
1235 __at(0x0FE6) __sfr POSTINC1;
1236
1237 __at(0x0FE7) __sfr INDF1;
1238
1239 __at(0x0FE8) __sfr WREG;
1240
1241 __at(0x0FE9) __sfr FSR0L;
1242
1243 __at(0x0FEA) __sfr FSR0H;
1244
1245 __at(0x0FEB) __sfr PLUSW0;
1246
1247 __at(0x0FEC) __sfr PREINC0;
1248
1249 __at(0x0FED) __sfr POSTDEC0;
1250
1251 __at(0x0FEE) __sfr POSTINC0;
1252
1253 __at(0x0FEF) __sfr INDF0;
1254
1255 __at(0x0FF0) __sfr INTCON3;
1256 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
1257
1258 __at(0x0FF1) __sfr INTCON2;
1259 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
1260
1261 __at(0x0FF2) __sfr INTCON;
1262 __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
1263
1264 __at(0x0FF2) __sfr INTCON1;
1265 __at(0x0FF2) volatile __INTCON1bits_t INTCON1bits;
1266
1267 __at(0x0FF3) __sfr PROD;
1268
1269 __at(0x0FF3) __sfr PRODL;
1270
1271 __at(0x0FF4) __sfr PRODH;
1272
1273 __at(0x0FF5) __sfr TABLAT;
1274
1275 __at(0x0FF6) __sfr TBLPTR;
1276
1277 __at(0x0FF6) __sfr TBLPTRL;
1278
1279 __at(0x0FF7) __sfr TBLPTRH;
1280
1281 __at(0x0FF8) __sfr TBLPTRU;
1282
1283 __at(0x0FF9) __sfr PC;
1284
1285 __at(0x0FF9) __sfr PCL;
1286
1287 __at(0x0FFA) __sfr PCLATH;
1288
1289 __at(0x0FFB) __sfr PCLATU;
1290
1291 __at(0x0FFC) __sfr STKPTR;
1292 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
1293
1294 __at(0x0FFD) __sfr TOS;
1295
1296 __at(0x0FFD) __sfr TOSL;
1297
1298 __at(0x0FFE) __sfr TOSH;
1299
1300 __at(0x0FFF) __sfr TOSU;