| blob | 95ba0738c18f3bd98e2106d1f06273f5bd4894c8 |
26 SDCC ASxxxx Assemblers
29 and
32 SDCC ASLINK Relocating Linker
33 \f
35 CHAPTER 1 THE ASSEMBLER 1-1
36 1.1 THE ASXXXX ASSEMBLERS 1-1
37 1.1.1 Assembly Pass 1 1-2
38 1.1.2 Assembly Pass 2 1-2
39 1.1.3 Assembly Pass 3 1-2
40 1.2 SOURCE PROGRAM FORMAT 1-3
41 1.2.1 Statement Format 1-3
42 1.2.1.1 Label Field 1-3
43 1.2.1.2 Operator Field 1-5
44 1.2.1.3 Operand Field 1-5
45 1.2.1.4 Comment Field 1-6
46 1.3 SYMBOLS AND EXPRESSIONS 1-6
47 1.3.1 Character Set 1-6
48 1.3.2 User-Defined Symbols 1-10
49 1.3.3 Reusable Symbols 1-10
50 1.3.4 Current Location Counter 1-12
51 1.3.5 Numbers 1-13
52 1.3.6 Terms 1-14
53 1.3.7 Expressions 1-14
54 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
55 1.4.1 .module Directive 1-16
56 1.4.2 .title Directive 1-16
57 1.4.3 .sbttl Directive 1-17
58 1.4.4 .list and .nlist Directives 1-17
59 1.4.5 .page Directive 1-18
60 1.4.8 .byte, .db, and .fcb Directives 1-20
61 1.4.9 .word, .dw, and .fdb Directives 1-21
62 1.4.10 .3byte and .triple Directives 1-21
63 1.4.11 .4byte and .quad Directive 1-22
64 1.4.12 .blkb, .ds, .rmb, and .rs Directives 1-22
65 1.4.13 .blkw, .blk3, and .blk4 Directives 1-22
66 1.4.14 .ascii, .str, and .fcc Directives 1-23
67 1.4.15 .ascis and .strs Directives 1-23
68 1.4.16 .asciz and .strz Directives 1-24
69 1.4.18 .radix Directive 1-25
70 1.4.19 .even Directive 1-25
71 1.4.20 .odd Directive 1-25
72 1.4.21 .bndry Directive 1-26
73 1.4.22 .area Directive 1-27
74 1.4.24 .org Directive 1-30
75 1.4.25 .globl Directive 1-31
76 1.4.26 .local Directive 1-31
77 1.4.27 .equ, .gblequ, and .lclequ Directives 1-32
78 1.4.28 .if, .else, and .endif Directives 1-33
79 1.4.29 .iff, .ift, and .iftf Directives 1-34
80 1.4.30 .ifxx Directives 1-35
81 1.4.31 .ifdef Directive 1-36
82 1.4.32 .ifndef Directive 1-37
83 1.4.33 .ifb Directive 1-38
84 1.4.34 .ifnb Directive 1-39
85 1.4.35 .ifidn Directive 1-40
86 1.4.36 .ifdif Directive 1-41
87 \f
89 Page ii
93 1.4.37 Alternate .if Directive Forms 1-42
94 1.4.38 Immediate Conditional Assembly Directives 1-43
95 1.4.39 .include Directive 1-44
96 1.4.40 .define and .undefine Directives 1-45
97 1.4.41 .setdp Directive 1-46
98 1.4.42 .16bit, .24bit, and .32bit Directives 1-48
99 1.4.45 .end Directive 1-49
100 1.5 INVOKING ASXXXX 1-50
101 1.6 ERRORS 1-52
102 1.7 LISTING FILE 1-54
103 1.8 SYMBOL TABLE FILE 1-56
104 1.9 OBJECT FILE 1-57
106 CHAPTER 2 THE MACRO PROCESSOR 2-1
107 2.1 DEFINING MACROS 2-1
108 2.1.1 .macro Directive 2-2
109 2.1.2 .endm Directive 2-3
110 2.1.3 .mexit Directive 2-3
111 2.2 CALLING MACROS 2-4
112 2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS 2-5
113 2.3.1 Macro Nesting 2-6
114 2.3.2 Special Characters in Macro Arguments 2-7
115 2.3.3 Passing Numerical Arguments as Symbols 2-7
116 2.3.4 Number of Arguments in Macro Calls 2-9
117 2.3.5 Creating Local Symbols Automatically 2-9
118 2.3.6 Concatenation of Macro Arguments 2-10
119 2.4 MACRO ATTRIBUTE DIRECTIVES 2-11
120 2.4.1 .narg Directive 2-12
121 2.4.2 .nchr Directive 2-13
122 2.4.3 .ntyp Directive 2-14
123 2.4.4 .nval Directive 2-14
124 2.5 INDEFINITE REPEAT BLOCK DIRECTIVES 2-15
125 2.5.1 .irp Directive 2-16
126 2.5.2 .irpc Directive 2-17
127 2.6 REPEAT BLOCK DIRECTIVE 2-18
128 2.6.1 .rept 2-18
129 2.7 MACRO DELETION DIRECTIVE 2-19
130 2.7.1 .mdelete 2-19
131 2.8 MACRO INVOCATION DETAILS 2-19
132 2.9 BUILDING A MACRO LIBRARY 2-20
133 2.9.1 .mlib Macro Directive 2-21
134 2.9.2 .mcall Macro Directive 2-22
135 2.10 EXAMPLE MACRO CROSS ASSEMBLERS 2-24
137 CHAPTER 3 THE LINKER 3-1
138 3.1 ASLINK RELOCATING LINKER 3-1
139 3.2 INVOKING ASLINK 3-2
140 3.3 LIBRARY PATH(S) AND FILE(S) 3-5
141 3.4 ASLINK PROCESSING 3-6
142 \f
144 Page iii
148 3.6 ASXXXX VERSION 3.XX LINKING 3-15
149 3.6.1 Object Module Format 3-15
150 3.6.2 Header Line 3-15
151 3.6.3 Module Line 3-16
152 3.6.4 Area Line 3-16
153 3.6.5 Symbol Line 3-16
154 3.6.6 T Line 3-16
155 3.6.7 R Line 3-17
156 3.6.8 P Line 3-17
157 3.6.9 24-Bit and 32-Bit Addressing 3-18
158 3.6.10 ASlink V3.xx Error Messages 3-18
159 3.7 INTEL IHX OUTPUT FORMAT (16-BIT) 3-21
160 3.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT) 3-22
161 3.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT) 3-23
163 CHAPTER 4 BUILDING ASXXXX AND ASLINK 4-1
164 4.1 BUILDING ASXXXX AND ASLINK WITH LINUX 4-2
165 4.2 BUILDING ASXXXX AND ASLINK UNDER CYGWIN 4-2
166 4.3 BUILDING ASXXXX AND ASLINK WITH DJGPP 4-3
167 4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S
168 TURBO C++ 3.0 4-3
169 4.4.1 Graphical User Interface 4-3
170 4.4.2 Command Line Interface 4-4
171 4.5 BUILDING ASXXXX AND ASLINK WITH
172 MS VISUAL C++ 6.0 4-5
173 4.5.1 Graphical User Interface 4-5
174 4.5.2 Command Line Interface 4-5
175 4.6 BUILDING ASXXXX AND ASLINK WITH
176 MS VISUAL STUDIO 2005 4-6
177 4.6.1 Graphical User Interface 4-6
178 4.6.2 Command Line Interface 4-6
179 4.7 BUILDING ASXXXX AND ASLINK WITH
180 MS VISUAL STUDIO 2010 4-7
181 4.7.1 Graphical User Interface 4-7
182 4.7.2 Command Line Interface 4-7
183 4.8 BUILDING ASXXXX AND ASLINK WITH
184 OPEN WATCOM V1.9 4-8
185 \f
187 Page iv
191 4.8.1 Graphical User Interface 4-8
192 4.8.2 Command Line Interface 4-8
193 4.9 BUILDING ASXXXX AND ASLINK WITH
194 SYMANTEC C/C++ V7.2 4-9
195 4.9.1 Graphical User Interface 4-9
196 4.9.2 Command Line Interface 4-9
197 4.10 THE _CLEAN.BAT AND _PREP.BAT FILES 4-10
200 APPENDIX AK AS68(HC[S])08 ASSEMBLER AK-1
201 AK.1 PROCESSOR SPECIFIC DIRECTIVES AK-1
202 AK.1.1 .hc08 Directive AK-1
203 AK.1.2 .hcs08 Directive AK-1
204 AK.1.3 .6805 Directive AK-2
205 AK.1.4 .hc05 Directive AK-2
206 AK.1.5 The .__.CPU. Variable AK-2
207 AK.2 68HC(S)08 REGISTER SET AK-3
208 AK.3 68HC(S)08 INSTRUCTION SET AK-3
209 AK.3.1 Control Instructions AK-4
210 AK.3.2 Bit Manipulation Instructions AK-4
211 AK.3.3 Branch Instructions AK-4
212 AK.3.4 Complex Branch Instructions AK-5
213 AK.3.5 Read-Modify-Write Instructions AK-5
214 AK.3.6 Register\Memory Instructions AK-6
215 AK.3.7 Double Operand Move Instruction AK-6
216 AK.3.8 16-Bit <H:X> Index Register Instructions AK-6
217 AK.3.9 Jump and Jump to Subroutine Instructions AK-6
219 \f
221 Page ix
225 APPENDIX AR AS8051 ASSEMBLER AR-1
226 AR.1 ACKNOWLEDGMENT AR-1
227 AR.2 8051 REGISTER SET AR-1
228 AR.3 8051 INSTRUCTION SET AR-2
229 AR.3.1 Inherent Instructions AR-2
230 AR.3.2 Move Instructions AR-3
231 AR.3.3 Single Operand Instructions AR-3
232 AR.3.4 Two Operand Instructions AR-4
233 AR.3.5 Call and Return Instructions AR-4
234 AR.3.6 Jump Instructions AR-4
235 AR.3.7 Predefined Symbols: SFR Map AR-5
236 AR.3.8 Predefined Symbols: SFR Bit Addresses AR-6
237 AR.3.9 Predefined Symbols: Control Bits AR-7
238 \f
240 Page x
244 APPENDIX AT AS8XCXXX ASSEMBLER AT-1
245 AT.1 ACKNOWLEDGMENTS AT-1
246 AT.2 AS8XCXXX ASSEMBLER DIRECTIVES AT-1
247 AT.2.1 Processor Selection Directives AT-1
248 AT.2.2 .cpu Directive AT-2
249 AT.2.3 Processor Addressing Range Directives AT-3
250 AT.2.4 The .__.CPU. Variable AT-3
251 AT.2.5 DS80C390 Addressing Mode Directive AT-4
252 AT.2.6 The .msb Directive AT-4
253 AT.3 DS8XCXXX REGISTER SET AT-6
254 AT.4 DS8XCXXX INSTRUCTION SET AT-6
255 AT.4.1 Inherent Instructions AT-7
256 AT.4.2 Move Instructions AT-7
257 AT.4.3 Single Operand Instructions AT-7
258 AT.4.4 Two Operand Instructions AT-8
259 AT.4.5 Call and Return Instructions AT-8
260 AT.4.6 Jump Instructions AT-8
261 AT.5 DS8XCXXX SPECIAL FUNCTION REGISTERS AT-9
262 AT.5.1 SFR Map AT-9
263 AT.5.2 Bit Addressable Registers: Generic AT-10
264 AT.5.3 Bit Addressable Registers: Specific AT-11
265 AT.5.4 Optional Symbols: Control Bits AT-12
266 AT.6 DS80C310 SPECIAL FUNCTION REGISTERS AT-13
267 AT.6.1 SFR Map AT-13
268 AT.6.2 Bit Addressable Registers: Generic AT-14
269 AT.6.3 Bit Addressable Registers: Specific AT-15
270 AT.6.4 Optional Symbols: Control Bits AT-16
271 AT.7 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS AT-17
272 AT.7.1 SFR Map AT-17
273 AT.7.2 Bit Addressable Registers: Generic AT-18
274 AT.7.3 Bit Addressable Registers: Specific AT-19
275 AT.7.4 Optional Symbols: Control Bits AT-20
276 AT.8 DS80C390 SPECIAL FUNCTION REGISTERS AT-21
277 AT.8.1 SFR Map AT-21
278 AT.8.2 Bit Addressable Registers: Generic AT-22
279 AT.8.3 Bit Addressable Registers: Specific AT-23
280 AT.8.4 Optional Symbols: Control Bits AT-24
281 AT.9 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS AT-26
282 AT.9.1 SFR Map AT-26
283 AT.9.2 Bit Addressable Registers: Generic AT-27
284 AT.9.3 Bit Addressable Registers: Specific AT-28
285 AT.9.4 Optional Symbols: Control Bits AT-29
286 AT.10 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS AT-30
287 AT.10.1 SFR Map AT-30
288 AT.10.2 Bit Addressable Registers: Generic AT-31
289 AT.10.3 Bit Addressable Registers: Specific AT-32
290 AT.10.4 Optional Symbols: Control Bits AT-33
291 AT.11 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS AT-34
292 AT.11.1 SFR Map AT-34
293 AT.11.2 Bit Addressable Registers: Generic AT-36
294 AT.11.3 Bit Addressable Registers: Specific AT-37
295 AT.11.4 Optional Symbols: Control Bits AT-39
296 \f
298 Page xi
302 APPENDIX AY ASGB ASSEMBLER AY-1
303 AY.1 ACKNOWLEDGEMENT AY-1
304 AY.2 INTRODUCTION AY-1
305 AY.3 GAMEBOY REGISTER SET AND CONDITIONS AY-1
306 AY.4 GAMEBOY INSTRUCTION SET AY-2
307 AY.4.1 .tile Directive AY-2
308 AY.4.2 Potentially Controversial Mnemonic Selection AY-4
309 AY.4.2.1 Auto-Indexing Loads AY-4
310 AY.4.2.2 Input and Output Operations AY-4
311 AY.4.2.3 The 'stop' Instruction AY-5
312 AY.4.3 Inherent Instructions AY-5
313 AY.4.4 Implicit Operand Instructions AY-5
314 AY.4.5 Load Instructions AY-6
315 AY.4.6 Call/Return Instructions AY-6
316 AY.4.7 Jump Instructions AY-6
317 AY.4.8 Bit Manipulation Instructions AY-6
318 AY.4.9 Input and Output Instructions AY-7
319 AY.4.10 Register Pair Instructions AY-7
321 APPENDIX BC ASRAB ASSEMBLER BC-1
322 BC.1 ACKNOWLEDGMENT BC-1
323 BC.2 PROCESSOR SPECIFIC DIRECTIVES BC-1
324 BC.2.1 .r2k Directive BC-2
325 BC.2.2 .hd64 Directive BC-2
326 BC.2.3 .z80 Directive BC-2
327 BC.2.4 The .__.CPU. Variable BC-3
328 BC.3 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS BC-4
329 BC.3.1 Instruction Symbols BC-4
330 BC.3.2 Rabbit Instructions BC-6
331 BC.4 Z80/HD64180 ADDRESSING AND INSTRUCTIONS BC-8
332 BC.4.1 Inherent Instructions BC-9
333 BC.4.2 Implicit Operand Instructions BC-9
334 BC.4.3 Load Instruction BC-10
335 BC.4.4 Call/Return Instructions BC-10
336 BC.4.5 Jump and Jump to Subroutine Instructions BC-10
337 BC.4.6 Bit Manipulation Instructions BC-11
338 BC.4.7 Interrupt Mode and Reset Instructions BC-11
339 BC.4.8 Input and Output Instructions BC-11
340 BC.4.9 Register Pair Instructions BC-11
341 BC.4.10 HD64180 Specific Instructions BC-12
342 \f
344 Page xiii
348 APPENDIX BI ASZ80 ASSEMBLER BI-1
349 BI.1 .z80 DIRECTIVE BI-1
350 BI.2 .hd64 DIRECTIVE BI-1
351 BI.3 THE .__.CPU. VARIABLE BI-2
352 BI.4 Z80 REGISTER SET AND CONDITIONS BI-2
353 BI.5 Z80 INSTRUCTION SET BI-3
354 BI.5.1 Inherent Instructions BI-4
355 BI.5.2 Implicit Operand Instructions BI-4
356 BI.5.3 Load Instruction BI-5
357 BI.5.4 Call/Return Instructions BI-5
358 BI.5.5 Jump and Jump to Subroutine Instructions BI-5
359 BI.5.6 Bit Manipulation Instructions BI-6
360 BI.5.7 Interrupt Mode and Reset Instructions BI-6
361 BI.5.8 Input and Output Instructions BI-6
362 BI.5.9 Register Pair Instructions BI-6
363 BI.5.10 HD64180/Z180 Specific Instructions BI-7
364 \f
366 Page 2
371 P R E F A C E
377 The ASxxxx assemblers were written following the style of
378 several unfinished cross assemblers found in the Digital Equip-
379 ment Corporation Users Society (DECUS) distribution of the C
380 programming language. The incomplete DECUS code was provided
381 with no documentation as to the input syntax or the output
382 format. I wish to thank the author for inspiring me to begin
383 the development of this set of assemblers.
385 The ASLINK program was written as a companion to the ASxxxx
386 assemblers, its design and implementation was not derived from
387 any other work.
389 I would greatly appreciate receiving the details of any
390 changes, additions, or errors pertaining to these programs and
391 will attempt to incorporate any fixes or generally useful
392 changes in a future update to these programs.
396 Alan R. Baldwin
397 Kent State University
398 Physics Department
399 Kent, Ohio 44242
400 U.S.A.
403 http://shop-pdp.net
404 http://shop-pdp.kent.edu/
406 baldwin@shop-pdp.net
407 baldwin@shop-pdp.kent.edu
409 baldwin@kent.edu
410 tel: (330) 672 2531
411 fax: (330) 672 2959
412 \f
414 Page 3
419 E N D U S E R L I C E N S E A G R E E M E N T
425 Copyright (C) 1989-2012 Alan R. Baldwin
427 This program is free software: you can redistribute it
428 and/or modify it under the terms of the GNU General Public
429 License as published by the Free Software Foundation, either
430 version 3 of the License, or (at your option) any later version.
432 This program is distributed in the hope that it will be use-
433 ful, but WITHOUT ANY WARRANTY; without even the implied war-
434 ranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
435 See the GNU General Public License for more details.
437 You should have received a copy of the GNU General Public
438 License along with this program. If not, see
439 <http://www.gnu.org/licenses/>.
440 \f
442 Page 4
451 C O N T R I B U T O R S
455 Thanks to Marko Makela for his contribution of the AS6500 cross
456 assembler.
458 Marko Makela
459 Sillitie 10 A
460 01480 Vantaa
461 Finland
462 Internet: Marko dot Makela at Helsinki dot Fi
463 EARN/BitNet: msmakela at finuh
468 Thanks to John Hartman for his contribution of the AS8051 cross
469 assembler and updates to the ASxxxx and ASLINK internals.
471 John L. Hartman
472 jhartman at compuserve dot com
473 noice at noicedebugger dot com
478 Thanks to G. Osborn for his contributions to LKS19.C and
479 LKIHX.C.
481 G. Osborn
482 gary at s-4 dot com
487 Thanks to Ken Hornstein for his contribution of object libraries
488 contained in LKLIBR.C.
490 Ken Hornstein
491 kenh at cmf dot nrl dot navy dot mil
496 \f
498 Page 5
502 Thanks to Bill McKinnon for his contributions to the AS8XCXXX
503 cross assembler for the DS8XCXXX series of microprocessors.
505 Bill McKinnon
506 w_mckinnon at conknet dot com
511 Thanks to Roger Ivie for his contribution of the ASGB cross as-
512 sembler for the GameBoy.
514 Roger Ivie
515 ivie at cc dot usu dot edu
520 Thanks to Uwe Steller for his contribution of the AS740 cross
521 assembler.
523 Uwe Stellar
524 Uwe dot Steller at t-online dot de
529 Thanks to Shujen Chen for his contribution of the AS1802 cross
530 assembler.
532 Shugen Chen
533 DeVry University
534 Tinley Park IL
535 schen at tp dot devry dot edu
540 Thanks to Edgar Puehringer for his contribution of the AS61860
541 cross assembler.
543 Edgar Puehringer
544 edgar_pue at yahoo dot com
549 \f
551 Page 6
555 Thanks to Ulrich Raich and Razaq Ijoduola for their contribution
556 of the ASRAB cross assembler.
558 Ulrich Raich and Razaq Ijoduola
559 PS Division
560 CERN
561 CH-1211 Geneva-23
562 Ulrich dot Raich at cern dot ch
567 Thanks to Patrick Head for his contribution of the ASEZ80 cross
568 assembler.
570 Patrick Head
571 patrick at phead dot net
576 Thanks to Boisy G. Pitre for contributing the .ifeq, .ifne,
577 .ifgt, .iflt, .ifle, and .ifge conditional directives and the
578 Tandy Color Computer Disk Basic binary output for ASLINK.
580 Boisy G. Pitre
581 boisy at boisypitre dot com
586 Thanks to Mike McCarty for his contributions to the processor
587 cycle count option of the ASxxxx Assemblers.
589 Mike McCarty
590 mike dot mccarty at sbcglobal dot net
595 Thanks to Mengjin Su for his contribution of the PIC18Fxxx Ex-
596 tended Instructions.
598 Mengjin Su
599 msu at micron dot com
604 \f
606 Page 7
610 Thanks to Carl Rash for his contribution of the Visual Studio
611 2010 project files.
613 Carl Rash
614 crash at triad dot rr dot com
615 \f
617 Page 8
621 ASxxxx Cross Assemblers, Version 5.05, August 2012
623 Submitted by Alan R. Baldwin,
624 Kent State University, Kent, Ohio
626 Operating System: Linux, Windows, MS-DOS
627 or other supporting ANSI C.
629 Source Langauge: C
631 Abstract:
633 The ASxxxx assemblers are a series of microprocessor assem-
634 blers written in the C programming language. This collection
635 contains cross assemblers for the 1802, S2650, SC/MP, MPS430,
636 61860, 6500, 6800(6802/6808), 6801(6803/HD6303), 6804, 6805,
637 68HC(S)08, 6809, 68HC11, 68HC(S)12, 68HC16, 740,
638 8048(8041/8022/8021) 8051, 8085(8080), DS8xCxxx, AVR, EZ80,
639 F2MC8L/FX, F8/3870, GameBoy(Z80), H8/3xx, Cypress PSoC(M8C),
640 PIC, Rabbit 2000/3000, asst6, asst7, asst8, Z8, and Z80(HD64180)
641 series microprocessors. Each assembler has a device specific
642 section which includes: (1) device description, byte order, and
643 file extension information, (2) a table of assembler general
644 directives, special directives, assembler mnemonics and asso-
645 ciated operation codes, (3) machine specific code for processing
646 the device mnemonics, addressing modes, and special directives.
648 The assemblers have a common device independent section which
649 handles the details of file input/output, symbol table genera-
650 tion, program/data areas, expression analysis, and assembler
651 directive processing.
653 The assemblers provide the following features: (1) alpha-
654 betized, formatted symbol table listings, (2) relocatable object
655 modules, (3) global symbols for linking object modules, (4) con-
656 ditional assembly directives, (5) reusable local symbols, (6)
657 include-file processing, and (7) a general macro processing
658 facility.
660 The companion program ASLINK is a relocating linker perform-
661 ing the following functions: (1) bind multiple object modules
662 into a single memory image, (2) resolve inter-module symbol
663 references, (3) resolve undefined symbols from specified
664 librarys of object modules, (4) process absolute, relative, con-
665 catenated, and overlay attributes in data and program sections,
666 (5) perform byte and word program-counter relative (pc or pcr)
667 addressing calculations, (6) define absolute symbol values at
668 link time, (7) define absolute area base address values at link
669 time, (8) produce an Intel Hex record, Motorola S record or
670 Tandy CoCo Disk Basic output file, (9) produce a map of the
671 linked memory image, and (10) update the ASxxxx assembler
672 listing files with the absolute linked addresses and data.
673 \f
675 Page 9
679 The assemblers and linker have been tested using Linux and
680 DJGPP, Cygwin, Symantec C/C++ V7.2, Borland Turbo C++ 3.0, Open
681 Watcom V1.9, VC6, Visual Studio 2005, and Visual Studio 2010.
682 Complete source code and documentation for the assemblers and
683 linker is included with the distribution. Additionally, test
684 code for each assembler and several microprocessor monitors (
685 ASSIST05 for the 6805, MONDEB and ASSIST09 for the 6809, and
686 BUFFALO 2.5 for the 6811) are included as working examples of
687 use of these assemblers.
688 \f
702 CHAPTER 1
704 THE ASSEMBLER
710 1.1 THE ASXXXX ASSEMBLERS
713 The ASxxxx assemblers are a series of microprocessor assem-
714 blers written in the C programming language. Each assembler has
715 a device specific section which includes:
717 1. device description, byte order, and file extension in-
718 formation
720 2. a table of the assembler general directives, special
721 device directives, assembler mnemonics and associated
722 operation codes
724 3. machine specific code for processing the device mnemon-
725 ics, addressing modes, and special directives
727 The device specific information is detailed in the appendices.
729 The assemblers have a common device independent section which
730 handles the details of file input/output, symbol table genera-
731 tion, program/data areas, expression analysis, and assembler
732 directive processing.
734 The assemblers provide the following features:
736 1. Command string control of assembly functions
738 2. Alphabetized, formatted symbol table listing
740 3. Relocatable object modules
742 4. Global symbols for linking object modules
744 5. Conditional assembly directives
746 \f
748 THE ASSEMBLER PAGE 1-2
749 THE ASXXXX ASSEMBLERS
752 6. Program sectioning directives
755 ASxxxx assembles one or more source files into a single relo-
756 catable ascii object file. The output of the ASxxxx assemblers
757 consists of an ascii relocatable object file(*.rel), an assembly
758 listing file(*.lst), and a symbol file(*.sym).
761 1.1.1 Assembly Pass 1
764 During pass 1, ASxxxx opens all source files and performs a
765 rudimentary assembly of each source statement. During this pro-
766 cess all symbol tables are built, program sections defined, and
767 number of bytes for each assembled source line is estimated.
769 At the end of pass 1 all undefined symbols may be made global
770 (external) using the ASxxxx switch -g, otherwise undefined sym-
771 bols will be flagged as errors during succeeding passes.
774 1.1.2 Assembly Pass 2
777 During pass 2 the ASxxxx assembler resolves forward refer-
778 ences and determines the number of bytes for each assembled
779 line. The number of bytes used by a particular assembler in-
780 struction may depend upon the addressing mode, whether the in-
781 struction allows multiple forms based upon the relative distance
782 to the addressed location, or other factors. Pass 2 resolves
783 these cases and determines the address of all symbols.
786 1.1.3 Assembly Pass 3
789 Pass 3 by the assembler generates the listing file, the relo-
790 catable output file, and the symbol tables. Also during pass 3
791 the errors will be reported.
793 The relocatable object file is an ascii file containing sym-
794 bol references and definitions, program area definitions, and
795 the relocatable assembled code, the linker ASLINK will use this
796 information to generate an absolute load file (Intel or Motorola
797 formats).
800 \f
802 THE ASSEMBLER PAGE 1-3
803 SOURCE PROGRAM FORMAT
806 1.2 SOURCE PROGRAM FORMAT
810 1.2.1 Statement Format
813 A source program is composed of assembly-language statements.
814 Each statement must be completed on one line. A line may con-
815 tain a maximum of 128 characters, longer lines are truncated and
816 lost.
818 An ASxxxx assembler statement may have as many as four
819 fields. These fields are identified by their order within the
820 statement and/or by separating characters between fields. The
821 general format of the ASxxxx statement is:
823 [label:] Operator Operand [;Comment(s)]
825 The label and comment fields are optional. The operator and
826 operand fields are interdependent. The operator field may be an
827 assembler directive or an assembly mnemonic. The operand field
828 may be optional or required as defined in the context of the
829 operator.
831 ASxxxx interprets and processes source statements one at a
832 time. Each statement causes a particular operation to be per-
833 formed.
836 1.2.1.1 Label Field -
838 A label is a user-defined symbol which is assigned the value
839 of the current location counter and entered into the user de-
840 fined symbol table. The current location counter is used by
841 ASxxxx to assign memory addresses to the source program state-
842 ments as they are encountered during the assembly process. Thus
843 a label is a means of symbolically referring to a specific
844 statement.
846 When a program section is absolute, the value of the current
847 location counter is absolute; its value references an absolute
848 memory address. Similarly, when a program section is relocat-
849 able, the value of the current location counter is relocatable.
850 A relocation bias calculated at link time is added to the ap-
851 parent value of the current location counter to establish its
852 effective absolute address at execution time. (The user can
853 also force the linker to relocate sections defined as absolute.
854 This may be required under special circumstances.)
856 If present, a label must be the first field in a source
857 statement and must be terminated by a colon (:). For example,
858 \f
860 THE ASSEMBLER PAGE 1-4
861 SOURCE PROGRAM FORMAT
864 if the value of the current location counter is absolute
865 01F0(H), the statement:
867 abcd: nop
869 assigns the value 01F0(H) to the label abcd. If the location
870 counter value were relocatable, the final value of abcd would be
871 01F0(H)+K, where K represents the relocation bias of the program
872 section, as calculated by the linker at link time.
874 More than one label may appear within a single label field.
875 Each label so specified is assigned the same address value. For
876 example, if the value of the current location counter is
877 1FF0(H), the multiple labels in the following statement are each
878 assigned the value 1FF0(H):
880 abcd: aq: $abc: nop
882 Multiple labels may also appear on successive lines. For ex-
883 ample, the statements
885 abcd:
886 aq:
887 $abc: nop
889 likewise cause the same value to be assigned to all three la-
890 bels.
892 A double colon (::) defines the label as a global symbol.
893 For example, the statement
895 abcd:: nop
897 establishes the label abcd as a global symbol. The distinguish-
898 ing attribute of a global symbol is that it can be referenced
899 from within an object module other than the module in which the
900 symbol is defined. References to this label in other modules
901 are resolved when the modules are linked as a composite execut-
902 able image.
904 The legal characters for defining labels are:
906 A through Z
907 a through z
908 0 through 9
909 . (Period)
910 $ (Dollar sign)
911 _ (underscore)
913 A label may be any length, however only the first 79
914 characters are significant and, therefore must be unique among
915 all labels in the source program (not necessarily among
916 \f
918 THE ASSEMBLER PAGE 1-5
919 SOURCE PROGRAM FORMAT
922 separately compiled modules). An error code(s) (m or p) will be
923 generated in the assembly listing if the first 79 characters in
924 two or more labels are the same. The m code is caused by the
925 redeclaration of the symbol or its reference by another state-
926 ment. The p code is generated because the symbols location is
927 changing on each pass through the source file.
929 The label must not start with the characters 0-9, as this
930 designates a reusable symbol with special attributes described
931 in a later section.
933 The label must not start with the sequence $$, as this
934 represents the temporary radix 16 for constants.
937 1.2.1.2 Operator Field -
939 The operator field specifies the action to be performed. It
940 may consist of an instruction mnemonic (op code) or an assembler
941 directive.
943 When the operator is an instruction mnemonic, a machine in-
944 struction is generated and the assembler evaluates the addresses
945 of the operands which follow. When the operator is a directive
946 ASxxxx performs certain control actions or processing operations
947 during assembly of the source program.
949 Leading and trailing spaces or tabs in the operator field
950 have no significance; such characters serve only to separate
951 the operator field from the preceeding and following fields.
953 An operator is terminated by a space, tab or end of line.
956 1.2.1.3 Operand Field -
958 When the operator is an instruction mnemonic (op code), the
959 operand field contains program variables that are to be
960 evaluated/manipulated by the operator.
962 Operands may be expressions or symbols, depending on the
963 operator. Multiple expressions used in the operand fields may
964 be separated by a comma. An operand should be preceeded by an
965 operator field; if it is not, the statement will give an error
966 (q or o). All operands following instruction mnemonics are
967 treated as expressions.
969 The operand field is terminated by a semicolon when the field
970 is followed by a comment. For example, in the following
971 statement:
973 label: lda abcd,x ;Comment field
974 \f
976 THE ASSEMBLER PAGE 1-6
977 SOURCE PROGRAM FORMAT
981 the tab between lda and abcd terminates the operator field and
982 defines the beginning of the operand field; a comma separates
983 the operands abcd and x; and a semicolon terminates the operand
984 field and defines the beginning of the comment field. When no
985 comment field follows, the operand field is terminated by the
986 end of the source line.
989 1.2.1.4 Comment Field -
991 The comment field begins with a semicolon and extends through
992 the end of the line. This field is optional and may contain any
993 7-bit ascii character except null.
995 Comments do not affect assembly processing or program execu-
996 tion.
999 1.3 SYMBOLS AND EXPRESSIONS
1002 This section describes the generic components of the ASxxxx
1003 assemblers: the character set, the conventions observed in con-
1004 structing symbols, and the use of numbers, operators, and ex-
1005 pressions.
1008 1.3.1 Character Set
1011 The following characters are legal in ASxxxx source programs:
1013 1. The letters A through Z. Both upper- and lower-case
1014 letters are acceptable. The assemblers, by default,
1015 are case sensitive, i.e. ABCD and abcd are not the
1016 same symbols. (The assemblers can be made case insen-
1017 sitive by using the -z command line option.)
1019 2. The digits 0 through 9
1021 3. The characters . (period), $ (dollar sign), and _ (un-
1022 derscore).
1024 4. The special characters listed in Tables 1 through 6.
1027 Tables 1 through 6 describe the various ASxxxx label and
1028 field terminators, assignment operators, operand separators, as-
1029 sembly, unary, binary, and radix operators.
1030 \f
1032 THE ASSEMBLER PAGE 1-7
1033 SYMBOLS AND EXPRESSIONS
1036 Table 1 Label Terminators and Assignment Operators
1037 ----------------------------------------------------------------
1039 : Colon Label terminator.
1041 :: Double colon Label Terminator; defines the
1042 label as a global label.
1044 = Equal sign Direct assignment operator.
1046 == Global equal Direct assignment operator; de-
1047 fines the symbol as a global
1048 symbol.
1050 =: Local equal Direct assignment operator; de-
1051 fines the symbol as a local sym-
1052 bol.
1054 ----------------------------------------------------------------
1060 Table 2 Field Terminators and Operand Separators
1061 ----------------------------------------------------------------
1063 Tab Item or field terminator.
1065 Space Item or field terminator.
1067 , Comma Operand field separator.
1069 ; Semicolon Comment field indicator.
1071 ----------------------------------------------------------------
1077 \f
1079 THE ASSEMBLER PAGE 1-8
1080 SYMBOLS AND EXPRESSIONS
1083 Table 3 Assembler Operators
1084 ----------------------------------------------------------------
1086 # Number sign Immediate expression indicator.
1088 . Period Current location counter.
1090 ( Left parenthesis Expression delimiter.
1092 ) Right parenthesis Expression delimeter.
1094 ----------------------------------------------------------------
1100 Table 4 Unary Operators
1101 ----------------------------------------------------------------
1103 < Left bracket <FEDC Produces the lower byte
1104 value of the expression.
1105 (DC)
1107 > Right bracket >FEDC Produces the upper byte
1108 value of the expression.
1109 (FE)
1111 + Plus sign +A Positive value of A
1113 - Minus sign -A Produces the negative
1114 (2's complement) of A.
1116 ~ Tilde ~A Produces the 1's comple-
1117 ment of A.
1119 ' Single quote 'D Produces the value of
1120 the character D.
1122 " Double quote "AB Produces the double byte
1123 value for AB.
1125 \ Backslash '\n Unix style characters
1126 \b, \f, \n, \r, \t
1127 or '\001 or octal byte values.
1129 ----------------------------------------------------------------
1135 \f
1137 THE ASSEMBLER PAGE 1-9
1138 SYMBOLS AND EXPRESSIONS
1141 Table 5 Binary Operators
1142 ----------------------------------------------------------------
1144 << Double 0800 << 4 Produces the 4 bit
1145 Left bracket left-shifted value of
1146 0800. (8000)
1148 >> Double 0800 >> 4 Produces the 4 bit
1149 Right bracket right-shifted value of
1150 0800. (0080)
1152 + Plus sign A + B Arithmetic Addition
1153 operator.
1155 - Minus sign A - B Arithmetic Subtraction
1156 operator.
1158 * Asterisk A * B Arithmetic Multiplica-
1159 tion operator.
1161 / Slash A / B Arithmetic Division
1162 operator.
1164 & Ampersand A & B Logical AND operator.
1166 | Bar A | B Logical OR operator.
1168 % Percent sign A % B Modulus operator.
1170 ^ Up arrow or A ^ B EXCLUSIVE OR operator.
1171 circumflex
1173 ----------------------------------------------------------------
1179 Table 6 Temporary Radix Operators
1180 ----------------------------------------------------------------
1182 $%, 0b, 0B Binary radix operator.
1184 $&, 0o, 0O, 0q, 0Q Octal radix operator.
1186 $#, 0d, 0D Decimal radix operator.
1188 $$, 0h, 0H, 0x, 0X Hexadecimal radix operator.
1191 Potential ambiguities arising from the use of 0b and 0d
1192 as temporary radix operators may be circumvented by
1193 \f
1195 THE ASSEMBLER PAGE 1-10
1196 SYMBOLS AND EXPRESSIONS
1199 preceding all non-prefixed hexadecimal numbers with 00.
1200 Leading 0's are required in any case where the first
1201 hexadecimal digit is abcdef as the assembler will treat
1202 the letter sequence as a label.
1204 ----------------------------------------------------------------
1212 1.3.2 User-Defined Symbols
1215 User-defined symbols are those symbols that are equated to a
1216 specific value through a direct assignment statement or appear
1217 as labels. These symbols are added to the User Symbol Table as
1218 they are encountered during assembly.
1220 The following rules govern the creation of user-defined symbols:
1222 1. Symbols can be composed of alphanumeric characters,
1223 dollar signs ($), periods (.), and underscores (_)
1224 only.
1226 2. The first character of a symbol must not be a number
1227 (except in the case of reusable symbols).
1229 3. The first 79 characters of a symbol must be unique. A
1230 symbol can be written with more than 79 legal
1231 characters, but the 80th and subsequent characters are
1232 ignored.
1234 4. Spaces and Tabs must not be embedded within a symbol.
1238 1.3.3 Reusable Symbols
1241 Reusable symbols are specially formatted symbols used as la-
1242 bels within a block of coding that has been delimited as a reus-
1243 able symbol block. Reusable symbols are of the form n$, where n
1244 is a decimal integer from 0 to 65535, inclusive. Examples of
1245 reusable symbols are:
1247 1$
1248 27$
1249 138$
1250 244$
1251 \f
1253 THE ASSEMBLER PAGE 1-11
1254 SYMBOLS AND EXPRESSIONS
1257 The range of a reusable symbol block consists of those state-
1258 ments between two normally constructed symbolic labels. Note
1259 that a statement of the form:
1261 ALPHA = EXPRESSION
1263 is a direct assignment statement but does not create a label and
1264 thus does not delimit the range of a reusable symbol block.
1266 Note that the range of a reusable symbol block may extend
1267 across program areas.
1269 Reusable symbols provide a convenient means of generating la-
1270 bels for branch instructions and other such references within
1271 reusable symbol blocks. Using reusable symbols reduces the pos-
1272 sibility of symbols with multiple definitions appearing within a
1273 user program. In addition, the use of reusable symbols dif-
1274 ferentiates entry-point labels from other labels, since reusable
1275 labels cannot be referenced from outside their respective symbol
1276 blocks. Thus, reusable symbols of the same name can appear in
1277 other symbol blocks without conflict. Reusable symbols require
1278 less symbol table space than normal symbols. Their use is
1279 recommended.
1281 The use of the same reusable symbol within a symbol block
1282 will generate one or both of the m or p errors.
1284 Example of reusable symbols:
1286 a: ldx #atable ;get table address
1287 lda #0d48 ;table length
1288 1$: clr ,x+ ;clear
1289 deca
1290 bne 1$
1292 b: ldx #btable ;get table address
1293 lda #0d48 ;table length
1294 1$: clr ,x+ ;clear
1295 deca
1296 bne 1$
1299 \f
1301 THE ASSEMBLER PAGE 1-12
1302 SYMBOLS AND EXPRESSIONS
1305 1.3.4 Current Location Counter
1308 The period (.) is the symbol for the current location coun-
1309 ter. When used in the operand field of an instruction, the
1310 period represents the address of the first byte of the
1311 instruction:
1313 AS: ldx #. ;The period (.) refers to
1314 ;the address of the ldx
1315 ;instruction.
1317 When used in the operand field of an ASxxxx directive, it
1318 represents the address of the current byte or word:
1320 QK = 0
1322 .word 0xFFFE,.+4,QK ;The operand .+4 in the .word
1323 ;directive represents a value
1324 ;stored in the second of the
1325 ;three words during assembly.
1327 If we assume the current value of the program counter is
1328 0H0200, then during assembly, ASxxxx reserves three words of
1329 storage starting at location 0H0200. The first value, a hex-
1330 idecimal constant FFFE, will be stored at location 0H0200. The
1331 second value represented by .+4 will be stored at location
1332 0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
1333 value defined by the symbol QK will be placed at location
1334 0H0204.
1336 At the beginning of each assembly pass, ASxxxx resets the lo-
1337 cation counter. Normally, consecutive memory locations are as-
1338 signed to each byte of object code generated. However, the
1339 value of the location counter can be changed through a direct
1340 assignment statement of the following form:
1342 . = . + expression
1345 The new location counter can only be specified relative to
1346 the current location counter. Neglecting to specify the current
1347 program counter along with the expression on the right side of
1348 the assignment operator will generate the (.) error. (Absolute
1349 program areas may use the .org directive to specify the absolute
1350 location of the current program counter.)
1352 The following coding illustrates the use of the current location
1353 counter:
1355 .area CODE1 (ABS) ;program area CODE1
1356 ;is ABSOLUTE
1357 \f
1359 THE ASSEMBLER PAGE 1-13
1360 SYMBOLS AND EXPRESSIONS
1364 .org 0H100 ;set location to
1365 ;0H100 absolute
1367 num1: ldx #.+0H10 ;The label num1 has
1368 ;the value 0H100.
1369 ;X is loaded with
1370 ;0H100 + 0H10
1372 .org 0H130 ;location counter
1373 ;set to 0H130
1375 num2: ldy #. ;The label num2 has
1376 ;the value 0H130.
1377 ;Y is loaded with
1378 ;value 0H130.
1381 .area CODE2 (REL) ;program area CODE2
1382 ;is RELOCATABLE
1384 . = . + 0H20 ;Set location counter
1385 ;to relocatable 0H20 of
1386 ;the program section.
1388 num3: .word 0 ;The label num3 has
1389 ;the value
1390 ;of relocatable 0H20.
1392 . = . + 0H40 ;will reserve 0H40
1393 ;bytes of storage as will
1394 .blkb 0H40 ;or
1395 .blkw 0H20
1397 The .blkb and .blkw directives are the preferred methods of
1398 allocating space.
1401 1.3.5 Numbers
1404 ASxxxx assumes that all numbers in the source program are to
1405 be interpreted in decimal radix unless otherwise specified. The
1406 .radix directive may be used to specify the default as octal,
1407 decimal, or hexadecimal. Individual numbers can be designated
1408 as binary, octal, decimal, or hexadecimal through the temporary
1409 radix prefixes shown in table 6.
1411 Negative numbers must be preceeded by a minus sign; ASxxxx
1412 translates such numbers into two's complement form. Positive
1413 numbers may (but need not) be preceeded by a plus sign.
1415 \f
1417 THE ASSEMBLER PAGE 1-14
1418 SYMBOLS AND EXPRESSIONS
1421 Numbers are always considered to be absolute values, therefor
1422 they are never relocatable.
1425 1.3.6 Terms
1428 A term is a component of an expression and may be one of the
1429 following:
1432 1. A number.
1434 2. A symbol:
1435 1. A period (.) specified in an expression causes the
1436 current location counter to be used.
1437 2. A User-defined symbol.
1438 3. An undefined symbol is assigned a value of zero and
1439 inserted in the User-Defined symbol table as an un-
1440 defined symbol.
1442 3. A single quote followed by a single ascii character, or
1443 a double quote followed by two ascii characters.
1445 4. An expression enclosed in parenthesis. Any expression
1446 so enclosed is evaluated and reduced to a single term
1447 before the remainder of the expression in which it ap-
1448 pears is evaluated. Parenthesis, for example, may be
1449 used to alter the left-to-right evaluation of expres-
1450 sions, (as in A*B+C versus A*(B+C)), or to apply a un-
1451 ary operator to an entire expression (as in -(A+B)).
1453 5. A unary operator followed by a symbol or number.
1457 1.3.7 Expressions
1460 Expressions are combinations of terms joined together by
1461 binary operators. Expressions reduce to a value. The evalua-
1462 tion of an expression includes the determination of its attri-
1463 butes. A resultant expression value may be one of three types
1464 (as described later in this section): relocatable, absolute,
1465 and external.
1467 \f
1469 THE ASSEMBLER PAGE 1-15
1470 SYMBOLS AND EXPRESSIONS
1473 Expressions are evaluate with an operand hierarchy as follows:
1475 * / % multiplication,
1476 division, and
1477 modulus first.
1479 + - addition and
1480 subtraction second.
1482 << >> left shift and
1483 right shift third.
1485 ^ exclusive or fourth.
1487 & logical and fifth.
1489 | logical or last
1491 except that unary operators take precedence over binary
1492 operators.
1495 A missing or illegal operator terminates the expression
1496 analysis, causing error codes (o) and/or (q) to be generated
1497 depending upon the context of the expression itself.
1499 At assembly time the value of an external (global) expression
1500 is equal to the value of the absolute part of that expression.
1501 For example, the expression external+4, where 'external' is an
1502 external symbol, has the value of 4. This expression, however,
1503 when evaluated at link time takes on the resolved value of the
1504 symbol 'external', plus 4.
1506 Expressions, when evaluated by ASxxxx, are one of three
1507 types: relocatable, absolute, or external. The following dis-
1508 tinctions are important:
1510 1. An expression is relocatable if its value is fixed re-
1511 lative to the base address of the program area in which
1512 it appears; it will have an offset value added at link
1513 time. Terms that contain labels defined in relocatable
1514 program areas will have a relocatable value; simi-
1515 larly, a period (.) in a relocatable program area,
1516 representing the value of the current program location
1517 counter, will also have a relocatable value.
1519 2. An expression is absolute if its value is fixed. An
1520 expression whose terms are numbers and ascii characters
1521 will reduce to an absolute value. A relocatable ex-
1522 pression or term minus a relocatable term, where both
1523 elements being evaluated belong to the same program
1524 area, is an absolute expression. This is because every
1525 \f
1527 THE ASSEMBLER PAGE 1-16
1528 SYMBOLS AND EXPRESSIONS
1531 term in a program area has the same relocation bias.
1532 When one term is subtracted from the other the reloca-
1533 tion bias is zero.
1535 3. An expression is external (or global) if it contains a
1536 single global reference (plus or minus an absolute ex-
1537 pression value) that is not defined within the current
1538 program. Thus, an external expression is only par-
1539 tially defined following assembly and must be resolved
1540 at link time.
1544 1.4 GENERAL ASSEMBLER DIRECTIVES
1547 An ASxxxx directive is placed in the operator field of the
1548 source line. Only one directive is allowed per source line.
1549 Each directive may have a blank operand field or one or more
1550 operands. Legal operands differ with each directive.
1553 1.4.1 .module Directive
1555 Format:
1557 .module name
1559 The .module directive causes the name to be included in the
1560 assemblers output file as an identifier for this particular ob-
1561 ject module. The name may be from 1 to 79 characters in length.
1562 The name may not have any embedded white space (spaces or tabs).
1563 Only one identifier is allowed per assembled module. The main
1564 use of this directive is to allow the linker to report a
1565 modules' use of undefined symbols. At link time all undefined
1566 symbols are reported and the modules referencing them are
1567 listed.
1570 1.4.2 .title Directive
1572 Format:
1574 .title string
1576 The .title directive provides a character string to be placed
1577 on the second line of each page during listing. The string be-
1578 gins with the first non white space character (after any space
1579 or tab) and ends with the end of the line.
1582 \f
1584 THE ASSEMBLER PAGE 1-17
1585 GENERAL ASSEMBLER DIRECTIVES
1588 1.4.3 .sbttl Directive
1590 Format:
1592 .sbttl string
1594 The .sbttl directive provides a character string to be placed
1595 on the third line of each page during listing. The string be-
1596 gins with the first non white space character (after any space
1597 or tab) and ends with the end of the line.
1600 1.4.4 .list and .nlist Directives
1602 Format:
1604 .list ;Basic .list
1606 .list expr ;with expression
1608 .list (arg1,arg2,...,argn) ;with sublist options
1610 .nlist ;Basic .nlist
1612 .nlist expr ;with expression
1614 .nlist (arg1,arg2,...,argn) ;with sublist options
1617 The .list and .nlist directives control the listing output to
1618 the .lst file. The directives have the following sublist
1619 options:
1621 err - errors
1622 loc - program location
1623 bin - binary output
1624 eqt - symbol or .if evaluation
1625 cyc - opcode cycle count
1626 lin - source line number
1627 src - source line text
1628 pag - pagination
1629 lst - .list/.nlist line listing
1630 md - macro definition listing
1631 me - macro expansion listing
1632 meb - macro expansion binary listing
1634 ! - sets the listing mode to
1635 !(.list) or !(.nlist) before
1636 applying the sublist options
1639 The 'normal' listing mode .list is the combination of err, loc,
1640 \f
1642 THE ASSEMBLER PAGE 1-18
1643 GENERAL ASSEMBLER DIRECTIVES
1646 bin, eqt, cyc, lin, src, pag, lst, and md enabled with me and
1647 meb disabled. The 'normal' listing mode .nlist has all sublist
1648 items disabled. When specifying sublist options the option list
1649 must be enclosed within parenthesis and multiple options
1650 seperated by commas.
1652 The NOT option, !, is used to set the listing mode to the op-
1653 posite of the .list or .nlist directive before applying the sub-
1654 list options. For example:
1656 .nlist (!) is equivalent to .list and
1657 .list (!) is equivalent to .nlist
1658 any additional options will
1659 be applied normally
1662 Normal .list/.nlist processing is disabled within false con-
1663 ditional blocks. However, the .list/.nlist with an expression
1664 can override this behavior if the expression has a non zero
1665 value.
1667 Examples of listing options:
1669 .list (meb) ; lists macro generated binary
1671 .list (me) ; lists macro expansions
1673 .nlist (src) ; .nlist src lines not listed
1675 .nlist (!,lst) ; list all except .nlist
1677 .nlist ; combination lists only
1678 .list (src) ; the source line
1680 .list (!,src) ; list only the source line
1682 .list 1 ; enable listing even within
1683 ; a FALSE conditional block
1686 1.4.5 .page Directive
1688 Format:
1690 .page
1692 The .page directive causes a page ejection with a new heading
1693 to be printed. The new page occurs after the next line of the
1694 source program is processed, this allows an immediately follow-
1695 ing .sbttl directive to appear on the new page. The .page
1696 source line will not appear in the file listing. Paging may be
1697 disabled by invoking the -p directive or by using the directive:
1698 \f
1700 THE ASSEMBLER PAGE 1-19
1701 GENERAL ASSEMBLER DIRECTIVES
1705 .nlist (pag)
1708 If the .page directive is followed by a non zero constant or
1709 an expression that evaluates to a non zero value then pagination
1710 will be enabled within a false condition range to allow extended
1711 textual information to be incorporated in the source program
1712 with out the need to use the comment delimiter (;):
1714 .if 0
1716 .page 1 ;Enable pagination within 'if' block.
1717 This text will be bypassed during assembly
1718 but appear in the listing file.
1719 .
1720 .
1721 .
1723 .endif
1729 1.4.8 .byte, .db, and .fcb Directives
1731 Format:
1733 .byte exp ;Stores the binary value
1734 .db exp ;of the expression in the
1735 .fcb exp ;next byte.
1737 .byte exp1,exp2,expn ;Stores the binary values
1738 .db exp1,exp2,expn ;of the list of expressions
1739 .fcb exp1,exp2,expn ;in successive bytes.
1741 where: exp, represent expressions that will be
1742 exp1, truncated to 8-bits of data.
1743 . Each expression will be calculated,
1744 . the high-order byte will be truncated.
1745 . Multiple expressions must be
1746 expn separated by commas.
1748 The .byte, .db, or .fcb directives are used to generate suc-
1749 cessive bytes of binary data in the object module.
1752 \f
1754 THE ASSEMBLER PAGE 1-21
1755 GENERAL ASSEMBLER DIRECTIVES
1758 1.4.9 .word, .dw, and .fdb Directives
1760 Format:
1762 .word exp ;Stores the binary value
1763 .dw exp ;of the expression in
1764 .fdb exp ;the next word.
1766 .word exp1,exp2,expn ;Stores the binary values
1767 .dw exp1,exp2,expn ;of the list of expressions
1768 .fdb exp1,exp2,expn ;in successive words.
1770 where: exp, represent expressions that will occupy two
1771 exp1, bytes of data. Each expression will be
1772 . calculated as a 16-bit word expression.
1773 . Multiple expressions must be
1774 expn separated by commas.
1776 The .word, .dw, or .fdb directives are used to generate suc-
1777 cessive words of binary data in the object module.
1779 \f
1781 THE ASSEMBLER PAGE 1-22
1782 GENERAL ASSEMBLER DIRECTIVES
1785 1.4.12 .blkb, .ds, .rmb, and .rs Directives
1787 Format:
1789 .blkb N ;reserve N bytes of space
1790 .ds N ;reserve N bytes of space
1791 .rmb N ;reserve N bytes of space
1792 .rs N ;reserve N bytes of space
1794 The .blkb, .ds, .rmb, and .rs directives reserve byte blocks
1795 in the object module;
1798 1.4.13 .blkw, .blk3, and .blk4 Directives
1800 Format:
1802 .blkw N ;reserve N words of space
1803 .blk3 N ;reserve N triples of space
1804 .blk4 N ;reserve N quads of space
1806 The .blkw directive reserves word blocks; the .blk3 reserves
1807 3 byte blocks(available in assemblers supporting 24-bit
1808 addressing); the .blk4 reserves 4 byte blocks (available in as-
1809 semblers supporting 32-bit addressing).
1812 \f
1814 THE ASSEMBLER PAGE 1-23
1815 GENERAL ASSEMBLER DIRECTIVES
1818 1.4.14 .ascii, .str, and .fcc Directives
1820 Format:
1822 .ascii /string/ or
1824 .ascii ^/string/
1826 .fcc /string/ or
1828 .fcc ^/string/
1830 .str /string/ or
1832 .str ^/string/
1835 where: string is a string of printable ascii characters.
1837 / / represent the delimiting characters. These
1838 delimiters may be any paired printing
1839 characters, as long as the characters are not
1840 contained within the string itself. If the
1841 delimiting characters do not match, the .ascii
1842 directive will give the (q) error.
1844 The .ascii, .fcc, and .str directives place one binary byte of
1845 data for each character in the string into the object module.
1848 1.4.15 .ascis and .strs Directives
1850 Format:
1852 .ascis /string/ or
1854 .ascis ^/string/
1856 .strs /string/ or
1858 .strs ^/string/
1861 where: string is a string of printable ascii characters.
1863 / / represent the delimiting characters. These
1864 delimiters may be any paired printing
1865 characters, as long as the characters are not
1866 contained within the string itself. If the
1867 delimiting characters do not match, the .ascis
1868 and .strs directives will give the (q) error.
1870 \f
1872 THE ASSEMBLER PAGE 1-24
1873 GENERAL ASSEMBLER DIRECTIVES
1876 The .ascis and .strs directives place one binary byte of data
1877 for each character in the string into the object module. The
1878 last character in the string will have the high order bit set.
1881 1.4.16 .asciz and .strz Directives
1883 Format:
1885 .asciz /string/ or
1887 .asciz ^/string/
1889 .strz /string/ or
1891 .strz ^/string/
1894 where: string is a string of printable ascii characters.
1896 / / represent the delimiting characters. These
1897 delimiters may be any paired printing
1898 characters, as long as the characters are not
1899 contained within the string itself. If the
1900 delimiting characters do not match, the .asciz
1901 and .strz directive will give the (q) error.
1904 The .asciz and .strz directives place one binary byte of data
1905 for each character in the string into the object module. Fol-
1906 lowing all the character data a zero byte is inserted to ter-
1907 minate the character string.
1908 \f
1910 THE ASSEMBLER PAGE 1-25
1911 GENERAL ASSEMBLER DIRECTIVES
1914 1.4.18 .radix Directive
1916 Format:
1918 .radix character
1920 where: character represents a single character specifying the
1921 default radix to be used for succeeding numbers. The
1922 character may be any one of the following:
1924 B,b Binary
1926 O,o Octal
1927 Q,q
1929 D,d Decimal
1930 'blank'
1932 H,h Hexadecimal
1933 X,x
1936 1.4.19 .even Directive
1938 Format:
1940 .even
1942 The .even directive ensures that the current location counter
1943 contains an even boundary value by adding 1 if the current loca-
1944 tion is odd.
1947 1.4.20 .odd Directive
1949 Format:
1951 .odd
1953 The .odd directive ensures that the current location counter
1954 contains an odd boundary value by adding one if the current lo-
1955 cation is even.
1958 \f
1960 THE ASSEMBLER PAGE 1-26
1961 GENERAL ASSEMBLER DIRECTIVES
1964 1.4.21 .bndry Directive
1966 Format:
1968 .bndry n
1970 If the current location is not an integer multiple of n then
1971 the location counter is increased to the next integer multiple
1972 of n.
1974 As an example:
1976 .bndry 4
1978 changes the current location to be at a multiple of 4, a 4-byte
1979 boundary.
1981 The relocation and/or concatenation of an area containing
1982 .bndry directives to place code at specific boundaries will NOT
1983 maintain the specified boundaries. When relocating such code
1984 areas you must specify the base addresses to the linker manually
1985 and/or you must pad the allocated space of an area to match the
1986 boundary conditions.
1988 As an example suppose you wish to link multiple assembled
1989 code sections, each of which has code for the same area and re-
1990 quires a 4 byte boundary. The starting address of the area must
1991 be specified to the linker on a 4 byte boundary and each as-
1992 sembled code section must be padded to fill out the area in each
1993 of the individually assembled files. The following code will
1994 provide the necessary area padding to allow a succesful linking
1995 of files and maintain the boundary requirements:
1997 .$.end = . ; end of area address
1998 .bndry 4 ; set boundary
1999 .if ne,. - .$.end ; is . the same ?
2000 . = . - 1 ; no: backup 1 byte
2001 .byte 0 ; place padding byte
2002 .endif
2005 If all files are assembled simultaneously then only the
2006 .bndry directive is required at the beginning of the area in
2007 each file and the initial area address must be specified to the
2008 linker.
2011 \f
2013 THE ASSEMBLER PAGE 1-27
2014 GENERAL ASSEMBLER DIRECTIVES
2017 1.4.22 .area Directive
2019 Format:
2021 .area name [(options)]
2023 where: name represents the symbolic name of the program sec-
2024 tion. This name may be the same as any
2025 user-defined symbol as the area names
2026 are independent of all symbols and labels.
2028 options specify the type of program or data area:
2029 ABS absolute (automatically invokes OVR)
2030 REL relocatable
2031 OVR overlay
2032 CON concatenate
2033 NOPAG non-paged area
2034 PAG paged area
2037 The .area directive provides a means of defining and separat-
2038 ing multiple programming and data sections. The name is the
2039 area label used by the assembler and the linker to collect code
2040 from various separately assembled modules into one section. The
2041 name may be from 1 to 79 characters in length.
2043 The options are specified within parenthesis and separated by
2044 commas as shown in the following example:
2046 .area TEST (REL,CON) ;This section is relocatable
2047 ;and concatenated with other
2048 ;sections of this program area.
2050 .area DATA (REL,OVR) ;This section is relocatable
2051 ;and overlays other sections
2052 ;of this program area.
2054 .area SYS (ABS,OVR) ;(CON not allowed with ABS)
2055 ;This section is defined as
2056 ;absolute. Absolute sections
2057 ;are always overlayed with
2058 ;other sections of this program
2059 ;area.
2061 \f
2063 THE ASSEMBLER PAGE 1-28
2064 GENERAL ASSEMBLER DIRECTIVES
2067 .area PAGE (PAG) ;This is a paged section. The
2068 ;section must be on a 256 byte
2069 ;boundary and its length is
2070 ;checked by the linker to be
2071 ;no larger than 256 bytes.
2072 ;This is useful for direct page
2073 ;areas.
2075 The default area type is REL|CON; i.e. a relocatable sec-
2076 tion which is concatenated with other sections of code with the
2077 same area name. The ABS option indicates an absolute area. The
2078 OVR and CON options indicate if program sections of the same
2079 name will overlay each other (start at the same location) or be
2080 concatenated with each other (appended to each other).
2082 Multiple invocations of the .area directive with the same
2083 name must specify the same options or leave the options field
2084 blank, this defaults to the previously specified options for
2085 this program area.
2087 \f
2089 THE ASSEMBLER PAGE 1-29
2090 GENERAL ASSEMBLER DIRECTIVES
2093 The ASxxxx assemblers automatically provide two program
2094 sections:
2097 '_CODE' This is the default code/data area.
2098 This program area is of type (REL,CON).
2099 The ASxxxx assemblers also automatically generate two symbols
2100 for each program area:
2102 's_<area>' This is the starting address of the pro-
2103 gram area.
2105 'l_<area>' This is the length of the program area.
2107 The .area names and options are never case sensitive.
2110 1.4.24 .org Directive
2112 Format:
2114 .org exp
2116 where: exp is an absolute expression that becomes the cur-
2117 rent location counter.
2119 The .org directive is valid only in an absolute program section
2120 and will give a (q) error if used in a relocatable program area.
2121 The .org directive specifies that the current location counter
2122 is to become the specified absolute value.
2125 \f
2127 THE ASSEMBLER PAGE 1-31
2128 GENERAL ASSEMBLER DIRECTIVES
2131 1.4.25 .globl Directive
2133 Format:
2135 .globl sym1,sym2,...,symn
2137 where: sym1, represent legal symbolic names.
2138 sym2,... When multiple symbols are specified,
2139 symn they are separated by commas.
2141 A .globl directive may also have a label field and/or a com-
2142 ment field.
2144 The .globl directive is provided to export (and thus provide
2145 linkage to) symbols not otherwise defined as global symbols
2146 within a module. In exporting global symbols the directive
2147 .globl J is similar to:
2149 J == expression or J::
2151 Because object modules are linked by global symbols, these
2152 symbols are vital to a program. All internal symbols appearing
2153 within a given program must be defined at the end of pass 1 or
2154 they will be considered undefined. The assembly directive (-g)
2155 can be invoked to make all undefined symbols global at the end
2156 of pass 1.
2158 The .globl directive and == construct can be overridden by a
2159 following .local directive.
2162 NOTE
2164 The ASxxxx assemblers use the last occurring symbol
2165 specification in the source file(s) as the type shown
2166 in the symbol table and output to the .rel file.
2171 1.4.26 .local Directive
2173 Format:
2175 .local sym1,sym2,...,symn
2177 where: sym1, represent legal symbolic names.
2178 sym2,... When multiple symbols are specified,
2179 symn they are separated by commas.
2181 A .local directive may also have a label field and/or a com-
2182 ment field.
2183 \f
2185 THE ASSEMBLER PAGE 1-32
2186 GENERAL ASSEMBLER DIRECTIVES
2189 The .local directive is provided to define symbols that are
2190 local to the current assembly process. Local symbols are not
2191 effected by the assembler option -a (make all symbols global).
2192 In defining local symbols the directive .local J is similar to:
2194 J =: expression
2196 The .local directive and the =: construct are useful in de-
2197 fining symbols and constants within a header or definition file
2198 that contains many symbols specific to the current assembly pro-
2199 cess that should not be exported into the .rel output file. A
2200 typical usage is in the definition of SFRs (Special Function
2201 Registers) for a microprocessor.
2203 The .local directive and =: construct can be overridden by a
2204 following .globl directive.
2207 NOTE
2209 The ASxxxx assemblers use the last occurring symbol
2210 specification in the source file(s) as the type shown
2211 in the symbol table and output to the .rel file.
2216 1.4.27 .equ, .gblequ, and .lclequ Directives
2218 Format:
2220 sym1 .equ expr ; equivalent to sym1 = expr
2221 sym2 .gblequ expr ; equivalent to sym2 == expr
2222 sym3 .lclequ expr ; equivalent to sym3 =: expr
2224 or
2226 .equ sym1, expr ; equivalent to sym1 = expr
2227 .gblequ sym2, expr ; equivalent to sym2 == expr
2228 .lclequ sym3, expr ; equivalent to sym3 =: expr
2230 These alternate forms of equivalence are provided for user
2231 convenience.
2234 \f
2236 THE ASSEMBLER PAGE 1-33
2237 GENERAL ASSEMBLER DIRECTIVES
2240 1.4.28 .if, .else, and .endif Directives
2242 Format:
2244 .if expr
2245 . ;}
2246 . ;} range of true condition
2247 . ;}
2248 .else
2249 . ;}
2250 . ;} range of false condition
2251 . ;}
2252 .endif
2254 The conditional assembly directives allow you to include or
2255 exclude blocks of source code during the assembly process, based
2256 on the evaluation of the test condition.
2258 The range of true condition will be processed if the expres-
2259 sion 'expr' is not zero (i.e. true) and the range of false con-
2260 dition will be processed if the expression 'expr' is zero (i.e
2261 false). The range of true condition is optional as is the .else
2262 directive and the range of false condition. The following are
2263 all valid .if/.else/.endif constructions:
2265 .if A-4 ;evaluate A-4
2266 .byte 1,2 ;insert bytes if A-4 is
2267 .endif ;not zero
2269 .if K+3 ;evaluate K+3
2270 .else
2271 .byte 3,4 ;insert bytes if K+3
2272 .endif ;is zero
2274 .if J&3 ;evaluate J masked by 3
2275 .byte 12 ;insert this byte if J&3
2276 .else ;is not zero
2277 .byte 13 ;insert this byte if J&3
2278 .endif ;is zero
2281 All .if/.else/.endif directives are limited to a maximum nesting
2282 of 10 levels.
2284 The use of a .else directive outside a .if/.endif block will
2285 generate an (i) error. Assemblies having unequal .if and .endif
2286 counts will cause an (i) error.
2289 \f
2291 THE ASSEMBLER PAGE 1-34
2292 GENERAL ASSEMBLER DIRECTIVES
2295 1.4.29 .iff, .ift, and .iftf Directives
2297 Format:
2299 .if expr ;'if' range Condition is
2300 ;TRUE when expr is not zero
2301 .ift ;}
2302 . ;} range of true condition ;}
2303 .iff ;} if
2304 . ;} range of false condition ;} block
2305 .iftf ;}
2306 . ;} unconditional range ;}
2307 .else ;'else' range Condition is
2308 ;TRUE when expr is zero
2309 .ift ;}
2310 . ;} range of true condition ;}
2311 .iff ;} else
2312 . ;} range of false condition ;} block
2313 .iftf ;}
2314 . ;} unconditional range ;}
2315 .endif
2317 The subconditional assembly directives may be placed within
2318 conditional assembly blocks to indicate:
2320 1. The assembly of an alternate body of code when
2321 the condition of the block tests false.
2323 2. The assembly of non-contiguous body of code
2324 within the conditional assembly block,
2325 depending upon the result of the conditional
2326 test in entering the block.
2328 3. The unconditional assembly of a body of code
2329 within a conditional assembly block.
2332 The use of the .iff, .ift, and .iftf directives makes the use of
2333 the .else directive redundant.
2335 Note that the implementation of the .else directive causes
2336 the .if tested condition to be complemented. The TRUE and FALSE
2337 conditions are determined by the .if/.else conditional state.
2339 All .if/.else/.endif directives are limited to a maximum
2340 nesting of 10 levels.
2342 The use of the .iff, .ift, or .iftf directives outside of a
2343 conditional block results in a (i) error code.
2345 \f
2347 THE ASSEMBLER PAGE 1-35
2348 GENERAL ASSEMBLER DIRECTIVES
2351 The use of a .else directive outside a .if/.endif block will
2352 generate an (i) error. Assemblies having unequal .if and .endif
2353 counts will cause an (i) error.
2356 1.4.30 .ifxx Directives
2359 Additional conditional directives are available to test the
2360 value of an evaluated expression:
2362 .ifne expr ; true if expr != 0
2363 .ifeq expr ; true if expr == 0
2364 .ifgt expr ; true if expr > 0
2365 .iflt expr ; true if expr < 0
2366 .ifge expr ; true if expr >= 0
2367 .ifle expr ; true if expr <= 0
2369 Format:
2371 .ifxx expr
2372 . ;}
2373 . ;} range of true condition
2374 . ;}
2375 .else
2376 . ;}
2377 . ;} range of false condition
2378 . ;}
2379 .endif
2381 The conditional assembly directives allow you to include or
2382 exclude blocks of source code during the assembly process, based
2383 on the evaluation of the test condition.
2385 The range of true condition will be processed if the expres-
2386 sion 'expr' is not zero (i.e. true) and the range of false con-
2387 dition will be processed if the expression 'expr' is zero (i.e
2388 false). The range of true condition is optional as is the .else
2389 directive and the range of false condition. The following are
2390 all valid .ifxx/.else/.endif constructions:
2392 .ifne A-4 ;evaluate A-4
2393 .byte 1,2 ;insert bytes if A-4 is
2394 .endif ;not zero
2396 .ifeq K+3 ;evaluate K+3
2397 .byte 3,4 ;insert bytes if K+3
2398 .endif ;is zero
2400 .ifne J&3 ;evaluate J masked by 3
2401 .byte 12 ;insert this byte if J&3
2402 .else ;is not zero
2403 \f
2405 THE ASSEMBLER PAGE 1-36
2406 GENERAL ASSEMBLER DIRECTIVES
2409 .byte 13 ;insert this byte if J&3
2410 .endif ;is zero
2413 All .if/.else/.endif directives are limited to a maximum nesting
2414 of 10 levels.
2416 The use of a .else directive outside a .if/.endif block will
2417 generate an (i) error. Assemblies having unequal .if and .endif
2418 counts will cause an (i) error.
2421 1.4.31 .ifdef Directive
2423 Format:
2425 .ifdef sym
2426 . ;}
2427 . ;} range of true condition
2428 . ;}
2429 .else
2430 . ;}
2431 . ;} range of false condition
2432 . ;}
2433 .endif
2435 The conditional assembly directives allow you to include or
2436 exclude blocks of source code during the assembly process, based
2437 on the evaluation of the test condition.
2439 The range of true condition will be processed if the symbol
2440 'sym' has been defined with a .define directive or 'sym' is a
2441 variable with an assigned value else the false range will be
2442 processed. The range of true condition is optional as is the
2443 .else directive and the range of false condition. The following
2444 are all valid .ifdef/.else/.endif constructions:
2446 .ifdef sym$1 ;lookup symbol sym$1
2447 .byte 1,2 ;insert bytes if sym$1
2448 .endif ;is defined or
2449 ;assigned a value
2451 .ifdef sym$2 ;lookup symbol sym$2
2452 .else
2453 .byte 3,4 ;insert bytes if sym$1
2454 .endif ;is not defined and
2455 ;not assigned a value
2457 .ifdef sym$3 ;lookup symbol sym$3
2458 .byte 12 ;insert this byte if sym$3
2459 .else ;is defined/valued
2460 .byte 13 ;insert this byte if sym$3
2461 \f
2463 THE ASSEMBLER PAGE 1-37
2464 GENERAL ASSEMBLER DIRECTIVES
2467 .endif ;is not defined/valued
2470 Note that the default assembler configuration of case sensitive
2471 means the testing for a defined symbol is also case sensitive.
2473 All .if/.else/.endif directives are limited to a maximum
2474 nesting of 10 levels.
2476 The use of a .else directive outside a .if/.endif block will
2477 generate an (i) error. Assemblies having unequal .if and .endif
2478 counts will cause an (i) error.
2481 1.4.32 .ifndef Directive
2483 Format:
2485 .ifndef sym
2486 . ;}
2487 . ;} range of true condition
2488 . ;}
2489 .else
2490 . ;}
2491 . ;} range of false condition
2492 . ;}
2493 .endif
2495 The conditional assembly directives allow you to include or
2496 exclude blocks of source code during the assembly process, based
2497 on the evaluation of the condition test.
2499 The range of true condition will be processed if the symbol
2500 'sym' is not defined by a .define directive and a variable 'sym'
2501 has not been assigned a value else the range of false condition
2502 will be processed. The range of true condition is optional as
2503 is the .else directive and the range of false condition. The
2504 following are all valid .ifndef/.else/.endif constructions:
2506 .ifndef sym$1 ;lookup symbol sym$1
2507 .byte 1,2 ;insert bytes if sym$1 is
2508 .endif ;not defined and
2509 ;not assigned a value
2511 .ifndef sym$2 ;lookup symbol sym$2
2512 .else
2513 .byte 3,4 ;insert bytes if sym$1
2514 .endif ;is defined or
2515 ;is assigned a value
2517 .ifndef sym$3 ;lookup symbol sym$3
2518 .byte 12 ;insert this byte if sym$3
2519 \f
2521 THE ASSEMBLER PAGE 1-38
2522 GENERAL ASSEMBLER DIRECTIVES
2525 .else ;is not defined/valued
2526 .byte 13 ;insert this byte if sym$3
2527 .endif ;is defined/valued
2530 All .if/.else/.endif directives are limited to a maximum nesting
2531 of 10 levels.
2533 The use of a .else directive outside a .if/.endif block will
2534 generate an (i) error. Assemblies having unequal .if and .endif
2535 counts will cause an (i) error.
2538 1.4.33 .ifb Directive
2540 Format:
2542 .ifb sym
2543 . ;}
2544 . ;} range of true condition
2545 . ;}
2546 .else
2547 . ;}
2548 . ;} range of false condition
2549 . ;}
2550 .endif
2552 The conditional assembly directives allow you to include or
2553 exclude blocks of source code during the assembly process, based
2554 on the evaluation of the test condition.
2556 The conditional .ifb is most useful when used in macro de-
2557 finitions to determine if the argument is blank. The range of
2558 true condition will be processed if the symbol 'sym' is blank.
2559 The range of true condition is optional as is the .else direc-
2560 tive and the range of false condition. The following are all
2561 valid .ifb/.else/.endif constructions:
2563 .ifb sym$1 ;argument is not blank
2564 .byte 1,2 ;insert bytes if argument
2565 .endif ;is blank
2567 .ifb sym$2 ;argument is not blank
2568 .else
2569 .byte 3,4 ;insert bytes if argument
2570 .endif ;is not blank
2572 .ifb ;argument is blank
2573 .byte 12 ;insert this byte if
2574 .else ;argument is blank
2575 .byte 13 ;insert this byte if
2576 .endif ;argument not blank
2577 \f
2579 THE ASSEMBLER PAGE 1-39
2580 GENERAL ASSEMBLER DIRECTIVES
2585 All .if/.else/.endif directives are limited to a maximum nesting
2586 of 10 levels.
2588 The use of a .else directive outside a .if/.endif block will
2589 generate an (i) error. Assemblies having unequal .if and .endif
2590 counts will cause an (i) error.
2593 1.4.34 .ifnb Directive
2595 Format:
2597 .ifnb sym
2598 . ;}
2599 . ;} range of true condition
2600 . ;}
2601 .else
2602 . ;}
2603 . ;} range of false condition
2604 . ;}
2605 .endif
2607 The conditional assembly directives allow you to include or
2608 exclude blocks of source code during the assembly process, based
2609 on the evaluation of the test condition.
2611 The conditional .ifnb is most useful when used in macro de-
2612 finitions to determine if the argument is not blank. The range
2613 of true condition will be processed if the symbol 'sym' is not
2614 blank. The range of true condition is optional as is the .else
2615 directive and the range of false condition. The following are
2616 all valid .ifnb/.else/.endif constructions:
2618 .ifnb sym$1 ;argument is not blank
2619 .byte 1,2 ;insert bytes if argument
2620 .endif ;is not blank
2622 .ifnb sym$2 ;argument is not blank
2623 .else
2624 .byte 3,4 ;insert bytes if argument
2625 .endif ;is blank
2627 .ifnb ;argument is blank
2628 .byte 12 ;insert this byte if
2629 .else ;argument is not blank
2630 .byte 13 ;insert this byte if
2631 .endif ;argument is blank
2634 All .if/.else/.endif directives are limited to a maximum nesting
2635 \f
2637 THE ASSEMBLER PAGE 1-40
2638 GENERAL ASSEMBLER DIRECTIVES
2641 of 10 levels.
2643 The use of a .else directive outside a .if/.endif block will
2644 generate an (i) error. Assemblies having unequal .if and .endif
2645 counts will cause an (i) error.
2648 1.4.35 .ifidn Directive
2650 Format:
2652 .ifidn sym$1,sym$2
2653 . ;}
2654 . ;} range of true condition
2655 . ;}
2656 .else
2657 . ;}
2658 . ;} range of false condition
2659 . ;}
2660 .endif
2662 The conditional assembly directives allow you to include or
2663 exclude blocks of source code during the assembly process, based
2664 on the evaluation of the test condition.
2666 The conditional .ifidn is most useful when used in macro de-
2667 finitions to determine if the arguments are identical. The
2668 range of true condition will be processed if the symbol 'sym$1'
2669 is idendical to 'sym$2' (i.e. the character strings for sym$1
2670 and sym$2 are the same consistent with the case sensitivity
2671 flag). When this if statement occurs inside a macro where an
2672 argument substitution may be blank then an argument should be
2673 delimited with the form /symbol/ for each symbol. The range of
2674 true condition is optional as is the .else directive and the
2675 range of false condition. The following are all valid
2676 .ifidn/.else/.endif constructions:
2678 .ifidn sym$1,sym$1 ;arguments are the same
2679 .byte 1,2 ;insert bytes if arguments
2680 .endif ;are the sane
2682 .ifidn sym$1,sym$2 ;arguments are not the same
2683 .else
2684 .byte 3,4 ;insert bytes if arguments
2685 .endif ;are not the same
2687 .ifidn sym$3,sym$3 ;arguments are the same
2688 .byte 12 ;insert this byte if
2689 .else ;arguments are the same
2690 .byte 13 ;insert this byte if
2691 .endif ;arguments are not the same
2692 \f
2694 THE ASSEMBLER PAGE 1-41
2695 GENERAL ASSEMBLER DIRECTIVES
2700 All .if/.else/.endif directives are limited to a maximum nesting
2701 of 10 levels.
2703 The use of a .else directive outside a .if/.endif block will
2704 generate an (i) error. Assemblies having unequal .if and .endif
2705 counts will cause an (i) error.
2708 1.4.36 .ifdif Directive
2710 Format:
2712 .ifdif sym$1,sym$2
2713 . ;}
2714 . ;} range of true condition
2715 . ;}
2716 .else
2717 . ;}
2718 . ;} range of false condition
2719 . ;}
2720 .endif
2722 The conditional assembly directives allow you to include or
2723 exclude blocks of source code during the assembly process, based
2724 on the evaluation of the test condition.
2726 The conditional .ifdif is most useful when used in macro de-
2727 finitions to determine if the arguments are different. The
2728 range of true condition will be processed if the symbol 'sym$1'
2729 is different from 'sym$2' (i.e. the character strings for sym$1
2730 and sym$2 are the not the same consistent with the case sensi-
2731 tivity flag). When this if statement occurs inside a macro
2732 where an argument substitution may be blank then an argument
2733 should be delimited with the form /symbol/ for each symbol. The
2734 range of true condition is optional as is the .else directive
2735 and the range of false condition. The following are all valid
2736 .ifdif/.else/.endif constructions:
2738 .ifdif sym$1,sym$2 ;arguments are different
2739 .byte 1,2 ;insert bytes if arguments
2740 .endif ;are different
2742 .ifdif sym$1,sym$1 ;arguments are identical
2743 .else
2744 .byte 3,4 ;insert bytes if arguments
2745 .endif ;are different
2747 .ifdif sym$1,sym$3 ;arguments are different
2748 .byte 12 ;insert this byte if
2749 .else ;arguments are different
2750 \f
2752 THE ASSEMBLER PAGE 1-42
2753 GENERAL ASSEMBLER DIRECTIVES
2756 .byte 13 ;insert this byte if
2757 .endif ;arguments are identical
2760 All .if/.else/.endif directives are limited to a maximum nesting
2761 of 10 levels.
2763 The use of a .else directive outside a .if/.endif block will
2764 generate an (i) error. Assemblies having unequal .if and .endif
2765 counts will cause an (i) error.
2768 1.4.37 Alternate .if Directive Forms
2771 Format:
2773 .if cnd(,) arg1(, arg2)
2775 where the cnd (followed by an optional comma) may be any of
2776 the following:
2778 -------------------------------------------------------
2779 condition Assemble
2780 (complement) Args Block if:
2781 -------------------------------------------------------
2782 eq ( ne ) expr equal to zero
2783 (not equal to zero)
2785 gt ( le ) expr greater than zero
2786 (less than or equal to zero)
2788 lt ( ge ) expr less than zero
2789 (greater than or equal to zero)
2791 def ( ndef ) symbol .define'd or user set
2792 (not .define'd or user set)
2794 b ( nb ) macro argument present
2795 symbol (argument not present)
2797 idn ( dif ) macro arguments identical
2798 symbol (arguments not identical)
2800 f ( t ) ----- only within a .if/.else/.endif
2801 conditional block
2803 tf ----- only within a .if/.else/.endif
2804 conditional block
2807 All .if/.else/.endif directives are limited to a maximum nesting
2808 \f
2810 THE ASSEMBLER PAGE 1-43
2811 GENERAL ASSEMBLER DIRECTIVES
2814 of 10 levels.
2816 The use of a .else directive outside a .if/.endif block will
2817 generate an (i) error. Assemblies having unequal .if and .endif
2818 counts will cause an (i) error.
2821 1.4.38 Immediate Conditional Assembly Directives
2824 The immediate conditional assembly directives allow a single
2825 line of code to be assembled without using a .if/.else/.endif
2826 construct. All of the previously described conditionals have
2827 immediate equivalents.
2829 Format:
2831 .iif arg(,) line_to_assemble
2832 .iifeq arg(,) line_to_assemble
2833 .iifne arg(,) line_to_assemble
2834 .iifgt arg(,) line_to_assemble
2835 .iifle arg(,) line_to_assemble
2836 .iifge arg(,) line_to_assemble
2837 .iiflt arg(,) line_to_assemble
2838 .iifdef arg(,) line_to_assemble
2839 .iifndef arg(,) line_to_assemble
2841 .iifb (,)arg(,) line_to_assemble
2842 .iifnb (,)arg(,) line_to_assemble
2843 .iifidn (,)arg1,arg2(,) line_to_assemble
2844 .iifdif (,)arg1,arg2(,) line_to_assemble
2846 .iiff line_to_assemble
2847 .iift line_to_assemble
2848 .iiftf line_to_assemble
2851 Alternate Format:
2853 .iif arg(,) line_to_assemble
2854 .iif eq arg(,) line_to_assemble
2855 .iif ne arg(,) line_to_assemble
2856 .iif gt arg(,) line_to_assemble
2857 .iif le arg(,) line_to_assemble
2858 .iif ge arg(,) line_to_assemble
2859 .iif lt arg(,) line_to_assemble
2860 .iif def arg(,) line_to_assemble
2861 .iif ndef arg(,) line_to_assemble
2863 .iif b (,)arg(,) line_to_assemble
2864 .iif nb (,)arg(,) line_to_assemble
2865 .iif idn (,)arg1,arg2(,) line_to_assemble
2866 \f
2868 THE ASSEMBLER PAGE 1-44
2869 GENERAL ASSEMBLER DIRECTIVES
2872 .iif dif (,)arg1,arg2(,) line_to_assemble
2874 .iiff line_to_assemble
2875 .iift line_to_assemble
2876 .iiftf line_to_assemble
2879 The (,) indicates an optional comma.
2881 The .iif types b, n, idn, and dif require the commas if the
2882 argument(s) may be blank. These commas may be removed if the
2883 arguments are delimited with the form ^/symbol/ for each symbol.
2885 The immediate conditional directives donot change the
2886 .if/.else/.endif nesting level.
2889 1.4.39 .include Directive
2891 Format:
2893 .include /string/ or
2895 .include ^/string/
2898 where: string represents a string that is the file specifica-
2899 tion of an ASxxxx source file.
2901 / / represent the delimiting characters. These
2902 delimiters may be any paired printing
2903 characters, as long as the characters are not
2904 contained within the string itself. If the
2905 delimiting characters do not match, the .include
2906 directive will give the (q) error.
2908 The .include directive is used to insert a source file within
2909 the source file currently being assembled. When this directive
2910 is encountered, an implicit .page directive is issued. When the
2911 end of the specified source file is reached, an implicit .page
2912 directive is issued and input continues from the previous source
2913 file. The maximum nesting level of source files specified by a
2914 .include directive is five.
2916 The total number of separately specified .include files is
2917 unlimited as each .include file is opened and then closed during
2918 each pass made by the assembler.
2920 The default directory path, if none is specified, for any
2921 .include file is the directory path of the current file. For
2922 example: if the current source file, D:\proj\file1.asm,
2923 \f
2925 THE ASSEMBLER PAGE 1-45
2926 GENERAL ASSEMBLER DIRECTIVES
2929 includes a file specified as "include1" then the file
2930 D:\proj\include1.asm is opened.
2933 \f
2935 THE ASSEMBLER PAGE 1-46
2936 GENERAL ASSEMBLER DIRECTIVES
2939 1.4.41 .setdp Directive
2941 Format:
2943 .setdp [base [,area]]
2945 The set direct page directive has a common format in all the as-
2946 semblers supporting a paged mode. The .setdp directive is used
2947 to inform the assembler of the current direct page region and
2948 the offset address within the selected area. The normal invoca-
2949 tion methods are:
2951 .area DIRECT (PAG)
2952 .setdp
2954 or
2956 .setdp 0,DIRECT
2958 for all the 68xx microprocessors (the 6804 has only the paged
2959 ram area). The commands specify that the direct page is in area
2960 DIRECT and its offset address is 0 (the only valid value for all
2961 but the 6809 microprocessor). Be sure to place the DIRECT area
2962 at address 0 during linking. When the base address and area are
2963 not specified, then zero and the current area are the defaults.
2964 If a .setdp directive is not issued the assembler defaults the
2965 direct page to the area "_CODE" at offset 0.
2967 The assembler verifies that any local variable used in a
2968 direct variable reference is located in this area. Local vari-
2969 able and constant value direct access addresses are checked to
2970 be within the address range from 0 to 255.
2972 External direct references are assumed by the assembler to be
2973 in the correct area and have valid offsets. The linker will
2974 check all direct page relocations to verify that they are within
2975 the correct area.
2977 The 6809 microprocessor allows the selection of the direct
2978 page to be on any 256 byte boundary by loading the appropriate
2979 value into the dp register. Typically one would like to select
2980 the page boundary at link time, one method follows:
2981 \f
2983 THE ASSEMBLER PAGE 1-47
2984 GENERAL ASSEMBLER DIRECTIVES
2987 .area DIRECT (PAG) ; define the direct page
2988 .setdp
2989 .
2990 .
2991 .
2992 .area PROGRAM
2993 .
2994 ldd #DIRECT ; load the direct page register
2995 tfr a,dp ; for access to the direct page
2997 At link time specify the base and global equates to locate the
2998 direct page:
3000 -b DIRECT = 0x1000
3001 -g DIRECT = 0x1000
3003 Both the area address and offset value must be specified (area
3004 and variable names are independent). The linker will verify
3005 that the relocated direct page accesses are within the direct
3006 page.
3008 The preceeding sequence could be repeated for multiple paged
3009 areas, however an alternate method is to define a non-paged area
3010 and use the .setdp directive to specify the offset value:
3012 .area DIRECT ; define non-paged area
3013 .
3014 .
3015 .
3016 .area PROGRAM
3017 .
3018 .setdp 0,DIRECT ; direct page area
3019 ldd #DIRECT ; load the direct page register
3020 tfr a,dp ; for access to the direct page
3021 .
3022 .
3023 .setdp 0x100,DIRECT ; direct page area
3024 ldd #DIRECT+0x100 ; load the direct page register
3025 tfr a,dp ; for access to the direct page
3027 The linker will verify that subsequent direct page references
3028 are in the specified area and offset address range. It is the
3029 programmers responsibility to load the dp register with the cor-
3030 rect page segment corresponding to the .setdp base address
3031 specified.
3033 For those cases where a single piece of code must access a
3034 defined data structure within a direct page and there are many
3035 pages, define a dumby direct page linked at address 0. This
3036 dumby page is used only to define the variable labels. Then
3037 load the dp register with the real base address but donot use a
3038 .setdp directive. This method is equivalent to indexed
3039 \f
3041 THE ASSEMBLER PAGE 1-48
3042 GENERAL ASSEMBLER DIRECTIVES
3045 addressing, where the dp register is the index register and the
3046 direct addressing is the offset.
3049 1.4.42 .16bit, .24bit, and .32bit Directives
3051 Format:
3053 .16bit ;specify 16-bit addressing
3054 .24bit ;specify 24-bit addressing
3055 .32bit ;specify 32-bit addressing
3058 The .16bit, .24bit, and .32bit directives are special direc-
3059 tives for assembler configuration when default values are not
3060 used.
3063 1.5 INVOKING ASXXXX
3066 Starting an ASxxxx assembler without any arguments provides
3067 the following option list and then exits:
3069 Usage: [-Options] file
3070 Usage: [-Options] outfile file1 [file2 file3 ...]
3071 -d Decimal listing
3072 -q Octal listing
3073 -x Hex listing (default)
3074 -g Undefined symbols made global
3075 -a All user symbols made global
3076 -b Display .define substitutions in listing
3077 -bb and display without .define substitutions
3078 -c Disable instruction cycle count in listing
3079 -j Enable NoICE Debug Symbols
3080 -y Enable SDCC Debug Symbols
3081 -l Create list output (out)file[.lst]
3082 -o Create object output (out)file[.rel]
3083 -s Create symbol output (out)file[.sym]
3084 -p Disable listing pagination
3085 -u Disable .list/.nlist processing
3086 -w Wide listing format for symbol table
3087 -z Disable case sensitivity for symbols
3088 -f Flag relocatable references by ` in listing file
3089 -ff Flag relocatable references by mode in listing file
3093 The ASxxxx assemblers are command line oriented. Most sytems
3094 require the option(s) and file(s) arguments to follow the ASxxxx
3095 assembler name:
3097 as6809 -[Options] file
3099 as6809 [-Options] outfile file1 [file2 ...]
3102 Some systems may request the arguments after the assembler is
3103 started at a system specific prompt:
3105 as6809
3106 argv: -[Options] file
3108 as6809
3109 argv: [-Options] outfile file1 [file2 ...]
3112 The ASxxxx options in some more detail:
3114 -d decimal listing
3115 \f
3117 THE ASSEMBLER PAGE 1-51
3118 INVOKING ASXXXX
3121 -q octal listing
3122 -x hex listing (default)
3124 The listing radix affects the
3125 .lst, .rel, and .sym files.
3127 -g undefined symbols made global
3129 Unresolved (external) variables
3130 and symbols are flagged as global.
3132 -a all user symbols made global
3134 All defined (not local or external)
3135 variables and symbols are flagged
3136 as global.
3138 -b display .define substitutions in listing
3140 If a .define substitution has been applied
3141 to an assembler source line the source
3142 line is printed with the substitution.
3144 -bb and display without .define substitutions
3146 If a .define substitution has been applied
3147 to an assembler source line the source
3148 line is first printed without substitution
3149 followed by the line with the substitution.
3151 -c Disable instruction cycle count in listing
3153 This option overrides the listing option
3154 'cyc' in the .list and .nlist directives.
3155 Instruction cycle counts cannot be enabled
3156 if the -c option is specified.
3158 -j enable NOICE debug symbols
3159 -y enable SDCC debug symbols
3161 -l create list output (out)file.lst
3163 If -s (symbol table output) is not
3164 specified the symbol table is included
3165 at the end of the listing file.
3167 -o create object output (out)file.rel
3168 -s create symbol output (out)file.sym
3170 -p disable listing pagination
3172 This option inhibits the generation
3173 \f
3175 THE ASSEMBLER PAGE 1-52
3176 INVOKING ASXXXX
3179 of a form-feed character and its
3180 associated page header in the
3181 assembler listing.
3183 -u disable .list/.nlist processing
3185 This option disables all .list and
3186 .nlist directives. The listing mode
3187 is .list with the options err, loc,
3188 bin, eqt, cyc, lin, src, pag, lst,
3189 and md. The options cyc and pag are
3190 overridden by the -c and -p command
3191 line options.
3193 -w wide listing format for symbol table
3195 -z disable case sensitivity for symbols
3197 -f by ` in the listing file
3198 -ff by mode in the listing file
3200 Relocatable modess are flagged by byte
3201 position (LSB, Byte 2, Byte 3, MSB)
3202 *nMN paged,
3203 uvUV unsigned,
3204 rsRS signed,
3205 pqPQ program counter relative.
3207 asx8051 specific command line option:
3208 -I<dir> Add the named directory to the include file
3209 search path. This option may be used more than once.
3210 Directories are searched in the order given.
3212 The file name for the .lst, .rel, and .sym files is the first
3213 file name specified in the command line. All output files are
3214 ascii text files which may be edited, copied, etc. The output
3215 files are the concatenation of all the input files, if files are
3216 to be assembled independently invoke the assembler for each
3217 file.
3219 The .rel file contains a radix directive so that the linker
3220 will use the proper conversion for this file. Linked files may
3221 have different radices.
3223 ASXXXX assemblers supported by and distributed with SDCC are:
3224 sdas390 (Dallas 80390)
3225 sdas6808 (Motorola 68HC08)
3226 sdas8051 (Intel 8051)
3227 sdasgb (GameBoy Z80-like CPU)
3228 sdasrab (Rabbit Z80-like CPU)
3229 sdasz80 (Zilog Z80 / Hitachi HD64180)
3232 1.6 ERRORS
3235 The ASxxxx assemblers provide limited diagnostic error codes
3236 during the assembly process, these errors will be noted in the
3237 listing file and printed on the stderr device.
3239 The assembler reports the errors on the stderr device as
3241 ?ASxxxx-Error-<*> in line nnn of filename
3243 where * is the error code, nnn is the line number, and filename
3244 \f
3246 THE ASSEMBLER PAGE 1-53
3247 ERRORS
3250 is the source/include file.
3252 The errors are:
3254 (.) This error is caused by an absolute direct assign-
3255 ment of the current location counter
3256 . = expression (incorrect)
3257 rather than the correct
3258 . = . + expression
3260 (a) Indicates a machine specific addressing or address-
3261 ing mode error.
3263 (b) Indicates a direct page boundary error.
3265 (d) Indicates a direct page addressing error.
3267 (i) Caused by an .include file error or an .if/.endif
3268 mismatch.
3270 (m) Multiple definitions of the same label, multiple
3271 .module directives, multiple conflicting attributes
3272 in an .area directive.
3274 (n) An .mexit, .endm, or .narg directive outside of a
3275 macro, repeat block or indefinite repeat block.
3277 (o) Directive or mnemonic error or the use of the .org
3278 directive in a relocatable area.
3280 (p) Phase error: label location changing between passes
3281 2 and 3. Normally caused by having more than one
3282 level of forward referencing.
3284 (q) Questionable syntax: missing or improper operators,
3285 terminators, or delimiters.
3287 (r) Relocation error: logic operation attempted on a
3288 relocatable term, addition of two relocatable terms,
3289 subtraction of two relocatable terms not within the
3290 same programming area or external symbols.
3292 (s) String Substitution / recursion error.
3294 (u) Undefined symbol encountered during assembly.
3296 (z) Divide by 0 or Modulus by 0 error: result is 0.
3299 \f
3301 THE ASSEMBLER PAGE 1-54
3302 LISTING FILE
3305 1.7 LISTING FILE
3308 The (-l) option produces an ascii output listing file. Each
3309 page of output contains a five line header:
3312 1. The ASxxxx program name and page number
3314 2. Assembler Radix and Address Bits
3316 3. Title from a .title directive (if any)
3318 4. Subtitle from a .sbttl directive (if any)
3320 5. Blank line
3324 Each succeeding line contains six fields:
3327 1. Error field (first two characters of line)
3329 2. Current location counter
3331 3. Generated code in byte format
3333 4. Opcode cycles count
3335 5. Source text line number
3337 6. Source text
3340 The error field may contain upto 2 error flags indicating any
3341 errors encountered while assembling this line of source code.
3343 The current location counter field displays the 16-bit,
3344 24-bit, or 32-bit program position. This field will be in the
3345 selected radix.
3347 The generated code follows the program location. The listing
3348 radix determines the number of bytes that will be displayed in
3349 this field. Hexadecimal listing allows six bytes of data within
3350 the field, decimal and octal allow four bytes within the field.
3351 If more than one field of data is generated from the assembly of
3352 a single line of source code, then the data field is repeated on
3353 successive lines.
3355 The opcode cycles count is printed within the delimiters [ ]
3356 on the line with the source text. This reduces the number of
3357 \f
3359 THE ASSEMBLER PAGE 1-55
3360 LISTING FILE
3363 generated code bytes displayed on the line with the source list-
3364 ing by one. (The -c option disables all opcode cycle listing.)
3366 The source text line number is printed in decimal and is fol-
3367 lowed by the source text. A Source line with a .page directive
3368 is never listed. (The -u option overrides this behavior.)
3370 Two additional options are available for printing the source
3371 line text. If the -b option is specified then the listed source
3372 line contains all the .define substitutions. If the -bb option
3373 is specified then the original source line is printed before the
3374 source line with substitutions.
3376 Two data field options are available to flag those bytes
3377 which will be relocated by the linker. If the -f option is
3378 specified then each byte to be relocated will be preceeded by
3379 the '`' character. If the -ff option is specified then each
3380 byte to be relocated will be preceeded by one of the following
3381 characters:
3383 1. * paged relocation
3385 2. u low byte of unsigned word or unsigned byte
3387 3. v high byte of unsigned word
3389 4. p PCR low byte of word relocation or PCR byte
3391 5. q PCR high byte of word relocation
3393 6. r low byte relocation or byte relocation
3395 7. s high byte relocation
3398 Assemblers which use 24-bit or 32-bit addressing use an ex-
3399 tended flagging mode:
3401 1. * paged relocation
3403 2. u 1st byte of unsigned value
3405 3. v 2nd byte of unsigned value
3407 4. U 3rd byte of unsigned value
3409 5. V 4th byte of unsigned value
3411 6. p PCR 1st byte of relocation value or PCR byte
3413 7. q PCR 2nd byte of relocation value
3415 \f
3417 THE ASSEMBLER PAGE 1-56
3418 LISTING FILE
3421 8. P PCR 3rd byte of relocation value
3423 9. Q PCR 4th byte of relocation value
3425 10. r 1st byte of relocation value or byte relocation
3427 11. s 2nd byte of relocation value
3429 12. R 3rd byte of relocation value
3431 13. S 4th byte of relocation value
3435 1.8 SYMBOL TABLE FILE
3438 The symbol table has two parts:
3440 1. The alphabetically sorted list of symbols and/or labels
3441 defined or referenced in the source program.
3443 2. A list of the program areas defined during assembly of
3444 the source program.
3447 The sorted list of symbols and/or labels contains the follow-
3448 ing information:
3450 1. Program area number (none if absolute value or exter-
3451 nal)
3453 2. The symbol or label
3455 3. Directly assigned symbol is denoted with an (=) sign
3457 4. The value of a symbol, location of a label relative to
3458 the program area base address (=0), or a **** indicat-
3459 ing the symbol or label is undefined.
3461 5. The characters: G - global, L - local,
3462 R - relocatable, and X - external.
3465 The list of program areas provides the correspondence between
3466 the program area numbers and the defined program areas, the size
3467 of the program areas, and the area flags (attributes).
3470 \f
3472 THE ASSEMBLER PAGE 1-57
3473 OBJECT FILE
3476 1.9 OBJECT FILE
3479 The object file is an ascii file containing the information
3480 needed by the linker to bind multiple object modules into a com-
3481 plete loadable memory image. The object module contains the
3482 following designators:
3484 [XDQ][HL][234]
3485 X Hexadecimal radix
3486 D Decimal radix
3487 Q Octal radix
3489 H Most significant byte first
3490 L Least significant byte first
3492 2 16-Bit Addressing
3493 3 24-Bit Addressing
3494 4 32-Bit Addressing
3496 H Header
3497 M Module
3498 A Area
3499 S Symbol
3500 T Object code
3501 R Relocation information
3502 P Paging information
3504 Refer to the linker for a detailed description of each of the
3505 designators and the format of the information contained in the
3506 object file.
3507 \f
3521 CHAPTER 2
3523 THE MACRO PROCESSOR
3529 2.1 DEFINING MACROS
3532 By using macros a programmer can use a single line to insert
3533 a sequence of lines into a source program.
3535 A macro definition is headed by a .macro directive followed
3536 by the source lines. The source lines may optionally contain
3537 dummy arguments. If such arguments are used, each one is listed
3538 in the .macro directive.
3540 A macro call is the statement used by the programmer to call
3541 the macro source program. It consists of the macro name fol-
3542 lowed by the real arguments needed to replace the dummy argu-
3543 ments used in the macro.
3545 Macro expansion is the insertion of the macro source lines
3546 into the main program. Included in this insertion is the
3547 replacement of the dummy arguments by the real arguments.
3549 Macro directives provide a means to manipulate the macro ex-
3550 pansions. Only one directive is allowed per source line. Each
3551 directive may have a blank operand field or one or more
3552 operands. Legal operands differ with each directive. The
3553 macros and their associated directives are detailed in this
3554 chapter.
3556 Macro directives can replace any machine dependent mnemonic
3557 associated with a specific assembler. However, the basic assem-
3558 bler directives cannot be replaced with a macro.
3559 \f
3561 THE MACRO PROCESSOR PAGE 2-2
3562 DEFINING MACROS
3565 2.1.1 .macro Directive
3568 Format:
3570 [label:] .macro name, dummy argument list
3572 where: label represents an optional statement label.
3574 name represents the user-assigned symbolic
3575 name of the macro. This name may be
3576 any legal symbol and may be used as a
3577 label elsewhere in the program. The
3578 macro name is not case sensitive,
3579 name, NAME, or nAmE all refer to the
3580 same macro.
3582 , represents a legal macro separator
3583 (comma, space, and/or tab).
3585 dummy represents a number of legal symbols
3586 argument that may appear anywhere in the body of
3587 list the macro definition, even as a label.
3588 These dummy symbols can be used elsewhere
3589 in the program with no conflict of
3590 definition. Multiple dummy arguments
3591 specified in this directive may be
3592 separated by any legal separator. The
3593 detection of a duplicate or an illegal
3594 symbol in a dummy argument list
3595 terminates the scan and causes a 'q'
3596 error to be generated.
3599 A comment may follow the dummy argument list in a .macro direc-
3600 tive, as shown below:
3602 .macro abs a,b ;Defines macro abs
3605 The first statement of a macro definition must be a .macro
3606 directive. Defining a macro with the same name as an existing
3607 macro will generate an 'm' error. The .mdelete directive should
3608 be used to delete the previous macro definition before redefin-
3609 ing a macro.
3612 \f
3614 THE MACRO PROCESSOR PAGE 2-3
3615 DEFINING MACROS
3618 2.1.2 .endm Directive
3621 Format:
3623 .endm
3626 The .endm directive should not have a label. Because the direc-
3627 tives .irp, .irpc, and .rept may repeat more than once the label
3628 will be defined multiple times resulting in 'm' and/or 'p' er-
3629 rors.
3631 The .endm directive may be followed by a comment field, as
3632 shown below:
3634 .endm ;end of macro
3636 A comment may follow the dummy argument list in a .macro
3637 directive, as shown below:
3639 .macro typemsg message ;Type a message.
3640 jsr typemsg
3641 .word message
3642 .endm ;End of typemsg
3645 The final statement of every macro definition must be a .endm
3646 directive. The .endm directive is also used to terminate inde-
3647 finite repeat blocks and repeat blocks. A .endm directive en-
3648 countered outside a macro definition is flagged with an 'n'
3649 error.
3652 2.1.3 .mexit Directive
3655 Format:
3657 .mexit
3660 The .mexit directive may be used to terminate a macro expansion
3661 before the end of the macro is encountered. This directive is
3662 also legal within repeat blocks. It is most useful in nested
3663 macros. The .mexit directive terminates the current macro as
3664 though a .endm directive had been encountered. Using the .mexit
3665 directive bypasses the complexities of nested conditional direc-
3666 tives and alternate assembly paths, as shown in the following
3667 example:
3669 \f
3671 THE MACRO PROCESSOR PAGE 2-4
3672 DEFINING MACROS
3675 .macro altr N,A,B
3676 .
3677 .
3678 .
3679 .if eq,N ;Start conditional Block
3680 .
3681 .
3682 .
3683 .mexit ;Terminate macro expansion
3684 .endif ;End of conditional block
3685 .
3686 .
3687 .
3688 .endm ;Normal end of macro
3691 In an assembly where the symbol N is replaced by zero, the
3692 .mexit directive would assemble the conditional block and ter-
3693 minate the macro expansion. When macros ar nested, a .mexit
3694 directive causes an exit to the next higher level of macro ex-
3695 pansion. A .mexit directive encountered outside a macro defini-
3696 tion is flagged with an 'n' error.
3699 2.2 CALLING MACROS
3702 Format:
3704 [label:] name real arguments
3706 where: label represents an optional statement label.
3708 name represents the name of the macro, as
3709 specified in the macro definition.
3711 real represent symbolic arguments which
3712 arguments replace the dummy arguments listed
3713 in the .macro definition. When
3714 multiple arguments occur, they are
3715 separated by any legal separator.
3716 Arguments to the macro call are
3717 treated as character strings, their
3718 usage is determined by the macro
3719 definition.
3721 A macro definition must be established by means of the .macro
3722 directive before the macro can be called and expanded within the
3723 source program.
3725 When a macro name is the same as a user label, the appearance
3726 of the symbol in the operator field designates the symbol as a
3727 \f
3729 THE MACRO PROCESSOR PAGE 2-5
3730 CALLING MACROS
3733 macro call; the appearance of the symbol in the operand field
3734 designates it as a label, as shown below:
3736 LESS: mov @r0,r1 ;LESS is a label
3737 .
3738 .
3739 .
3740 bra LESS ;LESS is considered a label
3741 .
3742 .
3743 .
3744 LESS sym1,sym2 ;LESS is a macro call
3747 2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
3750 Multiple arguments within a macro must be separated by one of
3751 the legal separating characters (comma, space, and/or tab).
3753 Macro definition arguments (dummy) and macro call arguments
3754 (real) maintain a strict positional relationship. That is, the
3755 first real argument in a macro call corresponds with the first
3756 dummy argument in the macro definition.
3758 For example, the following macro definition and its asso-
3759 ciated macro call contain multiple arguments:
3761 .macro new a,b,c
3762 .
3763 .
3764 .
3766 new phi,sig,^/C1,C2/
3769 Arguments which themselves contain separating characters must be
3770 enclosed within the delimiter construct ^/ / where the
3771 character '/' may be any character not in the argument string.
3772 For example, the macro call:
3774 new ^/exg x,y/,#44,ij
3776 causes the entire expression
3778 exg x,y
3780 to replace all occurrances of the symbol a in the macro defini-
3781 tion. Real arguments with a macro call are considered to be
3782 character strings and are treated as a single entity during
3783 macro expansion.
3785 \f
3787 THE MACRO PROCESSOR PAGE 2-6
3788 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
3791 The up-arrow (^) construction also allows another up-arrow
3792 costruction to be passed as part of the argument. This con-
3793 struction, for example, could have been used in the above macro
3794 call, as follows:
3796 new ^!^/exg x,y/!,#44,ij
3798 causing the entire string ^/exg x,y/ to be passed as an argu-
3799 ment.
3802 2.3.1 Macro Nesting
3805 Macro nesting occurs where the expansion of one macro in-
3806 cludes a call to another macro. The depth of nesting is arbi-
3807 trarily limited to 20.
3809 To pass an argument containing legal argument delimiters to
3810 nested macros, enclose the argument in the macro definition
3811 within an up-arrow construction, as shown in the coding example
3812 below. This extra set of delimiters for each level of nesting
3813 is required in the macro definition, not the in the macro call.
3815 .macro level1 dum1,dum2
3816 level2 ^/dum1/
3817 level2 ^/dum2/
3818 .endm
3820 .macro level2 dum3
3821 dum3
3822 add #10,z
3823 push z
3824 .endm
3826 A call to the level1 macro, as shown below, for example:
3828 level1 ^/leaz 0,x/,^/tfr x,z/
3830 causes the following macro expansion to occur:
3832 leaz 0,x
3833 add #10,z
3834 push z
3835 tfr x,z
3836 add #10,z
3837 push z
3839 When macro definitions are nested, the inner definition cannot
3840 be called until the outer macro has been called and expanded.
3841 For example, in the following code:
3843 \f
3845 THE MACRO PROCESSOR PAGE 2-7
3846 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
3849 .macro lv1 a,b
3850 .
3851 .
3852 .
3853 .macro lv2 c
3854 .
3855 .
3856 .
3857 .endm
3858 .endm
3860 the lv2 macro cannot be called and expanded until the lv1 macro
3861 has been expanded. Likewise, any macro defined within the lv2
3862 macro definition cannot be called and expanded until lv2 has
3863 also been expanded.
3866 2.3.2 Special Characters in Macro Arguments
3869 If an argument does not contain spaces, tabs, or commas it
3870 may include special characters without enclosing them in a
3871 delimited construction. For example:
3873 .macro push arg
3874 mov arg,-(sp)
3875 .endm
3878 push x+3(%2)
3880 causes the following code to be generated:
3882 mov x+3(%2),-(sp)
3885 2.3.3 Passing Numerical Arguments as Symbols
3888 If the unary operator backslash (\) precedes an argument, the
3889 macro treats the argument as a numeric value in the current pro-
3890 gram radix. The ascii characters representing this value are
3891 inserted in the macro expansion, and their function is defined
3892 in the context of the resulting code, as shown in the following
3893 example:
3895 \f
3897 THE MACRO PROCESSOR PAGE 2-8
3898 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
3901 .macro inc a,b
3902 con a,\b
3903 b = b + 1
3904 .endm
3906 .macro con a,b
3907 a'b: .word 4
3908 .endm
3910 ...
3912 c = 0 ;Initialize
3914 inc x,c
3916 The above macro call (inc) would thus expand to:
3918 x0: .word 4
3920 In this expanded code, the lable x0: results from the con-
3921 catenation of two real arguments. The single quote (')
3922 character in the label a'b: concatenates the real argument x
3923 and 0 as they are passed during the expansion of the macro.
3924 This type of argument construction is descibed in more detail in
3925 a following section.
3927 A subsequent call to the same macro would generate the fol-
3928 lowing code:
3930 x1: .word 4
3932 and so on, for later calls. The two macro definitions are
3933 necessary because the symbol associated with the dummy argument
3934 b (that is, symbol c) cannot be updated in the con macro defini-
3935 tion, because the character 0 has replaced c in the argument
3936 string (inc x,c). In the con macro definition, the number
3937 passed is treated as a string argument. (Where the value of the
3938 real argument is 0, only a single 0 character is passed to the
3939 macro expansion.
3942 \f
3944 THE MACRO PROCESSOR PAGE 2-9
3945 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
3948 2.3.4 Number of Arguments in Macro Calls
3951 A macro can be defined with or without arguments. If more
3952 arguments appear in the macro call than in the macro definition,
3953 a 'q' error is generated. If fewer arguments appear in the
3954 macro call than in the macro definition, missing arguments are
3955 assumed to be null values. The conditional directives .if b and
3956 .if nb can be used within the macro to detect missing arguments.
3957 The number of arguments can be determined using the .narg direc-
3958 tive.
3961 2.3.5 Creating Local Symbols Automatically
3964 A label is often required in an expanded macro. In the con-
3965 ventional macro facilituies thus far described, a label must be
3966 explicitly specified as an argument with each macro call. The
3967 user must be careful in issuing subsequent calls to the same
3968 macro in order avoid duplicating labels. This concern can be
3969 eliminated through a feature of the ASxxxx macro facility that
3970 creates a unique symbol where a label is required in an expanded
3971 macro.
3973 ASxxxx allows temporary symbols of the form n$, where n is a
3974 decimal integer. Automatically created symbols are created in
3975 numerical order beginning at 10000$.
3977 The automatic generation of local symbols is invoked on each
3978 call of a macro whose definition contains a dummy argument pre-
3979 ceded by the question mark (?) character, as shown in the macro
3980 definition below:
3982 .macro beta a,?b ;dummy argument b with ?
3983 tst a
3984 beq b
3985 add #5,a
3986 b:
3987 .endm
3990 A local symbol is created automatically only when a real ar-
3991 gument of the macro call is either null or missing, as shown in
3992 Example 1 below. If the real argument is specified in the macro
3993 call, however, generation of the local symbol is inhibited and
3994 normal argument replacement occurs, as shown in Example 2 below.
3995 (Examples 1 and 2 are both expansions of the beta macro defined
3996 above.)
3998 \f
4000 THE MACRO PROCESSOR PAGE 2-10
4001 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
4004 Example 1: Create a Local Symbol for the Missing Argument
4006 beta flag ;Second argument is missing.
4007 tst flag
4008 beq 10000$ ;Local symbol is created.
4009 add #5,flag
4010 10000$:
4012 Example 2: Do Not Create a Local Symbol
4014 beta r3,xyz
4015 tst r3
4016 beq xyz
4017 add #5,r3
4018 xyz:
4021 Automatically created local symbols resulting from the expan-
4022 sion of a macro, as described above, do not establish a local
4023 symbol block in their own right.
4025 When a macro has several arguments earmarked for automatic
4026 local symbol generation, substituting a specific label for one
4027 such argument risks assembly errors because the arguments are
4028 constructed at the point of macro invocation. Therefor, the ap-
4029 pearance of a label in the macro expansion will create a new lo-
4030 cal symbol block. The new local symbol block could leave local
4031 symbol references in the previous block and their symbol defini-
4032 tions in the new one, causing error codes in the assembly list-
4033 ing. Furthermore a later macro expansion that creates local
4034 symbols in the new block may duplicate one of the symbols in
4035 question, causing an additional error code 'p' in the assembly
4036 listing.
4039 2.3.6 Concatenation of Macro Arguments
4042 The apostrophe or single quote character (') operates as a
4043 legal delimiting character in macro definitions. A single quote
4044 that precedes and/or follows a dummy argument in a macro defini-
4045 tion is removed, and the substitution of the real argument oc-
4046 curs at that point. For example, in the following statements:
4048 .macro def A,B,C
4049 A'B: asciz "C"
4050 .byte ''A,''B
4051 .endm
4053 when the macro def is called through the statement:
4055 \f
4057 THE MACRO PROCESSOR PAGE 2-11
4058 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
4061 def x,y,^/V05.00/
4063 it is expanded, as follows:
4065 xy: asciz "V05.00"
4066 .byte 'x,'y
4068 In expanding the first line, the scan for the first argument
4069 terminates upon finding the first apostrophe (') character.
4070 Since A is a dummy argument, the apostrphe (') is removed. The
4071 scan then resumes with B; B is also noted as another dummy ar-
4072 gument. The two real arguments x and y are then concated to
4073 form the label xy:. The third dummy argument is noted in the
4074 operand field of the .asciz directive, causing the real argument
4075 V05.00 to be substituted in this field.
4077 When evaluating the arguments of the .byte directive during
4078 expansion of the second line, the scan begins with the first
4079 apostrophe (') character. Since it is neither preceded nor fol-
4080 lowed by a dummy argument, this apostrophe remains in the macro
4081 expansion. The scan then encounters the second apostrophe,
4082 which is followed by a dummy argument and is therefor discarded.
4083 The scan of argument A is terminated upon encountering the comma
4084 (,). The third apostrophe is neither preceded nor followed by a
4085 dummy argument and again remains in the macro expansion. The
4086 fourth (and last) apostrophe is followed by another dummy argu-
4087 ment and is likewise discarded. (Four apostrophe (') characters
4088 were necessary in the macro definition to generate two apos-
4089 trophe (') characters in the macro expansion.)
4092 2.4 MACRO ATTRIBUTE DIRECTIVES
4095 The ASxxxx assemblers have four directives that allow the
4096 user to determine certain attributes of macro arguments: .narg,
4097 .nchr, .ntyp, and .nval. The use of these directives permits
4098 selective modifications of a macro expansion, depending on the
4099 nature of the arguments being passed. These directives are
4100 described below.
4101 \f
4103 THE MACRO PROCESSOR PAGE 2-12
4104 MACRO ATTRIBUTE DIRECTIVES
4107 2.4.1 .narg Directive
4110 Format:
4112 [label:] .narg symbol
4114 where: label represents an optional statement label.
4116 symbol represents any legal symbol. This symbol
4117 is equated to the number of arguments in
4118 the macro call currently being expanded.
4119 If a symbol is not specified, the .narg
4120 directive is flagged with a 'q' error.
4122 The .narg directive is used to determine the number of arguments
4123 in the macro call currently being expanded. Hence, the .narg
4124 directive can appear only within a macro definition; if it ap-
4125 pears elsewhere, an 'n' error is generated.
4127 The argument count includes null arguments as shown in the
4128 following:
4130 .macro pack A,B,C
4131 .narg cnt
4132 .
4133 .
4134 .
4135 .endm
4137 pack arg1,,arg3
4138 pack arg1
4140 When the first macro pack is invoked .narg will assign a value
4141 of three (3) to the number of arguments cnt, which includes the
4142 empty argument. The second invocation of macro pack has only a
4143 single argument specified and .narg will assign a value of one
4144 (1) to cnt.
4145 \f
4147 THE MACRO PROCESSOR PAGE 2-13
4148 MACRO ATTRIBUTE DIRECTIVES
4151 2.4.2 .nchr Directive
4154 Format:
4156 [label:] .nchr symbol,string
4158 where: label represents an optional statement label.
4160 symbol represents any legal symbol. This symbol
4161 is equated to the number of characters in
4162 the string of the macro call currently
4163 being expanded. If a symbol is not
4164 specified, the .nchr directive is
4165 flagged with a 'q' error.
4167 , represents any legal separator (comma,
4168 space, and/or tab).
4170 string represents a string of printable 7-bit
4171 ascii characters. If the character
4172 string contains a legal separator
4173 (comma, space and/or tab) the whole
4174 string must be delimited using the
4175 up-arrow (^) construct ^/ /.
4176 If the delimiting characters do not
4177 match or if the ending delimiter
4178 cannot be detected because of a
4179 syntactical error in the character
4180 string, the .nchr directive reports
4181 a 'q' error.
4183 The .nchr directive, which can appear anywhere in an ASxxxx pro-
4184 gram, is used to determine the number of characters in a speci-
4185 fied character string. This directive is useful in calculating
4186 the length of macro arguments.
4187 \f
4189 THE MACRO PROCESSOR PAGE 2-14
4190 MACRO ATTRIBUTE DIRECTIVES
4193 2.4.3 .ntyp Directive
4196 Format:
4198 [label:] .ntyp symbol,arg
4200 where: label represents an optional statement label.
4202 symbol represents any legal symbol. The symbol
4203 is made absolute and equated to 0 if
4204 arg is an absolute value or a non
4205 relocatable symbol. The symbol is made
4206 absolute and equated to 1 if arg is a
4207 relocatable symbol. If a symbol is not
4208 specified then the .ntyp directive is
4209 flagged with a 'q' error.
4211 , represents any legal separator (comma,
4212 space, and/or tab).
4214 arg represents any legal expression or
4215 symbol. If arg is not specified
4216 then the .ntyp directive is flagged
4217 with a 'q' error.
4219 The .ntyp directive, which can appear anywhere in an ASxxxx pro-
4220 gram, is used to determine the symbol or expression type as ab-
4221 solute (0) or relocatable (1).
4224 2.4.4 .nval Directive
4227 Format:
4229 [label:] .nval symbol,arg
4231 where: label represents an optional statement label.
4233 symbol represents any legal symbol. The symbol
4234 is equated to the value of arg and made
4235 absolute. If a symbol is not specified
4236 then the .nval directive is flagged
4237 with a 'q' error.
4239 , represents any legal separator (comma,
4240 space, and/or tab).
4242 arg represents any legal expression or
4243 symbol. If arg is not specified
4244 then the .nval directive is flagged
4245 \f
4247 THE MACRO PROCESSOR PAGE 2-15
4248 MACRO ATTRIBUTE DIRECTIVES
4251 with a 'q' error.
4253 The .nval directive, which can appear anywhere in an ASxxxx pro-
4254 gram, is used to determine the value of arg and make the result
4255 an absolute value.
4258 2.5 INDEFINITE REPEAT BLOCK DIRECTIVES
4261 An indefinite repeat block is similar to a macro definition
4262 with only one dummy argument. At each expansion of the inde-
4263 finite repeat range, this dummy argument is replaced with suc-
4264 cessive elements of a real argument list. Since the repeat
4265 directive and its associated range are coded in-line within the
4266 source program, this type of macro definition and expansion does
4267 not require calling the macro by name, as required in the expan-
4268 sion of the conventional macros previously described.
4270 An indefinite repeat block can appear within or outside
4271 another macro definition, indefinite repeat block, or repeat
4272 block. The rules specifying indefinite repeat block arguments
4273 are the same as for specifying macro arguments.
4274 \f
4276 THE MACRO PROCESSOR PAGE 2-16
4277 INDEFINITE REPEAT BLOCK DIRECTIVES
4280 2.5.1 .irp Directive
4283 Format:
4285 [label:] .irp sym,argument_list
4286 .
4287 .
4288 (range of indefinite repeat block)
4289 .
4290 .
4291 .endm
4293 where: label represents an optional statement label.
4295 sym represents a dummy argument that is
4296 replaced with successive real arguments
4297 from the argument list. If the dummy
4298 argument is not specified, the .irp
4299 directive is flagged with a 'q' error.
4301 , represents any legal separator (comma,
4302 space, and/or tab).
4304 argument_list represents a list of real arguments
4305 that are to be used in the expansion
4306 of the indefinite repeat range. A real
4307 argument may consist of one or more
4308 7-bit ascii characters; multiple
4309 arguments must be separated by any
4310 legal separator (comma, space, and/or
4311 tab). If an argument must contain
4312 a legal separator then the up-arrow
4313 (_^) construct is require for that
4314 argument. If no real arguments are
4315 specified, no action is taken.
4317 range represents the block of code to be
4318 repeated once for each occurrence of
4319 a real argument in the list. The
4320 range may contain other macro
4321 definitions, repeat ranges and/or
4322 the .mexit directive.
4324 .endm indicates the end of the indefinite
4325 repeat block range.
4327 The .irp directive is used to replace a dummy argument with suc-
4328 cessive real arguments specified in an argument list. This
4329 replacement process occurrs during the expansion of an inde-
4330 finite repeat block range.
4331 \f
4333 THE MACRO PROCESSOR PAGE 2-17
4334 INDEFINITE REPEAT BLOCK DIRECTIVES
4337 2.5.2 .irpc Directive
4340 Format:
4342 [label:] .irpc sym,string
4343 .
4344 .
4345 (range of indefinite repeat block)
4346 .
4347 .
4348 .endm
4350 where: label represents an optional statement label.
4352 sym represents a dummy argument that is
4353 replaced with successive real characters
4354 from the argument string. If the dummy
4355 argument is not specified, the .irpc
4356 directive is flagged with a 'q' error.
4358 , represents any legal separator (comma,
4359 space, and/or tab).
4361 string represents a list of 7-bit ascii
4362 characters. If the string contains
4363 legal separator characters (comma,
4364 space, and/or tab) then the up-arrow
4365 (_^) construct must delimit the string.
4367 range represents the block of code to be
4368 repeated once for each occurrence of
4369 a real argument in the list. The
4370 range may contain other macro
4371 definitions, repeat ranges and/or
4372 the .mexit directive.
4374 .endm indicates the end of the indefinite
4375 repeat block range.
4377 The .irpc directive is available to permit single character sub-
4378 stition. On each iteration of the indefinite repeat range, the
4379 dummy argument is replaced with successive characters in the
4380 specified string.
4381 \f
4383 THE MACRO PROCESSOR PAGE 2-18
4384 INDEFINITE REPEAT BLOCK DIRECTIVES
4387 2.6 REPEAT BLOCK DIRECTIVE
4390 A repeat block is similar to a macro definition with only one
4391 argument. The argument specifies the number of times the repeat
4392 block is inserted into the assembly stream. Since the repeat
4393 directive and its associated range are coded in-line within the
4394 source program, this type of macro definition and expansion does
4395 not require calling the macro by name, as required in the expan-
4396 sion of the conventional macros previously described.
4398 A repeat block can appear within or outside another macro de-
4399 finition, indefinite repeat block, or repeat block.
4402 2.6.1 .rept
4405 Format:
4407 [label:] .rept exp
4408 .
4409 .
4410 (range of repeat block)
4411 .
4412 .
4413 .endm
4415 where: label represents an optional statement label.
4417 exp represents any legal expression.
4418 This value controls the number of
4419 times the block of code is to be assembled
4420 within the program. When the expression
4421 value is less than or equal to zero (0),
4422 the repeat block is not assembled. If
4423 this value is not an absolute value, the
4424 .rept directive is flagged with an 'r'
4425 error.
4427 range represents the block of code to be
4428 repeated. The range may contain other
4429 macro definitions, repeat ranges and/or
4430 the .mexit directive.
4432 .endm indicates the end of the repeat block
4433 range.
4435 The .rept directive is used to duplicate a block of code, a cer-
4436 tain number of times, in line with other source code.
4437 \f
4439 THE MACRO PROCESSOR PAGE 2-19
4440 REPEAT BLOCK DIRECTIVE
4443 2.7 MACRO DELETION DIRECTIVE
4446 The .mdelete directive deletes the definitions of the the
4447 specified macro(s).
4450 2.7.1 .mdelete
4453 Format:
4455 .mdelete name1,name2,...,namen
4457 where: name1, represent legal macro names. When multiple
4458 name2, names are specified, they are separated
4459 ..., by any legal separator (comma, space, and/or
4460 namen tab).
4464 2.8 MACRO INVOCATION DETAILS
4467 The invocation of a macro, indefinite repeat block, or repeat
4468 block has specific implications for .if-.else-.endif constructs
4469 and for .list-.nlist directives.
4471 At the point a macro, indefinite repeat block, or repeat
4472 block is called the following occurs:
4474 1) The initial .if-.else-.endif
4475 state is saved.
4477 2) The initial .list-.nlist
4478 state is saved.
4480 3) The macro, indefinite repeat block,
4481 or repeat block is inserted into the
4482 assembler source code stream. All
4483 argument substitution is performed
4484 at this point.
4486 When the macro completes and after each pass through an inde-
4487 finite repeat block or repeat block the .if-.else-.endif and
4488 .list-.nlist state is reset to the initial state.
4490 The reset of the .if-.else-.endif state means that the invo-
4491 cation of a macro, indefinite repeat block, or repeat block can-
4492 not change the .if-.else-.endif state of the calling code. For
4493 example the following code does not change the .if-.else-.endif
4494 condition at macro completion:
4495 \f
4497 THE MACRO PROCESSOR PAGE 2-20
4498 MACRO INVOCATION DETAILS
4503 .macro fnc A
4504 .if nb,^!A!
4505 ...
4506 .list (meb)
4507 .mexit
4508 .else
4509 ...
4510 .nlist
4511 .mexit
4512 .endif
4513 .endm
4515 code: fnc
4518 Within the macro the .if condition becomes false but the con-
4519 dition is not propagated outside the macro.
4521 Similarly, when the .list-.nlist state is changed within a
4522 macro the change is not propogated outside the macro.
4524 The normal .if-.else-.endif processing verifies that every
4525 .if has a corresponding .endif. When a macro, indefinite repeat
4526 block, or repeat block terminates by using the .mexit directive
4527 the .if-.endif checking is bypassed because all source lines
4528 between the .mexit and .endm directives are skipped.
4531 2.9 BUILDING A MACRO LIBRARY
4534 Using the macro facilities of the ASxxxx assemblers a simple
4535 macro library can be built. The macro library is built by com-
4536 bining individual macros, sets of macros, or include file direc-
4537 tives into a single file. Each macro entity is enclosed within
4538 a .if/.endif block that selects the desired macro definitions.
4540 The selection of specific macros to be imported in a program
4541 is performed by three macros, .mlib, .mcall, and .mload, con-
4542 tained in the file mlib.def.
4543 \f
4545 THE MACRO PROCESSOR PAGE 2-21
4546 BUILDING A MACRO LIBRARY
4549 2.9.1 .mlib Macro Directive
4552 Format:
4554 .mlib file
4556 where: file represents the macro library file name.
4557 If the file name does not include a path
4558 then the path of the current assembly
4559 file is used. If the file name (and/or
4560 path) contains white space then the
4561 path/name must be delimited with the
4562 up-arrow (^) construct ^/ /.
4564 The .mlib directive defines two macros, .mcall and .mload, which
4565 when invoked will read a file, importing specific macro defini-
4566 tions. Any previous .mcall and/or .mload directives will be
4567 deleted before the new .mcall and .mload directives are defined.
4569 The .mload directive is an internal directive which simply
4570 includes the macro library file with the listing disabled.
4572 The following is the mlib.def file which defines the macros
4573 .mlib, .mcall, and .mload.
4575 \f
4577 THE MACRO PROCESSOR PAGE 2-22
4578 BUILDING A MACRO LIBRARY
4581 ;************************************************
4582 ;* *
4583 ;* A simple Macro Library Implementation *
4584 ;* *
4585 ;* December 2008 *
4586 ;* *
4587 ;************************************************
4589 .macro .mlib FileName
4590 .if b,^!FileName!
4591 .error 1 ; File Name Required
4592 .mexit
4593 .endif
4594 .mdelete .mcall
4595 .macro .mcall a,b,c,d,e,f,g,h
4596 .irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!
4597 .iif nb,^!sym! .define .$$.'sym
4598 .endm
4599 .mload
4600 .irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!
4601 .if nb,^!sym!
4602 .iif ndef,sym'.$$. .error 1 ; macro not found
4603 .undefine .$$.'sym
4604 .undefine sym'.$$.
4605 .endif
4606 .endm
4607 .endm ;.mcall
4608 .mdelete .mload
4609 .macro .mload
4610 .nlist
4611 .include ^!FileName!
4612 .list
4613 .endm ;.mload
4614 .endm ;.mlib
4617 2.9.2 .mcall Macro Directive
4620 Format:
4622 .mcall macro1,macro2,...,macro8
4624 where:
4626 macro1, represents from 1 to 8 macro library
4627 macro2, references to a macro definition or
4628 ..., set of macro definitions included in
4629 macro8 the file specified with the .mlib macro.
4631 As can be seen from the macro definition of .mlib and .mcall
4632 shown above, when .mcall is invoked temporary symbols are
4633 \f
4635 THE MACRO PROCESSOR PAGE 2-23
4636 BUILDING A MACRO LIBRARY
4639 defined for each macro or macro set that is to be imported. The
4640 macro .mload is then invoked to load the macro library file
4641 specified in the call to .mlib.
4643 For example, when the following macros are invoked:
4645 .mlib crossasm.sml ; Cross Assembler Macros
4646 .mcall M6809 ; M6809 Macro Group
4648 The .mlib macro defines the .mload macro to access the system
4649 macro file crossasm.sml. Invoking the .mcall macro creates a
4650 temporary symbol, '.$$.M6809', and then invokes the macro .mload
4651 to import the system macro file crossasm.sml. The file cros-
4652 sasm.sml contains conditional statements that define the re-
4653 quired macros and creates a temporary symbol 'M6809.$$.' to
4654 indicate the macro group was found. If the macro is not found
4655 an error message is generated.
4657 The following is a small portion of the crossasm.sml system
4658 macro file which shows the M6809 macro group:
4660 .title Cross Assembler Macro Library
4662 ; This MACRO Library is Case Insensitive.
4663 ;
4665 ...
4667 ; Macro Based 6809 Cross Assembler
4669 .$.SML.$. =: 0
4670 .if idn a,A
4671 .iif def,.$$.m6809 .$.SML.$. = -1
4672 .else
4673 .iif def,.$$.m6809 .$.SML.$. = -1
4674 .iif def,.$$.M6809 .$.SML.$. = 1
4675 .endif
4676 .iif lt,.$.SML.$. .define m6809.$$.
4677 .iif gt,.$.SML.$. .define M6809.$$.
4678 .iif ne,.$.SML.$. .include "m6809.mac"
4680 ...
4684 \f
4686 THE MACRO PROCESSOR PAGE 2-24
4687 EXAMPLE MACRO CROSS ASSEMBLERS
4690 2.10 EXAMPLE MACRO CROSS ASSEMBLERS
4693 The 'ascheck' subdirectory 'macroasm' contains 7 assemblers
4694 written using only the general macro processing facility of the
4695 ASxxxx assemblers:
4697 i8085.mac - 8085 Microprocessor
4698 m6800.mac - 6800 Microprocessor
4699 m6801.mac - 6801 Microprocessor
4700 m6804.mac - 6804 Microprocessor
4701 m6805.mac - 6805 Microprocessor
4702 m6809.mac - 6809 Microprocessor
4703 s2650.mac - 2650 Microprocessor
4706 These absolute macro cross assemblers are included to il-
4707 lustrate the functionality of the general macro processing
4708 facility of the ASxxxx assemblers. In general they are useful
4709 examples of actual macro implementations.
4710 \f
4724 CHAPTER 3
4726 THE LINKER
4732 3.1 ASLINK RELOCATING LINKER
4735 ASLINK is the companion linker for the ASxxxx assemblers.
4737 The program ASLINK is a general relocating linker performing
4738 the following functions:
4740 1. Bind multiple object modules into a single memory image
4742 2. Resolve inter-module symbol references
4744 3. Combine code belonging to the same area from multiple
4745 object files into a single contiguous memory region
4747 4. Search and import object module libraries for undefined
4748 global variables
4750 5. Perform byte and word program counter relative
4751 (pc or pcr) addressing calculations
4753 6. Define absolute symbol values at link time
4755 7. Define absolute area base address values at link time
4757 8. Produce Intel Hex or Motorola S19 output file
4759 9. Produce a map of the linked memory image
4761 10. Produce an updated listing file with the relocated ad-
4762 dresses and data
4763 \f
4765 THE LINKER PAGE 3-2
4766 INVOKING ASLINK
4769 3.2 INVOKING ASLINK
4772 Starting ASlink without any arguments provides the following
4773 option list and then exits:
4775 Usage: [-Options] [-Option with arg] file
4776 Usage: [-Options] [-Option with arg] outfile file [file ...]
4777 -p Echo commands to stdout (default)
4778 -n No echo of commands to stdout
4779 Alternates to Command Line Input:
4780 -c ASlink >> prompt input
4781 -f file[.lnk] Command File input
4782 Librarys:
4783 -k Library path specification, one per -k
4784 -l Library file specification, one per -l
4785 Relocation:
4786 -b area base address=expression
4787 -g global symbol=expression
4788 Map format:
4789 -m Map output generated as (out)file[.map]
4790 -w Wide listing format for map file
4791 -x Hexadecimal (default)
4792 -d Decimal
4793 -q Octal
4794 Output:
4795 -i Intel Hex as (out)file[.i--]
4796 -s Motorola S Record as (out)file[.s--]
4797 -j NoICE Debug output as (out)file[.noi]
4798 -y SDCDB Debug output as (out)file[.cdb]
4799 -o Linked file/library object output enable (default)
4800 -v Linked file/library object output disable
4801 List:
4802 -u Update listing file(s) with link data as file(s)[.rst]
4803 Case Sensitivity:
4804 -z Disable Case Sensitivity for Symbols
4805 End:
4806 -e or null line terminates input
4811 NOTE
4813 When ASlink is invoked with a single filename the
4814 created output file will have the same filename as the
4815 .rel file.
4817 When ASlink is invoked with multiple filenames the
4818 first filename is the output filename and the remain-
4819 ing filenames are linked together into the output
4820 \f
4822 THE LINKER PAGE 3-3
4823 INVOKING ASLINK
4826 filename.
4831 Most sytems require the options to be entered on the command
4832 line:
4834 aslink [-Options] [-Options with args] file
4836 aslink [-Options] [-Options with args] outfile file1 [file2
4837 ...]
4840 Some systems may request the arguments after the linker is
4841 started at a system specific prompt:
4843 aslink
4844 argv: -[options] -[option arg] file
4846 aslink
4847 argv: [-Options] [-Options with args] outfile file1 [file2
4848 ...]
4851 The linker commands are explained in some more detail:
4853 1. -c ASlink >> prompt mode.
4854 The ASlink >> prompt mode reads linker commands from
4855 stdin.
4857 2. -f file Command file mode.
4858 The command file mode imports linker commands from the
4859 specified file (extension must be .lnk), imported -c
4860 and -f commands are ignored. If the directory path,
4861 for a file to be linked, is not specified in the com-
4862 mand file then the path defaults to the .lnk file
4863 directory path.
4865 3. -p/-n enable/disable echoing commands to stdout.
4867 4. -i/-s Intel Hex (file.i--), or Motorola S (file.s--)
4868 image output file.
4870 5. -o/-v Specifies that subsequent linked
4871 files/libraries will generate object output (default)
4872 or suppress object output. (if option -i, -s, or -t
4873 was specified)
4875 6. -z Disable Case Sensitivity for Symbols
4877 \f
4879 THE LINKER PAGE 3-4
4880 INVOKING ASLINK
4883 7. -m Generate a map file (file.map). This file
4884 contains a list of the symbols (by area) with absolute
4885 addresses, sizes of linked areas, and other linking in-
4886 formation.
4888 8. -w Specifies that a wide listing format be used
4889 for the map file.
4891 9. -xdq Specifies the number radix for the map file
4892 (Hexadecimal, Decimal, or Octal).
4894 10. -u Generate an updated listing file (file.rst)
4895 derived from the relocated addresses and data from the
4896 linker.
4898 11. file File(s) to be linked. Files may be on the
4899 same line as the above options or on a separate line(s)
4900 one file per line or multiple files separated by spaces
4901 or tabs.
4903 12. -b area=expression
4904 (one definition per line in a linker command file.)
4905 This specifies an area base address where the expres-
4906 sion may contain constants and/or defined symbols from
4907 the linked files.
4909 13. -g symbol=expression
4910 (one definition per line in a linker command file.)
4911 This specifies the value for the symbol where the ex-
4912 pression may contain constants and/or defined symbols
4913 from the linked files.
4915 14. -k library directory path
4916 (one definition per line in a linker command file.)
4917 This specifies one possible path to an object library.
4918 More than one path is allowed.
4920 15. -l library file specification
4921 (one definition per line in a linker command file.)
4922 This specifies a possible library file. More than one
4923 file is allowed.
4925 16. -e or null line, terminates input to the linker.
4927 ASLINK linker supported by and distributed with SDCC are:
4928 sdld
4930 sdld specific options:
4932 Miscellaneous:
4933 -I [iram-size] Check for internal RAM overflow
4934 -X [xram-size] Check for external RAM overflow
4935 -C [code-size] Check for code overflow
4936 -M Generate memory usage summary file[mem]
4937 -Y Pack internal ram
4938 -S [stack-size] Allocate space for stack
4939 -E ELF executable as file[elf]
4941 THE LINKER PAGE 3-5
4942 LIBRARY PATH(S) AND FILE(S)
4945 3.3 LIBRARY PATH(S) AND FILE(S)
4948 The process of resolving undefined symbols after scanning the
4949 input object files includes the scanning of object module
4950 libraries. The linker will search through all combinations of
4951 the library path specifications (input by the -k option) and the
4952 library file specifications (input by the -l option) that lead
4953 to an existing library file. Each library file contains a list
4954 (one file per line) of modules included in this particular
4955 library. Each existing object module is scanned for a match to
4956 the undefined symbol. The first module containing the symbol is
4957 then linked with the previous modules to resolve the symbol de-
4958 finition. The library object modules are rescanned until no
4959 more symbols can be resolved. The scanning algorithm allows
4960 resolution of back references. No errors are reported for non
4961 existant library files or object modules.
4963 The library file specification may be formed in one of two
4964 ways:
4966 1. If the library file contained an absolute path/file
4967 specification then this is the object module's
4968 path/file.
4969 (i.e. C:\... or C:/...)
4971 2. If the library file contains a relative path/file
4972 specification then the concatenation of the path and
4973 this file specification becomes the object module's
4974 path/file.
4975 (i.e. \... or /...)
4978 As an example, assume there exists a library file termio.lib
4979 in the syslib directory specifying the following object modules:
4981 \6809\io_disk first object module
4982 d:\special\io_comm second object module
4984 and the following parameters were specified to the linker:
4986 -k c:\iosystem\ the first path
4987 -k c:\syslib\ the second path
4989 -l termio the first library file
4990 -l io the second library file (no such file)
4992 The linker will attempt to use the following object modules to
4993 resolve any undefined symbols:
4995 c:\syslib\6809\io_disk.rel (concatenated path/file)
4996 d:\special\io_comm.rel (absolute path/file)
4997 \f
4999 THE LINKER PAGE 3-6
5000 LIBRARY PATH(S) AND FILE(S)
5004 all other path(s)/file(s) don't exist. (No errors are reported
5005 for non existant path(s)/file(s).)
5008 3.4 ASLINK PROCESSING
5011 The linker processes the files in the order they are
5012 presented. The first pass through the input files is used to
5013 define all program areas, the section area sizes, and symbols
5014 defined or referenced. Undefined symbols will initiate a search
5015 of any specified library file(s) and the importing of the module
5016 containing the symbol definition. After the first pass the -b
5017 (area base address) definitions, if any, are processed and the
5018 areas linked.
5020 The area linking proceeds by first examining the area types
5021 ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
5022 object modules are always overlayed and have been assembled at a
5023 specific address, these are not normally relocated (if a -b com-
5024 mand is used on an absolute area the area will be relocated).
5025 Relative areas (normally defined as REL|CON) have a base address
5026 of 0x0000 as read from the object files, the -b command speci-
5027 fies the beginning address of the area. All subsequent relative
5028 areas will be concatenated with proceeding relative areas.
5029 Where specific ordering is desired, the first linker input file
5030 should have the area definitions in the desired order. At the
5031 completion of the area linking all area addresses and lengths
5032 have been determined. The areas of type PAG are verified to be
5033 on a 256 byte boundary and that the length does not exceed 256
5034 bytes. Any errors are noted on stderr and in the map file.
5036 Next the global symbol definitions (-g option), if any, are
5037 processed. The symbol definitions have been delayed until this
5038 point because the absolute addresses of all internal symbols are
5039 known and can be used in the expression calculations.
5041 Before continuing with the linking process the symbol table
5042 is scanned to determine if any symbols have been referenced but
5043 not defined. Undefined symbols are listed on the stderr device.
5044 if a .module directive was included in the assembled file the
5045 module making the reference to this undefined variable will be
5046 printed.
5048 Constants defined as global in more than one module will be
5049 flagged as multiple definitions if their values are not identi-
5050 cal.
5052 After the preceeding processes are complete the linker may
5053 output a map file (-m option). This file provides the following
5054 information:
5055 \f
5057 THE LINKER PAGE 3-7
5058 ASLINK PROCESSING
5061 1. Global symbol values and label absolute addresses
5063 2. Defined areas and there lengths
5065 3. Remaining undefined symbols
5067 4. List of modules linked
5069 5. List of library modules linked
5071 6. List of -b and -g definitions
5076 The final step of the linking process is performed during the
5077 second pass of the input files. As the xxx.rel files are read
5078 the code is relocated by substituting the physical addresses for
5079 the referenced symbols and areas and may be output in Intel or
5080 Motorola formats. The number of files
5081 linked and symbols defined/referenced is limited by the proces-
5082 sor space available to build the area/symbol lists. If the -u
5083 option is specified then the listing files (file.lst) associated
5084 with the relocation files (file.rel) are scanned and used to
5085 create a new file (file.rst) which has all addresses and data
5086 relocated to their final values.
5088 The -o/-v options allow the simple creation of loadable or
5089 overlay modules. Loadable and overlay modules normally need to
5090 be linked with a main module(s) to resolve external symbols.
5091 The -o/-v options can be used to enable object output for the
5092 loadable or overlay module(s) and suppress the object code from
5093 the linked main module(s). The -o/-v options can be applied
5094 repeatedly to specify a single linked file, groups of files, or
5095 libraries for object code inclusion or suppression.
5096 \f
5098 THE LINKER Page 3-15
5099 ASXXXX VERSION 3.XX LINKING
5102 3.6 ASXXXX VERSION 3.XX LINKING
5105 The linkers' input object file is an ascii file containing
5106 the information needed by the linker to bind multiple object
5107 modules into a complete loadable memory image.
5109 The object module contains the following designators:
5111 [XDQ][HL][234]
5112 X Hexadecimal radix
5113 D Decimal radix
5114 Q Octal radix
5116 H Most significant byte first
5117 L Least significant byte first
5119 2 16-Bit Addressing
5120 3 24-Bit Addressing
5121 4 32-Bit Addressing
5123 H Header
5124 M Module
5125 A Area
5126 S Symbol
5127 T Object code
5128 R Relocation information
5129 P Paging information
5132 3.6.1 Object Module Format
5135 The first line of an object module contains the
5136 [XDQ][HL][234] format specifier (i.e. XH2 indicates a hexa-
5137 decimal file with most significant byte first and 16-bit ad-
5138 dressing) for the following designators.
5141 3.6.2 Header Line
5143 H aa areas gg global symbols
5145 The header line specifies the number of areas(aa) and the
5146 number of global symbols(gg) defined or referenced in this ob-
5147 ject module segment.
5150 \f
5152 THE LINKER PAGE 3-16
5153 ASXXXX VERSION 3.XX LINKING
5156 3.6.3 Module Line
5158 M name
5160 The module line specifies the module name from which this
5161 header segment was assembled. The module line will not appear
5162 if the .module directive was not used in the source program.
5165 3.6.4 Area Line
5167 A label size ss flags ff
5169 The area line defines the area label, the size (ss) of the
5170 area in bytes, and the area flags (ff). The area flags specify
5171 the ABS, REL, CON, OVR, and PAG parameters:
5173 OVR/CON (0x04/0x00 i.e. bit position 2)
5175 ABS/REL (0x08/0x00 i.e. bit position 3)
5177 PAG (0x10 i.e. bit position 4)
5180 3.6.5 Symbol Line
5182 S name Defnnnn
5184 or
5186 S name Refnnnn
5188 The symbol line defines (Def) or references (Ref) the identi-
5189 fier name with the value nnnn. The defined value is relative to
5190 the current area base address. References to constants and ex-
5191 ternal global symbols will always appear before the first area
5192 definition. References to external symbols will have a value of
5193 zero.
5196 3.6.6 T Line
5198 T xx xx nn nn nn nn nn ...
5200 The T line contains the assembled code output by the assem-
5201 bler with xx xx being the offset address from the current area
5202 base address and nn being the assembled instructions and data in
5203 byte format.
5206 \f
5208 THE LINKER PAGE 3-17
5209 ASXXXX VERSION 3.XX LINKING
5212 3.6.7 R Line
5214 R 0 0 nn nn n1 n2 xx xx ...
5216 The R line provides the relocation information to the linker.
5217 The nn nn value is the current area index, i.e. which area the
5218 current values were assembled. Relocation information is en-
5219 coded in groups of 4 bytes:
5221 1. n1 is the relocation mode and object format, for the
5222 adhoc extension modes refer to asxxxx.h or aslink.h
5223 1. bit 0 word(0x00)/byte(0x01)
5224 2. bit 1 relocatable area(0x00)/symbol(0x02)
5225 3. bit 2 normal(0x00)/PC relative(0x04) relocation
5226 4. bit 3 1-byte(0x00)/2-byte(0x08) object format
5227 5. bit 4 signed(0x00)/unsigned(0x10) byte data
5228 6. bit 5 normal(0x00)/page '0'(0x20) reference
5229 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
5230 8. bit 7 LSB byte(0x00)/MSB byte(0x80)
5232 2. n2 is a byte index into the corresponding (i.e. pre-
5233 ceeding) T line data (i.e. a pointer to the data to be
5234 updated by the relocation). The T line data may be
5235 1-byte or 2-byte byte data format or 2-byte word
5236 format.
5238 3. xx xx is the area/symbol index for the area/symbol be-
5239 ing referenced. the corresponding area/symbol is found
5240 in the header area/symbol lists.
5243 The groups of 4 bytes are repeated for each item requiring relo-
5244 cation in the preceeding T line.
5247 3.6.8 P Line
5249 P 0 0 nn nn n1 n2 xx xx
5251 The P line provides the paging information to the linker as
5252 specified by a .setdp directive. The format of the relocation
5253 information is identical to that of the R line. The correspond-
5254 ing T line has the following information:
5255 T xx xx aa aa bb bb
5257 Where aa aa is the area reference number which specifies the
5258 selected page area and bb bb is the base address of the page.
5259 bb bb will require relocation processing if the 'n1 n2 xx xx' is
5260 specified in the P line. The linker will verify that the base
5261 address is on a 256 byte boundary and that the page length of an
5262 area defined with the PAG type is not larger than 256 bytes.
5264 \f
5266 THE LINKER PAGE 3-18
5267 ASXXXX VERSION 3.XX LINKING
5270 The linker defaults any direct page references to the first
5271 area defined in the input REL file. All ASxxxx assemblers will
5272 specify the _CODE area first, making this the default page area.
5275 3.6.9 24-Bit and 32-Bit Addressing
5278 When 24-bit or 32-bit addressing is specified in the file
5279 format line [XDQ][HL][234] then the S and T Lines have modified
5280 formats:
5281 S name Defnnnnnn (24-bit)
5282 S name Refnnnnnn (24-bit)
5283 T xx xx xx nn nn nn nn nn ... (24-bit)
5285 S name Defnnnnnnnn (32-bit)
5286 S name Refnnnnnnnn (32-bit)
5287 T xx xx xx xx nn nn nn nn nn ... (32-bit)
5289 The multibyte formats for byte data replace the 2-byte form
5290 for 16-bit data with 3-byte or 4-byte data for 24-bit or 32-bit
5291 data respectively. The 2nd byte format (also named MSB) always
5292 uses the second byte of the 2, 3, or 4-byte data.
5295 3.6.10 ASlink V3.xx Error Messages
5298 The linker provides detailed error messages allowing the pro-
5299 grammer to quickly find the errant code. As the linker com-
5300 pletes pass 1 over the input file(s) it reports any page
5301 boundary or page length errors as follows:
5303 ?ASlink-Warning-Paged Area PAGE0 Boundary Error
5305 and/or
5307 ?ASlink-Warning-Paged Area PAGE0 Length Error
5309 where PAGE0 is the paged area.
5311 During Pass two the linker reads the T, R, and P lines per-
5312 forming the necessary relocations and outputting the absolute
5313 code. Various errors may be reported during this process
5314 \f
5316 THE LINKER PAGE 3-19
5317 ASXXXX VERSION 3.XX LINKING
5320 The P line processing can produce only one possible error:
5322 ?ASlink-Warning-Page Definition Boundary Error
5323 file module pgarea pgoffset
5324 PgDef t6809l t6809l PAGE0 0001
5326 The error message specifies the file and module where the .setdp
5327 direct was issued and indicates the page area and the page
5328 offset value determined after relocation.
5331 The R line processing produces various errors:
5333 ?ASlink-Warning-Byte PCR relocation error for symbol bra2
5334 ?ASlink-Warning-Unsigned Byte error for symbol two56
5335 ?ASlink-Warning-Page0 relocation error for symbol ltwo56
5336 ?ASlink-Warning-Page Mode relocation error for symbol two56
5337 ?ASlink-Warning-Page Mode relocation error
5338 ?ASlink-Warning-2K Page relocation error
5339 ?ASlink-Warning-512K Page relocation error
5341 These error messages also specify the file, module, area, and
5342 offset within the area of the code referencing (Refby) and de-
5343 fining (Defin) the symbol:
5345 ?ASlink-Warning-Unsigned Byte error for symbol two56
5346 file module area offset
5347 Refby t6800l t6800l DIRECT 0015
5348 Defin tconst tconst . .ABS. 0100
5350 If the symbol is defined in the same module as the reference the
5351 linker is unable to report the symbol name. The assembler list-
5352 ing file(s) should be examined at the offset from the specified
5353 area to locate the offending code.
5355 The errors are:
5357 1. The byte PCR error is caused by exceeding the pc rela-
5358 tive byte branch range.
5360 2. The Unsigned byte error indicates an indexing value was
5361 negative or larger than 255.
5363 3. The Page0 error is generated if the direct page vari-
5364 able is not in the page0 range of 0 to 255.
5366 4. The page mode error is generated if the direct variable
5367 is not within the current direct page (6809).
5369 5. The 2K Page relocation error is generated if the
5370 destination is not within the current 2K page (8051,
5371 DS8xCxxx).
5372 \f
5374 THE LINKER PAGE 3-20
5375 ASXXXX VERSION 3.XX LINKING
5378 6. The 512K Page relocation error is generated if the
5379 destination is not within the current 512K page
5380 (DS80C390).
5382 \f
5384 THE LINKER Page 3-21
5385 INTEL IHX OUTPUT FORMAT
5388 3.7 INTEL IHX OUTPUT FORMAT (16-BIT)
5390 Record Mark Field - This field signifies the start of a
5391 record, and consists of an ascii colon
5392 (:).
5394 Record Length Field - This field consists of two ascii
5395 characters which indicate the number of
5396 data bytes in this record. The
5397 characters are the result of converting
5398 the number of bytes in binary to two
5399 ascii characters, high digit first. An
5400 End of File record contains two ascii
5401 zeros in this field.
5403 Load Address Field - This field consists of the four ascii
5404 characters which result from converting
5405 the the binary value of the address in
5406 which to begin loading this record. The
5407 order is as follows:
5409 High digit of high byte of address.
5410 Low digit of high byte of address.
5411 High digit of low byte of address.
5412 Low digit of low byte of address.
5414 In an End of File record this field con-
5415 sists of either four ascii zeros or the
5416 program entry address.
5418 Record Type Field - This field identifies the record type,
5419 which is either 0 for data records or 1
5420 for an End of File record. It consists
5421 of two ascii characters, with the high
5422 digit of the record type first, followed
5423 by the low digit of the record type.
5425 Data Field - This field consists of the actual data,
5426 converted to two ascii characters, high
5427 digit first. There are no data bytes in
5428 the End of File record.
5430 Checksum Field - The checksum field is the 8 bit binary
5431 sum of the record length field, the load
5432 address field, the record type field,
5433 and the data field. This sum is then
5434 negated (2's complement) and converted
5435 to two ascii characters, high digit
5436 first.
5437 \f
5439 THE LINKER Page 3-22
5440 INTEL I86 OUTPUT FORMAT
5443 3.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT)
5445 Record Mark Field - This field signifies the start of a
5446 record, and consists of an ascii colon
5447 (:).
5449 Record Length Field - This field consists of two ascii
5450 characters which indicate the number of
5451 data bytes in this record. The
5452 characters are the result of converting
5453 the number of bytes in binary to two
5454 ascii characters, high digit first. An
5455 End of File record contains two ascii
5456 zeros in this field.
5458 Load Address Field - This field consists of the four ascii
5459 characters which result from converting
5460 the the binary value of the address in
5461 which to begin loading this record. The
5462 order is as follows:
5464 High digit of high byte of address.
5465 Low digit of high byte of address.
5466 High digit of low byte of address.
5467 Low digit of low byte of address.
5469 In an End of File record this field con-
5470 sists of either four ascii zeros or the
5471 program entry address.
5473 Record Type Field - This field identifies the record type,
5474 which is either 0 for data records, 1
5475 for an End of File record, or 4 for a
5476 segment record. It consists of two
5477 ascii characters, with the high digit of
5478 the record type first, followed by the
5479 low digit of the record type.
5481 Data Field - This field consists of the actual data,
5482 converted to two ascii characters, high
5483 digit first. There are no data bytes in
5484 the End of File record.
5486 Checksum Field - The checksum field is the 8 bit binary
5487 sum of the record length field, the load
5488 address field, the record type field,
5489 and the data field. This sum is then
5490 negated (2's complement) and converted
5491 to two ascii characters, high digit
5492 first.
5493 \f
5495 THE LINKER Page 3-23
5496 MOTOROLA S1-S9 OUTPUT FORMAT
5499 3.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT)
5501 Record Type Field - This field signifies the start of a
5502 record and identifies the the record
5503 type as follows:
5505 Ascii S1 - Data Record
5506 Ascii S9 - End of File Record
5508 Record Length Field - This field specifies the record length
5509 which includes the address, data, and
5510 checksum fields. The 8 bit record
5511 length value is converted to two ascii
5512 characters, high digit first.
5514 Load Address Field - This field consists of the four ascii
5515 characters which result from converting
5516 the the binary value of the address in
5517 which to begin loading this record. The
5518 order is as follows:
5520 High digit of high byte of address.
5521 Low digit of high byte of address.
5522 High digit of low byte of address.
5523 Low digit of low byte of address.
5525 In an End of File record this field con-
5526 sists of either four ascii zeros or the
5527 program entry address.
5529 Data Field - This field consists of the actual data,
5530 converted to two ascii characters, high
5531 digit first. There are no data bytes in
5532 the End of File record.
5534 Checksum Field - The checksum field is the 8 bit binary
5535 sum of the record length field, the load
5536 address field, and the data field. This
5537 sum is then complemented (1's comple-
5538 ment) and converted to two ascii
5539 characters, high digit first.
5540 \f
5554 CHAPTER 4
5556 BUILDING ASXXXX AND ASLINK
5561 The assemblers and linker have been successfully compiled for
5562 Linux, DOS, and various flavors of Windows using the Linux GCC,
5563 the Cygwin environment, the DJGPP environment, and the graphical
5564 user interfaces and command line environments of
5565 MS Visual C++ V6.0, MS Visual Studio 2005,
5566 MS Visual Studio 2010, Open Watcom V1.7, Symantec C/C++ V7.2,
5567 and Turbo C 3.0.
5569 Makefiles for Linux, Cygwin, DJGPP, project files and a
5570 makefile for Turbo C and psuedo makefiles and project files for
5571 VC6, VS2005, VS2010, Open Watcom and Symantec are available to
5572 build all the assemblers and the linker.
5574 Unpack the asxv5pxx.zip file into an appropriate directory
5575 using the utility appropriate to your environment. For DOS or
5576 Windows the following command line will unpack the distribution
5577 zip file:
5579 pkunzip -d asxv5pxx.zip
5582 The distribution file has been packed with DOS style end of
5583 lines (CR/LF), and UPPER CASE file names. The Linux make file
5584 assumes all lower case directories and file names. For Linux
5585 the unpacking utility you choose should have an option to force
5586 all lower case directories / file names and convert the ascii
5587 files to local format. On most systems the following command
5588 should do the trick:
5590 unzip -L -a asxv5pxx.zip
5592 Some systems may require a -LL option to force all lower case.
5594 The distribution will be unpacked into the base directory
5595 'asxv5pxx' which will contain source directories for each sup-
5596 ported processor (as6800, asz80, ...), the machine independent
5597 source (asxxsrc), the linker source (linksrc), and the
5598 \f
5600 BUILDING ASXXXX AND ASLINK Page 4-2
5604 miscellaneous sources (asxxmisc). Other directories include the
5605 documentation (asxdoc), test file directory (asxtst), html do-
5606 cumentation (asxhtml), NoICE support files (noice), various
5607 debug monitors that can be assembled with the ASxxxx assemblers
5608 (asmasm), project files for an application that uses the AS6809
5609 assembler and ASlink linker (project), and the packaging direc-
5610 tory (zipper).
5613 4.1 BUILDING ASXXXX AND ASLINK WITH LINUX
5616 The Linux build directory is /asxv5pxx/asxmak/linux/build.
5617 The makefile in this directory is compatible with the Linux GNU
5618 make and GCC. The command
5620 make clean
5622 will remove all the current executable files in directory
5623 /asxv5pxx/asxmak/linux/exe and all the compiled object modules
5624 from the /asxv5pxx/asxmak/linux/build directory.
5626 The command
5628 make all
5630 will compile and link all the ASxxxx assemblers, the ASlink pro-
5631 gram, and the utility programs asxscn and asxcnv. The make file
5632 can make a single program by invoking make with the specific as-
5633 sembler, linker, or utility you wish to build:
5635 make aslink
5638 4.2 BUILDING ASXXXX AND ASLINK UNDER CYGWIN
5641 The Cygwin build directory is \asxv5pxx\asxmak\cygwin\build.
5642 The makefile in this directory is compatible with the Cygwin GNU
5643 make and GCC. The command
5645 make clean
5647 will remove all the current executable files in directory
5648 \asxv5pxx\asxmak\cygwin\exe and all the compiled object modules
5649 from the \asxv5pxx\asxmak\cygwin\build directory. The command
5651 make all
5653 will compile and link all the ASxxxx assemblers, the ASlink pro-
5654 gram, and the utility programs asxscn and asxcnv. The make file
5655 can make a single program by invoking make with the specific
5656 \f
5658 BUILDING ASXXXX AND ASLINK PAGE 4-3
5659 BUILDING ASXXXX AND ASLINK UNDER CYGWIN
5662 assembler, linker, or utility you wish to build:
5664 make aslink
5667 4.3 BUILDING ASXXXX AND ASLINK WITH DJGPP
5670 The DJGPP build directory is \asxv5pxx\asxmak\djgpp\build.
5671 The makefile in this directory is compatible with the DJGPP GNU
5672 make and GCC. The command
5674 make clean
5676 will remove all the current executable files in directory
5677 \asxv5pxx\asxmak\djgpp\exe and all the compiled object modules
5678 from the \asxv5pxx\asxmak\djgpp\build directory. The command
5680 make all
5682 will compile and link all the ASxxxx assemblers, the ASlink pro-
5683 gram, and the utility programs asxscn and asxcnv. The make file
5684 can make a single program by invoking make with the specific as-
5685 sembler, linker, or utility you wish to build:
5687 make aslink
5690 4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0
5693 The Borland product is available in the Borland Turbo C++
5694 Suite which contains C++ Builder 1.0, Turbo C++ 4.5 for Windows
5695 and Turbo C++ 3.0 for DOS. The DOS IDE will install and run on
5696 x86 (16 or 32 bit) versions of Windows (not x64 versions).
5699 4.4.1 Graphical User Interface
5702 Each ASxxxx Assembler has two project specific files
5703 (*.dsk and *.prj) located in the subdirectory
5704 \asxv5pxx\asxmak\turboc30\build. You must enter the .prj
5705 filename into the Turbo C++ IDE: enter Options->Directories and
5706 change the include and output directories to match your confi-
5707 guration. After these changes have been made you will be able
5708 to compile the selected project. These changes must be manually
5709 entered for each project.
5712 \f
5714 BUILDING ASXXXX AND ASLINK PAGE 4-4
5715 BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0
5718 4.4.2 Command Line Interface
5721 Before the command line interface can be used you must per-
5722 form the steps outlined in the 'Graphical User Interface' in-
5723 structions above for each project you wish to build.
5725 Open a command prompt window in the
5726 \asxv5pxx\asxmak\turboc30\build directory. Assuming the Turbo C
5727 compiler has been installed in the default location (C:\TC) the
5728 file _setpath.bat will set the PATH variable. If this is not
5729 the case then the line
5731 PATH=C:\TC;C:\TC\BIN;C:\TC\INCLUDE
5733 must be changed to match your environment. The compiled object
5734 code modules will be placed in the
5735 \asxv5pxx\asxmak\turboc30\build\ directory and the executable
5736 files will be placed in the \asxv5pxx\asxmak\turboc30\exe direc-
5737 tory.
5741 The command
5743 make all
5745 will compile and link all the ASxxxx assemblers, the ASlink pro-
5746 gram, and the utility programs asxscn and asxcnv. The make file
5747 can make a single program by invoking make with the specific as-
5748 sembler, linker, or utility you wish to build:
5750 make aslink
5753 The Turbo C make utility uses the information in the correspond-
5754 ing .prj and .dsk files to compile and link the programs.
5756 The file _makeall.bat found in the directory can also be used
5757 to invoke the Turbo C command line compiler. The _makeall.bat
5758 file calls the _setpath.bat file to set the path to the compiler
5759 directories in the environment variable PATH and then invokes
5760 'make all'.
5763 \f
5765 BUILDING ASXXXX AND ASLINK PAGE 4-5
5766 BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.0
5769 4.5 BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.0
5773 4.5.1 Graphical User Interface
5776 Each ASxxxx Assembler has a VC6 project file (*.dsw) located
5777 in a subdirectory of \asxv5pxx\asxmak\vc6\build. Simply enter
5778 this project filename into the VC6 IDE and build/rebuild the as-
5779 sembler.
5782 4.5.2 Command Line Interface
5785 Open a command prompt window in the
5786 \asxv5pxx\asxmak\vc6\build directory. The file make.bat found
5787 in the directory can be used to invoke the VC6 command line com-
5788 piler. The make.bat file assumes that the Visual C++ compiler
5789 has been installed in the default location. If this is not the
5790 case then the line
5792 SET MS$DEV="C:\Program Files\Microsoft Visual Studio\
5793 Common\MSDev98\Bin\msdev.exe"
5795 must be changed to match your environment. The compiled object
5796 code modules will be placed in the
5797 \asxv5pxx\asxmak\vc6\build\as----\release directory and the exe-
5798 cutable files will be placed in the \asxv5pxx\asxmak\vc6\exe
5799 directory.
5803 The command
5805 make all
5807 will compile and link all the ASxxxx assemblers, the ASlink pro-
5808 gram, and the utility programs asxscn and asxcnv. The make file
5809 can make a single program by invoking make with the specific as-
5810 sembler, linker, or utility you wish to build:
5812 make aslink
5815 The VC6 command line compiler uses the information in the cor-
5816 responding .dsw/.dsp files to compile and link the programs.
5818 The command 'make clean' is not required or valid as a make
5819 of anything does a complete rebuild of the program.
5821 \f
5823 BUILDING ASXXXX AND ASLINK PAGE 4-6
5824 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2005
5827 4.6 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2005
5831 4.6.1 Graphical User Interface
5834 Each ASxxxx Assembler has a VS2005 project file (*.vcproj)
5835 located in a subdirectory of \asxv5pxx\asxmak\vs05\build. Sim-
5836 ply enter this project filename into the VS2005 IDE and
5837 build/rebuild the assembler.
5840 4.6.2 Command Line Interface
5843 Open a command prompt window in the
5844 \asxv5pxx\asxmak\vs05\build directory. The file make.bat found
5845 in the directory can be used to invoke the VS2005 command line
5846 compiler. The make.bat file assumes that the Visual C++ com-
5847 piler has been installed in the default location. If this is
5848 not the case then the line
5850 SET VC$BUILD="C:\Program Files\Microsoft Visual Studio 8\
5851 Common\MSDev98\Bin\msdev.exe"
5853 must be changed to match your environment. The compiled object
5854 code modules will be placed in the
5855 \asxv5pxx\asxmak\vs05\build\as----\release directory and the ex-
5856 ecutable files will be placed in the \asxv5pxx\asxmak\vs05\exe
5857 directory.
5861 The command
5863 make all
5865 will compile and link all the ASxxxx assemblers, the ASlink pro-
5866 gram, and the utility programs asxscn and asxcnv. The make file
5867 can make a single program by invoking make with the specific as-
5868 sembler, linker, or utility you wish to build:
5870 make aslink
5873 The VS2005 command line compiler uses the information in the
5874 corresponding .vcproj file to compile and link the programs.
5876 The command 'make clean' is not required or valid as a make
5877 of anything does a complete rebuild of the program.
5879 \f
5881 BUILDING ASXXXX AND ASLINK PAGE 4-7
5882 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2010
5885 4.7 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2010
5889 4.7.1 Graphical User Interface
5892 Each ASxxxx Assembler has a VS2010 project file (*.vcxproj)
5893 located in a subdirectory of \asxv5pxx\asxmak\vs10\build. Sim-
5894 ply enter this project filename into the VS2010 IDE and
5895 build/rebuild the assembler.
5898 4.7.2 Command Line Interface
5901 Open a command prompt window in the
5902 \asxv5pxx\asxmak\vs10\build directory. The file make.bat found
5903 in the directory can be used to invoke the VS2010 command line
5904 compiler. The make.bat file assumes that the Visual C++ com-
5905 piler has been installed in the default location. If this is
5906 not the case then the line
5908 call "c:\Program Files (x86)\Microsoft Visual Studio 10.0\
5909 VC\bin\vcvars32.bat"
5911 must be changed to match your environment. The compiled object
5912 code modules will be placed in the
5913 \asxv5pxx\asxmak\vs10\build\as----\release directory and the ex-
5914 ecutable files will be placed in the \asxv5pxx\asxmak\vs10\exe
5915 directory.
5919 The command
5921 make all
5923 will compile and link all the ASxxxx assemblers, the ASlink pro-
5924 gram, and the utility programs asxscn and asxcnv. The make file
5925 can make a single program by invoking make with the specific as-
5926 sembler, linker, or utility you wish to build:
5928 make aslink
5931 The VS2010 command line compiler uses the information in the
5932 corresponding .vcxproj file to compile and link the programs.
5934 The command 'make clean' is not required or valid as a make
5935 of anything does a complete rebuild of the program.
5937 \f
5939 BUILDING ASXXXX AND ASLINK PAGE 4-8
5940 BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
5943 4.8 BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
5947 4.8.1 Graphical User Interface
5950 Each ASxxxx Assembler has a set of project files (.prj, .tgt,
5951 .mk, .mk1, and .lk1) located in the subdirectory
5952 \asxv5pxx\asxmak\watcom\build. You will have to edit the pro-
5953 ject files to match your local file locations.
5956 4.8.2 Command Line Interface
5959 Open a command prompt window in the
5960 \asxv5pxx\asxmak\watcom\build directory. Assuming the Watcom
5961 compiler has been installed in the default location (C:\WATCOM)
5962 the file _setpath.bat will set the PATH variable. If this is
5963 not the case then the line
5965 PATH=C:\WATCOM\BINNT;C:\WATCOM\BINW
5967 must be changed to match your environment. The compiled object
5968 code modules will be placed in the
5969 \asxv5pxx\asxmak\watcom\build\ directory and the executable
5970 files will be placed in the \asxv5pxx\asxmak\watcom\exe direc-
5971 tory.
5975 The command
5977 make all
5979 will compile and link all the ASxxxx assemblers, the ASlink pro-
5980 gram, and the utility programs asxscn and asxcnv. The make file
5981 can make a single program by invoking make with the specific as-
5982 sembler, linker, or utility you wish to build:
5984 make aslink
5987 The Watcom command line compiler wmake.exe uses the information
5988 in the corresponding project files to compile and link the pro-
5989 grams.
5991 The file _makeall.bat found in the directory can also be used
5992 to invoke the Watcom command line compiler. The _makeall.bat
5993 file calls the _setpath.bat file to set the path to the compiler
5994 \f
5996 BUILDING ASXXXX AND ASLINK PAGE 4-9
5997 BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
6000 directories in the environment variable PATH and then invokes
6001 'make all'.
6003 The command 'make clean' is not required or valid as a make
6004 of anything does a complete rebuild of the program.
6007 4.9 BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2
6010 The Symantec product is no longer available but is included
6011 for historical reasons (the final version, 7.5, was introduced
6012 in 1996). The product had an excellent graphical user inter-
6013 face, built in editor, project manager, and supported DOS, Ex-
6014 tended DOS (the executable contained a built in DOS extender
6015 which was rendered unusable in Windows 2000, after service pack
6016 2, or in Windows XP), Win95, and Windows NT.
6019 4.9.1 Graphical User Interface
6022 Each ASxxxx Assembler has a series of project specific files
6023 (*.bro, *.def, *.dpd, *.lnk, *.mak, *.opn, and *.prj) located in
6024 in the subdirectory \asxv5pxx\asxmak\symantec\build. You must
6025 enter the .prj filename into the Symantec IDE and then select
6026 Project->Settings->Directories and change the include, target,
6027 and compiler output directories to match your configuration.
6028 After these changes have been made you will be able to compile
6029 the selected project. These changes must be manually entered
6030 for each project.
6033 4.9.2 Command Line Interface
6036 Before the command line interface can be used you must per-
6037 form the steps outlined in the 'Graphical User Interface' in-
6038 structions above for each project you wish to build.
6040 Open a command prompt window in the
6041 \asxv5pxx\asxmak\symantec\build directory. The file make.bat
6042 found in the directory can be used to invoke the Symantec com-
6043 mand line compiler. The make.bat file assumes that the path to
6044 the compiler directories has been set in the environment vari-
6045 able PATH. Assuming the Symantec compiler has been installed in
6046 the default location (C:\SC) the file _setpath.bat will set the
6047 PATH variable. If this is not the case then the line
6049 PATH=C:\SC;C:\SC\BIN;C:\SC\INCLUDE;C:\SC\LIB
6051 must be changed to match your environment. The compiled object
6052 \f
6054 BUILDING ASXXXX AND ASLINK PAGE 4-10
6055 BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2
6058 code modules will be placed in the
6059 \asxv5pxx\asxmak\symantec\build directory and the executable
6060 files will be placed in the \asxv5pxx\asxmak\symantec\exe direc-
6061 tory.
6065 The command
6067 make all
6069 will compile and link all the ASxxxx assemblers, the ASlink pro-
6070 gram, and the utility programs asxscn and asxcnv. The make file
6071 can make a single program by invoking make with the specific as-
6072 sembler, linker, or utility you wish to build:
6074 make aslink
6077 The Symantec make utility , smake.exe, uses the information in
6078 the corresponding .mak files to compile and link the programs.
6080 The file _makeall.bat found in the directory can also be used
6081 to invoke the Symantec command line compiler. The _makeall.bat
6082 file calls the _setpath.bat file to set the path to the compiler
6083 directories in the environment variable PATH and then invokes
6084 'make all'.
6087 4.10 THE _CLEAN.BAT AND _PREP.BAT FILES
6090 Each of the build directories have two maintenance files:
6091 _prep.bat and _clean.bat. The command file _prep.bat prepares
6092 the particular compiler directories for distribution by removing
6093 all exteraneous files but keeping the final compiled execut-
6094 ables. The _clean.bat command file performs the same function
6095 as _prep.bat and removes the compiled executables.
6096 \f
6110 APPENDIX AK
6112 AS68(HC[S])08 ASSEMBLER
6118 AK.1 PROCESSOR SPECIFIC DIRECTIVES
6121 The MC68HC(S)08 processor is a superset of the MC6805 proces-
6122 sors. The AS6808 assembler supports the HC08, HCS08, 6805, and
6123 HC05 cores.
6126 AK.1.1 .hc08 Directive
6128 Format:
6130 .hc08
6132 The .hc08 directive enables processing of only the HC08 specific
6133 mnemonics. 6805/HC05/HCS08 mnemonics encountered without the
6134 .hc08 directive will be flagged with an 'o' error.
6136 The .hc08 directive also selects the HC08 specific cycles
6137 count to be output.
6140 AK.1.2 .hcs08 Directive
6142 Format:
6144 .hcs08
6146 The .hcs08 directive enables processing of the HCS08 specific
6147 mnemonics.
6149 The .hcs08 directive also selects the HCS08 specific cycles
6150 count to be output.
6153 \f
6155 AS68(HC[S])08 ASSEMBLER PAGE AK-2
6156 PROCESSOR SPECIFIC DIRECTIVES
6159 AK.1.3 .6805 Directive
6161 Format:
6163 .6805
6165 The .6805 directive enables processing of only the 6805/HC05
6166 specific mnemonics. HC08/HCS08 mnemonics encountered without
6167 the .hc08/.hcs08 directives will be flagged with an 'o' error.
6169 The .6805 directive also selects the MC6805 specific cycles
6170 count to be output.
6173 AK.1.4 .hc05 Directive
6175 Format:
6177 .hc05
6179 The .hc05 directive enables processing of only the 6805/HC05
6180 specific mnemonics. HC08/HCS08 mnemonics encountered without
6181 the .hc08/.hcs08 directives will be flagged with an 'o' error.
6183 The .hc05 directive also selects the MC68HC05/146805 specific
6184 cycles count to be output.
6187 AK.1.5 The .__.CPU. Variable
6190 The value of the pre-defined symbol '.__.CPU.' corresponds to
6191 the selected processor type. The default value is 0 which cor-
6192 responds to the default processor type. The following table
6193 lists the processor types and associated values for the AS6808
6194 assembler:
6196 Processor Type .__.CPU. Value
6197 -------------- --------------
6198 .hc08 0
6199 .hcs08 1
6200 .6805 2
6201 .hc05 3
6204 The variable '.__.CPU.' is by default defined as local and
6205 will not be output to the created .rel file. The assembler com-
6206 mand line options -g or -a will not cause the local symbol to be
6207 output to the created .rel file.
6209 The assembler .globl directive may be used to change the
6210 variable type to global causing its definition to be output to
6211 \f
6213 AS68(HC[S])08 ASSEMBLER PAGE AK-3
6214 PROCESSOR SPECIFIC DIRECTIVES
6217 the .rel file. The inclusion of the definition of the variable
6218 '.__.CPU.' might be a useful means of validating that seperately
6219 assembled files have been compiled for the same processor type.
6220 The linker will report an error for variables with multiple non
6221 equal definitions.
6224 AK.2 68HC(S)08 REGISTER SET
6226 The following is a list of the 68HC(S)08 registers used by
6227 AS6808:
6229 a - 8-bit accumulator
6230 x - index register <H:X>
6231 s - stack pointer
6234 AK.3 68HC(S)08 INSTRUCTION SET
6237 The following tables list all 68HC(S)08 mnemonics recognized
6238 by the AS6808 assembler. The designation [] refers to a re-
6239 quired addressing mode argument. The following list specifies
6240 the format for each addressing mode supported by AS6808:
6242 #data immediate data
6243 byte or word data
6245 *dir direct page addressing
6246 (see .setdp directive)
6247 0 <= dir <= 255
6249 ,x register indexed addressing
6250 zero offset
6252 offset,x register indexed addressing
6253 0 <= offset <= 255 --- byte mode
6254 256 <= offset <= 65535 --- word mode
6255 (an externally defined offset uses the
6256 word mode)
6258 ,x+ register indexed addressing
6259 zero offset with post increment
6261 offset,x+ register indexed addressing
6262 unsigned byte offset with post increment
6264 offset,s stack pointer indexed addressing
6265 0 <= offset <= 255 --- byte mode
6266 256 <= offset <= 65535 --- word mode
6267 (an externally defined offset uses the
6268 word mode)
6269 \f
6271 AS68(HC[S])08 ASSEMBLER PAGE AK-4
6272 68HC(S)08 INSTRUCTION SET
6276 ext extended addressing
6278 label branch label
6280 The terms data, dir, offset, and ext may all be expressions.
6282 Note that not all addressing modes are valid with every in-
6283 struction, refer to the 68HC(S)08 technical data for valid
6284 modes.
6287 AK.3.1 Control Instructions
6289 clc cli daa div
6290 mul nop nsa psha
6291 pshh pshx pula pulh
6292 pulx rsp rti rts
6293 sec sei stop swi
6294 tap tax tpa tsx
6295 txa txs wait
6298 AK.3.2 Bit Manipulation Instructions
6300 brset #data,*dir,label
6301 brclr #data,*dir,label
6303 bset #data,*dir
6304 bclr #data,*dir
6307 AK.3.3 Branch Instructions
6309 bra label brn label
6310 bhi label bls label
6311 bcc label bcs label
6312 bne label beq label
6313 bhcc label bhcs label
6314 bpl label bmi label
6315 bmc label bms label
6316 bil label bih label
6317 bsr label bge label
6318 blt label bgt label
6319 ble label
6320 \f
6322 AS68(HC[S])08 ASSEMBLER PAGE AK-5
6323 68HC(S)08 INSTRUCTION SET
6326 AK.3.4 Complex Branch Instructions
6328 cbeqa [],label
6329 cbeqx [],label
6330 cbeq [],label
6331 dbnza label
6332 dbnzx label
6333 dbnz [],label
6336 AK.3.5 Read-Modify-Write Instructions
6338 nega negx
6339 neg []
6341 coma comx
6342 com []
6344 lsra lsrx
6345 lsr []
6347 rora rorx
6348 ror []
6350 asra asrx
6351 asr []
6353 asla aslx
6354 asl []
6356 lsla lslx
6357 lsl []
6359 rola rolx
6360 rol []
6362 deca decx
6363 dec []
6365 inca incx
6366 inc []
6368 tsta tstx
6369 tst []
6371 clra clrx
6372 clr [] clrh
6374 aix #data
6376 ais #data
6377 \f
6379 AS68(HC[S])08 ASSEMBLER PAGE AK-6
6380 68HC(S)08 INSTRUCTION SET
6383 AK.3.6 Register\Memory Instructions
6385 sub [] cmp []
6386 sbc [] cpx []
6387 and [] bit []
6388 lda [] sta []
6389 eor [] adc []
6390 ora [] add []
6391 ldx [] stx []
6394 AK.3.7 Double Operand Move Instruction
6396 mov [],[]
6399 AK.3.8 16-Bit <H:X> Index Register Instructions
6401 cphx []
6402 ldhx []
6403 sthx []
6406 AK.3.9 Jump and Jump to Subroutine Instructions
6408 jmp [] jsr []
6409 \f
6423 APPENDIX AR
6425 AS8051 ASSEMBLER
6431 AR.1 ACKNOWLEDGMENT
6434 Thanks to John Hartman for his contribution of the AS8051
6435 cross assembler.
6437 John L. Hartman
6438 jhartman at compuserve dot com
6439 noice at noicedebugger dot com
6442 AR.2 8051 REGISTER SET
6444 The following is a list of the 8051 registers used by AS8051:
6446 a,b - 8-bit accumulators
6447 r0,r1,r2,r3 - 8-bit registers
6448 r4,r5,r6,r7
6449 dptr - data pointer
6450 sp - stack pointer
6451 pc - program counter
6452 psw - status word
6453 c - carry (bit in status word)
6454 \f
6456 AS8051 ASSEMBLER PAGE AR-2
6457 8051 REGISTER SET
6460 AR.3 8051 INSTRUCTION SET
6463 The following tables list all 8051 mnemonics recognized by
6464 the AS8051 assembler. The following list specifies the format
6465 for each addressing mode supported by AS8051:
6467 #data immediate data
6468 byte or word data
6470 r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
6472 @r indirect on register r0 or r1
6473 @dptr indirect on data pointer
6474 @a+dptr indirect on accumulator
6475 plus data pointer
6476 @a+pc indirect on accumulator
6477 plus program counter
6479 addr direct memory address
6481 bitaddr bit address
6483 label call or jump label
6485 The terms data, addr, bitaddr, and label may all be expressions.
6487 Note that not all addressing modes are valid with every in-
6488 struction. Refer to the 8051 technical data for valid modes.
6491 AR.3.1 Inherent Instructions
6493 nop
6494 \f
6496 AS8051 ASSEMBLER PAGE AR-3
6497 8051 INSTRUCTION SET
6500 AR.3.2 Move Instructions
6502 mov a,#data mov a,addr
6503 mov a,r mov a,@r
6505 mov r,#data mov r,addr
6506 mov r,a
6508 mov addr,a mov addr,#data
6509 mov addr,r mov addr,@r
6510 mov addr1,addr2 mov bitaddr,c
6512 mov @r,#data mov @r,addr
6513 mov @r,a
6515 mov c,bitaddr
6516 mov dptr,#data
6518 movc a,@a+dptr movc a,@a+pc
6519 movx a,@dptr movx a,@r
6520 movx @dptr,a movx @r,a
6523 AR.3.3 Single Operand Instructions
6525 clr a clr c
6526 clr bitaddr
6527 cpl a cpl c
6528 cpl bitaddr
6529 setb c setb bitaddr
6531 da a
6532 rr a rrc a
6533 rl a rlc a
6534 swap a
6536 dec a dec r
6537 dec @r
6538 inc a inc r
6539 inc dptr inc @r
6541 div ab mul ab
6543 pop addr push addr
6544 \f
6546 AS8051 ASSEMBLER PAGE AR-4
6547 8051 INSTRUCTION SET
6550 AR.3.4 Two Operand Instructions
6552 add a,#data add a,addr
6553 add a,r add a,@r
6554 addc a,#data addc a,addr
6555 addc a,r addc a,@r
6556 subb a,#data subb a,addr
6557 subb a,r subb a,@r
6558 orl a,#data orl a,addr
6559 orl a,r orl a,@r
6560 orl addr,a orl addr,#data
6561 orl c,bitaddr orl c,/bitaddr
6562 anl a,#data anl a,addr
6563 anl a,r anl a,@r
6564 anl addr,a anl addr,#data
6565 anl c,bitaddr anl c,/bitaddr
6566 xrl a,#data xrl a,addr
6567 xrl a,r xrl a,@r
6568 xrl addr,a xrl addr,#data
6569 xrl c,bitaddr xrl c,/bitaddr
6570 xch a,addr xch a,r
6571 xch a,@r xchd a,@r
6574 AR.3.5 Call and Return Instructions
6576 acall label lcall label
6577 ret reti
6578 in data
6579 out data
6580 rst data
6583 AR.3.6 Jump Instructions
6585 ajmp label
6586 cjne a,#data,label cjne a,addr,label
6587 cjne r,#data,label cjne @r,#data,label
6588 djnz r,label djnz addr,label
6589 jbc bitadr,label
6590 jb bitadr,label jnb bitadr,label
6591 jc label jnc label
6592 jz label jnz label
6593 jmp @a+dptr
6594 ljmp label sjmp label
6595 \f
6597 AS8051 ASSEMBLER PAGE AR-5
6598 8051 INSTRUCTION SET
6601 AR.3.7 Predefined Symbols: SFR Map
6603 --------- 4 Bytes ----------
6604 ---- ---- ---- ----
6605 FC FF
6606 F8 FB
6607 F4 F7
6608 F0 B F3
6609 EC EF
6610 E8 EB
6611 E4 E7
6612 E0 ACC E3
6613 DC DF
6614 D8 DB
6615 D4 D7
6616 D0 PSW D3
6617 CC [ TL2 TH2 ] CF
6618 C8 [ T2CON RCAP2L RCAP2H ] CB
6619 C4 C7
6620 C0 C3
6621 BC BF
6622 B8 IP BB
6623 B4 B7
6624 B0 P3 B3
6625 AC AF
6626 A8 IE AB
6627 A4 A7
6628 A0 P2 A3
6629 9C 9F
6630 98 SCON SBUF 9B
6631 94 97
6632 90 P1 93
6633 8C TH0 TH1 8F
6634 88 TCON TMOD TL0 TL1 8B
6635 84 PCON 87
6636 80 P0 SP DPL DPH 83
6638 [...] Indicates Resident in 8052, not 8051
6639 A is an allowed alternate for ACC.
6640 \f
6642 AS8051 ASSEMBLER PAGE AR-6
6643 8051 INSTRUCTION SET
6646 AR.3.8 Predefined Symbols: SFR Bit Addresses
6648 ---------- 4 BITS ----------
6649 ---- ---- ---- ----
6650 FC FF
6651 F8 FB
6652 F4 B.4 B.5 B.6 B.7 F7
6653 F0 B.0 B.1 B.2 B.3 F3
6654 EC EF
6655 E8 EB
6656 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
6657 E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
6658 DC DF
6659 D8 DB
6660 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
6661 D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
6662 CC [ T2CON.4 T2CON.5 T2CON.6 T2CON.7 ] CF
6663 C8 [ T2CON.0 T2CON.1 T2CON.2 T2CON.3 ] CB
6664 C4 C7
6665 C0 C3
6666 BC IP.4 IP.5 IP.6 IP.7 BF
6667 B8 IP.0 IP.1 IP.2 IP.3 BB
6668 B4 P3.4 P3.5 P3.6 P3.7 B7
6669 B0 P3.0 P3.1 P3.2 P3.3 B3
6670 AC IE.4 IE.5 EI.6 IE.7 AF
6671 A8 IE.0 IE.1 IE.2 IE.3 AB
6672 A4 P2.4 P2.5 P2.6 P2.7 A7
6673 A0 P2.0 P2.1 P2.2 P2.3 A3
6674 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
6675 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
6676 94 P1.4 P1.5 P1.6 P1.7 97
6677 90 P1.0 P1.1 P1.2 P1.3 93
6678 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
6679 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
6680 84 P0.4 P0.5 P0.6 P0.7 87
6681 80 P0.0 P0.1 P0.2 P0.3 83
6683 [...] Indicates Resident in 8052, not 8051
6684 A is an allowed alternate for ACC.
6685 \f
6687 AS8051 ASSEMBLER PAGE AR-7
6688 8051 INSTRUCTION SET
6691 AR.3.9 Predefined Symbols: Control Bits
6693 ---------- 4 BITS ----------
6694 ---- ---- ---- ----
6695 FC FF
6696 F8 FB
6697 F4 F7
6698 F0 F3
6699 EC EF
6700 E8 EB
6701 E4 E7
6702 E0 E3
6703 DC DF
6704 D8 DB
6705 D4 RS1 F0 AC CY D7
6706 D0 P OV RS0 D3
6707 CC [ TLCK RCLK EXF2 TF2 ] CF
6708 C8 [ CPRL2 CT2 TR2 EXEN2 ] CB
6709 C4 C7
6710 C0 C3
6711 BC PS PT2 BF
6712 B8 PX0 PT0 PX1 PT1 BB
6713 B4 B7
6714 B0 RXD TXD INT0 INT1 B3
6715 AC ES ET2 EA AF
6716 A8 EX0 ET0 EX1 ET1 AB
6717 A4 A7
6718 A0 A3
6719 9C REN SM2 SM1 SM0 9F
6720 98 RI TI RB8 TB8 9B
6721 94 97
6722 90 93
6723 8C TR0 TF0 TR1 TF1 8F
6724 88 IT0 IE0 IT1 IE1 8B
6725 84 87
6726 80 83
6728 [...] Indicates Resident in 8052, not 8051
6729 \f
6743 APPENDIX AT
6745 AS8XCXXX ASSEMBLER
6751 AT.1 ACKNOWLEDGMENTS
6754 Thanks to Bill McKinnon for his contributions to the AS8XCXXX
6755 cross assembler.
6757 Bill McKinnon
6758 w_mckinnon at conknet dot com
6760 This assembler was derived from the AS8051 cross assembler
6761 contributed by John Hartman.
6763 John L. Hartman
6764 jhartman at compuserve dot com
6765 noice at noicedebugger dot com
6768 AT.2 AS8XCXXX ASSEMBLER DIRECTIVES
6772 AT.2.1 Processor Selection Directives
6775 The AS8XCXXX assembler contains directives to specify the
6776 processor core SFR (Special Function Registers) and enable the
6777 SFR Bit Register values during the assembly process. The fol-
6778 lowing directives are supported:
6780 .DS8XCXXX ;80C32 core
6781 .DS80C310 ;Dallas Semiconductor
6782 .DS80C320 ;Microprocessors
6783 .DS80C323
6784 .DS80C390
6785 .DS83C520
6786 .DS83C530
6787 \f
6789 AS8XCXXX ASSEMBLER PAGE AT-2
6790 AS8XCXXX ASSEMBLER DIRECTIVES
6793 .DS83C550
6794 .DS87C520
6795 .DS87C530
6796 .DS87C550
6798 The invocation of one of the processor directives creates a pro-
6799 cessor specific symbol and an SFR-Bits symbol. For example the
6800 directive
6802 .DS80C390
6804 creates the global symbols '__DS80C390' and '__SFR_BITS' each
6805 with a value of 1. If the microprocessor core selection direc-
6806 tive is followed by an optional argument then the symbol
6807 '__SFR_BITS' is given the value of the argument. The file
6808 DS8XCXXX.SFR contains the SFR and SFR register bit values for
6809 all the microprocessor selector directives. This file may be
6810 modified to create a new SFR for other microprocessor types.
6812 If a microprocessor selection directive is not specified then
6813 no processor symbols will be defined. This mode allows the SFR
6814 and SFR register bit values to be defined by the assembly source
6815 file.
6818 AT.2.2 .cpu Directive
6821 The .cpu directive is similar to the processor selection
6822 directives. This directive defines a new processor type and
6823 creates a user defined symbol:
6825 .cpu "CP84C331" 2
6827 creates the symbol '__CP84C331' with a value of 1 and the
6828 symbol '__SFR_BITS' with a value of 2. These values can be used
6829 to select the processor SFR and SFR register bits from an in-
6830 clude file. If the optional final argument, 2, is omitted then
6831 the value of the symbol '__SFR_BITS' is 1.
6834 \f
6836 AS8XCXXX ASSEMBLER PAGE AT-3
6837 AS8XCXXX ASSEMBLER DIRECTIVES
6840 AT.2.3 Processor Addressing Range Directives
6843 If one of the .DS8... microprocessor selection directives is
6844 not specified then the following address range assembler direc-
6845 tives are accepted:
6847 .16bit ;16-Bit Addressing
6848 .24bit ;24-Bit Addressing
6849 .32bit ;32-Bit Addressing
6851 These directives specify the assembler addressing space and ef-
6852 fect the output format for the .lst, .sym, and .rel files.
6854 The default addressing space for defined microprocessors is
6855 16-Bit except for the DS80C390 microprocessor which is 24-Bit.
6857 The .cpu directive defaults to the 16-Bit addressing range
6858 but this can be changed using these directives.
6861 AT.2.4 The .__.CPU. Variable
6864 The value of the pre-defined symbol '.__.CPU.' corresponds to
6865 the selected processor type. The default value is 0 which cor-
6866 responds to the default processor type. The following table
6867 lists the processor types and associated values for the AS8XCXXX
6868 assembler:
6870 Processor Type .__.CPU. Value
6871 -------------- --------------
6872 .cpu 0
6874 .DS8XCXXX 1
6875 .DS80C310 2
6876 .DS80C320 3
6877 .DS80C323 4
6878 .DS80C390 5
6879 .DS83C520 6
6880 .DS83C530 7
6881 .DS83C550 8
6882 .DS87C520 9
6883 .DS87C530 10
6884 .DS87C550 11
6887 The variable '.__.CPU.' is by default defined as local and
6888 will not be output to the created .rel file. The assembler com-
6889 mand line options -g or -a will not cause the local symbol to be
6890 output to the created .rel file.
6892 \f
6894 AS8XCXXX ASSEMBLER PAGE AT-4
6895 AS8XCXXX ASSEMBLER DIRECTIVES
6898 The assembler .globl directive may be used to change the
6899 variable type to global causing its definition to be output to
6900 the .rel file. The inclusion of the definition of the variable
6901 '.__.CPU.' might be a useful means of validating that seperately
6902 assembled files have been compiled for the same processor type.
6903 The linker will report an error for variables with multiple non
6904 equal definitions.
6907 AT.2.5 DS80C390 Addressing Mode Directive
6910 The DS80C390 microprocessor supports 16-Bit and 24-Bit ad-
6911 dressing modes. The .amode assembler directive provides a
6912 method to select the addressing mode used by the ajmp, acall,
6913 ljmp, and lcall instructions. These four instructions support
6914 16 and 24 bit addressing modes selected by bits AM0 and AM1 in
6915 the ACON register. The assembler is 'informed' about the ad-
6916 dressing mode selected by using the .amode directive:
6918 .amode 2 ;mode 2 is 24-bit addressing
6920 If a second argument is specified and its value is non-zero,
6921 then a three instruction sequence is inserted at the .amode lo-
6922 cation loading the mode bits into the ACON register:
6924 .amode 2,1 ;mode 2 is 24-bit addressing, load ACON
6925 ;mov ta,#0xAA
6926 ;mov ta,#0x55
6927 ;mov acon,#amode
6931 AT.2.6 The .msb Directive
6934 The .msb directive is available in the AS8XCXXX assembler.
6936 The assembler operator '>' selects the upper byte (MSB) when
6937 included in an assembler instruction. The default assembler
6938 mode is to select bits <15:8> as the MSB. The .msb directive
6939 allows the programmer to specify a particular byte as the 'MSB'
6940 when the address space is larger than 16-bits.
6942 The assembler directive .msb n configures the assembler to
6943 select a particular byte as MSB. Given a 24-bit address of Nmn
6944 (N(2) is <23:16>, m(1) is <15:8>, and n(0) is <7:0>) the follow-
6945 ing examples show how to select a particular address byte:
6947 .msb 1 ;select byte 1 of address
6948 ;<M(3):N(2):m(1):n(0)>
6949 LD A,>MNmn ;byte m <15:8> ==>> A
6950 \f
6952 AS8XCXXX ASSEMBLER PAGE AT-5
6953 AS8XCXXX ASSEMBLER DIRECTIVES
6956 ...
6958 .msb 2 ;select byte 2 of address
6959 ;<M(3):N(2):m(1):n(0)>
6960 LD A,>MNmn ;byte N <23:16> ==>> A
6961 ...
6962 \f
6964 AS8XCXXX ASSEMBLER PAGE AT-6
6965 AS8XCXXX ASSEMBLER DIRECTIVES
6968 AT.3 DS8XCXXX REGISTER SET
6970 The AS8XCXXX cross assembler supports the Dallas Semiconductor
6971 DS8XCXXX series of 8051-compatible devices. These microproces-
6972 sors retain instruction set and object code compatability with
6973 the 8051 microprocessor. The DS8XCXXX family is updated with
6974 several new peripherals while providing all the standard
6975 features of the 80C32 microprocessor.
6977 The following is a list of the registers used by AS8XCXXX:
6979 a,b - 8-bit accumulators
6980 r0,r1,r2,r3 - 8-bit registers
6981 r4,r5,r6,r7
6982 dptr - data pointer
6983 sp - stack pointer
6984 pc - program counter
6985 psw - status word
6986 c - carry (bit in status word)
6989 AT.4 DS8XCXXX INSTRUCTION SET
6992 The following tables list all DS8XCXXX mnemonics recognized
6993 by the AS8XCXXX assembler. The following list specifies the
6994 format for each addressing mode supported by AS8XCXXX:
6996 #data immediate data
6997 byte or word data
6999 r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
7001 @r indirect on register r0 or r1
7002 @dptr indirect on data pointer
7003 @a+dptr indirect on accumulator
7004 plus data pointer
7005 @a+pc indirect on accumulator
7006 plus program counter
7008 addr direct memory address
7010 bitaddr bit address
7012 label call or jump label
7014 The terms data, addr, bitaddr, and label may all be expressions.
7016 Note that not all addressing modes are valid with every in-
7017 struction. Refer to the DS8XCXXX technical data for valid
7018 modes.
7019 \f
7021 AS8XCXXX ASSEMBLER PAGE AT-7
7022 DS8XCXXX INSTRUCTION SET
7025 AT.4.1 Inherent Instructions
7027 nop
7030 AT.4.2 Move Instructions
7032 mov a,#data mov a,addr
7033 mov a,r mov a,@r
7035 mov r,#data mov r,addr
7036 mov r,a
7038 mov addr,a mov addr,#data
7039 mov addr,r mov addr,@r
7040 mov addr1,addr2 mov bitaddr,c
7042 mov @r,#data mov @r,addr
7043 mov @r,a
7045 mov c,bitaddr
7046 mov dptr,#data
7048 movc a,@a+dptr movc a,@a+pc
7049 movx a,@dptr movx a,@r
7050 movx @dptr,a movx @r,a
7053 AT.4.3 Single Operand Instructions
7055 clr a clr c
7056 clr bitaddr
7057 cpl a cpl c
7058 cpl bitaddr
7059 setb c setb bitaddr
7061 da a
7062 rr a rrc a
7063 rl a rlc a
7064 swap a
7066 dec a dec r
7067 dec @r
7068 inc a inc r
7069 inc dptr inc @r
7071 div ab mul ab
7073 pop addr push addr
7074 \f
7076 AS8XCXXX ASSEMBLER PAGE AT-8
7077 DS8XCXXX INSTRUCTION SET
7080 AT.4.4 Two Operand Instructions
7082 add a,#data add a,addr
7083 add a,r add a,@r
7084 addc a,#data addc a,addr
7085 addc a,r addc a,@r
7086 subb a,#data subb a,addr
7087 subb a,r subb a,@r
7088 orl a,#data orl a,addr
7089 orl a,r orl a,@r
7090 orl addr,a orl addr,#data
7091 orl c,bitaddr orl c,/bitaddr
7092 anl a,#data anl a,addr
7093 anl a,r anl a,@r
7094 anl addr,a anl addr,#data
7095 anl c,bitaddr anl c,/bitaddr
7096 xrl a,#data xrl a,addr
7097 xrl a,r xrl a,@r
7098 xrl addr,a xrl addr,#data
7099 xrl c,bitaddr xrl c,/bitaddr
7100 xch a,addr xch a,r
7101 xch a,@r xchd a,@r
7104 AT.4.5 Call and Return Instructions
7106 acall label lcall label
7107 ret reti
7108 in data
7109 out data
7110 rst data
7113 AT.4.6 Jump Instructions
7115 ajmp label
7116 cjne a,#data,label cjne a,addr,label
7117 cjne r,#data,label cjne @r,#data,label
7118 djnz r,label djnz addr,label
7119 jbc bitadr,label
7120 jb bitadr,label jnb bitadr,label
7121 jc label jnc label
7122 jz label jnz label
7123 jmp @a+dptr
7124 ljmp label sjmp label
7125 \f
7127 AS8XCXXX ASSEMBLER PAGE AT-9
7128 DS8XCXXX INSTRUCTION SET
7131 AT.5 DS8XCXXX SPECIAL FUNCTION REGISTERS
7134 The 80C32 core Special Function Registers are selected using
7135 the .DS8XCXXX assembler directive.
7138 AT.5.1 SFR Map
7140 --------- 4 Bytes ----------
7141 ---- ---- ---- ----
7142 80 SP DPL DPH 83
7143 84 PCON 87
7144 88 TCON TMOD TL0 TL1 8B
7145 8C TH0 TH1 8F
7146 90 P1 93
7147 94 97
7148 98 SCON SBUF 9B
7149 9C 9F
7150 A0 P2 A3
7151 A4 A7
7152 A8 IE SADDR0 AB
7153 AC AF
7154 B0 P3 B3
7155 B4 B7
7156 B8 IP SADEN0 BB
7157 BC BF
7158 C0 C3
7159 C4 STATUS C7
7160 C8 T2CON T2MOD RCAP2L RCAP2H CB
7161 CC TL2 TH2 CF
7162 D0 PSW D3
7163 D4 D7
7164 D8 DB
7165 DC DF
7166 E0 ACC E3
7167 E4 E7
7168 E8 EB
7169 EC EF
7170 F0 B F3
7171 F4 F7
7172 F8 FB
7173 FC FF
7174 \f
7176 AS8XCXXX ASSEMBLER PAGE AT-10
7177 DS8XCXXX SPECIAL FUNCTION REGISTERS
7180 AT.5.2 Bit Addressable Registers: Generic
7182 ---------- 4 BITS ----------
7183 ---- ---- ---- ----
7184 80 83
7185 84 87
7186 TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
7187 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
7188 P1 90 P1.0 P1.1 P1.2 P1.3 93
7189 94 P1.4 P1.5 P1.6 P1.7 97
7190 SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
7191 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
7192 P2 A0 P2.0 P2.1 P2.2 P2.3 A3
7193 A4 P2.4 P2.5 P2.6 P2.7 A7
7194 IE A8 IE.0 IE.1 IE.2 IE.3 AB
7195 AC IE.4 IE.5 EI.6 IE.7 AF
7196 P3 B0 P3.0 P3.1 P3.2 P3.3 B3
7197 B4 P3.4 P3.5 P3.6 P3.7 B7
7198 IP B8 IP.0 IP.1 IP.2 IP.3 BB
7199 BC IP.4 IP.5 IP.6 IP.7 BF
7200 C0 C3
7201 C4 C7
7202 T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
7203 CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
7204 PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
7205 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
7206 D8 DB
7207 DC DF
7208 ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
7209 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
7210 E8 EB
7211 EC EF
7212 B F0 B.0 B.1 B.2 B.3 F3
7213 F4 B.4 B.5 B.6 B.7 F7
7214 F8 FB
7215 FC FF
7216 \f
7218 AS8XCXXX ASSEMBLER PAGE AT-11
7219 DS8XCXXX SPECIAL FUNCTION REGISTERS
7222 AT.5.3 Bit Addressable Registers: Specific
7224 ---------- 4 BITS ----------
7225 ---- ---- ---- ----
7226 80 83
7227 84 87
7228 TCON 88 IT0 IE0 IT1 IE1 8B
7229 8C TR0 TF0 TR1 TF1 8F
7230 90 93
7231 94 97
7232 SCON 98 RI TI RB8 TB8 9B
7233 9C REN SM2 SM1 SMO 9F
7234 A0 A3
7235 A4 A7
7236 IE A8 EX0 ET0 EX1 ET1 AB
7237 AC ES0 ET2 EA AF
7238 B0 B3
7239 B4 B7
7240 IP B8 PX0 PT0 PX1 PT1 BB
7241 BC PS0 PT2 BF
7242 C0 C3
7243 C4 C7
7244 T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
7245 CC TCLK RCLK EXF2 TF2 CF
7246 PSW D0 P FL OV RS0 D3
7247 D4 RS1 F0 AC CY D7
7248 D8 DB
7249 DC DF
7250 E0 E3
7251 E4 E7
7252 E8 EB
7253 EC EF
7254 F0 F3
7255 F4 F7
7256 F8 FB
7257 FC FF
7259 Alternates:
7261 SCON 98 9B
7262 9C FE 9F
7263 T2CON C8 CP_RL2 C_T2 CB
7264 CC CF
7265 \f
7267 AS8XCXXX ASSEMBLER PAGE AT-12
7268 DS8XCXXX SPECIAL FUNCTION REGISTERS
7271 AT.5.4 Optional Symbols: Control Bits
7273 ---------- 4 BITS ----------
7274 ---- ---- ---- ----
7275 0x80 0x40 0x20 0x10
7276 0x08 0x04 0x02 0x10
7277 ---- ---- ---- ----
7278 PCON 0x80 SMOD SMOD0 0x10
7279 0x08 GF1 GF0 STOP IDLE 0x01
7280 TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
7281 0x08 T0GATE T0C_T T0M1 T0M0 0x01
7282 STATUS 0x80 HIP LIP 0x10
7283 0x08 0x01
7284 T2MOD 0x80 0x10
7285 0x08 T2OE DCEN 0x01
7286 \f
7288 AS8XCXXX ASSEMBLER PAGE AT-13
7289 DS8XCXXX SPECIAL FUNCTION REGISTERS
7292 AT.6 DS80C310 SPECIAL FUNCTION REGISTERS
7295 The DS80C310 Special Function Registers are selected using
7296 the .DS80C310 assembler directive.
7299 AT.6.1 SFR Map
7301 --------- 4 Bytes ----------
7302 ---- ---- ---- ----
7303 80 SP DPL DPH 83
7304 84 DPL1 DPH1 DPS PCON 87
7305 88 TCON TMOD TL0 TL1 8B
7306 8C TH0 TH1 CKCON 8F
7307 90 P1 EXIF 93
7308 94 97
7309 98 SCON SBUF 9B
7310 9C 9F
7311 A0 P2 A3
7312 A4 A7
7313 A8 IE SADDR0 AB
7314 AC AF
7315 B0 P3 B3
7316 B4 B7
7317 B8 IP SADEN0 BB
7318 BC BF
7319 C0 C3
7320 C4 STATUS C7
7321 C8 T2CON T2MOD RCAP2L RCAP2H CB
7322 CC TL2 TH2 CF
7323 D0 PSW D3
7324 D4 D7
7325 D8 WDCON DB
7326 DC DF
7327 E0 ACC E3
7328 E4 E7
7329 E8 EIE EB
7330 EC EF
7331 F0 B F3
7332 F4 F7
7333 F8 EIP FB
7334 FC FF
7335 \f
7337 AS8XCXXX ASSEMBLER PAGE AT-14
7338 DS80C310 SPECIAL FUNCTION REGISTERS
7341 AT.6.2 Bit Addressable Registers: Generic
7343 ---------- 4 BITS ----------
7344 ---- ---- ---- ----
7345 80 83
7346 84 87
7347 TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
7348 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
7349 P1 90 P1.0 P1.1 P1.2 P1.3 93
7350 94 P1.4 P1.5 P1.6 P1.7 97
7351 SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
7352 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
7353 P2 A0 P2.0 P2.1 P2.2 P2.3 A3
7354 A4 P2.4 P2.5 P2.6 P2.7 A7
7355 IE A8 IE.0 IE.1 IE.2 IE.3 AB
7356 AC IE.4 IE.5 EI.6 IE.7 AF
7357 P3 B0 P3.0 P3.1 P3.2 P3.3 B3
7358 B4 P3.4 P3.5 P3.6 P3.7 B7
7359 IP B8 IP.0 IP.1 IP.2 IP.3 BB
7360 BC IP.4 IP.5 IP.6 IP.7 BF
7361 C0 C3
7362 C4 C7
7363 T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
7364 CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
7365 PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
7366 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
7367 WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
7368 DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
7369 ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
7370 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
7371 EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
7372 EC EIE.4 EIE.5 EIE.6 EIE.7 EF
7373 B F0 B.0 B.1 B.2 B.3 F3
7374 F4 B.4 B.5 B.6 B.7 F7
7375 EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
7376 FC EIP.4 EIP.5 EIP.6 EIP.7 FF
7377 \f
7379 AS8XCXXX ASSEMBLER PAGE AT-15
7380 DS80C310 SPECIAL FUNCTION REGISTERS
7383 AT.6.3 Bit Addressable Registers: Specific
7385 ---------- 4 BITS ----------
7386 ---- ---- ---- ----
7387 80 83
7388 84 87
7389 TCON 88 IT0 IE0 IT1 IE1 8B
7390 8C TR0 TF0 TR1 TF1 8F
7391 90 93
7392 94 97
7393 SCON 98 RI TI RB8 TB8 9B
7394 9C REN SM2 SM1 SMO 9F
7395 A0 A3
7396 A4 A7
7397 IE A8 EX0 ET0 EX1 ET1 AB
7398 AC ES0 ET2 EA AF
7399 B0 B3
7400 B4 B7
7401 IP B8 PX0 PT0 PX1 PT1 BB
7402 BC PS0 PT2 BF
7403 C0 C3
7404 C4 C7
7405 T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
7406 CC TCLK RCLK EXF2 TF2 CF
7407 PSW D0 P FL OV RS0 D3
7408 D4 RS1 F0 AC CY D7
7409 WDCON D8 DB
7410 DC POR DF
7411 E0 E3
7412 E4 E7
7413 EIE E8 EX2 EX3 EX4 EX5 EB
7414 EC EF
7415 F0 F3
7416 F4 F7
7417 EIP F8 PX2 PX3 PX4 PX5 FB
7418 FC FF
7420 Alternates:
7422 SCON 98 9B
7423 9C FE 9F
7424 T2CON C8 CP_RL2 C_T2 CB
7425 CC CF
7426 \f
7428 AS8XCXXX ASSEMBLER PAGE AT-16
7429 DS80C310 SPECIAL FUNCTION REGISTERS
7432 AT.6.4 Optional Symbols: Control Bits
7434 ---------- 4 BITS ----------
7435 ---- ---- ---- ----
7436 0x80 0x40 0x20 0x10
7437 0x08 0x04 0x02 0x10
7438 ---- ---- ---- ----
7439 DPS 0x80 0x10
7440 0x08 SEL 0x01
7441 PCON 0x80 SMOD SMOD0 0x10
7442 0x08 GF1 GF0 STOP IDLE 0x01
7443 TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
7444 0x08 T0GATE T0C_T T0M1 T0M0 0x01
7445 CKCON 0x80 T2M T1M 0x10
7446 0x08 T0M MD2 MD1 MD0 0x01
7447 EXIF 0x80 IE5 IE4 IE3 IE2 0x10
7448 0x08 0x01
7449 STATUS 0x80 HIP LIP 0x10
7450 0x08 0x01
7451 T2MOD 0x80 0x10
7452 0x08 T2OE DCEN 0x01
7454 Alternates:
7456 PCON 0x80 SMOD_0 0x10
7457 0x08 0x01
7458 \f
7460 AS8XCXXX ASSEMBLER PAGE AT-17
7461 DS80C310 SPECIAL FUNCTION REGISTERS
7464 AT.7 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
7467 The DS80C320/DS80C323 Special Function Registers are selected
7468 using the .DS80C320 or DS80C323 assembler directives.
7471 AT.7.1 SFR Map
7473 --------- 4 Bytes ----------
7474 ---- ---- ---- ----
7475 80 SP DPL DPH 83
7476 84 DPL1 DPH1 DPS PCON 87
7477 88 TCON TMOD TL0 TL1 8B
7478 8C TH0 TH1 CKCON 8F
7479 90 P1 EXIF 93
7480 94 97
7481 98 SCON0 SBUF0 9B
7482 9C 9F
7483 A0 P2 A3
7484 A4 A7
7485 A8 IE SADDR0 AB
7486 AC AF
7487 B0 P3 B3
7488 B4 B7
7489 B8 IP SADEN0 BB
7490 BC BF
7491 C0 SCON1 SBUF1 C3
7492 C4 STATUS TA C7
7493 C8 T2CON T2MOD RCAP2L RCAP2H CB
7494 CC TL2 TH2 CF
7495 D0 PSW D3
7496 D4 D7
7497 D8 WDCON DB
7498 DC DF
7499 E0 ACC E3
7500 E4 E7
7501 E8 EIE EB
7502 EC EF
7503 F0 B F3
7504 F4 F7
7505 F8 EIP FB
7506 FC FF
7508 Alternates:
7510 98 SCON SBUF 9B
7511 \f
7513 AS8XCXXX ASSEMBLER PAGE AT-18
7514 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
7517 AT.7.2 Bit Addressable Registers: Generic
7519 ---------- 4 BITS ----------
7520 ---- ---- ---- ----
7521 80 83
7522 84 87
7523 TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
7524 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
7525 P1 90 P1.0 P1.1 P1.2 P1.3 93
7526 94 P1.4 P1.5 P1.6 P1.7 97
7527 SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
7528 9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
7529 P2 A0 P2.0 P2.1 P2.2 P2.3 A3
7530 A4 P2.4 P2.5 P2.6 P2.7 A7
7531 IE A8 IE.0 IE.1 IE.2 IE.3 AB
7532 AC IE.4 IE.5 EI.6 IE.7 AF
7533 P3 B0 P3.0 P3.1 P3.2 P3.3 B3
7534 B4 P3.4 P3.5 P3.6 P3.7 B7
7535 IP B8 IP.0 IP.1 IP.2 IP.3 BB
7536 BC IP.4 IP.5 IP.6 IP.7 BF
7537 SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
7538 C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
7539 T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
7540 CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
7541 PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
7542 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
7543 WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
7544 DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
7545 ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
7546 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
7547 EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
7548 EC EIE.4 EIE.5 EIE.6 EIE.7 EF
7549 B F0 B.0 B.1 B.2 B.3 F3
7550 F4 B.4 B.5 B.6 B.7 F7
7551 EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
7552 FC EIP.4 EIP.5 EIP.6 EIP.7 FF
7554 Alternates:
7556 SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
7557 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
7558 \f
7560 AS8XCXXX ASSEMBLER PAGE AT-19
7561 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
7564 AT.7.3 Bit Addressable Registers: Specific
7566 ---------- 4 BITS ----------
7567 ---- ---- ---- ----
7568 80 83
7569 84 87
7570 TCON 88 IT0 IE0 IT1 IE1 8B
7571 8C TR0 TF0 TR1 TF1 8F
7572 90 93
7573 94 97
7574 SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
7575 9C REN_0 SM2_0 SM1_0 SMO_0 9F
7576 A0 A3
7577 A4 A7
7578 IE A8 EX0 ET0 EX1 ET1 AB
7579 AC ES0 ET2 EA AF
7580 B0 B3
7581 B4 B7
7582 IP B8 PX0 PT0 PX1 PT1 BB
7583 BC PS0 PT2 BF
7584 SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
7585 C4 REN_1 SM2_1 SM1_1 SMO_1 C7
7586 T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
7587 CC TCLK RCLK EXF2 TF2 CF
7588 PSW D0 P FL OV RS0 D3
7589 D4 RS1 F0 AC CY D7
7590 WDCON D8 RWT EWT WTRF WDIF DB
7591 DC PFI EPFI POR SMOD_1 DF
7592 E0 E3
7593 E4 E7
7594 EIE E8 EX2 EX3 EX4 EX5 EB
7595 EC EWDI EF
7596 F0 F3
7597 F4 F7
7598 EIP F8 PX2 PX3 PX4 PX5 FB
7599 FC PWDI FF
7601 Alternates:
7603 SCON 98 RI TI RB8 TB8 9B
7604 9C REN SM2 SM1 SMO 9F
7605 SCON 98 9B
7606 9C FE 9F
7607 SCON0 98 9B
7608 9C FE_0 9F
7609 SCON1 C0 C3
7610 C4 FE_1 C7
7611 T2CON C8 CP_RL2 C_T2 CB
7612 CC CF
7613 \f
7615 AS8XCXXX ASSEMBLER PAGE AT-20
7616 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
7619 AT.7.4 Optional Symbols: Control Bits
7621 ---------- 4 BITS ----------
7622 ---- ---- ---- ----
7623 0x80 0x40 0x20 0x10
7624 0x08 0x04 0x02 0x10
7625 ---- ---- ---- ----
7626 DPS 0x80 0x10
7627 0x08 SEL 0x01
7628 PCON 0x80 SMOD_0 SMOD0 0x10
7629 0x08 GF1 GF0 STOP IDLE 0x01
7630 TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
7631 0x08 T0GATE T0C_T T0M1 T0M0 0x01
7632 CKCON 0x80 WD1 WD0 T2M T1M 0x10
7633 0x08 T0M MD2 MD1 MD0 0x01
7634 EXIF 0x80 IE5 IE4 IE3 IE2 0x10
7635 0x08 RGMD RGSL BGS 0x01
7636 STATUS 0x80 PIP HIP LIP 0x10
7637 0x08 0x01
7638 T2MOD 0x80 0x10
7639 0x08 T2OE DCEN 0x01
7641 Alternates:
7643 PCON 0x80 SMOD 0x10
7644 0x08 0x01
7645 \f
7647 AS8XCXXX ASSEMBLER PAGE AT-21
7648 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
7651 AT.8 DS80C390 SPECIAL FUNCTION REGISTERS
7654 The DS80C390 Special Function Registers are selected using
7655 the .DS80C390 assembler directive.
7658 AT.8.1 SFR Map
7660 --------- 4 Bytes ----------
7661 ---- ---- ---- ----
7662 80 P4 SP DPL DPH 83
7663 84 DPL1 DPH1 DPS PCON 87
7664 88 TCON TMOD TL0 TL1 8B
7665 8C TH0 TH1 CKCON 8F
7666 90 P1 EXIF P4CNT DPX 93
7667 94 DPX1 C0RMS0 C0RMS1 97
7668 98 SCON0 SBUF0 ESP 9B
7669 9C AP ACON C0TMA0 C0TMA1 9F
7670 A0 P2 P5 P5CNT C0C A3
7671 A4 C0S C0IR C0TE C0RE A7
7672 A8 IE SADDR0 SADDR1 C0M1C AB
7673 AC C0M2C C0M3C C0M4C C0M5C AF
7674 B0 P3 C0M6C B3
7675 B4 C0M7C C0M8C C0M9C C0M10C B7
7676 B8 IP SADEN0 SADEN1 C0M11C BB
7677 BC C0M12C C0M13C C0M14C C0M15C BF
7678 C0 SCON1 SBUF1 C3
7679 C4 PMR STATUS MCON TA C7
7680 C8 T2CON T2MOD RCAP2L RCAP2H CB
7681 CC TL2 TH2 COR CF
7682 D0 PSW MCNT0 MCNT1 MA D3
7683 D4 MB MC C1RMS0 C1RMS1 D7
7684 D8 WDCON DB
7685 DC C1TMA0 C1TMA1 DF
7686 E0 ACC C1C E3
7687 E4 C1S C1IR C1TE C1RE E7
7688 E8 EIE MXAX C1M1C EB
7689 EC C1M2C C1M3C C1M4C C1M5C EF
7690 F0 B C1M6C F3
7691 F4 C1M7C C1M8C C1M9C C1M10C F7
7692 F8 EIP C1M11C FB
7693 FC C1M12C C1M13C C1M14C C1M15C FF
7695 Alternates:
7697 98 SCON SBUF 9B
7698 \f
7700 AS8XCXXX ASSEMBLER PAGE AT-22
7701 DS80C390 SPECIAL FUNCTION REGISTERS
7704 AT.8.2 Bit Addressable Registers: Generic
7706 ---------- 4 BITS ----------
7707 ---- ---- ---- ----
7708 P4 80 P4.0 P4.1 P4.2 P4.3 83
7709 84 P4.4 P4.5 P4.6 P4.7 87
7710 TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
7711 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
7712 P1 90 P1.0 P1.1 P1.2 P1.3 93
7713 94 P1.4 P1.5 P1.6 P1.7 97
7714 SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
7715 9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
7716 P2 A0 P2.0 P2.1 P2.2 P2.3 A3
7717 A4 P2.4 P2.5 P2.6 P2.7 A7
7718 IE A8 IE.0 IE.1 IE.2 IE.3 AB
7719 AC IE.4 IE.5 EI.6 IE.7 AF
7720 P3 B0 P3.0 P3.1 P3.2 P3.3 B3
7721 B4 P3.4 P3.5 P3.6 P3.7 B7
7722 IP B8 IP.0 IP.1 IP.2 IP.3 BB
7723 BC IP.4 IP.5 IP.6 IP.7 BF
7724 SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
7725 C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
7726 T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
7727 CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
7728 PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
7729 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
7730 WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
7731 DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
7732 ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
7733 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
7734 EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
7735 EC EIE.4 EIE.5 EIE.6 EIE.7 EF
7736 B F0 B.0 B.1 B.2 B.3 F3
7737 F4 B.4 B.5 B.6 B.7 F7
7738 EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
7739 FC EIP.4 EIP.5 EIP.6 EIP.7 FF
7741 Alternates:
7743 SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
7744 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
7745 \f
7747 AS8XCXXX ASSEMBLER PAGE AT-23
7748 DS80C390 SPECIAL FUNCTION REGISTERS
7751 AT.8.3 Bit Addressable Registers: Specific
7753 ---------- 4 BITS ----------
7754 ---- ---- ---- ----
7755 80 83
7756 84 87
7757 TCON 88 IT0 IE0 IT1 IE1 8B
7758 8C TR0 TF0 TR1 TF1 8F
7759 P1 90 T2 T2EX RXD1 TXD1 93
7760 94 INT2 INT3 INT4 INT5 97
7761 SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
7762 9C REN_0 SM2_0 SM1_0 SMO_0 9F
7763 A0 A3
7764 A4 A7
7765 IE A8 EX0 ET0 EX1 ET1 AB
7766 AC ES0 ET2 ES1 EA AF
7767 P3 B0 RXD0 TXD0 INT0 INT1 B3
7768 B4 T0 T1 B7
7769 IP B8 PX0 PT0 PX1 PT1 BB
7770 BC PS0 PT2 PS1 BF
7771 SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
7772 C4 REN_1 SM2_1 SM1_1 SMO_1 C7
7773 T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
7774 CC TCLK RCLK EXF2 TF2 CF
7775 PSW D0 P FL OV RS0 D3
7776 D4 RS1 F0 AC CY D7
7777 WDCON D8 RWT EWT WTRF WDIF DB
7778 DC PFI EPFI POR SMOD_1 DF
7779 E0 E3
7780 E4 E7
7781 EIE E8 EX2 EX3 EX4 EX5 EB
7782 EC EWDI C1IE C0IE CANBIE EF
7783 F0 F3
7784 F4 F7
7785 EIP F8 PX2 PX3 PX4 PX5 FB
7786 FC PWDI C1IP C0IP CANBIP FF
7788 Alternates:
7790 SCON 98 RI TI RB8 TB8 9B
7791 9C REN SM2 SM1 SMO 9F
7792 SCON 98 9B
7793 9C FE 9F
7794 SCON0 98 9B
7795 9C FE_0 9F
7796 SCON1 C0 C3
7797 C4 FE_1 C7
7798 T2CON C8 CP_RL2 C_T2 CB
7799 CC CF
7800 \f
7802 AS8XCXXX ASSEMBLER PAGE AT-24
7803 DS80C390 SPECIAL FUNCTION REGISTERS
7806 AT.8.4 Optional Symbols: Control Bits
7808 ---------- 4 BITS ----------
7809 ---- ---- ---- ----
7810 0x80 0x40 0x20 0x10
7811 0x08 0x04 0x02 0x10
7812 ---- ---- ---- ----
7813 DPS 0x80 ID1 ID0 TSL 0x10
7814 0x08 SEL 0x01
7815 PCON 0x80 SMOD_0 SMOD0 OFDF OFDE 0x10
7816 0x08 GF1 GF0 STOP IDLE 0x01
7817 TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
7818 0x08 T0GATE T0C_T T0M1 T0M0 0x01
7819 CKCON 0x80 WD1 WD0 T2M T1M 0x10
7820 0x08 T0M MD2 MD1 MD0 0x01
7821 EXIF 0x80 IE5 IE4 IE3 IE2 0x10
7822 0x08 CKRY RGMD RGSL BGS 0x01
7823 P4CNT 0x80 SBCAN 0x10
7824 0x08 0x01
7825 ESP 0x80 0x10
7826 0x08 ESP.1 ESP.0 0x01
7827 ACON 0x80 0x10
7828 0x08 SA AM1 AM0 0x01
7829 P5 0x80 P5.7 P5.6 P5.5 P5.4 0x10
7830 0x08 P5.3 P5.2 P5.1 P5.0 0x01
7831 P5CNT 0x80 CAN1BA CAN0BA SP1EC C1_IO 0x10
7832 0x08 C0_IO P5CNT.2 P5CNT.1 P5CNT.0 0x01
7833 CxC 0x80 ERIE STIE PDE SIESTA 0x10
7834 0x08 CRST AUTOB ERCS SWINT 0x01
7835 CxS 0x80 BSS EC96_128 WKS RXS 0x10
7836 0x08 TXS ER2 ER1 ER0 0x01
7837 CxIR 0x80 INTIN7 INTIN6 INTIN5 INTIN4 0x10
7838 0x08 INTIN3 INTIN2 INTIN1 INTIN0 0x01
7839 CxCxxC 0x80 MSRDY ET1 ER1 INTRQ 0x10
7840 0x08 EXTRQ MTRQ ROW_TIH DTUP 0x01
7841 PMR 0x80 CD1 CD0 SWB CTM 0x10
7842 0x08 4X_2X ALEOFF 0x01
7843 STATUS 0x80 PIP HIP LIP 0x10
7844 0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
7845 MCON 0x80 IDM1 IDM0 CMA 0x10
7846 0x08 PDCE3 PDCE2 PDCE1 PDCE0 0x01
7847 T2MOD 0x80 D13T1 0x10
7848 0x08 D13T2 T2OE DCEN 0x01
7849 COR 0x80 IRDACK C1BPR7 C1BPR6 C0BPR7 0x10
7850 0x08 C0BPR6 COD1 COD0 CLKOE 0x01
7851 MCNT0 0x80 _LSHIFT CSE SCB MAS4 0x10
7852 0x08 MAS3 MAS2 MAS1 MAS0 0x01
7853 MCNT1 0x80 MST MOF CLM 0x10
7854 0x08 0x01
7856 Alternates:
7858 \f
7860 AS8XCXXX ASSEMBLER PAGE AT-25
7861 DS80C390 SPECIAL FUNCTION REGISTERS
7864 PCON 0x80 SMOD 0x10
7865 0x08 0x01
7866 \f
7868 AS8XCXXX ASSEMBLER PAGE AT-26
7869 DS80C390 SPECIAL FUNCTION REGISTERS
7872 AT.9 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
7875 The DS83C520/DS87C520 Special Function Registers are selected
7876 using the .DS83C520 or DS87C520 assembler directives.
7879 AT.9.1 SFR Map
7881 --------- 4 Bytes ----------
7882 ---- ---- ---- ----
7883 80 P0 SP DPL DPH 83
7884 84 DPL1 DPH1 DPS PCON 87
7885 88 TCON TMOD TL0 TL1 8B
7886 8C TH0 TH1 CKCON 8F
7887 90 PORT1 EXIF 93
7888 94 97
7889 98 SCON0 SBUF0 9B
7890 9C 9F
7891 A0 P2 A3
7892 A4 A7
7893 A8 IE SADDR0 SADDR1 AB
7894 AC AF
7895 B0 P3 B3
7896 B4 B7
7897 B8 IP SADEN0 SADEN1 BB
7898 BC BF
7899 C0 SCON1 SBUF1 ROMSIZE C3
7900 C4 PMR STATUS TA C7
7901 C8 T2CON T2MOD RCAP2L RCAP2H CB
7902 CC TL2 TH2 CF
7903 D0 PSW D3
7904 D4 D7
7905 D8 WDCON DB
7906 DC DF
7907 E0 ACC E3
7908 E4 E7
7909 E8 EIE EB
7910 EC EF
7911 F0 B F3
7912 F4 F7
7913 F8 EIP FB
7914 FC FF
7916 Alternates:
7918 98 SCON SBUF 9B
7919 \f
7921 AS8XCXXX ASSEMBLER PAGE AT-27
7922 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
7925 AT.9.2 Bit Addressable Registers: Generic
7927 ---------- 4 BITS ----------
7928 ---- ---- ---- ----
7929 P0 80 P0.7 P0.6 P0.5 P0.4 83
7930 84 P0.3 P0.2 P0.1 P0.0 87
7931 TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
7932 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
7933 PORT1 90 P1.0 P1.1 P1.2 P1.3 93
7934 94 P1.4 P1.5 P1.6 P1.7 97
7935 SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
7936 9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
7937 P2 A0 P2.0 P2.1 P2.2 P2.3 A3
7938 A4 P2.4 P2.5 P2.6 P2.7 A7
7939 IE A8 IE.0 IE.1 IE.2 IE.3 AB
7940 AC IE.4 IE.5 EI.6 IE.7 AF
7941 P3 B0 P3.0 P3.1 P3.2 P3.3 B3
7942 B4 P3.4 P3.5 P3.6 P3.7 B7
7943 IP B8 IP.0 IP.1 IP.2 IP.3 BB
7944 BC IP.4 IP.5 IP.6 IP.7 BF
7945 SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
7946 C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
7947 T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
7948 CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
7949 PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
7950 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
7951 WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
7952 DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
7953 ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
7954 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
7955 EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
7956 EC EIE.4 EIE.5 EIE.6 EIE.7 EF
7957 B F0 B.0 B.1 B.2 B.3 F3
7958 F4 B.4 B.5 B.6 B.7 F7
7959 EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
7960 FC EIP.4 EIP.5 EIP.6 EIP.7 FF
7962 Alternates:
7964 PORT1 90 PORT1.0 PORT1.1 PORT1.2 PORT1.3 93
7965 94 PORT1.4 PORT1.5 PORT1.6 PORT1.7 97
7966 SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
7967 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
7968 \f
7970 AS8XCXXX ASSEMBLER PAGE AT-28
7971 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
7974 AT.9.3 Bit Addressable Registers: Specific
7976 ---------- 4 BITS ----------
7977 ---- ---- ---- ----
7978 80 83
7979 84 87
7980 TCON 88 IT0 IE0 IT1 IE1 8B
7981 8C TR0 TF0 TR1 TF1 8F
7982 90 93
7983 94 97
7984 SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
7985 9C REN_0 SM2_0 SM1_0 SMO_0 9F
7986 A0 A3
7987 A4 A7
7988 IE A8 EX0 ET0 EX1 ET1 AB
7989 AC ES0 ET2 ES1 EA AF
7990 B0 B3
7991 B4 B7
7992 IP B8 PX0 PT0 PX1 PT1 BB
7993 BC PS0 PT2 PS1 BF
7994 SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
7995 C4 REN_1 SM2_1 SM1_1 SMO_1 C7
7996 T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
7997 CC TCLK RCLK EXF2 TF2 CF
7998 PSW D0 P FL OV RS0 D3
7999 D4 RS1 F0 AC CY D7
8000 WDCON D8 RWT EWT WTRF WDIF DB
8001 DC PFI EPFI POR SMOD_1 DF
8002 E0 E3
8003 E4 E7
8004 EIE E8 EX2 EX3 EX4 EX5 EB
8005 EC EWDI EF
8006 F0 F3
8007 F4 F7
8008 EIP F8 PX2 PX3 PX4 PX5 FB
8009 FC PWDI FF
8011 Alternates:
8013 SCON 98 RI TI RB8 TB8 9B
8014 9C REN SM2 SM1 SMO 9F
8015 SCON 98 9B
8016 9C FE 9F
8017 SCON0 98 9B
8018 9C FE_0 9F
8019 SCON1 C0 C3
8020 C4 FE_1 C7
8021 T2CON C8 CP_RL2 C_T2 CB
8022 CC CF
8023 \f
8025 AS8XCXXX ASSEMBLER PAGE AT-29
8026 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
8029 AT.9.4 Optional Symbols: Control Bits
8031 ---------- 4 BITS ----------
8032 ---- ---- ---- ----
8033 0x80 0x40 0x20 0x10
8034 0x08 0x04 0x02 0x10
8035 ---- ---- ---- ----
8036 DPS 0x80 0x10
8037 0x08 SEL 0x01
8038 PCON 0x80 SMOD_0 SMOD0 0x10
8039 0x08 GF1 GF0 STOP IDLE 0x01
8040 TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
8041 0x08 T0GATE T0C_T T0M1 T0M0 0x01
8042 CKCON 0x80 WD1 WD0 T2M T1M 0x10
8043 0x08 T0M MD2 MD1 MD0 0x01
8044 EXIF 0x80 IE5 IE4 IE3 IE 0x10
8045 0x08 XT_RG RGMD RGSL BGS 0x01
8046 SBUF1 0x80 SB7 SB6 SB5 SB4 0x10
8047 0x08 SB3 SB2 SB1 SB0 0x01
8048 ROMSIZE 0x80 0x10
8049 0x08 RMS2 RMS1 RMS0 0x01
8050 PMR 0x80 CD1 CD0 SWB 0x10
8051 0x08 XTOFF ALEOFF DME1 DME0 0x01
8052 STATUS 0x80 PIP HIP LIP XTUP 0x10
8053 0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
8054 T2MOD 0x80 0x10
8055 0x08 T2OE DCEN 0x01
8057 Alternates:
8059 PCON 0x80 SMOD 0x10
8060 0x08 0x01
8061 \f
8063 AS8XCXXX ASSEMBLER PAGE AT-30
8064 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
8067 AT.10 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
8070 The DS83C530/DS87C530 Special Function Registers are selected
8071 using the .DS83C530 or DS87C530 assembler directives.
8074 AT.10.1 SFR Map
8076 --------- 4 Bytes ----------
8077 ---- ---- ---- ----
8078 80 P0 SP DPL DPH 83
8079 84 DPL1 DPH1 DPS PCON 87
8080 88 TCON TMOD TL0 TL1 8B
8081 8C TH0 TH1 CKCON 8F
8082 90 P1 EXIF 93
8083 94 TRIM 97
8084 98 SCON0 SBUF0 9B
8085 9C 9F
8086 A0 P2 A3
8087 A4 A7
8088 A8 IE SADDR0 SADDR1 AB
8089 AC AF
8090 B0 P3 B3
8091 B4 B7
8092 B8 IP SADEN0 SADEN1 BB
8093 BC BF
8094 C0 SCON1 SBUF1 ROMSIZE C3
8095 C4 PMR STATUS TA C7
8096 C8 T2CON T2MOD RCAP2L RCAP2H CB
8097 CC TL2 TH2 CF
8098 D0 PSW D3
8099 D4 D7
8100 D8 WDCON DB
8101 DC DF
8102 E0 ACC E3
8103 E4 E7
8104 E8 EIE EB
8105 EC EF
8106 F0 B RTASS RTAS F3
8107 F4 RTAM RTAH F7
8108 F8 EIP RTCC RTCSS RTCS FB
8109 FC RTCM RTCH RTCD0 RTCD1 FF
8111 Alternates:
8113 98 SCON SBUF 9B
8114 \f
8116 AS8XCXXX ASSEMBLER PAGE AT-31
8117 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
8120 AT.10.2 Bit Addressable Registers: Generic
8122 ---------- 4 BITS ----------
8123 ---- ---- ---- ----
8124 P0 80 P0.7 P0.6 P0.5 P0.4 83
8125 84 P0.3 P0.2 P0.1 P0.0 87
8126 TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8127 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
8128 P1 90 P1.0 P1.1 P1.2 P1.3 93
8129 94 P1.4 P1.5 P1.6 P1.7 97
8130 SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
8131 9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
8132 P2 A0 P2.0 P2.1 P2.2 P2.3 A3
8133 A4 P2.4 P2.5 P2.6 P2.7 A7
8134 IE A8 IE.0 IE.1 IE.2 IE.3 AB
8135 AC IE.4 IE.5 EI.6 IE.7 AF
8136 P3 B0 P3.0 P3.1 P3.2 P3.3 B3
8137 B4 P3.4 P3.5 P3.6 P3.7 B7
8138 IP B8 IP.0 IP.1 IP.2 IP.3 BB
8139 BC IP.4 IP.5 IP.6 IP.7 BF
8140 SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
8141 C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
8142 T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
8143 CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
8144 PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
8145 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
8146 WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
8147 DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
8148 ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
8149 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
8150 EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
8151 EC EIE.4 EIE.5 EIE.6 EIE.7 EF
8152 B F0 B.0 B.1 B.2 B.3 F3
8153 F4 B.4 B.5 B.6 B.7 F7
8154 EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
8155 FC EIP.4 EIP.5 EIP.6 EIP.7 FF
8157 Alternates:
8159 SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
8160 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
8161 \f
8163 AS8XCXXX ASSEMBLER PAGE AT-32
8164 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
8167 AT.10.3 Bit Addressable Registers: Specific
8169 ---------- 4 BITS ----------
8170 ---- ---- ---- ----
8171 80 83
8172 84 87
8173 TCON 88 IT0 IE0 IT1 IE1 8B
8174 8C TR0 TF0 TR1 TF1 8F
8175 90 93
8176 94 97
8177 SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
8178 9C REN_0 SM2_0 SM1_0 SMO_0 9F
8179 A0 A3
8180 A4 A7
8181 IE A8 EX0 ET0 EX1 ET1 AB
8182 AC ES0 ET2 ES1 EA AF
8183 B0 B3
8184 B4 B7
8185 IP B8 PX0 PT0 PX1 PT1 BB
8186 BC PS0 PT2 PS1 BF
8187 SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
8188 C4 REN_1 SM2_1 SM1_1 SMO_1 C7
8189 T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
8190 CC TCLK RCLK EXF2 TF2 CF
8191 PSW D0 P FL OV RS0 D3
8192 D4 RS1 F0 AC CY D7
8193 WDCON D8 RWT EWT WTRF WDIF DB
8194 DC PFI EPFI POR SMOD_1 DF
8195 E0 E3
8196 E4 E7
8197 EIE E8 EX2 EX3 EX4 EX5 EB
8198 EC EWDI ERTCI EF
8199 F0 F3
8200 F4 F7
8201 EIP F8 PX2 PX3 PX4 PX5 FB
8202 FC PWDI PRTCI FF
8204 Alternates:
8206 SCON 98 RI TI RB8 TB8 9B
8207 9C REN SM2 SM1 SMO 9F
8208 SCON 98 9B
8209 9C FE 9F
8210 SCON0 98 9B
8211 9C FE_0 9F
8212 SCON1 C0 C3
8213 C4 FE_1 C7
8214 T2CON C8 CP_RL2 C_T2 CB
8215 CC CF
8216 \f
8218 AS8XCXXX ASSEMBLER PAGE AT-33
8219 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
8222 AT.10.4 Optional Symbols: Control Bits
8224 ---------- 4 BITS ----------
8225 ---- ---- ---- ----
8226 0x80 0x40 0x20 0x10
8227 0x08 0x04 0x02 0x10
8228 ---- ---- ---- ----
8229 DPS 0x80 0x10
8230 0x08 SEL 0x01
8231 PCON 0x80 SMOD_0 SMOD0 0x10
8232 0x08 GF1 GF0 STOP IDLE 0x01
8233 TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
8234 0x08 T0GATE T0C_T T0M1 T0M0 0x01
8235 CKCON 0x80 WD1 WD0 T2M T1M 0x10
8236 0x08 T0M MD2 MD1 MD0 0x01
8237 EXIF 0x80 IE5 IE4 IE3 IE 0x10
8238 0x08 XT_RG RGMD RGSL BGS 0x01
8239 TRIM 0x80 E4K X12_6 TRM2 _TRM2 0x10
8240 0x08 TRM1 _TRM1 TRM0 _TRM0 0x01
8241 SBUF1 0x80 SB7 SB6 SB5 SB4 0x10
8242 0x08 SB3 SB2 SB1 SB0 0x01
8243 ROMSIZE 0x80 0x10
8244 0x08 RMS2 RMS1 RMS0 0x01
8245 PMR 0x80 CD1 CD0 SWB 0x10
8246 0x08 XTOFF ALEOFF DME1 DME0 0x01
8247 STATUS 0x80 PIP HIP LIP XTUP 0x10
8248 0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
8249 T2MOD 0x80 0x10
8250 0x08 T2OE DCEN 0x01
8251 RTCC 0x80 SSCE SCE MCE HCE 0x10
8252 0x08 RTCRE RTCWE RTCIF RTCE 0x01
8254 Alternates:
8256 PCON 0x80 SMOD 0x10
8257 0x08 0x01
8258 \f
8260 AS8XCXXX ASSEMBLER PAGE AT-34
8261 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
8264 AT.11 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
8267 The DS83C550/DS87C550 Special Function Registers are selected
8268 using the .DS83C550 or DS87C550 assembler directives.
8271 AT.11.1 SFR Map
8273 --------- 4 Bytes ----------
8274 ---- ---- ---- ----
8275 80 PORT0 SP DPL DPH 83
8276 84 DPL1 DPH1 DPS PCON 87
8277 88 TCON TMOD TL0 TL1 8B
8278 8C TH0 TH1 CKCON 8F
8279 90 PORT1 RCON 93
8280 94 97
8281 98 SCON0 SBUF0 9B
8282 9C PMR 9F
8283 A0 PORT2 SADDR0 SADDR1 A3
8284 A4 A7
8285 A8 IE CMPL0 CMPL1 CMPL2 AB
8286 AC CPTL0 CPTL1 CPTL2 CPTL3 AF
8287 B0 PORT3 ADCON1 ADCON2 B3
8288 B4 ADMSB ADLSD WINHI WINLO B7
8289 B8 IP SADEN0 SADEN1 BB
8290 BC T2CON T2MOD BF
8291 C0 PORT4 ROMSIZE C3
8292 C4 PORT5 STATUS TA C7
8293 C8 T2IR CMPH0 CMPH1 CMPH2 CB
8294 CC CPTH0 CPTH1 CPTH2 CPTH3 CF
8295 D0 PSW PW0FG PW1FG D3
8296 D4 PW2FG PW3FG PWMADR D7
8297 D8 SCON1 SBUF1 DB
8298 DC PWM0 PWM1 PWM2 PWM3 DF
8299 E0 ACC PW01CS PW23CS PW01CON E3
8300 E4 PW23CON RLOADL RLOADH E7
8301 E8 EIE T2SEL CTCON EB
8302 EC TL2 TH2 SETR RSTR EF
8303 F0 B PORT6 F3
8304 F4 F7
8305 F8 EIP FB
8306 FC WDCON FF
8308 Alternates:
8310 80 P0 83
8311 90 P1 93
8312 98 SCON SBUF 9B
8313 A0 P2 A3
8314 B0 P3 B3
8315 C0 P4 C3
8316 \f
8318 AS8XCXXX ASSEMBLER PAGE AT-35
8319 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
8322 C4 P5 C7
8323 F0 PORT6 F3
8324 \f
8326 AS8XCXXX ASSEMBLER PAGE AT-36
8327 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
8330 AT.11.2 Bit Addressable Registers: Generic
8332 ---------- 4 BITS ----------
8333 ---- ---- ---- ----
8334 PORT0 80 P0.7 P0.6 P0.5 P0.4 83
8335 84 P0.3 P0.2 P0.1 P0.0 87
8336 TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8337 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
8338 PORT1 90 P1.0 P1.1 P1.2 P1.3 93
8339 94 P1.4 P1.5 P1.6 P1.7 97
8340 SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
8341 9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
8342 PORT2 A0 P2.0 P2.1 P2.2 P2.3 A3
8343 A4 P2.4 P2.5 P2.6 P2.7 A7
8344 IE A8 IE.0 IE.1 IE.2 IE.3 AB
8345 AC IE.4 IE.5 EI.6 IE.7 AF
8346 PORT3 B0 P3.0 P3.1 P3.2 P3.3 B3
8347 B4 P3.4 P3.5 P3.6 P3.7 B7
8348 IP B8 IP.0 IP.1 IP.2 IP.3 BB
8349 BC IP.4 IP.5 IP.6 IP.7 BF
8350 PORT4 C0 P4.0 P4.1 P4.2 P4.3 C3
8351 C4 P4.4 P4.5 P4.6 P4.7 C7
8352 T2IR C8 T2IR.0 T2IR.1 T2IR.2 T2IR.3 CB
8353 CC T2IR.4 T2IR.5 T2IR.6 T2IR.7 CF
8354 PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
8355 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
8356 SCON1 D8 SCON1.0 SCON1.1 SCON1.2 SCON1.3 DB
8357 DC SCON1.4 SCON1.5 SCON1.6 SCON1.7 DF
8358 ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
8359 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
8360 EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
8361 EC EIE.4 EIE.5 EIE.6 EIE.7 EF
8362 B F0 B.0 B.1 B.2 B.3 F3
8363 F4 B.4 B.5 B.6 B.7 F7
8364 EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
8365 FC EIP.4 EIP.5 EIP.6 EIP.7 FF
8367 Alternates:
8369 PORT0 80 PORT0.7 PORT0.6 PORT0.5 PORT0.4 83
8370 84 PORT0.3 PORT0.2 PORT0.1 PORT0.0 87
8371 PORT1 90 PORT1.0 PORT1.1 PORT1.2 PORT1.3 93
8372 94 PORT1.4 PORT1.5 PORT1.6 PORT1.7 97
8373 SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
8374 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
8375 PORT2 A0 PORT2.0 PORT2.1 PORT2.2 PORT2.3 A3
8376 A4 PORT2.4 PORT2.5 PORT2.6 PORT2.7 A7
8377 PORT3 B0 PORT3.0 PORT3.1 PORT3.2 PORT3.3 B3
8378 B4 PORT3.4 PORT3.5 PORT3.6 PORT3.7 B7
8379 PORT4 C0 PORT4.0 PORT4.1 PORT4.2 PORT4.3 C3
8380 C4 PORT4.4 PORT4.5 PORT4.6 PORT4.7 C7
8381 \f
8383 AS8XCXXX ASSEMBLER PAGE AT-37
8384 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
8387 AT.11.3 Bit Addressable Registers: Specific
8389 ---------- 4 BITS ----------
8390 ---- ---- ---- ----
8391 80 83
8392 84 87
8393 TCON 88 IT0 IE0 IT1 IE1 8B
8394 8C TR0 TF0 TR1 TF1 8F
8395 90 93
8396 94 97
8397 SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
8398 9C REN_0 SM2_0 SM1_0 SMO_0 9F
8399 A0 A3
8400 A4 A7
8401 IE A8 EX0 ET0 EX1 ET1 AB
8402 AC ES0 ET2 ES1 EA AF
8403 B0 B3
8404 B4 B7
8405 IP B8 PX0 PT0 PX1 PT1 BB
8406 BC PS0 PS1 PAD BF
8407 PORT4 C0 CMSR0 CMSR1 CMSR2 CMSR3 C3
8408 C4 CMSR4 CMSR5 CMT0 CMT1 C7
8409 T2IR C8 CF0 CF1 CF2 CF3 CB
8410 CC CM0F CM1F CM2F CF
8411 PSW D0 P FL OV RS0 D3
8412 D4 RS1 F0 AC CY D7
8413 SCON1 D8 RI_1 TI_1 RB8_1 TB8_1 DB
8414 DC REN_1 SM2_1 SM1_1 SMO_1 DF
8415 E0 E3
8416 E4 E7
8417 EIE E8 EX2 EX3 EX4 EX5 EB
8418 EC ECM0 ECM1 ECM2 ET2 EF
8419 F0 F3
8420 F4 F7
8421 EIP F8 PX2 PX3 PX4 PX5 FB
8422 FC PCM0 PCM1 PCM2 PT2 FF
8424 Alternates:
8426 SCON 98 RI TI RB8 TB8 9B
8427 9C REN SM2 SM1 SMO 9F
8428 SCON 98 9B
8429 9C FE 9F
8430 SCON0 98 9B
8431 9C FE_0 9F
8432 T2IR C8 IE2 IE3 IE4 IE5 CB
8433 CC CF
8434 SCON1 D8 DB
8435 DC FE_1 DF
8436 EIE E8 EC0 EC1 EC2 EC3 EB
8437 EC EF
8438 EIP F8 PC0 PC1 PC2 PC3 FB
8439 \f
8441 AS8XCXXX ASSEMBLER PAGE AT-38
8442 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
8445 FC FF
8446 \f
8448 AS8XCXXX ASSEMBLER PAGE AT-39
8449 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
8452 AT.11.4 Optional Symbols: Control Bits
8454 ---------- 4 BITS ----------
8455 ---- ---- ---- ----
8456 0x80 0x40 0x20 0x10
8457 0x08 0x04 0x02 0x10
8458 ---- ---- ---- ----
8459 DPS 0x80 ID1 ID0 TSL 0x10
8460 0x08 SEL 0x01
8461 PCON 0x80 SMOD_0 SMOD0 0x10
8462 0x08 GF1 GF0 STOP IDLE 0x01
8463 TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
8464 0x08 T0GATE T0C_T T0M1 T0M0 0x01
8465 CKCON 0x80 WD1 WD0 T2M T1M 0x10
8466 0x08 T0M MD2 MD1 MD0 0x01
8467 RCON 0x80 0x10
8468 0x08 CKRDY RGMD RGSL BGS 0x01
8469 PMR 0x80 CD1 CD0 SWB CTM 0x10
8470 0x08 4X_2X ALEOFF DEM1 DEM0 0x01
8471 ADCON1 0x80 STRT_BSY EOC CONT_SS ADEX 0x10
8472 0x08 WCQ WCM ADON WCIO 0x01
8473 ADCON2 0x80 OUTCF MUX2 MUX1 MUX0 0x10
8474 0x08 APS3 APS2 APS1 APS0 0x01
8475 T2CON 0x80 TF2 EXF2 RCLK TCLK 0x10
8476 0x08 EXEN2 TR2 CT2 CPRL2 0x01
8477 T2MOD 0x80 0x10
8478 0x08 T2OE DCEN 0x01
8479 PORT5 0x80 ADC7 ADC6 ADC5 ADC4 0x10
8480 0x08 ADC3 ADC2 ADC1 ADC0 0x01
8481 ROMSIZE 0x80 0x10
8482 0x08 RMS2 RMS1 RMS0 0x01
8483 STATUS 0x80 PIP HIP LIP XTUP 0x10
8484 0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
8485 PWMADR 0x80 ADRS 0x10
8486 0x08 PWE1 PWE0 0x01
8487 PW01CS 0x80 PW0S2 PW0S1 PW0S0 PW0EN 0x10
8488 0x08 PW1S2 PW1S1 PW1S0 PW1EN 0x01
8489 PW23CS 0x80 PW2S2 PW2S1 PW2S0 PW2EN 0x10
8490 0x08 PW3S2 PW3S1 PW3S0 PW3EN 0x01
8491 PW01CON 0x80 PW0F PW0DC PW0OE PW0T_C 0x10
8492 0x08 PW1F PW1DC PW1OE PW1T_C 0x01
8493 PW23CON 0x80 PW2F PW2DC PW2OE PW2T_C 0x10
8494 0x08 PW3F PW3DC PW3OE PW3T_C 0x01
8495 T2SEL 0x80 TF2S TF2BS TF2B 0x10
8496 0x08 T2P1 T2P0 0x01
8497 CTCON 0x80 _CT3 CT3 _CT2 CT2 0x10
8498 0x08 _CT1 CT1 _CT0 CT0 0x01
8499 SETR 0x80 TGFF1 TGFF0 CMS5 CMS4 0x10
8500 0x08 CMS3 CMS2 CMS1 CMS0 0x01
8501 RSTR 0x80 CMTE1 CMTE0 CMR5 CMR4 0x10
8502 0x08 CMR3 CMR2 CMR1 CMR0 0x01
8503 PORT6 0x80 STADC PWMC1 PWMC0 0x10
8504 \f
8506 AS8XCXXX ASSEMBLER PAGE AT-40
8507 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
8510 0x08 PWMO3 PWMO2 PWMO1 PWMO0 0x01
8511 WDCON 0x80 SMOD_1 POR EPF1 PF1 0x10
8512 0x08 WDIF WTRF EWT RWT 0x01
8514 Alternates:
8516 PCON 0x80 SMOD 0x10
8517 0x08 0x01
8518 T2CON 0x80 0x10
8519 0x08 C_T2 _RL2 0x01
8520 \f
8534 APPENDIX AY
8536 ASGB ASSEMBLER
8542 AY.1 ACKNOWLEDGEMENT
8545 Thanks to Roger Ivie for his contribution of the ASGB cross
8546 assembler.
8548 Roger Ivie
8549 ivie at cc dot usu dot edu
8552 AY.2 INTRODUCTION
8555 The Gameboy uses an 8-bit processor which is closely related
8556 to the 8080. It is usually described as a modified Z80, but may
8557 be more closely understood as an enhanced 8080; it has the 8080
8558 register set and many, but not all, enhanced Z80 instructions.
8559 However, even this is not accurate, for the Gameboy also lacks
8560 some basic 8080 instructions (most annoyingly SHLD and LHLD).
8561 ASGB is based on ASZ80 and therefore uses the Z80 mnemonic set.
8564 AY.3 GAMEBOY REGISTER SET AND CONDITIONS
8567 The following is a complete list of register designations and
8568 condition mnemonics:
8570 byte registers - a,b,c,d,e,h,l
8571 register pairs - af, bc, de, hl
8572 word registers - pc, sp
8574 C - carry bit set
8575 NC - carry bit clear
8576 NZ - zero bit clear
8577 Z - zero bit set
8578 \f
8580 ASGB ASSEMBLER PAGE AY-2
8581 GAMEBOY INSTRUCTION SET
8584 AY.4 GAMEBOY INSTRUCTION SET
8587 The following tables list all Gameboy mnemnoics recognized by
8588 the ASGB assembler. The designation [] refers to a required ad-
8589 dressing mode argument. The following list specifies the format
8590 for each addressing mode supported by ASGB:
8592 #data immediate data
8593 byte or word data
8595 n byte value
8597 rg a byte register
8598 a,b,c,d,e,h,l
8600 rp a register pair or 16-bit register
8601 bc,de,hl
8603 (hl) implied addressing or
8604 register indirect addressing
8606 (label) direct addressing
8608 label call/jmp/jr label
8611 The terms data, dir, and ext may all be expression. The term
8612 dir is not allowed to be an external reference.
8614 Note that not all addressing modes are valid with every in-
8615 struction. Although official information is not, as far as I
8616 know, publically available for the Gameboy processor, many unof-
8617 ficial sources are available on the internet.
8620 AY.4.1 .tile Directive
8623 Format:
8625 .tile /string/ or
8627 .tile ^/string/
8631 where: string is a string of ascii characters taken from the
8632 set ' ', '.', '+', '*', '0', '1', '2', and '3'.
8633 The string must be a multiple of eight
8634 characters long.
8636 \f
8638 ASGB ASSEMBLER PAGE AY-3
8639 GAMEBOY INSTRUCTION SET
8642 / / represent the delimiting characters. These
8643 delimiters may be any paired printing
8644 characters, as long as the characters are not
8645 contained within the string itself. If the
8646 delimiting characters do not match, the .tile
8647 directive will give the (q) error.
8649 The Gameboy displays information on the screen using a pro-
8650 grammable character set (referred to as "tiles" among Gameboy
8651 developers). The ASGB cross assembler has a processor-specific
8652 assembler directive to aid in the creation of the game's
8653 character set.
8655 Each character is created from an 8x8 grid of pixels, each
8656 pixel of which is composed of two bits. The .tile directive ac-
8657 cepts a single string argument which is processed to create the
8658 byte values corresponding to the lines of pixels in the
8659 character. The string argument must be some multiple of 8
8660 characters long, and be one of these characters:
8662 ' ' or '0' - for the pixel value 00
8663 '.' or '1' - for the pixel value 01
8664 '+' or '2' - for the pixel value 10
8665 '*' or '3' - for the pixel value 11
8667 The .tile directive processes each 8-character group of its
8668 string argument to create the two-byte value corresponding to
8669 that line of pixels. The example in the popular extant litera-
8670 ture could be done using ASGB like this:
8672 0000 7C 7C 1 .tile " ***** "
8673 0002 00 C6 2 .tile "++ ++ "
8674 0004 C6 00 3 .tile ".. .. "
8675 0006 00 FE 4 .tile "+++++++ "
8676 0008 C6 C6 5 .tile "** ** "
8677 000A 00 C6 6 .tile "++ ++ "
8678 000C C6 00 7 .tile ".. .. "
8679 000E 00 00 8 .tile " "
8681 Or, using the synonym character set, as:
8683 0010 7C 7C 10 .tile "03333300"
8684 0012 00 C6 11 .tile "22000220"
8685 0014 C6 00 12 .tile "11000110"
8686 0016 00 FE 13 .tile "22222220"
8687 0018 C6 C6 14 .tile "33000330"
8688 001A 00 C6 15 .tile "22000220"
8689 001C C6 00 16 .tile "11000110"
8690 001E 00 00 17 .tile "00000000"
8692 \f
8694 ASGB ASSEMBLER PAGE AY-4
8695 GAMEBOY INSTRUCTION SET
8698 Since .tile is perfectly willing to assemble multiple lines
8699 of a character at once (as long as it is given complete rows of
8700 pixels), it could even be done as:
8702 .tile " ***** ++ ++ .. .. +++++++ "
8703 .tile "** ** ++ ++ .. .. "
8706 AY.4.2 Potentially Controversial Mnemonic Selection
8709 Although the Gameboy processor is based on the Z80, it does
8710 include some features which are not present in the Z80. The Z80
8711 mnemonic set is not sufficient to describe these additional
8712 operations; mnemonics must be created for the new operations.
8713 The mnemonics ASGB uses are not the same as those used by other
8714 publically-available Gameboy assemblers.
8717 AY.4.2.1 Auto-Indexing Loads -
8719 The Gameboy provides instructions to load or store the ac-
8720 cumulator indirectly via HL and then subsequently increment or
8721 decrement HL. ASGB uses the mnemonic 'ldd' for the instructions
8722 which decrement HL and 'ldi' for the instructions which incre-
8723 ment HL. Because the Gameboy lacks the Z80's block moves, the
8724 mnemonics are not otherwise needed by ASGB.
8726 ldd a,(hl) ldd (hl),a
8727 ldi a,(hl) ldi (hl),a
8730 AY.4.2.2 Input and Output Operations -
8732 The Gameboy replaces the Z80's separate address space for
8733 I/O with a mechanism similar to the zero page addressing of pro-
8734 cessors such as the 6800 or 6502. All I/O registers in the
8735 Gameboy reside in the address range between 0xff00 and 0xffff.
8736 The Gameboy adds special instructions to load and store the ac-
8737 cumulator from and into this page of memory. The instructions
8738 are analogous to the Z80's in and out instructions and ASGB re-
8739 tains the 'in' and 'out' mnemonics for them.
8741 in a,(n) out (n),a
8742 in a,(c) out (c),a
8744 From ASGB's perspective, the RAM available from 0xff80
8745 through 0xffff is composed of unused I/O locations rather than
8746 direct-page RAM.
8749 \f
8751 ASGB ASSEMBLER PAGE AY-5
8752 GAMEBOY INSTRUCTION SET
8755 AY.4.2.3 The 'stop' Instruction -
8757 The publically-available documentation for the Gameboy
8758 lists the 'stop' instruction as the two-byte instruction 10 00,
8759 and the other freely-available Gameboy assemblers assemble it in
8760 that manner. As far as I can tell, the only rationale for this
8761 is that the corresponding Z80 instruction ('djnz label') is a
8762 two-byte instruction. ASGB assembles 'stop' as the one-byte in-
8763 struction 10.
8766 AY.4.3 Inherent Instructions
8769 ccf cpl
8770 daa di
8771 ei nop
8772 halt rla
8773 rlca rra
8774 rrca scf
8775 reti stop
8776 swap
8779 AY.4.4 Implicit Operand Instructions
8782 adc a,[] adc []
8783 add a,[] add []
8784 and a,[] and []
8785 cp a,[] cp []
8786 dec a,[] dec []
8787 inc a,[] inc []
8788 or a,[] or []
8789 rl a,[] rl []
8790 rlc a,[] rlc []
8791 rr a,[] rr []
8792 rrc a,[] rrc []
8793 sbc a,[] sbc []
8794 sla a,[] sla []
8795 sra a,[] sra []
8796 srl a,[] srl []
8797 sub a,[] sub []
8798 xor a,[] xor []
8801 \f
8803 ASGB ASSEMBLER PAGE AY-6
8804 GAMEBOY INSTRUCTION SET
8807 AY.4.5 Load Instructions
8810 ld rg,[] ld [],rg
8811 ld (bc),a ld a,(bc)
8812 ld (de),a ld a,(de)
8813 ld (label),a ld a,(label)
8814 ld (label),sp ld rp,#data
8815 ld sp,hl ld hl,sp
8817 ldd a,(hl) ldd (hl),a
8818 ldi a,(hl) ldi (hl),a
8821 AY.4.6 Call/Return Instructions
8824 call C,label ret C
8825 call NC,label ret NC
8826 call Z,label ret Z
8827 call NZ,label ret NZ
8828 call label ret
8830 rst n
8833 AY.4.7 Jump Instructions
8836 jp C,label jp NC,label
8837 jp Z,label jp NZ,label
8839 jp (hl) jp label
8841 jr C,label jr NC,label
8842 jr Z,label jr NZ,label
8843 jr label
8846 AY.4.8 Bit Manipulation Instructions
8849 bit n,[]
8850 res n,[]
8851 set n,[]
8854 \f
8856 ASGB ASSEMBLER PAGE AY-7
8857 GAMEBOY INSTRUCTION SET
8860 AY.4.9 Input and Output Instructions
8863 in a,(n) in a,(c)
8864 out (n),a out (c),a
8867 AY.4.10 Register Pair Instructions
8870 add hl,rp add hl,sp
8871 add sp,#data
8873 push rp pop rp
8874 \f
8888 APPENDIX BC
8890 ASRAB ASSEMBLER
8898 BC.1 ACKNOWLEDGMENT
8900 Thanks to Ulrich Raich and Razaq Ijoduola for their contribution
8901 of the ASRAB cross assembler.
8903 Ulrich Raich and Razaq Ijoduola
8904 PS Division
8905 CERN
8906 CH-1211 Geneva-23
8907 Ulrich Raich
8908 Ulrich dot Raich at cern dot ch
8913 BC.2 PROCESSOR SPECIFIC DIRECTIVES
8916 The ASRAB assembler is a port of the ASZ80 assembler. This
8917 assembler can process Z80, HD64180 (Z180), and Rabbit 2000/3000
8918 (default) code. The following processor specific assembler
8919 directives specify which processor to target when processing the
8920 input assembler files.
8925 \f
8927 ASRAB ASSEMBLER PAGE BC-2
8928 PROCESSOR SPECIFIC DIRECTIVES
8931 BC.2.1 .r2k Directive
8933 Format:
8935 .r2k
8937 The .r2k directive enables processing of the Rabbit 2000/3000
8938 specific mnemonics. Mnemonics not associated with the Rabbit
8939 2000/3000 processor will be flagged with an 'o' error. Address-
8940 ing modes not supported by the Rabbit 2000/3000 will be flagged
8941 with an 'a' error. A synonym of .r2k is .r3k. The default as-
8942 sembler mode is .r2k.
8944 The .r2k directive also selects the Rabbit 2000/3000
8945 specific cycles count to be output.
8950 BC.2.2 .hd64 Directive
8952 Format:
8954 .hd64
8956 The .hd64 directive enables processing of the HD64180 (Z180)
8957 specific mnemonics not included in the Z80 instruction set.
8958 Rabbit 2000/3000 mnemonics encountered will be flagged with an
8959 'o' error. Addressing modes not supported by the HD64180 (Z180)
8960 will be flagged with an 'a' error. A synonym of .hd64 is .z180.
8962 The .hd64 directive also selects the HD64180/Z180 specific
8963 cycles count to be output.
8968 BC.2.3 .z80 Directive
8970 Format:
8972 .z80
8974 The .z80 directive enables processing of the Z80 specific
8975 mnemonics. HD64180 and Rabbit 2000/3000 specific mnemonics will
8976 be flagged with an 'o' error. Addressing modes not supported by
8977 the z80 will be flagged with an 'a' error.
8979 The .z80 directive also selects the Z80 specific cycles
8980 count to be output.
8982 \f
8984 ASRAB ASSEMBLER PAGE BC-3
8985 PROCESSOR SPECIFIC DIRECTIVES
8991 BC.2.4 The .__.CPU. Variable
8994 The value of the pre-defined symbol '.__.CPU.' corresponds
8995 to the selected processor type. The default value is 0 which
8996 corresponds to the default processor type. The following table
8997 lists the processor types and associated values for the ASRAB
8998 assembler:
9000 Processor Type .__.CPU. Value
9001 -------------- --------------
9002 .r2k / .r3k 0
9003 .hd64 / .z180 1
9004 .z80 2
9007 The variable '.__.CPU.' is by default defined as local and
9008 will not be output to the created .rel file. The assembler com-
9009 mand line options -g or -a will not cause the local symbol to be
9010 output to the created .rel file.
9012 The assembler .globl directive may be used to change the
9013 variable type to global causing its definition to be output to
9014 the .rel file. The inclusion of the definition of the variable
9015 '.__.CPU.' might be a useful means of validating that seperately
9016 assembled files have been compiled for the same processor type.
9017 The linker will report an error for variables with multiple non
9018 equal definitions.
9019 \f
9021 ASRAB ASSEMBLER PAGE BC-4
9022 PROCESSOR SPECIFIC DIRECTIVES
9025 BC.3 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
9029 BC.3.1 Instruction Symbols
9032 b Bit select
9033 (000 = bit 0, 001 = bit 1,
9034 010 = bit 2, 011 = bit 3,
9035 100 = bit 4, 101 = bit 5,
9036 110 = bit 6, 111 = bit 7)
9037 cc Condition code select
9038 (00 = NZ, 01 = Z, 10 = NC, 11 = C)
9039 d 8-bit (signed) displacement.
9040 Expressed in two\'s complement.
9041 dd word register select-destination
9042 (00 = BC, 01 = DE, 10 = HL, 11 = SP)
9043 dd' word register select-alternate
9044 (00 = BC', 01 = DE', 10 = HL')
9045 e 8-bit (signed) displacement added to PC.
9046 f condition code select
9047 (000 = NZ, 001 = Z, 010 = NC, 011 = C,
9048 100 = LZ/NV, 101 = LO/V, 110 = P, 111 = M)
9049 m the most significant bits(MSB) of a 16-bit constant
9050 mn 16-bit constant
9051 n 8-bit constant or the least significant bits(LSB)
9052 of a 16-bit constant
9053 r, g byte register select
9054 (000 = B, 001 = C, 010 = D, 011 = E,
9055 100 = H, 101 = L, 111 = A)
9056 ss word register select-source
9057 (00 = BC, 01 = DE, 10 = HL, 11 = SP)
9058 v Restart address select
9059 (010 = 0020h, 011 = 0030h, 100 = 0040h,
9060 101 = 0050h, 111 = 0070h)
9061 x an 8-bit constant to load into the XPC
9062 xx word register select
9063 (00 = BC, 01 = DE, 10 = IX, 11 = SP)
9064 yy word register select
9065 (00 = BC, 01 = DE, 10 = IY, 11 = SP)
9066 zz word register select
9067 (00 = BC, 01 = DE, 10 = HL, 11 = AF)
9070 \f
9072 ASRAB ASSEMBLER PAGE BC-5
9073 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
9076 C - carry bit set
9077 M - sign bit set
9078 NC - carry bit clear
9079 NZ - zero bit clear
9080 P - sign bit clear
9081 PE - parity even
9082 V - overflow bit set
9083 PO - parity odd
9084 NV - overflow bit clear
9085 Z - zero bit set
9088 The terms m, mn, n, and x may all be expressions. The terms b
9089 and v are not allowed to be external references.
9090 \f
9092 ASRAB ASSEMBLER PAGE BC-6
9093 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
9096 BC.3.2 Rabbit Instructions
9099 The following list of instructions (with explicit address-
9100 ing modes) are available in the Rabbit 2000/3000 assembler mode.
9101 Those instructions denoted by an asterisk (*) are additional in-
9102 structions not available in the HD64180 or Z80 assembler mode.
9104 ADC A,n DEC IX LD A,EIR
9105 ADC A,r DEC IY LD A,IIR
9106 ADC A,(HL) DEC r *LD A,XPC
9107 ADC A,(IX+d) DEC ss LD A,(BC)
9108 ADC A,(IY+d) DEC (HL) LD A,(DE)
9109 ADC HL,ss DEC (IX+d) LD A,(mn)
9110 ADD A,n DEC (IY+d) *LD dd,BC
9111 ADD A,r DJNZ e *LD dd,DE
9112 ADD A,(HL) LD dd,mn
9113 ADD A,(IX+d) EX AF,AF LD dd,(mn)
9114 ADD A,(IY+d) EX DE,HL LD EIR,A
9115 ADD HL,ss EX DE,HL *LD HL,IX
9116 ADD IX,xx EX (SP),HL *LD HL,IY
9117 ADD IY,yy EX (SP),IX *LD HL,(HL+d)
9118 *ADD SP,d EX (SP),IY *LD HL,(IX+d)
9119 *ALTD EXX *LD HL,(IY+d)
9120 *AND HL,DE LD HL,(mn)
9121 *AND IX,DE INC IX *LD HL,(SP+n)
9122 *AND IY,DE INC IY LD IIR,A
9123 AND n INC r *LD IX,HL
9124 AND r INC ss LD IX,mn
9125 AND (HL) INC (HL) LD IX,(mn)
9126 AND (IX+d) INC (IX+d) *LD IX,(SP+n)
9127 AND (IY+d) INC (IY+d) *LD IY,HL
9128 *IOE LD IY,mn
9129 BIT b,r *IOI LD IY,(mn)
9130 BIT b,(HL) *IPRES *LD IY,(SP+n)
9131 BIT b,(IX+d) *IPSET 0 LD r,g
9132 BIT b,(IY+d) *IPSET 1 LD r,n
9133 *BOOL HL *IPSET 2 LD r,(HL)
9134 *BOOL IX *IPSET 3 LD r,(IX+d)
9135 *BOOL IY LD r,(IY+d)
9136 JP f,mn LD SP,HL
9137 CALL mn JP mn LD SP,IX
9138 CCF JP (HL) LD SP,IY
9139 CP n JP (IX) *LD XPC,A
9140 CP r JP (IY) LD (BC),A
9141 CP (HL) JR cc,e LD (DE),A
9142 CP (IX+d) JR e LD (HL),n
9143 CP (IY+d) LD (HL),r
9144 CPL *LCALL x,mn
9145 \f
9147 ASRAB ASSEMBLER PAGE BC-7
9148 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
9151 *LD (HL+d),HL *POP IP SBC A,n
9152 *LD (IX+d),HL POP IX SBC A,r
9153 LD (IX+d),n POP IY SBC A,(HL)
9154 LD (IX+d),r POP zz SBC HL,ss
9155 *LD (IY+d),HL *PUSH IP SBC (IX+d)
9156 LD (IY+d),n PUSH IX SBC (IY+d)
9157 LD (IY+d),r PUSH IY SCF
9158 LD (mn),A PUSH zz SET b,r
9159 LD (mn),HL SET b,(HL)
9160 LD (mn),IX RA SET b,(IX+d)
9161 LD (mn),IY RES b,r SET b,(IY+d)
9162 LD (mn),ss RES b,(HL) SLA r
9163 *LD (SP+n),HL RES b,(IX+d) SLA (HL)
9164 *LD (SP+n),IX RES b,(IY+d) SLA (IX+d)
9165 *LD (SP+n),IY RET SLA (IY+d)
9166 LDD RET f SRA r
9167 LDDR *RETI SRA (HL)
9168 LDI *RL DE SRA (IX+d)
9169 LDIR RL r SRA (IY+d)
9170 *LDP HL,(HL) RL (HL) SRL r
9171 *LDP HL,(IX) RL (IX+d) SRL (HL)
9172 *LDP HL,(IY) RL (IY+d) SRL (IX+d)
9173 *LDP HL,(mn) RLA SRL (IY+d)
9174 *LDP IX,(mn) RLC r SUB n
9175 *LDP IY,(mn) RLC (HL) SUB r
9176 *LDP (HL),HL RLC (IX+d) SUB (HL)
9177 *LDP (IX),HL RLC (IY+d) SUB (IX+d)
9178 *LDP (IY),HL RLCA SUB (IY+d)
9179 *LDP (mn),HL *RR DE
9180 *LDP (mn),IX *RR HL XOR n
9181 *LDP (mn),IY *RR IX XOR r
9182 LJP x,mn *RR IY XOR (HL)
9183 LRET RR r XOR (IX+d)
9184 RR (HL) XOR (IY+d)
9185 *MUL RR (IX+d)
9186 RR (IY+d)
9187 NEG RRC r
9188 NOP RRC (HL)
9189 RRC (IX+d)
9190 *OR HL,DE RRC (IY+d)
9191 *OR IX,DE RRCA
9192 *OR IY,DE RST v
9193 OR n
9194 OR r
9195 OR (HL)
9196 OR (IX+d)
9197 OR (IY+d)
9202 \f
9204 ASRAB ASSEMBLER PAGE BC-8
9205 Z80/HD64180 ADDRESSING AND INSTRUCTIONS
9208 BC.4 Z80/HD64180 ADDRESSING AND INSTRUCTIONS
9210 The following list specifies the format for each Z80/HD64180 ad-
9211 dressing mode supported by ASZ80:
9213 #data immediate data
9214 byte or word data
9216 n byte value
9218 rg a byte register
9219 a,b,c,d,e,h,l
9221 rp a register pair
9222 bc,de,hl
9224 (hl) implied addressing or
9225 register indirect addressing
9227 (label) direct addressing
9229 (ix+offset) indexed addressing with
9230 offset(ix) an offset
9232 label call/jmp/jr label
9234 The terms data, n, label, and offset, may all be expressions.
9235 The terms dir and offset are not allowed to be external refer-
9236 ences.
9238 The following tables list all Z80/HD64180 mnemonics recog-
9239 nized by the ASRAB assembler. The designation [] refers to a
9240 required addressing mode argument. Note that not all addressing
9241 modes are valid with every instruction, refer to the Z80/HD64180
9242 technical data for valid modes.
9245 \f
9247 ASRAB ASSEMBLER PAGE BC-9
9248 Z80/HD64180 ADDRESSING AND INSTRUCTIONS
9251 BC.4.1 Inherent Instructions
9253 ccf cpd
9254 cpdr cpi
9255 cpir cpl
9256 daa di
9257 ei exx
9258 halt neg
9259 nop reti
9260 retn rla
9261 rlca rld
9262 rra rrca
9263 rrd scf
9268 BC.4.2 Implicit Operand Instructions
9270 adc a,[] adc []
9271 add a,[] add []
9272 and a,[] and []
9273 cp a,[] cp []
9274 dec a,[] dec []
9275 inc a,[] inc []
9276 or a,[] or []
9277 rl a,[] rl []
9278 rlc a,[] rlc []
9279 rr a,[] rr []
9280 rrc a,[] rrc []
9281 sbc a,[] sbc []
9282 sla a,[] sla []
9283 sra a,[] sra []
9284 srl a,[] srl []
9285 sub a,[] sub []
9286 xor a,[] xor []
9289 \f
9291 ASRAB ASSEMBLER PAGE BC-10
9292 Z80/HD64180 ADDRESSING AND INSTRUCTIONS
9295 BC.4.3 Load Instruction
9297 ld rg,[] ld [],rg
9298 ld (bc),a ld a,(bc)
9299 ld (de),a ld a,(de)
9300 ld (label),a ld a,(label)
9301 ld (label),rp ld rp,(label)
9302 ld i,a ld r,a
9303 ld a,i ld a,r
9304 ld sp,hl ld sp,ix
9305 ld sp,iy ld rp,#data
9306 ldd lddr
9307 ldi ldir
9312 BC.4.4 Call/Return Instructions
9314 call C,label ret C
9315 call M,label ret M
9316 call NC,label ret NC
9317 call NZ,label ret NZ
9318 call P,label ret P
9319 call PE,label ret PE
9320 call PO,label ret PO
9321 call Z,label ret Z
9322 call label ret
9327 BC.4.5 Jump and Jump to Subroutine Instructions
9329 jp C,label jp M,label
9330 jp NC,label jp NZ,label
9331 jp P,label jp PE,label
9332 jp PO,label jp Z,label
9333 jp (hl) jp (ix)
9334 jp (iy) jp label
9335 djnz label
9336 jr C,label jr NC,label
9337 jr NZ,label jr Z,label
9338 jr label
9341 \f
9343 ASRAB ASSEMBLER PAGE BC-11
9344 Z80/HD64180 ADDRESSING AND INSTRUCTIONS
9347 BC.4.6 Bit Manipulation Instructions
9349 bit n,[]
9350 res n,[]
9351 set n,[]
9356 BC.4.7 Interrupt Mode and Reset Instructions
9358 im n
9359 im n
9360 im n
9361 rst n
9366 BC.4.8 Input and Output Instructions
9368 in a,(n) in rg,(c)
9369 ind indr
9370 ini inir
9371 out (n),a out (c),rg
9372 outd otdr
9373 outi otir
9378 BC.4.9 Register Pair Instructions
9380 add hl,rp add ix,rp
9381 add iy,rp
9382 adc hl,rp sbc hl,rp
9383 ex (sp),hl ex (sp),ix
9384 ex (sp),iy
9385 ex de,hl
9386 ex af,af'
9387 push rp pop rp
9390 \f
9392 ASRAB ASSEMBLER PAGE BC-12
9393 Z80/HD64180 ADDRESSING AND INSTRUCTIONS
9396 BC.4.10 HD64180 Specific Instructions
9398 in0 rg,(n)
9399 out0 (n),rg
9400 otdm otdmr
9401 otim otimr
9402 mlt bc mlt de
9403 mlt hl mlt sp
9404 slp
9405 tst a
9406 tstio #data
9407 \f
9421 APPENDIX BI
9423 ASZ80 ASSEMBLER
9429 BI.1 .z80 DIRECTIVE
9431 Format:
9433 .z80
9435 The .z80 directive enables processing of only the z80 specific
9436 mnemonics. HD64180/Z180 mnemonics encountered without the .hd64
9437 directive will be flagged with an 'o' error.
9439 The .z80 directive also selects the Z80 specific cycles
9440 count to be output.
9443 BI.2 .hd64 DIRECTIVE
9445 Format:
9447 .hd64
9449 The .hd64 directive enables processing of the HD64180/Z180
9450 specific mnemonics not included in the Z80 instruction set.
9451 HD64180/Z180 mnemonics encountered without the .hd64 directive
9452 will be flagged with an 'o' error. A synonym of .hd64 is .z180.
9454 The .hd64 directive also selects the HD64180/Z180 specific
9455 cycles count to be output.
9458 \f
9460 ASZ80 ASSEMBLER PAGE BI-2
9461 THE .__.CPU. VARIABLE
9464 BI.3 THE .__.CPU. VARIABLE
9467 The value of the pre-defined symbol '.__.CPU.' corresponds
9468 to the selected processor type. The default value is 0 which
9469 corresponds to the default processor type. The following table
9470 lists the processor types and associated values for the ASZ80
9471 assembler:
9473 Processor Type .__.CPU. Value
9474 -------------- --------------
9475 .z80 0
9476 .hd64 / .z180 1
9479 The variable '.__.CPU.' is by default defined as local and
9480 will not be output to the created .rel file. The assembler com-
9481 mand line options -g or -a will not cause the local symbol to be
9482 output to the created .rel file.
9484 The assembler .globl directive may be used to change the
9485 the variable type to global causing its definition to be output
9486 to the .rel file. The inclusion of the definition of the vari-
9487 able '.__.CPU.' might be a useful means of validating that
9488 seperately assembled files have been compiled for the same pro-
9489 cessor type. The linker will report an error for variables with
9490 multiple non equal definitions.
9493 BI.4 Z80 REGISTER SET AND CONDITIONS
9496 The following is a complete list of register designations
9497 and condition mnemonics:
9499 byte registers - a,b,c,d,e,h,l,i,r
9500 register pairs - af,af',bc,de,hl
9501 word registers - pc,sp,ix,iy
9503 C - carry bit set
9504 M - sign bit set
9505 NC - carry bit clear
9506 NZ - zero bit clear
9507 P - sign bit clear
9508 PE - parity even
9509 PO - parity odd
9510 Z - zero bit set
9513 \f
9515 ASZ80 ASSEMBLER PAGE BI-3
9516 Z80 INSTRUCTION SET
9519 BI.5 Z80 INSTRUCTION SET
9522 The following list specifies the format for each addressing
9523 mode supported by ASZ80:
9525 #data immediate data
9526 byte or word data
9528 n byte value
9530 rg a byte register
9531 a,b,c,d,e,h,l
9533 rp a register pair
9534 bc,de,hl
9536 (hl) implied addressing or
9537 register indirect addressing
9539 (label) direct addressing
9541 offset(ix) indexed addressing with
9542 an offset
9544 label call/jmp/jr label
9546 The terms data, n, label, and offset may all be expressions.
9548 Note that not all addressing modes are valid with every in-
9549 struction, refer to the Z80/HD64180/Z180 technical data for
9550 valid modes.
9552 The following tables list all Z80/HD64180/Z180 mnemonics
9553 recognized by the ASZ80 assembler. The designation [] refers to
9554 a required addressing mode argument.
9555 \f
9557 ASZ80 ASSEMBLER PAGE BI-4
9558 Z80 INSTRUCTION SET
9561 BI.5.1 Inherent Instructions
9563 ccf cpd
9564 cpdr cpi
9565 cpir cpl
9566 daa di
9567 ei exx
9568 halt neg
9569 nop reti
9570 retn rla
9571 rlca rld
9572 rra rrca
9573 rrd scf
9576 BI.5.2 Implicit Operand Instructions
9578 adc a,[] adc []
9579 add a,[] add []
9580 and a,[] and []
9581 cp a,[] cp []
9582 dec a,[] dec []
9583 inc a,[] inc []
9584 or a,[] or []
9585 rl a,[] rl []
9586 rlc a,[] rlc []
9587 rr a,[] rr []
9588 rrc a,[] rrc []
9589 sbc a,[] sbc []
9590 sla a,[] sla []
9591 sra a,[] sra []
9592 srl a,[] srl []
9593 sub a,[] sub []
9594 xor a,[] xor []
9595 \f
9597 ASZ80 ASSEMBLER PAGE BI-5
9598 Z80 INSTRUCTION SET
9601 BI.5.3 Load Instruction
9603 ld rg,[] ld [],rg
9604 ld (bc),a ld a,(bc)
9605 ld (de),a ld a,(de)
9606 ld (label),a ld a,(label)
9607 ld (label),rp ld rp,(label)
9608 ld i,a ld r,a
9609 ld a,i ld a,r
9610 ld sp,hl ld sp,ix
9611 ld sp,iy ld rp,#data
9613 ldd lddr
9614 ldi ldir
9617 BI.5.4 Call/Return Instructions
9619 call C,label ret C
9620 call M,label ret M
9621 call NC,label ret NC
9622 call NZ,label ret NZ
9623 call P,label ret P
9624 call PE,label ret PE
9625 call PO,label ret PO
9626 call Z,label ret Z
9627 call label ret
9630 BI.5.5 Jump and Jump to Subroutine Instructions
9632 jp C,label jp M,label
9633 jp NC,label jp NZ,label
9634 jp P,label jp PE,label
9635 jp PO,label jp Z,label
9637 jp (hl) jp (ix)
9638 jp (iy) jp label
9640 djnz label
9642 jr C,label jr NC,label
9643 jr NZ,label jr Z,label
9644 jr label
9645 \f
9647 ASZ80 ASSEMBLER PAGE BI-6
9648 Z80 INSTRUCTION SET
9651 BI.5.6 Bit Manipulation Instructions
9653 bit n,[]
9654 res n,[]
9655 set n,[]
9658 BI.5.7 Interrupt Mode and Reset Instructions
9660 im n
9661 im n
9662 im n
9663 rst n
9666 BI.5.8 Input and Output Instructions
9668 in a,(n) in rg,(c)
9669 ind indr
9670 ini inir
9672 out (n),a out (c),rg
9673 outd otdr
9674 outi otir
9677 BI.5.9 Register Pair Instructions
9679 add hl,rp add ix,rp
9680 add iy,rp
9682 adc hl,rp sbc hl,rp
9684 ex (sp),hl ex (sp),ix
9685 ex (sp),iy
9686 ex de,hl
9687 ex af,af'
9689 push rp pop rp
9690 \f
9692 ASZ80 ASSEMBLER PAGE BI-7
9693 Z80 INSTRUCTION SET
9696 BI.5.10 HD64180/Z180 Specific Instructions
9698 in0 rg,(n)
9699 out0 (n),rg
9701 otdm otdmr
9702 otim otimr
9704 mlt bc mlt de
9705 mlt hl mlt sp
9707 slp
9709 tst a
9710 tstio #data
9711 \f