2 pr28982.c from the execute part of the gcc torture tests.
12 #if defined(__SDCC_MODEL_SMALL) || defined(__SDCC_MODEL_MEDIUM) || \
13 (defined(__SDCC_mcs51) && defined(__SDCC_STACK_AUTO)) || defined (__SDCC_pdk14) || defined (__SDCC_pdk15) || defined (__SDCC_pic14)
17 /* PR rtl-optimization/28982. Function foo() does the equivalent of:
19 float tmp_results[NVARS];
20 for (int i = 0; i < NVARS; i++)
23 float *ptr = ptrs[i], result = 0;
24 for (int j = 0; j < n; j++)
25 result += *ptr, ptr += inc;
26 tmp_results[i] = result;
28 memcpy (results, tmp_results, sizeof (results));
30 but without the outermost loop. The idea is to create high register
31 pressure and ensure that some INC and PTR variables are spilled.
33 On ARM targets, sequences like "result += *ptr, ptr += inc" can
34 usually be implemented using (mem (post_modify ...)), and we do
35 indeed create such MEMs before reload for this testcase. However,
36 (post_modify ...) is not a valid address for coprocessor loads, so
37 for -mfloat-abi=softfp, reload reloads the POST_MODIFY into a base
38 register. GCC did not deal correctly with cases where the base and
39 index of the POST_MODIFY are themselves reloaded. */
43 X( 0), X( 1), X( 2), X( 3), X( 4), X( 5), X( 6), X( 7), X( 8), X( 9), \
44 X(10), X(11), X(12), X(13), X(14), X(15), X(16), X(17), X(18), X(19)
46 #define DECLAREI(INDEX) inc##INDEX = incs[INDEX]
47 #define DECLAREF(INDEX) *ptr##INDEX = ptrs[INDEX], result##INDEX = 0
48 #define LOOP(INDEX) result##INDEX += *ptr##INDEX, ptr##INDEX += inc##INDEX
49 #define COPYOUT(INDEX) results[INDEX] = result##INDEX
60 float MULTI (DECLAREF
);
66 float input
[NITER
* NVARS
];
70 testTortureExecute (void)
75 for (i
= 0; i
< NVARS
; i
++)
76 ptrs
[i
] = input
+ i
, incs
[i
] = i
;
77 for (i
= 0; i
< NITER
* NVARS
; i
++)
80 for (i
= 0; i
< NVARS
; i
++)
81 if (results
[i
] != i
* NITER
* (NITER
+ 1) / 2)