sdcc/support/scripts/pic14-header-parser.pl

   1 #!/usr/bin/perl -w
   2
   3 =back
   4
   5   Copyright (C) 2012-2014, Molnar Karoly <molnarkaroly@users.sf.net>
   6
   7     This file is part of SDCC.
   8
   9     This software is provided 'as-is', without any express or implied
  10     warranty.  In no event will the authors be held liable for any damages
  11     arising from the use of this software.
  12
  13     Permission is granted to anyone to use this software for any purpose,
  14     including commercial applications, and to alter it and redistribute it
  15     freely, subject to the following restrictions:
  16
  17     1. The origin of this software must not be misrepresented; you must not
  18        claim that you wrote the original software. If you use this software
  19        in a product, an acknowledgment in the product documentation would be
  20        appreciated but is not required.
  21
  22     2. Altered source versions must be plainly marked as such, and must not be
  23        misrepresented as being the original software.
  24
  25     3. This notice may not be removed or altered from any source distribution.
  26
  27 ================================================================================
  28
  29     Proposal for use: ./pic14-header-parser.pl -gp
  30
  31     This program creates seven files in the actual directory:
  32
  33         adc.h.gen
  34         ccp.h.gen
  35         pwm.h.gen
  36         i2c.h.gen
  37         spi.h.gen
  38         usart.h.gen
  39         peripheral.groups
  40
  41     In these the MCUs can be seen in groups, according to a periphery.
  42     These informations helps to realize the handling of periphery.
  43     Of course necessary to study the data sheets as well.
  44
  45     $Id$
  46 =cut
  47
  48 use Data::Dumper;
  49 use strict;
  50 use warnings;
  51 no if $] >= 5.018, warnings => "experimental::smartmatch";        # perl 5.16
  52 use 5.10.1;
  53 use feature 'switch';           # Starting from 5.10.1.
  54 use POSIX 'ULONG_MAX';
  55
  56 use constant FALSE => 0;
  57 use constant TRUE  => 1;
  58
  59 use constant P_NO_SHOW_BITS     => 0;
  60 use constant P_NO_SHOW_IF_EMPTY => 1;
  61 use constant P_ALWAYS_SHOW      => 2;
  62 use constant P_SHOW_ONLY_NAME   => 3;
  63
  64 my @default_paths =
  65   (
  66   '/usr/share/sdcc/non-free/include',
  67   '/usr/share/sdcc/include',
  68   '/usr/local/share/sdcc/non-free/include',
  69   '/usr/local/share/sdcc/include'
  70   );
  71
  72 my $default_port = 'pic14';
  73 my $header_name_filter = 'pic1[026][a-z]+\d+([a-z]|([a-z]+\d+)?).h';
  74
  75 my $include_path;
  76 my $out_tail = '.gen';
  77 my $peri_group = 'peripheral.groups';
  78 my $table_border = (' ' x 19) . '+' . ('---------+' x 8);
  79
  80 my %reg_addresses = ();
  81
  82 my @some_ADC_registers =
  83   (
  84   'ADCON\d+[HL]?|AD\d*CON\d*',
  85   'ADCOMCON',
  86   'AD\d*RES[HL]?',
  87   'ANSEL[\dHL]?',
  88   'ANSEL[A-Z]'
  89   );
  90
  91 #-----------------------------------------------
  92
  93 =back
  94         The structure of one element of the @periphery_table array.
  95
  96         {
  97         NAME => '',
  98         REGS => [
  99                   {
 100                   VALID_REGS => '',
 101                   VALID_BITS => '',
 102                   PRINT_MODE => P_ALWAYS_SHOW
 103                   },
 104
 105                        ...
 106
 107                   {
 108                   }
 109                 ]
 110         }
 111
 112 =cut
 113
 114 my @periphery_table = ();
 115
 116 #-----------------------------------------------
 117
 118 =back
 119         The structure of one element of the @io_table_by_mcu hash:
 120
 121         {
 122         'ADC'   => {
 123                    'AN0' => [],
 124
 125                    ...
 126
 127                    'AN4' => []
 128                    },
 129
 130         ...
 131
 132         'USART' => {}
 133         }
 134 =cut
 135
 136 my %io_table_by_mcu = ();
 137
 138 #-----------------------------------------------
 139
 140 =back
 141         The structure of one element of the @io_dir_table_by_mcu hash:
 142
 143         {
 144         'ADC'   => {},
 145
 146         ...
 147
 148         'USART' => {
 149                    'RX' => 1,
 150                    'TX' => 0
 151                    }
 152         }
 153 =cut
 154
 155 my %io_dir_table_by_mcu = ();
 156
 157 #-----------------------------------------------
 158
 159 =back
 160         The structure of one element of the @mcu_raw array:
 161
 162         {       Descriptor of MCU.
 163         NAME      => '',     The name of MCU.
 164         ENHANCED  => 0,      This is enhanced MCU.
 165         REG_REFS  => {       Accelerate searching of the registers.
 166                      'PIR1'  => register_reference, ---+
 167                      'TRISD' => register_reference, ---|---+
 168                      ...                               |   |
 169                      ...                               |   .
 170                      },                                |   .
 171         REG_ARRAY => [      The array of registers.    |   .
 172                        {                A register. <--+
 173                        NAME     => 'PIR1',  The name of register.
 174                        ADDRESS  => 0,       The address of register.
 175                        BITNAMES => [        The bits of register.
 176                                      [],      The names of bit.
 177                                      [],
 178                                      [],
 179                                      [],
 180                                      [],
 181                                      [],
 182                                      [],
 183                                      []
 184                                    ]
 185                        },
 186
 187                        ...
 188
 189                        {
 190                        }
 191                      ]
 192         }
 193 =cut
 194
 195 my @mcu_raw = ();
 196
 197 #-----------------------------------------------
 198
 199 =back
 200         The structure of one element of the @mcu_filtered and @mcu_groups arrays:
 201
 202         {       Descriptor of MCU.
 203         NAME       => '',     The name of MCU.
 204         ENHANCED   => 0,      This is enhanced MCU.
 205         IN_GROUP   => 0,      This member of a MCU group.
 206         REG_REFS   => {       Accelerate searching of the registers.
 207                       'PIR1'  => register_reference, ----------------------+
 208                       'TRISD' => register_reference, ----------------------|---+
 209                       ...                                                  |   |
 210                       ...                                                  |   |
 211                       },                                                   |   .
 212         REG_GROUPS => [      The group of all necessary register.          |   .
 213                         {                The first register group.         |   .
 214                         VALID_REGS => '',    The valid names of registers. |
 215                         VALID_BITS => '',    The valid names of bits.      |
 216                         PRINT_MODE => 0,     The mode of print.            |
 217                         REG_ARRAY  => [      The array of registers.       |
 218                                         {                A register. <-----+
 219                                         NAME     => 'PIR1',  The name of register.
 220                                         ADDRESS  => 0,       The address of register.
 221                                         GROUP    => undef,   Back reference of REG_GROUPS.
 222                                         TOUCHED  => 0,       Touched register during the search.
 223                                         EMPTY    => 0,       True if the register became empty after the filtering.
 224                                         BITNAMES => [        The bits of register.
 225                                                       [],      The names of bit.
 226                                                       [],
 227                                                       [],
 228                                                       [],
 229                                                       [],
 230                                                       [],
 231                                                       [],
 232                                                       []
 233                                                     ]
 234                                         },
 235
 236                                         ...
 237
 238                                         {
 239                                         }
 240                                       ]
 241                         },
 242
 243                         ...
 244
 245                         {                The last register group.
 246                         }
 247                       ]
 248         }
 249 =cut
 250
 251 my @mcu_filtered = ();
 252
 253 my @mcu_groups = ();
 254
 255 my %definitions = ();
 256 my %io_groups = ();
 257
 258 #-----------------------------------------------
 259
 260 my $verbose = 0;
 261 my $make_groups;
 262 my $only_prime;
 263 my $out_handler;
 264 my $initial_border;
 265
 266 my @regular = ();
 267 my @enhanced = ();
 268 my $peri_groups = '';
 269
 270 ################################################################################
 271 ################################################################################
 272 ################################################################################
 273 ################################################################################
 274
 275 sub basename($)
 276   {
 277   return ($_[0] =~ /([^\/]+)$/) ? $1 : '';
 278   }
 279
 280 #-------------------------------------------------------------------------------
 281
 282 sub Log
 283   {
 284   return if (pop(@_) > $verbose);
 285   foreach (@_) { print STDERR $_; }
 286   print STDERR "\n";
 287   }
 288
 289 #-------------------------------------------------------------------------------
 290
 291 sub Out
 292   {
 293   foreach (@_) { print $out_handler $_; }
 294   }
 295
 296 #-------------------------------------------------------------------------------
 297
 298 sub Outl
 299   {
 300   Out(@_);
 301   print $out_handler "\n";
 302   }
 303
 304 #-------------------------------------------------------------------------------
 305
 306 sub Outf
 307   {
 308   printf $out_handler (shift(@_), @_);
 309   }
 310
 311 #-------------------------------------------------------------------------------
 312
 313 sub Outfl
 314   {
 315   Outf(@_);
 316   print $out_handler "\n";
 317   }
 318
 319 #-------------------------------------------------------------------------------
 320
 321 sub smartCompare($$)
 322   {
 323   my ($Str1, $Str2) = @_;
 324
 325   if (${$Str1} =~ /^\d/o && ${$Str2} =~ /^\d/o)
 326     {
 327         # $Str1 number and $Str2 number
 328     return (int(${$Str1}) <=> int(${$Str2}));
 329     }
 330
 331   return (${$Str1} cmp ${$Str2});
 332   }
 333
 334 #-------------------------------------------------------------------------------
 335
 336 sub smartSort($$)
 337   {
 338   my @a_s = ($_[0] =~ /(\d+|\D+)/go);
 339   my @b_s = ($_[1] =~ /(\d+|\D+)/go);
 340   my ($i, $k, $end, $ret);
 341
 342   $i = scalar(@a_s);
 343   $k = scalar(@b_s);
 344
 345   if ($i < $k)
 346     {
 347     $end = $i;
 348     $ret = -1;
 349     }
 350   elsif ($i == $k)
 351     {
 352     $end = $i;
 353     $ret = 0;
 354     }
 355   else
 356     {
 357     $end = $k;
 358     $ret = 1;
 359     }
 360
 361   for ($i = 0; $i < $end; ++$i)
 362     {
 363     $k = smartCompare(\$a_s[$i], \$b_s[$i]);
 364
 365     return $k if ($k != 0);
 366     }
 367
 368   return $ret;
 369   }
 370
 371 #-------------------------------------------------------------------------------
 372
 373 sub exist_in_list($$)
 374   {
 375   my ($List, $Member) = @_;
 376
 377   foreach (@{$List})
 378     {
 379     return TRUE if ($Member =~ /^$_$/);
 380     }
 381
 382   return FALSE;
 383   }
 384
 385 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 386 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 387 #@@@@@@@@@@@@@@@@@@@@@@                                 @@@@@@@@@@@@@@@@@@@@@@@@
 388 #@@@@@@@@@@@@@@@@@@@@@  Populates the peripheral table.  @@@@@@@@@@@@@@@@@@@@@@@
 389 #@@@@@@@@@@@@@@@@@@@@@@                                 @@@@@@@@@@@@@@@@@@@@@@@@
 390 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 391 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 392
 393 sub add_periphery($)
 394   {
 395   my $peri = {
 396              NAME => lc($_[0]),
 397              REGS => []
 398              };
 399
 400   push(@periphery_table, $peri);
 401   return $peri->{REGS};
 402   }
 403
 404 #-------------------------------------------------------------------------------
 405
 406 sub add_reg_def($)
 407   {
 408   my $def = {
 409             VALID_REGS => '',
 410             VALID_BITS => '',
 411             PRINT_MODE => P_ALWAYS_SHOW
 412             };
 413
 414   push(@{$_[0]}, $def);
 415   }
 416
 417 #-------------------------------------------------------------------------------
 418
 419 sub resolve_define($)
 420   {
 421   my $Name = $_[0];
 422   my $ig = \@{$io_groups{$Name}};
 423   my @array = ();
 424   my $r;
 425
 426   if (defined($ig) && scalar(@{$ig}) > 0)
 427     {
 428     foreach (@{$ig})
 429       {
 430       $r = $definitions{$_};
 431       push(@array, ((defined($r)) ? $r : $_));
 432       }
 433     }
 434   else
 435     {
 436     $r = $definitions{$Name};
 437     push(@array, ((defined($r)) ? $r : $Name));
 438     }
 439
 440   return \@array;
 441   }
 442
 443 #-------------------------------------------------------------------------------
 444
 445 sub add_io_pins($$$)
 446   {
 447   my ($Mcu_group, $Peri, $Pins) = @_;
 448   my %pin_groups = ();
 449   my ($mcu, $io);
 450   my @ports;
 451
 452   foreach (@{$Pins})
 453     {
 454     if ($_ !~ /^(\w+):(\S+)$/o)
 455       {
 456       print STDERR "This piece is wrong: \"$_\" (" . join(',', @{$Mcu_group}) . ")\n";
 457       exit(1);
 458       }
 459
 460     $io = $1;
 461     @ports = ();
 462
 463     foreach (split('/', $2))
 464       {
 465       if ($_ =~ /^(\w+)\[(\d+)-(\d+)\]$/o)
 466         {
 467         # This is a section. E.g.: "RI[0-8]"
 468
 469         my ($name, $first, $second) = ($1, int($2), int($3));
 470
 471         if ($first > $second)
 472           {
 473           print STDERR "\"$_\" The first number ($first) greather than the second number ($second)!\n";
 474           exit(1);
 475           }
 476
 477         while ($first <= $second)
 478           {
 479           push(@ports, @{resolve_define("$name$first")});
 480           ++$first;
 481           }
 482         }
 483       else
 484         {
 485         # This is a name. E.g.: "RD7" or "RO2"
 486
 487         push(@ports, @{resolve_define($_)});
 488         }
 489       } # foreach (split('/', $2))
 490
 491     $pin_groups{$io} = [ sort {$a cmp $b} @ports ];
 492     } # foreach (@{$Pins})
 493
 494   foreach $mcu (@{$Mcu_group})
 495     {
 496     foreach $io (keys(%pin_groups))
 497       {
 498       $io_table_by_mcu{$mcu}->{$Peri}{$io} = [ @{$pin_groups{$io}} ];
 499       }
 500     }
 501   }
 502
 503 #-------------------------------------------------------------------------------
 504
 505 sub add_io_dir($$$)
 506   {
 507   my ($Mcu_group, $Peri, $Pins) = @_;
 508   my %pin_groups = ();
 509   my ($mcu, $io, $dir);
 510   my @ports;
 511
 512   foreach (@{$Pins})
 513     {
 514     if ($_ !~ /^(\w+):([01])$/o)
 515       {
 516       print STDERR "This piece is wrong: \"$_\" (" . join(',', @{$Mcu_group}) . ")\n";
 517       exit(1);
 518       }
 519
 520     $dir = int($2);
 521     @ports = @{resolve_define($1)};
 522
 523     if (@ports > 1)
 524       {
 525       print STDERR "Only one I/O line can be specified: \"$_\" (" . join(',', @{$Mcu_group}) . ")\n";
 526       exit(1);
 527       }
 528
 529     $pin_groups{$ports[0]} = $dir;
 530     } # foreach (@{$Pins})
 531
 532   foreach $mcu (@{$Mcu_group})
 533     {
 534     foreach $io (keys(%pin_groups))
 535       {
 536       $io_dir_table_by_mcu{$mcu}->{$Peri}{$io} = $pin_groups{$io};
 537       }
 538     }
 539   }
 540
 541 #-------------------------------------------------------------------------------
 542
 543 sub load_periphery_data()
 544   {
 545   my $periphery = undef;
 546   my @mcu_group = ();
 547   my @blocks = ();
 548   my ($line, $block, $key, $val);
 549
 550   foreach (grep(! /^\s*$|^\s*#/o, <DATA>))
 551     {
 552     chomp;
 553     s/#.*$//o;                  # Remove ending comment.
 554     s/^\s*|\s*$//go;            # Remove starting and ending whitespaces.
 555     $line = $_;
 556
 557     if ($line =~ /^BEGIN=(\S+)$/o)
 558       {
 559       $block = $1;
 560
 561       given ($block)
 562         {
 563         when (['IO_TABLE', 'DEFINE', 'GROUP'])
 564           {
 565           }
 566
 567         when (/^(PERIPHERY):(\w+)$/o)
 568           {
 569           $block = $1;
 570           $periphery = add_periphery($2);
 571           }
 572
 573         when ('REGISTER')
 574           {
 575           if (! defined($periphery))
 576             {
 577             print STDERR "There is no periphery to which can be assigned the following register.\n";
 578             exit(1);
 579             }
 580
 581           add_reg_def($periphery);
 582           }
 583
 584         when (/^(MCU):(\S+)$/o)
 585           {
 586           $block = $1;
 587           @mcu_group = split(',', $2);
 588           }
 589
 590         default
 591           {
 592           print STDERR "Unknown block: \"$block\"\n";
 593           exit(1);
 594           }
 595         } # given ($block)
 596
 597       push(@blocks, $block);
 598       next;
 599       } # if ($line =~ /^BEGIN=(\S+)$/o)
 600     elsif ($line =~ /^END=(\S+)$/o)
 601       {
 602       $block = $1;
 603
 604       if (scalar(@blocks) == 0 || $blocks[$#blocks] ne $block)
 605         {
 606         print STDERR "The \"$block\" block has no beginning!\n";
 607         exit(1);
 608         }
 609
 610       given ($block)
 611         {
 612         when ('PERIPHERY') { $periphery = undef; }
 613         when ('MCU')       { @mcu_group = (); }
 614         }
 615
 616       $block = pop(@blocks);
 617       next;
 618       } # elsif ($line =~ /^END=(\w+)$/o)
 619
 620         #...................................
 621
 622     $block = (scalar(@blocks) > 0) ? $blocks[$#blocks] : '';
 623
 624     given ($block)
 625       {
 626       when ('REGISTER')
 627         {
 628         if ($line =~ /^([^=]+)=(.*)$/o)
 629           {
 630         # This a key -- value pair.
 631
 632           if (scalar(@{$periphery}) == 0)
 633             {
 634             print STDERR "No entry of the register table!\n";
 635             exit(1);
 636             }
 637
 638           ($key, $val) = ($1, $2);
 639         # Reference of the last member.
 640           my $peri_r = \%{$periphery->[$#{$periphery}]};
 641
 642           if ($val =~ /^['"]([^'"]*)['"]$/o)
 643             {
 644         # This a text.
 645
 646             $peri_r->{$key} = $1;
 647             }
 648           else
 649             {
 650         # This a constant.
 651
 652             $peri_r->{$key} = eval($val);
 653             }
 654           }
 655         } # when ('REGISTER')
 656
 657       when ('DEFINE')
 658         {
 659         if ($line !~ /^([^=]+)=(.*)$/o)
 660           {
 661           print STDERR "This is not key -- value pair: $line\n";
 662           exit(1);
 663           }
 664
 665         ($key, $val) = ($1, $2);
 666
 667         if (defined($val) && $val ne '')
 668           {
 669           $definitions{$key} = $val;
 670           }
 671         else
 672           {
 673         # Undefine the $key.
 674
 675           delete($definitions{$key});
 676           }
 677         } # when ('DEFINE')
 678
 679       when ('GROUP')
 680         {
 681         if ($line !~ /^([^=]+)=(.*)$/o)
 682           {
 683           print STDERR "This is not group -- members definition: $line\n";
 684           exit(1);
 685           }
 686
 687         @{$io_groups{$1}} = split(',', $2);
 688         } # when ('GROUP')
 689
 690       when ('MCU')
 691         {
 692         if ($line =~ /^([^=]+)=(.*)$/o)
 693           {
 694           my ($peri, $val) = (lc($1), $2);
 695
 696           if ($val =~ /^([^=]+)=(.*)$/o)
 697             {
 698         # It is possible that this is a property.
 699
 700             my $prop = $1;
 701             $val = $2;
 702
 703             given ($prop)
 704               {
 705               when ('IO_DIR')
 706                 {
 707                 my @pins = split(',', $val);
 708
 709                 add_io_dir(\@mcu_group, $peri, \@pins);
 710                 }
 711
 712               default
 713                 {
 714                 print STDERR "This is unknown property definition: $line\n";
 715                 exit(1);
 716                 }
 717               }
 718             }
 719           else
 720             {
 721             my @pins = split(',', $val);
 722
 723             add_io_pins(\@mcu_group, $peri, \@pins);
 724             }
 725           } # if ($line =~ /^([^=]+)=(.*)$/o)
 726         } # when ('MCU')
 727       } # given ($block)
 728     } # foreach (grep(! /^\s*$|^\s*#/o, <DATA>))
 729
 730   if (scalar(@blocks) > 0)
 731     {
 732     print STDERR "The \"$blocks[$#blocks]\" block has no ending!\n";
 733     exit(1);
 734     }
 735   }
 736
 737 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 738 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 739 #@@@@@@@@@@@@@@                                                  @@@@@@@@@@@@@@@
 740 #@@@@@@@@@@@@@  Load all registers, which will find in a header.  @@@@@@@@@@@@@@
 741 #@@@@@@@@@@@@@@                                                  @@@@@@@@@@@@@@@
 742 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 743 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 744
 745 sub add_mcu_raw($)
 746   {
 747   my $Name = uc($_[0]);
 748
 749   Log("add_mcu_raw(): $Name", 9);
 750
 751   my $mcu_ref = {
 752                 NAME      => $Name,
 753                 ENHANCED  => FALSE,
 754                 REG_REFS  => {},
 755                 REG_ARRAY => []
 756                 };
 757
 758   push(@mcu_raw, $mcu_ref);
 759   return $mcu_ref;
 760   }
 761
 762 #-------------------------------------------------------------------------------
 763
 764 sub add_register_raw($$$)
 765   {
 766   my ($Mcu_raw, $Name, $Address) = @_;
 767
 768   $Mcu_raw->{ENHANCED} = TRUE if ($Name eq 'STATUS_SHAD');
 769
 770   Log(sprintf("add_register_raw(): $Name, 0x%04X", $Address), 9);
 771
 772   my $reg = {
 773             NAME     => $Name,
 774             ADDRESS  => $Address,
 775             BITNAMES => []
 776             };
 777
 778   push(@{$Mcu_raw->{REG_ARRAY}}, $reg);
 779   $Mcu_raw->{REG_REFS}->{$Name} = $reg;
 780   }
 781
 782 #-------------------------------------------------------------------------------
 783
 784 sub read_regs_from_header($$)
 785   {
 786   my ($Mcu_ref, $Fname) = @_;
 787   my $path = "$include_path/$Fname";
 788   my ($fh, $name, $addr, $bit_addr, $bitnames, $width);
 789
 790   if (! open($fh, '<', $path))
 791     {
 792     print STDERR "\a\t$0 : Can not open the $path header file!\n";
 793     exit(1);
 794     }
 795
 796   Log("read_regs_from_header(): $path", 6);
 797   $bitnames = [];
 798
 799   foreach (grep(! /^\s*$/o, <$fh>))
 800     {
 801     chomp;
 802     s/\r$//o;
 803     s/^\s*|\s*$//go;
 804
 805     my $line = $_;
 806
 807     Log(">>>>: $line", 7);
 808
 809     if ($line =~ /^#include\s+"(\S+)"$/o)
 810       {
 811       &read_regs_from_header($Mcu_ref, $1);
 812       }
 813     elsif ($line =~ /^#\s*define\s+(\w+_ADDR)\s+0[xX]([[:xdigit:]]+)$/o)
 814       {
 815       Log("reg_addresses\{$1\} = hex($2)", 8);
 816       $reg_addresses{$1} = hex($2);
 817       }
 818     elsif ($line =~ /^extern\b/o &&
 819            $line =~ /\b__sfr\b/o &&
 820            (($addr) = ($line =~ /\b__at\s*\(\s*0[xX]([[:xdigit:]]+)\s*\)/o)) &&
 821            (($name) = ($line =~ /\b(\w+)\s*;$/o)))
 822       {
 823         # extern __at(0x0000) __sfr INDF;
 824         # extern __sfr __at(0x0003) STATUS;
 825         #
 826
 827       add_register_raw($Mcu_ref, $name, hex($addr));
 828       }
 829     elsif ($line =~ /^extern\s+__sfr\s+__at\s*\((\w+_ADDR)\)\s+(\w+);$/o)
 830       {
 831         # extern __sfr  __at (EEDATA_ADDR)  EEDATA;
 832         #
 833
 834       if (! defined($reg_addresses{$1}))
 835         {
 836         print STDERR "This register: $2 not have address!\n";
 837         exit(1);
 838         }
 839
 840       add_register_raw($Mcu_ref, $2, $reg_addresses{$1});
 841       }
 842     elsif ($line =~ /\bstruct\b/o)
 843       {
 844       Log("\tbit_addr = 0", 8);
 845       $bit_addr = 0;
 846       }
 847     elsif ($line =~ /^unsigned(?:\s+char|\s+int)?\s*:\s*(\d+)\s*;$/o)
 848       {
 849         # unsigned char :1;
 850         # unsigned int : 4;
 851         #
 852
 853       $width = int($1);
 854       $bit_addr += $width;
 855       Log("\tbit_addr += $width ($bit_addr)", 8);
 856       }
 857     elsif ($line =~ /^unsigned(?:\s+char|\s+int)?\s*(\w+)\s*:\s*(\d+)\s*;$/o)
 858       {
 859         # unsigned char PCFG2:1;
 860         # unsigned int PSA:1;
 861         # unsigned TRISG  :5;
 862         #
 863
 864       ($name, $width) = ($1, int($2));
 865
 866       if ($width == 1)
 867         {
 868         Log("\tpush(bitnames->\[$bit_addr\], $name)", 8);
 869         push(@{$bitnames->[$bit_addr]}, $name);
 870         }
 871       else
 872         {
 873         Log("\t$name", 8);
 874         }
 875
 876       $bit_addr += $width;
 877       Log("\tbit_addr += $width ($bit_addr)", 8);
 878       }
 879     elsif ($line =~ /^\}\s*(?:__)?(\w+)bits_t\s*;$/o || $line =~ /^\}\s*(?:__)?(\w+)_t\s*;$/o)
 880       {
 881       my $reg_ref = $Mcu_ref->{REG_REFS}->{$1};
 882
 883       if (! defined($reg_ref))
 884         {
 885         print STDERR "This register: $1 not have data structure!\n";
 886         exit(1);
 887         }
 888
 889       Log("\treg_ref : $reg_ref)", 8);
 890       $reg_ref->{BITNAMES} = $bitnames;
 891       $bitnames = [];
 892       }
 893     } # foreach (grep(! /^\s*$/o, <$fh>))
 894
 895   close($fh);
 896
 897   if ($Mcu_ref->{ENHANCED})
 898     {
 899     push(@enhanced, lc($Mcu_ref->{NAME}));
 900     }
 901   else
 902     {
 903     push(@regular, lc($Mcu_ref->{NAME}));
 904     }
 905
 906   my $array = \@{$Mcu_ref->{REG_ARRAY}};
 907
 908   return if (scalar(@{$array}) == 0);
 909
 910         # Within the array sorts by name the registers.
 911
 912   @{$array} = sort {smartSort($a->{NAME}, $b->{NAME})} @{$array};
 913   }
 914
 915 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 916 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 917 #@@@@@@@@@@                                                          @@@@@@@@@@@
 918 #@@@@@@@@@  To periphery fitting in a manner, filters the registers.  @@@@@@@@@@
 919 #@@@@@@@@@@                                                          @@@@@@@@@@@
 920 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 921 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 922
 923 sub add_mcu($$)
 924   {
 925   my ($Peri_regs, $Mcu_raw) = @_;
 926
 927   my $mcu = {
 928             NAME       => $Mcu_raw->{NAME},
 929             ENHANCED   => $Mcu_raw->{ENHANCED},
 930             REG_REFS   => {},
 931             IN_GROUP   => FALSE,
 932             REG_GROUPS => []
 933             };
 934
 935   Log("add_mcu($mcu->{NAME})", 8);
 936
 937         # Copies the master periphery table.
 938
 939   foreach (@{$Peri_regs})
 940     {
 941     my $group = {
 942                 VALID_REGS => $_->{VALID_REGS},
 943                 VALID_BITS => $_->{VALID_BITS},
 944                 PRINT_MODE => $_->{PRINT_MODE},
 945                 REG_ARRAY  => []
 946                 };
 947
 948     push(@{$mcu->{REG_GROUPS}}, $group);
 949     }
 950
 951   push(@mcu_filtered, $mcu);
 952   return $mcu;
 953   }
 954
 955 #-------------------------------------------------------------------------------
 956
 957 sub add_register($$)
 958   {
 959   my ($Mcu, $Reg_raw) = @_;
 960   my $name = $Reg_raw->{NAME};
 961
 962   Log("add_register($Mcu->{NAME}, $name)", 8);
 963
 964   foreach (@{$Mcu->{REG_GROUPS}})
 965     {
 966     if ($name =~ /^$_->{VALID_REGS}$/)
 967       {
 968         # This register fits into this group.
 969
 970       if ($name =~ /^([\D_]+)1$/ && defined($Mcu->{REG_REFS}->{$1}))
 971         {
 972         # This register already exists. E.g.: RCREG1 --> RCREG
 973         return undef;
 974         }
 975
 976       my $reg = {
 977                 NAME     => $name,
 978                 ADDRESS  => $Reg_raw->{ADDRESS},
 979                 GROUP    => $_,
 980                 TOUCHED  => FALSE,
 981                 EMPTY    => FALSE,
 982                 BITNAMES => []
 983                 };
 984
 985       push(@{$_->{REG_ARRAY}}, $reg);
 986       $Mcu->{REG_REFS}->{$name} = $reg;
 987       return $reg;
 988       }
 989     }
 990
 991   return undef;
 992   }
 993
 994 #-------------------------------------------------------------------------------
 995
 996         # Cut down frippery from the bit names.
 997
 998 sub cut_frippery_from_bitnames($$)
 999   {
1000   my ($Regname, $Bits) = @_;
1001
1002   return if (! defined($Bits) || scalar(@{$Bits}) <= 0);
1003
1004   my $changed = 0;
1005   my $new_bits = [];
1006
1007   foreach (@{$Bits})
1008     {
1009     $changed += ($_ =~ s/^${Regname}_|_${Regname}$//);
1010     $changed += ($_ =~ s/^(\d+)$/bit_$1/o);
1011     push(@{$new_bits}, $_);
1012     }
1013
1014   $Bits = $new_bits if ($changed);
1015   }
1016
1017 #-------------------------------------------------------------------------------
1018
1019 sub tris_ansel_filter($$)
1020   {
1021   my ($Peri_pins, $Pin_name) = @_;
1022
1023   return TRUE if (! defined($Peri_pins) ||
1024                   ($Pin_name !~ /^TRIS[A-O]\d+$/io &&
1025                    $Pin_name !~ /^ANS[A-O]\d+$/io));
1026
1027   foreach (keys(%{$Peri_pins}))
1028     {
1029     foreach (@{$Peri_pins->{$_}})
1030       {
1031       if ($_ =~ /^R([A-O]\d+)$/io)
1032         {
1033         # E.g.: "RC7" --> "TRISC7"; "RC7" --> "ANSC7"
1034         my $tail  = uc($1);
1035         my $trisx = "TRIS$tail";
1036         my $ansx  = "ANS$tail";
1037
1038         return TRUE if ($Pin_name eq $trisx || $Pin_name eq $ansx);
1039         }
1040       }
1041     }
1042
1043   return FALSE;
1044   }
1045
1046 #-------------------------------------------------------------------------------
1047
1048 sub filter_regs_from_raw($)
1049   {
1050   my $Periphery = $_[0];
1051   my ($peri_name, $peri_regs) = ($Periphery->{NAME}, $Periphery->{REGS});
1052
1053   foreach (@mcu_raw)
1054     {
1055     my $mcu       = lc($_->{NAME});
1056     my $io_ref    = \%{$io_table_by_mcu{$mcu}};
1057     my $peri_pins = (defined($io_ref)) ? $io_ref->{$peri_name} : undef;
1058
1059         # The MCU not have this periphery.
1060     next if (! defined($peri_pins));
1061
1062     my $mcu_ref   = add_mcu($peri_regs, $_);
1063
1064     foreach my $reg_raw (@{$_->{REG_ARRAY}})
1065       {
1066       my $reg_dst = add_register($mcu_ref, $reg_raw);
1067
1068       next if (! defined($reg_dst));
1069
1070       my $bits_src   = $reg_raw->{BITNAMES};
1071       my $bits_dst   = $reg_dst->{BITNAMES};
1072       my $valid_bits = $reg_dst->{GROUP}->{VALID_BITS};
1073       my $empty      = TRUE;
1074
1075       if (defined($valid_bits) && $valid_bits ne '')
1076         {
1077         # Filtering follows.
1078
1079         for (my $i = 0; $i < 8; ++$i)
1080           {
1081           my $new_bits = [];
1082
1083           cut_frippery_from_bitnames($reg_dst->{NAME}, \@{$bits_src->[$i]});
1084           foreach (@{$bits_src->[$i]})
1085             {
1086         # Only those names notes, which passed through the filter.
1087
1088             push(@{$new_bits}, $_) if (defined($_) && $_ =~ /^$valid_bits$/ &&
1089                                        tris_ansel_filter($peri_pins, $_));
1090             }
1091
1092           if (scalar(@{$new_bits}) > 0)
1093             {
1094             $bits_dst->[$i] = $new_bits;
1095             $empty = FALSE;
1096             }
1097           else
1098             {
1099             $bits_dst->[$i] = undef;
1100             }
1101           }
1102         }
1103       else
1104         {
1105         # No filtering.
1106
1107         for (my $i = 0; $i < 8; ++$i)
1108           {
1109           cut_frippery_from_bitnames($reg_dst->{NAME}, \@{$bits_src->[$i]});
1110           $empty = FALSE if (defined($bits_src->[$i]));
1111
1112           $bits_dst->[$i] = [ @{$bits_src->[$i]} ];
1113           }
1114         }
1115
1116       $reg_dst->{EMPTY} = $empty;
1117       }
1118     } # foreach (@mcu_raw)
1119   }
1120
1121 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1122 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1123 #@@@@@@@@                                                               @@@@@@@@
1124 #@@@@@@@  Collects same group them MCU which, have the same peripheral.  @@@@@@@
1125 #@@@@@@@@                                                               @@@@@@@@
1126 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1127 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1128
1129 sub load_touched_flags($$)
1130   {
1131   my $Level = $_[1];
1132
1133   foreach (@{$_[0]->{REG_GROUPS}})
1134     {
1135     foreach (@{$_->{REG_ARRAY}})
1136       {
1137       $_->{TOUCHED} = $Level;
1138       }
1139     }
1140   }
1141
1142 #-------------------------------------------------------------------------------
1143
1144 sub find_not_touched_reg($)
1145   {
1146   foreach (@{$_[0]->{REG_GROUPS}})
1147     {
1148     foreach (@{$_->{REG_ARRAY}})
1149       {
1150       next if ($_->{EMPTY});            # It does not take into account the empty register.
1151
1152       return TRUE if (! $_->{TOUCHED}); # This register left out from a previous comparison.
1153       }
1154     }
1155
1156   return FALSE;
1157   }
1158
1159 #-------------------------------------------------------------------------------
1160
1161 sub find_register($$)
1162   {
1163   my $Prime_reg = $_[1];
1164   my $cand_reg = $_[0]->{REG_REFS}->{$Prime_reg->{NAME}};
1165
1166   return $cand_reg if (defined($cand_reg) && $cand_reg->{ADDRESS} == $Prime_reg->{ADDRESS});
1167
1168   return undef;
1169   }
1170
1171 #-------------------------------------------------------------------------------
1172
1173 sub find_equivalent_bit($$)
1174   {
1175   my ($Bits1, $Bits2) = @_;
1176   my $d = (defined($Bits1) && scalar(@{$Bits1}) > 0) + (defined($Bits2) && scalar(@{$Bits2}) > 0);
1177
1178   return TRUE if ($d == 0);
1179
1180   if ($d != 2)
1181     {
1182     Log("find_equivalent_bit(): Only one bits defined.", 6);
1183     return FALSE;
1184     }
1185
1186   foreach (@{$Bits1})
1187     {
1188     return TRUE if (/^$_$/ ~~ @{$Bits2});
1189
1190     Log("find_equivalent_bit(): The $_ bit not defined.", 7);
1191     }
1192
1193   return FALSE;
1194   }
1195
1196 #-------------------------------------------------------------------------------
1197
1198 sub find_equivalent_register($$$)
1199   {
1200   my ($Candidate, $Prime_reg, $Print_mode) = @_;
1201   my ($cand_reg, $prime_bits, $cand_bits);
1202
1203   $cand_reg = find_register($Candidate, $Prime_reg);
1204
1205   if (! defined($cand_reg))
1206     {
1207     Log("find_equivalent_register(): Not exists candidate reg: $Prime_reg->{NAME} in $Candidate->{NAME} MCU", 5);
1208     return FALSE;
1209     }
1210
1211   $cand_reg->{TOUCHED} = TRUE;
1212
1213         # Not performs comparison, if the bits not must be displayed.
1214   return TRUE if ($Print_mode == P_SHOW_ONLY_NAME);
1215
1216   $prime_bits = \@{$Prime_reg->{BITNAMES}};
1217   $cand_bits  = \@{$cand_reg->{BITNAMES}};
1218
1219   for (my $i = 0; $i < 8; ++$i)
1220     {
1221     if (! find_equivalent_bit(\@{$cand_bits->[$i]}, \@{$prime_bits->[$i]}))
1222       {
1223       Log("find_equivalent_register(): Not finds equivalent bit: $cand_reg->{NAME} != $Prime_reg->{NAME}", 5);
1224       return FALSE;
1225       }
1226     }
1227
1228   return TRUE;
1229   }
1230
1231 #-------------------------------------------------------------------------------
1232
1233 sub find_equivalent_mcu($$)
1234   {
1235   my ($Prime, $Candidate) = @_;
1236
1237   return FALSE if ($Prime->{ENHANCED} != $Candidate->{ENHANCED});
1238
1239   load_touched_flags($Prime, FALSE);
1240   load_touched_flags($Candidate, FALSE);
1241
1242   foreach (@{$Prime->{REG_GROUPS}})
1243     {
1244     my $pmode = $_->{PRINT_MODE};
1245
1246     foreach (@{$_->{REG_ARRAY}})
1247       {
1248       $_->{TOUCHED} = TRUE;
1249       next if ($_->{EMPTY});
1250
1251       return FALSE if (! find_equivalent_register($Candidate, $_, $pmode));
1252       }
1253     }
1254
1255   if (find_not_touched_reg($Prime))
1256     {
1257     Log("find_equivalent_mcu(): Finds not touched register: $Prime->{NAME}", 5);
1258     return FALSE;
1259     }
1260
1261   if (find_not_touched_reg($Candidate))
1262     {
1263     Log("find_equivalent_mcu(): Finds not touched register: $Candidate->{NAME}", 5);
1264     return FALSE;
1265     }
1266
1267   return TRUE;
1268   }
1269
1270 #-------------------------------------------------------------------------------
1271
1272 sub cmp_io_dirs($$$)
1273   {
1274   my ($Prime, $Candidate, $Periphery) = @_;
1275   my $prime_io = $io_dir_table_by_mcu{lc($Prime->{NAME})};
1276   my $cand_io  = $io_dir_table_by_mcu{lc($Candidate->{NAME})};
1277   my $d = (defined($prime_io) && scalar(keys %{$prime_io}) > 0) + (defined($cand_io) && scalar(keys %{$cand_io}) > 0);
1278
1279   return TRUE  if ($d == 0);
1280   return FALSE if ($d != 2);
1281
1282   my ($pr, $ca) = ($prime_io->{$Periphery}, $cand_io->{$Periphery});
1283
1284   $d = (defined($pr) && scalar(keys %{$pr}) > 0) + (defined($ca) && scalar(keys %{$ca}) > 0);
1285
1286   return TRUE  if ($d == 0);
1287   return FALSE if ($d != 2);
1288
1289   foreach (keys(%{$pr}))
1290     {
1291     $d = $ca->{$_};
1292
1293     return FALSE if (! defined($d) || $d != $pr->{$_});
1294     }
1295
1296   return TRUE;
1297   }
1298
1299 #-------------------------------------------------------------------------------
1300
1301 sub make_mcu_groups($)
1302   {
1303   my $Periphery = $_[0];
1304   my $index = 0;
1305
1306   foreach (@mcu_filtered)
1307     {
1308     next if ($_->{IN_GROUP});
1309
1310     my $group = \@{$mcu_groups[$index]};
1311     my $prime = $_;
1312
1313         # The prime - reference - member of group;
1314     push(@{$group}, $_);
1315     $_->{IN_GROUP} = TRUE;
1316
1317     foreach (@mcu_filtered)
1318       {
1319       next if ($_->{IN_GROUP} || $prime == $_);
1320
1321       if (find_equivalent_mcu($prime, $_) && cmp_io_dirs($prime, $_, $Periphery))
1322         {
1323         Log("make_mcu_groups(): $prime->{NAME} == $_->{NAME}\n", 5);
1324         push(@{$group}, $_);
1325         $_->{IN_GROUP} = TRUE;
1326         }
1327       }
1328
1329     @{$group} = sort {smartSort($a->{NAME}, $b->{NAME})} @{$group};
1330     ++$index;
1331     }
1332   }
1333
1334 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1335 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1336 #@@@@@@@@@@@@@@@@@@@@@@@@                             @@@@@@@@@@@@@@@@@@@@@@@@@@
1337 #@@@@@@@@@@@@@@@@@@@@@@@  Prints the register tables.  @@@@@@@@@@@@@@@@@@@@@@@@@
1338 #@@@@@@@@@@@@@@@@@@@@@@@@                             @@@@@@@@@@@@@@@@@@@@@@@@@@
1339 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1340 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1341
1342 =back
1343         Sometimes a bit has more name. This procedure selects these from among
1344         the shortest.
1345 =cut
1346
1347 sub find_shortest_name($)
1348   {
1349   my $min = ULONG_MAX;
1350   my $str = '';
1351
1352   foreach (@{$_[0]})
1353     {
1354     my $l = length;
1355
1356     if ($l < $min)
1357       {
1358       $min = $l;
1359       $str = $_;
1360       }
1361     }
1362
1363   return $str;
1364   }
1365
1366 #-------------------------------------------------------------------------------
1367
1368 sub print_registers($$$)
1369   {
1370   my ($Reg_array, $Print_mode, $No_ADC) = @_;
1371   my ($i, $bits);
1372   my $show_closing_border = FALSE;
1373
1374   foreach (@{$Reg_array})
1375     {
1376     next if ($No_ADC && exist_in_list(\@some_ADC_registers, $_->{NAME}));
1377
1378         # Sole bit not have name and the empty register is not must show.
1379     next if ($_->{EMPTY} && $Print_mode == P_NO_SHOW_IF_EMPTY);
1380
1381     if ($Print_mode == P_SHOW_ONLY_NAME)
1382       {
1383       Outfl("%-10s  (%03Xh)", $_->{NAME}, $_->{ADDRESS});
1384       $initial_border = FALSE;
1385       next;
1386       }
1387
1388     if (! $initial_border)
1389       {
1390       Outl($table_border);
1391       $initial_border = TRUE;
1392       }
1393
1394     Outf("%-10s  (%03Xh) |", $_->{NAME}, $_->{ADDRESS});
1395
1396     $bits = \@{$_->{BITNAMES}};
1397     for ($i = 7; $i >= 0; --$i)
1398       {
1399       if (defined($bits->[$i]) && $Print_mode != P_NO_SHOW_BITS)
1400         {
1401         Outf("%-9s|", find_shortest_name(\@{$bits->[$i]}));
1402         }
1403       else
1404         {
1405         Out('         |');
1406         }
1407       }
1408
1409     Outl();
1410     $show_closing_border = TRUE;
1411     } # foreach (@{$_[0]})
1412
1413   Outl($table_border) if ($show_closing_border);
1414   }
1415
1416 #-------------------------------------------------------------------------------
1417
1418         #
1419         # Collects into a list the inputs of ADC, which are uses another
1420         # periphery also.
1421         #
1422
1423 sub filter_off_adc_inputs($$)
1424   {
1425   my ($Peri_pins, $Adc) = @_;
1426   my @adc_pins = ();
1427
1428   if (defined($Adc))
1429     {
1430     foreach my $adc_pin_name (keys(%{$Adc}))
1431       {
1432       my $adc_pin_io = $Adc->{$adc_pin_name};
1433
1434       foreach my $peri_pin_name (keys(%{$Peri_pins}))
1435         {
1436         foreach (@{$Peri_pins->{$peri_pin_name}})
1437           {
1438           if (! (/^$adc_pin_name$/ ~~ @adc_pins) && /^$_$/ ~~ @{$adc_pin_io})
1439             {
1440             push(@adc_pins, $adc_pin_name)
1441             }
1442           }
1443         }
1444       }
1445     }
1446
1447   return \@adc_pins;
1448   }
1449
1450 #-------------------------------------------------------------------------------
1451
1452 sub print_mcu($$)
1453   {
1454   my ($Mcu, $Peri_name) = @_;
1455   my $name       = lc($Mcu->{NAME});
1456   my $io_ref     = \%{$io_table_by_mcu{$name}};
1457   my $io_dir_ref = \%{$io_dir_table_by_mcu{$name}};
1458   my $peri_pins  = (defined($io_ref)) ? $io_ref->{$Peri_name} : undef;
1459   my $peri_dirs  = (defined($io_dir_ref)) ? $io_dir_ref->{$Peri_name} : undef;
1460   my ($adc, $adc_pins, $io, $pin_name, $drop_adc_pins);
1461   my $suppl_info = '';
1462
1463   $drop_adc_pins = FALSE;
1464
1465   Outl("This is an enhanced 14 bit MCU.") if ($Mcu->{ENHANCED});
1466
1467   if (defined($peri_pins))
1468     {
1469     if ($Peri_name ne 'adc')
1470       {
1471       $adc = \%{$io_ref->{'adc'}};
1472       $adc_pins = filter_off_adc_inputs($peri_pins, $adc);
1473
1474       if (scalar(@{$adc_pins}) > 0)
1475         {
1476         # Supplementary information: Displays inputs of the ADC periphery.
1477
1478         $suppl_info .= "\n";
1479
1480         foreach $pin_name (sort {smartSort($a, $b)} @{$adc_pins})
1481           {
1482           $suppl_info .= "\t$pin_name:";
1483
1484           foreach (@{$adc->{$pin_name}})
1485             {
1486             $suppl_info .= " $_";
1487             }
1488
1489           $suppl_info .= "\n";
1490           }
1491         }
1492       else
1493         {
1494         $drop_adc_pins = TRUE;
1495         }
1496       } # if ($Peri_name ne 'adc')
1497
1498     $suppl_info .= "\n";
1499
1500     foreach $pin_name (sort {smartSort($a, $b)} keys(%{$peri_pins}))
1501       {
1502       $suppl_info .= "\t$pin_name:";
1503
1504       foreach (@{$peri_pins->{$pin_name}})
1505         {
1506         $suppl_info .= " $_";
1507         }
1508
1509       $suppl_info .= "\n";
1510       }
1511     } # if (defined($peri_pins))
1512   else
1513     {
1514     print STDERR "print_mcu(): This MCU $name not have $Peri_name pin!\n";
1515     }
1516
1517   if (defined($peri_dirs))
1518     {
1519     $suppl_info .= "\n    I/O directions after initialization:\n\n";
1520
1521     foreach (sort {smartSort($a, $b)} keys %{$peri_dirs})
1522       {
1523       $io = ($peri_dirs->{$_} == 0) ? '0 (output)' : '1 (input)';
1524       $suppl_info .= "\t$_: $io\n";
1525       }
1526     }
1527
1528   $initial_border = FALSE;
1529
1530   foreach (@{$Mcu->{REG_GROUPS}})
1531     {
1532     next if (scalar(@{$_->{REG_ARRAY}}) == 0);
1533
1534     print_registers(\@{$_->{REG_ARRAY}}, $_->{PRINT_MODE}, $drop_adc_pins);
1535     }
1536
1537   Out($suppl_info);
1538   }
1539
1540 #-------------------------------------------------------------------------------
1541
1542 sub print_all_data($$)
1543   {
1544   my ($Periphery, $Index) = @_;
1545   my $peri_name = $Periphery->{NAME};
1546   my $lock = '__' . uc($peri_name) . '__H__';
1547   my ($sidx, $group_index, $border);
1548   my ($family, $tech, $group_name, $len);
1549
1550   Outl("\n#ifndef $lock\n#define $lock\n\n#include \"pic16fam.h\"");
1551
1552   $peri_groups .= "\n    SECTION=" . uc($peri_name) . "\n\n";
1553
1554   if ($make_groups)
1555     {
1556     $group_index = 1;
1557     $border = '#' x 45;
1558
1559     make_mcu_groups($peri_name);
1560
1561     foreach (@mcu_groups)
1562       {
1563       next if (scalar(@{$_}) == 0);
1564
1565       Outl("\n//$border ${group_index}th group $border");
1566
1567       ($family, $tech, $group_name) = ($_->[0]->{NAME} =~ /^(1[026])(c|cr|f|hv|lf)(\w+)$/io);
1568
1569       $group_name =~ s/\D//go;
1570       $len = length($group_name);
1571
1572       if ($len < 3)
1573         {
1574         $group_name = "00$group_name";
1575         }
1576       elsif ($len < 4)
1577         {
1578         $group_name = "0$group_name";
1579         }
1580
1581       given ($tech)
1582         {
1583         # C CR
1584         when (/c|cr/io) { $sidx = '0'; }
1585
1586         # F HV LF
1587         default         { $sidx = '1'; }
1588         }
1589
1590       $peri_groups .= "$family$group_name$Index$sidx:" . join(',', map { lc($_->{NAME}); } @{$_}) . "\n";
1591
1592       if ($only_prime)
1593         {
1594         Outl("\n/*");
1595
1596         # Prints the name of the group members.
1597
1598         foreach (@{$_})
1599           {
1600           Outl("PIC$_->{NAME}");
1601           }
1602
1603         # Only contents of the first it shows, because content of the others same.
1604
1605         print_mcu($_->[0], $peri_name);
1606         Outl('*/');
1607         }
1608       else
1609         {
1610         # Displays full contents of each member of the group.
1611
1612         foreach (@{$_})
1613           {
1614           Outl("\n\n/*\nPIC$_->{NAME}");
1615           print_mcu($_, $peri_name);
1616           Outl('*/');
1617           }
1618         }
1619
1620       ++$group_index;
1621       }
1622     }
1623   else
1624     {
1625         # Displays full contents of each MCU.
1626
1627     foreach (@mcu_filtered)
1628       {
1629       Outl("\n\n/*\nPIC$_->{NAME}");
1630       print_mcu($_, $peri_name);
1631       Outl('*/');
1632       }
1633     }
1634
1635   Outl("\n#endif // $lock");
1636   }
1637
1638 #-------------------------------------------------------------------------------
1639
1640 sub print_listing($$$)
1641   {
1642   my ($Out, $Device_per_line, $List_ref) = @_;
1643   my ($i, $len);
1644
1645   $len = scalar(@{$List_ref});
1646
1647   return if ($len <= 0);
1648
1649   $i = 0;
1650   while (1)
1651     {
1652     print $Out $List_ref->[$i];
1653     ++$i;
1654
1655     if ($i >= $len)
1656       {
1657       print $Out "\n";
1658       last;
1659       }
1660
1661     print $Out ((($i % $Device_per_line) == 0) ? "\n" : ',');
1662     }
1663   }
1664
1665 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1666 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1667 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@@                   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1668 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@  The main program.  @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1669 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@@                   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1670 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1671 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1672
1673 load_periphery_data();
1674
1675 $include_path = '';
1676 $make_groups = FALSE;
1677 $only_prime = FALSE;
1678
1679 for (my $i = 0; $i < @ARGV; )
1680   {
1681   my $opt = $ARGV[$i++];
1682
1683   given ($opt)
1684     {
1685     when (/^-(I|-include)$/o)
1686       {
1687       die "This option \"$opt\" requires a parameter." if ($i > $#ARGV);
1688
1689       $include_path = $ARGV[$i++];
1690       }
1691
1692     when (/^-(g|-make-groups)$/o)
1693       {
1694       $make_groups = TRUE;
1695       }
1696
1697     when (/^-(p|-only-prime)$/o)
1698       {
1699       $only_prime = TRUE;
1700       }
1701
1702     when (/^-(gp|pg)$/o)
1703       {
1704       $make_groups = TRUE;
1705       $only_prime = TRUE;
1706       }
1707
1708     when (/^-(v|-verbose)$/o)
1709       {
1710       die "This option \"$opt\" requires a parameter.\n" if ($i > $#ARGV);
1711
1712       $verbose = int($ARGV[$i++]);
1713       $verbose = 0 if (! defined($verbose) || $verbose < 0);
1714       $verbose = 10 if ($verbose > 10);
1715       }
1716
1717     when (/^-(h|-help)$/o)
1718       {
1719       print <<EOT
1720 Usage: $0 [options]
1721
1722     Options are:
1723
1724         -I <path> or --include <path>
1725
1726             The program on this path looks for the headers.
1727             If this is not specified, then looking for a installed
1728             sdcc copy in the system.
1729
1730         -g or --make-groups
1731
1732             This command creates groups of MCUs.
1733
1734         -p or --only-prime
1735
1736             Prints only the prime member of an MCU group.
1737
1738         -v <level> or --verbose <level>
1739
1740             It provides information on from the own operation.
1741             Possible value of the level between 0 and 10. (default: 0)
1742
1743         -h or --help
1744
1745             This text.
1746 EOT
1747 ;
1748       exit(0);
1749       }
1750     } # given ($opt)
1751   }
1752
1753 if ($include_path eq '')
1754   {
1755   foreach (@default_paths)
1756     {
1757     if (-d $_)
1758       {
1759       $include_path = "$_/$default_port";
1760       last;
1761       }
1762     }
1763
1764   die "Can not find the directory of sdcc headers!" if ($include_path eq '');
1765   }
1766
1767 opendir(DIR, $include_path) || die "Can not open. -> \"$include_path\"";
1768
1769 print "Include path: \"$include_path\"\n";
1770
1771 my @filelist = grep(-f "$include_path/$_" && /^$header_name_filter$/, readdir(DIR));
1772 closedir(DIR);
1773
1774 @regular = ();
1775 @enhanced = ();
1776 @mcu_raw = ();
1777 foreach (sort {smartSort($a, $b)} @filelist)
1778   {
1779   my $name = $_;
1780
1781   print STDERR "Reading the registers from the $_ header ...";
1782
1783   $name =~ s/^pic//io;
1784   $name =~ s/\.\S+$//o;
1785   read_regs_from_header(add_mcu_raw($name), $_);
1786   print STDERR " done.\n";
1787   }
1788
1789 my $p_idx = 0;
1790 foreach (@periphery_table)
1791   {
1792   my $out_name = "$_->{NAME}.h$out_tail";
1793
1794   open($out_handler, '>', $out_name) || die "Can not create the $out_name output!";
1795
1796   print STDERR "Filtering of registers the aspects of $_->{NAME} according to ...";
1797   @mcu_filtered = ();
1798   @mcu_groups = ();
1799   filter_regs_from_raw($_);
1800   print STDERR " done.\n";
1801
1802   print STDERR "Creating the $out_name ...";
1803   print_all_data($_, $p_idx);
1804   print STDERR " done.\n";
1805
1806   close($out_handler);
1807   ++$p_idx;
1808   }
1809
1810 open(GR, '>', $peri_group) || die "Can not create the $peri_group output!";
1811
1812 if (scalar(@regular) > 0)
1813   {
1814   print GR "\n    SECTION=REGULAR\n\n";
1815   print_listing(*GR, 10, \@regular);
1816   }
1817
1818 if (scalar(@enhanced) > 0)
1819   {
1820   print GR "\n    SECTION=ENHANCED\n\n";
1821   print_listing(*GR, 10, \@enhanced);
1822   }
1823
1824 print GR $peri_groups;
1825 close(GR);
1826
1827 __END__
1828 ################################################################################
1829 #
1830 #   The following rules determine to which registers belong to an peripheral.
1831 #   The description of a periphery is bounded by the BEGIN=TABLE_XXX flags.
1832 #   The description of a register begin after the BEGIN=REGISTER flag.
1833 #
1834 #   BEGIN=PERIPHERY:ADC
1835 #       The "ADC" effect of: An file will be created under the name "adc.tables".
1836 #
1837 #   VALID_REGS -- This a regular expression. Specifies which one a register
1838 #                 applies to this entries.
1839 #
1840 #   VALID_BITS -- This a regular expression. Specifies which bits are interesting,
1841 #                 are important. If an empty string is in there will be no filtering.
1842 #
1843 #   PRINT_MODE -- This a constant. The following values can be:
1844 #
1845 #                 P_NO_SHOW_BITS     -- Does not shows the bits.
1846 #
1847 #                 P_NO_SHOW_IF_EMPTY -- Not shows the register if it is empty.
1848 #                                       (This it could be because there are no bits
1849 #                                        or because the filter thrown out them.)
1850 #
1851 #                 P_ALWAYS_SHOW      -- All conditions shows the register.
1852 #
1853 #                 P_SHOW_ONLY_NAME   -- Only shows the register name and address.
1854 #
1855
1856 ################################################################################
1857 #
1858 #       The ADC module related registers.
1859 #       (There is so, which only indirectly connected to the module.)
1860 #
1861
1862 BEGIN=PERIPHERY:ADC         # ADC --> adc.h.gen
1863
1864   BEGIN=REGISTER
1865     VALID_REGS="AD\d*CON\d*|ADCOMCON"
1866     VALID_BITS=""
1867     PRINT_MODE=P_ALWAYS_SHOW
1868   END=REGISTER
1869
1870   BEGIN=REGISTER
1871     VALID_REGS="AD\d*RES\d*[HL]?"
1872     VALID_BITS=""
1873     PRINT_MODE=P_SHOW_ONLY_NAME
1874   END=REGISTER
1875
1876   BEGIN=REGISTER
1877     VALID_REGS="ANSEL[A-Z]*"
1878     VALID_BITS=""
1879     PRINT_MODE=P_ALWAYS_SHOW
1880   END=REGISTER
1881
1882   BEGIN=REGISTER
1883     VALID_REGS="(FVR|REF)CON"
1884     VALID_BITS=""
1885     PRINT_MODE=P_ALWAYS_SHOW
1886   END=REGISTER
1887
1888   BEGIN=REGISTER
1889     VALID_REGS="DAC\d*"
1890     VALID_BITS=""
1891     PRINT_MODE=P_SHOW_ONLY_NAME
1892   END=REGISTER
1893
1894   BEGIN=REGISTER
1895     VALID_REGS="DAC(ON\d*|CON\d+)"
1896     VALID_BITS=""
1897     PRINT_MODE=P_ALWAYS_SHOW
1898   END=REGISTER
1899
1900   BEGIN=REGISTER
1901     VALID_REGS="INTCON\d?"
1902     VALID_BITS="(G|PE|AD)IE"
1903     PRINT_MODE=P_ALWAYS_SHOW
1904   END=REGISTER
1905
1906   BEGIN=REGISTER
1907     VALID_REGS="PIE\d+"
1908     VALID_BITS="ADIE"
1909     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1910   END=REGISTER
1911
1912   BEGIN=REGISTER
1913     VALID_REGS="PIR\d+"
1914     VALID_BITS="ADIF"
1915     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1916   END=REGISTER
1917
1918   BEGIN=REGISTER
1919     VALID_REGS="ANSEL[A-Z]*"
1920     VALID_BITS=""
1921     PRINT_MODE=P_ALWAYS_SHOW
1922   END=REGISTER
1923
1924   BEGIN=REGISTER
1925     VALID_REGS="TRIS([A-Z]|IO)"
1926     VALID_BITS="TRIS([A-Z]|IO)?\d"
1927     PRINT_MODE=P_ALWAYS_SHOW
1928   END=REGISTER
1929
1930 END=PERIPHERY
1931
1932 ################################################################################
1933 #
1934 #       The CCP module related registers.
1935 #       (There is so, which only indirectly connected to the module.)
1936 #
1937
1938 BEGIN=PERIPHERY:CCP         # CCP --> ccp.h.gen
1939
1940   BEGIN=REGISTER
1941     VALID_REGS="APFCON\d*"
1942     VALID_BITS="(CCP(SEL\d|\dSEL)|P\d[A-D]SEL)"
1943     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1944   END=REGISTER
1945
1946   BEGIN=REGISTER
1947     VALID_REGS="PPSLOCK"
1948     VALID_BITS=""
1949     PRINT_MODE=P_ALWAYS_SHOW
1950   END=REGISTER
1951
1952   BEGIN=REGISTER
1953     VALID_REGS="CCP\d+PPS"
1954     VALID_BITS=""
1955     PRINT_MODE=P_ALWAYS_SHOW
1956   END=REGISTER
1957
1958   BEGIN=REGISTER
1959     VALID_REGS="R[A-Z]\dPPS"
1960     VALID_BITS=""
1961     PRINT_MODE=P_ALWAYS_SHOW
1962   END=REGISTER
1963
1964   BEGIN=REGISTER
1965     VALID_REGS="CCP(CON\d*|\d+CON)"
1966     VALID_BITS=""
1967     PRINT_MODE=P_ALWAYS_SHOW
1968   END=REGISTER
1969
1970   BEGIN=REGISTER
1971     VALID_REGS="CCP(AS\d*|\d+AS)"
1972     VALID_BITS=""
1973     PRINT_MODE=P_ALWAYS_SHOW
1974   END=REGISTER
1975
1976   BEGIN=REGISTER
1977     VALID_REGS="CCPR([HL]\d*|\d+[HL])"
1978     VALID_BITS=""
1979     PRINT_MODE=P_SHOW_ONLY_NAME
1980   END=REGISTER
1981
1982   BEGIN=REGISTER
1983     VALID_REGS="CCPTMRS\d*"
1984     VALID_BITS=""
1985     PRINT_MODE=P_ALWAYS_SHOW
1986   END=REGISTER
1987
1988   BEGIN=REGISTER
1989     VALID_REGS="PSTR(CON\d*|\d+CON)"
1990     VALID_BITS=""
1991     PRINT_MODE=P_ALWAYS_SHOW
1992   END=REGISTER
1993
1994   BEGIN=REGISTER
1995     VALID_REGS="PWM(CON\d*|\d+CON)"
1996     VALID_BITS=""
1997     PRINT_MODE=P_ALWAYS_SHOW
1998   END=REGISTER
1999
2000   BEGIN=REGISTER
2001     VALID_REGS="(T[2468]CON|T10CON)"
2002     VALID_BITS=""
2003     PRINT_MODE=P_ALWAYS_SHOW
2004   END=REGISTER
2005
2006   BEGIN=REGISTER
2007     VALID_REGS="(TMR[2468]|TMR10)"
2008     VALID_BITS=""
2009     PRINT_MODE=P_SHOW_ONLY_NAME
2010   END=REGISTER
2011
2012   BEGIN=REGISTER
2013     VALID_REGS="(PR[2468]|PR10)"
2014     VALID_BITS=""
2015     PRINT_MODE=P_SHOW_ONLY_NAME
2016   END=REGISTER
2017
2018   BEGIN=REGISTER
2019     VALID_REGS="INTCON\d?"
2020     VALID_BITS="(G|PE)IE"
2021     PRINT_MODE=P_ALWAYS_SHOW
2022   END=REGISTER
2023
2024   BEGIN=REGISTER
2025     VALID_REGS="PIE\d+"
2026     VALID_BITS="CCP\d+IE"
2027     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2028   END=REGISTER
2029
2030   BEGIN=REGISTER
2031     VALID_REGS="PIR\d+"
2032     VALID_BITS="CCP\d+IF"
2033     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2034   END=REGISTER
2035
2036   BEGIN=REGISTER
2037     VALID_REGS="ANSEL[A-Z]*"
2038     VALID_BITS=""
2039     PRINT_MODE=P_ALWAYS_SHOW
2040   END=REGISTER
2041
2042   BEGIN=REGISTER
2043     VALID_REGS="ADCON\d+"
2044     VALID_BITS=""
2045     PRINT_MODE=P_ALWAYS_SHOW
2046   END=REGISTER
2047
2048   BEGIN=REGISTER
2049     VALID_REGS="TRIS([A-Z]|IO)"
2050     VALID_BITS="TRIS([A-Z]|IO)\d"
2051     PRINT_MODE=P_ALWAYS_SHOW
2052   END=REGISTER
2053
2054 END=PERIPHERY
2055
2056 ################################################################################
2057 #
2058 #       The PWM(CCP) module related registers.
2059 #       (There is so, which only indirectly connected to the module.)
2060 #
2061
2062 BEGIN=PERIPHERY:PWM         # PWM --> pwm.h.gen
2063
2064   BEGIN=REGISTER
2065     VALID_REGS="APFCON\d*"
2066     VALID_BITS="(CCP(SEL\d|\dSEL)|P\d[A-D]SEL)"
2067     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2068   END=REGISTER
2069
2070   BEGIN=REGISTER
2071     VALID_REGS="PPSLOCK"
2072     VALID_BITS=""
2073     PRINT_MODE=P_ALWAYS_SHOW
2074   END=REGISTER
2075
2076   BEGIN=REGISTER
2077     VALID_REGS="CCP\d+PPS"
2078     VALID_BITS=""
2079     PRINT_MODE=P_ALWAYS_SHOW
2080   END=REGISTER
2081
2082   BEGIN=REGISTER
2083     VALID_REGS="R[A-Z]\dPPS"
2084     VALID_BITS=""
2085     PRINT_MODE=P_ALWAYS_SHOW
2086   END=REGISTER
2087
2088   BEGIN=REGISTER
2089     VALID_REGS="CCP(CON\d*|\d+CON)"
2090     VALID_BITS=""
2091     PRINT_MODE=P_ALWAYS_SHOW
2092   END=REGISTER
2093
2094   BEGIN=REGISTER
2095     VALID_REGS="CCP(AS\d*|\d+AS)"
2096     VALID_BITS=""
2097     PRINT_MODE=P_ALWAYS_SHOW
2098   END=REGISTER
2099
2100   BEGIN=REGISTER
2101     VALID_REGS="CCPR([HL]\d*|\d+[HL])"
2102     VALID_BITS=""
2103     PRINT_MODE=P_SHOW_ONLY_NAME
2104   END=REGISTER
2105
2106   BEGIN=REGISTER
2107     VALID_REGS="CCPTMRS\d*"
2108     VALID_BITS=""
2109     PRINT_MODE=P_ALWAYS_SHOW
2110   END=REGISTER
2111
2112   BEGIN=REGISTER
2113     VALID_REGS="PSTR(CON\d*|\d+CON)"
2114     VALID_BITS=""
2115     PRINT_MODE=P_ALWAYS_SHOW
2116   END=REGISTER
2117
2118   BEGIN=REGISTER
2119     VALID_REGS="PWM(CON\d*|\d+CON)"
2120     VALID_BITS=""
2121     PRINT_MODE=P_ALWAYS_SHOW
2122   END=REGISTER
2123
2124   BEGIN=REGISTER
2125     VALID_REGS="PWM(DC[HL]\d*|\d+DC[HL])"
2126     VALID_BITS=""
2127     PRINT_MODE=P_ALWAYS_SHOW
2128   END=REGISTER
2129
2130   BEGIN=REGISTER
2131     VALID_REGS="(T[2468]CON|T10CON)"
2132     VALID_BITS=""
2133     PRINT_MODE=P_ALWAYS_SHOW
2134   END=REGISTER
2135
2136   BEGIN=REGISTER
2137     VALID_REGS="(TMR[2468]|TMR10)"
2138     VALID_BITS=""
2139     PRINT_MODE=P_SHOW_ONLY_NAME
2140   END=REGISTER
2141
2142   BEGIN=REGISTER
2143     VALID_REGS="(PR[2468]|PR10)"
2144     VALID_BITS=""
2145     PRINT_MODE=P_SHOW_ONLY_NAME
2146   END=REGISTER
2147
2148   BEGIN=REGISTER
2149     VALID_REGS="INTCON\d?"
2150     VALID_BITS="(G|PE)IE"
2151     PRINT_MODE=P_ALWAYS_SHOW
2152   END=REGISTER
2153
2154   BEGIN=REGISTER
2155     VALID_REGS="PIE\d+"
2156     VALID_BITS="((CCP\d+|TMR[2468])IE|TMR10IE)"
2157     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2158   END=REGISTER
2159
2160   BEGIN=REGISTER
2161     VALID_REGS="PIR\d+"
2162     VALID_BITS="((CCP\d+|TMR[2468])IF|TMR10IF)"
2163     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2164   END=REGISTER
2165
2166   BEGIN=REGISTER
2167     VALID_REGS="ANSEL[A-Z]*"
2168     VALID_BITS=""
2169     PRINT_MODE=P_ALWAYS_SHOW
2170   END=REGISTER
2171
2172   BEGIN=REGISTER
2173     VALID_REGS="ADCON\d+"
2174     VALID_BITS=""
2175     PRINT_MODE=P_ALWAYS_SHOW
2176   END=REGISTER
2177
2178   BEGIN=REGISTER
2179     VALID_REGS="TRIS([A-Z]|IO)"
2180     VALID_BITS="TRIS([A-Z]|IO)\d"
2181     PRINT_MODE=P_ALWAYS_SHOW
2182   END=REGISTER
2183
2184 END=PERIPHERY
2185
2186 ################################################################################
2187 #
2188 #       The I2C(SSP) module related registers.
2189 #       (There is so, which only indirectly connected to the module.)
2190 #
2191
2192 BEGIN=PERIPHERY:I2C     # I2C --> i2c.h.gen
2193
2194   BEGIN=REGISTER
2195     VALID_REGS="APFCON\d*"
2196     VALID_BITS="S(DI|DO|CK|S)\d*SEL"
2197     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2198   END=REGISTER
2199
2200   BEGIN=REGISTER
2201     VALID_REGS="PPSLOCK"
2202     VALID_BITS=""
2203     PRINT_MODE=P_ALWAYS_SHOW
2204   END=REGISTER
2205
2206   BEGIN=REGISTER
2207     VALID_REGS="SSP(CLK|DAT)PPS"
2208     VALID_BITS=""
2209     PRINT_MODE=P_ALWAYS_SHOW
2210   END=REGISTER
2211
2212   BEGIN=REGISTER
2213     VALID_REGS="R[A-Z]\dPPS"
2214     VALID_BITS=""
2215     PRINT_MODE=P_ALWAYS_SHOW
2216   END=REGISTER
2217
2218   BEGIN=REGISTER
2219     VALID_REGS="SSP\d*CON\d*"
2220     VALID_BITS=""
2221     PRINT_MODE=P_ALWAYS_SHOW
2222   END=REGISTER
2223
2224   BEGIN=REGISTER
2225     VALID_REGS="SSP\d*ADD\d*"
2226     VALID_BITS=""
2227     PRINT_MODE=P_SHOW_ONLY_NAME
2228   END=REGISTER
2229
2230   BEGIN=REGISTER
2231     VALID_REGS="SSP\d*BUF\d*"
2232     VALID_BITS=""
2233     PRINT_MODE=P_SHOW_ONLY_NAME
2234   END=REGISTER
2235
2236   BEGIN=REGISTER
2237     VALID_REGS="SSP\d*MSK\d*"
2238     VALID_BITS=""
2239     PRINT_MODE=P_SHOW_ONLY_NAME
2240   END=REGISTER
2241
2242   BEGIN=REGISTER
2243     VALID_REGS="SSP\d*STAT\d*"
2244     VALID_BITS=""
2245     PRINT_MODE=P_ALWAYS_SHOW
2246   END=REGISTER
2247
2248   BEGIN=REGISTER
2249     VALID_REGS="INTCON\d?"
2250     VALID_BITS="(G|PE)IE"
2251     PRINT_MODE=P_ALWAYS_SHOW
2252   END=REGISTER
2253
2254   BEGIN=REGISTER
2255     VALID_REGS="PIE\d+"
2256     VALID_BITS="(BCL|SSP)\d*IE"
2257     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2258   END=REGISTER
2259
2260   BEGIN=REGISTER
2261     VALID_REGS="PIR\d+"
2262     VALID_BITS="(BCL|SSP)\d*IF"
2263     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2264   END=REGISTER
2265
2266   BEGIN=REGISTER
2267     VALID_REGS="ANSEL[A-Z]*"
2268     VALID_BITS=""
2269     PRINT_MODE=P_ALWAYS_SHOW
2270   END=REGISTER
2271
2272   BEGIN=REGISTER
2273     VALID_REGS="ADCON\d+"
2274     VALID_BITS=""
2275     PRINT_MODE=P_ALWAYS_SHOW
2276   END=REGISTER
2277
2278   BEGIN=REGISTER
2279     VALID_REGS="TRIS([A-Z]|IO)"
2280     VALID_BITS="TRIS([A-Z]|IO)\d"
2281     PRINT_MODE=P_ALWAYS_SHOW
2282   END=REGISTER
2283
2284 END=PERIPHERY
2285
2286 ################################################################################
2287 #
2288 #       The SPI(SSP) module related registers.
2289 #       (There is so, which only indirectly connected to the module.)
2290 #
2291
2292 BEGIN=PERIPHERY:SPI     # SPI --> spi.h.gen
2293
2294   BEGIN=REGISTER
2295     VALID_REGS="APFCON\d*"
2296     VALID_BITS="S(DI|DO|CK|S)\d*SEL"
2297     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2298   END=REGISTER
2299
2300   BEGIN=REGISTER
2301     VALID_REGS="PPSLOCK"
2302     VALID_BITS=""
2303     PRINT_MODE=P_ALWAYS_SHOW
2304   END=REGISTER
2305
2306   BEGIN=REGISTER
2307     VALID_REGS="SSP\w+PPS"
2308     VALID_BITS=""
2309     PRINT_MODE=P_ALWAYS_SHOW
2310   END=REGISTER
2311
2312   BEGIN=REGISTER
2313     VALID_REGS="R[A-Z]\dPPS"
2314     VALID_BITS=""
2315     PRINT_MODE=P_ALWAYS_SHOW
2316   END=REGISTER
2317
2318   BEGIN=REGISTER
2319     VALID_REGS="SSP\d*CON\d*"
2320     VALID_BITS=""
2321     PRINT_MODE=P_ALWAYS_SHOW
2322   END=REGISTER
2323
2324   BEGIN=REGISTER
2325     VALID_REGS="SSP\d*ADD\d*"
2326     VALID_BITS=""
2327     PRINT_MODE=P_SHOW_ONLY_NAME
2328   END=REGISTER
2329
2330   BEGIN=REGISTER
2331     VALID_REGS="SSP\d*BUF\d*"
2332     VALID_BITS=""
2333     PRINT_MODE=P_SHOW_ONLY_NAME
2334   END=REGISTER
2335
2336   BEGIN=REGISTER
2337     VALID_REGS="SSP\d*MSK\d*"
2338     VALID_BITS=""
2339     PRINT_MODE=P_SHOW_ONLY_NAME
2340   END=REGISTER
2341
2342   BEGIN=REGISTER
2343     VALID_REGS="SSP\d*STAT\d*"
2344     VALID_BITS=""
2345     PRINT_MODE=P_ALWAYS_SHOW
2346   END=REGISTER
2347
2348   BEGIN=REGISTER
2349     VALID_REGS="INTCON\d?"
2350     VALID_BITS="(G|PE)IE"
2351     PRINT_MODE=P_ALWAYS_SHOW
2352   END=REGISTER
2353
2354   BEGIN=REGISTER
2355     VALID_REGS="PIE\d+"
2356     VALID_BITS="(BCL|SSP)\d*IE"
2357     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2358   END=REGISTER
2359
2360   BEGIN=REGISTER
2361     VALID_REGS="PIR\d+"
2362     VALID_BITS="(BCL|SSP)\d*IF"
2363     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2364   END=REGISTER
2365
2366   BEGIN=REGISTER
2367     VALID_REGS="ANSEL[A-Z]*"
2368     VALID_BITS=""
2369     PRINT_MODE=P_ALWAYS_SHOW
2370   END=REGISTER
2371
2372   BEGIN=REGISTER
2373     VALID_REGS="ADCON\d+"
2374     VALID_BITS=""
2375     PRINT_MODE=P_ALWAYS_SHOW
2376   END=REGISTER
2377
2378   BEGIN=REGISTER
2379     VALID_REGS="TRIS([A-Z]|IO)"
2380     VALID_BITS="TRIS([A-Z]|IO)\d"
2381     PRINT_MODE=P_ALWAYS_SHOW
2382   END=REGISTER
2383
2384 END=PERIPHERY
2385
2386 ################################################################################
2387 #
2388 #       The USART module related registers.
2389 #       (There is so, which only indirectly connected to the module.)
2390 #
2391
2392 BEGIN=PERIPHERY:USART       # USART --> usart.h.gen
2393
2394   BEGIN=REGISTER
2395     VALID_REGS="APFCON\d*"
2396     VALID_BITS="(RX(DT)?|TX(CK)?)SEL"
2397     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2398   END=REGISTER
2399
2400   BEGIN=REGISTER
2401     VALID_REGS="PPSLOCK"
2402     VALID_BITS=""
2403     PRINT_MODE=P_ALWAYS_SHOW
2404   END=REGISTER
2405
2406   BEGIN=REGISTER
2407     VALID_REGS="R[A-Z]\dPPS"
2408     VALID_BITS=""
2409     PRINT_MODE=P_ALWAYS_SHOW
2410   END=REGISTER
2411
2412   BEGIN=REGISTER
2413     VALID_REGS="RC(STA\d*|\d+STA)"
2414     VALID_BITS=""
2415     PRINT_MODE=P_ALWAYS_SHOW
2416   END=REGISTER
2417
2418   BEGIN=REGISTER
2419     VALID_REGS="TX(STA\d*|\d+STA)"
2420     VALID_BITS=""
2421     PRINT_MODE=P_ALWAYS_SHOW
2422   END=REGISTER
2423
2424   BEGIN=REGISTER
2425     VALID_REGS="BAUD(C(ON|TL)\d*|\d+C(ON|TL))"
2426     VALID_BITS=""
2427     PRINT_MODE=P_ALWAYS_SHOW
2428   END=REGISTER
2429
2430   BEGIN=REGISTER
2431     VALID_REGS="SP(BRG[HL]?\d?|\d+BRG[HL]?)"
2432     VALID_BITS=""
2433     PRINT_MODE=P_SHOW_ONLY_NAME
2434   END=REGISTER
2435
2436   BEGIN=REGISTER
2437     VALID_REGS="RC(REG\d*|\d+REG)"
2438     VALID_BITS=""
2439     PRINT_MODE=P_SHOW_ONLY_NAME
2440   END=REGISTER
2441
2442   BEGIN=REGISTER
2443     VALID_REGS="TX(REG\d*|\d+REG)"
2444     VALID_BITS=""
2445     PRINT_MODE=P_SHOW_ONLY_NAME
2446   END=REGISTER
2447
2448   BEGIN=REGISTER
2449     VALID_REGS="INTCON\d?"
2450     VALID_BITS="(G|PE)IE"
2451     PRINT_MODE=P_ALWAYS_SHOW
2452   END=REGISTER
2453
2454   BEGIN=REGISTER
2455     VALID_REGS="PIE\d+"
2456     VALID_BITS="(RC|TX)\d*IE"
2457     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2458   END=REGISTER
2459
2460   BEGIN=REGISTER
2461     VALID_REGS="PIR\d+"
2462     VALID_BITS="(RC|TX)\d*IF"
2463     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2464   END=REGISTER
2465
2466   BEGIN=REGISTER
2467     VALID_REGS="ANSEL[A-Z]*"
2468     VALID_BITS=""
2469     PRINT_MODE=P_ALWAYS_SHOW
2470   END=REGISTER
2471
2472   BEGIN=REGISTER
2473     VALID_REGS="ADCON\d+"
2474     VALID_BITS=""
2475     PRINT_MODE=P_ALWAYS_SHOW
2476   END=REGISTER
2477
2478   BEGIN=REGISTER
2479     VALID_REGS="TRIS([A-Z]|IO)"
2480     VALID_BITS="TRIS([A-Z]|IO)\d"
2481     PRINT_MODE=P_ALWAYS_SHOW
2482   END=REGISTER
2483
2484 END=PERIPHERY
2485
2486 ################################################################################
2487 #
2488 #       This table describes that which onto port pins connected a peripheral.
2489 #
2490
2491 BEGIN=IO_TABLE
2492
2493   BEGIN=MCU:10f320,10f322
2494     ADC=AN0:RA0,AN1:RA1,AN2:RA2
2495     PWM=PWM1:RA0,PWM2:RA1
2496   END=MCU
2497
2498   BEGIN=MCU:12f615,12f617,12f683
2499     ADC=AN0:GP0,AN1:GP1,AN2:GP2,AN3:GP4
2500     CCP=CCP:GP2
2501     PWM=PWM:GP2
2502   END=MCU
2503
2504   BEGIN=MCU:12f675
2505     ADC=AN0:GP0,AN1:GP1,AN2:GP2,AN3:GP4
2506   END=MCU
2507
2508   BEGIN=MCU:12f752
2509     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4
2510     CCP=CCP:RA2
2511     PWM=PWM:RA2
2512   END=MCU
2513
2514   BEGIN=MCU:12f1501
2515     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4
2516     PWM=PWM1:RA2,PWM2:RA0,PWM3:RA4,PWM4:RA5
2517   END=MCU
2518
2519   BEGIN=MCU:12f1571
2520     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4
2521     PWM=PWM1:RA1/RA5,PWM2:RA0/RA4,PWM3:RA2
2522   END=MCU
2523
2524   BEGIN=MCU:12f1572
2525     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4
2526     PWM=PWM1:RA1/RA5,PWM2:RA0/RA4,PWM3:RA2
2527     USART=RX:RA1/RA5,TX:RA0/RA4
2528     USART=IO_DIR=RX:1,TX:0
2529   END=MCU
2530
2531   BEGIN=MCU:12f1612
2532     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4
2533     CCP=CCP1:RA2/RA5,CCP2:RA0
2534     PWM=PWM1:RA2/RA5,PWM2:RA0
2535   END=MCU
2536
2537   BEGIN=MCU:12f1822
2538     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4
2539     CCP=CCP:RA2/RA5
2540     PWM=PWM:RA2/RA5
2541     I2C=SDA:RA2,SCL:RA1
2542     SPI=SDI:RA2,SDO:RA0,SCK:RA1,SS:RA0/RA3
2543     USART=RX:RA1/RA5,TX:RA0/RA4
2544     USART=IO_DIR=RX:1,TX:0
2545   END=MCU
2546
2547   BEGIN=MCU:12lf1552
2548     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RA5
2549     I2C=SDA:RA2/RA3,SCL:RA1
2550     SPI=SDI:RA2/RA3,SDO:RA0/RA4,SCK:RA1,SS:RA0/RA3
2551   END=MCU
2552
2553   BEGIN=MCU:16c62
2554     CCP=CCP:RC2
2555     PWM=PWM:RC2
2556     I2C=SDA:RC4,SCL:RC3
2557     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2558   END=MCU
2559
2560   BEGIN=MCU:16c63a,16c65b
2561     CCP=CCP1:RC2,CCP2:RC1
2562     PWM=PWM1:RC2,PWM2:RC1
2563     I2C=SDA:RC4,SCL:RC3
2564     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2565     USART=RX:RC7,TX:RC6
2566     USART=IO_DIR=RX:1,TX:1
2567   END=MCU
2568
2569   BEGIN=MCU:16c71,16c710,16c711,16c715
2570     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3
2571   END=MCU
2572
2573   BEGIN=MCU:16c72,16f72
2574     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2575     CCP=CCP:RC2
2576     PWM=PWM:RC2
2577     I2C=SDA:RC4,SCL:RC3
2578     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2579   END=MCU
2580
2581   BEGIN=MCU:16c73b,16c74b,16f73,16f76
2582     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2583     CCP=CCP1:RC2,CCP2:RC1
2584     PWM=PWM1:RC2,PWM2:RC1
2585     I2C=SDA:RC4,SCL:RC3
2586     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2587     USART=RX:RC7,TX:RC6
2588     USART=IO_DIR=RX:1,TX:1
2589   END=MCU
2590
2591   BEGIN=MCU:16c433
2592     ADC=AN0:GP0,AN1:GP1,AN2:GP2,AN3:GP4
2593   END=MCU
2594
2595   BEGIN=MCU:16c717,16c770,16c771
2596     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RB0,AN5:RB1
2597     CCP=CCP:RB3
2598     PWM=PWM:RB3
2599     I2C=SDA:RB4,SCL:RB2
2600     SPI=SDI:RB4,SDO:RB5,SCK:RB2,SS:RB1
2601   END=MCU
2602
2603   BEGIN=MCU:16c745,16c765
2604     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2605     CCP=CCP1:RC2,CCP2:RC1
2606     PWM=PWM1:RC2,PWM2:RC1
2607     USART=RX:RC7,TX:RC6
2608     USART=IO_DIR=RX:1,TX:1
2609   END=MCU
2610
2611   BEGIN=MCU:16c773
2612     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN8:RB3,AN9:RB3
2613     CCP=CCP1:RC2,CCP2:RC1
2614     PWM=PWM1:RC2,PWM2:RC1
2615     I2C=SDA:RC4,SCL:RC3
2616     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RB1
2617     USART=RX:RC7,TX:RC6
2618     USART=IO_DIR=RX:1,TX:1
2619   END=MCU
2620
2621   BEGIN=MCU:16c774
2622     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB3,AN9:RB3
2623     CCP=CCP1:RC2,CCP2:RC1
2624     PWM=PWM1:RC2,PWM2:RC1
2625     I2C=SDA:RC4,SCL:RC3
2626     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RB1
2627     USART=RX:RC7,TX:RC6
2628     USART=IO_DIR=RX:1,TX:1
2629   END=MCU
2630
2631   BEGIN=MCU:16c781,16c782
2632     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RB0,AN5:RB1,AN6:RB2,AN7:RB3
2633   END=MCU
2634
2635   BEGIN=MCU:16c925,16c926
2636     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2637     CCP=CCP:RC2
2638     PWM=PWM:RC2
2639     I2C=SDA:RC4,SCL:RC3
2640     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2641   END=MCU
2642
2643   BEGIN=MCU:16f74,16f77
2644     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2645     CCP=CCP1:RC2,CCP2:RC1
2646     PWM=PWM1:RC2,PWM2:RC1
2647     I2C=SDA:RC4,SCL:RC3
2648     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2649     USART=RX:RC7,TX:RC6
2650     USART=IO_DIR=RX:1,TX:1
2651   END=MCU
2652
2653   BEGIN=MCU:16f87
2654     CCP=CCP:RB0/RB3
2655     PWM=PWM:RB0/RB3
2656     I2C=SDA:RB1,SCL:RB4
2657     SPI=SDI:RB1,SDO:RB2,SCK:RB4,SS:RB5
2658     USART=RX:RB2,TX:RB5
2659     USART=IO_DIR=RX:1,TX:1
2660   END=MCU
2661
2662   BEGIN=MCU:16f88
2663     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA4,AN5:RB6,AN6:RB7
2664     CCP=CCP:RB0/RB3
2665     PWM=PWM:RB0/RB3
2666     I2C=SDA:RB1,SCL:RB4
2667     SPI=SDI:RB1,SDO:RB2,SCK:RB4,SS:RB5
2668     USART=RX:RB2,TX:RB5
2669     USART=IO_DIR=RX:1,TX:1
2670   END=MCU
2671
2672   BEGIN=MCU:16f616,16hv616,16f684
2673     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2674     CCP=CCP:RC5
2675     PWM=PWM:RC5
2676   END=MCU
2677
2678   BEGIN=MCU:16f627,16f627a,16f628,16f628a,16f648a
2679     CCP=CCP:RB3
2680     PWM=PWM:RB3
2681     USART=RX:RB1,TX:RB2
2682     USART=IO_DIR=RX:1,TX:1
2683   END=MCU
2684
2685   BEGIN=MCU:16f676
2686     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2687   END=MCU
2688
2689   BEGIN=MCU:16f677
2690     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2691     I2C=SDA:RB4,SCL:RB6
2692     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RC6
2693   END=MCU
2694
2695   BEGIN=MCU:16f685
2696     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2697     CCP=CCP:RC5
2698     PWM=PWM:RC5
2699   END=MCU
2700
2701   BEGIN=MCU:16f688
2702     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2703     USART=RX:RC5,TX:RC4
2704     USART=IO_DIR=RX:1,TX:1
2705   END=MCU
2706
2707   BEGIN=MCU:16f687,16f689,16f690
2708     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2709     CCP=CCP:RC5
2710     PWM=PWM:RC5
2711     I2C=SDA:RB4,SCL:RB6
2712     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RC6
2713     USART=RX:RB5,TX:RB7
2714     USART=IO_DIR=RX:1,TX:0
2715   END=MCU
2716
2717   BEGIN=MCU:16f707
2718     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2719     CCP=CCP1:RC2,CCP2:RC1/RB3
2720     PWM=PWM1:RC2,PWM2:RC1/RB3
2721     I2C=SDA:RC4,SCL:RC3
2722     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
2723     USART=RX:RC7,TX:RC6
2724     USART=IO_DIR=RX:1,TX:1
2725   END=MCU
2726
2727   BEGIN=MCU:16f716
2728     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3
2729     CCP=CCP:RB3
2730     PWM=PWM:RB3
2731   END=MCU
2732
2733   BEGIN=MCU:16f720,16f721
2734     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2735     CCP=CCP:RC5
2736     PWM=PWM:RC5
2737     I2C=SDA:RB4,SCL:RB6
2738     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RC6
2739     USART=RX:RB5,TX:RB7
2740     USART=IO_DIR=RX:1,TX:1
2741   END=MCU
2742
2743   BEGIN=MCU:16f722,16f722a,16f723,16f723a,16f726
2744     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2745     CCP=CCP1:RC2,CCP2:RC1/RB3
2746     PWM=PWM1:RC2,PWM2:RC1/RB3
2747     I2C=SDA:RC4,SCL:RC3
2748     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
2749     USART=RX:RC7,TX:RC6
2750     USART=IO_DIR=RX:1,TX:1
2751   END=MCU
2752
2753   BEGIN=MCU:16f724,16f727
2754     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2755     CCP=CCP1:RC2,CCP2:RC1/RB3
2756     PWM=PWM1:RC2,PWM2:RC1/RB3
2757     I2C=SDA:RC4,SCL:RC3
2758     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
2759     USART=RX:RC7,TX:RC6
2760     USART=IO_DIR=RX:1,TX:1
2761   END=MCU
2762
2763   BEGIN=MCU:16f737,16f767
2764     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2765     CCP=CCP1:RC2,CCP2:RC1/RB3,CCP3:RB5
2766     PWM=PWM1:RC2,PWM2:RC1/RB3,PWM3:RB5
2767     I2C=SDA:RC4,SCL:RC3
2768     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2769     USART=RX:RC7,TX:RC6
2770     USART=IO_DIR=RX:1,TX:0
2771   END=MCU
2772
2773   BEGIN=MCU:16f747,16f777
2774     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2775     CCP=CCP1:RC2,CCP2:RC1/RB3,CCP3:RB5
2776     PWM=PWM1:RC2,PWM2:RC1/RB3,PWM3:RB5
2777     I2C=SDA:RC4,SCL:RC3
2778     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2779     USART=RX:RC7,TX:RC6
2780     USART=IO_DIR=RX:1,TX:0
2781   END=MCU
2782
2783   BEGIN=MCU:16f753,16hv753
2784     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2785     CCP=CCP:RC5
2786     PWM=PWM:RC5
2787   END=MCU
2788
2789   BEGIN=MCU:16f785
2790     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2791     CCP=CCP:RC5
2792     PWM=PWM:RC5
2793   END=MCU
2794
2795   BEGIN=MCU:16f818,16f819
2796     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA4
2797     CCP=CCP:RB3
2798     PWM=PWM:RB3
2799     I2C=SDA:RB1,SCL:RB4
2800     SPI=SDI:RB1,SDO:RB2,SCK:RB4,SS:RB5
2801   END=MCU
2802
2803   BEGIN=MCU:16f870
2804     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2805     CCP=CCP:RC2
2806     PWM=PWM:RC2
2807     USART=RX:RC7,TX:RC6
2808     USART=IO_DIR=RX:1,TX:0
2809   END=MCU
2810
2811   BEGIN=MCU:16f871
2812     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2813     CCP=CCP:RC2
2814     PWM=PWM:RC2
2815     USART=RX:RC7,TX:RC6
2816     USART=IO_DIR=RX:1,TX:0
2817   END=MCU
2818
2819   BEGIN=MCU:16f872
2820     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2821     CCP=CCP:RC2
2822     PWM=PWM:RC2
2823     I2C=SDA:RC4,SCL:RC3
2824     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2825   END=MCU
2826
2827   BEGIN=MCU:16f873,16f873a,16f876,16f876a
2828     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2829     CCP=CCP1:RC2,CCP2:RC1
2830     PWM=PWM1:RC2,PWM2:RC1
2831     I2C=SDA:RC4,SCL:RC3
2832     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2833     USART=RX:RC7,TX:RC6
2834     USART=IO_DIR=RX:1,TX:0
2835   END=MCU
2836
2837   BEGIN=MCU:16f874,16f874a,16f877,16f877a
2838     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2839     CCP=CCP1:RC2,CCP2:RC1
2840     PWM=PWM1:RC2,PWM2:RC1
2841     I2C=SDA:RC4,SCL:RC3
2842     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2843     USART=RX:RC7,TX:RC6
2844     USART=IO_DIR=RX:1,TX:0
2845   END=MCU
2846
2847   BEGIN=MCU:16f882,16f883,16f886
2848     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2849     CCP=CCP1:RC2,CCP2:RC1
2850     PWM=PWM1:RC2,PWM2:RC1
2851     I2C=SDA:RC4,SCL:RC3
2852     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2853     USART=RX:RC7,TX:RC6
2854     USART=IO_DIR=RX:1,TX:1
2855   END=MCU
2856
2857   BEGIN=MCU:16f884,16f887
2858     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2859     CCP=CCP1:RC2,CCP2:RC1
2860     PWM=PWM1:RC2,PWM2:RC1
2861     I2C=SDA:RC4,SCL:RC3
2862     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2863     USART=RX:RC7,TX:RC6
2864     USART=IO_DIR=RX:1,TX:1
2865   END=MCU
2866
2867   BEGIN=MCU:16f913,16f916
2868     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3
2869     CCP=CCP:RC5
2870     PWM=PWM:RC5
2871     I2C=SDA:RC7,SCL:RC6
2872     SPI=SDI:RC7,SDO:RC4,SCK:RC6,SS:RA5
2873     USART=RX:RC7,TX:RC6
2874     USART=IO_DIR=RX:1,TX:1
2875   END=MCU
2876
2877   BEGIN=MCU:16f914,16f917,16f946
2878     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2879     CCP=CCP1:RC5,CCP2:RD2
2880     PWM=PWM1:RC5,PWM2:RD2
2881     I2C=SDA:RC7,SCL:RC6
2882     SPI=SDI:RC7,SDO:RC4,SCK:RC6,SS:RA5
2883     USART=RX:RC7,TX:RC6
2884     USART=IO_DIR=RX:1,TX:1
2885   END=MCU
2886
2887   BEGIN=MCU:16f1454
2888     PWM=PWM1:RC5,PWM2:RA5/RC3
2889     I2C=SDA:RC1,SCL:RC0
2890     SPI=SDI:RC1,SDO:RA4/RC2,SCK:RC0,SS:RA3/RC3
2891     USART=RX:RC5,TX:RC4
2892     USART=IO_DIR=RX:1,TX:1
2893   END=MCU
2894
2895   BEGIN=MCU:16f1455
2896     ADC=AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2897     PWM=PWM1:RC5,PWM2:RA5/RC3
2898     I2C=SDA:RC1,SCL:RC0
2899     SPI=SDI:RC1,SDO:RA4/RC2,SCK:RC0,SS:RA3/RC3
2900     USART=RX:RC5,TX:RC4
2901     USART=IO_DIR=RX:1,TX:1
2902   END=MCU
2903
2904   BEGIN=MCU:16f1459
2905     ADC=AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2906     PWM=PWM1:RC5,PWM2:RC6
2907     I2C=SDA:RB4,SCL:RB6
2908     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RA3/RC6
2909     USART=RX:RB5,TX:RB7
2910     USART=IO_DIR=RX:1,TX:1
2911   END=MCU
2912
2913   BEGIN=MCU:16f1503
2914     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2915     PWM=PWM1:RC5,PWM2:RC3,PWM3:RA2,PWM4:RC1
2916     I2C=SDA:RC1,SCL:RC0
2917     SPI=SDI:RC1,SDO:RA4/RC2,SCK:RC0,SS:RA3/RC3
2918   END=MCU
2919
2920   BEGIN=MCU:16f1507
2921     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2922     PWM=PWM1:RC5,PWM2:RC3,PWM3:RA2,PWM4:RC1
2923   END=MCU
2924
2925   BEGIN=MCU:16f1508,16f1509
2926     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2927     PWM=PWM1:RC5,PWM2:RC3,PWM3:RA2,PWM4:RC1
2928     I2C=SDA:RB4,SCL:RB6
2929     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RA3/RC6
2930     USART=RX:RB5,TX:RB7
2931     USART=IO_DIR=RX:1,TX:1
2932   END=MCU
2933
2934   BEGIN=MCU:16f1512,16f1513
2935     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2936     CCP=CCP1:RC2,CCP2:RC1/RB3
2937     PWM=PWM1:RC2,PWM2:RC1/RB3
2938     I2C=SDA:RC4,SCL:RC3
2939     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
2940     USART=RX:RC7,TX:RC6
2941     USART=IO_DIR=RX:1,TX:1
2942   END=MCU
2943
2944   BEGIN=MCU:16f1516,16f1518
2945     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5,AN14:RC2,AN15:RC3,AN16:RC4,AN17:RC5,AN18:RC6,AN19:RC7
2946     CCP=CCP1:RC2,CCP2:RC1/RB3
2947     PWM=PWM1:RC2,PWM2:RC1/RB3
2948     I2C=SDA:RC4,SCL:RC3
2949     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
2950     USART=RX:RC7,TX:RC6
2951     USART=IO_DIR=RX:1,TX:1
2952   END=MCU
2953
2954   BEGIN=MCU:16f1517,16f1519
2955     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5,AN14:RC2,AN15:RC3,AN16:RC4,AN17:RC5,AN18:RC6,AN19:RC7,AN20:RD0,AN21:RD1,AN22:RD2,AN23:RD3,AN24:RD4,AN25:RD5,AN26:RD6,AN27:RD7
2956     CCP=CCP1:RC2,CCP2:RC1/RB3
2957     PWM=PWM1:RC2,PWM2:RC1/RB3
2958     I2C=SDA:RC4,SCL:RC3
2959     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
2960     USART=RX:RC7,TX:RC6
2961     USART=IO_DIR=RX:1,TX:1
2962   END=MCU
2963
2964   BEGIN=MCU:16f1526,16f1527
2965     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6,AN12:RG4,AN13:RG3,AN14:RG2,AN15:RG1,AN16:RF0,AN17:RB0,AN18:RB1,AN19:RB2,AN20:RB3,AN21:RB4,AN22:RB5,AN23:RD0,AN24:RD1,AN25:RD2,AN26:RD3,AN27:RE0,AN28:RE1,AN29:RE2
2966     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4,CCP6:RE6,CCP7:RE5,CCP8:RE4,CCP9:RE3,CCP10:RE2
2967     CCP=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4,PWM6:RE6,PWM7:RE5,PWM8:RE4,PWM9:RE3,PWM10:RE2
2968     I2C=SDA1:RC4,SCL1:RC3,SDA2:RD5,SCL2:RD6
2969     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7,SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
2970     USART=RX1:RC7,TX1:RC6,RX2:RG2,TX2:RG1
2971     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2972   END=MCU
2973
2974   BEGIN=MCU:16lf1554,16lf1559
2975     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN10:RA4,AN11:RC4,AN12:RC2,AN13:RC0,AN20:RA5,AN21:RC5,AN22:RC3,AN23:RC1
2976     PWM=PWM1:RC2,PWM2:RC3
2977     I2C=SDA:RC1/RA3,SCL:RC0
2978     SPI=SDI:RC1/RA3,SDO:RC2/RA4,SCK:RC0,SS:RC3/RA3
2979     USART=RX:RC5/RA4,TX:RC4/RC3
2980     USART=IO_DIR=RX:1,TX:1
2981   END=MCU
2982
2983   BEGIN=MCU:16f1613
2984     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2985     CCP=CCP1:RC5,CCP2:RA5/RC3
2986     PWM=PWM1:RC5,PWM2:RA5/RC3
2987   END=MCU
2988
2989 #
2990 # Remappable peripheral pins. (PPS)
2991 # (The definition valid until a newer definition overwrites the members.)
2992 #
2993   BEGIN=DEFINE
2994     RI0=RA0
2995     RI1=RA1
2996     RI2=RA2
2997     RI3=RA3
2998     RI4=RA4
2999     RI5=RA5
3000     RI6=RC0
3001     RI7=RC1
3002     RI8=RC2
3003     RI9=RC3
3004     RI10=RC4
3005     RI11=RC5
3006
3007     RO0=RA0
3008     RO1=RA1
3009     RO2=RA2
3010     RO3=RA4
3011     RO4=RA5
3012     RO5=RC0
3013     RO6=RC1
3014     RO7=RC2
3015     RO8=RC3
3016     RO9=RC4
3017     RO10=RC5
3018   END=DEFINE
3019
3020   BEGIN=MCU:16f1703
3021     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
3022     CCP=CCP1:RI[0-11],CCP2:RI[0-11]
3023     PWM=PWM1:RO[0-10],PWM2:RO[0-10]
3024     I2C=SDA:RO[0-10],SCL:RO[0-10]
3025     SPI=SDI:RI[0-11],SDO:RO[0-10],SCK:RO[0-10],SS:RI[0-11]
3026   END=MCU
3027
3028   BEGIN=MCU:16f1704,16lf1704,16f1705
3029     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
3030     CCP=CCP1:RI[0-11],CCP2:RI[0-11]
3031     PWM=PWM1:RO[0-10],PWM2:RO[0-10]
3032     I2C=SDA:RO[0-10],SCL:RO[0-10]
3033     SPI=SDI:RI[0-11],SDO:RO[0-10],SCK:RO[0-10],SS:RI[0-11]
3034     USART=RX:RI[0-11],TX:RO[0-10]
3035     USART=IO_DIR=RX:1,TX:1
3036   END=MCU
3037
3038 #
3039 # Remappable peripheral pins. (PPS)
3040 # (The definition valid until a newer definition overwrites the members.)
3041 #
3042   BEGIN=DEFINE
3043     RI0=RA0
3044     RI1=RA1
3045     RI2=RA2
3046     RI3=RA3
3047     RI4=RA4
3048     RI5=RA5
3049     RI6=RB4
3050     RI7=RB5
3051     RI8=RB6
3052     RI9=RB7
3053     RI10=RC0
3054     RI11=RC1
3055     RI12=RC2
3056     RI13=RC3
3057     RI14=RC4
3058     RI15=RC5
3059     RI16=RC6
3060     RI17=RC7
3061   END=DEFINE
3062
3063   BEGIN=MCU:16f1707
3064     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
3065     CCP=CCP1:RI[0-17],CCP2:RI[0-17]
3066     PWM=PWM1:RO[0-10],PWM2:RO[0-10]
3067     I2C=SDA:RO[0-10],SCL:RO[0-10]
3068     SPI=SDI:RI[0-17],SDO:RO[0-10],SCK:RO[0-10],SS:RI[0-17]
3069   END=MCU
3070
3071   BEGIN=MCU:16f1708,16lf1708,16f1709
3072     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
3073     CCP=CCP1:RI[0-17],CCP2:RI[0-17]
3074     PWM=PWM1:RO[0-10],PWM2:RO[0-10]
3075     I2C=SDA:RO[0-10],SCL:RO[0-10]
3076     SPI=SDI:RI[0-17],SDO:RO[0-10],SCK:RO[0-10],SS:RI[0-17]
3077     USART=RX:RI[0-17],TX:RO[0-10]
3078     USART=IO_DIR=RX:1,TX:1
3079   END=MCU
3080
3081 #
3082 # Remappable peripheral pins. (PPS)
3083 # (The definition valid until a newer definition overwrites the members.)
3084 #
3085   BEGIN=DEFINE
3086     RI0=RB0
3087     RI1=RB1
3088     RI2=RB2
3089     RI3=RB3
3090     RI4=RB4
3091     RI5=RB5
3092     RI6=RB6
3093     RI7=RB7
3094     RI8=RC0
3095     RI9=RC1
3096     RI10=RC2
3097     RI11=RC3
3098     RI12=RC4
3099     RI13=RC5
3100     RI14=RC6
3101     RI15=RC7
3102
3103     RO0=RB0
3104     RO1=RB1
3105     RO2=RB2
3106     RO3=RB3
3107     RO4=RB4
3108     RO5=RB5
3109     RO6=RB6
3110     RO7=RB7
3111     RO8=RC0
3112     RO9=RC1
3113     RO10=RC2
3114     RO11=RC3
3115     RO12=RC4
3116     RO13=RC5
3117     RO14=RC6
3118     RO15=RC7
3119   END=DEFINE
3120
3121   BEGIN=MCU:16f1713,16f1716,16f1718
3122     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5,AN14:RC2,AN15:RC3,AN16:RC4:AN17:RC5,AN18:RC6,AN19:RC7
3123     CCP=CCP1:RI[0-15],CCP2:RI[0-15]
3124     PWM=PWM1:RO[0-15],PWM2:RO[0-15]
3125     I2C=SDA:RO[0-15],SCL:RO[0-15]
3126     SPI=SDI:RI[0-15],SDO:RO[8-15],SCK:RO[0-15],SS:RI[8-15]
3127     USART=RX:RI[0-15],TX:RO[0-15]
3128     USART=IO_DIR=RX:1,TX:1
3129   END=MCU
3130
3131   BEGIN=MCU:16f1717,16f1719
3132     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5,AN14:RC2,AN15:RC3,AN16:RC4:AN17:RC5,AN18:RC6,AN19:RC7,AN20:RD0,AN21:RD1,AN22:RD2,AN23:RD3,AN24:RD4,AN25:RD5,AN26:RD6,AN27:RD7
3133     CCP=CCP1:RI[0-15],CCP2:RI[0-15]
3134     PWM=PWM1:RO[0-15],PWM2:RO[0-15]
3135     I2C=SDA:RO[0-15],SCL:RO[0-15]
3136     SPI=SDI:RI[0-15],SDO:RO[8-15],SCK:RO[0-15],SS:RI[8-15]
3137     USART=RX:RI[0-15],TX:RO[0-15]
3138     USART=IO_DIR=RX:1,TX:1
3139   END=MCU
3140
3141   BEGIN=MCU:16f1782,16f1783
3142     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3143     CCP=CCP1:RC2/RB0,CCP2:RC1/RB3
3144     PWM=PWM1:RC2/RB0,PWM2:RC1/RB3
3145     I2C=SDA:RC4/RB6,SCL:RC3/RB7
3146     SPI=SDI:RC4/RB6,SDO:RC5/RB5,SCK:RC3/RB7,SS:RA5
3147     USART=RX:RC7,TX:RC6
3148     USART=IO_DIR=RX:1,TX:1
3149   END=MCU
3150
3151   BEGIN=MCU:16f1786
3152     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3153     CCP=CCP1:RC2/RB0,CCP2:RC1/RB3,CCP3:RC6/RB5
3154     PWM=PWM1:RC2/RB0,PWM2:RC1/RB3,PWM3:RC6/RB5
3155     I2C=SDA:RC4/RB6,SCL:RC3/RB7
3156     SPI=SDI:RC4/RB6,SDO:RC5/RB5,SCK:RC3/RB7,SS:RA5
3157     USART=RX:RC7,TX:RC6
3158     USART=IO_DIR=RX:1,TX:1
3159   END=MCU
3160
3161   BEGIN=MCU:16f1784,16f1787
3162     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5,AN21:RD1
3163     CCP=CCP1:RC2/RB0,CCP2:RC1/RB3,CCP3:RE0/RB5
3164     PWM=PWM1:RC2/RB0,PWM2:RC1/RB3,PWM3:RE0/RB5
3165     I2C=SDA:RC4/RB6,SCL:RC3/RB7
3166     SPI=SDI:RC4/RB6,SDO:RC5/RB5,SCK:RC3/RB7,SS:RA5
3167     USART=RX:RC7/RB7,TX:RC6/RB6
3168     USART=IO_DIR=RX:1,TX:1
3169   END=MCU
3170
3171   BEGIN=MCU:16f1788
3172     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3173     CCP=CCP1:RC2/RB0,CCP2:RC1/RB3,CCP3:RC6/RB5
3174     PWM=PWM1:RC2/RB0,PWM2:RC1/RB3,PWM3:RC6/RB5
3175     I2C=SDA:RC4/RB6,SCL:RC3/RB7
3176     SPI=SDI:RC4/RB6,SDO:RC5/RB5,SCK:RC3/RB7,SS:RA0/RA5/RB4
3177     USART=RX:RC7/RB7,TX:RC6/RB6
3178     USART=IO_DIR=RX:1,TX:1
3179   END=MCU
3180
3181   BEGIN=MCU:16f1789
3182     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5,AN21:RD1
3183     CCP=CCP1:RC2/RB0,CCP2:RC1/RB3,CCP3:RE0/RB5
3184     PWM=PWM1:RC2/RB0,PWM2:RC1/RB3,PWM3:RE0/RB5
3185     I2C=SDA:RC4/RB6,SCL:RC3/RB7
3186     SPI=SDI:RC4/RB6,SDO:RC5/RB5,SCK:RC3/RB7,SS:RA0/RA5/RB4
3187     USART=RX:RC7/RB7,TX:RC6/RB6
3188     USART=IO_DIR=RX:1,TX:1
3189   END=MCU
3190
3191   BEGIN=MCU:16f1823
3192     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
3193     CCP=CCP:RC5
3194     PWM=PWM:RC5
3195     I2C=SDA:RC1,SCL:RC0
3196     SPI=SDI:RC1,SDO:RA4/RC2,SCK:RC0,SS:RA3/RC3
3197     USART=RX:RC5/RA1,TX:RC4/RA0
3198     USART=IO_DIR=RX:1,TX:1
3199   END=MCU
3200
3201   BEGIN=MCU:16f1824,16f1825
3202     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
3203     CCP=CCP1:RC5,CCP2:RC3/RA5,CCP3:RA2,CCP4:RC1
3204     PWM=PWM1:RC5,PWM2:RC3/RA5,PWM3:RA2,PWM4:RC1
3205     I2C=SDA:RC1,SCL:RC0
3206     SPI=SDI:RC1,SDO:RA4/RC2,SCK:RC0,SS:RA3/RC3
3207     USART=RX:RC5/RA1,TX:RC4/RA0
3208     USART=IO_DIR=RX:1,TX:1
3209   END=MCU
3210
3211   BEGIN=MCU:16f1826
3212     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA4,AN5:RB6,AN6:RB7,AN7:RB5,AN8:RB4,AN9:RB3,AN10:RB2,AN11:RB1
3213     CCP=CCP:RB3/RB0
3214     PWM=PWM:RB3/RB0
3215     I2C=SDA:RB1,SCL:RB4
3216     SPI=SDI:RB1,SDO:RB2/RA6,SCK:RB4,SS:RB5/RA5
3217     USART=RX:RB1/RB2,TX:RB2/RB5
3218     USART=IO_DIR=RX:1,TX:1
3219   END=MCU
3220
3221   BEGIN=MCU:16f1827,16f1847
3222     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA4,AN5:RB6,AN6:RB7,AN7:RB5,AN8:RB4,AN9:RB3,AN10:RB2,AN11:RB1
3223     CCP=CCP1:RB3/RB0,CCP2:RB6/RA7,CCP3:RA3,CCP4:RA4
3224     PWM=PWM1:RB3/RB0,PWM2:RB6/RA7,PWM3:RA3,PWM4:RA4
3225     I2C=SDA1:RB1,SCL1:RB4,SDA2:RB2,SCL2:RB5
3226     SPI=SDI1:RB1,SDO1:RB2/RA6,SCK1:RB4,SS1:RB5/RA5,SDI2:RB2,SDO2:RA0,SCK2:RB5,SS2:RA1
3227     USART=RX:RB1/RB2,TX:RB2/RB5
3228     USART=IO_DIR=RX:1,TX:1
3229   END=MCU
3230
3231   BEGIN=MCU:16f1828
3232     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
3233     CCP=CCP1:RC5,CCP2:RC3/RA5,CCP3:RA2,CCP4:RC6
3234     PWM=PWM1:RC5,PWM2:RC3/RA5,PWM3:RA2,PWM4:RC6
3235     I2C=SDA:RB4,SCL:RB6
3236     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RC6
3237     USART=RX:RC5/RB5,TX:RC4/RB7
3238     USART=IO_DIR=RX:1,TX:1
3239   END=MCU
3240
3241   BEGIN=MCU:16f1829
3242     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3,AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
3243     CCP=CCP1:RC5,CCP2:RC3/RA5,CCP3:RA2,CCP4:RC6
3244     PWM=PWM1:RC5,PWM2:RC3/RA5,PWM3:RA2,PWM4:RC6
3245     I2C=SDA1:RB4,SCL1:RB6,SDA2:RB5,SCL2:RB7
3246     SPI=SDI1:RB4,SDO1:RC7,SCK1:RB6,SS1:RC6,SDI2:RB5,SDO2:RC1/RA5,SCK2:RB7,SS2:RC0/RA4
3247     USART=RX:RC5/RB5,TX:RC4/RB7
3248     USART=IO_DIR=RX:1,TX:1
3249   END=MCU
3250
3251   BEGIN=MCU:16f1933,16f1936,16f1938
3252     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3253     CCP=CCP1:RC2,CCP2:RC1/RB3,CCP3:RC6/RB5,CCP4:RB0,CCP5:RA4
3254     PWM=PWM1:RC2,PWM2:RC1/RB3,PWM3:RC6/RB5,PWM4:RB0,PWM5:RA4
3255     I2C=SDA:RC4,SCL:RC3
3256     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
3257     USART=RX:RC7,TX:RC6
3258     USART=IO_DIR=RX:1,TX:1
3259   END=MCU
3260
3261   BEGIN=MCU:16f1934,16f1937,16f1939
3262     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3263     CCP=CCP1:RC2,CCP2:RC1/RB3,CCP3:RE0/RB5,CCP4:RD1,CCP5:RE2
3264     PWM=PWM1:RC2,PWM2:RC1/RB3,PWM3:RE0/RB5,PWM4:RD1,PWM5:RE2
3265     I2C=SDA:RC4,SCL:RC3
3266     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA0/RA5
3267     USART=RX:RC7,TX:RC6
3268     USART=IO_DIR=RX:1,TX:1
3269   END=MCU
3270
3271   BEGIN=MCU:16f1946,16f1947
3272     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6,AN12:RG4,AN13:RG3,AN14:RG2,AN15:RG1,AN16:RF0
3273     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3274     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3275     I2C=SDA1:RC4,SCL1:RC3,SDA2:RD5,SCL2:RD6
3276     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7,SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3277     USART=RX1:RC7,TX1:RC6,RX2:RG2,TX2:RG1
3278     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3279   END=MCU
3280
3281   BEGIN=MCU:16lf1902,16lf1903
3282     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3283   END=MCU
3284
3285   BEGIN=MCU:16lf1906
3286     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3287     USART=RX:RC7,TX:RC6
3288     USART=IO_DIR=RX:1,TX:0
3289   END=MCU
3290
3291   BEGIN=MCU:16lf1904,16lf1907
3292     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2,AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
3293     USART=RX:RC7,TX:RC6
3294     USART=IO_DIR=RX:1,TX:0
3295   END=MCU
3296
3297 END=IO_TABLE