sdcc/support/scripts/pic16-header-parser.pl

   1 #!/usr/bin/perl -w
   2
   3 =back
   4
   5   Copyright (C) 2012-2014, Molnar Karoly <molnarkaroly@users.sf.net>
   6
   7     This file is part of SDCC.
   8
   9     This software is provided 'as-is', without any express or implied
  10     warranty.  In no event will the authors be held liable for any damages
  11     arising from the use of this software.
  12
  13     Permission is granted to anyone to use this software for any purpose,
  14     including commercial applications, and to alter it and redistribute it
  15     freely, subject to the following restrictions:
  16
  17     1. The origin of this software must not be misrepresented; you must not
  18        claim that you wrote the original software. If you use this software
  19        in a product, an acknowledgment in the product documentation would be
  20        appreciated but is not required.
  21
  22     2. Altered source versions must be plainly marked as such, and must not be
  23        misrepresented as being the original software.
  24
  25     3. This notice may not be removed or altered from any source distribution.
  26
  27 ================================================================================
  28
  29     Proposal for use: ./pic16-header-parser.pl -gp
  30
  31     This program creates seven files in the current directory:
  32
  33         adc.h.gen
  34         ccp.h.gen
  35         pwm.h.gen
  36         i2c.h.gen
  37         spi.h.gen
  38         usart.h.gen
  39         peripheral.groups
  40
  41     In these the MCUs can be seen in groups, according to a periphery.
  42     These informations helps to realize the handling of periphery.
  43     Of course necessary to study the data sheets as well.
  44
  45     $Id$
  46 =cut
  47
  48 use strict;
  49 use warnings;
  50 no if $] >= 5.018, warnings => "experimental::smartmatch";        # perl 5.16
  51 use 5.10.1;
  52 use feature 'switch';           # Starting from 5.10.1.
  53 use POSIX 'ULONG_MAX';
  54
  55 use constant FALSE => 0;
  56 use constant TRUE  => 1;
  57
  58 use constant P_NO_SHOW_BITS     => 0;
  59 use constant P_NO_SHOW_IF_EMPTY => 1;
  60 use constant P_ALWAYS_SHOW      => 2;
  61 use constant P_SHOW_ONLY_NAME   => 3;
  62
  63 my @default_paths =
  64   (
  65   '/usr/share/sdcc/non-free/include',
  66   '/usr/share/sdcc/include',
  67   '/usr/local/share/sdcc/non-free/include',
  68   '/usr/local/share/sdcc/include'
  69   );
  70
  71 my $default_port = 'pic16';
  72 my $header_name_filter = 'pic18f\d+[a-z]*\d+\.h';
  73
  74 my $include_path;
  75 my $out_tail = '.gen';
  76 my $peri_group = 'peripheral.groups';
  77 my $table_border = (' ' x 19) . '+' . ('---------+' x 8);
  78
  79 my %reg_addresses = ();
  80
  81 my @some_ADC_registers =
  82   (
  83   'ADCON\d+[HL]?',
  84   'ADCTMUEN\d+[HL]',
  85   'ADCHIT\d+[HL]',
  86   'ADC[HS]S\d+[HL]',
  87   'ADRES[HL]?|ADCBUF\d+[HL]?',
  88   'ANCON\d+',
  89   'ANSEL[\dHL]?',
  90   'ANSEL[A-O]'
  91   );
  92
  93 #-----------------------------------------------
  94
  95 =back
  96         The structure of one element of the @periphery_table array.
  97
  98         {
  99         NAME => '',
 100         REGS => [
 101                   {
 102                   VALID_REGS => '',
 103                   VALID_BITS => '',
 104                   PRINT_MODE => P_ALWAYS_SHOW
 105                   },
 106
 107                        ...
 108
 109                   {
 110                   }
 111                 ]
 112         }
 113
 114 =cut
 115
 116 my @periphery_table = ();
 117
 118 #-----------------------------------------------
 119
 120 =back
 121         The structure of one element of the @io_table_by_mcu hash:
 122
 123         {
 124         'ADC'   => {
 125                    'AN0' => [],
 126
 127                    ...
 128
 129                    'AN4' => []
 130                    },
 131
 132         ...
 133
 134         'USART' => {}
 135         }
 136 =cut
 137
 138 my %io_table_by_mcu = ();
 139
 140 #-----------------------------------------------
 141
 142 =back
 143         The structure of one element of the @io_dir_table_by_mcu hash:
 144
 145         {
 146         'ADC'   => {},
 147
 148         ...
 149
 150         'USART' => {
 151                    'RX' => 1,
 152                    'TX' => 0
 153                    }
 154         }
 155 =cut
 156
 157 my %io_dir_table_by_mcu = ();
 158
 159 #-----------------------------------------------
 160
 161 =back
 162         The structure of one element of the @mcu_raw array:
 163
 164         {       Descriptor of MCU.
 165         NAME      => '',     The name of MCU.
 166         REG_REFS  => {       Accelerate searching of the registers.
 167                      'PIR1'  => register_reference, ---+
 168                      'TRISD' => register_reference, ---|---+
 169                      ...                               |   |
 170                      ...                               |   .
 171                      },                                |   .
 172         REG_ARRAY => [      The array of registers.    |   .
 173                        {                A register. <--+
 174                        NAME     => 'PIR1',  The name of register.
 175                        ADDRESS  => 0,       The address of register.
 176                        BITNAMES => [        The bits of register.
 177                                      [],      The names of bit.
 178                                      [],
 179                                      [],
 180                                      [],
 181                                      [],
 182                                      [],
 183                                      [],
 184                                      []
 185                                    ]
 186                        },
 187
 188                        ...
 189
 190                        {
 191                        }
 192                      ]
 193         }
 194 =cut
 195
 196 my @mcu_raw = ();
 197
 198 #-----------------------------------------------
 199
 200 =back
 201         The structure of one element of the @mcu_filtered and @mcu_groups arrays:
 202
 203         {       Descriptor of MCU.
 204         NAME       => '',     The name of MCU.
 205         IN_GROUP   => 0,      This member of a MCU group.
 206         REG_REFS   => {       Accelerate searching of the registers.
 207                       'PIR1'  => register_reference, ----------------------+
 208                       'TRISD' => register_reference, ----------------------|---+
 209                       ...                                                  |   |
 210                       ...                                                  |   |
 211                       },                                                   |   .
 212         REG_GROUPS => [      The group of all necessary register.          |   .
 213                         {                The first register group.         |   .
 214                         VALID_REGS => '',    The valid names of registers. |
 215                         VALID_BITS => '',    The valid names of bits.      |
 216                         PRINT_MODE => 0,     The mode of print.            |
 217                         REG_ARRAY  => [      The array of registers.       |
 218                                         {                A register. <-----+
 219                                         NAME     => 'PIR1',  The name of register.
 220                                         ADDRESS  => 0,       The address of register.
 221                                         GROUP    => undef,   Back reference of REG_GROUPS.
 222                                         TOUCHED  => 0,       Touched register during the search.
 223                                         EMPTY    => 0,       True if the register became empty after the filtering.
 224                                         BITNAMES => [        The bits of register.
 225                                                       [],      The names of bit.
 226                                                       [],
 227                                                       [],
 228                                                       [],
 229                                                       [],
 230                                                       [],
 231                                                       [],
 232                                                       []
 233                                                     ]
 234                                         },
 235
 236                                         ...
 237
 238                                         {
 239                                         }
 240                                       ]
 241                         },
 242
 243                         ...
 244
 245                         {                The last register group.
 246                         }
 247                       ]
 248         }
 249 =cut
 250
 251 my @mcu_filtered = ();
 252
 253 my @mcu_groups = ();
 254
 255 my %definitions = ();
 256 my %io_groups = ();
 257
 258 #-----------------------------------------------
 259
 260 my $verbose = 0;
 261 my $make_groups;
 262 my $only_prime;
 263 my $out_handler;
 264 my $initial_border;
 265
 266 my $peri_groups = '';
 267
 268 ################################################################################
 269 ################################################################################
 270 ################################################################################
 271 ################################################################################
 272
 273 sub basename($)
 274   {
 275   return ($_[0] =~ /([^\/]+)$/) ? $1 : '';
 276   }
 277
 278 #-------------------------------------------------------------------------------
 279
 280 sub Log
 281   {
 282   return if (pop(@_) > $verbose);
 283   foreach (@_) { print STDERR $_; }
 284   print STDERR "\n";
 285   }
 286
 287 #-------------------------------------------------------------------------------
 288
 289 sub Out
 290   {
 291   foreach (@_) { print $out_handler $_; }
 292   }
 293
 294 #-------------------------------------------------------------------------------
 295
 296 sub Outl
 297   {
 298   Out(@_);
 299   print $out_handler "\n";
 300   }
 301
 302 #-------------------------------------------------------------------------------
 303
 304 sub Outf
 305   {
 306   printf $out_handler (shift(@_), @_);
 307   }
 308
 309 #-------------------------------------------------------------------------------
 310
 311 sub Outfl
 312   {
 313   Outf(@_);
 314   print $out_handler "\n";
 315   }
 316
 317 #-------------------------------------------------------------------------------
 318
 319 sub smartCompare($$)
 320   {
 321   my ($Str1, $Str2) = @_;
 322
 323   if (${$Str1} =~ /^\d/o && ${$Str2} =~ /^\d/o)
 324     {
 325         # $Str1 number and $Str2 number
 326     return (int(${$Str1}) <=> int(${$Str2}));
 327     }
 328
 329   return (${$Str1} cmp ${$Str2});
 330   }
 331
 332 #-------------------------------------------------------------------------------
 333
 334 sub smartSort($$)
 335   {
 336   my @a_s = ($_[0] =~ /(\d+|\D+)/go);
 337   my @b_s = ($_[1] =~ /(\d+|\D+)/go);
 338   my ($i, $k, $end, $ret);
 339
 340   $i = scalar(@a_s);
 341   $k = scalar(@b_s);
 342
 343   if ($i < $k)
 344     {
 345     $end = $i;
 346     $ret = -1;
 347     }
 348   elsif ($i == $k)
 349     {
 350     $end = $i;
 351     $ret = 0;
 352     }
 353   else
 354     {
 355     $end = $k;
 356     $ret = 1;
 357     }
 358
 359   for ($i = 0; $i < $end; ++$i)
 360     {
 361     $k = smartCompare(\$a_s[$i], \$b_s[$i]);
 362
 363     return $k if ($k != 0);
 364     }
 365
 366   return $ret;
 367   }
 368
 369 #-------------------------------------------------------------------------------
 370
 371 sub exist_in_list($$)
 372   {
 373   my ($List, $Member) = @_;
 374
 375   foreach (@{$List})
 376     {
 377     return TRUE if ($Member =~ /^$_$/);
 378     }
 379
 380   return FALSE;
 381   }
 382
 383 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 384 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 385 #@@@@@@@@@@@@@@@@@@@@@@                                 @@@@@@@@@@@@@@@@@@@@@@@@
 386 #@@@@@@@@@@@@@@@@@@@@@  Populates the peripheral table.  @@@@@@@@@@@@@@@@@@@@@@@
 387 #@@@@@@@@@@@@@@@@@@@@@@                                 @@@@@@@@@@@@@@@@@@@@@@@@
 388 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 389 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 390
 391 sub add_periphery($)
 392   {
 393   my $peri = {
 394              NAME => lc($_[0]),
 395              REGS => []
 396              };
 397
 398   push(@periphery_table, $peri);
 399   return $peri->{REGS};
 400   }
 401
 402 #-------------------------------------------------------------------------------
 403
 404 sub add_reg_def($)
 405   {
 406   my $def = {
 407             VALID_REGS => '',
 408             VALID_BITS => '',
 409             PRINT_MODE => P_ALWAYS_SHOW
 410             };
 411
 412   push(@{$_[0]}, $def);
 413   }
 414
 415 #-------------------------------------------------------------------------------
 416
 417 sub resolve_define($)
 418   {
 419   my $Name = $_[0];
 420   my $ig = \@{$io_groups{$Name}};
 421   my @array = ();
 422   my $r;
 423
 424   if (defined($ig) && scalar(@{$ig}) > 0)
 425     {
 426     foreach (@{$ig})
 427       {
 428       $r = $definitions{$_};
 429       push(@array, ((defined($r)) ? $r : $_));
 430       }
 431     }
 432   else
 433     {
 434     $r = $definitions{$Name};
 435     push(@array, ((defined($r)) ? $r : $Name));
 436     }
 437
 438   return \@array;
 439   }
 440
 441 #-------------------------------------------------------------------------------
 442
 443 sub add_io_pins($$$)
 444   {
 445   my ($Mcu_group, $Peri, $Pins) = @_;
 446   my %pin_groups = ();
 447   my ($mcu, $io);
 448   my @ports;
 449
 450   foreach (@{$Pins})
 451     {
 452     if ($_ !~ /^(\w+):(\S+)$/o)
 453       {
 454       print STDERR "This piece is wrong: \"$_\" (" . join(',', @{$Mcu_group}) . ")\n";
 455       exit(1);
 456       }
 457
 458     $io = $1;
 459     @ports = ();
 460
 461     foreach (split('/', $2))
 462       {
 463       if ($_ =~ /^(\w+)\[(\d+)-(\d+)\]$/o)
 464         {
 465         # This is a section. E.g.: "RP[0-18]"
 466
 467         my ($name, $first, $second) = ($1, int($2), int($3));
 468
 469         if ($first > $second)
 470           {
 471           print STDERR "\"$_\" The first number ($first) greather than the second number ($second)!\n";
 472           exit(1);
 473           }
 474
 475         while ($first <= $second)
 476           {
 477           push(@ports, @{resolve_define("$name$first")});
 478           ++$first;
 479           }
 480         }
 481       else
 482         {
 483         # This is a name. E.g.: "RD7" or "RP22"
 484
 485         push(@ports, @{resolve_define($_)});
 486         }
 487       } # foreach (split('/', $2))
 488
 489     $pin_groups{$io} = [ sort {$a cmp $b} @ports ];
 490     } # foreach (@{$Pins})
 491
 492   foreach $mcu (@{$Mcu_group})
 493     {
 494     foreach $io (keys(%pin_groups))
 495       {
 496       $io_table_by_mcu{$mcu}->{$Peri}{$io} = [ @{$pin_groups{$io}} ];
 497       }
 498     }
 499   }
 500
 501 #-------------------------------------------------------------------------------
 502
 503 sub add_io_dir($$$)
 504   {
 505   my ($Mcu_group, $Peri, $Pins) = @_;
 506   my %pin_groups = ();
 507   my ($mcu, $io, $dir);
 508   my @ports;
 509
 510   foreach (@{$Pins})
 511     {
 512     if ($_ !~ /^(\w+):([01])$/o)
 513       {
 514       print STDERR "This piece is wrong: \"$_\" (" . join(',', @{$Mcu_group}) . ")\n";
 515       exit(1);
 516       }
 517
 518     $dir = int($2);
 519     @ports = @{resolve_define($1)};
 520
 521     if (@ports > 1)
 522       {
 523       print STDERR "Only one I/O line can be specified: \"$_\" (" . join(',', @{$Mcu_group}) . ")\n";
 524       exit(1);
 525       }
 526
 527     $pin_groups{$ports[0]} = $dir;
 528     } # foreach (@{$Pins})
 529
 530   foreach $mcu (@{$Mcu_group})
 531     {
 532     foreach $io (keys(%pin_groups))
 533       {
 534       $io_dir_table_by_mcu{$mcu}->{$Peri}{$io} = $pin_groups{$io};
 535       }
 536     }
 537   }
 538
 539 #-------------------------------------------------------------------------------
 540
 541 sub load_periphery_data()
 542   {
 543   my $periphery = undef;
 544   my @mcu_group = ();
 545   my @blocks = ();
 546   my ($line, $block, $key, $val);
 547
 548   foreach (grep(! /^\s*$|^\s*#/o, <DATA>))
 549     {
 550     chomp;
 551     s/#.*$//o;                  # Remove ending comment.
 552     s/^\s*|\s*$//go;            # Remove starting and ending whitespaces.
 553     $line = $_;
 554
 555     if ($line =~ /^BEGIN=(\S+)$/o)
 556       {
 557       $block = $1;
 558
 559       given ($block)
 560         {
 561         when (['IO_TABLE', 'DEFINE', 'GROUP'])
 562           {
 563           }
 564
 565         when (/^(PERIPHERY):(\w+)$/o)
 566           {
 567           $block = $1;
 568           $periphery = add_periphery($2);
 569           }
 570
 571         when ('REGISTER')
 572           {
 573           if (! defined($periphery))
 574             {
 575             print STDERR "There is no periphery to which can be assigned the following register.\n";
 576             exit(1);
 577             }
 578
 579           add_reg_def($periphery);
 580           }
 581
 582         when (/^(MCU):(\S+)$/o)
 583           {
 584           $block = $1;
 585           @mcu_group = split(',', $2);
 586           }
 587
 588         default
 589           {
 590           print STDERR "Unknown block: \"$block\"\n";
 591           exit(1);
 592           }
 593         } # given ($block)
 594
 595       push(@blocks, $block);
 596       next;
 597       } # if ($line =~ /^BEGIN=(\S+)$/o)
 598     elsif ($line =~ /^END=(\S+)$/o)
 599       {
 600       $block = $1;
 601
 602       if (scalar(@blocks) == 0 || $blocks[$#blocks] ne $block)
 603         {
 604         print STDERR "The \"$block\" block has no beginning!\n";
 605         exit(1);
 606         }
 607
 608       given ($block)
 609         {
 610         when ('PERIPHERY') { $periphery = undef; }
 611         when ('MCU')       { @mcu_group = (); }
 612         }
 613
 614       $block = pop(@blocks);
 615       next;
 616       } # elsif ($line =~ /^END=(\w+)$/o)
 617
 618         #...................................
 619
 620     $block = (scalar(@blocks) > 0) ? $blocks[$#blocks] : '';
 621
 622     given ($block)
 623       {
 624       when ('REGISTER')
 625         {
 626         if ($line =~ /^([^=]+)=(.*)$/o)
 627           {
 628         # This a key -- value pair.
 629
 630           if (scalar(@{$periphery}) == 0)
 631             {
 632             print STDERR "No entry of the register table!\n";
 633             exit(1);
 634             }
 635
 636           ($key, $val) = ($1, $2);
 637         # Reference of the last member.
 638           my $peri_r = \%{$periphery->[$#{$periphery}]};
 639
 640           if ($val =~ /^['"]([^'"]*)['"]$/o)
 641             {
 642         # This a text.
 643
 644             $peri_r->{$key} = $1;
 645             }
 646           else
 647             {
 648         # This a constant.
 649
 650             $peri_r->{$key} = eval($val);
 651             }
 652           }
 653         } # when ('REGISTER')
 654
 655       when ('DEFINE')
 656         {
 657         if ($line !~ /^([^=]+)=(.*)$/o)
 658           {
 659           print STDERR "This is not key -- value pair: $line\n";
 660           exit(1);
 661           }
 662
 663         ($key, $val) = ($1, $2);
 664
 665         if (defined($val) && $val ne '')
 666           {
 667           $definitions{$key} = $val;
 668           }
 669         else
 670           {
 671         # Undefine the $key.
 672
 673           delete($definitions{$key});
 674           }
 675         } # when ('DEFINE')
 676
 677       when ('GROUP')
 678         {
 679         if ($line !~ /^([^=]+)=(.*)$/o)
 680           {
 681           print STDERR "This is not group -- members definition: $line\n";
 682           exit(1);
 683           }
 684
 685         @{$io_groups{$1}} = split(',', $2);
 686         } # when ('GROUP')
 687
 688       when ('MCU')
 689         {
 690         if ($line =~ /^([^=]+)=(.*)$/o)
 691           {
 692           my ($peri, $val) = (lc($1), $2);
 693
 694           if ($val =~ /^([^=]+)=(.*)$/o)
 695             {
 696         # It is possible that this is a property.
 697
 698             my $prop = $1;
 699             $val = $2;
 700
 701             given ($prop)
 702               {
 703               when ('IO_DIR')
 704                 {
 705                 my @pins = split(',', $val);
 706
 707                 add_io_dir(\@mcu_group, $peri, \@pins);
 708                 }
 709
 710               default
 711                 {
 712                 print STDERR "This is unknown property definition: $line\n";
 713                 exit(1);
 714                 }
 715               }
 716             }
 717           else
 718             {
 719             my @pins = split(',', $val);
 720
 721             add_io_pins(\@mcu_group, $peri, \@pins);
 722             }
 723           } # if ($line =~ /^([^=]+)=(.*)$/o)
 724         } # when ('MCU')
 725       } # given ($block)
 726     } # foreach (grep(! /^\s*$|^\s*#/o, <DATA>))
 727
 728   if (scalar(@blocks) > 0)
 729     {
 730     print STDERR "The \"$blocks[$#blocks]\" block has no ending!\n";
 731     exit(1);
 732     }
 733   }
 734
 735 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 736 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 737 #@@@@@@@@@@@@@@                                                  @@@@@@@@@@@@@@@
 738 #@@@@@@@@@@@@@  Load all registers, which will find in a header.  @@@@@@@@@@@@@@
 739 #@@@@@@@@@@@@@@                                                  @@@@@@@@@@@@@@@
 740 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 741 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 742
 743 sub add_mcu_raw($)
 744   {
 745   my $Name = uc($_[0]);
 746
 747   Log("add_mcu_raw(): $Name", 9);
 748
 749   my $mcu_ref = {
 750                 NAME      => $Name,
 751                 REG_REFS  => {},
 752                 REG_ARRAY => []
 753                 };
 754
 755   push(@mcu_raw, $mcu_ref);
 756   return $mcu_ref;
 757   }
 758
 759 #-------------------------------------------------------------------------------
 760
 761 sub add_register_raw($$$)
 762   {
 763   my ($Mcu_raw, $Name, $Address) = @_;
 764
 765   Log(sprintf("add_register_raw(): $Name, 0x%04X", $Address), 9);
 766
 767   my $reg = {
 768             NAME     => $Name,
 769             ADDRESS  => $Address,
 770             BITNAMES => []
 771             };
 772
 773   push(@{$Mcu_raw->{REG_ARRAY}}, $reg);
 774   $Mcu_raw->{REG_REFS}->{$Name} = $reg;
 775   }
 776
 777 #-------------------------------------------------------------------------------
 778
 779 sub read_regs_from_header($$)
 780   {
 781   my ($Mcu_ref, $Fname) = @_;
 782   my $path = "$include_path/$Fname";
 783   my ($fh, $name, $addr, $bit_addr, $bitnames, $width);
 784
 785   if (! open($fh, '<', $path))
 786     {
 787     print STDERR "\a\t$0 : Can not open the $path header file!\n";
 788     exit(1);
 789     }
 790
 791   Log("read_regs_from_header(): $path", 6);
 792   $bitnames = [];
 793
 794   foreach (grep(! /^\s*$/o, <$fh>))
 795     {
 796     chomp;
 797     s/\r$//o;
 798     s/^\s*|\s*$//go;
 799
 800     my $line = $_;
 801
 802     Log(">>>>: $line", 7);
 803
 804     if ($line =~ /^#include\s+"(\S+)"$/o)
 805       {
 806       &read_regs_from_header($Mcu_ref, $1);
 807       }
 808     elsif ($line =~ /^#\s*define\s+(\w+_ADDR)\s+0[xX]([[:xdigit:]]+)$/o)
 809       {
 810       Log("reg_addresses\{$1\} = hex($2)", 8);
 811       $reg_addresses{$1} = hex($2);
 812       }
 813     elsif ($line =~ /^extern\b/o &&
 814            $line =~ /\b__sfr\b/o &&
 815            (($addr) = ($line =~ /\b__at\s*\(\s*0[xX]([[:xdigit:]]+)\s*\)/o)) &&
 816            (($name) = ($line =~ /\b(\w+)\s*;$/o)))
 817       {
 818         # extern __at(0x0000) __sfr INDF;
 819         # extern __sfr __at(0x0003) STATUS;
 820         #
 821
 822       add_register_raw($Mcu_ref, $name, hex($addr));
 823       }
 824     elsif ($line =~ /^extern\s+__sfr\s+__at\s*\((\w+_ADDR)\)\s+(\w+);$/o)
 825       {
 826         # extern __sfr  __at (EEDATA_ADDR)  EEDATA;
 827         #
 828
 829       if (! defined($reg_addresses{$1}))
 830         {
 831         print STDERR "This register: $2 not have address!\n";
 832         exit(1);
 833         }
 834
 835       add_register_raw($Mcu_ref, $2, $reg_addresses{$1});
 836       }
 837     elsif ($line =~ /\bstruct\b/o)
 838       {
 839       Log("\tbit_addr = 0", 8);
 840       $bit_addr = 0;
 841       }
 842     elsif ($line =~ /^unsigned(?:\s+char|\s+int)?\s*:\s*(\d+)\s*;$/o)
 843       {
 844         # unsigned char :1;
 845         # unsigned int : 4;
 846         #
 847
 848       $width = int($1);
 849       $bit_addr += $width;
 850       Log("\tbit_addr += $width ($bit_addr)", 8);
 851       }
 852     elsif ($line =~ /^unsigned(?:\s+char|\s+int)?\s*(\w+)\s*:\s*(\d+)\s*;$/o)
 853       {
 854         # unsigned char PCFG2:1;
 855         # unsigned int PSA:1;
 856         # unsigned TRISG  :5;
 857         #
 858
 859       ($name, $width) = ($1, int($2));
 860
 861       if ($width == 1)
 862         {
 863         Log("\tpush(bitnames->\[$bit_addr\], $name)", 8);
 864         push(@{$bitnames->[$bit_addr]}, $name);
 865         }
 866       else
 867         {
 868         Log("\t$name", 8);
 869         }
 870
 871       $bit_addr += $width;
 872       Log("\tbit_addr += $width ($bit_addr)", 8);
 873       }
 874     elsif ($line =~ /^\}\s*(?:__)?(\w+)bits_t\s*;$/o || $line =~ /^\}\s*(?:__)?(\w+)_t\s*;$/o)
 875       {
 876       my $reg_ref = $Mcu_ref->{REG_REFS}->{$1};
 877
 878       if (! defined($reg_ref))
 879         {
 880         print STDERR "This register: $1 not have data structure!\n";
 881         exit(1);
 882         }
 883
 884       Log("\treg_ref : $reg_ref)", 8);
 885       $reg_ref->{BITNAMES} = $bitnames;
 886       $bitnames = [];
 887       }
 888     } # foreach (grep(! /^\s*$/o, <$fh>))
 889
 890   close($fh);
 891
 892   my $array = \@{$Mcu_ref->{REG_ARRAY}};
 893
 894   return if (scalar(@{$array}) == 0);
 895
 896         # Within the array sorts by name the registers.
 897
 898   @{$array} = sort {smartSort($a->{NAME}, $b->{NAME})} @{$array};
 899   }
 900
 901 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 902 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 903 #@@@@@@@@@@                                                          @@@@@@@@@@@
 904 #@@@@@@@@@  To periphery fitting in a manner, filters the registers.  @@@@@@@@@@
 905 #@@@@@@@@@@                                                          @@@@@@@@@@@
 906 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 907 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 908
 909 sub add_mcu($$)
 910   {
 911   my ($Peri_regs, $Mcu_raw) = @_;
 912
 913   my $mcu = {
 914             NAME       => $Mcu_raw->{NAME},
 915             REG_REFS   => {},
 916             IN_GROUP   => FALSE,
 917             REG_GROUPS => []
 918             };
 919
 920   Log("add_mcu($mcu->{NAME})", 8);
 921
 922         # Copies the master periphery table.
 923
 924   foreach (@{$Peri_regs})
 925     {
 926     my $group = {
 927                 VALID_REGS => $_->{VALID_REGS},
 928                 VALID_BITS => $_->{VALID_BITS},
 929                 PRINT_MODE => $_->{PRINT_MODE},
 930                 REG_ARRAY  => []
 931                 };
 932
 933     push(@{$mcu->{REG_GROUPS}}, $group);
 934     }
 935
 936   push(@mcu_filtered, $mcu);
 937   return $mcu;
 938   }
 939
 940 #-------------------------------------------------------------------------------
 941
 942 sub add_register($$)
 943   {
 944   my ($Mcu, $Reg_raw) = @_;
 945   my $name = $Reg_raw->{NAME};
 946
 947   Log("add_register($Mcu->{NAME}, $name)", 8);
 948
 949   foreach (@{$Mcu->{REG_GROUPS}})
 950     {
 951     if ($name =~ /^$_->{VALID_REGS}$/)
 952       {
 953         # This register fits into this group.
 954
 955       if ($name =~ /^([\D_]+)1$/ && defined($Mcu->{REG_REFS}->{$1}))
 956         {
 957         # This register already exists. E.g.: RCREG1 --> RCREG
 958         return undef;
 959         }
 960
 961       my $reg = {
 962                 NAME     => $name,
 963                 ADDRESS  => $Reg_raw->{ADDRESS},
 964                 GROUP    => $_,
 965                 TOUCHED  => FALSE,
 966                 EMPTY    => FALSE,
 967                 BITNAMES => []
 968                 };
 969
 970       push(@{$_->{REG_ARRAY}}, $reg);
 971       $Mcu->{REG_REFS}->{$name} = $reg;
 972       return $reg;
 973       }
 974     }
 975
 976   return undef;
 977   }
 978
 979 #-------------------------------------------------------------------------------
 980
 981         # Cut down frippery from the bit names.
 982
 983 sub cut_frippery_from_bitnames($$)
 984   {
 985   my ($Regname, $Bits) = @_;
 986
 987   return if (! defined($Bits) || scalar(@{$Bits}) <= 0);
 988
 989   my $changed = 0;
 990   my $new_bits = [];
 991
 992   foreach (@{$Bits})
 993     {
 994     $changed += ($_ =~ s/^${Regname}_|_${Regname}$//);
 995     $changed += ($_ =~ s/^(\d+)$/bit_$1/o);
 996     push(@{$new_bits}, $_);
 997     }
 998
 999   $Bits = $new_bits if ($changed);
1000   }
1001
1002 #-------------------------------------------------------------------------------
1003
1004 sub tris_ansel_filter($$)
1005   {
1006   my ($Peri_pins, $Pin_name) = @_;
1007
1008   return TRUE if (! defined($Peri_pins) ||
1009                   ($Pin_name !~ /^TRIS[A-O]\d+$/io &&
1010                    $Pin_name !~ /^ANS[A-O]\d+$/io));
1011
1012   foreach (keys(%{$Peri_pins}))
1013     {
1014     foreach (@{$Peri_pins->{$_}})
1015       {
1016       if ($_ =~ /^R([A-O]\d+)$/io)
1017         {
1018         # E.g.: "RC7" --> "TRISC7"; "RC7" --> "ANSC7"
1019         my $tail  = uc($1);
1020         my $trisx = "TRIS$tail";
1021         my $ansx  = "ANS$tail";
1022
1023         return TRUE if ($Pin_name eq $trisx || $Pin_name eq $ansx);
1024         }
1025       }
1026     }
1027
1028   return FALSE;
1029   }
1030
1031 #-------------------------------------------------------------------------------
1032
1033 sub filter_regs_from_raw($)
1034   {
1035   my $Periphery = $_[0];
1036   my ($peri_name, $peri_regs) = ($Periphery->{NAME}, $Periphery->{REGS});
1037
1038   foreach (@mcu_raw)
1039     {
1040     my $mcu       = lc($_->{NAME});
1041     my $io_ref    = \%{$io_table_by_mcu{$mcu}};
1042     my $peri_pins = (defined($io_ref)) ? $io_ref->{$peri_name} : undef;
1043
1044         # The MCU not have this periphery.
1045     next if (! defined($peri_pins));
1046
1047     my $mcu_ref   = add_mcu($peri_regs, $_);
1048
1049     foreach my $reg_raw (@{$_->{REG_ARRAY}})
1050       {
1051       my $reg_dst = add_register($mcu_ref, $reg_raw);
1052
1053       next if (! defined($reg_dst));
1054
1055       my $bits_src   = $reg_raw->{BITNAMES};
1056       my $bits_dst   = $reg_dst->{BITNAMES};
1057       my $valid_bits = $reg_dst->{GROUP}->{VALID_BITS};
1058       my $empty      = TRUE;
1059
1060       if (defined($valid_bits) && $valid_bits ne '')
1061         {
1062         # Filtering follows.
1063
1064         for (my $i = 0; $i < 8; ++$i)
1065           {
1066           my $new_bits = [];
1067
1068           cut_frippery_from_bitnames($reg_dst->{NAME}, \@{$bits_src->[$i]});
1069           foreach (@{$bits_src->[$i]})
1070             {
1071         # Only those names notes, which passed through the filter.
1072
1073             push(@{$new_bits}, $_) if (defined($_) && $_ =~ /^$valid_bits$/ &&
1074                                        tris_ansel_filter($peri_pins, $_));
1075             }
1076
1077           if (scalar(@{$new_bits}) > 0)
1078             {
1079             $bits_dst->[$i] = $new_bits;
1080             $empty = FALSE;
1081             }
1082           else
1083             {
1084             $bits_dst->[$i] = undef;
1085             }
1086           }
1087         }
1088       else
1089         {
1090         # No filtering.
1091
1092         for (my $i = 0; $i < 8; ++$i)
1093           {
1094           cut_frippery_from_bitnames($reg_dst->{NAME}, \@{$bits_src->[$i]});
1095           $empty = FALSE if (defined($bits_src->[$i]));
1096
1097           $bits_dst->[$i] = [ @{$bits_src->[$i]} ];
1098           }
1099         }
1100
1101       $reg_dst->{EMPTY} = $empty;
1102       }
1103     } # foreach (@mcu_raw)
1104   }
1105
1106 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1107 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1108 #@@@@@@@@                                                               @@@@@@@@
1109 #@@@@@@@  Collects same group them MCU which, have the same peripheral.  @@@@@@@
1110 #@@@@@@@@                                                               @@@@@@@@
1111 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1112 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1113
1114 sub load_touched_flags($$)
1115   {
1116   my $Level = $_[1];
1117
1118   foreach (@{$_[0]->{REG_GROUPS}})
1119     {
1120     foreach (@{$_->{REG_ARRAY}})
1121       {
1122       $_->{TOUCHED} = $Level;
1123       }
1124     }
1125   }
1126
1127 #-------------------------------------------------------------------------------
1128
1129 sub find_not_touched_reg($)
1130   {
1131   foreach (@{$_[0]->{REG_GROUPS}})
1132     {
1133     foreach (@{$_->{REG_ARRAY}})
1134       {
1135       next if ($_->{EMPTY});            # It does not take into account the empty register.
1136
1137       return TRUE if (! $_->{TOUCHED}); # This register left out from a previous comparison.
1138       }
1139     }
1140
1141   return FALSE;
1142   }
1143
1144 #-------------------------------------------------------------------------------
1145
1146 sub find_register($$)
1147   {
1148   my $Prime_reg = $_[1];
1149   my $cand_reg = $_[0]->{REG_REFS}->{$Prime_reg->{NAME}};
1150
1151   return $cand_reg if (defined($cand_reg) && $cand_reg->{ADDRESS} == $Prime_reg->{ADDRESS});
1152
1153   return undef;
1154   }
1155
1156 #-------------------------------------------------------------------------------
1157
1158 sub find_equivalent_bit($$)
1159   {
1160   my ($Bits1, $Bits2) = @_;
1161   my $d = (defined($Bits1) && scalar(@{$Bits1}) > 0) + (defined($Bits2) && scalar(@{$Bits2}) > 0);
1162
1163   return TRUE if ($d == 0);
1164
1165   if ($d != 2)
1166     {
1167     Log("find_equivalent_bit(): Only one bits defined.", 6);
1168     return FALSE;
1169     }
1170
1171   foreach (@{$Bits1})
1172     {
1173     return TRUE if (/^$_$/ ~~ @{$Bits2});
1174
1175     Log("find_equivalent_bit(): The $_ bit not defined.", 7);
1176     }
1177
1178   return FALSE;
1179   }
1180
1181 #-------------------------------------------------------------------------------
1182
1183 sub find_equivalent_register($$$)
1184   {
1185   my ($Candidate, $Prime_reg, $Print_mode) = @_;
1186   my ($cand_reg, $prime_bits, $cand_bits);
1187
1188   $cand_reg = find_register($Candidate, $Prime_reg);
1189
1190   if (! defined($cand_reg))
1191     {
1192     Log("find_equivalent_register(): Not exists candidate reg: $Prime_reg->{NAME} in $Candidate->{NAME} MCU", 5);
1193     return FALSE;
1194     }
1195
1196   $cand_reg->{TOUCHED} = TRUE;
1197
1198         # Not performs comparison, if the bits not must be displayed.
1199   return TRUE if ($Print_mode == P_SHOW_ONLY_NAME);
1200
1201   $prime_bits = \@{$Prime_reg->{BITNAMES}};
1202   $cand_bits  = \@{$cand_reg->{BITNAMES}};
1203
1204   for (my $i = 0; $i < 8; ++$i)
1205     {
1206     if (! find_equivalent_bit(\@{$cand_bits->[$i]}, \@{$prime_bits->[$i]}))
1207       {
1208       Log("find_equivalent_register(): Not finds equivalent bit: $cand_reg->{NAME} != $Prime_reg->{NAME}", 5);
1209       return FALSE;
1210       }
1211     }
1212
1213   return TRUE;
1214   }
1215
1216 #-------------------------------------------------------------------------------
1217
1218 sub find_equivalent_mcu($$)
1219   {
1220   my ($Prime, $Candidate) = @_;
1221
1222   load_touched_flags($Prime, FALSE);
1223   load_touched_flags($Candidate, FALSE);
1224
1225   foreach (@{$Prime->{REG_GROUPS}})
1226     {
1227     my $pmode = $_->{PRINT_MODE};
1228
1229     foreach (@{$_->{REG_ARRAY}})
1230       {
1231       $_->{TOUCHED} = TRUE;
1232       next if ($_->{EMPTY});
1233
1234       return FALSE if (! find_equivalent_register($Candidate, $_, $pmode));
1235       }
1236     }
1237
1238   if (find_not_touched_reg($Prime))
1239     {
1240     Log("find_equivalent_mcu(): Finds not touched register: $Prime->{NAME}", 5);
1241     return FALSE;
1242     }
1243
1244   if (find_not_touched_reg($Candidate))
1245     {
1246     Log("find_equivalent_mcu(): Finds not touched register: $Candidate->{NAME}", 5);
1247     return FALSE;
1248     }
1249
1250   return TRUE;
1251   }
1252
1253 #-------------------------------------------------------------------------------
1254
1255 sub cmp_io_dirs($$$)
1256   {
1257   my ($Prime, $Candidate, $Periphery) = @_;
1258   my $prime_io = $io_dir_table_by_mcu{lc($Prime->{NAME})};
1259   my $cand_io  = $io_dir_table_by_mcu{lc($Candidate->{NAME})};
1260   my $d = (defined($prime_io) && scalar(keys %{$prime_io}) > 0) + (defined($cand_io) && scalar(keys %{$cand_io}) > 0);
1261
1262   return TRUE  if ($d == 0);
1263   return FALSE if ($d != 2);
1264
1265   my ($pr, $ca) = ($prime_io->{$Periphery}, $cand_io->{$Periphery});
1266
1267   $d = (defined($pr) && scalar(keys %{$pr}) > 0) + (defined($ca) && scalar(keys %{$ca}) > 0);
1268
1269   return TRUE  if ($d == 0);
1270   return FALSE if ($d != 2);
1271
1272   foreach (keys(%{$pr}))
1273     {
1274     $d = $ca->{$_};
1275
1276     return FALSE if (! defined($d) || $d != $pr->{$_});
1277     }
1278
1279   return TRUE;
1280   }
1281
1282 #-------------------------------------------------------------------------------
1283
1284 sub make_mcu_groups($)
1285   {
1286   my $Periphery = $_[0];
1287   my $index = 0;
1288
1289   foreach (@mcu_filtered)
1290     {
1291     next if ($_->{IN_GROUP});
1292
1293     my $group = \@{$mcu_groups[$index]};
1294     my $prime = $_;
1295
1296         # The prime - reference - member of group;
1297     push(@{$group}, $_);
1298     $_->{IN_GROUP} = TRUE;
1299
1300     foreach (@mcu_filtered)
1301       {
1302       next if ($_->{IN_GROUP} || $prime == $_);
1303
1304       if (find_equivalent_mcu($prime, $_) && cmp_io_dirs($prime, $_, $Periphery))
1305         {
1306         Log("make_mcu_groups(): $prime->{NAME} == $_->{NAME}\n", 5);
1307         push(@{$group}, $_);
1308         $_->{IN_GROUP} = TRUE;
1309         }
1310       }
1311
1312     @{$group} = sort {smartSort($a->{NAME}, $b->{NAME})} @{$group};
1313     ++$index;
1314     }
1315   }
1316
1317 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1318 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1319 #@@@@@@@@@@@@@@@@@@@@@@@@                             @@@@@@@@@@@@@@@@@@@@@@@@@@
1320 #@@@@@@@@@@@@@@@@@@@@@@@  Prints the register tables.  @@@@@@@@@@@@@@@@@@@@@@@@@
1321 #@@@@@@@@@@@@@@@@@@@@@@@@                             @@@@@@@@@@@@@@@@@@@@@@@@@@
1322 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1323 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1324
1325 =back
1326         Sometimes a bit has more name. This procedure selects these from among
1327         the shortest.
1328 =cut
1329
1330 sub find_shortest_name($)
1331   {
1332   my $min = ULONG_MAX;
1333   my $str = '';
1334
1335   foreach (@{$_[0]})
1336     {
1337     my $l = length;
1338
1339     if ($l < $min)
1340       {
1341       $min = $l;
1342       $str = $_;
1343       }
1344     }
1345
1346   return $str;
1347   }
1348
1349 #-------------------------------------------------------------------------------
1350
1351 sub print_registers($$$)
1352   {
1353   my ($Reg_array, $Print_mode, $No_ADC) = @_;
1354   my ($i, $bits);
1355   my $show_closing_border = FALSE;
1356
1357   foreach (@{$Reg_array})
1358     {
1359     next if ($No_ADC && exist_in_list(\@some_ADC_registers, $_->{NAME}));
1360
1361         # Sole bit not have name and the empty register is not must show.
1362     next if ($_->{EMPTY} && $Print_mode == P_NO_SHOW_IF_EMPTY);
1363
1364     if ($Print_mode == P_SHOW_ONLY_NAME)
1365       {
1366       Outfl("%-10s  (%03Xh)", $_->{NAME}, $_->{ADDRESS});
1367       $initial_border = FALSE;
1368       next;
1369       }
1370
1371     if (! $initial_border)
1372       {
1373       Outl($table_border);
1374       $initial_border = TRUE;
1375       }
1376
1377     Outf("%-10s  (%03Xh) |", $_->{NAME}, $_->{ADDRESS});
1378
1379     $bits = \@{$_->{BITNAMES}};
1380     for ($i = 7; $i >= 0; --$i)
1381       {
1382       if (defined($bits->[$i]) && $Print_mode != P_NO_SHOW_BITS)
1383         {
1384         Outf("%-9s|", find_shortest_name(\@{$bits->[$i]}));
1385         }
1386       else
1387         {
1388         Out('         |');
1389         }
1390       }
1391
1392     Outl();
1393     $show_closing_border = TRUE;
1394     } # foreach (@{$_[0]})
1395
1396   Outl($table_border) if ($show_closing_border);
1397   }
1398
1399 #-------------------------------------------------------------------------------
1400
1401         #
1402         # Collects into a list the inputs of ADC, which are uses another
1403         # periphery also.
1404         #
1405
1406 sub filter_off_adc_inputs($$)
1407   {
1408   my ($Peri_pins, $Adc) = @_;
1409   my @adc_pins = ();
1410
1411   if (defined($Adc))
1412     {
1413     foreach my $adc_pin_name (keys(%{$Adc}))
1414       {
1415       my $adc_pin_io = $Adc->{$adc_pin_name};
1416
1417       foreach my $peri_pin_name (keys(%{$Peri_pins}))
1418         {
1419         foreach (@{$Peri_pins->{$peri_pin_name}})
1420           {
1421           if (! (/^$adc_pin_name$/ ~~ @adc_pins) && /^$_$/ ~~ @{$adc_pin_io})
1422             {
1423             push(@adc_pins, $adc_pin_name)
1424             }
1425           }
1426         }
1427       }
1428     }
1429
1430   return \@adc_pins;
1431   }
1432
1433 #-------------------------------------------------------------------------------
1434
1435 sub print_mcu($$)
1436   {
1437   my ($Mcu, $Peri_name) = @_;
1438   my $name       = lc($Mcu->{NAME});
1439   my $io_ref     = \%{$io_table_by_mcu{$name}};
1440   my $io_dir_ref = \%{$io_dir_table_by_mcu{$name}};
1441   my $peri_pins  = (defined($io_ref)) ? $io_ref->{$Peri_name} : undef;
1442   my $peri_dirs  = (defined($io_dir_ref)) ? $io_dir_ref->{$Peri_name} : undef;
1443   my ($adc, $adc_pins, $io, $pin_name, $drop_adc_pins);
1444   my $suppl_info = '';
1445
1446   $drop_adc_pins = FALSE;
1447
1448   if (defined($peri_pins))
1449     {
1450     if ($Peri_name ne 'adc')
1451       {
1452       $adc = \%{$io_ref->{'adc'}};
1453       $adc_pins = filter_off_adc_inputs($peri_pins, $adc);
1454
1455       if (scalar(@{$adc_pins}) > 0)
1456         {
1457         # Supplementary information: Displays inputs of the ADC periphery.
1458
1459         $suppl_info .= "\n";
1460
1461         foreach $pin_name (sort {smartSort($a, $b)} @{$adc_pins})
1462           {
1463           $suppl_info .= "\t$pin_name:";
1464
1465           foreach (@{$adc->{$pin_name}})
1466             {
1467             $suppl_info .= " $_";
1468             }
1469
1470           $suppl_info .= "\n";
1471           }
1472         }
1473       else
1474         {
1475         $drop_adc_pins = TRUE;
1476         }
1477       } # if ($Peri_name ne 'adc')
1478
1479     $suppl_info .= "\n";
1480
1481     foreach $pin_name (sort {smartSort($a, $b)} keys(%{$peri_pins}))
1482       {
1483       $suppl_info .= "\t$pin_name:";
1484
1485       foreach (@{$peri_pins->{$pin_name}})
1486         {
1487         $suppl_info .= " $_";
1488         }
1489
1490       $suppl_info .= "\n";
1491       }
1492     } # if (defined($peri_pins))
1493   else
1494     {
1495     print STDERR "print_mcu(): This MCU $name not have $Peri_name pin!\n";
1496     }
1497
1498   if (defined($peri_dirs))
1499     {
1500     $suppl_info .= "\n    I/O directions after initialization:\n\n";
1501
1502     foreach (sort {smartSort($a, $b)} keys %{$peri_dirs})
1503       {
1504       $io = ($peri_dirs->{$_} == 0) ? '0 (output)' : '1 (input)';
1505       $suppl_info .= "\t$_: $io\n";
1506       }
1507     }
1508
1509   $initial_border = FALSE;
1510
1511   foreach (@{$Mcu->{REG_GROUPS}})
1512     {
1513     next if (scalar(@{$_->{REG_ARRAY}}) == 0);
1514
1515     print_registers(\@{$_->{REG_ARRAY}}, $_->{PRINT_MODE}, $drop_adc_pins);
1516     }
1517
1518   Out($suppl_info);
1519   }
1520
1521 #-------------------------------------------------------------------------------
1522
1523 sub print_all_data($$)
1524   {
1525   my ($Periphery, $Index) = @_;
1526   my $peri_name = $Periphery->{NAME};
1527   my $lock = '__' . uc($peri_name) . '__H__';
1528   my ($sidx, $group_index, $border, $group_name);
1529
1530   Outl("\n#ifndef $lock\n#define $lock\n\n#include \"pic18fam.h\"");
1531
1532   $peri_groups .= "\n    SECTION=" . uc($peri_name) . "\n\n";
1533
1534   if ($make_groups)
1535     {
1536     $group_index = 1;
1537     $border = '#' x 45;
1538
1539     make_mcu_groups($peri_name);
1540
1541     foreach (@mcu_groups)
1542       {
1543       next if (scalar(@{$_}) == 0);
1544
1545       Outl("\n//$border ${group_index}th group $border");
1546
1547       ($group_name) = ($_->[0]->{NAME} =~ /^18f(\w+)$/io);
1548
1549       given ($group_name)
1550         {
1551         # 18fxxJyy
1552         when (/j/io) { $sidx = '1'; }
1553
1554         # 18fxxKyy
1555         when (/k/io) { $sidx = '2'; }
1556
1557         # 18fxxxx
1558         default      { $sidx = '0'; }
1559         }
1560
1561       $group_name =~ s/\D//go;
1562       $group_name = "0$group_name" if (length($group_name) < 4);
1563
1564       $peri_groups .= "18$group_name$Index$sidx:" . join(',', map { lc($_->{NAME}); } @{$_}) . "\n";
1565
1566       if ($only_prime)
1567         {
1568         Outl("\n/*");
1569
1570         # Prints the name of the group members.
1571
1572         foreach (@{$_})
1573           {
1574           Outl("PIC$_->{NAME}");
1575           }
1576
1577         # Only contents of the first it shows, because content of the others same.
1578
1579         print_mcu($_->[0], $peri_name);
1580         Outl('*/');
1581         }
1582       else
1583         {
1584         # Displays full contents of each member of the group.
1585
1586         foreach (@{$_})
1587           {
1588           Outl("\n\n/*\nPIC$_->{NAME}");
1589           print_mcu($_, $peri_name);
1590           Outl('*/');
1591           }
1592         }
1593
1594       ++$group_index;
1595       }
1596     }
1597   else
1598     {
1599         # Displays full contents of each MCU.
1600
1601     foreach (@mcu_filtered)
1602       {
1603       Outl("\n\n/*\nPIC$_->{NAME}");
1604       print_mcu($_, $peri_name);
1605       Outl('*/');
1606       }
1607     }
1608
1609   Outl("\n#endif // $lock");
1610   }
1611
1612 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1613 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1614 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@@                   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1615 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@  The main program.  @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1616 #@@@@@@@@@@@@@@@@@@@@@@@@@@@@@                   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1617 # @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1618 #   @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1619
1620 load_periphery_data();
1621
1622 $include_path = '';
1623 $make_groups = FALSE;
1624 $only_prime = FALSE;
1625
1626 for (my $i = 0; $i < @ARGV; )
1627   {
1628   my $opt = $ARGV[$i++];
1629
1630   given ($opt)
1631     {
1632     when (/^-(I|-include)$/o)
1633       {
1634       die "This option \"$opt\" requires a parameter." if ($i > $#ARGV);
1635
1636       $include_path = $ARGV[$i++];
1637       }
1638
1639     when (/^-(g|-make-groups)$/o)
1640       {
1641       $make_groups = TRUE;
1642       }
1643
1644     when (/^-(p|-only-prime)$/o)
1645       {
1646       $only_prime = TRUE;
1647       }
1648
1649     when (/^-(gp|pg)$/o)
1650       {
1651       $make_groups = TRUE;
1652       $only_prime = TRUE;
1653       }
1654
1655     when (/^-(v|-verbose)$/o)
1656       {
1657       die "This option \"$opt\" requires a parameter.\n" if ($i > $#ARGV);
1658
1659       $verbose = int($ARGV[$i++]);
1660       $verbose = 0 if (! defined($verbose) || $verbose < 0);
1661       $verbose = 10 if ($verbose > 10);
1662       }
1663
1664     when (/^-(h|-help)$/o)
1665       {
1666       print <<EOT
1667 Usage: $0 [options]
1668
1669     Options are:
1670
1671         -I <path> or --include <path>
1672
1673             The program on this path looks for the headers.
1674             If this is not specified, then looking for a installed
1675             sdcc copy in the system.
1676
1677         -g or --make-groups
1678
1679             This command creates groups of MCUs.
1680
1681         -p or --only-prime
1682
1683             Prints only the prime member of an MCU group.
1684
1685         -v <level> or --verbose <level>
1686
1687             It provides information on from the own operation.
1688             Possible value of the level between 0 and 10. (default: 0)
1689
1690         -h or --help
1691
1692             This text.
1693 EOT
1694 ;
1695       exit(0);
1696       }
1697     } # given ($opt)
1698   }
1699
1700 if ($include_path eq '')
1701   {
1702   foreach (@default_paths)
1703     {
1704     if (-d $_)
1705       {
1706       $include_path = "$_/$default_port";
1707       last;
1708       }
1709     }
1710
1711   die "Can not find the directory of sdcc headers!" if ($include_path eq '');
1712   }
1713
1714 opendir(DIR, $include_path) || die "Can not open. -> \"$include_path\"";
1715
1716 print "Include path: \"$include_path\"\n";
1717
1718 my @filelist = grep(-f "$include_path/$_" && /^$header_name_filter$/, readdir(DIR));
1719 closedir(DIR);
1720
1721 @mcu_raw = ();
1722 foreach (sort {smartSort($a, $b)} @filelist)
1723   {
1724   my $name = $_;
1725
1726   print STDERR "Reading the registers from the $_ header ...";
1727
1728   $name =~ s/^pic//io;
1729   $name =~ s/\.\S+$//o;
1730   read_regs_from_header(add_mcu_raw($name), $_);
1731   print STDERR " done.\n";
1732   }
1733
1734 my $p_idx = 0;
1735 foreach (@periphery_table)
1736   {
1737   my $out_name = "$_->{NAME}.h$out_tail";
1738
1739   open($out_handler, '>', $out_name) || die "Can not create the $out_name output!";
1740
1741   print STDERR "Filtering of registers the aspects of $_->{NAME} according to ...";
1742   @mcu_filtered = ();
1743   @mcu_groups = ();
1744   filter_regs_from_raw($_);
1745   print STDERR " done.\n";
1746
1747   print STDERR "Creating the $out_name ...";
1748   print_all_data($_, $p_idx);
1749   print STDERR " done.\n";
1750
1751   close($out_handler);
1752   ++$p_idx;
1753   }
1754
1755 open(GR, '>', $peri_group) || die "Can not create the $peri_group output!";
1756 print GR $peri_groups;
1757 close(GR);
1758
1759 __END__
1760 ################################################################################
1761 #
1762 #   The following rules determine to which registers belong to an peripheral.
1763 #   The description of a periphery is bounded by the BEGIN=TABLE_XXX flags.
1764 #   The description of a register begin after the BEGIN=REGISTER flag.
1765 #
1766 #   BEGIN=PERIPHERY:ADC
1767 #       The "ADC" effect of: An file will be created under the name "adc.tables".
1768 #
1769 #   VALID_REGS -- This a regular expression. Specifies which one a register
1770 #                 applies to this entries.
1771 #
1772 #   VALID_BITS -- This a regular expression. Specifies which bits are interesting,
1773 #                 are important. If an empty string is in there will be no filtering.
1774 #
1775 #   PRINT_MODE -- This a constant. The following values can be:
1776 #
1777 #                 P_NO_SHOW_BITS     -- Does not shows the bits.
1778 #
1779 #                 P_NO_SHOW_IF_EMPTY -- Not shows the register if it is empty.
1780 #                                       (This it could be because there are no bits
1781 #                                        or because the filter thrown out them.)
1782 #
1783 #                 P_ALWAYS_SHOW      -- All conditions shows the register.
1784 #
1785 #                 P_SHOW_ONLY_NAME   -- Only shows the register name and address.
1786 #
1787
1788 ################################################################################
1789 #
1790 #       The ADC module related registers.
1791 #       (There is so, which only indirectly connected to the module.)
1792 #
1793
1794 BEGIN=PERIPHERY:ADC     # ADC --> adc.h.gen
1795
1796   BEGIN=REGISTER
1797     VALID_REGS="ADCON\d+[HL]?"
1798     VALID_BITS=""
1799     PRINT_MODE=P_ALWAYS_SHOW
1800   END=REGISTER
1801
1802   BEGIN=REGISTER
1803     VALID_REGS="ANCON\d+"
1804     VALID_BITS=""
1805     PRINT_MODE=P_ALWAYS_SHOW
1806   END=REGISTER
1807
1808   BEGIN=REGISTER
1809     VALID_REGS="ADCTMUEN\d+[HL]"
1810     VALID_BITS=""
1811     PRINT_MODE=P_ALWAYS_SHOW
1812   END=REGISTER
1813
1814   BEGIN=REGISTER
1815     VALID_REGS="ADCHIT\d+[HL]"
1816     VALID_BITS=""
1817     PRINT_MODE=P_ALWAYS_SHOW
1818   END=REGISTER
1819
1820   BEGIN=REGISTER
1821     VALID_REGS="ADCSS\d+[HL]"
1822     VALID_BITS=""
1823     PRINT_MODE=P_ALWAYS_SHOW
1824   END=REGISTER
1825
1826   BEGIN=REGISTER
1827     VALID_REGS="ADCHS\d+[HL]"
1828     VALID_BITS=""
1829     PRINT_MODE=P_ALWAYS_SHOW
1830   END=REGISTER
1831
1832   BEGIN=REGISTER
1833     VALID_REGS="ADRES[HL]?|ADCBUF\d+[HL]?"
1834     VALID_BITS=""
1835     PRINT_MODE=P_SHOW_ONLY_NAME
1836   END=REGISTER
1837
1838   BEGIN=REGISTER
1839     VALID_REGS="ANSEL[\dHL]?"
1840     VALID_BITS=""
1841     PRINT_MODE=P_ALWAYS_SHOW
1842   END=REGISTER
1843
1844   BEGIN=REGISTER
1845     VALID_REGS="ANSEL[A-O]"
1846     VALID_BITS="ANS[A-O]\d"
1847     PRINT_MODE=P_ALWAYS_SHOW
1848   END=REGISTER
1849
1850   BEGIN=REGISTER
1851     VALID_REGS="(FVR|REF|VREF)CON\d*"
1852     VALID_BITS=""
1853     PRINT_MODE=P_ALWAYS_SHOW
1854   END=REGISTER
1855
1856   BEGIN=REGISTER
1857     VALID_REGS="DAC(|ON\d*|CON\d+)"
1858     VALID_BITS=""
1859     PRINT_MODE=P_ALWAYS_SHOW
1860   END=REGISTER
1861
1862   BEGIN=REGISTER
1863     VALID_REGS="INTCON\d?"
1864     VALID_BITS="((G|PE)IE|GIE[HL])"
1865     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1866   END=REGISTER
1867
1868   BEGIN=REGISTER
1869     VALID_REGS="IPR\d+"
1870     VALID_BITS="ADIP"
1871     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1872   END=REGISTER
1873
1874   BEGIN=REGISTER
1875     VALID_REGS="PIE\d+"
1876     VALID_BITS="ADIE"
1877     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1878   END=REGISTER
1879
1880   BEGIN=REGISTER
1881     VALID_REGS="PIR\d+"
1882     VALID_BITS="ADIF"
1883     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1884   END=REGISTER
1885
1886   BEGIN=REGISTER
1887     VALID_REGS="PMD\d+"
1888     VALID_BITS="ADC\d*MD"
1889     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1890   END=REGISTER
1891
1892   BEGIN=REGISTER
1893     VALID_REGS="CO?M(CON\d*|\d*CON)"
1894     VALID_BITS=""
1895     PRINT_MODE=P_ALWAYS_SHOW
1896   END=REGISTER
1897
1898   BEGIN=REGISTER
1899     VALID_REGS="TRIS([A-Z]|IO)"
1900     VALID_BITS="TRIS([A-Z]|IO)\d"
1901     PRINT_MODE=P_ALWAYS_SHOW
1902   END=REGISTER
1903
1904 END=PERIPHERY
1905
1906 ################################################################################
1907 #
1908 #       The CCP module related registers.
1909 #       (There is so, which only indirectly connected to the module.)
1910 #
1911
1912 BEGIN=PERIPHERY:CCP     # CCP --> ccp.h.gen
1913
1914   BEGIN=REGISTER
1915     VALID_REGS="APFCON\d*"
1916     VALID_BITS="(CCP(SEL\d|\dSEL)|P\d[A-D]SEL)"
1917     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1918   END=REGISTER
1919
1920   BEGIN=REGISTER
1921     VALID_REGS="E?CCP(CON\d*|\d+CON)"
1922     VALID_BITS=""
1923     PRINT_MODE=P_ALWAYS_SHOW
1924   END=REGISTER
1925
1926   BEGIN=REGISTER
1927     VALID_REGS="TCLK(CON\d*|\d+CON)"
1928     VALID_BITS=""
1929     PRINT_MODE=P_ALWAYS_SHOW
1930   END=REGISTER
1931
1932   BEGIN=REGISTER
1933     VALID_REGS="E?CCP(AS\d*|\d+AS)"
1934     VALID_BITS=""
1935     PRINT_MODE=P_ALWAYS_SHOW
1936   END=REGISTER
1937
1938   BEGIN=REGISTER
1939     VALID_REGS="E?CCPR([HL]\d*|\d+[HL])"
1940     VALID_BITS=""
1941     PRINT_MODE=P_SHOW_ONLY_NAME
1942   END=REGISTER
1943
1944   BEGIN=REGISTER
1945     VALID_REGS="CCPTMRS\d*"
1946     VALID_BITS=""
1947     PRINT_MODE=P_ALWAYS_SHOW
1948   END=REGISTER
1949
1950   BEGIN=REGISTER
1951     VALID_REGS="PSTR(CON\d*|\d+CON)"
1952     VALID_BITS=""
1953     PRINT_MODE=P_ALWAYS_SHOW
1954   END=REGISTER
1955
1956   BEGIN=REGISTER
1957     VALID_REGS="(PWM(CON\d*|\d+CON)|ECCP\d*DEL)"
1958     VALID_BITS=""
1959     PRINT_MODE=P_ALWAYS_SHOW
1960   END=REGISTER
1961
1962   BEGIN=REGISTER
1963     VALID_REGS="(T[2468]CON|T10CON)"
1964     VALID_BITS=""
1965     PRINT_MODE=P_ALWAYS_SHOW
1966   END=REGISTER
1967
1968   BEGIN=REGISTER
1969     VALID_REGS="(TMR[2468]|TMR10)"
1970     VALID_BITS=""
1971     PRINT_MODE=P_SHOW_ONLY_NAME
1972   END=REGISTER
1973
1974   BEGIN=REGISTER
1975     VALID_REGS="(PR[2468]|PR10)"
1976     VALID_BITS=""
1977     PRINT_MODE=P_SHOW_ONLY_NAME
1978   END=REGISTER
1979
1980   BEGIN=REGISTER
1981     VALID_REGS="INTCON\d?"
1982     VALID_BITS="((G|PE)IE|GIE[HL])"
1983     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1984   END=REGISTER
1985
1986   BEGIN=REGISTER
1987     VALID_REGS="PIE\d+"
1988     VALID_BITS="CCP\d+IE"
1989     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1990   END=REGISTER
1991
1992   BEGIN=REGISTER
1993     VALID_REGS="IPR\d+"
1994     VALID_BITS="CCP\d+IP"
1995     PRINT_MODE=P_NO_SHOW_IF_EMPTY
1996   END=REGISTER
1997
1998   BEGIN=REGISTER
1999     VALID_REGS="PIR\d+"
2000     VALID_BITS="CCP\d+IF"
2001     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2002   END=REGISTER
2003
2004   BEGIN=REGISTER
2005     VALID_REGS="PMD\d+"
2006     VALID_BITS="(CCP|TMR)\d+MD"
2007     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2008   END=REGISTER
2009
2010   BEGIN=REGISTER
2011     VALID_REGS="ANSEL[\dHL]?"
2012     VALID_BITS=""
2013     PRINT_MODE=P_ALWAYS_SHOW
2014   END=REGISTER
2015
2016   BEGIN=REGISTER
2017     VALID_REGS="ANSEL[A-O]"
2018     VALID_BITS="ANS[A-O]\d"
2019     PRINT_MODE=P_ALWAYS_SHOW
2020   END=REGISTER
2021
2022   BEGIN=REGISTER
2023     VALID_REGS="ADCON\d+[HL]?"
2024     VALID_BITS=""
2025     PRINT_MODE=P_ALWAYS_SHOW
2026   END=REGISTER
2027
2028   BEGIN=REGISTER
2029     VALID_REGS="ANCON\d+"
2030     VALID_BITS=""
2031     PRINT_MODE=P_ALWAYS_SHOW
2032   END=REGISTER
2033
2034   BEGIN=REGISTER
2035     VALID_REGS="PPSCON\d*"
2036     VALID_BITS=""
2037     PRINT_MODE=P_ALWAYS_SHOW
2038   END=REGISTER
2039
2040   BEGIN=REGISTER
2041     VALID_REGS="RPINR[78]"
2042     VALID_BITS=""
2043     PRINT_MODE=P_ALWAYS_SHOW
2044   END=REGISTER
2045
2046   BEGIN=REGISTER
2047     VALID_REGS="RPINR(14_15|16_17|32_33|34_35|36_37|38_39)"
2048     VALID_BITS=""
2049     PRINT_MODE=P_ALWAYS_SHOW
2050   END=REGISTER
2051
2052   BEGIN=REGISTER
2053     VALID_REGS="RPOR\d*"
2054     VALID_BITS=""
2055     PRINT_MODE=P_SHOW_ONLY_NAME
2056   END=REGISTER
2057
2058   BEGIN=REGISTER
2059     VALID_REGS="OD(\d*CON|CON\d*)"
2060     VALID_BITS="CCP\d*OD"
2061     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2062   END=REGISTER
2063
2064   BEGIN=REGISTER
2065     VALID_REGS="TRIS([A-Z]|IO)"
2066     VALID_BITS="TRIS([A-Z]|IO)\d|CCP\d*OD"
2067     PRINT_MODE=P_ALWAYS_SHOW
2068   END=REGISTER
2069
2070 END=PERIPHERY
2071
2072 ################################################################################
2073 #
2074 #       The PWM(CCP) module related registers.
2075 #       (There is so, which only indirectly connected to the module.)
2076 #
2077
2078 BEGIN=PERIPHERY:PWM     # PWM --> pwm.h.gen
2079
2080   BEGIN=REGISTER
2081     VALID_REGS="APFCON\d*"
2082     VALID_BITS="(CCP(SEL\d|\dSEL)|P\d[A-D]SEL)"
2083     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2084   END=REGISTER
2085
2086   BEGIN=REGISTER
2087     VALID_REGS="E?CCP(CON\d*|\d+CON)"
2088     VALID_BITS=""
2089     PRINT_MODE=P_ALWAYS_SHOW
2090   END=REGISTER
2091
2092   BEGIN=REGISTER
2093     VALID_REGS="TCLK(CON\d*|\d+CON)"
2094     VALID_BITS=""
2095     PRINT_MODE=P_ALWAYS_SHOW
2096   END=REGISTER
2097
2098   BEGIN=REGISTER
2099     VALID_REGS="E?CCP(AS\d*|\d+AS)"
2100     VALID_BITS=""
2101     PRINT_MODE=P_ALWAYS_SHOW
2102   END=REGISTER
2103
2104   BEGIN=REGISTER
2105     VALID_REGS="E?CCPR([HL]\d*|\d+[HL])"
2106     VALID_BITS=""
2107     PRINT_MODE=P_SHOW_ONLY_NAME
2108   END=REGISTER
2109
2110   BEGIN=REGISTER
2111     VALID_REGS="CCPTMRS\d*"
2112     VALID_BITS=""
2113     PRINT_MODE=P_ALWAYS_SHOW
2114   END=REGISTER
2115
2116   BEGIN=REGISTER
2117     VALID_REGS="(PT(CON\d*|\d+CON)|PSTR(CON\d*|\d+CON))"
2118     VALID_BITS=""
2119     PRINT_MODE=P_ALWAYS_SHOW
2120   END=REGISTER
2121
2122   BEGIN=REGISTER
2123     VALID_REGS="(PWM(CON\d*|\d+CON)|ECCP\d*DEL)"
2124     VALID_BITS=""
2125     PRINT_MODE=P_ALWAYS_SHOW
2126   END=REGISTER
2127
2128   BEGIN=REGISTER
2129     VALID_REGS="DTCON\d*"
2130     VALID_BITS=""
2131     PRINT_MODE=P_ALWAYS_SHOW
2132   END=REGISTER
2133
2134   BEGIN=REGISTER
2135     VALID_REGS="OVDCON[DS]\d*"
2136     VALID_BITS=""
2137     PRINT_MODE=P_ALWAYS_SHOW
2138   END=REGISTER
2139
2140   BEGIN=REGISTER
2141     VALID_REGS="FLTCONFIG"
2142     VALID_BITS=""
2143     PRINT_MODE=P_ALWAYS_SHOW
2144   END=REGISTER
2145
2146   BEGIN=REGISTER
2147     VALID_REGS="P(DCL\d*|DC\d*L)"
2148     VALID_BITS=""
2149     PRINT_MODE=P_SHOW_ONLY_NAME
2150   END=REGISTER
2151
2152   BEGIN=REGISTER
2153     VALID_REGS="P(DCH\d*|DC\d*H)"
2154     VALID_BITS=""
2155     PRINT_MODE=P_ALWAYS_SHOW
2156   END=REGISTER
2157
2158   BEGIN=REGISTER
2159     VALID_REGS="PT(MR|PER)L\d*"
2160     VALID_BITS=""
2161     PRINT_MODE=P_SHOW_ONLY_NAME
2162   END=REGISTER
2163
2164   BEGIN=REGISTER
2165     VALID_REGS="PT(MR|PER)H\d*"
2166     VALID_BITS=""
2167     PRINT_MODE=P_ALWAYS_SHOW
2168   END=REGISTER
2169
2170   BEGIN=REGISTER
2171     VALID_REGS="SEVTCMPL\d*"
2172     VALID_BITS=""
2173     PRINT_MODE=P_SHOW_ONLY_NAME
2174   END=REGISTER
2175
2176   BEGIN=REGISTER
2177     VALID_REGS="SEVTCMPH\d*"
2178     VALID_BITS=""
2179     PRINT_MODE=P_ALWAYS_SHOW
2180   END=REGISTER
2181
2182   BEGIN=REGISTER
2183     VALID_REGS="(T[2468]CON|T10CON)"
2184     VALID_BITS=""
2185     PRINT_MODE=P_ALWAYS_SHOW
2186   END=REGISTER
2187
2188   BEGIN=REGISTER
2189     VALID_REGS="(TMR[2468]|TMR10)"
2190     VALID_BITS=""
2191     PRINT_MODE=P_SHOW_ONLY_NAME
2192   END=REGISTER
2193
2194   BEGIN=REGISTER
2195     VALID_REGS="(PR[2468]|PR10)"
2196     VALID_BITS=""
2197     PRINT_MODE=P_SHOW_ONLY_NAME
2198   END=REGISTER
2199
2200   BEGIN=REGISTER
2201     VALID_REGS="INTCON\d?"
2202     VALID_BITS="((G|PE)IE|GIE[HL])"
2203     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2204   END=REGISTER
2205
2206   BEGIN=REGISTER
2207     VALID_REGS="IPR\d+"
2208     VALID_BITS="((CCP\d+|TMR[2468])IP|TMR10IP)"
2209     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2210   END=REGISTER
2211
2212   BEGIN=REGISTER
2213     VALID_REGS="PIE\d+"
2214     VALID_BITS="((CCP\d+|TMR[2468])IE|TMR10IE)"
2215     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2216   END=REGISTER
2217
2218   BEGIN=REGISTER
2219     VALID_REGS="PIR\d+"
2220     VALID_BITS="((CCP\d+|TMR[2468])IF|TMR10IF)"
2221     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2222   END=REGISTER
2223
2224   BEGIN=REGISTER
2225     VALID_REGS="PMD\d+"
2226     VALID_BITS="(CCP|TMR)\d+MD"
2227     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2228   END=REGISTER
2229
2230   BEGIN=REGISTER
2231     VALID_REGS="ANSEL[\dHL]?"
2232     VALID_BITS=""
2233     PRINT_MODE=P_ALWAYS_SHOW
2234   END=REGISTER
2235
2236   BEGIN=REGISTER
2237     VALID_REGS="ANSEL[A-O]"
2238     VALID_BITS="ANS[A-O]\d"
2239     PRINT_MODE=P_ALWAYS_SHOW
2240   END=REGISTER
2241
2242   BEGIN=REGISTER
2243     VALID_REGS="ADCON\d+[HL]?"
2244     VALID_BITS=""
2245     PRINT_MODE=P_ALWAYS_SHOW
2246   END=REGISTER
2247
2248   BEGIN=REGISTER
2249     VALID_REGS="ANCON\d+"
2250     VALID_BITS=""
2251     PRINT_MODE=P_ALWAYS_SHOW
2252   END=REGISTER
2253
2254   BEGIN=REGISTER
2255     VALID_REGS="PPSCON\d*"
2256     VALID_BITS=""
2257     PRINT_MODE=P_ALWAYS_SHOW
2258   END=REGISTER
2259
2260   BEGIN=REGISTER
2261     VALID_REGS="RPOR\d*"
2262     VALID_BITS=""
2263     PRINT_MODE=P_SHOW_ONLY_NAME
2264   END=REGISTER
2265
2266   BEGIN=REGISTER
2267     VALID_REGS="OD(\d*CON|CON\d*)"
2268     VALID_BITS="CCP\d*OD"
2269     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2270   END=REGISTER
2271
2272   BEGIN=REGISTER
2273     VALID_REGS="TRIS([A-Z]|IO)"
2274     VALID_BITS="TRIS([A-Z]|IO)\d|CCP\d*OD"
2275     PRINT_MODE=P_ALWAYS_SHOW
2276   END=REGISTER
2277
2278 END=PERIPHERY
2279
2280 ################################################################################
2281 #
2282 #       The I2C(SSP) module related registers.
2283 #       (There is so, which only indirectly connected to the module.)
2284 #
2285
2286 BEGIN=PERIPHERY:I2C     # I2C --> i2c.h.gen
2287
2288   BEGIN=REGISTER
2289     VALID_REGS="APFCON\d*"
2290     VALID_BITS="S(DI|DO|CK|S)\d*SEL"
2291     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2292   END=REGISTER
2293
2294   BEGIN=REGISTER
2295     VALID_REGS="SSP\d*CON\d*"
2296     VALID_BITS=""
2297     PRINT_MODE=P_ALWAYS_SHOW
2298   END=REGISTER
2299
2300   BEGIN=REGISTER
2301     VALID_REGS="SSP\d*ADD\d*"
2302     VALID_BITS=""
2303     PRINT_MODE=P_SHOW_ONLY_NAME
2304   END=REGISTER
2305
2306   BEGIN=REGISTER
2307     VALID_REGS="SSP\d*BUF\d*"
2308     VALID_BITS=""
2309     PRINT_MODE=P_SHOW_ONLY_NAME
2310   END=REGISTER
2311
2312   BEGIN=REGISTER
2313     VALID_REGS="SSP\d*MSK\d*"
2314     VALID_BITS=""
2315     PRINT_MODE=P_SHOW_ONLY_NAME
2316   END=REGISTER
2317
2318   BEGIN=REGISTER
2319     VALID_REGS="SSP\d*STAT\d*"
2320     VALID_BITS=""
2321     PRINT_MODE=P_ALWAYS_SHOW
2322   END=REGISTER
2323
2324   BEGIN=REGISTER
2325     VALID_REGS="INTCON\d?"
2326     VALID_BITS="((G|PE)IE|GIE[HL])"
2327     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2328   END=REGISTER
2329
2330   BEGIN=REGISTER
2331     VALID_REGS="IPR\d+"
2332     VALID_BITS="(BCL|SSP)\d*IP"
2333     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2334   END=REGISTER
2335
2336   BEGIN=REGISTER
2337     VALID_REGS="PIE\d+"
2338     VALID_BITS="(BCL|SSP)\d*IE"
2339     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2340   END=REGISTER
2341
2342   BEGIN=REGISTER
2343     VALID_REGS="PIR\d+"
2344     VALID_BITS="(BCL|SSP)\d*IF"
2345     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2346   END=REGISTER
2347
2348   BEGIN=REGISTER
2349     VALID_REGS="PMD\d+"
2350     VALID_BITS="MSSP\d+MD"
2351     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2352   END=REGISTER
2353
2354   BEGIN=REGISTER
2355     VALID_REGS="ANSEL[\dHL]?"
2356     VALID_BITS=""
2357     PRINT_MODE=P_ALWAYS_SHOW
2358   END=REGISTER
2359
2360   BEGIN=REGISTER
2361     VALID_REGS="ANSEL[A-O]"
2362     VALID_BITS="ANS[A-O]\d"
2363     PRINT_MODE=P_ALWAYS_SHOW
2364   END=REGISTER
2365
2366   BEGIN=REGISTER
2367     VALID_REGS="ADCON\d+[HL]?"
2368     VALID_BITS=""
2369     PRINT_MODE=P_ALWAYS_SHOW
2370   END=REGISTER
2371
2372   BEGIN=REGISTER
2373     VALID_REGS="ANCON\d+"
2374     VALID_BITS=""
2375     PRINT_MODE=P_ALWAYS_SHOW
2376   END=REGISTER
2377
2378   BEGIN=REGISTER
2379     VALID_REGS="PPSCON\d*"
2380     VALID_BITS=""
2381     PRINT_MODE=P_ALWAYS_SHOW
2382   END=REGISTER
2383
2384   BEGIN=REGISTER
2385     VALID_REGS="RPINR2[123]"
2386     VALID_BITS=""
2387     PRINT_MODE=P_ALWAYS_SHOW
2388   END=REGISTER
2389
2390   BEGIN=REGISTER
2391     VALID_REGS="RPOR\d*"
2392     VALID_BITS=""
2393     PRINT_MODE=P_SHOW_ONLY_NAME
2394   END=REGISTER
2395
2396   BEGIN=REGISTER
2397     VALID_REGS="TRIS([A-Z]|IO)"
2398     VALID_BITS="TRIS([A-Z]|IO)\d|SPIOD"
2399     PRINT_MODE=P_ALWAYS_SHOW
2400   END=REGISTER
2401
2402 END=PERIPHERY
2403
2404 ################################################################################
2405 #
2406 #       The SPI(SSP) module related registers.
2407 #       (There is so, which only indirectly connected to the module.)
2408 #
2409
2410 BEGIN=PERIPHERY:SPI     # SPI --> spi.h.gen
2411
2412   BEGIN=REGISTER
2413     VALID_REGS="APFCON\d*"
2414     VALID_BITS="S(DI|DO|CK|S)\d*SEL"
2415     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2416   END=REGISTER
2417
2418   BEGIN=REGISTER
2419     VALID_REGS="SSP\d*CON\d*"
2420     VALID_BITS=""
2421     PRINT_MODE=P_ALWAYS_SHOW
2422   END=REGISTER
2423
2424   BEGIN=REGISTER
2425     VALID_REGS="SSP\d*ADD\d*"
2426     VALID_BITS=""
2427     PRINT_MODE=P_SHOW_ONLY_NAME
2428   END=REGISTER
2429
2430   BEGIN=REGISTER
2431     VALID_REGS="SSP\d*BUF\d*"
2432     VALID_BITS=""
2433     PRINT_MODE=P_SHOW_ONLY_NAME
2434   END=REGISTER
2435
2436   BEGIN=REGISTER
2437     VALID_REGS="SSP\d*MSK\d*"
2438     VALID_BITS=""
2439     PRINT_MODE=P_SHOW_ONLY_NAME
2440   END=REGISTER
2441
2442   BEGIN=REGISTER
2443     VALID_REGS="SSP\d*STAT\d*"
2444     VALID_BITS=""
2445     PRINT_MODE=P_ALWAYS_SHOW
2446   END=REGISTER
2447
2448   BEGIN=REGISTER
2449     VALID_REGS="INTCON\d?"
2450     VALID_BITS="((G|PE)IE|GIE[HL])"
2451     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2452   END=REGISTER
2453
2454   BEGIN=REGISTER
2455     VALID_REGS="IPR\d+"
2456     VALID_BITS="(BCL|SSP)\d*IP"
2457     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2458   END=REGISTER
2459
2460   BEGIN=REGISTER
2461     VALID_REGS="PIE\d+"
2462     VALID_BITS="(BCL|SSP)\d*IE"
2463     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2464   END=REGISTER
2465
2466   BEGIN=REGISTER
2467     VALID_REGS="PIR\d+"
2468     VALID_BITS="(BCL|SSP)\d*IF"
2469     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2470   END=REGISTER
2471
2472   BEGIN=REGISTER
2473     VALID_REGS="PMD\d+"
2474     VALID_BITS="MSSP\d+MD"
2475     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2476   END=REGISTER
2477
2478   BEGIN=REGISTER
2479     VALID_REGS="ANSEL[\dHL]?"
2480     VALID_BITS=""
2481     PRINT_MODE=P_ALWAYS_SHOW
2482   END=REGISTER
2483
2484   BEGIN=REGISTER
2485     VALID_REGS="ANSEL[A-O]"
2486     VALID_BITS="ANS[A-O]\d"
2487     PRINT_MODE=P_ALWAYS_SHOW
2488   END=REGISTER
2489
2490   BEGIN=REGISTER
2491     VALID_REGS="ADCON\d+[HL]?"
2492     VALID_BITS=""
2493     PRINT_MODE=P_ALWAYS_SHOW
2494   END=REGISTER
2495
2496   BEGIN=REGISTER
2497     VALID_REGS="ANCON\d+"
2498     VALID_BITS=""
2499     PRINT_MODE=P_ALWAYS_SHOW
2500   END=REGISTER
2501
2502   BEGIN=REGISTER
2503     VALID_REGS="PPSCON\d*"
2504     VALID_BITS=""
2505     PRINT_MODE=P_ALWAYS_SHOW
2506   END=REGISTER
2507
2508   BEGIN=REGISTER
2509     VALID_REGS="RPINR2[123]"
2510     VALID_BITS=""
2511     PRINT_MODE=P_ALWAYS_SHOW
2512   END=REGISTER
2513
2514   BEGIN=REGISTER
2515     VALID_REGS="RPINR(8_9|10_11|12_13)"
2516     VALID_BITS=""
2517     PRINT_MODE=P_ALWAYS_SHOW
2518   END=REGISTER
2519
2520   BEGIN=REGISTER
2521     VALID_REGS="RPOR\d*"
2522     VALID_BITS=""
2523     PRINT_MODE=P_SHOW_ONLY_NAME
2524   END=REGISTER
2525
2526   BEGIN=REGISTER
2527     VALID_REGS="TRIS([A-Z]|IO)"
2528     VALID_BITS="TRIS([A-Z]|IO)\d|SPIOD"
2529     PRINT_MODE=P_ALWAYS_SHOW
2530   END=REGISTER
2531
2532 END=PERIPHERY
2533
2534 ################################################################################
2535 #
2536 #       The USART module related registers.
2537 #       (There is so, which only indirectly connected to the module.)
2538 #
2539
2540 BEGIN=PERIPHERY:USART   # USART --> usart.h.gen
2541
2542   BEGIN=REGISTER
2543     VALID_REGS="APFCON\d*"
2544     VALID_BITS="(RX(DT)?|TX(CK)?)SEL"
2545     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2546   END=REGISTER
2547
2548   BEGIN=REGISTER
2549     VALID_REGS="RC(STA\d*|\d+STA)"
2550     VALID_BITS=""
2551     PRINT_MODE=P_ALWAYS_SHOW
2552   END=REGISTER
2553
2554   BEGIN=REGISTER
2555     VALID_REGS="TX(STA\d*|\d+STA)"
2556     VALID_BITS=""
2557     PRINT_MODE=P_ALWAYS_SHOW
2558   END=REGISTER
2559
2560   BEGIN=REGISTER
2561     VALID_REGS="BAUD(C(ON|TL)\d*|\d+C(ON|TL))"
2562     VALID_BITS=""
2563     PRINT_MODE=P_ALWAYS_SHOW
2564   END=REGISTER
2565
2566   BEGIN=REGISTER
2567     VALID_REGS="SP(BRG[HL]?\d?|\d+BRG[HL]?)"
2568     VALID_BITS=""
2569     PRINT_MODE=P_SHOW_ONLY_NAME
2570   END=REGISTER
2571
2572   BEGIN=REGISTER
2573     VALID_REGS="RC(REG\d*|\d+REG)"
2574     VALID_BITS=""
2575     PRINT_MODE=P_SHOW_ONLY_NAME
2576   END=REGISTER
2577
2578   BEGIN=REGISTER
2579     VALID_REGS="TX(REG\d*|\d+REG)"
2580     VALID_BITS=""
2581     PRINT_MODE=P_SHOW_ONLY_NAME
2582   END=REGISTER
2583
2584   BEGIN=REGISTER
2585     VALID_REGS="INTCON\d?"
2586     VALID_BITS="((G|PE)IE|GIE[HL])"
2587     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2588   END=REGISTER
2589
2590   BEGIN=REGISTER
2591     VALID_REGS="IPR\d+"
2592     VALID_BITS="(RC|TX)\d*IP"
2593     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2594   END=REGISTER
2595
2596   BEGIN=REGISTER
2597     VALID_REGS="PIE\d+"
2598     VALID_BITS="(RC|TX)\d*IE"
2599     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2600   END=REGISTER
2601
2602   BEGIN=REGISTER
2603     VALID_REGS="PIR\d+"
2604     VALID_BITS="(RC|TX)\d*IF"
2605     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2606   END=REGISTER
2607
2608   BEGIN=REGISTER
2609     VALID_REGS="PMD\d+"
2610     VALID_BITS="UART\d+MD"
2611     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2612   END=REGISTER
2613
2614   BEGIN=REGISTER
2615     VALID_REGS="ANSEL[\dHL]?"
2616     VALID_BITS=""
2617     PRINT_MODE=P_ALWAYS_SHOW
2618   END=REGISTER
2619
2620   BEGIN=REGISTER
2621     VALID_REGS="ANSEL[A-O]"
2622     VALID_BITS="ANS[A-O]\d"
2623     PRINT_MODE=P_ALWAYS_SHOW
2624   END=REGISTER
2625
2626   BEGIN=REGISTER
2627     VALID_REGS="ADCON\d+[HL]?"
2628     VALID_BITS=""
2629     PRINT_MODE=P_ALWAYS_SHOW
2630   END=REGISTER
2631
2632   BEGIN=REGISTER
2633     VALID_REGS="ANCON\d+"
2634     VALID_BITS=""
2635     PRINT_MODE=P_ALWAYS_SHOW
2636   END=REGISTER
2637
2638   BEGIN=REGISTER
2639     VALID_REGS="PPSCON\d*"
2640     VALID_BITS=""
2641     PRINT_MODE=P_ALWAYS_SHOW
2642   END=REGISTER
2643
2644   BEGIN=REGISTER
2645     VALID_REGS="RPINR1[67]"
2646     VALID_BITS=""
2647     PRINT_MODE=P_ALWAYS_SHOW
2648   END=REGISTER
2649
2650   BEGIN=REGISTER
2651     VALID_REGS="RPINR(0_1|2_3|4_5|6_7)"
2652     VALID_BITS=""
2653     PRINT_MODE=P_ALWAYS_SHOW
2654   END=REGISTER
2655
2656   BEGIN=REGISTER
2657     VALID_REGS="RPOR\d*"
2658     VALID_BITS=""
2659     PRINT_MODE=P_SHOW_ONLY_NAME
2660   END=REGISTER
2661
2662   BEGIN=REGISTER
2663     VALID_REGS="OD(\d*CON|CON\d*)"
2664     VALID_BITS="U\d*OD"
2665     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2666   END=REGISTER
2667
2668   BEGIN=REGISTER
2669     VALID_REGS="LATG"
2670     VALID_BITS="U\d*OD"
2671     PRINT_MODE=P_NO_SHOW_IF_EMPTY
2672   END=REGISTER
2673
2674   BEGIN=REGISTER
2675     VALID_REGS="TRIS([A-Z]|IO)"
2676     VALID_BITS="TRIS([A-Z]|IO)\d"
2677     PRINT_MODE=P_ALWAYS_SHOW
2678   END=REGISTER
2679
2680 END=PERIPHERY
2681
2682 ################################################################################
2683 #
2684 #       This table describes that which onto port pins connected a peripheral.
2685 #
2686
2687 BEGIN=IO_TABLE
2688
2689   BEGIN=MCU:18f13k22,18f14k22
2690     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2691     ADC=AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2692     CCP=CCP1:RC5
2693     PWM=PWM:RC5
2694     I2C=SDA:RB4,SCL:RB6
2695     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RC6
2696     USART=RX:RB5,TX:RB7
2697     USART=IO_DIR=RX:1,TX:1
2698   END=MCU
2699
2700   BEGIN=MCU:18f13k50,18f14k50
2701     ADC=AN3:RA4,AN4:RC0,AN5:RC1,AN6:RC2,AN7:RC3
2702     ADC=AN8:RC6,AN9:RC7,AN10:RB4,AN11:RB5
2703     CCP=CCP1:RC5
2704     PWM=PWM:RC5
2705     I2C=SDA:RB4,SCL:RB6
2706     SPI=SDI:RB4,SDO:RC7,SCK:RB6,SS:RC6
2707     USART=RX:RB5,TX:RB7
2708     USART=IO_DIR=RX:1,TX:1
2709   END=MCU
2710
2711   BEGIN=MCU:18f23k20,18f24k20,18f25k20,18f26k20
2712     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2713     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
2714     CCP=CCP1:RC2,CCP2:RC1/RB3
2715     PWM=PWM1:RC2,PWM2:RC1/RB3
2716     I2C=SDA:RC4,SCL:RC3
2717     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2718     USART=RX:RC7,TX:RC6
2719     USART=IO_DIR=RX:1,TX:1
2720   END=MCU
2721
2722   BEGIN=MCU:18f43k20,18f44k20,18f45k20,18f46k20
2723     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2724     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
2725     CCP=CCP1:RC2,CCP2:RC1/RB3
2726     PWM=PWM1:RC2,PWM2:RC1/RB3
2727     I2C=SDA:RC4,SCL:RC3
2728     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2729     USART=RX:RC7,TX:RC6
2730     USART=IO_DIR=RX:1,TX:1
2731   END=MCU
2732
2733   BEGIN=MCU:18f23k22,18f24k22,18f25k22,18f26k22
2734     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2735     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
2736     ADC=AN13:RB5,AN14:RC2,AN15:RC3,AN16:RC4,AN17:RC5,AN18:RC6,AN19:RC7
2737     CCP=CCP1:RC2,CCP2:RC1/RB3,CCP3:RB5,CCP4:RB0,CCP5:RA4
2738     PWM=PWM1:RC2,PWM2:RC1/RB3,PWM3:RB5,PWM4:RB0,PWM5:RA4
2739     I2C=SDA1:RC4,SCL1:RC3
2740     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2741     I2C=SDA2:RB2,SCL2:RB1
2742     SPI=SDI2:RB2,SDO2:RB3,SCK2:RB1,SS2:RB0
2743     USART=RX1:RC7,TX1:RC6
2744     USART=RX2:RB7,TX2:RB6
2745     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:1
2746   END=MCU
2747
2748   BEGIN=MCU:18f43k22,18f44k22,18f45k22,18f46k22
2749     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2750     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
2751     ADC=AN13:RB5,AN14:RC2,AN15:RC3,AN16:RC4,AN17:RC5,AN18:RC6,AN19:RC7
2752     ADC=AN20:RD0,AN21:RD1,AN22:RD2,AN23:RD3,AN24:RD4,AN25:RD5,AN26:RD6,AN27:RD7
2753     CCP=CCP1:RC2,CCP2:RC1/RB3,CCP3:RB5,CCP4:RD1,CCP5:RE2
2754     PWM=PWM1:RC2,PWM2:RC1/RB3,PWM3:RB5,PWM4:RD1,PWM5:RE2
2755     I2C=SDA1:RC4,SCL1:RC3
2756     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2757     I2C=SDA2:RB2,SCL2:RB1
2758     SPI=SDI2:RB2,SDO2:RB3,SCK2:RB1,SS2:RB0
2759     USART=RX1:RC7,TX1:RC6
2760     USART=RX2:RB7,TX2:RB6
2761     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:1
2762   END=MCU
2763
2764   BEGIN=MCU:18f24j10,18f25j10
2765     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2766     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
2767     CCP=CCP1:RC2,CCP2:RC1/RB3
2768     PWM=PWM1:RC2,PWM2:RC1/RB3
2769     I2C=SDA1:RC4,SCL1:RC3
2770     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2771     USART=RX:RC7,TX:RC6
2772     USART=IO_DIR=RX:1,TX:1
2773   END=MCU
2774
2775   BEGIN=MCU:18f44j10,18f45j10
2776     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2777     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
2778     CCP=CCP1:RC2,CCP2:RC1/RB3
2779     PWM=PWM1:RC2,PWM2:RC1/RB3
2780     I2C=SDA1:RC4,SCL1:RC3
2781     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2782     I2C=SDA2:RD1,SCL2:RD0
2783     SPI=SDI2:RD1,SDO2:RD2,SCK2:RD0,SS2:RD3
2784     USART=RX:RC7,TX:RC6
2785     USART=IO_DIR=RX:1,TX:1
2786   END=MCU
2787
2788 #
2789 # Remappable peripheral pins. (PPS)
2790 # (The definition valid until a newer definition overwrites the members.)
2791 #
2792   BEGIN=DEFINE
2793     RP0=RA0
2794     RP1=RA1
2795     RP2=RA5
2796     RP3=RB0
2797     RP4=RB1
2798     RP5=RB2
2799     RP6=RB3
2800     RP7=RB4
2801     RP8=RB5
2802     RP9=RB6
2803     RP10=RB7
2804     RP11=RC0
2805     RP12=RC1
2806     RP13=RC2
2807     RP14=RC3
2808     RP15=RC4
2809     RP16=RC5
2810     RP17=RC6
2811     RP18=RC7
2812   END=DEFINE
2813
2814   BEGIN=MCU:18f24j11,18f25j11,18f26j11
2815     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2816     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
2817     CCP=CCP1:RP[0-18]
2818     CCP=CCP2:RP[0-18]
2819     PWM=PWM1:RP[0-18]
2820     PWM=PWM2:RP[0-18]
2821     I2C=SDA1:RC4,SCL1:RC3
2822     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2823     SPI=SDI2:RP[0-18]
2824     SPI=SDO2:RP[0-18]
2825     SPI=SCK2:RP[0-18]
2826     SPI=SS2:RP[0-18]
2827     USART=RX1:RC7,TX1:RC6
2828     USART=RX2:RP[0-18]
2829     USART=TX2:RP[0-18]
2830     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2831   END=MCU
2832
2833 #
2834 # Remappable peripheral pins. (PPS)
2835 # (The definition valid until a newer definition overwrites the members.)
2836 #
2837   BEGIN=DEFINE
2838     RP19=RD2
2839     RP20=RD3
2840     RP21=RD4
2841     RP22=RD5
2842     RP23=RD6
2843     RP24=RD7
2844   END=DEFINE
2845
2846   BEGIN=MCU:18f44j11,18f45j11,18f46j11
2847     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2848     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
2849     CCP=CCP1:RP[0-24]
2850     CCP=CCP2:RP[0-24]
2851     PWM=PWM1:RP[0-24]
2852     PWM=PWM2:RP[0-24]
2853     I2C=SDA1:RC4,SCL1:RC3
2854     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2855     I2C=SDA2:RD1,SCL2:RD0
2856     SPI=SDI2:RP[0-24]
2857     SPI=SDO2:RP[0-24]
2858     SPI=SCK2:RP[0-24]
2859     SPI=SS2:RP[0-24]
2860     USART=RX1:RC7,TX1:RC6
2861     USART=RX2:RP[0-24]
2862     USART=TX2:RP[0-24]
2863     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2864   END=MCU
2865
2866   BEGIN=MCU:18f24j50,18f25j50,18f26j50
2867     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2868     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
2869     CCP=CCP1:RP[0-13]/RP[17-18]
2870     CCP=CCP2:RP[0-13]/RP[17-18]
2871     PWM=PWM1:RP[0-13]/RP[17-18]
2872     PWM=PWM2:RP[0-13]/RP[17-18]
2873     I2C=SDA1:RB5,SCL1:RB4
2874     SPI=SDI1:RB5,SDO1:RC7,SCK1:RB4,SS1:RA5
2875     SPI=SDI2:RP[0-13]/RP[17-18]
2876     SPI=SDO2:RP[0-13]/RP[17-18]
2877     SPI=SCK2:RP[0-13]/RP[17-18]
2878     SPI=SS2:RP[0-13]/RP[17-18]
2879     USART=RX1:RC7,TX1:RC6
2880     USART=RX2:RP[0-13]/RP[17-18]
2881     USART=TX2:RP[0-13]/RP[17-18]
2882     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2883   END=MCU
2884
2885   BEGIN=MCU:18f44j50,18f45j50,18f46j50
2886     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2887     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
2888     CCP=CCP1:RP[0-13]/RP[17-24]
2889     CCP=CCP2:RP[0-13]/RP[17-24]
2890     PWM=PWM1:RP[0-13]/RP[17-24]
2891     PWM=PWM2:RP[0-13]/RP[17-24]
2892     I2C=SDA1:RB5,SCL1:RB4
2893     SPI=SDI1:RB5,SDO1:RC7,SCK1:RB4,SS1:RA5
2894     I2C=SDA2:RD1,SCL2:RD0
2895     SPI=SDI2:RP[0-13]/RP[17-24]
2896     SPI=SDO2:RP[0-13]/RP[17-24]
2897     SPI=SCK2:RP[0-13]/RP[17-24]
2898     SPI=SS2:RP[0-13]/RP[17-24]
2899     USART=RX1:RC7,TX1:RC6
2900     USART=RX2:RP[0-13]/RP[17-24]
2901     USART=TX2:RP[0-13]/RP[17-24]
2902     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2903   END=MCU
2904
2905   BEGIN=MCU:18f24k50,18f25k50
2906     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2907     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2908     ADC=AN14:RC2,AN18:RC6,AN19:RC7
2909     CCP=CCP1:RC2,CCP2:RC1/RB3
2910     PWM=PWM1:RC2,PWM2:RC1/RB3
2911     I2C=SDA:RB0,SCL:RB1
2912     SPI=SDI:RB0,SDO:RB3/RC7,SCK:RB1,SS:RA5
2913     USART=RX:RC7,TX:RC6
2914     USART=IO_DIR=RX:1,TX:1
2915   END=MCU
2916
2917   BEGIN=MCU:18f45k50
2918     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2919     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0,AN13:RB5
2920     ADC=AN14:RC2,AN18:RC6,AN19:RC7
2921     ADC=AN20:RD0,AN21:RD1,AN22:RD2,AN23:RD3,AN24:RD4,AN25:RD5,AN26:RD6,AN27:RD7
2922     CCP=CCP1:RC2,CCP2:RC1/RB3
2923     PWM=PWM1:RC2,PWM2:RC1/RB3
2924     I2C=SDA:RB0,SCL:RB1
2925     SPI=SDI:RB0,SDO:RB3/RC7,SCK:RB1,SS:RA5
2926     USART=RX:RC7,TX:RC6
2927     USART=IO_DIR=RX:1,TX:1
2928   END=MCU
2929
2930   BEGIN=MCU:18f25k80,18f26k80
2931     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2932     ADC=AN8:RB1,AN9:RB4,AN10:RB0
2933     CCP=CCP1:RB4,CCP2:RC2,CCP3:RC6,CCP4:RC7,CCP5:RB5
2934     PWM=PWM1:RB4,PWM2:RC2,PWM3:RC6,PWM4:RC7,PWM5:RB5
2935     I2C=SDA:RC4,SCL:RC3
2936     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2937     USART=RX1:RC7,TX1:RC6
2938     USART=RX2:RB7,TX2:RB6
2939     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2940   END=MCU
2941
2942   BEGIN=MCU:18f45k80,18f46k80
2943     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2944     ADC=AN8:RB1,AN9:RB4,AN10:RB0
2945     CCP=CCP1:RD4,CCP2:RC2,CCP3:RC6,CCP4:RC7,CCP5:RB5
2946     PWM=PWM1:RD4,PWM2:RC2,PWM3:RC6,PWM4:RC7,PWM5:RB5
2947     I2C=SDA:RC4,SCL:RC3
2948     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2949     USART=RX1:RC7,TX1:RC6
2950     USART=RX2:RD7,TX2:RD6
2951     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2952   END=MCU
2953
2954   BEGIN=MCU:18f65k80,18f66k80
2955     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2956     ADC=AN8:RB1,AN9:RB4,AN10:RB0
2957     CCP=CCP1:RD4,CCP2:RC2,CCP3:RC6,CCP4:RC7,CCP5:RB5
2958     PWM=PWM1:RD4,PWM2:RC2,PWM3:RC6,PWM4:RC7,PWM5:RB5
2959     I2C=SDA:RC4,SCL:RC3
2960     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
2961     USART=RX1:RG0,TX1:RG3
2962     USART=RX2:RE6,TX2:RE7
2963     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2964   END=MCU
2965
2966   BEGIN=MCU:18f26j13,18f27j13
2967     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
2968     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
2969     CCP=CCP4:RB4,CCP5:RB5,CCP6:RB6,CCP7:RB7,CCP8:RC1,CCP9:RC6,CCP10:RC7
2970     PWM=PWM4:RB4,PWM5:RB5,PWM6:RB6,PWM7:RB7,PWM8:RC1,PWM9:RC6,PWM10:RC7
2971     I2C=SDA1:RC4,SCL1:RC3
2972     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2973     SPI=SDI2:RP[0-18]
2974     SPI=SDO2:RP[0-18]
2975     SPI=SCK2:RP[0-18]
2976     SPI=SS2:RP[0-18]
2977     USART=RX1:RC7,TX1:RC6
2978     USART=RX2:RP[0-18]
2979     USART=TX2:RP[0-18]
2980     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2981   END=MCU
2982
2983   BEGIN=MCU:18f46j13,18f47j13
2984     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
2985     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
2986     CCP=CCP4:RB4,CCP5:RB5,CCP6:RB6,CCP7:RB7,CCP8:RC1,CCP9:RC6,CCP10:RC7
2987     PWM=PWM4:RB4,PWM5:RB5,PWM6:RB6,PWM7:RB7,PWM8:RC1,PWM9:RC6,PWM10:RC7
2988     I2C=SDA1:RC4,SCL1:RC3
2989     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RA5
2990     I2C=SDA2:RD1,SCL2:RD0
2991     SPI=SDI2:RP[0-24]
2992     SPI=SDO2:RP[0-24]
2993     SPI=SCK2:RP[0-24]
2994     SPI=SS2:RP[0-24]
2995     USART=RX1:RC7,TX1:RC6
2996     USART=RX2:RP[0-24]
2997     USART=TX2:RP[0-24]
2998     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
2999   END=MCU
3000
3001   BEGIN=MCU:18f26j53,18f27j53
3002     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3003     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
3004     CCP=CCP4:RB4,CCP5:RB5,CCP6:RB6,CCP7:RB7,CCP8:RC1,CCP9:RC6,CCP10:RC7
3005     PWM=PWM4:RB4,PWM5:RB5,PWM6:RB6,PWM7:RB7,PWM8:RC1,PWM9:RC6,PWM10:RC7
3006     I2C=SDA1:RB5,SCL1:RB4
3007     SPI=SDI1:RB5,SDO1:RC7,SCK1:RB4,SS1:RA5
3008     SPI=SDI2:RP[0-13]/RP[17-18]
3009     SPI=SDO2:RP[0-13]/RP[17-18]
3010     SPI=SCK2:RP[0-13]/RP[17-18]
3011     SPI=SS2:RP[0-13]/RP[17-18]
3012     USART=RX1:RC7,TX1:RC6
3013     USART=RX2:RP[0-13]/RP[17-18]
3014     USART=TX2:RP[0-13]/RP[17-18]
3015     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3016   END=MCU
3017
3018   BEGIN=MCU:18f46j53,18f47j53
3019     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3020     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RC2,AN12:RB0
3021     CCP=CCP4:RB4,CCP5:RB5,CCP6:RB6,CCP7:RB7,CCP8:RC1,CCP9:RC6,CCP10:RC7
3022     PWM=PWM4:RB4,PWM5:RB5,PWM6:RB6,PWM7:RB7,PWM8:RC1,PWM9:RC6,PWM10:RC7
3023     I2C=SDA1:RB5,SCL1:RB4
3024     SPI=SDI1:RB5,SDO1:RC7,SCK1:RB4,SS1:RA5
3025     I2C=SDA2:RD1,SCL2:RD0
3026     SPI=SDI2:RP[0-13]/RP[17-24]
3027     SPI=SDO2:RP[0-13]/RP[17-24]
3028     SPI=SCK2:RP[0-13]/RP[17-24]
3029     SPI=SS2:RP[0-13]/RP[17-24]
3030     USART=RX1:RC7,TX1:RC6
3031     USART=RX2:RP[0-13]/RP[17-24]
3032     USART=TX2:RP[0-13]/RP[17-24]
3033     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3034   END=MCU
3035
3036   BEGIN=MCU:18f63j11,18f64j11,18f65j11
3037     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3038     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3039     CCP=CCP1:RC2,CCP2:RC1/RE7
3040     PWM=PWM1:RC2,PWM2:RC1/RE7
3041     I2C=SDA:RC4,SCL:RC3
3042     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3043     USART=RX1:RC7,TX1:RC6
3044     USART=RX2:RG2,TX2:RG1
3045     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3046   END=MCU
3047
3048   BEGIN=MCU:18f83j11,18f84j11,18f85j11
3049     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3050     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3051     CCP=CCP1:RC2,CCP2:RC1/RE7
3052     PWM=PWM1:RC2,PWM2:RC1/RE7
3053     I2C=SDA:RC4,SCL:RC3
3054     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3055     USART=RX1:RC7,TX1:RC6
3056     USART=RX2:RG2,TX2:RG1
3057     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3058   END=MCU
3059
3060   BEGIN=MCU:18f66j11,18f66j16,18f67j11
3061     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3062     ADC=AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3063     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3064     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3065     I2C=SDA1:RC4,SCL1:RC3
3066     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3067     I2C=SDA2:RD5,SCL2:RD6
3068     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3069     USART=RX1:RC7,TX1:RC6
3070     USART=RX2:RG2,TX2:RG1
3071     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3072   END=MCU
3073
3074   BEGIN=MCU:18f86j11,18f86j16,18f87j11
3075     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3076     ADC=AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3077     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3078     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3079     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3080     I2C=SDA1:RC4,SCL1:RC3
3081     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3082     I2C=SDA2:RD5,SCL2:RD6
3083     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3084     USART=RX1:RC7,TX1:RC6
3085     USART=RX2:RG2,TX2:RG1
3086     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3087   END=MCU
3088
3089   BEGIN=MCU:18f63j90,18f64j90,18f65j90
3090     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3091     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3092     CCP=CCP1:RC2,CCP2:RC1/RE7
3093     PWM=PWM1:RC2,PWM2:RC1/RE7
3094     I2C=SDA:RC4,SCL:RC3
3095     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3096     USART=RX1:RC7,TX1:RC6
3097     USART=RX2:RG2,TX2:RG1
3098     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3099   END=MCU
3100
3101   BEGIN=MCU:18f66j90,18f66j93,18f67j90,18f67j93
3102     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3103     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3104     CCP=CCP1:RC2,CCP2:RC1/RE7
3105     PWM=PWM1:RC2,PWM2:RC1/RE7
3106     I2C=SDA:RC4,SCL:RC3
3107     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3108     USART=RX1:RC7,TX1:RC6
3109     USART=RX2:RG2,TX2:RG1
3110     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3111   END=MCU
3112
3113   BEGIN=MCU:18f83j90,18f84j90,18f85j90
3114     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3115     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN9:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3116     CCP=CCP1:RC2,CCP2:RC1/RE7
3117     PWM=PWM1:RC2,PWM2:RC1/RE7
3118     I2C=SDA:RC4,SCL:RC3
3119     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3120     USART=RX1:RC7,TX1:RC6
3121     USART=RX2:RG2,TX2:RG1
3122     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3123   END=MCU
3124
3125   BEGIN=MCU:18f86j90,18f86j93,18f87j90,18f87j93
3126     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3127     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN9:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3128     CCP=CCP1:RC2,CCP2:RC1/RE7
3129     PWM=PWM1:RC2,PWM2:RC1/RE7
3130     I2C=SDA:RC4,SCL:RC3
3131     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3132     USART=RX1:RC7,TX1:RC6
3133     USART=RX2:RG2,TX2:RG1
3134     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3135   END=MCU
3136
3137   BEGIN=MCU:18f65j10,18f65j15,18f66j10,18f66j15,18f67j10
3138     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3139     ADC=AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3140     CCP=CCP1:RC2,CCP2:RC1/RE7
3141     PWM=PWM1:RC2,PWM2:RC1/RE7
3142     I2C=SDA1:RC4,SCL1:RC3
3143     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3144     I2C=SDA2:RD5,SCL2:RD6
3145     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3146     USART=RX1:RC7,TX1:RC6
3147     USART=RX2:RG2,TX2:RG1
3148     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3149   END=MCU
3150
3151   BEGIN=MCU:18f85j10,18f85j15,18f86j10,18f86j15,18f87j10
3152     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3153     ADC=AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3154     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3155     CCP=CCP1:RC2,CCP2:RC1/RE7
3156     PWM=PWM1:RC2,PWM2:RC1/RE7
3157     I2C=SDA1:RC4,SCL1:RC3
3158     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3159     I2C=SDA2:RD5,SCL2:RD6
3160     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3161     USART=RX1:RC7,TX1:RC6
3162     USART=RX2:RG2,TX2:RG1
3163     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3164   END=MCU
3165
3166   BEGIN=MCU:18f65j50,18f66j50,18f66j55,18f67j50
3167     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3168     ADC=AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3169     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3170     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3171     I2C=SDA1:RC4,SCL1:RC3
3172     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3173     I2C=SDA2:RD5,SCL2:RD6
3174     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3175     USART=RX1:RC7,TX1:RC6
3176     USART=RX2:RG2,TX2:RG1
3177     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3178   END=MCU
3179
3180   BEGIN=MCU:18f85j50,18f86j50,18f86j55,18f87j50
3181     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3182     ADC=AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3183     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3184     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3185     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3186     I2C=SDA1:RC4,SCL1:RC3
3187     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3188     I2C=SDA2:RD5,SCL2:RD6
3189     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3190     USART=RX1:RC7,TX1:RC6
3191     USART=RX2:RG2,TX2:RG1
3192     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3193   END=MCU
3194
3195   BEGIN=MCU:18f65k22
3196     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3197     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3198     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3199     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3200     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3201     CCP=CCP6:RE6,CCP7:RE5,CCP8:RE4
3202     PWM=PWM6:RE6,PWM7:RE5,PWM8:RE4
3203     I2C=SDA1:RC4,SCL1:RC3
3204     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3205     I2C=SDA2:RD5,SCL2:RD6
3206     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3207     USART=RX1:RC7,TX1:RC6
3208     USART=RX2:RG2,TX2:RG1
3209     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3210   END=MCU
3211
3212   BEGIN=MCU:18f66k22,18f67k22
3213     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3214     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3215     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3216     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3217     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3218     CCP=CCP6:RE6,CCP7:RE5,CCP8:RE4,CCP9:RE3,CCP10:RE2
3219     PWM=PWM6:RE6,PWM7:RE5,PWM8:RE4,PWM9:RE3,PWM10:RE2
3220     I2C=SDA1:RC4,SCL1:RC3
3221     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3222     I2C=SDA2:RD5,SCL2:RD6
3223     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3224     USART=RX1:RC7,TX1:RC6
3225     USART=RX2:RG2,TX2:RG1
3226     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3227   END=MCU
3228
3229   BEGIN=MCU:18f85k22
3230     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3231     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3232     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3233     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3234     ADC=AN20:RH3,AN21:RH2,AN22:RH1,AN23:RH0
3235     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3236     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3237     CCP=CCP6:RE6/RH7,CCP7:RE5/RH6,CCP8:RE4/RH5
3238     PWM=PWM6:RE6/RH7,PWM7:RE5/RH6,PWM8:RE4/RH5
3239     I2C=SDA1:RC4,SCL1:RC3
3240     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3241     I2C=SDA2:RD5,SCL2:RD6
3242     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3243     USART=RX1:RC7,TX1:RC6
3244     USART=RX2:RG2,TX2:RG1
3245     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3246   END=MCU
3247
3248   BEGIN=MCU:18f86k22,18f87k22
3249     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3250     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3251     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3252     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3253     ADC=AN20:RH3,AN21:RH2,AN22:RH1,AN23:RH0
3254     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3255     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3256     CCP=CCP6:RE6/RH7,CCP7:RE5/RH6,CCP8:RE4/RH5,CCP9:RE3/RH4,CCP10:RE2
3257     PWM=PWM6:RE6/RH7,PWM7:RE5/RH6,PWM8:RE4/RH5,PWM9:RE3/RH4,PWM10:RE2
3258     I2C=SDA1:RC4,SCL1:RC3
3259     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3260     I2C=SDA2:RD5,SCL2:RD6
3261     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3262     USART=RX1:RC7,TX1:RC6
3263     USART=RX2:RG2,TX2:RG1
3264     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3265   END=MCU
3266
3267   BEGIN=MCU:18f65k90
3268     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3269     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3270     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3271     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3272     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3273     CCP=CCP6:RE6,CCP7:RE5,CCP8:RE4
3274     PWM=PWM6:RE6,PWM7:RE5,PWM8:RE4
3275     I2C=SDA1:RC4,SCL1:RC3
3276     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3277     I2C=SDA2:RD5,SCL2:RD6
3278     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3279     USART=RX1:RC7,TX1:RC6
3280     USART=RX2:RG2,TX2:RG1
3281     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3282   END=MCU
3283
3284   BEGIN=MCU:18f66k90,18f67k90
3285     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3286     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3287     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3288     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3289     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3290     CCP=CCP6:RE6,CCP7:RE5,CCP8:RE4,CCP9:RE3,CCP10:RE2
3291     PWM=PWM6:RE6,PWM7:RE5,PWM8:RE4,PWM9:RE3,PWM10:RE2
3292     I2C=SDA1:RC4,SCL1:RC3
3293     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3294     I2C=SDA2:RD5,SCL2:RD6
3295     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3296     USART=RX1:RC7,TX1:RC6
3297     USART=RX2:RG2,TX2:RG1
3298     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3299   END=MCU
3300
3301   BEGIN=MCU:18f85k90
3302     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3303     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3304     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3305     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3306     ADC=AN20:RH3,AN21:RH2,AN22:RH1,AN23:RH0
3307     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3308     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3309     CCP=CCP6:RE6/RH7,CCP7:RE5/RH6,CCP8:RE4/RH5
3310     PWM=PWM6:RE6/RH7,PWM7:RE5/RH6,PWM8:RE4/RH5
3311     I2C=SDA1:RC4,SCL1:RC3
3312     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3313     I2C=SDA2:RD5,SCL2:RD6
3314     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3315     USART=RX1:RC7,TX1:RC6
3316     USART=RX2:RG2,TX2:RG1
3317     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3318   END=MCU
3319
3320   BEGIN=MCU:18f86k90,18f87k90
3321     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3322     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3323     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3324     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3325     ADC=AN20:RH3,AN21:RH2,AN22:RH1,AN23:RH0
3326     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3327     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3328     CCP=CCP6:RE6/RH7,CCP7:RE5/RH6,CCP8:RE4/RH5,CCP9:RE3/RH4,CCP10:RE2
3329     PWM=PWM6:RE6/RH7,PWM7:RE5/RH6,PWM8:RE4/RH5,PWM9:RE3/RH4,PWM10:RE2
3330     I2C=SDA1:RC4,SCL1:RC3
3331     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3332     I2C=SDA2:RD5,SCL2:RD6
3333     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3334     USART=RX1:RC7,TX1:RC6
3335     USART=RX2:RG2,TX2:RG1
3336     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3337   END=MCU
3338
3339   BEGIN=MCU:18f66j60,18f66j65,18f67j60
3340     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3341     ADC=AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3342     CCP=CCP1:RC2,CCP2:RC1,CCP3:RD1,CCP4:RD2,CCP5:RG4
3343     PWM=PWM1:RC2,PWM2:RC1,PWM3:RD1,PWM4:RD2,PWM5:RG4
3344     I2C=SDA1:RC4,SCL1:RC3
3345     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3346     USART=RX1:RC7,TX1:RC6
3347     USART=IO_DIR=RX1:1,TX1:0
3348   END=MCU
3349
3350   BEGIN=MCU:18f86j60,18f86j65,18f87j60
3351     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3352     ADC=AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3353     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3354     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3355     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3356     I2C=SDA1:RC4,SCL1:RC3
3357     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3358     USART=RX1:RC7,TX1:RC6
3359     USART=RX2:RG2,TX2:RG1
3360     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3361   END=MCU
3362
3363   BEGIN=MCU:18f96j60,18f96j65,18f97j60
3364     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3365     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3366     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3367     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3368     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3369     I2C=SDA1:RC4,SCL1:RC3
3370     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3371     I2C=SDA2:RD5,SCL2:RD6
3372     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3373     USART=RX1:RC7,TX1:RC6
3374     USART=RX2:RG2,TX2:RG1
3375     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3376   END=MCU
3377
3378   BEGIN=MCU:18f86j72,18f87j72
3379     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3380     ADC=AN5:RF7,AN6:RF1,AN7:RF2,AN9:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3381     CCP=CCP1:RC2,CCP2:RC1/RE7
3382     PWM=PWM1:RC2,PWM2:RC1/RE7
3383     I2C=SDA:RC4,SCL:RC3
3384     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3385     USART=RX1:RC7,TX1:RC6
3386     USART=RX2:RG2,TX2:RG1
3387     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3388   END=MCU
3389
3390   BEGIN=MCU:18f242,18f252
3391     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3392     CCP=CCP1:RC2,CCP2:RC1/RB3
3393     PWM=PWM1:RC2,PWM2:RC1/RB3
3394     I2C=SDA:RC4,SCL:RC3
3395     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3396     USART=RX:RC7,TX:RC6
3397     USART=IO_DIR=RX:1,TX:0
3398   END=MCU
3399
3400   BEGIN=MCU:18f442,18f452
3401     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3402     CCP=CCP1:RC2,CCP2:RC1/RB3
3403     PWM=PWM1:RC2,PWM2:RC1/RB3
3404     I2C=SDA:RC4,SCL:RC3
3405     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3406     USART=RX:RC7,TX:RC6
3407     USART=IO_DIR=RX:1,TX:0
3408   END=MCU
3409
3410   BEGIN=MCU:18f248,18f258
3411     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3412     CCP=CCP1:RC2,CCP2:RC1
3413     PWM=PWM1:RC2,PWM2:RC1
3414     I2C=SDA:RC4,SCL:RC3
3415     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3416     USART=RX:RC7,TX:RC6
3417     USART=IO_DIR=RX:1,TX:0
3418   END=MCU
3419
3420   BEGIN=MCU:18f448,18f458
3421     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3422     CCP=CCP1:RC2,CCP2:RC1
3423     PWM=PWM1:RC2,PWM2:RC1
3424     I2C=SDA:RC4,SCL:RC3
3425     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3426     USART=RX:RC7,TX:RC6
3427     USART=IO_DIR=RX:1,TX:0
3428   END=MCU
3429
3430   BEGIN=MCU:18f1220,18f1320
3431     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RB0,AN5:RB1,AN6:RB4
3432     CCP=CCP:RB3
3433     PWM=PWM:RB3
3434     USART=RX:RB4,TX:RB1
3435     USART=IO_DIR=RX:1,TX:1
3436   END=MCU
3437
3438   BEGIN=MCU:18f1230,18f1330
3439     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA6
3440     USART=RX:RA3,TX:RA2
3441     USART=IO_DIR=RX:1,TX:1
3442   END=MCU
3443
3444   BEGIN=MCU:18f2220,18f2320
3445     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3446     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3447     CCP=CCP1:RC2,CCP2:RC1/RB3
3448     PWM=PWM1:RC2,PWM2:RC1/RB3
3449     I2C=SDA:RC4,SCL:RC3
3450     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3451     USART=RX:RC7,TX:RC6
3452     USART=IO_DIR=RX:1,TX:0
3453   END=MCU
3454
3455   BEGIN=MCU:18f4220,18f4320
3456     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3457     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3458     CCP=CCP1:RC2,CCP2:RC1/RB3
3459     PWM=PWM1:RC2,PWM2:RC1/RB3
3460     I2C=SDA:RC4,SCL:RC3
3461     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3462     USART=RX:RC7,TX:RC6
3463     USART=IO_DIR=RX:1,TX:0
3464   END=MCU
3465
3466   BEGIN=MCU:18f2221,18f2321
3467     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3468     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3469     CCP=CCP1:RC2,CCP2:RC1/RB3
3470     PWM=PWM1:RC2,PWM2:RC1/RB3
3471     I2C=SDA:RC4,SCL:RC3
3472     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3473     USART=RX:RC7,TX:RC6
3474     USART=IO_DIR=RX:1,TX:1
3475   END=MCU
3476
3477   BEGIN=MCU:18f4221,18f4321
3478     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3479     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3480     CCP=CCP1:RC2,CCP2:RC1/RB3
3481     PWM=PWM1:RC2,PWM2:RC1/RB3
3482     I2C=SDA:RC4,SCL:RC3
3483     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3484     USART=RX:RC7,TX:RC6
3485     USART=IO_DIR=RX:1,TX:1
3486   END=MCU
3487
3488   BEGIN=MCU:18f2331,18f2431
3489     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA4
3490     CCP=CCP1:RC2,CCP2:RC1
3491     PWM=PWM1:RC2,PWM2:RC1
3492     I2C=SDA:RC4,SCL:RC5
3493     SPI=SDI:RC4,SDO:RC7,SCK:RC5,SS:RC6
3494     USART=RX:RC7,TX:RC6
3495     USART=IO_DIR=RX:1,TX:1
3496   END=MCU
3497
3498   BEGIN=MCU:18f4331,18f4431
3499     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA4,AN5:RA5,AN6:RE0,AN7:RE1,AN8:RE2
3500     CCP=CCP1:RC2,CCP2:RC1
3501     PWM=PWM1:RC2,PWM2:RC1
3502     I2C=SDA:RC4/RD2,SCL:RC5/RD3
3503     SPI=SDI:RC4/RD2,SDO:RC7,SCK:RC5/RD3,SS:RC6
3504     USART=RX:RC7,TX:RC6
3505     USART=IO_DIR=RX:1,TX:1
3506   END=MCU
3507
3508   BEGIN=MCU:18f2410,18f2510,18f2515,18f2610
3509     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3510     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3511     CCP=CCP1:RC2,CCP2:RC1/RB3
3512     PWM=PWM1:RC2,PWM2:RC1/RB3
3513     I2C=SDA:RC4,SCL:RC3
3514     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3515     USART=RX:RC7,TX:RC6
3516     USART=IO_DIR=RX:1,TX:1
3517   END=MCU
3518
3519   BEGIN=MCU:18f4410,18f4510,18f4515,18f4610
3520     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3521     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3522     CCP=CCP1:RC2,CCP2:RC1/RB3
3523     PWM=PWM1:RC2,PWM2:RC1/RB3
3524     I2C=SDA:RC4,SCL:RC3
3525     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3526     USART=RX:RC7,TX:RC6
3527     USART=IO_DIR=RX:1,TX:1
3528   END=MCU
3529
3530   BEGIN=MCU:18f2420,18f2423,18f2520,18f2523
3531     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3532     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3533     CCP=CCP1:RC2,CCP2:RC1/RB3
3534     PWM=PWM1:RC2,PWM2:RC1/RB3
3535     I2C=SDA:RC4,SCL:RC3
3536     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3537     USART=RX:RC7,TX:RC6
3538     USART=IO_DIR=RX:1,TX:1
3539   END=MCU
3540
3541   BEGIN=MCU:18f4420,18f4423,18f4520,18f4523
3542     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3543     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3544     CCP=CCP1:RC2,CCP2:RC1/RB3
3545     PWM=PWM1:RC2,PWM2:RC1/RB3
3546     I2C=SDA:RC4,SCL:RC3
3547     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3548     USART=RX:RC7,TX:RC6
3549     USART=IO_DIR=RX:1,TX:1
3550   END=MCU
3551
3552   BEGIN=MCU:18f2439,18f2539
3553     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3554     PWM=PWM1:PWM1,PWM2:PWM2
3555     I2C=SDA:RC4,SCL:RC3
3556     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3557     USART=RX:RC7,TX:RC6
3558     USART=IO_DIR=RX:1,TX:0
3559   END=MCU
3560
3561   BEGIN=MCU:18f4439,18f4539
3562     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3563     PWM=PWM1:PWM1,PWM2:PWM2
3564     I2C=SDA:RC4,SCL:RC3
3565     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3566     USART=RX:RC7,TX:RC6
3567     USART=IO_DIR=RX:1,TX:0
3568   END=MCU
3569
3570   BEGIN=MCU:18f2450
3571     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3572     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3573     CCP=CCP:RC2
3574     PWM=PWM:RC2
3575     USART=RX:RC7,TX:RC6
3576     USART=IO_DIR=RX:1,TX:0
3577   END=MCU
3578
3579   BEGIN=MCU:18f4450
3580     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3581     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3582     CCP=CCP:RC2
3583     PWM=PWM:RC2
3584     USART=RX:RC7,TX:RC6
3585     USART=IO_DIR=RX:1,TX:0
3586   END=MCU
3587
3588   BEGIN=MCU:18f2455,18f2458,18f2550,18f2553
3589     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3590     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3591     CCP=CCP1:RC2,CCP2:RC1/RB3
3592     PWM=PWM1:RC2,PWM2:RC1/RB3
3593     I2C=SDA:RB0,SCL:RB1
3594     SPI=SDI:RB0,SDO:RC7,SCK:RB1,SS:RA5
3595     USART=RX:RC7,TX:RC6
3596     USART=IO_DIR=RX:1,TX:1
3597   END=MCU
3598
3599   BEGIN=MCU:18f4455,18f4458,18f4550,18f4553
3600     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3601     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3602     CCP=CCP1:RC2,CCP2:RC1/RB3
3603     PWM=PWM1:RC2,PWM2:RC1/RB3
3604     I2C=SDA:RB0,SCL:RB1
3605     SPI=SDI:RB0,SDO:RC7,SCK:RB1,SS:RA5
3606     USART=RX:RC7,TX:RC6
3607     USART=IO_DIR=RX:1,TX:1
3608   END=MCU
3609
3610   BEGIN=MCU:18f2480,18f2580,18f2585,18f2680,18f2682,18f2685
3611     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3612     ADC=AN8:RB1,AN9:RB4,AN10:RB0
3613     CCP=CCP:RC2
3614     PWM=PWM:RC2
3615     I2C=SDA:RC4,SCL:RC3
3616     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3617     USART=RX:RC7,TX:RC6
3618     USART=IO_DIR=RX:1,TX:0
3619   END=MCU
3620
3621   BEGIN=MCU:18f4480,18f4580,18f4585,18f4680,18f4682,18f4685
3622     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3623     ADC=AN8:RB1,AN9:RB4,AN10:RB0
3624     CCP=CCP1:RC2,CCP2:RD4
3625     PWM=PWM1:RC2,PWM2:RD4
3626     I2C=SDA:RC4,SCL:RC3
3627     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3628     USART=RX:RC7,TX:RC6
3629     USART=IO_DIR=RX:1,TX:0
3630   END=MCU
3631
3632   BEGIN=MCU:18f2525,18f2620
3633     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3634     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3635     CCP=CCP1:RC2,CCP2:RC1/RB3
3636     PWM=PWM1:RC2,PWM2:RC1/RB3
3637     I2C=SDA:RC4,SCL:RC3
3638     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3639     USART=RX:RC7,TX:RC6
3640     USART=IO_DIR=RX:1,TX:1
3641   END=MCU
3642
3643   BEGIN=MCU:18f4525,18f4620
3644     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RE0,AN6:RE1,AN7:RE2
3645     ADC=AN8:RB2,AN9:RB3,AN10:RB1,AN11:RB4,AN12:RB0
3646     CCP=CCP1:RC2,CCP2:RC1/RB3
3647     PWM=PWM1:RC2,PWM2:RC1/RB3
3648     I2C=SDA:RC4,SCL:RC3
3649     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RA5
3650     USART=RX:RC7,TX:RC6
3651     USART=IO_DIR=RX:1,TX:1
3652   END=MCU
3653
3654   BEGIN=MCU:18f6310,18f6410
3655     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3656     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3657     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0
3658     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0
3659     I2C=SDA:RC4,SCL:RC3
3660     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3661     USART=RX1:RC7,TX1:RC6
3662     USART=RX2:RG2,TX2:RG1
3663     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3664   END=MCU
3665
3666   BEGIN=MCU:18f8310,18f8410
3667     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3668     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3669     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0
3670     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0
3671     I2C=SDA:RC4,SCL:RC3
3672     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3673     USART=RX1:RC7,TX1:RC6
3674     USART=RX2:RG2,TX2:RG1
3675     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3676   END=MCU
3677
3678   BEGIN=MCU:18f6390,18f6393,18f6490,18f6493
3679     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3680     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3681     CCP=CCP1:RC2,CCP2:RC1/RE7
3682     PWM=PWM1:RC2,PWM2:RC1/RE7
3683     I2C=SDA:RC4,SCL:RC3
3684     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3685     USART=RX1:RC7,TX1:RC6
3686     USART=RX2:RG2,TX2:RG1
3687     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3688   END=MCU
3689
3690   BEGIN=MCU:18f8390,18f8393,18f8490,18f8493
3691     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3692     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3693     CCP=CCP1:RC2,CCP2:RC1/RE7
3694     PWM=PWM1:RC2,PWM2:RC1/RE7
3695     I2C=SDA:RC4,SCL:RC3
3696     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3697     USART=RX1:RC7,TX1:RC6
3698     USART=RX2:RG2,TX2:RG1
3699     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:0
3700   END=MCU
3701
3702   BEGIN=MCU:18f6520,18f6525,18f6620,18f6621,18f6720
3703     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3704     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3705     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3706     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3707     I2C=SDA:RC4,SCL:RC3
3708     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3709     USART=RX1:RC7,TX1:RC6
3710     USART=RX2:RG2,TX2:RG1
3711     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3712   END=MCU
3713
3714   BEGIN=MCU:18f8520,18f8525,18f8620,18f8621,18f8720
3715     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3716     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3717     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3718     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3719     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3720     I2C=SDA:RC4,SCL:RC3
3721     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3722     USART=RX1:RC7,TX1:RC6
3723     USART=RX2:RG2,TX2:RG1
3724     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3725   END=MCU
3726
3727   BEGIN=MCU:18f6527,18f6622,18f6627,18f6628,18f6722,18f6723
3728     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3729     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3730     CCP=CCP1:RC2,CCP2:RC1/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3731     PWM=PWM1:RC2,PWM2:RC1/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3732     I2C=SDA1:RC4,SCL1:RC3
3733     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3734     I2C=SDA2:RD5,SCL2:RD6
3735     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3736     USART=RX1:RC7,TX1:RC6
3737     USART=RX2:RG2,TX2:RG1
3738     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3739   END=MCU
3740
3741   BEGIN=MCU:18f8527,18f8622,18f8627,18f8628,18f8722,18f8723
3742     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3743     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3744     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3745     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7,CCP3:RG0,CCP4:RG3,CCP5:RG4
3746     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7,PWM3:RG0,PWM4:RG3,PWM5:RG4
3747     I2C=SDA1:RC4,SCL1:RC3
3748     SPI=SDI1:RC4,SDO1:RC5,SCK1:RC3,SS1:RF7
3749     I2C=SDA2:RD5,SCL2:RD6
3750     SPI=SDI2:RD5,SDO2:RD4,SCK2:RD6,SS2:RD7
3751     USART=RX1:RC7,TX1:RC6
3752     USART=RX2:RG2,TX2:RG1
3753     USART=IO_DIR=RX1:1,TX1:0,RX2:1,TX2:0
3754   END=MCU
3755
3756   BEGIN=MCU:18f6585,18f6680
3757     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3758     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3759     CCP=CCP1:RC2,CCP2:RC1/RE7
3760     PWM=PWM1:RC2,PWM2:RC1/RE7
3761     I2C=SDA:RC4,SCL:RC3
3762     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3763     USART=RX:RC7,TX:RC6
3764     USART=IO_DIR=RX:1,TX:1
3765   END=MCU
3766
3767   BEGIN=MCU:18f8585,18f8680
3768     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5
3769     ADC=AN5:RF0,AN6:RF1,AN7:RF2,AN8:RF3,AN9:RF4,AN10:RF5,AN11:RF6
3770     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3771     CCP=CCP1:RC2,CCP2:RC1/RB3/RE7
3772     PWM=PWM1:RC2,PWM2:RC1/RB3/RE7
3773     I2C=SDA:RC4,SCL:RC3
3774     SPI=SDI:RC4,SDO:RC5,SCK:RC3,SS:RF7
3775     USART=RX:RC7,TX:RC6
3776     USART=IO_DIR=RX:1,TX:1
3777   END=MCU
3778
3779 #
3780 # Remappable peripheral pins. (PPS)
3781 # (The definition valid until a newer definition overwrites the members.)
3782 #
3783   BEGIN=DEFINE
3784     RP0=RA0
3785     RP1=RA1
3786     RP2=RA2
3787     RP3=RA3
3788     RP4=RA4
3789     RP5=RA5
3790     RP6=RA6
3791     RP7=RB3
3792     RP8=RB0
3793     RP9=RB1
3794     RP10=RA7
3795     RP11=RC2
3796     RP12=RB4
3797     RP13=RB5
3798     RP14=RB2
3799     RP15=RC3
3800     RP16=RC5
3801     RP17=RC4
3802     RP18=RC6
3803     RP19=RC7
3804     RP20=RD0
3805     RP21=RD1
3806     RP22=RD2
3807     RP23=RD3
3808     RP24=RD4
3809     RP25=RD5
3810     RP26=RD6
3811     RP27=RD7
3812     RP28=RE0
3813     RP29=RE1
3814     RP30=RE2
3815     RP31=RE7
3816     RP32=RE4
3817     RP33=RE3
3818     RP34=RE6
3819     RP35=RF5
3820     RP36=RF2
3821     RP37=RE5
3822     RP38=RF7
3823     RP39=RG1
3824     RP40=RF6
3825     RP41=RF3
3826     RP42=RG2
3827     RP43=RG3
3828     RP44=RG4
3829     RP45=RF4
3830     RP46=RG0
3831   END=DEFINE
3832
3833 #
3834 # PPS-Lite
3835 #
3836   BEGIN=GROUP
3837     RP_GROUP0=RP0,RP4,RP8,RP12,RP16,RP20,RP24,RP28,RP32,RP36,RP40,RP44
3838     RP_GROUP1=RP1,RP5,RP9,RP13,RP17,RP21,RP25,RP29,RP33,RP37,RP41,RP45
3839     RP_GROUP2=RP2,RP6,RP10,RP14,RP18,RP22,RP26,RP30,RP34,RP38,RP42,RP46
3840     RP_GROUP3=RP3,RP7,RP11,RP15,RP19,RP23,RP27,RP31,RP35,RP39,RP43
3841   END=GROUP
3842
3843   BEGIN=MCU:18f65j94,18f66j94,18f66j99,18f67j94
3844     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RF7,AN6:RA4
3845     ADC=AN7:RF2,AN8:RG0,AN9:RC2,AN10:RF5,AN11:RF6
3846     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3847     CCP=CCP1:RP_GROUP3
3848     CCP=CCP2:RP_GROUP3
3849     CCP=CCP3:RP_GROUP2
3850     CCP=CCP4:RP_GROUP3
3851     CCP=CCP5:RP_GROUP0
3852     CCP=CCP6:RP_GROUP2
3853     CCP=CCP7:RP_GROUP1
3854     CCP=CCP8:RP_GROUP0
3855     CCP=CCP9:RP_GROUP1
3856     CCP=CCP10:RP_GROUP2
3857     PWM=PWM1:RP_GROUP3
3858     PWM=PWM2:RP_GROUP3
3859     PWM=PWM3:RP_GROUP2
3860     PWM=PWM4:RP_GROUP3
3861     PWM=PWM5:RP_GROUP0
3862     PWM=PWM6:RP_GROUP2
3863     PWM=PWM7:RP_GROUP1
3864     PWM=PWM8:RP_GROUP0
3865     PWM=PWM9:RP_GROUP1
3866     PWM=PWM10:RP_GROUP2
3867     I2C=SDA1:RC4,SCL1:RC3
3868     SPI=SDI1:RP_GROUP0,SDO1:RP_GROUP1,SCK1:RP_GROUP3,SS1:RP_GROUP2
3869     I2C=SDA2:RD5,SCL2:RD6
3870     SPI=SDI2:RP_GROUP1,SDO2:RP_GROUP0,SCK2:RP_GROUP2,SS2:RP_GROUP3
3871     USART=RX1:RP_GROUP3,TX1:RP_GROUP2
3872     USART=RX2:RP_GROUP2,TX2:RP_GROUP3
3873     USART=RX3:RP_GROUP0,TX3:RP_GROUP1
3874     USART=RX4:RP_GROUP0,TX4:RP_GROUP1
3875     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:1,RX3:1,TX3:1,RX4:1,TX4:1
3876   END=MCU
3877
3878   BEGIN=MCU:18f85j94,18f86j94,18f86j99,18f87j94
3879     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RF7,AN6:RA4
3880     ADC=AN7:RF2,AN8:RG0,AN9:RC2,AN10:RF5,AN11:RF6
3881     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3882     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3883     ADC=AN20:RH3,AN21:RH2,AN22:RH1,AN23:RH0
3884     CCP=CCP1:RP_GROUP3
3885     CCP=CCP2:RP_GROUP3
3886     CCP=CCP3:RP_GROUP2
3887     CCP=CCP4:RP_GROUP3
3888     CCP=CCP5:RP_GROUP0
3889     CCP=CCP6:RP_GROUP2
3890     CCP=CCP7:RP_GROUP1
3891     CCP=CCP8:RP_GROUP0
3892     CCP=CCP9:RP_GROUP1
3893     CCP=CCP10:RP_GROUP2
3894     PWM=PWM1:RP_GROUP3
3895     PWM=PWM2:RP_GROUP3
3896     PWM=PWM3:RP_GROUP2
3897     PWM=PWM4:RP_GROUP3
3898     PWM=PWM5:RP_GROUP0
3899     PWM=PWM6:RP_GROUP2
3900     PWM=PWM7:RP_GROUP1
3901     PWM=PWM8:RP_GROUP0
3902     PWM=PWM9:RP_GROUP1
3903     PWM=PWM10:RP_GROUP2
3904     I2C=SDA1:RC4,SCL1:RC3
3905     SPI=SDI1:RP_GROUP0,SDO1:RP_GROUP1,SCK1:RP_GROUP3,SS1:RP_GROUP2
3906     I2C=SDA2:RD5,SCL2:RD6
3907     SPI=SDI2:RP_GROUP1,SDO2:RP_GROUP0,SCK2:RP_GROUP2,SS2:RP_GROUP3
3908     USART=RX1:RP_GROUP3,TX1:RP_GROUP2
3909     USART=RX2:RP_GROUP2,TX2:RP_GROUP3
3910     USART=RX3:RP_GROUP0,TX3:RP_GROUP1
3911     USART=RX4:RP_GROUP0,TX4:RP_GROUP1
3912     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:1,RX3:1,TX3:1,RX4:1,TX4:1
3913   END=MCU
3914
3915   BEGIN=MCU:18f95j94,18f96j94,18f96j99,18f97j94
3916     ADC=AN0:RA0,AN1:RA1,AN2:RA2,AN3:RA3,AN4:RA5,AN5:RF7,AN6:RA4
3917     ADC=AN7:RF2,AN8:RG0,AN9:RC2,AN10:RF5,AN11:RF6
3918     ADC=AN16:RG4,AN17:RG3,AN18:RG2,AN19:RG1
3919     ADC=AN12:RH4,AN13:RH5,AN14:RH6,AN15:RH7
3920     ADC=AN20:RH3,AN21:RH2,AN22:RH1,AN23:RH0
3921     CCP=CCP1:RP_GROUP3
3922     CCP=CCP2:RP_GROUP3
3923     CCP=CCP3:RP_GROUP2
3924     CCP=CCP4:RP_GROUP3
3925     CCP=CCP5:RP_GROUP0
3926     CCP=CCP6:RP_GROUP2
3927     CCP=CCP7:RP_GROUP1
3928     CCP=CCP8:RP_GROUP0
3929     CCP=CCP9:RP_GROUP1
3930     CCP=CCP10:RP_GROUP2
3931     PWM=PWM1:RP_GROUP3
3932     PWM=PWM2:RP_GROUP3
3933     PWM=PWM3:RP_GROUP2
3934     PWM=PWM4:RP_GROUP3
3935     PWM=PWM5:RP_GROUP0
3936     PWM=PWM6:RP_GROUP2
3937     PWM=PWM7:RP_GROUP1
3938     PWM=PWM8:RP_GROUP0
3939     PWM=PWM9:RP_GROUP1
3940     PWM=PWM10:RP_GROUP2
3941     I2C=SDA1:RC4,SCL1:RC3
3942     SPI=SDI1:RP_GROUP0,SDO1:RP_GROUP1,SCK1:RP_GROUP3,SS1:RP_GROUP2
3943     I2C=SDA2:RD5,SCL2:RD6
3944     SPI=SDI2:RP_GROUP1,SDO2:RP_GROUP0,SCK2:RP_GROUP2,SS2:RP_GROUP3
3945     USART=RX1:RP_GROUP3,TX1:RP_GROUP2
3946     USART=RX2:RP_GROUP2,TX2:RP_GROUP3
3947     USART=RX3:RP_GROUP0,TX3:RP_GROUP1
3948     USART=RX4:RP_GROUP0,TX4:RP_GROUP1
3949     USART=IO_DIR=RX1:1,TX1:1,RX2:1,TX2:1,RX3:1,TX3:1,RX4:1,TX4:1
3950   END=MCU
3951
3952 END=IO_TABLE