sdcc/support/sdbinutils/include/opcode/msp430-decode.h

   1 /* Opcode decoder for the TI MSP430
   2    Copyright (C) 2012-2022 Free Software Foundation, Inc.
   3    Written by DJ Delorie <dj@redhat.com>
   4
   5    This file is part of GDB, the GNU Debugger.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
  20    02110-1301, USA.  */
  21
  22 #ifdef __cplusplus
  23 extern "C" {
  24 #endif
  25
  26 typedef enum
  27 {
  28   MSO_unknown,
  29   /* Double-operand instructions - all repeat .REPEATS times. */
  30   MSO_mov,      /* dest = src */
  31   MSO_add,      /* dest += src */
  32   MSO_addc,     /* dest += src + carry */
  33   MSO_subc,     /* dest -= (src-1) + carry */
  34   MSO_sub,      /* dest -= src */
  35   MSO_cmp,      /* dest - src -> status */
  36   MSO_dadd,     /* dest += src (as BCD) */
  37   MSO_bit,      /* dest & src -> status */
  38   MSO_bic,      /* dest &= ~src (bit clear) */
  39   MSO_bis,      /* dest |= src (bit set, OR) */
  40   MSO_xor,      /* dest ^= src */
  41   MSO_and,      /* dest &= src */
  42
  43   /* Single-operand instructions.  */
  44   MSO_rrc,      /* Rotate through carry, dest >>= .REPEATS.  */
  45   MSO_swpb,     /* Swap lower bytes of operand.  */
  46   MSO_rra,      /* Signed shift dest >>= .REPEATS.  */
  47   MSO_sxt,      /* Sign extend lower byte.  */
  48   MSO_push,     /* Push .REPEATS registers (or other op) starting at SRC going towards R0.  */
  49   MSO_pop,      /* Pop .REPEATS registers starting at DEST going towards R15.  */
  50   MSO_call,
  51   MSO_reti,
  52
  53   /* Jumps.  */
  54   MSO_jmp,      /* PC = SRC if .COND true.  */
  55
  56   /* Extended single-operand instructions.  */
  57   MSO_rru,      /* Unsigned shift right, dest >>= .REPEATS.  */
  58
  59 } MSP430_Opcode_ID;
  60
  61 typedef enum
  62 {
  63   MSP430_Operand_None,
  64   MSP430_Operand_Immediate,
  65   MSP430_Operand_Register,
  66   MSP430_Operand_Indirect,
  67   MSP430_Operand_Indirect_Postinc
  68 } MSP430_Operand_Type;
  69
  70 typedef enum
  71 {
  72   MSR_0 = 0,
  73   MSR_PC = 0,
  74   MSR_SP = 1,
  75   MSR_SR = 2,
  76   MSR_CG = 3,
  77   MSR_None = 16,
  78 } MSP430_Register;
  79
  80 typedef struct
  81 {
  82   MSP430_Operand_Type  type;
  83   int                  addend;
  84   MSP430_Register      reg : 8;
  85   MSP430_Register      reg2 : 8;
  86   unsigned char        bit_number : 4;
  87   unsigned char        condition : 3;
  88 } MSP430_Opcode_Operand;
  89
  90 /* These numerically match the bit encoding.  */
  91 typedef enum
  92 {
  93   MSC_nz = 0,
  94   MSC_z,
  95   MSC_nc,
  96   MSC_c,
  97   MSC_n,
  98   MSC_ge,
  99   MSC_l,
 100   MSC_true,
 101 } MSP430_Condition;
 102
 103 #define MSP430_FLAG_C   0x01
 104 #define MSP430_FLAG_Z   0x02
 105 #define MSP430_FLAG_N   0x04
 106 #define MSP430_FLAG_V   0x80
 107
 108 typedef struct
 109 {
 110   int lineno;
 111   MSP430_Opcode_ID      id;
 112   unsigned              flags_1:8;      /* These flags are set to '1' by the insn.  */
 113   unsigned              flags_0:8;      /* These flags are set to '0' by the insn.  */
 114   unsigned              flags_set:8;    /* These flags are set appropriately by the insn.  */
 115   unsigned              zc:1;           /* If set, pretend the carry bit is zero.  */
 116   unsigned              repeat_reg:1;   /* If set, count is in REG[repeats].  */
 117   unsigned              ofs_430x:1;     /* If set, the offset in any operand is 430x (else use 430 compatibility mode).  */
 118   unsigned              repeats:5;      /* Contains COUNT-1, or register number.  */
 119   int                   n_bytes;        /* Opcode size in BYTES.  */
 120   char *                syntax;
 121   int                   size;           /* Operand size in BITS.  */
 122   MSP430_Condition      cond;
 123   /* By convention, these are [0]destination, [1]source.  */
 124   MSP430_Opcode_Operand op[2];
 125 } MSP430_Opcode_Decoded;
 126
 127 int msp430_decode_opcode (unsigned long, MSP430_Opcode_Decoded *, int (*)(void *), void *);
 128
 129 #ifdef __cplusplus
 130 }
 131 #endif