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[ucsim] Implement [features:#769] Check writeability of output file when uart sends
[sdcc.git]
/
sdcc-build
/
lib
/
cross.mk
blob
ca120b6520f97f803c345a1609934382ba1cb3f7
1
ifeq
($(
TARGETCC
),)
2
TARGETCC
= $(
TOOLSPREFIX
)
gcc
3
endif
4
ifeq
($(
TARGETCXX
),)
5
TARGETCXX
= $(
TOOLSPREFIX
)
g
++
6
endif
7
ifeq
($(
TARGETAR
),)
8
TARGETAR
= $(
TOOLSPREFIX
)
ar
9
endif
10
ifeq
($(
TARGETRANLIB
),)
11
TARGETRANLIB
= $(
TOOLSPREFIX
)
ranlib
12
endif
13
ifeq
($(
TARGETSTRIP
),)
14
TARGETSTRIP
= $(
TOOLSPREFIX
)
strip
15
endif