sdcc-extra/emu/rrz80/cpu/z80_ari.h

   1 /*
   2  * Copyright (C) 1996-1998 Szeredi Miklos
   3  * Email: mszeredi@inf.bme.hu
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version. See the file COPYING.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18  *
  19  */
  20
  21 #define ADDSUB(r, op, tbl) \
  22 {                                  \
  23   register byte res;               \
  24   register int idx;                \
  25   register int flag;               \
  26   res = RA op;                     \
  27   idx = IDXCALC(RA, r, res);       \
  28   RA = res;                        \
  29   flag = (RF & ~(AALLF)) |         \
  30          TAB(tbl)[idx];            \
  31   if(!res) flag |= ZF;             \
  32   RF = flag;                       \
  33 }
  34
  35
  36 #define ADD(r) ADDSUB(r, + r, addf_tbl)
  37 #define ADC(r) ADDSUB(r, + r + (RF & CF), addf_tbl)
  38 #define SUB(r) ADDSUB(r, - r, subf_tbl)
  39 #define SBC(r) ADDSUB(r, - r - (RF & CF), subf_tbl)
  40
  41 #define AND(r) \
  42 {                                  \
  43   register byte res;               \
  44   register byte flag;              \
  45   res = RA & r;                    \
  46   RA = res;                        \
  47   flag = (RF & ~(AALLF)) |          \
  48          TAB(orf_tbl)[res] | HF;   \
  49   RF = flag;                       \
  50 }
  51
  52
  53 #define XOR(r) \
  54 {                                  \
  55   register byte res;               \
  56   register byte flag;              \
  57   res = RA ^ r;                    \
  58   RA = res;                        \
  59   flag = (RF & ~(AALLF)) |          \
  60          TAB(orf_tbl)[res];        \
  61   RF = flag;                       \
  62 }
  63
  64
  65 #define OR(r) \
  66 {                                  \
  67   register byte res;               \
  68   register byte flag;              \
  69   res = RA | r;                    \
  70   RA = res;                        \
  71   flag = (RF & ~(AALLF)) |          \
  72          TAB(orf_tbl)[res];        \
  73   RF = flag;                       \
  74 }
  75
  76
  77 #define CP(r) \
  78 {                                  \
  79   register byte res;               \
  80   register int idx;                \
  81   register int flag;               \
  82   res = RA - r;                    \
  83   idx = IDXCALC(RA, r, res);       \
  84   flag = (RF & ~(AALLF)) |          \
  85          TAB(subf_tbl)[idx];       \
  86   if(!res) flag |= ZF;             \
  87   RF = flag;                       \
  88 }