4 #define PA_DDR (*(volatile uint8_t *)0x5002)
5 #define PA_CR1 (*(volatile uint8_t *)0x5003)
7 #define CLK_DIVR (*(volatile uint8_t *)0x50c6)
8 #define CLK_PCKENR1 (*(volatile uint8_t *)0x50c7)
9 #define CLK_PCKENR2 (*(volatile uint8_t *)0x50ca)
11 #define USART3_SR (*(volatile uint8_t *)0x5240)
12 #define USART3_DR (*(volatile uint8_t *)0x5241)
13 #define USART3_BRR1 (*(volatile uint8_t *)0x5242)
14 #define USART3_BRR2 (*(volatile uint8_t *)0x5243)
15 #define USART3_CR2 (*(volatile uint8_t *)0x5245)
16 #define USART3_CR3 (*(volatile uint8_t *)0x5246)
18 #define TIM1_CR1 (*(volatile uint8_t *)0x5250)
19 #define TIM1_CNTRH (*(volatile uint8_t *)0x525e)
20 #define TIM1_CNTRL (*(volatile uint8_t *)0x525f)
21 #define TIM1_PSCRH (*(volatile uint8_t *)0x5260)
22 #define TIM1_PSCRL (*(volatile uint8_t *)0x5261)
24 #define USART_CR2_TEN (1 << 3)
25 #define USART_CR3_STOP2 (1 << 5)
26 #define USART_CR3_STOP1 (1 << 4)
27 #define USART_SR_TXE (1 << 7)
31 CLK_DIVR
= 0x00; // Set the frequency to 16 MHz
32 CLK_PCKENR2
|= 0x02; // Enable clock to timer
35 // 1000 ticks per second
41 CLK_PCKENR1
= 0xFF; // Enable peripherals
43 PA_DDR
= 0x08; // Put TX line on
46 USART3_CR2
= USART_CR2_TEN
; // Allow TX & RX
47 USART3_CR3
&= ~(USART_CR3_STOP1
| USART_CR3_STOP2
); // 1 stop bit
48 USART3_BRR2
= 0x03; USART3_BRR1
= 0x68; // 9600 baud
51 unsigned int clock(void)
53 unsigned char h
= TIM1_CNTRH
;
54 unsigned char l
= TIM1_CNTRL
;
55 return((unsigned int)(h
) << 8 | l
);
58 #if defined(__CSMC__) // Cosmic weirdness
61 while(!(USART3_SR
& USART_SR_TXE
));
67 #elif defined(__RCSTM8__) // Raisonance weirdness
70 while(!(USART3_SR
& USART_SR_TXE
));
76 #elif defined(__SDCC) && __SDCC_REVISION < 9624 // Old SDCC weirdness
79 while(!(USART3_SR
& USART_SR_TXE
));
86 while(!(USART3_SR
& USART_SR_TXE
));