sdcc/device/lib/r800/__uitobcd.s

   1 ;--------------------------------------------------------------------------
   2 ;  __uitobcd.s
   3 ;
   4 ;  Copyright (C) 2020-2021, Sergey Belyashov
   5 ;
   6 ;  This library is free software; you can redistribute it and/or modify it
   7 ;  under the terms of the GNU General Public License as published by the
   8 ;  Free Software Foundation; either version 2, or (at your option) any
   9 ;  later version.
  10 ;
  11 ;  This library is distributed in the hope that it will be useful,
  12 ;  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14 ;  GNU General Public License for more details.
  15 ;
  16 ;  You should have received a copy of the GNU General Public License
  17 ;  along with this library; see the file COPYING. If not, write to the
  18 ;  Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
  19 ;   MA 02110-1301, USA.
  20 ;
  21 ;  As a special exception, if you link this library with other files,
  22 ;  some of which are compiled with SDCC, to produce an executable,
  23 ;  this library does not by itself cause the resulting executable to
  24 ;  be covered by the GNU General Public License. This exception does
  25 ;  not however invalidate any other reasons why the executable file
  26 ;   might be covered by the GNU General Public License.
  27 ;--------------------------------------------------------------------------
  28
  29         .area   _CODE
  30
  31         .globl ___uitobcd
  32 ;
  33 ; void __uitobcd (unsigned int v, unsigned char bcd[3])
  34 ; __uitobcd converts v to BCD representation to the bcd.
  35 ; bcd[] will contain BCD value.
  36 ;
  37 ___uitobcd:
  38         push    de
  39 ;
  40         ld      bc, #0x1000
  41         ld      d, c
  42         ld      e, c
  43 ;
  44 ;--- begin speed optimization
  45 ;
  46         ld      a, h
  47         or      a, a
  48         jr      NZ, 100$
  49 ;
  50         ld      h, l
  51         srl     b
  52 ;
  53 ;--- end speed optimization
  54 ;
  55 ; HL - binary value
  56 ; CDE - future BCD value
  57 ; B - bits count (16)
  58 100$:
  59         add     hl, hl
  60         ld      a, e
  61         adc     a, a
  62         daa
  63         ld      e, a
  64         ld      a, d
  65         adc     a, a
  66         daa
  67         ld      d, a
  68         ld      a, c
  69         adc     a, a
  70         daa
  71         ld      c, a
  72         djnz    100$
  73 ;
  74         pop     hl
  75         ld      (hl), e
  76         inc     hl
  77         ld      (hl), d
  78         inc     hl
  79         ld      (hl), c
  80 ;
  81         ret