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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12f1501.h
blob474c925eabbfaf438c4cd3e9beaa6cb3fbea6106
1 /*
2 * This declarations of the PIC12F1501 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12F1501_H__
26 #define __PIC12F1501_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define PIE1_ADDR 0x0091
65 #define PIE2_ADDR 0x0092
66 #define PIE3_ADDR 0x0093
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCCON_ADDR 0x0099
71 #define OSCSTAT_ADDR 0x009A
72 #define ADRES_ADDR 0x009B
73 #define ADRESL_ADDR 0x009B
74 #define ADRESH_ADDR 0x009C
75 #define ADCON0_ADDR 0x009D
76 #define ADCON1_ADDR 0x009E
77 #define ADCON2_ADDR 0x009F
78 #define LATA_ADDR 0x010C
79 #define CM1CON0_ADDR 0x0111
80 #define CM1CON1_ADDR 0x0112
81 #define CMOUT_ADDR 0x0115
82 #define BORCON_ADDR 0x0116
83 #define FVRCON_ADDR 0x0117
84 #define DACCON0_ADDR 0x0118
85 #define DACCON1_ADDR 0x0119
86 #define APFCON_ADDR 0x011D
87 #define ANSELA_ADDR 0x018C
88 #define PMADR_ADDR 0x0191
89 #define PMADRL_ADDR 0x0191
90 #define PMADRH_ADDR 0x0192
91 #define PMDAT_ADDR 0x0193
92 #define PMDATL_ADDR 0x0193
93 #define PMDATH_ADDR 0x0194
94 #define PMCON1_ADDR 0x0195
95 #define PMCON2_ADDR 0x0196
96 #define VREGCON_ADDR 0x0197
97 #define WPUA_ADDR 0x020C
98 #define IOCAP_ADDR 0x0391
99 #define IOCAN_ADDR 0x0392
100 #define IOCAF_ADDR 0x0393
101 #define NCO1ACC_ADDR 0x0498
102 #define NCO1ACCL_ADDR 0x0498
103 #define NCO1ACCH_ADDR 0x0499
104 #define NCO1ACCU_ADDR 0x049A
105 #define NCO1INC_ADDR 0x049B
106 #define NCO1INCL_ADDR 0x049B
107 #define NCO1INCH_ADDR 0x049C
108 #define NCO1INCU_ADDR 0x049D
109 #define NCO1CON_ADDR 0x049E
110 #define NCO1CLK_ADDR 0x049F
111 #define PWM1DCL_ADDR 0x0611
112 #define PWM1DCH_ADDR 0x0612
113 #define PWM1CON_ADDR 0x0613
114 #define PWM1CON0_ADDR 0x0613
115 #define PWM2DCL_ADDR 0x0614
116 #define PWM2DCH_ADDR 0x0615
117 #define PWM2CON_ADDR 0x0616
118 #define PWM2CON0_ADDR 0x0616
119 #define PWM3DCL_ADDR 0x0617
120 #define PWM3DCH_ADDR 0x0618
121 #define PWM3CON_ADDR 0x0619
122 #define PWM3CON0_ADDR 0x0619
123 #define PWM4DCL_ADDR 0x061A
124 #define PWM4DCH_ADDR 0x061B
125 #define PWM4CON_ADDR 0x061C
126 #define PWM4CON0_ADDR 0x061C
127 #define CWG1DBR_ADDR 0x0691
128 #define CWG1DBF_ADDR 0x0692
129 #define CWG1CON0_ADDR 0x0693
130 #define CWG1CON1_ADDR 0x0694
131 #define CWG1CON2_ADDR 0x0695
132 #define CLCDATA_ADDR 0x0F0F
133 #define CLC1CON_ADDR 0x0F10
134 #define CLC1POL_ADDR 0x0F11
135 #define CLC1SEL0_ADDR 0x0F12
136 #define CLC1SEL1_ADDR 0x0F13
137 #define CLC1GLS0_ADDR 0x0F14
138 #define CLC1GLS1_ADDR 0x0F15
139 #define CLC1GLS2_ADDR 0x0F16
140 #define CLC1GLS3_ADDR 0x0F17
141 #define CLC2CON_ADDR 0x0F18
142 #define CLC2POL_ADDR 0x0F19
143 #define CLC2SEL0_ADDR 0x0F1A
144 #define CLC2SEL1_ADDR 0x0F1B
145 #define CLC2GLS0_ADDR 0x0F1C
146 #define CLC2GLS1_ADDR 0x0F1D
147 #define CLC2GLS2_ADDR 0x0F1E
148 #define CLC2GLS3_ADDR 0x0F1F
149 #define BSR_ICDSHAD_ADDR 0x0FE3
150 #define STATUS_SHAD_ADDR 0x0FE4
151 #define WREG_SHAD_ADDR 0x0FE5
152 #define BSR_SHAD_ADDR 0x0FE6
153 #define PCLATH_SHAD_ADDR 0x0FE7
154 #define FSR0L_SHAD_ADDR 0x0FE8
155 #define FSR0H_SHAD_ADDR 0x0FE9
156 #define FSR1L_SHAD_ADDR 0x0FEA
157 #define FSR1H_SHAD_ADDR 0x0FEB
158 #define STKPTR_ADDR 0x0FED
159 #define TOSL_ADDR 0x0FEE
160 #define TOSH_ADDR 0x0FEF
161
162 #endif // #ifndef NO_ADDR_DEFINES
163
164 //==============================================================================
165 //
166 // Register Definitions
167 //
168 //==============================================================================
169
170 extern __at(0x0000) __sfr INDF0;
171 extern __at(0x0001) __sfr INDF1;
172 extern __at(0x0002) __sfr PCL;
173
174 //==============================================================================
175 // STATUS Bits
176
177 extern __at(0x0003) __sfr STATUS;
178
179 typedef struct
180 {
181 unsigned C : 1;
182 unsigned DC : 1;
183 unsigned Z : 1;
184 unsigned NOT_PD : 1;
185 unsigned NOT_TO : 1;
186 unsigned : 1;
187 unsigned : 1;
188 unsigned : 1;
189 } __STATUSbits_t;
190
191 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
192
193 #define _C 0x01
194 #define _DC 0x02
195 #define _Z 0x04
196 #define _NOT_PD 0x08
197 #define _NOT_TO 0x10
198
199 //==============================================================================
200
201 extern __at(0x0004) __sfr FSR0;
202 extern __at(0x0004) __sfr FSR0L;
203 extern __at(0x0005) __sfr FSR0H;
204 extern __at(0x0006) __sfr FSR1;
205 extern __at(0x0006) __sfr FSR1L;
206 extern __at(0x0007) __sfr FSR1H;
207
208 //==============================================================================
209 // BSR Bits
210
211 extern __at(0x0008) __sfr BSR;
212
213 typedef union
214 {
215 struct
216 {
217 unsigned BSR0 : 1;
218 unsigned BSR1 : 1;
219 unsigned BSR2 : 1;
220 unsigned BSR3 : 1;
221 unsigned BSR4 : 1;
222 unsigned : 1;
223 unsigned : 1;
224 unsigned : 1;
225 };
226
227 struct
228 {
229 unsigned BSR : 5;
230 unsigned : 3;
231 };
232 } __BSRbits_t;
233
234 extern __at(0x0008) volatile __BSRbits_t BSRbits;
235
236 #define _BSR0 0x01
237 #define _BSR1 0x02
238 #define _BSR2 0x04
239 #define _BSR3 0x08
240 #define _BSR4 0x10
241
242 //==============================================================================
243
244 extern __at(0x0009) __sfr WREG;
245 extern __at(0x000A) __sfr PCLATH;
246
247 //==============================================================================
248 // INTCON Bits
249
250 extern __at(0x000B) __sfr INTCON;
251
252 typedef union
253 {
254 struct
255 {
256 unsigned IOCIF : 1;
257 unsigned INTF : 1;
258 unsigned TMR0IF : 1;
259 unsigned IOCIE : 1;
260 unsigned INTE : 1;
261 unsigned TMR0IE : 1;
262 unsigned PEIE : 1;
263 unsigned GIE : 1;
264 };
265
266 struct
267 {
268 unsigned : 1;
269 unsigned : 1;
270 unsigned T0IF : 1;
271 unsigned : 1;
272 unsigned : 1;
273 unsigned T0IE : 1;
274 unsigned : 1;
275 unsigned : 1;
276 };
277 } __INTCONbits_t;
278
279 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
280
281 #define _IOCIF 0x01
282 #define _INTF 0x02
283 #define _TMR0IF 0x04
284 #define _T0IF 0x04
285 #define _IOCIE 0x08
286 #define _INTE 0x10
287 #define _TMR0IE 0x20
288 #define _T0IE 0x20
289 #define _PEIE 0x40
290 #define _GIE 0x80
291
292 //==============================================================================
293
294
295 //==============================================================================
296 // PORTA Bits
297
298 extern __at(0x000C) __sfr PORTA;
299
300 typedef union
301 {
302 struct
303 {
304 unsigned RA0 : 1;
305 unsigned RA1 : 1;
306 unsigned RA2 : 1;
307 unsigned RA3 : 1;
308 unsigned RA4 : 1;
309 unsigned RA5 : 1;
310 unsigned : 1;
311 unsigned : 1;
312 };
313
314 struct
315 {
316 unsigned RA : 6;
317 unsigned : 2;
318 };
319 } __PORTAbits_t;
320
321 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
322
323 #define _RA0 0x01
324 #define _RA1 0x02
325 #define _RA2 0x04
326 #define _RA3 0x08
327 #define _RA4 0x10
328 #define _RA5 0x20
329
330 //==============================================================================
331
332
333 //==============================================================================
334 // PIR1 Bits
335
336 extern __at(0x0011) __sfr PIR1;
337
338 typedef struct
339 {
340 unsigned TMR1IF : 1;
341 unsigned TMR2IF : 1;
342 unsigned : 1;
343 unsigned : 1;
344 unsigned : 1;
345 unsigned : 1;
346 unsigned ADIF : 1;
347 unsigned TMR1GIF : 1;
348 } __PIR1bits_t;
349
350 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
351
352 #define _TMR1IF 0x01
353 #define _TMR2IF 0x02
354 #define _ADIF 0x40
355 #define _TMR1GIF 0x80
356
357 //==============================================================================
358
359
360 //==============================================================================
361 // PIR2 Bits
362
363 extern __at(0x0012) __sfr PIR2;
364
365 typedef struct
366 {
367 unsigned : 1;
368 unsigned : 1;
369 unsigned NCO1IF : 1;
370 unsigned : 1;
371 unsigned : 1;
372 unsigned C1IF : 1;
373 unsigned : 1;
374 unsigned : 1;
375 } __PIR2bits_t;
376
377 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
378
379 #define _NCO1IF 0x04
380 #define _C1IF 0x20
381
382 //==============================================================================
383
384
385 //==============================================================================
386 // PIR3 Bits
387
388 extern __at(0x0013) __sfr PIR3;
389
390 typedef struct
391 {
392 unsigned CLC1IF : 1;
393 unsigned CLC2IF : 1;
394 unsigned : 1;
395 unsigned : 1;
396 unsigned : 1;
397 unsigned : 1;
398 unsigned : 1;
399 unsigned : 1;
400 } __PIR3bits_t;
401
402 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
403
404 #define _CLC1IF 0x01
405 #define _CLC2IF 0x02
406
407 //==============================================================================
408
409 extern __at(0x0015) __sfr TMR0;
410 extern __at(0x0016) __sfr TMR1;
411 extern __at(0x0016) __sfr TMR1L;
412 extern __at(0x0017) __sfr TMR1H;
413
414 //==============================================================================
415 // T1CON Bits
416
417 extern __at(0x0018) __sfr T1CON;
418
419 typedef union
420 {
421 struct
422 {
423 unsigned TMR1ON : 1;
424 unsigned : 1;
425 unsigned NOT_T1SYNC : 1;
426 unsigned : 1;
427 unsigned T1CKPS0 : 1;
428 unsigned T1CKPS1 : 1;
429 unsigned TMR1CS0 : 1;
430 unsigned TMR1CS1 : 1;
431 };
432
433 struct
434 {
435 unsigned : 4;
436 unsigned T1CKPS : 2;
437 unsigned : 2;
438 };
439
440 struct
441 {
442 unsigned : 6;
443 unsigned TMR1CS : 2;
444 };
445 } __T1CONbits_t;
446
447 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
448
449 #define _TMR1ON 0x01
450 #define _NOT_T1SYNC 0x04
451 #define _T1CKPS0 0x10
452 #define _T1CKPS1 0x20
453 #define _TMR1CS0 0x40
454 #define _TMR1CS1 0x80
455
456 //==============================================================================
457
458
459 //==============================================================================
460 // T1GCON Bits
461
462 extern __at(0x0019) __sfr T1GCON;
463
464 typedef union
465 {
466 struct
467 {
468 unsigned T1GSS0 : 1;
469 unsigned T1GSS1 : 1;
470 unsigned T1GVAL : 1;
471 unsigned T1GGO_NOT_DONE : 1;
472 unsigned T1GSPM : 1;
473 unsigned T1GTM : 1;
474 unsigned T1GPOL : 1;
475 unsigned TMR1GE : 1;
476 };
477
478 struct
479 {
480 unsigned T1GSS : 2;
481 unsigned : 6;
482 };
483 } __T1GCONbits_t;
484
485 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
486
487 #define _T1GSS0 0x01
488 #define _T1GSS1 0x02
489 #define _T1GVAL 0x04
490 #define _T1GGO_NOT_DONE 0x08
491 #define _T1GSPM 0x10
492 #define _T1GTM 0x20
493 #define _T1GPOL 0x40
494 #define _TMR1GE 0x80
495
496 //==============================================================================
497
498 extern __at(0x001A) __sfr TMR2;
499 extern __at(0x001B) __sfr PR2;
500
501 //==============================================================================
502 // T2CON Bits
503
504 extern __at(0x001C) __sfr T2CON;
505
506 typedef union
507 {
508 struct
509 {
510 unsigned T2CKPS0 : 1;
511 unsigned T2CKPS1 : 1;
512 unsigned TMR2ON : 1;
513 unsigned TOUTPS0 : 1;
514 unsigned TOUTPS1 : 1;
515 unsigned TOUTPS2 : 1;
516 unsigned TOUTPS3 : 1;
517 unsigned : 1;
518 };
519
520 struct
521 {
522 unsigned T2CKPS : 2;
523 unsigned : 6;
524 };
525
526 struct
527 {
528 unsigned : 3;
529 unsigned TOUTPS : 4;
530 unsigned : 1;
531 };
532 } __T2CONbits_t;
533
534 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
535
536 #define _T2CKPS0 0x01
537 #define _T2CKPS1 0x02
538 #define _TMR2ON 0x04
539 #define _TOUTPS0 0x08
540 #define _TOUTPS1 0x10
541 #define _TOUTPS2 0x20
542 #define _TOUTPS3 0x40
543
544 //==============================================================================
545
546
547 //==============================================================================
548 // TRISA Bits
549
550 extern __at(0x008C) __sfr TRISA;
551
552 typedef union
553 {
554 struct
555 {
556 unsigned TRISA0 : 1;
557 unsigned TRISA1 : 1;
558 unsigned TRISA2 : 1;
559 unsigned TRISA3 : 1;
560 unsigned TRISA4 : 1;
561 unsigned TRISA5 : 1;
562 unsigned : 1;
563 unsigned : 1;
564 };
565
566 struct
567 {
568 unsigned TRISA : 6;
569 unsigned : 2;
570 };
571 } __TRISAbits_t;
572
573 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
574
575 #define _TRISA0 0x01
576 #define _TRISA1 0x02
577 #define _TRISA2 0x04
578 #define _TRISA3 0x08
579 #define _TRISA4 0x10
580 #define _TRISA5 0x20
581
582 //==============================================================================
583
584
585 //==============================================================================
586 // PIE1 Bits
587
588 extern __at(0x0091) __sfr PIE1;
589
590 typedef struct
591 {
592 unsigned TMR1IE : 1;
593 unsigned TMR2IE : 1;
594 unsigned : 1;
595 unsigned : 1;
596 unsigned : 1;
597 unsigned : 1;
598 unsigned ADIE : 1;
599 unsigned TMR1GIE : 1;
600 } __PIE1bits_t;
601
602 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
603
604 #define _TMR1IE 0x01
605 #define _TMR2IE 0x02
606 #define _ADIE 0x40
607 #define _TMR1GIE 0x80
608
609 //==============================================================================
610
611
612 //==============================================================================
613 // PIE2 Bits
614
615 extern __at(0x0092) __sfr PIE2;
616
617 typedef struct
618 {
619 unsigned : 1;
620 unsigned : 1;
621 unsigned NCO1IE : 1;
622 unsigned : 1;
623 unsigned : 1;
624 unsigned C1IE : 1;
625 unsigned : 1;
626 unsigned : 1;
627 } __PIE2bits_t;
628
629 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
630
631 #define _NCO1IE 0x04
632 #define _C1IE 0x20
633
634 //==============================================================================
635
636
637 //==============================================================================
638 // PIE3 Bits
639
640 extern __at(0x0093) __sfr PIE3;
641
642 typedef struct
643 {
644 unsigned CLC1IE : 1;
645 unsigned CLC2IE : 1;
646 unsigned : 1;
647 unsigned : 1;
648 unsigned : 1;
649 unsigned : 1;
650 unsigned : 1;
651 unsigned : 1;
652 } __PIE3bits_t;
653
654 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
655
656 #define _CLC1IE 0x01
657 #define _CLC2IE 0x02
658
659 //==============================================================================
660
661
662 //==============================================================================
663 // OPTION_REG Bits
664
665 extern __at(0x0095) __sfr OPTION_REG;
666
667 typedef union
668 {
669 struct
670 {
671 unsigned PS0 : 1;
672 unsigned PS1 : 1;
673 unsigned PS2 : 1;
674 unsigned PSA : 1;
675 unsigned TMR0SE : 1;
676 unsigned TMR0CS : 1;
677 unsigned INTEDG : 1;
678 unsigned NOT_WPUEN : 1;
679 };
680
681 struct
682 {
683 unsigned : 1;
684 unsigned : 1;
685 unsigned : 1;
686 unsigned : 1;
687 unsigned T0SE : 1;
688 unsigned T0CS : 1;
689 unsigned : 1;
690 unsigned : 1;
691 };
692
693 struct
694 {
695 unsigned PS : 3;
696 unsigned : 5;
697 };
698 } __OPTION_REGbits_t;
699
700 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
701
702 #define _PS0 0x01
703 #define _PS1 0x02
704 #define _PS2 0x04
705 #define _PSA 0x08
706 #define _TMR0SE 0x10
707 #define _T0SE 0x10
708 #define _TMR0CS 0x20
709 #define _T0CS 0x20
710 #define _INTEDG 0x40
711 #define _NOT_WPUEN 0x80
712
713 //==============================================================================
714
715
716 //==============================================================================
717 // PCON Bits
718
719 extern __at(0x0096) __sfr PCON;
720
721 typedef struct
722 {
723 unsigned NOT_BOR : 1;
724 unsigned NOT_POR : 1;
725 unsigned NOT_RI : 1;
726 unsigned NOT_RMCLR : 1;
727 unsigned NOT_RWDT : 1;
728 unsigned : 1;
729 unsigned STKUNF : 1;
730 unsigned STKOVF : 1;
731 } __PCONbits_t;
732
733 extern __at(0x0096) volatile __PCONbits_t PCONbits;
734
735 #define _NOT_BOR 0x01
736 #define _NOT_POR 0x02
737 #define _NOT_RI 0x04
738 #define _NOT_RMCLR 0x08
739 #define _NOT_RWDT 0x10
740 #define _STKUNF 0x40
741 #define _STKOVF 0x80
742
743 //==============================================================================
744
745
746 //==============================================================================
747 // WDTCON Bits
748
749 extern __at(0x0097) __sfr WDTCON;
750
751 typedef union
752 {
753 struct
754 {
755 unsigned SWDTEN : 1;
756 unsigned WDTPS0 : 1;
757 unsigned WDTPS1 : 1;
758 unsigned WDTPS2 : 1;
759 unsigned WDTPS3 : 1;
760 unsigned WDTPS4 : 1;
761 unsigned : 1;
762 unsigned : 1;
763 };
764
765 struct
766 {
767 unsigned : 1;
768 unsigned WDTPS : 5;
769 unsigned : 2;
770 };
771 } __WDTCONbits_t;
772
773 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
774
775 #define _SWDTEN 0x01
776 #define _WDTPS0 0x02
777 #define _WDTPS1 0x04
778 #define _WDTPS2 0x08
779 #define _WDTPS3 0x10
780 #define _WDTPS4 0x20
781
782 //==============================================================================
783
784
785 //==============================================================================
786 // OSCCON Bits
787
788 extern __at(0x0099) __sfr OSCCON;
789
790 typedef union
791 {
792 struct
793 {
794 unsigned SCS0 : 1;
795 unsigned SCS1 : 1;
796 unsigned : 1;
797 unsigned IRCF0 : 1;
798 unsigned IRCF1 : 1;
799 unsigned IRCF2 : 1;
800 unsigned IRCF3 : 1;
801 unsigned : 1;
802 };
803
804 struct
805 {
806 unsigned SCS : 2;
807 unsigned : 6;
808 };
809
810 struct
811 {
812 unsigned : 3;
813 unsigned IRCF : 4;
814 unsigned : 1;
815 };
816 } __OSCCONbits_t;
817
818 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
819
820 #define _SCS0 0x01
821 #define _SCS1 0x02
822 #define _IRCF0 0x08
823 #define _IRCF1 0x10
824 #define _IRCF2 0x20
825 #define _IRCF3 0x40
826
827 //==============================================================================
828
829
830 //==============================================================================
831 // OSCSTAT Bits
832
833 extern __at(0x009A) __sfr OSCSTAT;
834
835 typedef struct
836 {
837 unsigned HFIOFS : 1;
838 unsigned LFIOFR : 1;
839 unsigned : 1;
840 unsigned : 1;
841 unsigned HFIOFR : 1;
842 unsigned : 1;
843 unsigned : 1;
844 unsigned : 1;
845 } __OSCSTATbits_t;
846
847 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
848
849 #define _HFIOFS 0x01
850 #define _LFIOFR 0x02
851 #define _HFIOFR 0x10
852
853 //==============================================================================
854
855 extern __at(0x009B) __sfr ADRES;
856 extern __at(0x009B) __sfr ADRESL;
857 extern __at(0x009C) __sfr ADRESH;
858
859 //==============================================================================
860 // ADCON0 Bits
861
862 extern __at(0x009D) __sfr ADCON0;
863
864 typedef union
865 {
866 struct
867 {
868 unsigned ADON : 1;
869 unsigned GO_NOT_DONE : 1;
870 unsigned CHS0 : 1;
871 unsigned CHS1 : 1;
872 unsigned CHS2 : 1;
873 unsigned CHS3 : 1;
874 unsigned CHS4 : 1;
875 unsigned : 1;
876 };
877
878 struct
879 {
880 unsigned : 1;
881 unsigned ADGO : 1;
882 unsigned : 1;
883 unsigned : 1;
884 unsigned : 1;
885 unsigned : 1;
886 unsigned : 1;
887 unsigned : 1;
888 };
889
890 struct
891 {
892 unsigned : 1;
893 unsigned GO : 1;
894 unsigned : 1;
895 unsigned : 1;
896 unsigned : 1;
897 unsigned : 1;
898 unsigned : 1;
899 unsigned : 1;
900 };
901
902 struct
903 {
904 unsigned : 2;
905 unsigned CHS : 5;
906 unsigned : 1;
907 };
908 } __ADCON0bits_t;
909
910 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
911
912 #define _ADON 0x01
913 #define _GO_NOT_DONE 0x02
914 #define _ADGO 0x02
915 #define _GO 0x02
916 #define _CHS0 0x04
917 #define _CHS1 0x08
918 #define _CHS2 0x10
919 #define _CHS3 0x20
920 #define _CHS4 0x40
921
922 //==============================================================================
923
924
925 //==============================================================================
926 // ADCON1 Bits
927
928 extern __at(0x009E) __sfr ADCON1;
929
930 typedef union
931 {
932 struct
933 {
934 unsigned ADPREF0 : 1;
935 unsigned ADPREF1 : 1;
936 unsigned : 1;
937 unsigned : 1;
938 unsigned : 1;
939 unsigned : 1;
940 unsigned : 1;
941 unsigned ADFM : 1;
942 };
943
944 struct
945 {
946 unsigned ADPREF : 2;
947 unsigned : 6;
948 };
949 } __ADCON1bits_t;
950
951 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
952
953 #define _ADPREF0 0x01
954 #define _ADPREF1 0x02
955 #define _ADFM 0x80
956
957 //==============================================================================
958
959
960 //==============================================================================
961 // ADCON2 Bits
962
963 extern __at(0x009F) __sfr ADCON2;
964
965 typedef union
966 {
967 struct
968 {
969 unsigned : 1;
970 unsigned : 1;
971 unsigned : 1;
972 unsigned : 1;
973 unsigned TRIGSEL0 : 1;
974 unsigned TRIGSEL1 : 1;
975 unsigned TRIGSEL2 : 1;
976 unsigned TRIGSEL3 : 1;
977 };
978
979 struct
980 {
981 unsigned : 4;
982 unsigned TRIGSEL : 4;
983 };
984 } __ADCON2bits_t;
985
986 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
987
988 #define _TRIGSEL0 0x10
989 #define _TRIGSEL1 0x20
990 #define _TRIGSEL2 0x40
991 #define _TRIGSEL3 0x80
992
993 //==============================================================================
994
995
996 //==============================================================================
997 // LATA Bits
998
999 extern __at(0x010C) __sfr LATA;
1000
1001 typedef struct
1002 {
1003 unsigned LATA0 : 1;
1004 unsigned LATA1 : 1;
1005 unsigned LATA2 : 1;
1006 unsigned : 1;
1007 unsigned LATA4 : 1;
1008 unsigned LATA5 : 1;
1009 unsigned : 1;
1010 unsigned : 1;
1011 } __LATAbits_t;
1012
1013 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1014
1015 #define _LATA0 0x01
1016 #define _LATA1 0x02
1017 #define _LATA2 0x04
1018 #define _LATA4 0x10
1019 #define _LATA5 0x20
1020
1021 //==============================================================================
1022
1023
1024 //==============================================================================
1025 // CM1CON0 Bits
1026
1027 extern __at(0x0111) __sfr CM1CON0;
1028
1029 typedef struct
1030 {
1031 unsigned C1SYNC : 1;
1032 unsigned C1HYS : 1;
1033 unsigned C1SP : 1;
1034 unsigned : 1;
1035 unsigned C1POL : 1;
1036 unsigned C1OE : 1;
1037 unsigned C1OUT : 1;
1038 unsigned C1ON : 1;
1039 } __CM1CON0bits_t;
1040
1041 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1042
1043 #define _C1SYNC 0x01
1044 #define _C1HYS 0x02
1045 #define _C1SP 0x04
1046 #define _C1POL 0x10
1047 #define _C1OE 0x20
1048 #define _C1OUT 0x40
1049 #define _C1ON 0x80
1050
1051 //==============================================================================
1052
1053
1054 //==============================================================================
1055 // CM1CON1 Bits
1056
1057 extern __at(0x0112) __sfr CM1CON1;
1058
1059 typedef union
1060 {
1061 struct
1062 {
1063 unsigned C1NCH0 : 1;
1064 unsigned C1NCH1 : 1;
1065 unsigned C1NCH2 : 1;
1066 unsigned : 1;
1067 unsigned C1PCH0 : 1;
1068 unsigned C1PCH1 : 1;
1069 unsigned C1INTN : 1;
1070 unsigned C1INTP : 1;
1071 };
1072
1073 struct
1074 {
1075 unsigned C1NCH : 3;
1076 unsigned : 5;
1077 };
1078
1079 struct
1080 {
1081 unsigned : 4;
1082 unsigned C1PCH : 2;
1083 unsigned : 2;
1084 };
1085 } __CM1CON1bits_t;
1086
1087 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1088
1089 #define _C1NCH0 0x01
1090 #define _C1NCH1 0x02
1091 #define _C1NCH2 0x04
1092 #define _C1PCH0 0x10
1093 #define _C1PCH1 0x20
1094 #define _C1INTN 0x40
1095 #define _C1INTP 0x80
1096
1097 //==============================================================================
1098
1099
1100 //==============================================================================
1101 // CMOUT Bits
1102
1103 extern __at(0x0115) __sfr CMOUT;
1104
1105 typedef struct
1106 {
1107 unsigned MC1OUT : 1;
1108 unsigned : 1;
1109 unsigned : 1;
1110 unsigned : 1;
1111 unsigned : 1;
1112 unsigned : 1;
1113 unsigned : 1;
1114 unsigned : 1;
1115 } __CMOUTbits_t;
1116
1117 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1118
1119 #define _MC1OUT 0x01
1120
1121 //==============================================================================
1122
1123
1124 //==============================================================================
1125 // BORCON Bits
1126
1127 extern __at(0x0116) __sfr BORCON;
1128
1129 typedef struct
1130 {
1131 unsigned BORRDY : 1;
1132 unsigned : 1;
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned BORFS : 1;
1138 unsigned SBOREN : 1;
1139 } __BORCONbits_t;
1140
1141 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1142
1143 #define _BORRDY 0x01
1144 #define _BORFS 0x40
1145 #define _SBOREN 0x80
1146
1147 //==============================================================================
1148
1149
1150 //==============================================================================
1151 // FVRCON Bits
1152
1153 extern __at(0x0117) __sfr FVRCON;
1154
1155 typedef union
1156 {
1157 struct
1158 {
1159 unsigned ADFVR0 : 1;
1160 unsigned ADFVR1 : 1;
1161 unsigned CDAFVR0 : 1;
1162 unsigned CDAFVR1 : 1;
1163 unsigned TSRNG : 1;
1164 unsigned TSEN : 1;
1165 unsigned FVRRDY : 1;
1166 unsigned FVREN : 1;
1167 };
1168
1169 struct
1170 {
1171 unsigned ADFVR : 2;
1172 unsigned : 6;
1173 };
1174
1175 struct
1176 {
1177 unsigned : 2;
1178 unsigned CDAFVR : 2;
1179 unsigned : 4;
1180 };
1181 } __FVRCONbits_t;
1182
1183 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1184
1185 #define _ADFVR0 0x01
1186 #define _ADFVR1 0x02
1187 #define _CDAFVR0 0x04
1188 #define _CDAFVR1 0x08
1189 #define _TSRNG 0x10
1190 #define _TSEN 0x20
1191 #define _FVRRDY 0x40
1192 #define _FVREN 0x80
1193
1194 //==============================================================================
1195
1196
1197 //==============================================================================
1198 // DACCON0 Bits
1199
1200 extern __at(0x0118) __sfr DACCON0;
1201
1202 typedef struct
1203 {
1204 unsigned : 1;
1205 unsigned : 1;
1206 unsigned DACPSS : 1;
1207 unsigned : 1;
1208 unsigned DACOE2 : 1;
1209 unsigned DACOE1 : 1;
1210 unsigned : 1;
1211 unsigned DACEN : 1;
1212 } __DACCON0bits_t;
1213
1214 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1215
1216 #define _DACPSS 0x04
1217 #define _DACOE2 0x10
1218 #define _DACOE1 0x20
1219 #define _DACEN 0x80
1220
1221 //==============================================================================
1222
1223
1224 //==============================================================================
1225 // DACCON1 Bits
1226
1227 extern __at(0x0119) __sfr DACCON1;
1228
1229 typedef union
1230 {
1231 struct
1232 {
1233 unsigned DACR0 : 1;
1234 unsigned DACR1 : 1;
1235 unsigned DACR2 : 1;
1236 unsigned DACR3 : 1;
1237 unsigned DACR4 : 1;
1238 unsigned : 1;
1239 unsigned : 1;
1240 unsigned : 1;
1241 };
1242
1243 struct
1244 {
1245 unsigned DACR : 5;
1246 unsigned : 3;
1247 };
1248 } __DACCON1bits_t;
1249
1250 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1251
1252 #define _DACR0 0x01
1253 #define _DACR1 0x02
1254 #define _DACR2 0x04
1255 #define _DACR3 0x08
1256 #define _DACR4 0x10
1257
1258 //==============================================================================
1259
1260
1261 //==============================================================================
1262 // APFCON Bits
1263
1264 extern __at(0x011D) __sfr APFCON;
1265
1266 typedef struct
1267 {
1268 unsigned NCO1SEL : 1;
1269 unsigned CLC1SEL : 1;
1270 unsigned : 1;
1271 unsigned T1GSEL : 1;
1272 unsigned : 1;
1273 unsigned : 1;
1274 unsigned CWG1ASEL : 1;
1275 unsigned CWG1BSEL : 1;
1276 } __APFCONbits_t;
1277
1278 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1279
1280 #define _NCO1SEL 0x01
1281 #define _CLC1SEL 0x02
1282 #define _T1GSEL 0x08
1283 #define _CWG1ASEL 0x40
1284 #define _CWG1BSEL 0x80
1285
1286 //==============================================================================
1287
1288
1289 //==============================================================================
1290 // ANSELA Bits
1291
1292 extern __at(0x018C) __sfr ANSELA;
1293
1294 typedef struct
1295 {
1296 unsigned ANSA0 : 1;
1297 unsigned ANSA1 : 1;
1298 unsigned ANSA2 : 1;
1299 unsigned : 1;
1300 unsigned ANSA4 : 1;
1301 unsigned : 1;
1302 unsigned : 1;
1303 unsigned : 1;
1304 } __ANSELAbits_t;
1305
1306 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1307
1308 #define _ANSA0 0x01
1309 #define _ANSA1 0x02
1310 #define _ANSA2 0x04
1311 #define _ANSA4 0x10
1312
1313 //==============================================================================
1314
1315 extern __at(0x0191) __sfr PMADR;
1316 extern __at(0x0191) __sfr PMADRL;
1317 extern __at(0x0192) __sfr PMADRH;
1318 extern __at(0x0193) __sfr PMDAT;
1319 extern __at(0x0193) __sfr PMDATL;
1320 extern __at(0x0194) __sfr PMDATH;
1321
1322 //==============================================================================
1323 // PMCON1 Bits
1324
1325 extern __at(0x0195) __sfr PMCON1;
1326
1327 typedef struct
1328 {
1329 unsigned RD : 1;
1330 unsigned WR : 1;
1331 unsigned WREN : 1;
1332 unsigned WRERR : 1;
1333 unsigned FREE : 1;
1334 unsigned LWLO : 1;
1335 unsigned CFGS : 1;
1336 unsigned : 1;
1337 } __PMCON1bits_t;
1338
1339 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1340
1341 #define _RD 0x01
1342 #define _WR 0x02
1343 #define _WREN 0x04
1344 #define _WRERR 0x08
1345 #define _FREE 0x10
1346 #define _LWLO 0x20
1347 #define _CFGS 0x40
1348
1349 //==============================================================================
1350
1351 extern __at(0x0196) __sfr PMCON2;
1352
1353 //==============================================================================
1354 // VREGCON Bits
1355
1356 extern __at(0x0197) __sfr VREGCON;
1357
1358 typedef struct
1359 {
1360 unsigned : 1;
1361 unsigned VREGPM : 1;
1362 unsigned : 1;
1363 unsigned : 1;
1364 unsigned : 1;
1365 unsigned : 1;
1366 unsigned : 1;
1367 unsigned : 1;
1368 } __VREGCONbits_t;
1369
1370 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1371
1372 #define _VREGPM 0x02
1373
1374 //==============================================================================
1375
1376
1377 //==============================================================================
1378 // WPUA Bits
1379
1380 extern __at(0x020C) __sfr WPUA;
1381
1382 typedef union
1383 {
1384 struct
1385 {
1386 unsigned WPUA0 : 1;
1387 unsigned WPUA1 : 1;
1388 unsigned WPUA2 : 1;
1389 unsigned WPUA3 : 1;
1390 unsigned WPUA4 : 1;
1391 unsigned WPUA5 : 1;
1392 unsigned : 1;
1393 unsigned : 1;
1394 };
1395
1396 struct
1397 {
1398 unsigned WPUA : 6;
1399 unsigned : 2;
1400 };
1401 } __WPUAbits_t;
1402
1403 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1404
1405 #define _WPUA0 0x01
1406 #define _WPUA1 0x02
1407 #define _WPUA2 0x04
1408 #define _WPUA3 0x08
1409 #define _WPUA4 0x10
1410 #define _WPUA5 0x20
1411
1412 //==============================================================================
1413
1414
1415 //==============================================================================
1416 // IOCAP Bits
1417
1418 extern __at(0x0391) __sfr IOCAP;
1419
1420 typedef union
1421 {
1422 struct
1423 {
1424 unsigned IOCAP0 : 1;
1425 unsigned IOCAP1 : 1;
1426 unsigned IOCAP2 : 1;
1427 unsigned IOCAP3 : 1;
1428 unsigned IOCAP4 : 1;
1429 unsigned IOCAP5 : 1;
1430 unsigned : 1;
1431 unsigned : 1;
1432 };
1433
1434 struct
1435 {
1436 unsigned IOCAP : 6;
1437 unsigned : 2;
1438 };
1439 } __IOCAPbits_t;
1440
1441 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1442
1443 #define _IOCAP0 0x01
1444 #define _IOCAP1 0x02
1445 #define _IOCAP2 0x04
1446 #define _IOCAP3 0x08
1447 #define _IOCAP4 0x10
1448 #define _IOCAP5 0x20
1449
1450 //==============================================================================
1451
1452
1453 //==============================================================================
1454 // IOCAN Bits
1455
1456 extern __at(0x0392) __sfr IOCAN;
1457
1458 typedef union
1459 {
1460 struct
1461 {
1462 unsigned IOCAN0 : 1;
1463 unsigned IOCAN1 : 1;
1464 unsigned IOCAN2 : 1;
1465 unsigned IOCAN3 : 1;
1466 unsigned IOCAN4 : 1;
1467 unsigned IOCAN5 : 1;
1468 unsigned : 1;
1469 unsigned : 1;
1470 };
1471
1472 struct
1473 {
1474 unsigned IOCAN : 6;
1475 unsigned : 2;
1476 };
1477 } __IOCANbits_t;
1478
1479 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
1480
1481 #define _IOCAN0 0x01
1482 #define _IOCAN1 0x02
1483 #define _IOCAN2 0x04
1484 #define _IOCAN3 0x08
1485 #define _IOCAN4 0x10
1486 #define _IOCAN5 0x20
1487
1488 //==============================================================================
1489
1490
1491 //==============================================================================
1492 // IOCAF Bits
1493
1494 extern __at(0x0393) __sfr IOCAF;
1495
1496 typedef union
1497 {
1498 struct
1499 {
1500 unsigned IOCAF0 : 1;
1501 unsigned IOCAF1 : 1;
1502 unsigned IOCAF2 : 1;
1503 unsigned IOCAF3 : 1;
1504 unsigned IOCAF4 : 1;
1505 unsigned IOCAF5 : 1;
1506 unsigned : 1;
1507 unsigned : 1;
1508 };
1509
1510 struct
1511 {
1512 unsigned IOCAF : 6;
1513 unsigned : 2;
1514 };
1515 } __IOCAFbits_t;
1516
1517 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
1518
1519 #define _IOCAF0 0x01
1520 #define _IOCAF1 0x02
1521 #define _IOCAF2 0x04
1522 #define _IOCAF3 0x08
1523 #define _IOCAF4 0x10
1524 #define _IOCAF5 0x20
1525
1526 //==============================================================================
1527
1528 extern __at(0x0498) __sfr NCO1ACC;
1529
1530 //==============================================================================
1531 // NCO1ACCL Bits
1532
1533 extern __at(0x0498) __sfr NCO1ACCL;
1534
1535 typedef struct
1536 {
1537 unsigned NCO1ACC0 : 1;
1538 unsigned NCO1ACC1 : 1;
1539 unsigned NCO1ACC2 : 1;
1540 unsigned NCO1ACC3 : 1;
1541 unsigned NCO1ACC4 : 1;
1542 unsigned NCO1ACC5 : 1;
1543 unsigned NCO1ACC6 : 1;
1544 unsigned NCO1ACC7 : 1;
1545 } __NCO1ACCLbits_t;
1546
1547 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits;
1548
1549 #define _NCO1ACC0 0x01
1550 #define _NCO1ACC1 0x02
1551 #define _NCO1ACC2 0x04
1552 #define _NCO1ACC3 0x08
1553 #define _NCO1ACC4 0x10
1554 #define _NCO1ACC5 0x20
1555 #define _NCO1ACC6 0x40
1556 #define _NCO1ACC7 0x80
1557
1558 //==============================================================================
1559
1560
1561 //==============================================================================
1562 // NCO1ACCH Bits
1563
1564 extern __at(0x0499) __sfr NCO1ACCH;
1565
1566 typedef struct
1567 {
1568 unsigned NCO1ACC8 : 1;
1569 unsigned NCO1ACC9 : 1;
1570 unsigned NCO1ACC10 : 1;
1571 unsigned NCO1ACC11 : 1;
1572 unsigned NCO1ACC12 : 1;
1573 unsigned NCO1ACC13 : 1;
1574 unsigned NCO1ACC14 : 1;
1575 unsigned NCO1ACC15 : 1;
1576 } __NCO1ACCHbits_t;
1577
1578 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits;
1579
1580 #define _NCO1ACC8 0x01
1581 #define _NCO1ACC9 0x02
1582 #define _NCO1ACC10 0x04
1583 #define _NCO1ACC11 0x08
1584 #define _NCO1ACC12 0x10
1585 #define _NCO1ACC13 0x20
1586 #define _NCO1ACC14 0x40
1587 #define _NCO1ACC15 0x80
1588
1589 //==============================================================================
1590
1591
1592 //==============================================================================
1593 // NCO1ACCU Bits
1594
1595 extern __at(0x049A) __sfr NCO1ACCU;
1596
1597 typedef struct
1598 {
1599 unsigned NCO1ACC16 : 1;
1600 unsigned NCO1ACC17 : 1;
1601 unsigned NCO1ACC18 : 1;
1602 unsigned NCO1ACC19 : 1;
1603 unsigned : 1;
1604 unsigned : 1;
1605 unsigned : 1;
1606 unsigned : 1;
1607 } __NCO1ACCUbits_t;
1608
1609 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits;
1610
1611 #define _NCO1ACC16 0x01
1612 #define _NCO1ACC17 0x02
1613 #define _NCO1ACC18 0x04
1614 #define _NCO1ACC19 0x08
1615
1616 //==============================================================================
1617
1618 extern __at(0x049B) __sfr NCO1INC;
1619
1620 //==============================================================================
1621 // NCO1INCL Bits
1622
1623 extern __at(0x049B) __sfr NCO1INCL;
1624
1625 typedef struct
1626 {
1627 unsigned NCO1INC0 : 1;
1628 unsigned NCO1INC1 : 1;
1629 unsigned NCO1INC2 : 1;
1630 unsigned NCO1INC3 : 1;
1631 unsigned NCO1INC4 : 1;
1632 unsigned NCO1INC5 : 1;
1633 unsigned NCO1INC6 : 1;
1634 unsigned NCO1INC7 : 1;
1635 } __NCO1INCLbits_t;
1636
1637 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits;
1638
1639 #define _NCO1INC0 0x01
1640 #define _NCO1INC1 0x02
1641 #define _NCO1INC2 0x04
1642 #define _NCO1INC3 0x08
1643 #define _NCO1INC4 0x10
1644 #define _NCO1INC5 0x20
1645 #define _NCO1INC6 0x40
1646 #define _NCO1INC7 0x80
1647
1648 //==============================================================================
1649
1650
1651 //==============================================================================
1652 // NCO1INCH Bits
1653
1654 extern __at(0x049C) __sfr NCO1INCH;
1655
1656 typedef struct
1657 {
1658 unsigned NCO1INC8 : 1;
1659 unsigned NCO1INC9 : 1;
1660 unsigned NCO1INC10 : 1;
1661 unsigned NCO1INC11 : 1;
1662 unsigned NCO1INC12 : 1;
1663 unsigned NCO1INC13 : 1;
1664 unsigned NCO1INC14 : 1;
1665 unsigned NCO1INC15 : 1;
1666 } __NCO1INCHbits_t;
1667
1668 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits;
1669
1670 #define _NCO1INC8 0x01
1671 #define _NCO1INC9 0x02
1672 #define _NCO1INC10 0x04
1673 #define _NCO1INC11 0x08
1674 #define _NCO1INC12 0x10
1675 #define _NCO1INC13 0x20
1676 #define _NCO1INC14 0x40
1677 #define _NCO1INC15 0x80
1678
1679 //==============================================================================
1680
1681 extern __at(0x049D) __sfr NCO1INCU;
1682
1683 //==============================================================================
1684 // NCO1CON Bits
1685
1686 extern __at(0x049E) __sfr NCO1CON;
1687
1688 typedef struct
1689 {
1690 unsigned N1PFM : 1;
1691 unsigned : 1;
1692 unsigned : 1;
1693 unsigned : 1;
1694 unsigned N1POL : 1;
1695 unsigned N1OUT : 1;
1696 unsigned N1OE : 1;
1697 unsigned N1EN : 1;
1698 } __NCO1CONbits_t;
1699
1700 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits;
1701
1702 #define _N1PFM 0x01
1703 #define _N1POL 0x10
1704 #define _N1OUT 0x20
1705 #define _N1OE 0x40
1706 #define _N1EN 0x80
1707
1708 //==============================================================================
1709
1710
1711 //==============================================================================
1712 // NCO1CLK Bits
1713
1714 extern __at(0x049F) __sfr NCO1CLK;
1715
1716 typedef union
1717 {
1718 struct
1719 {
1720 unsigned N1CKS0 : 1;
1721 unsigned N1CKS1 : 1;
1722 unsigned : 1;
1723 unsigned : 1;
1724 unsigned : 1;
1725 unsigned N1PWS0 : 1;
1726 unsigned N1PWS1 : 1;
1727 unsigned N1PWS2 : 1;
1728 };
1729
1730 struct
1731 {
1732 unsigned N1CKS : 2;
1733 unsigned : 6;
1734 };
1735
1736 struct
1737 {
1738 unsigned : 5;
1739 unsigned N1PWS : 3;
1740 };
1741 } __NCO1CLKbits_t;
1742
1743 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits;
1744
1745 #define _N1CKS0 0x01
1746 #define _N1CKS1 0x02
1747 #define _N1PWS0 0x20
1748 #define _N1PWS1 0x40
1749 #define _N1PWS2 0x80
1750
1751 //==============================================================================
1752
1753
1754 //==============================================================================
1755 // PWM1DCL Bits
1756
1757 extern __at(0x0611) __sfr PWM1DCL;
1758
1759 typedef union
1760 {
1761 struct
1762 {
1763 unsigned : 1;
1764 unsigned : 1;
1765 unsigned : 1;
1766 unsigned : 1;
1767 unsigned : 1;
1768 unsigned : 1;
1769 unsigned PWM1DCL0 : 1;
1770 unsigned PWM1DCL1 : 1;
1771 };
1772
1773 struct
1774 {
1775 unsigned : 6;
1776 unsigned PWM1DCL : 2;
1777 };
1778 } __PWM1DCLbits_t;
1779
1780 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
1781
1782 #define _PWM1DCL0 0x40
1783 #define _PWM1DCL1 0x80
1784
1785 //==============================================================================
1786
1787
1788 //==============================================================================
1789 // PWM1DCH Bits
1790
1791 extern __at(0x0612) __sfr PWM1DCH;
1792
1793 typedef struct
1794 {
1795 unsigned PWM1DCH0 : 1;
1796 unsigned PWM1DCH1 : 1;
1797 unsigned PWM1DCH2 : 1;
1798 unsigned PWM1DCH3 : 1;
1799 unsigned PWM1DCH4 : 1;
1800 unsigned PWM1DCH5 : 1;
1801 unsigned PWM1DCH6 : 1;
1802 unsigned PWM1DCH7 : 1;
1803 } __PWM1DCHbits_t;
1804
1805 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
1806
1807 #define _PWM1DCH0 0x01
1808 #define _PWM1DCH1 0x02
1809 #define _PWM1DCH2 0x04
1810 #define _PWM1DCH3 0x08
1811 #define _PWM1DCH4 0x10
1812 #define _PWM1DCH5 0x20
1813 #define _PWM1DCH6 0x40
1814 #define _PWM1DCH7 0x80
1815
1816 //==============================================================================
1817
1818
1819 //==============================================================================
1820 // PWM1CON Bits
1821
1822 extern __at(0x0613) __sfr PWM1CON;
1823
1824 typedef struct
1825 {
1826 unsigned : 1;
1827 unsigned : 1;
1828 unsigned : 1;
1829 unsigned : 1;
1830 unsigned PWM1POL : 1;
1831 unsigned PWM1OUT : 1;
1832 unsigned PWM1OE : 1;
1833 unsigned PWM1EN : 1;
1834 } __PWM1CONbits_t;
1835
1836 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
1837
1838 #define _PWM1POL 0x10
1839 #define _PWM1OUT 0x20
1840 #define _PWM1OE 0x40
1841 #define _PWM1EN 0x80
1842
1843 //==============================================================================
1844
1845
1846 //==============================================================================
1847 // PWM1CON0 Bits
1848
1849 extern __at(0x0613) __sfr PWM1CON0;
1850
1851 typedef struct
1852 {
1853 unsigned : 1;
1854 unsigned : 1;
1855 unsigned : 1;
1856 unsigned : 1;
1857 unsigned PWM1POL : 1;
1858 unsigned PWM1OUT : 1;
1859 unsigned PWM1OE : 1;
1860 unsigned PWM1EN : 1;
1861 } __PWM1CON0bits_t;
1862
1863 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
1864
1865 #define _PWM1CON0_PWM1POL 0x10
1866 #define _PWM1CON0_PWM1OUT 0x20
1867 #define _PWM1CON0_PWM1OE 0x40
1868 #define _PWM1CON0_PWM1EN 0x80
1869
1870 //==============================================================================
1871
1872
1873 //==============================================================================
1874 // PWM2DCL Bits
1875
1876 extern __at(0x0614) __sfr PWM2DCL;
1877
1878 typedef union
1879 {
1880 struct
1881 {
1882 unsigned : 1;
1883 unsigned : 1;
1884 unsigned : 1;
1885 unsigned : 1;
1886 unsigned : 1;
1887 unsigned : 1;
1888 unsigned PWM2DCL0 : 1;
1889 unsigned PWM2DCL1 : 1;
1890 };
1891
1892 struct
1893 {
1894 unsigned : 6;
1895 unsigned PWM2DCL : 2;
1896 };
1897 } __PWM2DCLbits_t;
1898
1899 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
1900
1901 #define _PWM2DCL0 0x40
1902 #define _PWM2DCL1 0x80
1903
1904 //==============================================================================
1905
1906
1907 //==============================================================================
1908 // PWM2DCH Bits
1909
1910 extern __at(0x0615) __sfr PWM2DCH;
1911
1912 typedef struct
1913 {
1914 unsigned PWM2DCH0 : 1;
1915 unsigned PWM2DCH1 : 1;
1916 unsigned PWM2DCH2 : 1;
1917 unsigned PWM2DCH3 : 1;
1918 unsigned PWM2DCH4 : 1;
1919 unsigned PWM2DCH5 : 1;
1920 unsigned PWM2DCH6 : 1;
1921 unsigned PWM2DCH7 : 1;
1922 } __PWM2DCHbits_t;
1923
1924 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
1925
1926 #define _PWM2DCH0 0x01
1927 #define _PWM2DCH1 0x02
1928 #define _PWM2DCH2 0x04
1929 #define _PWM2DCH3 0x08
1930 #define _PWM2DCH4 0x10
1931 #define _PWM2DCH5 0x20
1932 #define _PWM2DCH6 0x40
1933 #define _PWM2DCH7 0x80
1934
1935 //==============================================================================
1936
1937
1938 //==============================================================================
1939 // PWM2CON Bits
1940
1941 extern __at(0x0616) __sfr PWM2CON;
1942
1943 typedef struct
1944 {
1945 unsigned : 1;
1946 unsigned : 1;
1947 unsigned : 1;
1948 unsigned : 1;
1949 unsigned PWM2POL : 1;
1950 unsigned PWM2OUT : 1;
1951 unsigned PWM2OE : 1;
1952 unsigned PWM2EN : 1;
1953 } __PWM2CONbits_t;
1954
1955 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
1956
1957 #define _PWM2POL 0x10
1958 #define _PWM2OUT 0x20
1959 #define _PWM2OE 0x40
1960 #define _PWM2EN 0x80
1961
1962 //==============================================================================
1963
1964
1965 //==============================================================================
1966 // PWM2CON0 Bits
1967
1968 extern __at(0x0616) __sfr PWM2CON0;
1969
1970 typedef struct
1971 {
1972 unsigned : 1;
1973 unsigned : 1;
1974 unsigned : 1;
1975 unsigned : 1;
1976 unsigned PWM2POL : 1;
1977 unsigned PWM2OUT : 1;
1978 unsigned PWM2OE : 1;
1979 unsigned PWM2EN : 1;
1980 } __PWM2CON0bits_t;
1981
1982 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
1983
1984 #define _PWM2CON0_PWM2POL 0x10
1985 #define _PWM2CON0_PWM2OUT 0x20
1986 #define _PWM2CON0_PWM2OE 0x40
1987 #define _PWM2CON0_PWM2EN 0x80
1988
1989 //==============================================================================
1990
1991
1992 //==============================================================================
1993 // PWM3DCL Bits
1994
1995 extern __at(0x0617) __sfr PWM3DCL;
1996
1997 typedef union
1998 {
1999 struct
2000 {
2001 unsigned : 1;
2002 unsigned : 1;
2003 unsigned : 1;
2004 unsigned : 1;
2005 unsigned : 1;
2006 unsigned : 1;
2007 unsigned PWM3DCL0 : 1;
2008 unsigned PWM3DCL1 : 1;
2009 };
2010
2011 struct
2012 {
2013 unsigned : 6;
2014 unsigned PWM3DCL : 2;
2015 };
2016 } __PWM3DCLbits_t;
2017
2018 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
2019
2020 #define _PWM3DCL0 0x40
2021 #define _PWM3DCL1 0x80
2022
2023 //==============================================================================
2024
2025
2026 //==============================================================================
2027 // PWM3DCH Bits
2028
2029 extern __at(0x0618) __sfr PWM3DCH;
2030
2031 typedef struct
2032 {
2033 unsigned PWM3DCH0 : 1;
2034 unsigned PWM3DCH1 : 1;
2035 unsigned PWM3DCH2 : 1;
2036 unsigned PWM3DCH3 : 1;
2037 unsigned PWM3DCH4 : 1;
2038 unsigned PWM3DCH5 : 1;
2039 unsigned PWM3DCH6 : 1;
2040 unsigned PWM3DCH7 : 1;
2041 } __PWM3DCHbits_t;
2042
2043 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
2044
2045 #define _PWM3DCH0 0x01
2046 #define _PWM3DCH1 0x02
2047 #define _PWM3DCH2 0x04
2048 #define _PWM3DCH3 0x08
2049 #define _PWM3DCH4 0x10
2050 #define _PWM3DCH5 0x20
2051 #define _PWM3DCH6 0x40
2052 #define _PWM3DCH7 0x80
2053
2054 //==============================================================================
2055
2056
2057 //==============================================================================
2058 // PWM3CON Bits
2059
2060 extern __at(0x0619) __sfr PWM3CON;
2061
2062 typedef struct
2063 {
2064 unsigned : 1;
2065 unsigned : 1;
2066 unsigned : 1;
2067 unsigned : 1;
2068 unsigned PWM3POL : 1;
2069 unsigned PWM3OUT : 1;
2070 unsigned PWM3OE : 1;
2071 unsigned PWM3EN : 1;
2072 } __PWM3CONbits_t;
2073
2074 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
2075
2076 #define _PWM3POL 0x10
2077 #define _PWM3OUT 0x20
2078 #define _PWM3OE 0x40
2079 #define _PWM3EN 0x80
2080
2081 //==============================================================================
2082
2083
2084 //==============================================================================
2085 // PWM3CON0 Bits
2086
2087 extern __at(0x0619) __sfr PWM3CON0;
2088
2089 typedef struct
2090 {
2091 unsigned : 1;
2092 unsigned : 1;
2093 unsigned : 1;
2094 unsigned : 1;
2095 unsigned PWM3POL : 1;
2096 unsigned PWM3OUT : 1;
2097 unsigned PWM3OE : 1;
2098 unsigned PWM3EN : 1;
2099 } __PWM3CON0bits_t;
2100
2101 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
2102
2103 #define _PWM3CON0_PWM3POL 0x10
2104 #define _PWM3CON0_PWM3OUT 0x20
2105 #define _PWM3CON0_PWM3OE 0x40
2106 #define _PWM3CON0_PWM3EN 0x80
2107
2108 //==============================================================================
2109
2110
2111 //==============================================================================
2112 // PWM4DCL Bits
2113
2114 extern __at(0x061A) __sfr PWM4DCL;
2115
2116 typedef union
2117 {
2118 struct
2119 {
2120 unsigned : 1;
2121 unsigned : 1;
2122 unsigned : 1;
2123 unsigned : 1;
2124 unsigned : 1;
2125 unsigned : 1;
2126 unsigned PWM4DCL0 : 1;
2127 unsigned PWM4DCL1 : 1;
2128 };
2129
2130 struct
2131 {
2132 unsigned : 6;
2133 unsigned PWM4DCL : 2;
2134 };
2135 } __PWM4DCLbits_t;
2136
2137 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
2138
2139 #define _PWM4DCL0 0x40
2140 #define _PWM4DCL1 0x80
2141
2142 //==============================================================================
2143
2144
2145 //==============================================================================
2146 // PWM4DCH Bits
2147
2148 extern __at(0x061B) __sfr PWM4DCH;
2149
2150 typedef struct
2151 {
2152 unsigned PWM4DCH0 : 1;
2153 unsigned PWM4DCH1 : 1;
2154 unsigned PWM4DCH2 : 1;
2155 unsigned PWM4DCH3 : 1;
2156 unsigned PWM4DCH4 : 1;
2157 unsigned PWM4DCH5 : 1;
2158 unsigned PWM4DCH6 : 1;
2159 unsigned PWM4DCH7 : 1;
2160 } __PWM4DCHbits_t;
2161
2162 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
2163
2164 #define _PWM4DCH0 0x01
2165 #define _PWM4DCH1 0x02
2166 #define _PWM4DCH2 0x04
2167 #define _PWM4DCH3 0x08
2168 #define _PWM4DCH4 0x10
2169 #define _PWM4DCH5 0x20
2170 #define _PWM4DCH6 0x40
2171 #define _PWM4DCH7 0x80
2172
2173 //==============================================================================
2174
2175
2176 //==============================================================================
2177 // PWM4CON Bits
2178
2179 extern __at(0x061C) __sfr PWM4CON;
2180
2181 typedef struct
2182 {
2183 unsigned : 1;
2184 unsigned : 1;
2185 unsigned : 1;
2186 unsigned : 1;
2187 unsigned PWM4POL : 1;
2188 unsigned PWM4OUT : 1;
2189 unsigned PWM4OE : 1;
2190 unsigned PWM4EN : 1;
2191 } __PWM4CONbits_t;
2192
2193 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
2194
2195 #define _PWM4POL 0x10
2196 #define _PWM4OUT 0x20
2197 #define _PWM4OE 0x40
2198 #define _PWM4EN 0x80
2199
2200 //==============================================================================
2201
2202
2203 //==============================================================================
2204 // PWM4CON0 Bits
2205
2206 extern __at(0x061C) __sfr PWM4CON0;
2207
2208 typedef struct
2209 {
2210 unsigned : 1;
2211 unsigned : 1;
2212 unsigned : 1;
2213 unsigned : 1;
2214 unsigned PWM4POL : 1;
2215 unsigned PWM4OUT : 1;
2216 unsigned PWM4OE : 1;
2217 unsigned PWM4EN : 1;
2218 } __PWM4CON0bits_t;
2219
2220 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
2221
2222 #define _PWM4CON0_PWM4POL 0x10
2223 #define _PWM4CON0_PWM4OUT 0x20
2224 #define _PWM4CON0_PWM4OE 0x40
2225 #define _PWM4CON0_PWM4EN 0x80
2226
2227 //==============================================================================
2228
2229
2230 //==============================================================================
2231 // CWG1DBR Bits
2232
2233 extern __at(0x0691) __sfr CWG1DBR;
2234
2235 typedef union
2236 {
2237 struct
2238 {
2239 unsigned CWG1DBR0 : 1;
2240 unsigned CWG1DBR1 : 1;
2241 unsigned CWG1DBR2 : 1;
2242 unsigned CWG1DBR3 : 1;
2243 unsigned CWG1DBR4 : 1;
2244 unsigned CWG1DBR5 : 1;
2245 unsigned : 1;
2246 unsigned : 1;
2247 };
2248
2249 struct
2250 {
2251 unsigned CWG1DBR : 6;
2252 unsigned : 2;
2253 };
2254 } __CWG1DBRbits_t;
2255
2256 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2257
2258 #define _CWG1DBR0 0x01
2259 #define _CWG1DBR1 0x02
2260 #define _CWG1DBR2 0x04
2261 #define _CWG1DBR3 0x08
2262 #define _CWG1DBR4 0x10
2263 #define _CWG1DBR5 0x20
2264
2265 //==============================================================================
2266
2267
2268 //==============================================================================
2269 // CWG1DBF Bits
2270
2271 extern __at(0x0692) __sfr CWG1DBF;
2272
2273 typedef union
2274 {
2275 struct
2276 {
2277 unsigned CWG1DBF0 : 1;
2278 unsigned CWG1DBF1 : 1;
2279 unsigned CWG1DBF2 : 1;
2280 unsigned CWG1DBF3 : 1;
2281 unsigned CWG1DBF4 : 1;
2282 unsigned CWG1DBF5 : 1;
2283 unsigned : 1;
2284 unsigned : 1;
2285 };
2286
2287 struct
2288 {
2289 unsigned CWG1DBF : 6;
2290 unsigned : 2;
2291 };
2292 } __CWG1DBFbits_t;
2293
2294 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2295
2296 #define _CWG1DBF0 0x01
2297 #define _CWG1DBF1 0x02
2298 #define _CWG1DBF2 0x04
2299 #define _CWG1DBF3 0x08
2300 #define _CWG1DBF4 0x10
2301 #define _CWG1DBF5 0x20
2302
2303 //==============================================================================
2304
2305
2306 //==============================================================================
2307 // CWG1CON0 Bits
2308
2309 extern __at(0x0693) __sfr CWG1CON0;
2310
2311 typedef struct
2312 {
2313 unsigned G1CS0 : 1;
2314 unsigned : 1;
2315 unsigned : 1;
2316 unsigned G1POLA : 1;
2317 unsigned G1POLB : 1;
2318 unsigned G1OEA : 1;
2319 unsigned G1OEB : 1;
2320 unsigned G1EN : 1;
2321 } __CWG1CON0bits_t;
2322
2323 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2324
2325 #define _G1CS0 0x01
2326 #define _G1POLA 0x08
2327 #define _G1POLB 0x10
2328 #define _G1OEA 0x20
2329 #define _G1OEB 0x40
2330 #define _G1EN 0x80
2331
2332 //==============================================================================
2333
2334
2335 //==============================================================================
2336 // CWG1CON1 Bits
2337
2338 extern __at(0x0694) __sfr CWG1CON1;
2339
2340 typedef union
2341 {
2342 struct
2343 {
2344 unsigned G1IS0 : 1;
2345 unsigned G1IS1 : 1;
2346 unsigned G1IS2 : 1;
2347 unsigned : 1;
2348 unsigned G1ASDLA0 : 1;
2349 unsigned G1ASDLA1 : 1;
2350 unsigned G1ASDLB0 : 1;
2351 unsigned G1ASDLB1 : 1;
2352 };
2353
2354 struct
2355 {
2356 unsigned G1IS : 3;
2357 unsigned : 5;
2358 };
2359
2360 struct
2361 {
2362 unsigned : 4;
2363 unsigned G1ASDLA : 2;
2364 unsigned : 2;
2365 };
2366
2367 struct
2368 {
2369 unsigned : 6;
2370 unsigned G1ASDLB : 2;
2371 };
2372 } __CWG1CON1bits_t;
2373
2374 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2375
2376 #define _G1IS0 0x01
2377 #define _G1IS1 0x02
2378 #define _G1IS2 0x04
2379 #define _G1ASDLA0 0x10
2380 #define _G1ASDLA1 0x20
2381 #define _G1ASDLB0 0x40
2382 #define _G1ASDLB1 0x80
2383
2384 //==============================================================================
2385
2386
2387 //==============================================================================
2388 // CWG1CON2 Bits
2389
2390 extern __at(0x0695) __sfr CWG1CON2;
2391
2392 typedef struct
2393 {
2394 unsigned G1ASDSCLC2 : 1;
2395 unsigned G1ASDSFLT : 1;
2396 unsigned G1ASDSC1 : 1;
2397 unsigned : 1;
2398 unsigned : 1;
2399 unsigned : 1;
2400 unsigned G1ARSEN : 1;
2401 unsigned G1ASE : 1;
2402 } __CWG1CON2bits_t;
2403
2404 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2405
2406 #define _G1ASDSCLC2 0x01
2407 #define _G1ASDSFLT 0x02
2408 #define _G1ASDSC1 0x04
2409 #define _G1ARSEN 0x40
2410 #define _G1ASE 0x80
2411
2412 //==============================================================================
2413
2414
2415 //==============================================================================
2416 // CLCDATA Bits
2417
2418 extern __at(0x0F0F) __sfr CLCDATA;
2419
2420 typedef struct
2421 {
2422 unsigned MCLC1OUT : 1;
2423 unsigned MCLC2OUT : 1;
2424 unsigned : 1;
2425 unsigned : 1;
2426 unsigned : 1;
2427 unsigned : 1;
2428 unsigned : 1;
2429 unsigned : 1;
2430 } __CLCDATAbits_t;
2431
2432 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
2433
2434 #define _MCLC1OUT 0x01
2435 #define _MCLC2OUT 0x02
2436
2437 //==============================================================================
2438
2439
2440 //==============================================================================
2441 // CLC1CON Bits
2442
2443 extern __at(0x0F10) __sfr CLC1CON;
2444
2445 typedef union
2446 {
2447 struct
2448 {
2449 unsigned LC1MODE0 : 1;
2450 unsigned LC1MODE1 : 1;
2451 unsigned LC1MODE2 : 1;
2452 unsigned LC1INTN : 1;
2453 unsigned LC1INTP : 1;
2454 unsigned LC1OUT : 1;
2455 unsigned LC1OE : 1;
2456 unsigned LC1EN : 1;
2457 };
2458
2459 struct
2460 {
2461 unsigned LCMODE0 : 1;
2462 unsigned LCMODE1 : 1;
2463 unsigned LCMODE2 : 1;
2464 unsigned LCINTN : 1;
2465 unsigned LCINTP : 1;
2466 unsigned LCOUT : 1;
2467 unsigned LCOE : 1;
2468 unsigned LCEN : 1;
2469 };
2470
2471 struct
2472 {
2473 unsigned LC1MODE : 3;
2474 unsigned : 5;
2475 };
2476
2477 struct
2478 {
2479 unsigned LCMODE : 3;
2480 unsigned : 5;
2481 };
2482 } __CLC1CONbits_t;
2483
2484 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
2485
2486 #define _LC1MODE0 0x01
2487 #define _LCMODE0 0x01
2488 #define _LC1MODE1 0x02
2489 #define _LCMODE1 0x02
2490 #define _LC1MODE2 0x04
2491 #define _LCMODE2 0x04
2492 #define _LC1INTN 0x08
2493 #define _LCINTN 0x08
2494 #define _LC1INTP 0x10
2495 #define _LCINTP 0x10
2496 #define _LC1OUT 0x20
2497 #define _LCOUT 0x20
2498 #define _LC1OE 0x40
2499 #define _LCOE 0x40
2500 #define _LC1EN 0x80
2501 #define _LCEN 0x80
2502
2503 //==============================================================================
2504
2505
2506 //==============================================================================
2507 // CLC1POL Bits
2508
2509 extern __at(0x0F11) __sfr CLC1POL;
2510
2511 typedef union
2512 {
2513 struct
2514 {
2515 unsigned LC1G1POL : 1;
2516 unsigned LC1G2POL : 1;
2517 unsigned LC1G3POL : 1;
2518 unsigned LC1G4POL : 1;
2519 unsigned : 1;
2520 unsigned : 1;
2521 unsigned : 1;
2522 unsigned LC1POL : 1;
2523 };
2524
2525 struct
2526 {
2527 unsigned G1POL : 1;
2528 unsigned G2POL : 1;
2529 unsigned G3POL : 1;
2530 unsigned G4POL : 1;
2531 unsigned : 1;
2532 unsigned : 1;
2533 unsigned : 1;
2534 unsigned POL : 1;
2535 };
2536 } __CLC1POLbits_t;
2537
2538 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
2539
2540 #define _LC1G1POL 0x01
2541 #define _G1POL 0x01
2542 #define _LC1G2POL 0x02
2543 #define _G2POL 0x02
2544 #define _LC1G3POL 0x04
2545 #define _G3POL 0x04
2546 #define _LC1G4POL 0x08
2547 #define _G4POL 0x08
2548 #define _LC1POL 0x80
2549 #define _POL 0x80
2550
2551 //==============================================================================
2552
2553
2554 //==============================================================================
2555 // CLC1SEL0 Bits
2556
2557 extern __at(0x0F12) __sfr CLC1SEL0;
2558
2559 typedef union
2560 {
2561 struct
2562 {
2563 unsigned LC1D1S0 : 1;
2564 unsigned LC1D1S1 : 1;
2565 unsigned LC1D1S2 : 1;
2566 unsigned : 1;
2567 unsigned LC1D2S0 : 1;
2568 unsigned LC1D2S1 : 1;
2569 unsigned LC1D2S2 : 1;
2570 unsigned : 1;
2571 };
2572
2573 struct
2574 {
2575 unsigned D1S0 : 1;
2576 unsigned D1S1 : 1;
2577 unsigned D1S2 : 1;
2578 unsigned : 1;
2579 unsigned D2S0 : 1;
2580 unsigned D2S1 : 1;
2581 unsigned D2S2 : 1;
2582 unsigned : 1;
2583 };
2584
2585 struct
2586 {
2587 unsigned LC1D1S : 3;
2588 unsigned : 5;
2589 };
2590
2591 struct
2592 {
2593 unsigned D1S : 3;
2594 unsigned : 5;
2595 };
2596
2597 struct
2598 {
2599 unsigned : 4;
2600 unsigned LC1D2S : 3;
2601 unsigned : 1;
2602 };
2603
2604 struct
2605 {
2606 unsigned : 4;
2607 unsigned D2S : 3;
2608 unsigned : 1;
2609 };
2610 } __CLC1SEL0bits_t;
2611
2612 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
2613
2614 #define _LC1D1S0 0x01
2615 #define _D1S0 0x01
2616 #define _LC1D1S1 0x02
2617 #define _D1S1 0x02
2618 #define _LC1D1S2 0x04
2619 #define _D1S2 0x04
2620 #define _LC1D2S0 0x10
2621 #define _D2S0 0x10
2622 #define _LC1D2S1 0x20
2623 #define _D2S1 0x20
2624 #define _LC1D2S2 0x40
2625 #define _D2S2 0x40
2626
2627 //==============================================================================
2628
2629
2630 //==============================================================================
2631 // CLC1SEL1 Bits
2632
2633 extern __at(0x0F13) __sfr CLC1SEL1;
2634
2635 typedef union
2636 {
2637 struct
2638 {
2639 unsigned LC1D3S0 : 1;
2640 unsigned LC1D3S1 : 1;
2641 unsigned LC1D3S2 : 1;
2642 unsigned : 1;
2643 unsigned LC1D4S0 : 1;
2644 unsigned LC1D4S1 : 1;
2645 unsigned LC1D4S2 : 1;
2646 unsigned : 1;
2647 };
2648
2649 struct
2650 {
2651 unsigned D3S0 : 1;
2652 unsigned D3S1 : 1;
2653 unsigned D3S2 : 1;
2654 unsigned : 1;
2655 unsigned D4S0 : 1;
2656 unsigned D4S1 : 1;
2657 unsigned D4S2 : 1;
2658 unsigned : 1;
2659 };
2660
2661 struct
2662 {
2663 unsigned D3S : 3;
2664 unsigned : 5;
2665 };
2666
2667 struct
2668 {
2669 unsigned LC1D3S : 3;
2670 unsigned : 5;
2671 };
2672
2673 struct
2674 {
2675 unsigned : 4;
2676 unsigned LC1D4S : 3;
2677 unsigned : 1;
2678 };
2679
2680 struct
2681 {
2682 unsigned : 4;
2683 unsigned D4S : 3;
2684 unsigned : 1;
2685 };
2686 } __CLC1SEL1bits_t;
2687
2688 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
2689
2690 #define _LC1D3S0 0x01
2691 #define _D3S0 0x01
2692 #define _LC1D3S1 0x02
2693 #define _D3S1 0x02
2694 #define _LC1D3S2 0x04
2695 #define _D3S2 0x04
2696 #define _LC1D4S0 0x10
2697 #define _D4S0 0x10
2698 #define _LC1D4S1 0x20
2699 #define _D4S1 0x20
2700 #define _LC1D4S2 0x40
2701 #define _D4S2 0x40
2702
2703 //==============================================================================
2704
2705
2706 //==============================================================================
2707 // CLC1GLS0 Bits
2708
2709 extern __at(0x0F14) __sfr CLC1GLS0;
2710
2711 typedef union
2712 {
2713 struct
2714 {
2715 unsigned LC1G1D1N : 1;
2716 unsigned LC1G1D1T : 1;
2717 unsigned LC1G1D2N : 1;
2718 unsigned LC1G1D2T : 1;
2719 unsigned LC1G1D3N : 1;
2720 unsigned LC1G1D3T : 1;
2721 unsigned LC1G1D4N : 1;
2722 unsigned LC1G1D4T : 1;
2723 };
2724
2725 struct
2726 {
2727 unsigned D1N : 1;
2728 unsigned D1T : 1;
2729 unsigned D2N : 1;
2730 unsigned D2T : 1;
2731 unsigned D3N : 1;
2732 unsigned D3T : 1;
2733 unsigned D4N : 1;
2734 unsigned D4T : 1;
2735 };
2736 } __CLC1GLS0bits_t;
2737
2738 extern __at(0x0F14) volatile __CLC1GLS0bits_t CLC1GLS0bits;
2739
2740 #define _LC1G1D1N 0x01
2741 #define _D1N 0x01
2742 #define _LC1G1D1T 0x02
2743 #define _D1T 0x02
2744 #define _LC1G1D2N 0x04
2745 #define _D2N 0x04
2746 #define _LC1G1D2T 0x08
2747 #define _D2T 0x08
2748 #define _LC1G1D3N 0x10
2749 #define _D3N 0x10
2750 #define _LC1G1D3T 0x20
2751 #define _D3T 0x20
2752 #define _LC1G1D4N 0x40
2753 #define _D4N 0x40
2754 #define _LC1G1D4T 0x80
2755 #define _D4T 0x80
2756
2757 //==============================================================================
2758
2759
2760 //==============================================================================
2761 // CLC1GLS1 Bits
2762
2763 extern __at(0x0F15) __sfr CLC1GLS1;
2764
2765 typedef union
2766 {
2767 struct
2768 {
2769 unsigned LC1G2D1N : 1;
2770 unsigned LC1G2D1T : 1;
2771 unsigned LC1G2D2N : 1;
2772 unsigned LC1G2D2T : 1;
2773 unsigned LC1G2D3N : 1;
2774 unsigned LC1G2D3T : 1;
2775 unsigned LC1G2D4N : 1;
2776 unsigned LC1G2D4T : 1;
2777 };
2778
2779 struct
2780 {
2781 unsigned D1N : 1;
2782 unsigned D1T : 1;
2783 unsigned D2N : 1;
2784 unsigned D2T : 1;
2785 unsigned D3N : 1;
2786 unsigned D3T : 1;
2787 unsigned D4N : 1;
2788 unsigned D4T : 1;
2789 };
2790 } __CLC1GLS1bits_t;
2791
2792 extern __at(0x0F15) volatile __CLC1GLS1bits_t CLC1GLS1bits;
2793
2794 #define _CLC1GLS1_LC1G2D1N 0x01
2795 #define _CLC1GLS1_D1N 0x01
2796 #define _CLC1GLS1_LC1G2D1T 0x02
2797 #define _CLC1GLS1_D1T 0x02
2798 #define _CLC1GLS1_LC1G2D2N 0x04
2799 #define _CLC1GLS1_D2N 0x04
2800 #define _CLC1GLS1_LC1G2D2T 0x08
2801 #define _CLC1GLS1_D2T 0x08
2802 #define _CLC1GLS1_LC1G2D3N 0x10
2803 #define _CLC1GLS1_D3N 0x10
2804 #define _CLC1GLS1_LC1G2D3T 0x20
2805 #define _CLC1GLS1_D3T 0x20
2806 #define _CLC1GLS1_LC1G2D4N 0x40
2807 #define _CLC1GLS1_D4N 0x40
2808 #define _CLC1GLS1_LC1G2D4T 0x80
2809 #define _CLC1GLS1_D4T 0x80
2810
2811 //==============================================================================
2812
2813
2814 //==============================================================================
2815 // CLC1GLS2 Bits
2816
2817 extern __at(0x0F16) __sfr CLC1GLS2;
2818
2819 typedef union
2820 {
2821 struct
2822 {
2823 unsigned LC1G3D1N : 1;
2824 unsigned LC1G3D1T : 1;
2825 unsigned LC1G3D2N : 1;
2826 unsigned LC1G3D2T : 1;
2827 unsigned LC1G3D3N : 1;
2828 unsigned LC1G3D3T : 1;
2829 unsigned LC1G3D4N : 1;
2830 unsigned LC1G3D4T : 1;
2831 };
2832
2833 struct
2834 {
2835 unsigned D1N : 1;
2836 unsigned D1T : 1;
2837 unsigned D2N : 1;
2838 unsigned D2T : 1;
2839 unsigned D3N : 1;
2840 unsigned D3T : 1;
2841 unsigned D4N : 1;
2842 unsigned D4T : 1;
2843 };
2844 } __CLC1GLS2bits_t;
2845
2846 extern __at(0x0F16) volatile __CLC1GLS2bits_t CLC1GLS2bits;
2847
2848 #define _CLC1GLS2_LC1G3D1N 0x01
2849 #define _CLC1GLS2_D1N 0x01
2850 #define _CLC1GLS2_LC1G3D1T 0x02
2851 #define _CLC1GLS2_D1T 0x02
2852 #define _CLC1GLS2_LC1G3D2N 0x04
2853 #define _CLC1GLS2_D2N 0x04
2854 #define _CLC1GLS2_LC1G3D2T 0x08
2855 #define _CLC1GLS2_D2T 0x08
2856 #define _CLC1GLS2_LC1G3D3N 0x10
2857 #define _CLC1GLS2_D3N 0x10
2858 #define _CLC1GLS2_LC1G3D3T 0x20
2859 #define _CLC1GLS2_D3T 0x20
2860 #define _CLC1GLS2_LC1G3D4N 0x40
2861 #define _CLC1GLS2_D4N 0x40
2862 #define _CLC1GLS2_LC1G3D4T 0x80
2863 #define _CLC1GLS2_D4T 0x80
2864
2865 //==============================================================================
2866
2867
2868 //==============================================================================
2869 // CLC1GLS3 Bits
2870
2871 extern __at(0x0F17) __sfr CLC1GLS3;
2872
2873 typedef union
2874 {
2875 struct
2876 {
2877 unsigned LC1G4D1N : 1;
2878 unsigned LC1G4D1T : 1;
2879 unsigned LC1G4D2N : 1;
2880 unsigned LC1G4D2T : 1;
2881 unsigned LC1G4D3N : 1;
2882 unsigned LC1G4D3T : 1;
2883 unsigned LC1G4D4N : 1;
2884 unsigned LC1G4D4T : 1;
2885 };
2886
2887 struct
2888 {
2889 unsigned G4D1N : 1;
2890 unsigned G4D1T : 1;
2891 unsigned G4D2N : 1;
2892 unsigned G4D2T : 1;
2893 unsigned G4D3N : 1;
2894 unsigned G4D3T : 1;
2895 unsigned G4D4N : 1;
2896 unsigned G4D4T : 1;
2897 };
2898 } __CLC1GLS3bits_t;
2899
2900 extern __at(0x0F17) volatile __CLC1GLS3bits_t CLC1GLS3bits;
2901
2902 #define _LC1G4D1N 0x01
2903 #define _G4D1N 0x01
2904 #define _LC1G4D1T 0x02
2905 #define _G4D1T 0x02
2906 #define _LC1G4D2N 0x04
2907 #define _G4D2N 0x04
2908 #define _LC1G4D2T 0x08
2909 #define _G4D2T 0x08
2910 #define _LC1G4D3N 0x10
2911 #define _G4D3N 0x10
2912 #define _LC1G4D3T 0x20
2913 #define _G4D3T 0x20
2914 #define _LC1G4D4N 0x40
2915 #define _G4D4N 0x40
2916 #define _LC1G4D4T 0x80
2917 #define _G4D4T 0x80
2918
2919 //==============================================================================
2920
2921
2922 //==============================================================================
2923 // CLC2CON Bits
2924
2925 extern __at(0x0F18) __sfr CLC2CON;
2926
2927 typedef union
2928 {
2929 struct
2930 {
2931 unsigned LC2MODE0 : 1;
2932 unsigned LC2MODE1 : 1;
2933 unsigned LC2MODE2 : 1;
2934 unsigned LC2INTN : 1;
2935 unsigned LC2INTP : 1;
2936 unsigned LC2OUT : 1;
2937 unsigned LC2OE : 1;
2938 unsigned LC2EN : 1;
2939 };
2940
2941 struct
2942 {
2943 unsigned LCMODE0 : 1;
2944 unsigned LCMODE1 : 1;
2945 unsigned LCMODE2 : 1;
2946 unsigned LCINTN : 1;
2947 unsigned LCINTP : 1;
2948 unsigned LCOUT : 1;
2949 unsigned LCOE : 1;
2950 unsigned LCEN : 1;
2951 };
2952
2953 struct
2954 {
2955 unsigned LCMODE : 3;
2956 unsigned : 5;
2957 };
2958
2959 struct
2960 {
2961 unsigned LC2MODE : 3;
2962 unsigned : 5;
2963 };
2964 } __CLC2CONbits_t;
2965
2966 extern __at(0x0F18) volatile __CLC2CONbits_t CLC2CONbits;
2967
2968 #define _CLC2CON_LC2MODE0 0x01
2969 #define _CLC2CON_LCMODE0 0x01
2970 #define _CLC2CON_LC2MODE1 0x02
2971 #define _CLC2CON_LCMODE1 0x02
2972 #define _CLC2CON_LC2MODE2 0x04
2973 #define _CLC2CON_LCMODE2 0x04
2974 #define _CLC2CON_LC2INTN 0x08
2975 #define _CLC2CON_LCINTN 0x08
2976 #define _CLC2CON_LC2INTP 0x10
2977 #define _CLC2CON_LCINTP 0x10
2978 #define _CLC2CON_LC2OUT 0x20
2979 #define _CLC2CON_LCOUT 0x20
2980 #define _CLC2CON_LC2OE 0x40
2981 #define _CLC2CON_LCOE 0x40
2982 #define _CLC2CON_LC2EN 0x80
2983 #define _CLC2CON_LCEN 0x80
2984
2985 //==============================================================================
2986
2987
2988 //==============================================================================
2989 // CLC2POL Bits
2990
2991 extern __at(0x0F19) __sfr CLC2POL;
2992
2993 typedef union
2994 {
2995 struct
2996 {
2997 unsigned LC2G1POL : 1;
2998 unsigned LC2G2POL : 1;
2999 unsigned LC2G3POL : 1;
3000 unsigned LC2G4POL : 1;
3001 unsigned : 1;
3002 unsigned : 1;
3003 unsigned : 1;
3004 unsigned LC2POL : 1;
3005 };
3006
3007 struct
3008 {
3009 unsigned G1POL : 1;
3010 unsigned G2POL : 1;
3011 unsigned G3POL : 1;
3012 unsigned G4POL : 1;
3013 unsigned : 1;
3014 unsigned : 1;
3015 unsigned : 1;
3016 unsigned POL : 1;
3017 };
3018 } __CLC2POLbits_t;
3019
3020 extern __at(0x0F19) volatile __CLC2POLbits_t CLC2POLbits;
3021
3022 #define _CLC2POL_LC2G1POL 0x01
3023 #define _CLC2POL_G1POL 0x01
3024 #define _CLC2POL_LC2G2POL 0x02
3025 #define _CLC2POL_G2POL 0x02
3026 #define _CLC2POL_LC2G3POL 0x04
3027 #define _CLC2POL_G3POL 0x04
3028 #define _CLC2POL_LC2G4POL 0x08
3029 #define _CLC2POL_G4POL 0x08
3030 #define _CLC2POL_LC2POL 0x80
3031 #define _CLC2POL_POL 0x80
3032
3033 //==============================================================================
3034
3035
3036 //==============================================================================
3037 // CLC2SEL0 Bits
3038
3039 extern __at(0x0F1A) __sfr CLC2SEL0;
3040
3041 typedef union
3042 {
3043 struct
3044 {
3045 unsigned LC2D1S0 : 1;
3046 unsigned LC2D1S1 : 1;
3047 unsigned LC2D1S2 : 1;
3048 unsigned : 1;
3049 unsigned LC2D2S0 : 1;
3050 unsigned LC2D2S1 : 1;
3051 unsigned LC2D2S2 : 1;
3052 unsigned : 1;
3053 };
3054
3055 struct
3056 {
3057 unsigned D1S0 : 1;
3058 unsigned D1S1 : 1;
3059 unsigned D1S2 : 1;
3060 unsigned : 1;
3061 unsigned D2S0 : 1;
3062 unsigned D2S1 : 1;
3063 unsigned D2S2 : 1;
3064 unsigned : 1;
3065 };
3066
3067 struct
3068 {
3069 unsigned LC2D1S : 3;
3070 unsigned : 5;
3071 };
3072
3073 struct
3074 {
3075 unsigned D1S : 3;
3076 unsigned : 5;
3077 };
3078
3079 struct
3080 {
3081 unsigned : 4;
3082 unsigned LC2D2S : 3;
3083 unsigned : 1;
3084 };
3085
3086 struct
3087 {
3088 unsigned : 4;
3089 unsigned D2S : 3;
3090 unsigned : 1;
3091 };
3092 } __CLC2SEL0bits_t;
3093
3094 extern __at(0x0F1A) volatile __CLC2SEL0bits_t CLC2SEL0bits;
3095
3096 #define _CLC2SEL0_LC2D1S0 0x01
3097 #define _CLC2SEL0_D1S0 0x01
3098 #define _CLC2SEL0_LC2D1S1 0x02
3099 #define _CLC2SEL0_D1S1 0x02
3100 #define _CLC2SEL0_LC2D1S2 0x04
3101 #define _CLC2SEL0_D1S2 0x04
3102 #define _CLC2SEL0_LC2D2S0 0x10
3103 #define _CLC2SEL0_D2S0 0x10
3104 #define _CLC2SEL0_LC2D2S1 0x20
3105 #define _CLC2SEL0_D2S1 0x20
3106 #define _CLC2SEL0_LC2D2S2 0x40
3107 #define _CLC2SEL0_D2S2 0x40
3108
3109 //==============================================================================
3110
3111
3112 //==============================================================================
3113 // CLC2SEL1 Bits
3114
3115 extern __at(0x0F1B) __sfr CLC2SEL1;
3116
3117 typedef union
3118 {
3119 struct
3120 {
3121 unsigned LC2D3S0 : 1;
3122 unsigned LC2D3S1 : 1;
3123 unsigned LC2D3S2 : 1;
3124 unsigned : 1;
3125 unsigned LC2D4S0 : 1;
3126 unsigned LC2D4S1 : 1;
3127 unsigned LC2D4S2 : 1;
3128 unsigned : 1;
3129 };
3130
3131 struct
3132 {
3133 unsigned D3S0 : 1;
3134 unsigned D3S1 : 1;
3135 unsigned D3S2 : 1;
3136 unsigned : 1;
3137 unsigned D4S0 : 1;
3138 unsigned D4S1 : 1;
3139 unsigned D4S2 : 1;
3140 unsigned : 1;
3141 };
3142
3143 struct
3144 {
3145 unsigned D3S : 3;
3146 unsigned : 5;
3147 };
3148
3149 struct
3150 {
3151 unsigned LC2D3S : 3;
3152 unsigned : 5;
3153 };
3154
3155 struct
3156 {
3157 unsigned : 4;
3158 unsigned LC2D4S : 3;
3159 unsigned : 1;
3160 };
3161
3162 struct
3163 {
3164 unsigned : 4;
3165 unsigned D4S : 3;
3166 unsigned : 1;
3167 };
3168 } __CLC2SEL1bits_t;
3169
3170 extern __at(0x0F1B) volatile __CLC2SEL1bits_t CLC2SEL1bits;
3171
3172 #define _CLC2SEL1_LC2D3S0 0x01
3173 #define _CLC2SEL1_D3S0 0x01
3174 #define _CLC2SEL1_LC2D3S1 0x02
3175 #define _CLC2SEL1_D3S1 0x02
3176 #define _CLC2SEL1_LC2D3S2 0x04
3177 #define _CLC2SEL1_D3S2 0x04
3178 #define _CLC2SEL1_LC2D4S0 0x10
3179 #define _CLC2SEL1_D4S0 0x10
3180 #define _CLC2SEL1_LC2D4S1 0x20
3181 #define _CLC2SEL1_D4S1 0x20
3182 #define _CLC2SEL1_LC2D4S2 0x40
3183 #define _CLC2SEL1_D4S2 0x40
3184
3185 //==============================================================================
3186
3187
3188 //==============================================================================
3189 // CLC2GLS0 Bits
3190
3191 extern __at(0x0F1C) __sfr CLC2GLS0;
3192
3193 typedef union
3194 {
3195 struct
3196 {
3197 unsigned LC2G1D1N : 1;
3198 unsigned LC2G1D1T : 1;
3199 unsigned LC2G1D2N : 1;
3200 unsigned LC2G1D2T : 1;
3201 unsigned LC2G1D3N : 1;
3202 unsigned LC2G1D3T : 1;
3203 unsigned LC2G1D4N : 1;
3204 unsigned LC2G1D4T : 1;
3205 };
3206
3207 struct
3208 {
3209 unsigned D1N : 1;
3210 unsigned D1T : 1;
3211 unsigned D2N : 1;
3212 unsigned D2T : 1;
3213 unsigned D3N : 1;
3214 unsigned D3T : 1;
3215 unsigned D4N : 1;
3216 unsigned D4T : 1;
3217 };
3218 } __CLC2GLS0bits_t;
3219
3220 extern __at(0x0F1C) volatile __CLC2GLS0bits_t CLC2GLS0bits;
3221
3222 #define _CLC2GLS0_LC2G1D1N 0x01
3223 #define _CLC2GLS0_D1N 0x01
3224 #define _CLC2GLS0_LC2G1D1T 0x02
3225 #define _CLC2GLS0_D1T 0x02
3226 #define _CLC2GLS0_LC2G1D2N 0x04
3227 #define _CLC2GLS0_D2N 0x04
3228 #define _CLC2GLS0_LC2G1D2T 0x08
3229 #define _CLC2GLS0_D2T 0x08
3230 #define _CLC2GLS0_LC2G1D3N 0x10
3231 #define _CLC2GLS0_D3N 0x10
3232 #define _CLC2GLS0_LC2G1D3T 0x20
3233 #define _CLC2GLS0_D3T 0x20
3234 #define _CLC2GLS0_LC2G1D4N 0x40
3235 #define _CLC2GLS0_D4N 0x40
3236 #define _CLC2GLS0_LC2G1D4T 0x80
3237 #define _CLC2GLS0_D4T 0x80
3238
3239 //==============================================================================
3240
3241
3242 //==============================================================================
3243 // CLC2GLS1 Bits
3244
3245 extern __at(0x0F1D) __sfr CLC2GLS1;
3246
3247 typedef union
3248 {
3249 struct
3250 {
3251 unsigned LC2G2D1N : 1;
3252 unsigned LC2G2D1T : 1;
3253 unsigned LC2G2D2N : 1;
3254 unsigned LC2G2D2T : 1;
3255 unsigned LC2G2D3N : 1;
3256 unsigned LC2G2D3T : 1;
3257 unsigned LC2G2D4N : 1;
3258 unsigned LC2G2D4T : 1;
3259 };
3260
3261 struct
3262 {
3263 unsigned D1N : 1;
3264 unsigned D1T : 1;
3265 unsigned D2N : 1;
3266 unsigned D2T : 1;
3267 unsigned D3N : 1;
3268 unsigned D3T : 1;
3269 unsigned D4N : 1;
3270 unsigned D4T : 1;
3271 };
3272 } __CLC2GLS1bits_t;
3273
3274 extern __at(0x0F1D) volatile __CLC2GLS1bits_t CLC2GLS1bits;
3275
3276 #define _CLC2GLS1_LC2G2D1N 0x01
3277 #define _CLC2GLS1_D1N 0x01
3278 #define _CLC2GLS1_LC2G2D1T 0x02
3279 #define _CLC2GLS1_D1T 0x02
3280 #define _CLC2GLS1_LC2G2D2N 0x04
3281 #define _CLC2GLS1_D2N 0x04
3282 #define _CLC2GLS1_LC2G2D2T 0x08
3283 #define _CLC2GLS1_D2T 0x08
3284 #define _CLC2GLS1_LC2G2D3N 0x10
3285 #define _CLC2GLS1_D3N 0x10
3286 #define _CLC2GLS1_LC2G2D3T 0x20
3287 #define _CLC2GLS1_D3T 0x20
3288 #define _CLC2GLS1_LC2G2D4N 0x40
3289 #define _CLC2GLS1_D4N 0x40
3290 #define _CLC2GLS1_LC2G2D4T 0x80
3291 #define _CLC2GLS1_D4T 0x80
3292
3293 //==============================================================================
3294
3295
3296 //==============================================================================
3297 // CLC2GLS2 Bits
3298
3299 extern __at(0x0F1E) __sfr CLC2GLS2;
3300
3301 typedef union
3302 {
3303 struct
3304 {
3305 unsigned LC2G3D1N : 1;
3306 unsigned LC2G3D1T : 1;
3307 unsigned LC2G3D2N : 1;
3308 unsigned LC2G3D2T : 1;
3309 unsigned LC2G3D3N : 1;
3310 unsigned LC2G3D3T : 1;
3311 unsigned LC2G3D4N : 1;
3312 unsigned LC2G3D4T : 1;
3313 };
3314
3315 struct
3316 {
3317 unsigned D1N : 1;
3318 unsigned D1T : 1;
3319 unsigned D2N : 1;
3320 unsigned D2T : 1;
3321 unsigned D3N : 1;
3322 unsigned D3T : 1;
3323 unsigned D4N : 1;
3324 unsigned D4T : 1;
3325 };
3326 } __CLC2GLS2bits_t;
3327
3328 extern __at(0x0F1E) volatile __CLC2GLS2bits_t CLC2GLS2bits;
3329
3330 #define _CLC2GLS2_LC2G3D1N 0x01
3331 #define _CLC2GLS2_D1N 0x01
3332 #define _CLC2GLS2_LC2G3D1T 0x02
3333 #define _CLC2GLS2_D1T 0x02
3334 #define _CLC2GLS2_LC2G3D2N 0x04
3335 #define _CLC2GLS2_D2N 0x04
3336 #define _CLC2GLS2_LC2G3D2T 0x08
3337 #define _CLC2GLS2_D2T 0x08
3338 #define _CLC2GLS2_LC2G3D3N 0x10
3339 #define _CLC2GLS2_D3N 0x10
3340 #define _CLC2GLS2_LC2G3D3T 0x20
3341 #define _CLC2GLS2_D3T 0x20
3342 #define _CLC2GLS2_LC2G3D4N 0x40
3343 #define _CLC2GLS2_D4N 0x40
3344 #define _CLC2GLS2_LC2G3D4T 0x80
3345 #define _CLC2GLS2_D4T 0x80
3346
3347 //==============================================================================
3348
3349
3350 //==============================================================================
3351 // CLC2GLS3 Bits
3352
3353 extern __at(0x0F1F) __sfr CLC2GLS3;
3354
3355 typedef union
3356 {
3357 struct
3358 {
3359 unsigned LC2G4D1N : 1;
3360 unsigned LC2G4D1T : 1;
3361 unsigned LC2G4D2N : 1;
3362 unsigned LC2G4D2T : 1;
3363 unsigned LC2G4D3N : 1;
3364 unsigned LC2G4D3T : 1;
3365 unsigned LC2G4D4N : 1;
3366 unsigned LC2G4D4T : 1;
3367 };
3368
3369 struct
3370 {
3371 unsigned G4D1N : 1;
3372 unsigned G4D1T : 1;
3373 unsigned G4D2N : 1;
3374 unsigned G4D2T : 1;
3375 unsigned G4D3N : 1;
3376 unsigned G4D3T : 1;
3377 unsigned G4D4N : 1;
3378 unsigned G4D4T : 1;
3379 };
3380 } __CLC2GLS3bits_t;
3381
3382 extern __at(0x0F1F) volatile __CLC2GLS3bits_t CLC2GLS3bits;
3383
3384 #define _CLC2GLS3_LC2G4D1N 0x01
3385 #define _CLC2GLS3_G4D1N 0x01
3386 #define _CLC2GLS3_LC2G4D1T 0x02
3387 #define _CLC2GLS3_G4D1T 0x02
3388 #define _CLC2GLS3_LC2G4D2N 0x04
3389 #define _CLC2GLS3_G4D2N 0x04
3390 #define _CLC2GLS3_LC2G4D2T 0x08
3391 #define _CLC2GLS3_G4D2T 0x08
3392 #define _CLC2GLS3_LC2G4D3N 0x10
3393 #define _CLC2GLS3_G4D3N 0x10
3394 #define _CLC2GLS3_LC2G4D3T 0x20
3395 #define _CLC2GLS3_G4D3T 0x20
3396 #define _CLC2GLS3_LC2G4D4N 0x40
3397 #define _CLC2GLS3_G4D4N 0x40
3398 #define _CLC2GLS3_LC2G4D4T 0x80
3399 #define _CLC2GLS3_G4D4T 0x80
3400
3401 //==============================================================================
3402
3403 extern __at(0x0FE3) __sfr BSR_ICDSHAD;
3404
3405 //==============================================================================
3406 // STATUS_SHAD Bits
3407
3408 extern __at(0x0FE4) __sfr STATUS_SHAD;
3409
3410 typedef struct
3411 {
3412 unsigned C_SHAD : 1;
3413 unsigned DC_SHAD : 1;
3414 unsigned Z_SHAD : 1;
3415 unsigned : 1;
3416 unsigned : 1;
3417 unsigned : 1;
3418 unsigned : 1;
3419 unsigned : 1;
3420 } __STATUS_SHADbits_t;
3421
3422 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
3423
3424 #define _C_SHAD 0x01
3425 #define _DC_SHAD 0x02
3426 #define _Z_SHAD 0x04
3427
3428 //==============================================================================
3429
3430 extern __at(0x0FE5) __sfr WREG_SHAD;
3431 extern __at(0x0FE6) __sfr BSR_SHAD;
3432 extern __at(0x0FE7) __sfr PCLATH_SHAD;
3433 extern __at(0x0FE8) __sfr FSR0L_SHAD;
3434 extern __at(0x0FE9) __sfr FSR0H_SHAD;
3435 extern __at(0x0FEA) __sfr FSR1L_SHAD;
3436 extern __at(0x0FEB) __sfr FSR1H_SHAD;
3437 extern __at(0x0FED) __sfr STKPTR;
3438 extern __at(0x0FEE) __sfr TOSL;
3439 extern __at(0x0FEF) __sfr TOSH;
3440
3441 //==============================================================================
3442 //
3443 // Configuration Bits
3444 //
3445 //==============================================================================
3446
3447 #define _CONFIG1 0x8007
3448 #define _CONFIG2 0x8008
3449
3450 //----------------------------- CONFIG1 Options -------------------------------
3451
3452 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
3453 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin.
3454 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin.
3455 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin.
3456 #define _WDTE_OFF 0x3FE7 // WDT disabled.
3457 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
3458 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
3459 #define _WDTE_ON 0x3FFF // WDT enabled.
3460 #define _PWRTE_ON 0x3FDF // PWRT enabled.
3461 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
3462 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
3463 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
3464 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
3465 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
3466 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
3467 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
3468 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
3469 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
3470 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
3471 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
3472
3473 //----------------------------- CONFIG2 Options -------------------------------
3474
3475 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
3476 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
3477 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
3478 #define _WRT_OFF 0x3FFF // Write protection off.
3479 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
3480 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
3481 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
3482 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
3483 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
3484 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
3485 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
3486 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
3487
3488 //==============================================================================
3489
3490 #define _DEVID1 0x8006
3491
3492 #define _IDLOC0 0x8000
3493 #define _IDLOC1 0x8001
3494 #define _IDLOC2 0x8002
3495 #define _IDLOC3 0x8003
3496
3497 //==============================================================================
3498
3499 #ifndef NO_BIT_DEFINES
3500
3501 #define ADON ADCON0bits.ADON // bit 0
3502 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
3503 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
3504 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
3505 #define CHS0 ADCON0bits.CHS0 // bit 2
3506 #define CHS1 ADCON0bits.CHS1 // bit 3
3507 #define CHS2 ADCON0bits.CHS2 // bit 4
3508 #define CHS3 ADCON0bits.CHS3 // bit 5
3509 #define CHS4 ADCON0bits.CHS4 // bit 6
3510
3511 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
3512 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
3513 #define ADFM ADCON1bits.ADFM // bit 7
3514
3515 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
3516 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
3517 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
3518 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
3519
3520 #define ANSA0 ANSELAbits.ANSA0 // bit 0
3521 #define ANSA1 ANSELAbits.ANSA1 // bit 1
3522 #define ANSA2 ANSELAbits.ANSA2 // bit 2
3523 #define ANSA4 ANSELAbits.ANSA4 // bit 4
3524
3525 #define NCO1SEL APFCONbits.NCO1SEL // bit 0
3526 #define CLC1SEL APFCONbits.CLC1SEL // bit 1
3527 #define T1GSEL APFCONbits.T1GSEL // bit 3
3528 #define CWG1ASEL APFCONbits.CWG1ASEL // bit 6
3529 #define CWG1BSEL APFCONbits.CWG1BSEL // bit 7
3530
3531 #define BORRDY BORCONbits.BORRDY // bit 0
3532 #define BORFS BORCONbits.BORFS // bit 6
3533 #define SBOREN BORCONbits.SBOREN // bit 7
3534
3535 #define BSR0 BSRbits.BSR0 // bit 0
3536 #define BSR1 BSRbits.BSR1 // bit 1
3537 #define BSR2 BSRbits.BSR2 // bit 2
3538 #define BSR3 BSRbits.BSR3 // bit 3
3539 #define BSR4 BSRbits.BSR4 // bit 4
3540
3541 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
3542 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits
3543 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
3544 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits
3545 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
3546 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits
3547 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
3548 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits
3549 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
3550 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits
3551 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
3552 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits
3553 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits
3554 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits
3555 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
3556 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits
3557
3558 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
3559 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
3560 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
3561 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
3562 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
3563 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
3564 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
3565 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
3566 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
3567 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
3568 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
3569 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
3570 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
3571 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
3572 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
3573 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
3574
3575 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
3576 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
3577 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
3578 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
3579 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
3580 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
3581 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
3582 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
3583 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
3584 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
3585 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
3586 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
3587 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
3588 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
3589 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
3590 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
3591
3592 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
3593 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
3594 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
3595 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
3596 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
3597 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
3598 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
3599 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
3600 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
3601 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
3602
3603 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
3604 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
3605 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
3606 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
3607 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
3608 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
3609 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits
3610 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits
3611 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits
3612 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits
3613 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits
3614 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits
3615
3616 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits
3617 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits
3618 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits
3619 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits
3620 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits
3621 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits
3622 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits
3623 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits
3624 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits
3625 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits
3626 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits
3627 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits
3628
3629 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
3630 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
3631
3632 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
3633 #define C1HYS CM1CON0bits.C1HYS // bit 1
3634 #define C1SP CM1CON0bits.C1SP // bit 2
3635 #define C1POL CM1CON0bits.C1POL // bit 4
3636 #define C1OE CM1CON0bits.C1OE // bit 5
3637 #define C1OUT CM1CON0bits.C1OUT // bit 6
3638 #define C1ON CM1CON0bits.C1ON // bit 7
3639
3640 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
3641 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
3642 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
3643 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
3644 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
3645 #define C1INTN CM1CON1bits.C1INTN // bit 6
3646 #define C1INTP CM1CON1bits.C1INTP // bit 7
3647
3648 #define MC1OUT CMOUTbits.MC1OUT // bit 0
3649
3650 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
3651 #define G1POLA CWG1CON0bits.G1POLA // bit 3
3652 #define G1POLB CWG1CON0bits.G1POLB // bit 4
3653 #define G1OEA CWG1CON0bits.G1OEA // bit 5
3654 #define G1OEB CWG1CON0bits.G1OEB // bit 6
3655 #define G1EN CWG1CON0bits.G1EN // bit 7
3656
3657 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
3658 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
3659 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
3660 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
3661 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
3662 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
3663 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
3664
3665 #define G1ASDSCLC2 CWG1CON2bits.G1ASDSCLC2 // bit 0
3666 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
3667 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
3668 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
3669 #define G1ASE CWG1CON2bits.G1ASE // bit 7
3670
3671 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
3672 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
3673 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
3674 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
3675 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
3676 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
3677
3678 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
3679 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
3680 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
3681 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
3682 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
3683 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
3684
3685 #define DACPSS DACCON0bits.DACPSS // bit 2
3686 #define DACOE2 DACCON0bits.DACOE2 // bit 4
3687 #define DACOE1 DACCON0bits.DACOE1 // bit 5
3688 #define DACEN DACCON0bits.DACEN // bit 7
3689
3690 #define DACR0 DACCON1bits.DACR0 // bit 0
3691 #define DACR1 DACCON1bits.DACR1 // bit 1
3692 #define DACR2 DACCON1bits.DACR2 // bit 2
3693 #define DACR3 DACCON1bits.DACR3 // bit 3
3694 #define DACR4 DACCON1bits.DACR4 // bit 4
3695
3696 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
3697 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
3698 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
3699 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
3700 #define TSRNG FVRCONbits.TSRNG // bit 4
3701 #define TSEN FVRCONbits.TSEN // bit 5
3702 #define FVRRDY FVRCONbits.FVRRDY // bit 6
3703 #define FVREN FVRCONbits.FVREN // bit 7
3704
3705 #define IOCIF INTCONbits.IOCIF // bit 0
3706 #define INTF INTCONbits.INTF // bit 1
3707 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
3708 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
3709 #define IOCIE INTCONbits.IOCIE // bit 3
3710 #define INTE INTCONbits.INTE // bit 4
3711 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
3712 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
3713 #define PEIE INTCONbits.PEIE // bit 6
3714 #define GIE INTCONbits.GIE // bit 7
3715
3716 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
3717 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
3718 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
3719 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
3720 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
3721 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
3722
3723 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
3724 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
3725 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
3726 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
3727 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
3728 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
3729
3730 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
3731 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
3732 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
3733 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
3734 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
3735 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
3736
3737 #define LATA0 LATAbits.LATA0 // bit 0
3738 #define LATA1 LATAbits.LATA1 // bit 1
3739 #define LATA2 LATAbits.LATA2 // bit 2
3740 #define LATA4 LATAbits.LATA4 // bit 4
3741 #define LATA5 LATAbits.LATA5 // bit 5
3742
3743 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
3744 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
3745 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
3746 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
3747 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
3748 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
3749 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
3750 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
3751
3752 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
3753 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
3754 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
3755 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
3756 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
3757 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
3758 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
3759 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
3760
3761 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
3762 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
3763 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
3764 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
3765
3766 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
3767 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
3768 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
3769 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
3770 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
3771
3772 #define N1PFM NCO1CONbits.N1PFM // bit 0
3773 #define N1POL NCO1CONbits.N1POL // bit 4
3774 #define N1OUT NCO1CONbits.N1OUT // bit 5
3775 #define N1OE NCO1CONbits.N1OE // bit 6
3776 #define N1EN NCO1CONbits.N1EN // bit 7
3777
3778 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
3779 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
3780 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
3781 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
3782 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
3783 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
3784 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
3785 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
3786
3787 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
3788 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
3789 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
3790 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
3791 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
3792 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
3793 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
3794 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
3795
3796 #define PS0 OPTION_REGbits.PS0 // bit 0
3797 #define PS1 OPTION_REGbits.PS1 // bit 1
3798 #define PS2 OPTION_REGbits.PS2 // bit 2
3799 #define PSA OPTION_REGbits.PSA // bit 3
3800 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
3801 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
3802 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
3803 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
3804 #define INTEDG OPTION_REGbits.INTEDG // bit 6
3805 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
3806
3807 #define SCS0 OSCCONbits.SCS0 // bit 0
3808 #define SCS1 OSCCONbits.SCS1 // bit 1
3809 #define IRCF0 OSCCONbits.IRCF0 // bit 3
3810 #define IRCF1 OSCCONbits.IRCF1 // bit 4
3811 #define IRCF2 OSCCONbits.IRCF2 // bit 5
3812 #define IRCF3 OSCCONbits.IRCF3 // bit 6
3813
3814 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
3815 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
3816 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
3817
3818 #define NOT_BOR PCONbits.NOT_BOR // bit 0
3819 #define NOT_POR PCONbits.NOT_POR // bit 1
3820 #define NOT_RI PCONbits.NOT_RI // bit 2
3821 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
3822 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
3823 #define STKUNF PCONbits.STKUNF // bit 6
3824 #define STKOVF PCONbits.STKOVF // bit 7
3825
3826 #define TMR1IE PIE1bits.TMR1IE // bit 0
3827 #define TMR2IE PIE1bits.TMR2IE // bit 1
3828 #define ADIE PIE1bits.ADIE // bit 6
3829 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
3830
3831 #define NCO1IE PIE2bits.NCO1IE // bit 2
3832 #define C1IE PIE2bits.C1IE // bit 5
3833
3834 #define CLC1IE PIE3bits.CLC1IE // bit 0
3835 #define CLC2IE PIE3bits.CLC2IE // bit 1
3836
3837 #define TMR1IF PIR1bits.TMR1IF // bit 0
3838 #define TMR2IF PIR1bits.TMR2IF // bit 1
3839 #define ADIF PIR1bits.ADIF // bit 6
3840 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
3841
3842 #define NCO1IF PIR2bits.NCO1IF // bit 2
3843 #define C1IF PIR2bits.C1IF // bit 5
3844
3845 #define CLC1IF PIR3bits.CLC1IF // bit 0
3846 #define CLC2IF PIR3bits.CLC2IF // bit 1
3847
3848 #define RD PMCON1bits.RD // bit 0
3849 #define WR PMCON1bits.WR // bit 1
3850 #define WREN PMCON1bits.WREN // bit 2
3851 #define WRERR PMCON1bits.WRERR // bit 3
3852 #define FREE PMCON1bits.FREE // bit 4
3853 #define LWLO PMCON1bits.LWLO // bit 5
3854 #define CFGS PMCON1bits.CFGS // bit 6
3855
3856 #define RA0 PORTAbits.RA0 // bit 0
3857 #define RA1 PORTAbits.RA1 // bit 1
3858 #define RA2 PORTAbits.RA2 // bit 2
3859 #define RA3 PORTAbits.RA3 // bit 3
3860 #define RA4 PORTAbits.RA4 // bit 4
3861 #define RA5 PORTAbits.RA5 // bit 5
3862
3863 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
3864 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
3865 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
3866 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
3867
3868 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
3869 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
3870 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
3871 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
3872 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
3873 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
3874 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
3875 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
3876
3877 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
3878 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
3879
3880 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
3881 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
3882 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
3883 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
3884
3885 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
3886 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
3887 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
3888 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
3889 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
3890 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
3891 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
3892 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
3893
3894 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
3895 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
3896
3897 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
3898 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
3899 #define PWM3OE PWM3CONbits.PWM3OE // bit 6
3900 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
3901
3902 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
3903 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
3904 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
3905 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
3906 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
3907 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
3908 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
3909 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
3910
3911 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
3912 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
3913
3914 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
3915 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
3916 #define PWM4OE PWM4CONbits.PWM4OE // bit 6
3917 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
3918
3919 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
3920 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
3921 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
3922 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
3923 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
3924 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
3925 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
3926 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
3927
3928 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
3929 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
3930
3931 #define C STATUSbits.C // bit 0
3932 #define DC STATUSbits.DC // bit 1
3933 #define Z STATUSbits.Z // bit 2
3934 #define NOT_PD STATUSbits.NOT_PD // bit 3
3935 #define NOT_TO STATUSbits.NOT_TO // bit 4
3936
3937 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
3938 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
3939 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
3940
3941 #define TMR1ON T1CONbits.TMR1ON // bit 0
3942 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
3943 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
3944 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
3945 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
3946 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
3947
3948 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
3949 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
3950 #define T1GVAL T1GCONbits.T1GVAL // bit 2
3951 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
3952 #define T1GSPM T1GCONbits.T1GSPM // bit 4
3953 #define T1GTM T1GCONbits.T1GTM // bit 5
3954 #define T1GPOL T1GCONbits.T1GPOL // bit 6
3955 #define TMR1GE T1GCONbits.TMR1GE // bit 7
3956
3957 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
3958 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
3959 #define TMR2ON T2CONbits.TMR2ON // bit 2
3960 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
3961 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
3962 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
3963 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
3964
3965 #define TRISA0 TRISAbits.TRISA0 // bit 0
3966 #define TRISA1 TRISAbits.TRISA1 // bit 1
3967 #define TRISA2 TRISAbits.TRISA2 // bit 2
3968 #define TRISA3 TRISAbits.TRISA3 // bit 3
3969 #define TRISA4 TRISAbits.TRISA4 // bit 4
3970 #define TRISA5 TRISAbits.TRISA5 // bit 5
3971
3972 #define VREGPM VREGCONbits.VREGPM // bit 1
3973
3974 #define SWDTEN WDTCONbits.SWDTEN // bit 0
3975 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
3976 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
3977 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
3978 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
3979 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
3980
3981 #define WPUA0 WPUAbits.WPUA0 // bit 0
3982 #define WPUA1 WPUAbits.WPUA1 // bit 1
3983 #define WPUA2 WPUAbits.WPUA2 // bit 2
3984 #define WPUA3 WPUAbits.WPUA3 // bit 3
3985 #define WPUA4 WPUAbits.WPUA4 // bit 4
3986 #define WPUA5 WPUAbits.WPUA5 // bit 5
3987
3988 #endif // #ifndef NO_BIT_DEFINES
3989
3990 #endif // #ifndef __PIC12F1501_H__
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