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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12f1571.h
blob3884c32786f34554e53620246dc604f1a0a8fc86
1 /*
2 * This declarations of the PIC12F1571 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12F1571_H__
26 #define __PIC12F1571_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define PIE1_ADDR 0x0091
65 #define PIE2_ADDR 0x0092
66 #define PIE3_ADDR 0x0093
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCTUNE_ADDR 0x0098
71 #define OSCCON_ADDR 0x0099
72 #define OSCSTAT_ADDR 0x009A
73 #define ADRES_ADDR 0x009B
74 #define ADRESL_ADDR 0x009B
75 #define ADRESH_ADDR 0x009C
76 #define ADCON0_ADDR 0x009D
77 #define ADCON1_ADDR 0x009E
78 #define ADCON2_ADDR 0x009F
79 #define LATA_ADDR 0x010C
80 #define CM1CON0_ADDR 0x0111
81 #define CM1CON1_ADDR 0x0112
82 #define CMOUT_ADDR 0x0115
83 #define BORCON_ADDR 0x0116
84 #define FVRCON_ADDR 0x0117
85 #define DACCON0_ADDR 0x0118
86 #define DACCON1_ADDR 0x0119
87 #define APFCON_ADDR 0x011D
88 #define APFCON0_ADDR 0x011D
89 #define ANSELA_ADDR 0x018C
90 #define PMADR_ADDR 0x0191
91 #define PMADRL_ADDR 0x0191
92 #define PMADRH_ADDR 0x0192
93 #define PMDAT_ADDR 0x0193
94 #define PMDATL_ADDR 0x0193
95 #define PMDATH_ADDR 0x0194
96 #define PMCON1_ADDR 0x0195
97 #define PMCON2_ADDR 0x0196
98 #define VREGCON_ADDR 0x0197
99 #define WPUA_ADDR 0x020C
100 #define ODCONA_ADDR 0x028C
101 #define SLRCONA_ADDR 0x030C
102 #define INLVLA_ADDR 0x038C
103 #define IOCAP_ADDR 0x0391
104 #define IOCAN_ADDR 0x0392
105 #define IOCAF_ADDR 0x0393
106 #define CWG1DBR_ADDR 0x0691
107 #define CWG1DBF_ADDR 0x0692
108 #define CWG1CON0_ADDR 0x0693
109 #define CWG1CON1_ADDR 0x0694
110 #define CWG1CON2_ADDR 0x0695
111 #define PWMEN_ADDR 0x0D8E
112 #define PWMLD_ADDR 0x0D8F
113 #define PWMOUT_ADDR 0x0D90
114 #define PWM1PH_ADDR 0x0D91
115 #define PWM1PHL_ADDR 0x0D91
116 #define PWM1PHH_ADDR 0x0D92
117 #define PWM1DC_ADDR 0x0D93
118 #define PWM1DCL_ADDR 0x0D93
119 #define PWM1DCH_ADDR 0x0D94
120 #define PWM1PR_ADDR 0x0D95
121 #define PWM1PRL_ADDR 0x0D95
122 #define PWM1PRH_ADDR 0x0D96
123 #define PWM1OF_ADDR 0x0D97
124 #define PWM1OFL_ADDR 0x0D97
125 #define PWM1OFH_ADDR 0x0D98
126 #define PWM1TMR_ADDR 0x0D99
127 #define PWM1TMRL_ADDR 0x0D99
128 #define PWM1TMRH_ADDR 0x0D9A
129 #define PWM1CON_ADDR 0x0D9B
130 #define PWM1INTCON_ADDR 0x0D9C
131 #define PWM1INTE_ADDR 0x0D9C
132 #define PWM1INTF_ADDR 0x0D9D
133 #define PWM1INTFLG_ADDR 0x0D9D
134 #define PWM1CLKCON_ADDR 0x0D9E
135 #define PWM1LDCON_ADDR 0x0D9F
136 #define PWM1OFCON_ADDR 0x0DA0
137 #define PWM2PH_ADDR 0x0DA1
138 #define PWM2PHL_ADDR 0x0DA1
139 #define PWM2PHH_ADDR 0x0DA2
140 #define PWM2DC_ADDR 0x0DA3
141 #define PWM2DCL_ADDR 0x0DA3
142 #define PWM2DCH_ADDR 0x0DA4
143 #define PWM2PR_ADDR 0x0DA5
144 #define PWM2PRL_ADDR 0x0DA5
145 #define PWM2PRH_ADDR 0x0DA6
146 #define PWM2OF_ADDR 0x0DA7
147 #define PWM2OFL_ADDR 0x0DA7
148 #define PWM2OFH_ADDR 0x0DA8
149 #define PWM2TMR_ADDR 0x0DA9
150 #define PWM2TMRL_ADDR 0x0DA9
151 #define PWM2TMRH_ADDR 0x0DAA
152 #define PWM2CON_ADDR 0x0DAB
153 #define PWM2INTCON_ADDR 0x0DAC
154 #define PWM2INTE_ADDR 0x0DAC
155 #define PWM2INTF_ADDR 0x0DAD
156 #define PWM2INTFLG_ADDR 0x0DAD
157 #define PWM2CLKCON_ADDR 0x0DAE
158 #define PWM2LDCON_ADDR 0x0DAF
159 #define PWM2OFCON_ADDR 0x0DB0
160 #define PWM3PH_ADDR 0x0DB1
161 #define PWM3PHL_ADDR 0x0DB1
162 #define PWM3PHH_ADDR 0x0DB2
163 #define PWM3DC_ADDR 0x0DB3
164 #define PWM3DCL_ADDR 0x0DB3
165 #define PWM3DCH_ADDR 0x0DB4
166 #define PWM3PR_ADDR 0x0DB5
167 #define PWM3PRL_ADDR 0x0DB5
168 #define PWM3PRH_ADDR 0x0DB6
169 #define PWM3OF_ADDR 0x0DB7
170 #define PWM3OFL_ADDR 0x0DB7
171 #define PWM3OFH_ADDR 0x0DB8
172 #define PWM3TMR_ADDR 0x0DB9
173 #define PWM3TMRL_ADDR 0x0DB9
174 #define PWM3TMRH_ADDR 0x0DBA
175 #define PWM3CON_ADDR 0x0DBB
176 #define PWM3INTCON_ADDR 0x0DBC
177 #define PWM3INTE_ADDR 0x0DBC
178 #define PWM3INTF_ADDR 0x0DBD
179 #define PWM3INTFLG_ADDR 0x0DBD
180 #define PWM3CLKCON_ADDR 0x0DBE
181 #define PWM3LDCON_ADDR 0x0DBF
182 #define PWM3OFCON_ADDR 0x0DC0
183 #define STATUS_SHAD_ADDR 0x0FE4
184 #define WREG_SHAD_ADDR 0x0FE5
185 #define BSR_SHAD_ADDR 0x0FE6
186 #define PCLATH_SHAD_ADDR 0x0FE7
187 #define FSR0L_SHAD_ADDR 0x0FE8
188 #define FSR0_SHAD_ADDR 0x0FE8
189 #define FSR0H_SHAD_ADDR 0x0FE9
190 #define FSR1L_SHAD_ADDR 0x0FEA
191 #define FSR1_SHAD_ADDR 0x0FEA
192 #define FSR1H_SHAD_ADDR 0x0FEB
193 #define STKPTR_ADDR 0x0FED
194 #define TOS_ADDR 0x0FEE
195 #define TOSL_ADDR 0x0FEE
196 #define TOSH_ADDR 0x0FEF
197
198 #endif // #ifndef NO_ADDR_DEFINES
199
200 //==============================================================================
201 //
202 // Register Definitions
203 //
204 //==============================================================================
205
206 extern __at(0x0000) __sfr INDF0;
207 extern __at(0x0001) __sfr INDF1;
208 extern __at(0x0002) __sfr PCL;
209
210 //==============================================================================
211 // STATUS Bits
212
213 extern __at(0x0003) __sfr STATUS;
214
215 typedef struct
216 {
217 unsigned C : 1;
218 unsigned DC : 1;
219 unsigned Z : 1;
220 unsigned NOT_PD : 1;
221 unsigned NOT_TO : 1;
222 unsigned : 1;
223 unsigned : 1;
224 unsigned : 1;
225 } __STATUSbits_t;
226
227 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
228
229 #define _C 0x01
230 #define _DC 0x02
231 #define _Z 0x04
232 #define _NOT_PD 0x08
233 #define _NOT_TO 0x10
234
235 //==============================================================================
236
237 extern __at(0x0004) __sfr FSR0;
238 extern __at(0x0004) __sfr FSR0L;
239 extern __at(0x0005) __sfr FSR0H;
240 extern __at(0x0006) __sfr FSR1;
241 extern __at(0x0006) __sfr FSR1L;
242 extern __at(0x0007) __sfr FSR1H;
243
244 //==============================================================================
245 // BSR Bits
246
247 extern __at(0x0008) __sfr BSR;
248
249 typedef union
250 {
251 struct
252 {
253 unsigned BSR0 : 1;
254 unsigned BSR1 : 1;
255 unsigned BSR2 : 1;
256 unsigned BSR3 : 1;
257 unsigned BSR4 : 1;
258 unsigned : 1;
259 unsigned : 1;
260 unsigned : 1;
261 };
262
263 struct
264 {
265 unsigned BSR : 5;
266 unsigned : 3;
267 };
268 } __BSRbits_t;
269
270 extern __at(0x0008) volatile __BSRbits_t BSRbits;
271
272 #define _BSR0 0x01
273 #define _BSR1 0x02
274 #define _BSR2 0x04
275 #define _BSR3 0x08
276 #define _BSR4 0x10
277
278 //==============================================================================
279
280 extern __at(0x0009) __sfr WREG;
281 extern __at(0x000A) __sfr PCLATH;
282
283 //==============================================================================
284 // INTCON Bits
285
286 extern __at(0x000B) __sfr INTCON;
287
288 typedef union
289 {
290 struct
291 {
292 unsigned IOCIF : 1;
293 unsigned INTF : 1;
294 unsigned TMR0IF : 1;
295 unsigned IOCIE : 1;
296 unsigned INTE : 1;
297 unsigned TMR0IE : 1;
298 unsigned PEIE : 1;
299 unsigned GIE : 1;
300 };
301
302 struct
303 {
304 unsigned : 1;
305 unsigned : 1;
306 unsigned T0IF : 1;
307 unsigned : 1;
308 unsigned : 1;
309 unsigned T0IE : 1;
310 unsigned : 1;
311 unsigned : 1;
312 };
313 } __INTCONbits_t;
314
315 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
316
317 #define _IOCIF 0x01
318 #define _INTF 0x02
319 #define _TMR0IF 0x04
320 #define _T0IF 0x04
321 #define _IOCIE 0x08
322 #define _INTE 0x10
323 #define _TMR0IE 0x20
324 #define _T0IE 0x20
325 #define _PEIE 0x40
326 #define _GIE 0x80
327
328 //==============================================================================
329
330
331 //==============================================================================
332 // PORTA Bits
333
334 extern __at(0x000C) __sfr PORTA;
335
336 typedef union
337 {
338 struct
339 {
340 unsigned RA0 : 1;
341 unsigned RA1 : 1;
342 unsigned RA2 : 1;
343 unsigned RA3 : 1;
344 unsigned RA4 : 1;
345 unsigned RA5 : 1;
346 unsigned : 1;
347 unsigned : 1;
348 };
349
350 struct
351 {
352 unsigned RA : 6;
353 unsigned : 2;
354 };
355 } __PORTAbits_t;
356
357 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
358
359 #define _RA0 0x01
360 #define _RA1 0x02
361 #define _RA2 0x04
362 #define _RA3 0x08
363 #define _RA4 0x10
364 #define _RA5 0x20
365
366 //==============================================================================
367
368
369 //==============================================================================
370 // PIR1 Bits
371
372 extern __at(0x0011) __sfr PIR1;
373
374 typedef struct
375 {
376 unsigned TMR1IF : 1;
377 unsigned TMR2IF : 1;
378 unsigned : 1;
379 unsigned : 1;
380 unsigned : 1;
381 unsigned : 1;
382 unsigned ADIF : 1;
383 unsigned TMR1GIF : 1;
384 } __PIR1bits_t;
385
386 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
387
388 #define _TMR1IF 0x01
389 #define _TMR2IF 0x02
390 #define _ADIF 0x40
391 #define _TMR1GIF 0x80
392
393 //==============================================================================
394
395
396 //==============================================================================
397 // PIR2 Bits
398
399 extern __at(0x0012) __sfr PIR2;
400
401 typedef struct
402 {
403 unsigned : 1;
404 unsigned : 1;
405 unsigned : 1;
406 unsigned : 1;
407 unsigned : 1;
408 unsigned C1IF : 1;
409 unsigned : 1;
410 unsigned : 1;
411 } __PIR2bits_t;
412
413 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
414
415 #define _C1IF 0x20
416
417 //==============================================================================
418
419
420 //==============================================================================
421 // PIR3 Bits
422
423 extern __at(0x0013) __sfr PIR3;
424
425 typedef struct
426 {
427 unsigned : 1;
428 unsigned : 1;
429 unsigned : 1;
430 unsigned : 1;
431 unsigned PWM1IF : 1;
432 unsigned PWM2IF : 1;
433 unsigned PWM3IF : 1;
434 unsigned : 1;
435 } __PIR3bits_t;
436
437 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
438
439 #define _PWM1IF 0x10
440 #define _PWM2IF 0x20
441 #define _PWM3IF 0x40
442
443 //==============================================================================
444
445 extern __at(0x0015) __sfr TMR0;
446 extern __at(0x0016) __sfr TMR1;
447 extern __at(0x0016) __sfr TMR1L;
448 extern __at(0x0017) __sfr TMR1H;
449
450 //==============================================================================
451 // T1CON Bits
452
453 extern __at(0x0018) __sfr T1CON;
454
455 typedef union
456 {
457 struct
458 {
459 unsigned TMR1ON : 1;
460 unsigned : 1;
461 unsigned NOT_T1SYNC : 1;
462 unsigned : 1;
463 unsigned T1CKPS0 : 1;
464 unsigned T1CKPS1 : 1;
465 unsigned TMR1CS0 : 1;
466 unsigned TMR1CS1 : 1;
467 };
468
469 struct
470 {
471 unsigned : 4;
472 unsigned T1CKPS : 2;
473 unsigned : 2;
474 };
475
476 struct
477 {
478 unsigned : 6;
479 unsigned TMR1CS : 2;
480 };
481 } __T1CONbits_t;
482
483 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
484
485 #define _TMR1ON 0x01
486 #define _NOT_T1SYNC 0x04
487 #define _T1CKPS0 0x10
488 #define _T1CKPS1 0x20
489 #define _TMR1CS0 0x40
490 #define _TMR1CS1 0x80
491
492 //==============================================================================
493
494
495 //==============================================================================
496 // T1GCON Bits
497
498 extern __at(0x0019) __sfr T1GCON;
499
500 typedef union
501 {
502 struct
503 {
504 unsigned T1GSS0 : 1;
505 unsigned T1GSS1 : 1;
506 unsigned T1GVAL : 1;
507 unsigned T1GGO_NOT_DONE : 1;
508 unsigned T1GSPM : 1;
509 unsigned T1GTM : 1;
510 unsigned T1GPOL : 1;
511 unsigned TMR1GE : 1;
512 };
513
514 struct
515 {
516 unsigned : 1;
517 unsigned : 1;
518 unsigned : 1;
519 unsigned T1GGO : 1;
520 unsigned : 1;
521 unsigned : 1;
522 unsigned : 1;
523 unsigned : 1;
524 };
525
526 struct
527 {
528 unsigned T1GSS : 2;
529 unsigned : 6;
530 };
531 } __T1GCONbits_t;
532
533 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
534
535 #define _T1GSS0 0x01
536 #define _T1GSS1 0x02
537 #define _T1GVAL 0x04
538 #define _T1GGO_NOT_DONE 0x08
539 #define _T1GGO 0x08
540 #define _T1GSPM 0x10
541 #define _T1GTM 0x20
542 #define _T1GPOL 0x40
543 #define _TMR1GE 0x80
544
545 //==============================================================================
546
547 extern __at(0x001A) __sfr TMR2;
548 extern __at(0x001B) __sfr PR2;
549
550 //==============================================================================
551 // T2CON Bits
552
553 extern __at(0x001C) __sfr T2CON;
554
555 typedef union
556 {
557 struct
558 {
559 unsigned T2CKPS0 : 1;
560 unsigned T2CKPS1 : 1;
561 unsigned TMR2ON : 1;
562 unsigned T2OUTPS0 : 1;
563 unsigned T2OUTPS1 : 1;
564 unsigned T2OUTPS2 : 1;
565 unsigned T2OUTPS3 : 1;
566 unsigned : 1;
567 };
568
569 struct
570 {
571 unsigned T2CKPS : 2;
572 unsigned : 6;
573 };
574
575 struct
576 {
577 unsigned : 3;
578 unsigned T2OUTPS : 4;
579 unsigned : 1;
580 };
581 } __T2CONbits_t;
582
583 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
584
585 #define _T2CKPS0 0x01
586 #define _T2CKPS1 0x02
587 #define _TMR2ON 0x04
588 #define _T2OUTPS0 0x08
589 #define _T2OUTPS1 0x10
590 #define _T2OUTPS2 0x20
591 #define _T2OUTPS3 0x40
592
593 //==============================================================================
594
595
596 //==============================================================================
597 // TRISA Bits
598
599 extern __at(0x008C) __sfr TRISA;
600
601 typedef union
602 {
603 struct
604 {
605 unsigned TRISA0 : 1;
606 unsigned TRISA1 : 1;
607 unsigned TRISA2 : 1;
608 unsigned TRISA3 : 1;
609 unsigned TRISA4 : 1;
610 unsigned TRISA5 : 1;
611 unsigned : 1;
612 unsigned : 1;
613 };
614
615 struct
616 {
617 unsigned TRISA : 6;
618 unsigned : 2;
619 };
620 } __TRISAbits_t;
621
622 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
623
624 #define _TRISA0 0x01
625 #define _TRISA1 0x02
626 #define _TRISA2 0x04
627 #define _TRISA3 0x08
628 #define _TRISA4 0x10
629 #define _TRISA5 0x20
630
631 //==============================================================================
632
633
634 //==============================================================================
635 // PIE1 Bits
636
637 extern __at(0x0091) __sfr PIE1;
638
639 typedef struct
640 {
641 unsigned TMR1IE : 1;
642 unsigned TMR2IE : 1;
643 unsigned : 1;
644 unsigned : 1;
645 unsigned : 1;
646 unsigned : 1;
647 unsigned ADIE : 1;
648 unsigned TMR1GIE : 1;
649 } __PIE1bits_t;
650
651 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
652
653 #define _TMR1IE 0x01
654 #define _TMR2IE 0x02
655 #define _ADIE 0x40
656 #define _TMR1GIE 0x80
657
658 //==============================================================================
659
660
661 //==============================================================================
662 // PIE2 Bits
663
664 extern __at(0x0092) __sfr PIE2;
665
666 typedef struct
667 {
668 unsigned : 1;
669 unsigned : 1;
670 unsigned : 1;
671 unsigned : 1;
672 unsigned : 1;
673 unsigned C1IE : 1;
674 unsigned : 1;
675 unsigned : 1;
676 } __PIE2bits_t;
677
678 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
679
680 #define _C1IE 0x20
681
682 //==============================================================================
683
684
685 //==============================================================================
686 // PIE3 Bits
687
688 extern __at(0x0093) __sfr PIE3;
689
690 typedef struct
691 {
692 unsigned : 1;
693 unsigned : 1;
694 unsigned : 1;
695 unsigned : 1;
696 unsigned PWM1IE : 1;
697 unsigned PWM2IE : 1;
698 unsigned PWM3IE : 1;
699 unsigned : 1;
700 } __PIE3bits_t;
701
702 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
703
704 #define _PWM1IE 0x10
705 #define _PWM2IE 0x20
706 #define _PWM3IE 0x40
707
708 //==============================================================================
709
710
711 //==============================================================================
712 // OPTION_REG Bits
713
714 extern __at(0x0095) __sfr OPTION_REG;
715
716 typedef union
717 {
718 struct
719 {
720 unsigned PS0 : 1;
721 unsigned PS1 : 1;
722 unsigned PS2 : 1;
723 unsigned PSA : 1;
724 unsigned TMR0SE : 1;
725 unsigned TMR0CS : 1;
726 unsigned INTEDG : 1;
727 unsigned NOT_WPUEN : 1;
728 };
729
730 struct
731 {
732 unsigned : 1;
733 unsigned : 1;
734 unsigned : 1;
735 unsigned : 1;
736 unsigned T0SE : 1;
737 unsigned T0CS : 1;
738 unsigned : 1;
739 unsigned : 1;
740 };
741
742 struct
743 {
744 unsigned PS : 3;
745 unsigned : 5;
746 };
747 } __OPTION_REGbits_t;
748
749 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
750
751 #define _PS0 0x01
752 #define _PS1 0x02
753 #define _PS2 0x04
754 #define _PSA 0x08
755 #define _TMR0SE 0x10
756 #define _T0SE 0x10
757 #define _TMR0CS 0x20
758 #define _T0CS 0x20
759 #define _INTEDG 0x40
760 #define _NOT_WPUEN 0x80
761
762 //==============================================================================
763
764
765 //==============================================================================
766 // PCON Bits
767
768 extern __at(0x0096) __sfr PCON;
769
770 typedef struct
771 {
772 unsigned NOT_BOR : 1;
773 unsigned NOT_POR : 1;
774 unsigned NOT_RI : 1;
775 unsigned NOT_RMCLR : 1;
776 unsigned NOT_RWDT : 1;
777 unsigned : 1;
778 unsigned STKUNF : 1;
779 unsigned STKOVF : 1;
780 } __PCONbits_t;
781
782 extern __at(0x0096) volatile __PCONbits_t PCONbits;
783
784 #define _NOT_BOR 0x01
785 #define _NOT_POR 0x02
786 #define _NOT_RI 0x04
787 #define _NOT_RMCLR 0x08
788 #define _NOT_RWDT 0x10
789 #define _STKUNF 0x40
790 #define _STKOVF 0x80
791
792 //==============================================================================
793
794
795 //==============================================================================
796 // WDTCON Bits
797
798 extern __at(0x0097) __sfr WDTCON;
799
800 typedef union
801 {
802 struct
803 {
804 unsigned SWDTEN : 1;
805 unsigned WDTPS0 : 1;
806 unsigned WDTPS1 : 1;
807 unsigned WDTPS2 : 1;
808 unsigned WDTPS3 : 1;
809 unsigned WDTPS4 : 1;
810 unsigned : 1;
811 unsigned : 1;
812 };
813
814 struct
815 {
816 unsigned : 1;
817 unsigned WDTPS : 5;
818 unsigned : 2;
819 };
820 } __WDTCONbits_t;
821
822 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
823
824 #define _SWDTEN 0x01
825 #define _WDTPS0 0x02
826 #define _WDTPS1 0x04
827 #define _WDTPS2 0x08
828 #define _WDTPS3 0x10
829 #define _WDTPS4 0x20
830
831 //==============================================================================
832
833
834 //==============================================================================
835 // OSCTUNE Bits
836
837 extern __at(0x0098) __sfr OSCTUNE;
838
839 typedef union
840 {
841 struct
842 {
843 unsigned TUN0 : 1;
844 unsigned TUN1 : 1;
845 unsigned TUN2 : 1;
846 unsigned TUN3 : 1;
847 unsigned TUN4 : 1;
848 unsigned TUN5 : 1;
849 unsigned : 1;
850 unsigned : 1;
851 };
852
853 struct
854 {
855 unsigned TUN : 6;
856 unsigned : 2;
857 };
858 } __OSCTUNEbits_t;
859
860 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
861
862 #define _TUN0 0x01
863 #define _TUN1 0x02
864 #define _TUN2 0x04
865 #define _TUN3 0x08
866 #define _TUN4 0x10
867 #define _TUN5 0x20
868
869 //==============================================================================
870
871
872 //==============================================================================
873 // OSCCON Bits
874
875 extern __at(0x0099) __sfr OSCCON;
876
877 typedef union
878 {
879 struct
880 {
881 unsigned SCS0 : 1;
882 unsigned SCS1 : 1;
883 unsigned : 1;
884 unsigned IRCF0 : 1;
885 unsigned IRCF1 : 1;
886 unsigned IRCF2 : 1;
887 unsigned IRCF3 : 1;
888 unsigned SPLLEN : 1;
889 };
890
891 struct
892 {
893 unsigned SCS : 2;
894 unsigned : 6;
895 };
896
897 struct
898 {
899 unsigned : 3;
900 unsigned IRCF : 4;
901 unsigned : 1;
902 };
903 } __OSCCONbits_t;
904
905 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
906
907 #define _SCS0 0x01
908 #define _SCS1 0x02
909 #define _IRCF0 0x08
910 #define _IRCF1 0x10
911 #define _IRCF2 0x20
912 #define _IRCF3 0x40
913 #define _SPLLEN 0x80
914
915 //==============================================================================
916
917
918 //==============================================================================
919 // OSCSTAT Bits
920
921 extern __at(0x009A) __sfr OSCSTAT;
922
923 typedef struct
924 {
925 unsigned HFIOFS : 1;
926 unsigned LFIOFR : 1;
927 unsigned MFIOFR : 1;
928 unsigned HFIOFL : 1;
929 unsigned HFIOFR : 1;
930 unsigned OSTS : 1;
931 unsigned PLLR : 1;
932 unsigned : 1;
933 } __OSCSTATbits_t;
934
935 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
936
937 #define _HFIOFS 0x01
938 #define _LFIOFR 0x02
939 #define _MFIOFR 0x04
940 #define _HFIOFL 0x08
941 #define _HFIOFR 0x10
942 #define _OSTS 0x20
943 #define _PLLR 0x40
944
945 //==============================================================================
946
947 extern __at(0x009B) __sfr ADRES;
948 extern __at(0x009B) __sfr ADRESL;
949 extern __at(0x009C) __sfr ADRESH;
950
951 //==============================================================================
952 // ADCON0 Bits
953
954 extern __at(0x009D) __sfr ADCON0;
955
956 typedef union
957 {
958 struct
959 {
960 unsigned ADON : 1;
961 unsigned GO_NOT_DONE : 1;
962 unsigned CHS0 : 1;
963 unsigned CHS1 : 1;
964 unsigned CHS2 : 1;
965 unsigned CHS3 : 1;
966 unsigned CHS4 : 1;
967 unsigned : 1;
968 };
969
970 struct
971 {
972 unsigned : 1;
973 unsigned ADGO : 1;
974 unsigned : 1;
975 unsigned : 1;
976 unsigned : 1;
977 unsigned : 1;
978 unsigned : 1;
979 unsigned : 1;
980 };
981
982 struct
983 {
984 unsigned : 1;
985 unsigned GO : 1;
986 unsigned : 1;
987 unsigned : 1;
988 unsigned : 1;
989 unsigned : 1;
990 unsigned : 1;
991 unsigned : 1;
992 };
993
994 struct
995 {
996 unsigned : 1;
997 unsigned NOT_DONE : 1;
998 unsigned : 1;
999 unsigned : 1;
1000 unsigned : 1;
1001 unsigned : 1;
1002 unsigned : 1;
1003 unsigned : 1;
1004 };
1005
1006 struct
1007 {
1008 unsigned : 2;
1009 unsigned CHS : 5;
1010 unsigned : 1;
1011 };
1012 } __ADCON0bits_t;
1013
1014 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1015
1016 #define _ADON 0x01
1017 #define _GO_NOT_DONE 0x02
1018 #define _ADGO 0x02
1019 #define _GO 0x02
1020 #define _NOT_DONE 0x02
1021 #define _CHS0 0x04
1022 #define _CHS1 0x08
1023 #define _CHS2 0x10
1024 #define _CHS3 0x20
1025 #define _CHS4 0x40
1026
1027 //==============================================================================
1028
1029
1030 //==============================================================================
1031 // ADCON1 Bits
1032
1033 extern __at(0x009E) __sfr ADCON1;
1034
1035 typedef union
1036 {
1037 struct
1038 {
1039 unsigned ADPREF0 : 1;
1040 unsigned ADPREF1 : 1;
1041 unsigned : 1;
1042 unsigned : 1;
1043 unsigned ADCS0 : 1;
1044 unsigned ADCS1 : 1;
1045 unsigned ADCS2 : 1;
1046 unsigned ADFM : 1;
1047 };
1048
1049 struct
1050 {
1051 unsigned ADPREF : 2;
1052 unsigned : 6;
1053 };
1054
1055 struct
1056 {
1057 unsigned : 4;
1058 unsigned ADCS : 3;
1059 unsigned : 1;
1060 };
1061 } __ADCON1bits_t;
1062
1063 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1064
1065 #define _ADPREF0 0x01
1066 #define _ADPREF1 0x02
1067 #define _ADCS0 0x10
1068 #define _ADCS1 0x20
1069 #define _ADCS2 0x40
1070 #define _ADFM 0x80
1071
1072 //==============================================================================
1073
1074
1075 //==============================================================================
1076 // ADCON2 Bits
1077
1078 extern __at(0x009F) __sfr ADCON2;
1079
1080 typedef union
1081 {
1082 struct
1083 {
1084 unsigned : 1;
1085 unsigned : 1;
1086 unsigned : 1;
1087 unsigned : 1;
1088 unsigned TRIGSEL0 : 1;
1089 unsigned TRIGSEL1 : 1;
1090 unsigned TRIGSEL2 : 1;
1091 unsigned TRIGSEL3 : 1;
1092 };
1093
1094 struct
1095 {
1096 unsigned : 4;
1097 unsigned TRIGSEL : 4;
1098 };
1099 } __ADCON2bits_t;
1100
1101 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1102
1103 #define _TRIGSEL0 0x10
1104 #define _TRIGSEL1 0x20
1105 #define _TRIGSEL2 0x40
1106 #define _TRIGSEL3 0x80
1107
1108 //==============================================================================
1109
1110
1111 //==============================================================================
1112 // LATA Bits
1113
1114 extern __at(0x010C) __sfr LATA;
1115
1116 typedef struct
1117 {
1118 unsigned LATA0 : 1;
1119 unsigned LATA1 : 1;
1120 unsigned LATA2 : 1;
1121 unsigned : 1;
1122 unsigned LATA4 : 1;
1123 unsigned LATA5 : 1;
1124 unsigned : 1;
1125 unsigned : 1;
1126 } __LATAbits_t;
1127
1128 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1129
1130 #define _LATA0 0x01
1131 #define _LATA1 0x02
1132 #define _LATA2 0x04
1133 #define _LATA4 0x10
1134 #define _LATA5 0x20
1135
1136 //==============================================================================
1137
1138
1139 //==============================================================================
1140 // CM1CON0 Bits
1141
1142 extern __at(0x0111) __sfr CM1CON0;
1143
1144 typedef struct
1145 {
1146 unsigned C1SYNC : 1;
1147 unsigned C1HYS : 1;
1148 unsigned C1SP : 1;
1149 unsigned : 1;
1150 unsigned C1POL : 1;
1151 unsigned C1OE : 1;
1152 unsigned C1OUT : 1;
1153 unsigned C1ON : 1;
1154 } __CM1CON0bits_t;
1155
1156 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1157
1158 #define _C1SYNC 0x01
1159 #define _C1HYS 0x02
1160 #define _C1SP 0x04
1161 #define _C1POL 0x10
1162 #define _C1OE 0x20
1163 #define _C1OUT 0x40
1164 #define _C1ON 0x80
1165
1166 //==============================================================================
1167
1168
1169 //==============================================================================
1170 // CM1CON1 Bits
1171
1172 extern __at(0x0112) __sfr CM1CON1;
1173
1174 typedef union
1175 {
1176 struct
1177 {
1178 unsigned C1NCH0 : 1;
1179 unsigned C1NCH1 : 1;
1180 unsigned C1NCH2 : 1;
1181 unsigned : 1;
1182 unsigned C1PCH0 : 1;
1183 unsigned C1PCH1 : 1;
1184 unsigned C1INTN : 1;
1185 unsigned C1INTP : 1;
1186 };
1187
1188 struct
1189 {
1190 unsigned C1NCH : 3;
1191 unsigned : 5;
1192 };
1193
1194 struct
1195 {
1196 unsigned : 4;
1197 unsigned C1PCH : 2;
1198 unsigned : 2;
1199 };
1200 } __CM1CON1bits_t;
1201
1202 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1203
1204 #define _C1NCH0 0x01
1205 #define _C1NCH1 0x02
1206 #define _C1NCH2 0x04
1207 #define _C1PCH0 0x10
1208 #define _C1PCH1 0x20
1209 #define _C1INTN 0x40
1210 #define _C1INTP 0x80
1211
1212 //==============================================================================
1213
1214
1215 //==============================================================================
1216 // CMOUT Bits
1217
1218 extern __at(0x0115) __sfr CMOUT;
1219
1220 typedef struct
1221 {
1222 unsigned MC1OUT : 1;
1223 unsigned : 1;
1224 unsigned : 1;
1225 unsigned : 1;
1226 unsigned : 1;
1227 unsigned : 1;
1228 unsigned : 1;
1229 unsigned : 1;
1230 } __CMOUTbits_t;
1231
1232 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1233
1234 #define _MC1OUT 0x01
1235
1236 //==============================================================================
1237
1238
1239 //==============================================================================
1240 // BORCON Bits
1241
1242 extern __at(0x0116) __sfr BORCON;
1243
1244 typedef struct
1245 {
1246 unsigned BORRDY : 1;
1247 unsigned : 1;
1248 unsigned : 1;
1249 unsigned : 1;
1250 unsigned : 1;
1251 unsigned : 1;
1252 unsigned BORFS : 1;
1253 unsigned SBOREN : 1;
1254 } __BORCONbits_t;
1255
1256 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1257
1258 #define _BORRDY 0x01
1259 #define _BORFS 0x40
1260 #define _SBOREN 0x80
1261
1262 //==============================================================================
1263
1264
1265 //==============================================================================
1266 // FVRCON Bits
1267
1268 extern __at(0x0117) __sfr FVRCON;
1269
1270 typedef union
1271 {
1272 struct
1273 {
1274 unsigned ADFVR0 : 1;
1275 unsigned ADFVR1 : 1;
1276 unsigned CDAFVR0 : 1;
1277 unsigned CDAFVR1 : 1;
1278 unsigned TSRNG : 1;
1279 unsigned TSEN : 1;
1280 unsigned FVRRDY : 1;
1281 unsigned FVREN : 1;
1282 };
1283
1284 struct
1285 {
1286 unsigned ADFVR : 2;
1287 unsigned : 6;
1288 };
1289
1290 struct
1291 {
1292 unsigned : 2;
1293 unsigned CDAFVR : 2;
1294 unsigned : 4;
1295 };
1296 } __FVRCONbits_t;
1297
1298 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1299
1300 #define _ADFVR0 0x01
1301 #define _ADFVR1 0x02
1302 #define _CDAFVR0 0x04
1303 #define _CDAFVR1 0x08
1304 #define _TSRNG 0x10
1305 #define _TSEN 0x20
1306 #define _FVRRDY 0x40
1307 #define _FVREN 0x80
1308
1309 //==============================================================================
1310
1311
1312 //==============================================================================
1313 // DACCON0 Bits
1314
1315 extern __at(0x0118) __sfr DACCON0;
1316
1317 typedef union
1318 {
1319 struct
1320 {
1321 unsigned : 1;
1322 unsigned : 1;
1323 unsigned DACPSS0 : 1;
1324 unsigned DACPSS1 : 1;
1325 unsigned : 1;
1326 unsigned DACOE : 1;
1327 unsigned DACLPS : 1;
1328 unsigned DACEN : 1;
1329 };
1330
1331 struct
1332 {
1333 unsigned : 2;
1334 unsigned DACPSS : 2;
1335 unsigned : 4;
1336 };
1337 } __DACCON0bits_t;
1338
1339 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1340
1341 #define _DACPSS0 0x04
1342 #define _DACPSS1 0x08
1343 #define _DACOE 0x20
1344 #define _DACLPS 0x40
1345 #define _DACEN 0x80
1346
1347 //==============================================================================
1348
1349
1350 //==============================================================================
1351 // DACCON1 Bits
1352
1353 extern __at(0x0119) __sfr DACCON1;
1354
1355 typedef union
1356 {
1357 struct
1358 {
1359 unsigned DACR0 : 1;
1360 unsigned DACR1 : 1;
1361 unsigned DACR2 : 1;
1362 unsigned DACR3 : 1;
1363 unsigned DACR4 : 1;
1364 unsigned : 1;
1365 unsigned : 1;
1366 unsigned : 1;
1367 };
1368
1369 struct
1370 {
1371 unsigned DACR : 5;
1372 unsigned : 3;
1373 };
1374 } __DACCON1bits_t;
1375
1376 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1377
1378 #define _DACR0 0x01
1379 #define _DACR1 0x02
1380 #define _DACR2 0x04
1381 #define _DACR3 0x08
1382 #define _DACR4 0x10
1383
1384 //==============================================================================
1385
1386
1387 //==============================================================================
1388 // APFCON Bits
1389
1390 extern __at(0x011D) __sfr APFCON;
1391
1392 typedef struct
1393 {
1394 unsigned P1SEL : 1;
1395 unsigned P2SEL : 1;
1396 unsigned : 1;
1397 unsigned T1GSEL : 1;
1398 unsigned : 1;
1399 unsigned CWGBSEL : 1;
1400 unsigned CWGASEL : 1;
1401 unsigned : 1;
1402 } __APFCONbits_t;
1403
1404 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1405
1406 #define _P1SEL 0x01
1407 #define _P2SEL 0x02
1408 #define _T1GSEL 0x08
1409 #define _CWGBSEL 0x20
1410 #define _CWGASEL 0x40
1411
1412 //==============================================================================
1413
1414
1415 //==============================================================================
1416 // APFCON0 Bits
1417
1418 extern __at(0x011D) __sfr APFCON0;
1419
1420 typedef struct
1421 {
1422 unsigned P1SEL : 1;
1423 unsigned P2SEL : 1;
1424 unsigned : 1;
1425 unsigned T1GSEL : 1;
1426 unsigned : 1;
1427 unsigned CWGBSEL : 1;
1428 unsigned CWGASEL : 1;
1429 unsigned : 1;
1430 } __APFCON0bits_t;
1431
1432 extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
1433
1434 #define _APFCON0_P1SEL 0x01
1435 #define _APFCON0_P2SEL 0x02
1436 #define _APFCON0_T1GSEL 0x08
1437 #define _APFCON0_CWGBSEL 0x20
1438 #define _APFCON0_CWGASEL 0x40
1439
1440 //==============================================================================
1441
1442
1443 //==============================================================================
1444 // ANSELA Bits
1445
1446 extern __at(0x018C) __sfr ANSELA;
1447
1448 typedef struct
1449 {
1450 unsigned ANSA0 : 1;
1451 unsigned ANSA1 : 1;
1452 unsigned ANSA2 : 1;
1453 unsigned : 1;
1454 unsigned ANSA4 : 1;
1455 unsigned : 1;
1456 unsigned : 1;
1457 unsigned : 1;
1458 } __ANSELAbits_t;
1459
1460 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1461
1462 #define _ANSA0 0x01
1463 #define _ANSA1 0x02
1464 #define _ANSA2 0x04
1465 #define _ANSA4 0x10
1466
1467 //==============================================================================
1468
1469 extern __at(0x0191) __sfr PMADR;
1470 extern __at(0x0191) __sfr PMADRL;
1471 extern __at(0x0192) __sfr PMADRH;
1472 extern __at(0x0193) __sfr PMDAT;
1473 extern __at(0x0193) __sfr PMDATL;
1474 extern __at(0x0194) __sfr PMDATH;
1475
1476 //==============================================================================
1477 // PMCON1 Bits
1478
1479 extern __at(0x0195) __sfr PMCON1;
1480
1481 typedef struct
1482 {
1483 unsigned RD : 1;
1484 unsigned WR : 1;
1485 unsigned WREN : 1;
1486 unsigned WRERR : 1;
1487 unsigned FREE : 1;
1488 unsigned LWLO : 1;
1489 unsigned CFGS : 1;
1490 unsigned : 1;
1491 } __PMCON1bits_t;
1492
1493 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1494
1495 #define _RD 0x01
1496 #define _WR 0x02
1497 #define _WREN 0x04
1498 #define _WRERR 0x08
1499 #define _FREE 0x10
1500 #define _LWLO 0x20
1501 #define _CFGS 0x40
1502
1503 //==============================================================================
1504
1505 extern __at(0x0196) __sfr PMCON2;
1506
1507 //==============================================================================
1508 // VREGCON Bits
1509
1510 extern __at(0x0197) __sfr VREGCON;
1511
1512 typedef struct
1513 {
1514 unsigned : 1;
1515 unsigned VREGPM : 1;
1516 unsigned : 1;
1517 unsigned : 1;
1518 unsigned : 1;
1519 unsigned : 1;
1520 unsigned : 1;
1521 unsigned : 1;
1522 } __VREGCONbits_t;
1523
1524 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1525
1526 #define _VREGPM 0x02
1527
1528 //==============================================================================
1529
1530
1531 //==============================================================================
1532 // WPUA Bits
1533
1534 extern __at(0x020C) __sfr WPUA;
1535
1536 typedef union
1537 {
1538 struct
1539 {
1540 unsigned WPUA0 : 1;
1541 unsigned WPUA1 : 1;
1542 unsigned WPUA2 : 1;
1543 unsigned WPUA3 : 1;
1544 unsigned WPUA4 : 1;
1545 unsigned WPUA5 : 1;
1546 unsigned : 1;
1547 unsigned : 1;
1548 };
1549
1550 struct
1551 {
1552 unsigned WPUA : 6;
1553 unsigned : 2;
1554 };
1555 } __WPUAbits_t;
1556
1557 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1558
1559 #define _WPUA0 0x01
1560 #define _WPUA1 0x02
1561 #define _WPUA2 0x04
1562 #define _WPUA3 0x08
1563 #define _WPUA4 0x10
1564 #define _WPUA5 0x20
1565
1566 //==============================================================================
1567
1568
1569 //==============================================================================
1570 // ODCONA Bits
1571
1572 extern __at(0x028C) __sfr ODCONA;
1573
1574 typedef struct
1575 {
1576 unsigned ODA0 : 1;
1577 unsigned ODA1 : 1;
1578 unsigned ODA2 : 1;
1579 unsigned : 1;
1580 unsigned ODA4 : 1;
1581 unsigned ODA5 : 1;
1582 unsigned : 1;
1583 unsigned : 1;
1584 } __ODCONAbits_t;
1585
1586 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
1587
1588 #define _ODA0 0x01
1589 #define _ODA1 0x02
1590 #define _ODA2 0x04
1591 #define _ODA4 0x10
1592 #define _ODA5 0x20
1593
1594 //==============================================================================
1595
1596
1597 //==============================================================================
1598 // SLRCONA Bits
1599
1600 extern __at(0x030C) __sfr SLRCONA;
1601
1602 typedef struct
1603 {
1604 unsigned SLRA0 : 1;
1605 unsigned SLRA1 : 1;
1606 unsigned SLRA2 : 1;
1607 unsigned : 1;
1608 unsigned SLRA4 : 1;
1609 unsigned SLRA5 : 1;
1610 unsigned : 1;
1611 unsigned : 1;
1612 } __SLRCONAbits_t;
1613
1614 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
1615
1616 #define _SLRA0 0x01
1617 #define _SLRA1 0x02
1618 #define _SLRA2 0x04
1619 #define _SLRA4 0x10
1620 #define _SLRA5 0x20
1621
1622 //==============================================================================
1623
1624
1625 //==============================================================================
1626 // INLVLA Bits
1627
1628 extern __at(0x038C) __sfr INLVLA;
1629
1630 typedef union
1631 {
1632 struct
1633 {
1634 unsigned INLVLA0 : 1;
1635 unsigned INLVLA1 : 1;
1636 unsigned INLVLA2 : 1;
1637 unsigned INLVLA3 : 1;
1638 unsigned INLVLA4 : 1;
1639 unsigned INLVLA5 : 1;
1640 unsigned : 1;
1641 unsigned : 1;
1642 };
1643
1644 struct
1645 {
1646 unsigned INLVLA : 6;
1647 unsigned : 2;
1648 };
1649 } __INLVLAbits_t;
1650
1651 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
1652
1653 #define _INLVLA0 0x01
1654 #define _INLVLA1 0x02
1655 #define _INLVLA2 0x04
1656 #define _INLVLA3 0x08
1657 #define _INLVLA4 0x10
1658 #define _INLVLA5 0x20
1659
1660 //==============================================================================
1661
1662
1663 //==============================================================================
1664 // IOCAP Bits
1665
1666 extern __at(0x0391) __sfr IOCAP;
1667
1668 typedef union
1669 {
1670 struct
1671 {
1672 unsigned IOCAP0 : 1;
1673 unsigned IOCAP1 : 1;
1674 unsigned IOCAP2 : 1;
1675 unsigned IOCAP3 : 1;
1676 unsigned IOCAP4 : 1;
1677 unsigned IOCAP5 : 1;
1678 unsigned : 1;
1679 unsigned : 1;
1680 };
1681
1682 struct
1683 {
1684 unsigned IOCAP : 6;
1685 unsigned : 2;
1686 };
1687 } __IOCAPbits_t;
1688
1689 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1690
1691 #define _IOCAP0 0x01
1692 #define _IOCAP1 0x02
1693 #define _IOCAP2 0x04
1694 #define _IOCAP3 0x08
1695 #define _IOCAP4 0x10
1696 #define _IOCAP5 0x20
1697
1698 //==============================================================================
1699
1700
1701 //==============================================================================
1702 // IOCAN Bits
1703
1704 extern __at(0x0392) __sfr IOCAN;
1705
1706 typedef union
1707 {
1708 struct
1709 {
1710 unsigned IOCAN0 : 1;
1711 unsigned IOCAN1 : 1;
1712 unsigned IOCAN2 : 1;
1713 unsigned IOCAN3 : 1;
1714 unsigned IOCAN4 : 1;
1715 unsigned IOCAN5 : 1;
1716 unsigned : 1;
1717 unsigned : 1;
1718 };
1719
1720 struct
1721 {
1722 unsigned IOCAN : 6;
1723 unsigned : 2;
1724 };
1725 } __IOCANbits_t;
1726
1727 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
1728
1729 #define _IOCAN0 0x01
1730 #define _IOCAN1 0x02
1731 #define _IOCAN2 0x04
1732 #define _IOCAN3 0x08
1733 #define _IOCAN4 0x10
1734 #define _IOCAN5 0x20
1735
1736 //==============================================================================
1737
1738
1739 //==============================================================================
1740 // IOCAF Bits
1741
1742 extern __at(0x0393) __sfr IOCAF;
1743
1744 typedef union
1745 {
1746 struct
1747 {
1748 unsigned IOCAF0 : 1;
1749 unsigned IOCAF1 : 1;
1750 unsigned IOCAF2 : 1;
1751 unsigned IOCAF3 : 1;
1752 unsigned IOCAF4 : 1;
1753 unsigned IOCAF5 : 1;
1754 unsigned : 1;
1755 unsigned : 1;
1756 };
1757
1758 struct
1759 {
1760 unsigned IOCAF : 6;
1761 unsigned : 2;
1762 };
1763 } __IOCAFbits_t;
1764
1765 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
1766
1767 #define _IOCAF0 0x01
1768 #define _IOCAF1 0x02
1769 #define _IOCAF2 0x04
1770 #define _IOCAF3 0x08
1771 #define _IOCAF4 0x10
1772 #define _IOCAF5 0x20
1773
1774 //==============================================================================
1775
1776
1777 //==============================================================================
1778 // CWG1DBR Bits
1779
1780 extern __at(0x0691) __sfr CWG1DBR;
1781
1782 typedef union
1783 {
1784 struct
1785 {
1786 unsigned CWG1DBR0 : 1;
1787 unsigned CWG1DBR1 : 1;
1788 unsigned CWG1DBR2 : 1;
1789 unsigned CWG1DBR3 : 1;
1790 unsigned CWG1DBR4 : 1;
1791 unsigned CWG1DBR5 : 1;
1792 unsigned : 1;
1793 unsigned : 1;
1794 };
1795
1796 struct
1797 {
1798 unsigned CWG1DBR : 6;
1799 unsigned : 2;
1800 };
1801 } __CWG1DBRbits_t;
1802
1803 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
1804
1805 #define _CWG1DBR0 0x01
1806 #define _CWG1DBR1 0x02
1807 #define _CWG1DBR2 0x04
1808 #define _CWG1DBR3 0x08
1809 #define _CWG1DBR4 0x10
1810 #define _CWG1DBR5 0x20
1811
1812 //==============================================================================
1813
1814
1815 //==============================================================================
1816 // CWG1DBF Bits
1817
1818 extern __at(0x0692) __sfr CWG1DBF;
1819
1820 typedef union
1821 {
1822 struct
1823 {
1824 unsigned CWG1DBF0 : 1;
1825 unsigned CWG1DBF1 : 1;
1826 unsigned CWG1DBF2 : 1;
1827 unsigned CWG1DBF3 : 1;
1828 unsigned CWG1DBF4 : 1;
1829 unsigned CWG1DBF5 : 1;
1830 unsigned : 1;
1831 unsigned : 1;
1832 };
1833
1834 struct
1835 {
1836 unsigned CWG1DBF : 6;
1837 unsigned : 2;
1838 };
1839 } __CWG1DBFbits_t;
1840
1841 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
1842
1843 #define _CWG1DBF0 0x01
1844 #define _CWG1DBF1 0x02
1845 #define _CWG1DBF2 0x04
1846 #define _CWG1DBF3 0x08
1847 #define _CWG1DBF4 0x10
1848 #define _CWG1DBF5 0x20
1849
1850 //==============================================================================
1851
1852
1853 //==============================================================================
1854 // CWG1CON0 Bits
1855
1856 extern __at(0x0693) __sfr CWG1CON0;
1857
1858 typedef struct
1859 {
1860 unsigned G1CS0 : 1;
1861 unsigned : 1;
1862 unsigned : 1;
1863 unsigned G1POLA : 1;
1864 unsigned G1POLB : 1;
1865 unsigned G1OEA : 1;
1866 unsigned G1OEB : 1;
1867 unsigned G1EN : 1;
1868 } __CWG1CON0bits_t;
1869
1870 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
1871
1872 #define _G1CS0 0x01
1873 #define _G1POLA 0x08
1874 #define _G1POLB 0x10
1875 #define _G1OEA 0x20
1876 #define _G1OEB 0x40
1877 #define _G1EN 0x80
1878
1879 //==============================================================================
1880
1881
1882 //==============================================================================
1883 // CWG1CON1 Bits
1884
1885 extern __at(0x0694) __sfr CWG1CON1;
1886
1887 typedef union
1888 {
1889 struct
1890 {
1891 unsigned G1IS0 : 1;
1892 unsigned G1IS1 : 1;
1893 unsigned G1IS2 : 1;
1894 unsigned : 1;
1895 unsigned G1ASDLA0 : 1;
1896 unsigned G1ASDLA1 : 1;
1897 unsigned G1ASDLB0 : 1;
1898 unsigned G1ASDLB1 : 1;
1899 };
1900
1901 struct
1902 {
1903 unsigned G1IS : 3;
1904 unsigned : 5;
1905 };
1906
1907 struct
1908 {
1909 unsigned : 4;
1910 unsigned G1ASDLA : 2;
1911 unsigned : 2;
1912 };
1913
1914 struct
1915 {
1916 unsigned : 6;
1917 unsigned G1ASDLB : 2;
1918 };
1919 } __CWG1CON1bits_t;
1920
1921 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
1922
1923 #define _G1IS0 0x01
1924 #define _G1IS1 0x02
1925 #define _G1IS2 0x04
1926 #define _G1ASDLA0 0x10
1927 #define _G1ASDLA1 0x20
1928 #define _G1ASDLB0 0x40
1929 #define _G1ASDLB1 0x80
1930
1931 //==============================================================================
1932
1933
1934 //==============================================================================
1935 // CWG1CON2 Bits
1936
1937 extern __at(0x0695) __sfr CWG1CON2;
1938
1939 typedef struct
1940 {
1941 unsigned : 1;
1942 unsigned G1ASDSFLT : 1;
1943 unsigned G1ASDSC1 : 1;
1944 unsigned : 1;
1945 unsigned : 1;
1946 unsigned : 1;
1947 unsigned G1ARSEN : 1;
1948 unsigned G1ASE : 1;
1949 } __CWG1CON2bits_t;
1950
1951 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
1952
1953 #define _G1ASDSFLT 0x02
1954 #define _G1ASDSC1 0x04
1955 #define _G1ARSEN 0x40
1956 #define _G1ASE 0x80
1957
1958 //==============================================================================
1959
1960
1961 //==============================================================================
1962 // PWMEN Bits
1963
1964 extern __at(0x0D8E) __sfr PWMEN;
1965
1966 typedef union
1967 {
1968 struct
1969 {
1970 unsigned PWM1EN_A : 1;
1971 unsigned PWM2EN_A : 1;
1972 unsigned PWM3EN_A : 1;
1973 unsigned : 1;
1974 unsigned : 1;
1975 unsigned : 1;
1976 unsigned : 1;
1977 unsigned : 1;
1978 };
1979
1980 struct
1981 {
1982 unsigned MPWM1EN : 1;
1983 unsigned MPWM2EN : 1;
1984 unsigned MPWM3EN : 1;
1985 unsigned : 1;
1986 unsigned : 1;
1987 unsigned : 1;
1988 unsigned : 1;
1989 unsigned : 1;
1990 };
1991 } __PWMENbits_t;
1992
1993 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
1994
1995 #define _PWM1EN_A 0x01
1996 #define _MPWM1EN 0x01
1997 #define _PWM2EN_A 0x02
1998 #define _MPWM2EN 0x02
1999 #define _PWM3EN_A 0x04
2000 #define _MPWM3EN 0x04
2001
2002 //==============================================================================
2003
2004
2005 //==============================================================================
2006 // PWMLD Bits
2007
2008 extern __at(0x0D8F) __sfr PWMLD;
2009
2010 typedef union
2011 {
2012 struct
2013 {
2014 unsigned PWM1LDA_A : 1;
2015 unsigned PWM2LDA_A : 1;
2016 unsigned PWM3LDA_A : 1;
2017 unsigned : 1;
2018 unsigned : 1;
2019 unsigned : 1;
2020 unsigned : 1;
2021 unsigned : 1;
2022 };
2023
2024 struct
2025 {
2026 unsigned MPWM1LD : 1;
2027 unsigned MPWM2LD : 1;
2028 unsigned MPWM3LD : 1;
2029 unsigned : 1;
2030 unsigned : 1;
2031 unsigned : 1;
2032 unsigned : 1;
2033 unsigned : 1;
2034 };
2035 } __PWMLDbits_t;
2036
2037 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
2038
2039 #define _PWM1LDA_A 0x01
2040 #define _MPWM1LD 0x01
2041 #define _PWM2LDA_A 0x02
2042 #define _MPWM2LD 0x02
2043 #define _PWM3LDA_A 0x04
2044 #define _MPWM3LD 0x04
2045
2046 //==============================================================================
2047
2048
2049 //==============================================================================
2050 // PWMOUT Bits
2051
2052 extern __at(0x0D90) __sfr PWMOUT;
2053
2054 typedef union
2055 {
2056 struct
2057 {
2058 unsigned PWM1OUT_A : 1;
2059 unsigned PWM2OUT_A : 1;
2060 unsigned PWM3OUT_A : 1;
2061 unsigned : 1;
2062 unsigned : 1;
2063 unsigned : 1;
2064 unsigned : 1;
2065 unsigned : 1;
2066 };
2067
2068 struct
2069 {
2070 unsigned MPWM1OUT : 1;
2071 unsigned MPWM2OUT : 1;
2072 unsigned MPWM3OUT : 1;
2073 unsigned : 1;
2074 unsigned : 1;
2075 unsigned : 1;
2076 unsigned : 1;
2077 unsigned : 1;
2078 };
2079 } __PWMOUTbits_t;
2080
2081 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
2082
2083 #define _PWM1OUT_A 0x01
2084 #define _MPWM1OUT 0x01
2085 #define _PWM2OUT_A 0x02
2086 #define _MPWM2OUT 0x02
2087 #define _PWM3OUT_A 0x04
2088 #define _MPWM3OUT 0x04
2089
2090 //==============================================================================
2091
2092 extern __at(0x0D91) __sfr PWM1PH;
2093
2094 //==============================================================================
2095 // PWM1PHL Bits
2096
2097 extern __at(0x0D91) __sfr PWM1PHL;
2098
2099 typedef struct
2100 {
2101 unsigned PWM1PHL0 : 1;
2102 unsigned PWM1PHL1 : 1;
2103 unsigned PWM1PHL2 : 1;
2104 unsigned PWM1PHL3 : 1;
2105 unsigned PWM1PHL4 : 1;
2106 unsigned PWM1PHL5 : 1;
2107 unsigned PWM1PHL6 : 1;
2108 unsigned PWM1PHL7 : 1;
2109 } __PWM1PHLbits_t;
2110
2111 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
2112
2113 #define _PWM1PHL0 0x01
2114 #define _PWM1PHL1 0x02
2115 #define _PWM1PHL2 0x04
2116 #define _PWM1PHL3 0x08
2117 #define _PWM1PHL4 0x10
2118 #define _PWM1PHL5 0x20
2119 #define _PWM1PHL6 0x40
2120 #define _PWM1PHL7 0x80
2121
2122 //==============================================================================
2123
2124
2125 //==============================================================================
2126 // PWM1PHH Bits
2127
2128 extern __at(0x0D92) __sfr PWM1PHH;
2129
2130 typedef struct
2131 {
2132 unsigned PWM1PHH0 : 1;
2133 unsigned PWM1PHH1 : 1;
2134 unsigned PWM1PHH2 : 1;
2135 unsigned PWM1PHH3 : 1;
2136 unsigned PWM1PHH4 : 1;
2137 unsigned PWM1PHH5 : 1;
2138 unsigned PWM1PHH6 : 1;
2139 unsigned PWM1PHH7 : 1;
2140 } __PWM1PHHbits_t;
2141
2142 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
2143
2144 #define _PWM1PHH0 0x01
2145 #define _PWM1PHH1 0x02
2146 #define _PWM1PHH2 0x04
2147 #define _PWM1PHH3 0x08
2148 #define _PWM1PHH4 0x10
2149 #define _PWM1PHH5 0x20
2150 #define _PWM1PHH6 0x40
2151 #define _PWM1PHH7 0x80
2152
2153 //==============================================================================
2154
2155 extern __at(0x0D93) __sfr PWM1DC;
2156
2157 //==============================================================================
2158 // PWM1DCL Bits
2159
2160 extern __at(0x0D93) __sfr PWM1DCL;
2161
2162 typedef struct
2163 {
2164 unsigned PWM1DCL0 : 1;
2165 unsigned PWM1DCL1 : 1;
2166 unsigned PWM1DCL2 : 1;
2167 unsigned PWM1DCL3 : 1;
2168 unsigned PWM1DCL4 : 1;
2169 unsigned PWM1DCL5 : 1;
2170 unsigned PWM1DCL6 : 1;
2171 unsigned PWM1DCL7 : 1;
2172 } __PWM1DCLbits_t;
2173
2174 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
2175
2176 #define _PWM1DCL0 0x01
2177 #define _PWM1DCL1 0x02
2178 #define _PWM1DCL2 0x04
2179 #define _PWM1DCL3 0x08
2180 #define _PWM1DCL4 0x10
2181 #define _PWM1DCL5 0x20
2182 #define _PWM1DCL6 0x40
2183 #define _PWM1DCL7 0x80
2184
2185 //==============================================================================
2186
2187
2188 //==============================================================================
2189 // PWM1DCH Bits
2190
2191 extern __at(0x0D94) __sfr PWM1DCH;
2192
2193 typedef struct
2194 {
2195 unsigned PWM1DCH0 : 1;
2196 unsigned PWM1DCH1 : 1;
2197 unsigned PWM1DCH2 : 1;
2198 unsigned PWM1DCH3 : 1;
2199 unsigned PWM1DCH4 : 1;
2200 unsigned PWM1DCH5 : 1;
2201 unsigned PWM1DCH6 : 1;
2202 unsigned PWM1DCH7 : 1;
2203 } __PWM1DCHbits_t;
2204
2205 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
2206
2207 #define _PWM1DCH0 0x01
2208 #define _PWM1DCH1 0x02
2209 #define _PWM1DCH2 0x04
2210 #define _PWM1DCH3 0x08
2211 #define _PWM1DCH4 0x10
2212 #define _PWM1DCH5 0x20
2213 #define _PWM1DCH6 0x40
2214 #define _PWM1DCH7 0x80
2215
2216 //==============================================================================
2217
2218 extern __at(0x0D95) __sfr PWM1PR;
2219
2220 //==============================================================================
2221 // PWM1PRL Bits
2222
2223 extern __at(0x0D95) __sfr PWM1PRL;
2224
2225 typedef struct
2226 {
2227 unsigned PWM1PRL0 : 1;
2228 unsigned PWM1PRL1 : 1;
2229 unsigned PWM1PRL2 : 1;
2230 unsigned PWM1PRL3 : 1;
2231 unsigned PWM1PRL4 : 1;
2232 unsigned PWM1PRL5 : 1;
2233 unsigned PWM1PRL6 : 1;
2234 unsigned PWM1PRL7 : 1;
2235 } __PWM1PRLbits_t;
2236
2237 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
2238
2239 #define _PWM1PRL0 0x01
2240 #define _PWM1PRL1 0x02
2241 #define _PWM1PRL2 0x04
2242 #define _PWM1PRL3 0x08
2243 #define _PWM1PRL4 0x10
2244 #define _PWM1PRL5 0x20
2245 #define _PWM1PRL6 0x40
2246 #define _PWM1PRL7 0x80
2247
2248 //==============================================================================
2249
2250
2251 //==============================================================================
2252 // PWM1PRH Bits
2253
2254 extern __at(0x0D96) __sfr PWM1PRH;
2255
2256 typedef struct
2257 {
2258 unsigned PWM1PRH0 : 1;
2259 unsigned PWM1PRH1 : 1;
2260 unsigned PWM1PRH2 : 1;
2261 unsigned PWM1PRH3 : 1;
2262 unsigned PWM1PRH4 : 1;
2263 unsigned PWM1PRH5 : 1;
2264 unsigned PWM1PRH6 : 1;
2265 unsigned PWM1PRH7 : 1;
2266 } __PWM1PRHbits_t;
2267
2268 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
2269
2270 #define _PWM1PRH0 0x01
2271 #define _PWM1PRH1 0x02
2272 #define _PWM1PRH2 0x04
2273 #define _PWM1PRH3 0x08
2274 #define _PWM1PRH4 0x10
2275 #define _PWM1PRH5 0x20
2276 #define _PWM1PRH6 0x40
2277 #define _PWM1PRH7 0x80
2278
2279 //==============================================================================
2280
2281 extern __at(0x0D97) __sfr PWM1OF;
2282
2283 //==============================================================================
2284 // PWM1OFL Bits
2285
2286 extern __at(0x0D97) __sfr PWM1OFL;
2287
2288 typedef struct
2289 {
2290 unsigned PWM1OFL0 : 1;
2291 unsigned PWM1OFL1 : 1;
2292 unsigned PWM1OFL2 : 1;
2293 unsigned PWM1OFL3 : 1;
2294 unsigned PWM1OFL4 : 1;
2295 unsigned PWM1OFL5 : 1;
2296 unsigned PWM1OFL6 : 1;
2297 unsigned PWM1OFL7 : 1;
2298 } __PWM1OFLbits_t;
2299
2300 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
2301
2302 #define _PWM1OFL0 0x01
2303 #define _PWM1OFL1 0x02
2304 #define _PWM1OFL2 0x04
2305 #define _PWM1OFL3 0x08
2306 #define _PWM1OFL4 0x10
2307 #define _PWM1OFL5 0x20
2308 #define _PWM1OFL6 0x40
2309 #define _PWM1OFL7 0x80
2310
2311 //==============================================================================
2312
2313
2314 //==============================================================================
2315 // PWM1OFH Bits
2316
2317 extern __at(0x0D98) __sfr PWM1OFH;
2318
2319 typedef struct
2320 {
2321 unsigned PWM1OFH0 : 1;
2322 unsigned PWM1OFH1 : 1;
2323 unsigned PWM1OFH2 : 1;
2324 unsigned PWM1OFH3 : 1;
2325 unsigned PWM1OFH4 : 1;
2326 unsigned PWM1OFH5 : 1;
2327 unsigned PWM1OFH6 : 1;
2328 unsigned PWM1OFH7 : 1;
2329 } __PWM1OFHbits_t;
2330
2331 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
2332
2333 #define _PWM1OFH0 0x01
2334 #define _PWM1OFH1 0x02
2335 #define _PWM1OFH2 0x04
2336 #define _PWM1OFH3 0x08
2337 #define _PWM1OFH4 0x10
2338 #define _PWM1OFH5 0x20
2339 #define _PWM1OFH6 0x40
2340 #define _PWM1OFH7 0x80
2341
2342 //==============================================================================
2343
2344 extern __at(0x0D99) __sfr PWM1TMR;
2345
2346 //==============================================================================
2347 // PWM1TMRL Bits
2348
2349 extern __at(0x0D99) __sfr PWM1TMRL;
2350
2351 typedef struct
2352 {
2353 unsigned PWM1TMRL0 : 1;
2354 unsigned PWM1TMRL1 : 1;
2355 unsigned PWM1TMRL2 : 1;
2356 unsigned PWM1TMRL3 : 1;
2357 unsigned PWM1TMRL4 : 1;
2358 unsigned PWM1TMRL5 : 1;
2359 unsigned PWM1TMRL6 : 1;
2360 unsigned PWM1TMRL7 : 1;
2361 } __PWM1TMRLbits_t;
2362
2363 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
2364
2365 #define _PWM1TMRL0 0x01
2366 #define _PWM1TMRL1 0x02
2367 #define _PWM1TMRL2 0x04
2368 #define _PWM1TMRL3 0x08
2369 #define _PWM1TMRL4 0x10
2370 #define _PWM1TMRL5 0x20
2371 #define _PWM1TMRL6 0x40
2372 #define _PWM1TMRL7 0x80
2373
2374 //==============================================================================
2375
2376
2377 //==============================================================================
2378 // PWM1TMRH Bits
2379
2380 extern __at(0x0D9A) __sfr PWM1TMRH;
2381
2382 typedef struct
2383 {
2384 unsigned PWM1TMRH0 : 1;
2385 unsigned PWM1TMRH1 : 1;
2386 unsigned PWM1TMRH2 : 1;
2387 unsigned PWM1TMRH3 : 1;
2388 unsigned PWM1TMRH4 : 1;
2389 unsigned PWM1TMRH5 : 1;
2390 unsigned PWM1TMRH6 : 1;
2391 unsigned PWM1TMRH7 : 1;
2392 } __PWM1TMRHbits_t;
2393
2394 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
2395
2396 #define _PWM1TMRH0 0x01
2397 #define _PWM1TMRH1 0x02
2398 #define _PWM1TMRH2 0x04
2399 #define _PWM1TMRH3 0x08
2400 #define _PWM1TMRH4 0x10
2401 #define _PWM1TMRH5 0x20
2402 #define _PWM1TMRH6 0x40
2403 #define _PWM1TMRH7 0x80
2404
2405 //==============================================================================
2406
2407
2408 //==============================================================================
2409 // PWM1CON Bits
2410
2411 extern __at(0x0D9B) __sfr PWM1CON;
2412
2413 typedef union
2414 {
2415 struct
2416 {
2417 unsigned : 1;
2418 unsigned : 1;
2419 unsigned PWM1MODE0 : 1;
2420 unsigned PWM1MODE1 : 1;
2421 unsigned POL : 1;
2422 unsigned OUT : 1;
2423 unsigned OE : 1;
2424 unsigned EN : 1;
2425 };
2426
2427 struct
2428 {
2429 unsigned : 1;
2430 unsigned : 1;
2431 unsigned MODE0 : 1;
2432 unsigned MODE1 : 1;
2433 unsigned PWM1POL : 1;
2434 unsigned PWM1OUT : 1;
2435 unsigned PWM1OE : 1;
2436 unsigned PWM1EN : 1;
2437 };
2438
2439 struct
2440 {
2441 unsigned : 2;
2442 unsigned MODE : 2;
2443 unsigned : 4;
2444 };
2445
2446 struct
2447 {
2448 unsigned : 2;
2449 unsigned PWM1MODE : 2;
2450 unsigned : 4;
2451 };
2452 } __PWM1CONbits_t;
2453
2454 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
2455
2456 #define _PWM1MODE0 0x04
2457 #define _MODE0 0x04
2458 #define _PWM1MODE1 0x08
2459 #define _MODE1 0x08
2460 #define _POL 0x10
2461 #define _PWM1POL 0x10
2462 #define _OUT 0x20
2463 #define _PWM1OUT 0x20
2464 #define _OE 0x40
2465 #define _PWM1OE 0x40
2466 #define _EN 0x80
2467 #define _PWM1EN 0x80
2468
2469 //==============================================================================
2470
2471
2472 //==============================================================================
2473 // PWM1INTCON Bits
2474
2475 extern __at(0x0D9C) __sfr PWM1INTCON;
2476
2477 typedef union
2478 {
2479 struct
2480 {
2481 unsigned PRIE : 1;
2482 unsigned DCIE : 1;
2483 unsigned PHIE : 1;
2484 unsigned OFIE : 1;
2485 unsigned : 1;
2486 unsigned : 1;
2487 unsigned : 1;
2488 unsigned : 1;
2489 };
2490
2491 struct
2492 {
2493 unsigned PWM1PRIE : 1;
2494 unsigned PWM1DCIE : 1;
2495 unsigned PWM1PHIE : 1;
2496 unsigned PWM1OFIE : 1;
2497 unsigned : 1;
2498 unsigned : 1;
2499 unsigned : 1;
2500 unsigned : 1;
2501 };
2502 } __PWM1INTCONbits_t;
2503
2504 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
2505
2506 #define _PRIE 0x01
2507 #define _PWM1PRIE 0x01
2508 #define _DCIE 0x02
2509 #define _PWM1DCIE 0x02
2510 #define _PHIE 0x04
2511 #define _PWM1PHIE 0x04
2512 #define _OFIE 0x08
2513 #define _PWM1OFIE 0x08
2514
2515 //==============================================================================
2516
2517
2518 //==============================================================================
2519 // PWM1INTE Bits
2520
2521 extern __at(0x0D9C) __sfr PWM1INTE;
2522
2523 typedef union
2524 {
2525 struct
2526 {
2527 unsigned PRIE : 1;
2528 unsigned DCIE : 1;
2529 unsigned PHIE : 1;
2530 unsigned OFIE : 1;
2531 unsigned : 1;
2532 unsigned : 1;
2533 unsigned : 1;
2534 unsigned : 1;
2535 };
2536
2537 struct
2538 {
2539 unsigned PWM1PRIE : 1;
2540 unsigned PWM1DCIE : 1;
2541 unsigned PWM1PHIE : 1;
2542 unsigned PWM1OFIE : 1;
2543 unsigned : 1;
2544 unsigned : 1;
2545 unsigned : 1;
2546 unsigned : 1;
2547 };
2548 } __PWM1INTEbits_t;
2549
2550 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
2551
2552 #define _PWM1INTE_PRIE 0x01
2553 #define _PWM1INTE_PWM1PRIE 0x01
2554 #define _PWM1INTE_DCIE 0x02
2555 #define _PWM1INTE_PWM1DCIE 0x02
2556 #define _PWM1INTE_PHIE 0x04
2557 #define _PWM1INTE_PWM1PHIE 0x04
2558 #define _PWM1INTE_OFIE 0x08
2559 #define _PWM1INTE_PWM1OFIE 0x08
2560
2561 //==============================================================================
2562
2563
2564 //==============================================================================
2565 // PWM1INTF Bits
2566
2567 extern __at(0x0D9D) __sfr PWM1INTF;
2568
2569 typedef union
2570 {
2571 struct
2572 {
2573 unsigned PRIF : 1;
2574 unsigned DCIF : 1;
2575 unsigned PHIF : 1;
2576 unsigned OFIF : 1;
2577 unsigned : 1;
2578 unsigned : 1;
2579 unsigned : 1;
2580 unsigned : 1;
2581 };
2582
2583 struct
2584 {
2585 unsigned PWM1PRIF : 1;
2586 unsigned PWM1DCIF : 1;
2587 unsigned PWM1PHIF : 1;
2588 unsigned PWM1OFIF : 1;
2589 unsigned : 1;
2590 unsigned : 1;
2591 unsigned : 1;
2592 unsigned : 1;
2593 };
2594 } __PWM1INTFbits_t;
2595
2596 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
2597
2598 #define _PRIF 0x01
2599 #define _PWM1PRIF 0x01
2600 #define _DCIF 0x02
2601 #define _PWM1DCIF 0x02
2602 #define _PHIF 0x04
2603 #define _PWM1PHIF 0x04
2604 #define _OFIF 0x08
2605 #define _PWM1OFIF 0x08
2606
2607 //==============================================================================
2608
2609
2610 //==============================================================================
2611 // PWM1INTFLG Bits
2612
2613 extern __at(0x0D9D) __sfr PWM1INTFLG;
2614
2615 typedef union
2616 {
2617 struct
2618 {
2619 unsigned PRIF : 1;
2620 unsigned DCIF : 1;
2621 unsigned PHIF : 1;
2622 unsigned OFIF : 1;
2623 unsigned : 1;
2624 unsigned : 1;
2625 unsigned : 1;
2626 unsigned : 1;
2627 };
2628
2629 struct
2630 {
2631 unsigned PWM1PRIF : 1;
2632 unsigned PWM1DCIF : 1;
2633 unsigned PWM1PHIF : 1;
2634 unsigned PWM1OFIF : 1;
2635 unsigned : 1;
2636 unsigned : 1;
2637 unsigned : 1;
2638 unsigned : 1;
2639 };
2640 } __PWM1INTFLGbits_t;
2641
2642 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
2643
2644 #define _PWM1INTFLG_PRIF 0x01
2645 #define _PWM1INTFLG_PWM1PRIF 0x01
2646 #define _PWM1INTFLG_DCIF 0x02
2647 #define _PWM1INTFLG_PWM1DCIF 0x02
2648 #define _PWM1INTFLG_PHIF 0x04
2649 #define _PWM1INTFLG_PWM1PHIF 0x04
2650 #define _PWM1INTFLG_OFIF 0x08
2651 #define _PWM1INTFLG_PWM1OFIF 0x08
2652
2653 //==============================================================================
2654
2655
2656 //==============================================================================
2657 // PWM1CLKCON Bits
2658
2659 extern __at(0x0D9E) __sfr PWM1CLKCON;
2660
2661 typedef union
2662 {
2663 struct
2664 {
2665 unsigned PWM1CS0 : 1;
2666 unsigned PWM1CS1 : 1;
2667 unsigned : 1;
2668 unsigned : 1;
2669 unsigned PWM1PS0 : 1;
2670 unsigned PWM1PS1 : 1;
2671 unsigned PWM1PS2 : 1;
2672 unsigned : 1;
2673 };
2674
2675 struct
2676 {
2677 unsigned CS0 : 1;
2678 unsigned CS1 : 1;
2679 unsigned : 1;
2680 unsigned : 1;
2681 unsigned PS0 : 1;
2682 unsigned PS1 : 1;
2683 unsigned PS2 : 1;
2684 unsigned : 1;
2685 };
2686
2687 struct
2688 {
2689 unsigned PWM1CS : 2;
2690 unsigned : 6;
2691 };
2692
2693 struct
2694 {
2695 unsigned CS : 2;
2696 unsigned : 6;
2697 };
2698
2699 struct
2700 {
2701 unsigned : 4;
2702 unsigned PWM1PS : 3;
2703 unsigned : 1;
2704 };
2705
2706 struct
2707 {
2708 unsigned : 4;
2709 unsigned PS : 3;
2710 unsigned : 1;
2711 };
2712 } __PWM1CLKCONbits_t;
2713
2714 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
2715
2716 #define _PWM1CLKCON_PWM1CS0 0x01
2717 #define _PWM1CLKCON_CS0 0x01
2718 #define _PWM1CLKCON_PWM1CS1 0x02
2719 #define _PWM1CLKCON_CS1 0x02
2720 #define _PWM1CLKCON_PWM1PS0 0x10
2721 #define _PWM1CLKCON_PS0 0x10
2722 #define _PWM1CLKCON_PWM1PS1 0x20
2723 #define _PWM1CLKCON_PS1 0x20
2724 #define _PWM1CLKCON_PWM1PS2 0x40
2725 #define _PWM1CLKCON_PS2 0x40
2726
2727 //==============================================================================
2728
2729
2730 //==============================================================================
2731 // PWM1LDCON Bits
2732
2733 extern __at(0x0D9F) __sfr PWM1LDCON;
2734
2735 typedef union
2736 {
2737 struct
2738 {
2739 unsigned PWM1LDS0 : 1;
2740 unsigned PWM1LDS1 : 1;
2741 unsigned : 1;
2742 unsigned : 1;
2743 unsigned : 1;
2744 unsigned : 1;
2745 unsigned LDT : 1;
2746 unsigned LDA : 1;
2747 };
2748
2749 struct
2750 {
2751 unsigned LDS0 : 1;
2752 unsigned LDS1 : 1;
2753 unsigned : 1;
2754 unsigned : 1;
2755 unsigned : 1;
2756 unsigned : 1;
2757 unsigned PWM1LDM : 1;
2758 unsigned PWM1LD : 1;
2759 };
2760
2761 struct
2762 {
2763 unsigned PWM1LDS : 2;
2764 unsigned : 6;
2765 };
2766
2767 struct
2768 {
2769 unsigned LDS : 2;
2770 unsigned : 6;
2771 };
2772 } __PWM1LDCONbits_t;
2773
2774 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
2775
2776 #define _PWM1LDS0 0x01
2777 #define _LDS0 0x01
2778 #define _PWM1LDS1 0x02
2779 #define _LDS1 0x02
2780 #define _LDT 0x40
2781 #define _PWM1LDM 0x40
2782 #define _LDA 0x80
2783 #define _PWM1LD 0x80
2784
2785 //==============================================================================
2786
2787
2788 //==============================================================================
2789 // PWM1OFCON Bits
2790
2791 extern __at(0x0DA0) __sfr PWM1OFCON;
2792
2793 typedef union
2794 {
2795 struct
2796 {
2797 unsigned PWM1OFS0 : 1;
2798 unsigned PWM1OFS1 : 1;
2799 unsigned : 1;
2800 unsigned : 1;
2801 unsigned OFO : 1;
2802 unsigned PWM1OFM0 : 1;
2803 unsigned PWM1OFM1 : 1;
2804 unsigned : 1;
2805 };
2806
2807 struct
2808 {
2809 unsigned OFS0 : 1;
2810 unsigned OFS1 : 1;
2811 unsigned : 1;
2812 unsigned : 1;
2813 unsigned PWM1OFMC : 1;
2814 unsigned OFM0 : 1;
2815 unsigned OFM1 : 1;
2816 unsigned : 1;
2817 };
2818
2819 struct
2820 {
2821 unsigned OFS : 2;
2822 unsigned : 6;
2823 };
2824
2825 struct
2826 {
2827 unsigned PWM1OFS : 2;
2828 unsigned : 6;
2829 };
2830
2831 struct
2832 {
2833 unsigned : 5;
2834 unsigned OFM : 2;
2835 unsigned : 1;
2836 };
2837
2838 struct
2839 {
2840 unsigned : 5;
2841 unsigned PWM1OFM : 2;
2842 unsigned : 1;
2843 };
2844 } __PWM1OFCONbits_t;
2845
2846 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
2847
2848 #define _PWM1OFS0 0x01
2849 #define _OFS0 0x01
2850 #define _PWM1OFS1 0x02
2851 #define _OFS1 0x02
2852 #define _OFO 0x10
2853 #define _PWM1OFMC 0x10
2854 #define _PWM1OFM0 0x20
2855 #define _OFM0 0x20
2856 #define _PWM1OFM1 0x40
2857 #define _OFM1 0x40
2858
2859 //==============================================================================
2860
2861 extern __at(0x0DA1) __sfr PWM2PH;
2862
2863 //==============================================================================
2864 // PWM2PHL Bits
2865
2866 extern __at(0x0DA1) __sfr PWM2PHL;
2867
2868 typedef struct
2869 {
2870 unsigned PWM2PHL0 : 1;
2871 unsigned PWM2PHL1 : 1;
2872 unsigned PWM2PHL2 : 1;
2873 unsigned PWM2PHL3 : 1;
2874 unsigned PWM2PHL4 : 1;
2875 unsigned PWM2PHL5 : 1;
2876 unsigned PWM2PHL6 : 1;
2877 unsigned PWM2PHL7 : 1;
2878 } __PWM2PHLbits_t;
2879
2880 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
2881
2882 #define _PWM2PHL0 0x01
2883 #define _PWM2PHL1 0x02
2884 #define _PWM2PHL2 0x04
2885 #define _PWM2PHL3 0x08
2886 #define _PWM2PHL4 0x10
2887 #define _PWM2PHL5 0x20
2888 #define _PWM2PHL6 0x40
2889 #define _PWM2PHL7 0x80
2890
2891 //==============================================================================
2892
2893
2894 //==============================================================================
2895 // PWM2PHH Bits
2896
2897 extern __at(0x0DA2) __sfr PWM2PHH;
2898
2899 typedef struct
2900 {
2901 unsigned PWM2PHH0 : 1;
2902 unsigned PWM2PHH1 : 1;
2903 unsigned PWM2PHH2 : 1;
2904 unsigned PWM2PHH3 : 1;
2905 unsigned PWM2PHH4 : 1;
2906 unsigned PWM2PHH5 : 1;
2907 unsigned PWM2PHH6 : 1;
2908 unsigned PWM2PHH7 : 1;
2909 } __PWM2PHHbits_t;
2910
2911 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
2912
2913 #define _PWM2PHH0 0x01
2914 #define _PWM2PHH1 0x02
2915 #define _PWM2PHH2 0x04
2916 #define _PWM2PHH3 0x08
2917 #define _PWM2PHH4 0x10
2918 #define _PWM2PHH5 0x20
2919 #define _PWM2PHH6 0x40
2920 #define _PWM2PHH7 0x80
2921
2922 //==============================================================================
2923
2924 extern __at(0x0DA3) __sfr PWM2DC;
2925
2926 //==============================================================================
2927 // PWM2DCL Bits
2928
2929 extern __at(0x0DA3) __sfr PWM2DCL;
2930
2931 typedef struct
2932 {
2933 unsigned PWM2DCL0 : 1;
2934 unsigned PWM2DCL1 : 1;
2935 unsigned PWM2DCL2 : 1;
2936 unsigned PWM2DCL3 : 1;
2937 unsigned PWM2DCL4 : 1;
2938 unsigned PWM2DCL5 : 1;
2939 unsigned PWM2DCL6 : 1;
2940 unsigned PWM2DCL7 : 1;
2941 } __PWM2DCLbits_t;
2942
2943 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
2944
2945 #define _PWM2DCL0 0x01
2946 #define _PWM2DCL1 0x02
2947 #define _PWM2DCL2 0x04
2948 #define _PWM2DCL3 0x08
2949 #define _PWM2DCL4 0x10
2950 #define _PWM2DCL5 0x20
2951 #define _PWM2DCL6 0x40
2952 #define _PWM2DCL7 0x80
2953
2954 //==============================================================================
2955
2956
2957 //==============================================================================
2958 // PWM2DCH Bits
2959
2960 extern __at(0x0DA4) __sfr PWM2DCH;
2961
2962 typedef struct
2963 {
2964 unsigned PWM2DCH0 : 1;
2965 unsigned PWM2DCH1 : 1;
2966 unsigned PWM2DCH2 : 1;
2967 unsigned PWM2DCH3 : 1;
2968 unsigned PWM2DCH4 : 1;
2969 unsigned PWM2DCH5 : 1;
2970 unsigned PWM2DCH6 : 1;
2971 unsigned PWM2DCH7 : 1;
2972 } __PWM2DCHbits_t;
2973
2974 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
2975
2976 #define _PWM2DCH0 0x01
2977 #define _PWM2DCH1 0x02
2978 #define _PWM2DCH2 0x04
2979 #define _PWM2DCH3 0x08
2980 #define _PWM2DCH4 0x10
2981 #define _PWM2DCH5 0x20
2982 #define _PWM2DCH6 0x40
2983 #define _PWM2DCH7 0x80
2984
2985 //==============================================================================
2986
2987 extern __at(0x0DA5) __sfr PWM2PR;
2988
2989 //==============================================================================
2990 // PWM2PRL Bits
2991
2992 extern __at(0x0DA5) __sfr PWM2PRL;
2993
2994 typedef struct
2995 {
2996 unsigned PWM2PRL0 : 1;
2997 unsigned PWM2PRL1 : 1;
2998 unsigned PWM2PRL2 : 1;
2999 unsigned PWM2PRL3 : 1;
3000 unsigned PWM2PRL4 : 1;
3001 unsigned PWM2PRL5 : 1;
3002 unsigned PWM2PRL6 : 1;
3003 unsigned PWM2PRL7 : 1;
3004 } __PWM2PRLbits_t;
3005
3006 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
3007
3008 #define _PWM2PRL0 0x01
3009 #define _PWM2PRL1 0x02
3010 #define _PWM2PRL2 0x04
3011 #define _PWM2PRL3 0x08
3012 #define _PWM2PRL4 0x10
3013 #define _PWM2PRL5 0x20
3014 #define _PWM2PRL6 0x40
3015 #define _PWM2PRL7 0x80
3016
3017 //==============================================================================
3018
3019
3020 //==============================================================================
3021 // PWM2PRH Bits
3022
3023 extern __at(0x0DA6) __sfr PWM2PRH;
3024
3025 typedef struct
3026 {
3027 unsigned PWM2PRH0 : 1;
3028 unsigned PWM2PRH1 : 1;
3029 unsigned PWM2PRH2 : 1;
3030 unsigned PWM2PRH3 : 1;
3031 unsigned PWM2PRH4 : 1;
3032 unsigned PWM2PRH5 : 1;
3033 unsigned PWM2PRH6 : 1;
3034 unsigned PWM2PRH7 : 1;
3035 } __PWM2PRHbits_t;
3036
3037 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
3038
3039 #define _PWM2PRH0 0x01
3040 #define _PWM2PRH1 0x02
3041 #define _PWM2PRH2 0x04
3042 #define _PWM2PRH3 0x08
3043 #define _PWM2PRH4 0x10
3044 #define _PWM2PRH5 0x20
3045 #define _PWM2PRH6 0x40
3046 #define _PWM2PRH7 0x80
3047
3048 //==============================================================================
3049
3050 extern __at(0x0DA7) __sfr PWM2OF;
3051
3052 //==============================================================================
3053 // PWM2OFL Bits
3054
3055 extern __at(0x0DA7) __sfr PWM2OFL;
3056
3057 typedef struct
3058 {
3059 unsigned PWM2OFL0 : 1;
3060 unsigned PWM2OFL1 : 1;
3061 unsigned PWM2OFL2 : 1;
3062 unsigned PWM2OFL3 : 1;
3063 unsigned PWM2OFL4 : 1;
3064 unsigned PWM2OFL5 : 1;
3065 unsigned PWM2OFL6 : 1;
3066 unsigned PWM2OFL7 : 1;
3067 } __PWM2OFLbits_t;
3068
3069 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
3070
3071 #define _PWM2OFL0 0x01
3072 #define _PWM2OFL1 0x02
3073 #define _PWM2OFL2 0x04
3074 #define _PWM2OFL3 0x08
3075 #define _PWM2OFL4 0x10
3076 #define _PWM2OFL5 0x20
3077 #define _PWM2OFL6 0x40
3078 #define _PWM2OFL7 0x80
3079
3080 //==============================================================================
3081
3082
3083 //==============================================================================
3084 // PWM2OFH Bits
3085
3086 extern __at(0x0DA8) __sfr PWM2OFH;
3087
3088 typedef struct
3089 {
3090 unsigned PWM2OFH0 : 1;
3091 unsigned PWM2OFH1 : 1;
3092 unsigned PWM2OFH2 : 1;
3093 unsigned PWM2OFH3 : 1;
3094 unsigned PWM2OFH4 : 1;
3095 unsigned PWM2OFH5 : 1;
3096 unsigned PWM2OFH6 : 1;
3097 unsigned PWM2OFH7 : 1;
3098 } __PWM2OFHbits_t;
3099
3100 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
3101
3102 #define _PWM2OFH0 0x01
3103 #define _PWM2OFH1 0x02
3104 #define _PWM2OFH2 0x04
3105 #define _PWM2OFH3 0x08
3106 #define _PWM2OFH4 0x10
3107 #define _PWM2OFH5 0x20
3108 #define _PWM2OFH6 0x40
3109 #define _PWM2OFH7 0x80
3110
3111 //==============================================================================
3112
3113 extern __at(0x0DA9) __sfr PWM2TMR;
3114
3115 //==============================================================================
3116 // PWM2TMRL Bits
3117
3118 extern __at(0x0DA9) __sfr PWM2TMRL;
3119
3120 typedef struct
3121 {
3122 unsigned PWM2TMRL0 : 1;
3123 unsigned PWM2TMRL1 : 1;
3124 unsigned PWM2TMRL2 : 1;
3125 unsigned PWM2TMRL3 : 1;
3126 unsigned PWM2TMRL4 : 1;
3127 unsigned PWM2TMRL5 : 1;
3128 unsigned PWM2TMRL6 : 1;
3129 unsigned PWM2TMRL7 : 1;
3130 } __PWM2TMRLbits_t;
3131
3132 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
3133
3134 #define _PWM2TMRL0 0x01
3135 #define _PWM2TMRL1 0x02
3136 #define _PWM2TMRL2 0x04
3137 #define _PWM2TMRL3 0x08
3138 #define _PWM2TMRL4 0x10
3139 #define _PWM2TMRL5 0x20
3140 #define _PWM2TMRL6 0x40
3141 #define _PWM2TMRL7 0x80
3142
3143 //==============================================================================
3144
3145
3146 //==============================================================================
3147 // PWM2TMRH Bits
3148
3149 extern __at(0x0DAA) __sfr PWM2TMRH;
3150
3151 typedef struct
3152 {
3153 unsigned PWM2TMRH0 : 1;
3154 unsigned PWM2TMRH1 : 1;
3155 unsigned PWM2TMRH2 : 1;
3156 unsigned PWM2TMRH3 : 1;
3157 unsigned PWM2TMRH4 : 1;
3158 unsigned PWM2TMRH5 : 1;
3159 unsigned PWM2TMRH6 : 1;
3160 unsigned PWM2TMRH7 : 1;
3161 } __PWM2TMRHbits_t;
3162
3163 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
3164
3165 #define _PWM2TMRH0 0x01
3166 #define _PWM2TMRH1 0x02
3167 #define _PWM2TMRH2 0x04
3168 #define _PWM2TMRH3 0x08
3169 #define _PWM2TMRH4 0x10
3170 #define _PWM2TMRH5 0x20
3171 #define _PWM2TMRH6 0x40
3172 #define _PWM2TMRH7 0x80
3173
3174 //==============================================================================
3175
3176
3177 //==============================================================================
3178 // PWM2CON Bits
3179
3180 extern __at(0x0DAB) __sfr PWM2CON;
3181
3182 typedef union
3183 {
3184 struct
3185 {
3186 unsigned : 1;
3187 unsigned : 1;
3188 unsigned PWM2MODE0 : 1;
3189 unsigned PWM2MODE1 : 1;
3190 unsigned POL : 1;
3191 unsigned OUT : 1;
3192 unsigned OE : 1;
3193 unsigned EN : 1;
3194 };
3195
3196 struct
3197 {
3198 unsigned : 1;
3199 unsigned : 1;
3200 unsigned MODE0 : 1;
3201 unsigned MODE1 : 1;
3202 unsigned PWM2POL : 1;
3203 unsigned PWM2OUT : 1;
3204 unsigned PWM2OE : 1;
3205 unsigned PWM2EN : 1;
3206 };
3207
3208 struct
3209 {
3210 unsigned : 2;
3211 unsigned MODE : 2;
3212 unsigned : 4;
3213 };
3214
3215 struct
3216 {
3217 unsigned : 2;
3218 unsigned PWM2MODE : 2;
3219 unsigned : 4;
3220 };
3221 } __PWM2CONbits_t;
3222
3223 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
3224
3225 #define _PWM2CON_PWM2MODE0 0x04
3226 #define _PWM2CON_MODE0 0x04
3227 #define _PWM2CON_PWM2MODE1 0x08
3228 #define _PWM2CON_MODE1 0x08
3229 #define _PWM2CON_POL 0x10
3230 #define _PWM2CON_PWM2POL 0x10
3231 #define _PWM2CON_OUT 0x20
3232 #define _PWM2CON_PWM2OUT 0x20
3233 #define _PWM2CON_OE 0x40
3234 #define _PWM2CON_PWM2OE 0x40
3235 #define _PWM2CON_EN 0x80
3236 #define _PWM2CON_PWM2EN 0x80
3237
3238 //==============================================================================
3239
3240
3241 //==============================================================================
3242 // PWM2INTCON Bits
3243
3244 extern __at(0x0DAC) __sfr PWM2INTCON;
3245
3246 typedef union
3247 {
3248 struct
3249 {
3250 unsigned PRIE : 1;
3251 unsigned DCIE : 1;
3252 unsigned PHIE : 1;
3253 unsigned OFIE : 1;
3254 unsigned : 1;
3255 unsigned : 1;
3256 unsigned : 1;
3257 unsigned : 1;
3258 };
3259
3260 struct
3261 {
3262 unsigned PWM2PRIE : 1;
3263 unsigned PWM2DCIE : 1;
3264 unsigned PWM2PHIE : 1;
3265 unsigned PWM2OFIE : 1;
3266 unsigned : 1;
3267 unsigned : 1;
3268 unsigned : 1;
3269 unsigned : 1;
3270 };
3271 } __PWM2INTCONbits_t;
3272
3273 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
3274
3275 #define _PWM2INTCON_PRIE 0x01
3276 #define _PWM2INTCON_PWM2PRIE 0x01
3277 #define _PWM2INTCON_DCIE 0x02
3278 #define _PWM2INTCON_PWM2DCIE 0x02
3279 #define _PWM2INTCON_PHIE 0x04
3280 #define _PWM2INTCON_PWM2PHIE 0x04
3281 #define _PWM2INTCON_OFIE 0x08
3282 #define _PWM2INTCON_PWM2OFIE 0x08
3283
3284 //==============================================================================
3285
3286
3287 //==============================================================================
3288 // PWM2INTE Bits
3289
3290 extern __at(0x0DAC) __sfr PWM2INTE;
3291
3292 typedef union
3293 {
3294 struct
3295 {
3296 unsigned PRIE : 1;
3297 unsigned DCIE : 1;
3298 unsigned PHIE : 1;
3299 unsigned OFIE : 1;
3300 unsigned : 1;
3301 unsigned : 1;
3302 unsigned : 1;
3303 unsigned : 1;
3304 };
3305
3306 struct
3307 {
3308 unsigned PWM2PRIE : 1;
3309 unsigned PWM2DCIE : 1;
3310 unsigned PWM2PHIE : 1;
3311 unsigned PWM2OFIE : 1;
3312 unsigned : 1;
3313 unsigned : 1;
3314 unsigned : 1;
3315 unsigned : 1;
3316 };
3317 } __PWM2INTEbits_t;
3318
3319 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
3320
3321 #define _PWM2INTE_PRIE 0x01
3322 #define _PWM2INTE_PWM2PRIE 0x01
3323 #define _PWM2INTE_DCIE 0x02
3324 #define _PWM2INTE_PWM2DCIE 0x02
3325 #define _PWM2INTE_PHIE 0x04
3326 #define _PWM2INTE_PWM2PHIE 0x04
3327 #define _PWM2INTE_OFIE 0x08
3328 #define _PWM2INTE_PWM2OFIE 0x08
3329
3330 //==============================================================================
3331
3332
3333 //==============================================================================
3334 // PWM2INTF Bits
3335
3336 extern __at(0x0DAD) __sfr PWM2INTF;
3337
3338 typedef union
3339 {
3340 struct
3341 {
3342 unsigned PRIF : 1;
3343 unsigned DCIF : 1;
3344 unsigned PHIF : 1;
3345 unsigned OFIF : 1;
3346 unsigned : 1;
3347 unsigned : 1;
3348 unsigned : 1;
3349 unsigned : 1;
3350 };
3351
3352 struct
3353 {
3354 unsigned PWM2PRIF : 1;
3355 unsigned PWM2DCIF : 1;
3356 unsigned PWM2PHIF : 1;
3357 unsigned PWM2OFIF : 1;
3358 unsigned : 1;
3359 unsigned : 1;
3360 unsigned : 1;
3361 unsigned : 1;
3362 };
3363 } __PWM2INTFbits_t;
3364
3365 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
3366
3367 #define _PWM2INTF_PRIF 0x01
3368 #define _PWM2INTF_PWM2PRIF 0x01
3369 #define _PWM2INTF_DCIF 0x02
3370 #define _PWM2INTF_PWM2DCIF 0x02
3371 #define _PWM2INTF_PHIF 0x04
3372 #define _PWM2INTF_PWM2PHIF 0x04
3373 #define _PWM2INTF_OFIF 0x08
3374 #define _PWM2INTF_PWM2OFIF 0x08
3375
3376 //==============================================================================
3377
3378
3379 //==============================================================================
3380 // PWM2INTFLG Bits
3381
3382 extern __at(0x0DAD) __sfr PWM2INTFLG;
3383
3384 typedef union
3385 {
3386 struct
3387 {
3388 unsigned PRIF : 1;
3389 unsigned DCIF : 1;
3390 unsigned PHIF : 1;
3391 unsigned OFIF : 1;
3392 unsigned : 1;
3393 unsigned : 1;
3394 unsigned : 1;
3395 unsigned : 1;
3396 };
3397
3398 struct
3399 {
3400 unsigned PWM2PRIF : 1;
3401 unsigned PWM2DCIF : 1;
3402 unsigned PWM2PHIF : 1;
3403 unsigned PWM2OFIF : 1;
3404 unsigned : 1;
3405 unsigned : 1;
3406 unsigned : 1;
3407 unsigned : 1;
3408 };
3409 } __PWM2INTFLGbits_t;
3410
3411 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
3412
3413 #define _PWM2INTFLG_PRIF 0x01
3414 #define _PWM2INTFLG_PWM2PRIF 0x01
3415 #define _PWM2INTFLG_DCIF 0x02
3416 #define _PWM2INTFLG_PWM2DCIF 0x02
3417 #define _PWM2INTFLG_PHIF 0x04
3418 #define _PWM2INTFLG_PWM2PHIF 0x04
3419 #define _PWM2INTFLG_OFIF 0x08
3420 #define _PWM2INTFLG_PWM2OFIF 0x08
3421
3422 //==============================================================================
3423
3424
3425 //==============================================================================
3426 // PWM2CLKCON Bits
3427
3428 extern __at(0x0DAE) __sfr PWM2CLKCON;
3429
3430 typedef union
3431 {
3432 struct
3433 {
3434 unsigned PWM2CS0 : 1;
3435 unsigned PWM2CS1 : 1;
3436 unsigned : 1;
3437 unsigned : 1;
3438 unsigned PWM2PS0 : 1;
3439 unsigned PWM2PS1 : 1;
3440 unsigned PWM2PS2 : 1;
3441 unsigned : 1;
3442 };
3443
3444 struct
3445 {
3446 unsigned CS0 : 1;
3447 unsigned CS1 : 1;
3448 unsigned : 1;
3449 unsigned : 1;
3450 unsigned PS0 : 1;
3451 unsigned PS1 : 1;
3452 unsigned PS2 : 1;
3453 unsigned : 1;
3454 };
3455
3456 struct
3457 {
3458 unsigned PWM2CS : 2;
3459 unsigned : 6;
3460 };
3461
3462 struct
3463 {
3464 unsigned CS : 2;
3465 unsigned : 6;
3466 };
3467
3468 struct
3469 {
3470 unsigned : 4;
3471 unsigned PWM2PS : 3;
3472 unsigned : 1;
3473 };
3474
3475 struct
3476 {
3477 unsigned : 4;
3478 unsigned PS : 3;
3479 unsigned : 1;
3480 };
3481 } __PWM2CLKCONbits_t;
3482
3483 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
3484
3485 #define _PWM2CLKCON_PWM2CS0 0x01
3486 #define _PWM2CLKCON_CS0 0x01
3487 #define _PWM2CLKCON_PWM2CS1 0x02
3488 #define _PWM2CLKCON_CS1 0x02
3489 #define _PWM2CLKCON_PWM2PS0 0x10
3490 #define _PWM2CLKCON_PS0 0x10
3491 #define _PWM2CLKCON_PWM2PS1 0x20
3492 #define _PWM2CLKCON_PS1 0x20
3493 #define _PWM2CLKCON_PWM2PS2 0x40
3494 #define _PWM2CLKCON_PS2 0x40
3495
3496 //==============================================================================
3497
3498
3499 //==============================================================================
3500 // PWM2LDCON Bits
3501
3502 extern __at(0x0DAF) __sfr PWM2LDCON;
3503
3504 typedef union
3505 {
3506 struct
3507 {
3508 unsigned PWM2LDS0 : 1;
3509 unsigned PWM2LDS1 : 1;
3510 unsigned : 1;
3511 unsigned : 1;
3512 unsigned : 1;
3513 unsigned : 1;
3514 unsigned LDT : 1;
3515 unsigned LDA : 1;
3516 };
3517
3518 struct
3519 {
3520 unsigned LDS0 : 1;
3521 unsigned LDS1 : 1;
3522 unsigned : 1;
3523 unsigned : 1;
3524 unsigned : 1;
3525 unsigned : 1;
3526 unsigned PWM2LDM : 1;
3527 unsigned PWM2LD : 1;
3528 };
3529
3530 struct
3531 {
3532 unsigned PWM2LDS : 2;
3533 unsigned : 6;
3534 };
3535
3536 struct
3537 {
3538 unsigned LDS : 2;
3539 unsigned : 6;
3540 };
3541 } __PWM2LDCONbits_t;
3542
3543 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
3544
3545 #define _PWM2LDCON_PWM2LDS0 0x01
3546 #define _PWM2LDCON_LDS0 0x01
3547 #define _PWM2LDCON_PWM2LDS1 0x02
3548 #define _PWM2LDCON_LDS1 0x02
3549 #define _PWM2LDCON_LDT 0x40
3550 #define _PWM2LDCON_PWM2LDM 0x40
3551 #define _PWM2LDCON_LDA 0x80
3552 #define _PWM2LDCON_PWM2LD 0x80
3553
3554 //==============================================================================
3555
3556
3557 //==============================================================================
3558 // PWM2OFCON Bits
3559
3560 extern __at(0x0DB0) __sfr PWM2OFCON;
3561
3562 typedef union
3563 {
3564 struct
3565 {
3566 unsigned PWM2OFS0 : 1;
3567 unsigned PWM2OFS1 : 1;
3568 unsigned : 1;
3569 unsigned : 1;
3570 unsigned OFO : 1;
3571 unsigned PWM2OFM0 : 1;
3572 unsigned PWM2OFM1 : 1;
3573 unsigned : 1;
3574 };
3575
3576 struct
3577 {
3578 unsigned OFS0 : 1;
3579 unsigned OFS1 : 1;
3580 unsigned : 1;
3581 unsigned : 1;
3582 unsigned PWM2OFMC : 1;
3583 unsigned OFM0 : 1;
3584 unsigned OFM1 : 1;
3585 unsigned : 1;
3586 };
3587
3588 struct
3589 {
3590 unsigned OFS : 2;
3591 unsigned : 6;
3592 };
3593
3594 struct
3595 {
3596 unsigned PWM2OFS : 2;
3597 unsigned : 6;
3598 };
3599
3600 struct
3601 {
3602 unsigned : 5;
3603 unsigned OFM : 2;
3604 unsigned : 1;
3605 };
3606
3607 struct
3608 {
3609 unsigned : 5;
3610 unsigned PWM2OFM : 2;
3611 unsigned : 1;
3612 };
3613 } __PWM2OFCONbits_t;
3614
3615 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
3616
3617 #define _PWM2OFCON_PWM2OFS0 0x01
3618 #define _PWM2OFCON_OFS0 0x01
3619 #define _PWM2OFCON_PWM2OFS1 0x02
3620 #define _PWM2OFCON_OFS1 0x02
3621 #define _PWM2OFCON_OFO 0x10
3622 #define _PWM2OFCON_PWM2OFMC 0x10
3623 #define _PWM2OFCON_PWM2OFM0 0x20
3624 #define _PWM2OFCON_OFM0 0x20
3625 #define _PWM2OFCON_PWM2OFM1 0x40
3626 #define _PWM2OFCON_OFM1 0x40
3627
3628 //==============================================================================
3629
3630 extern __at(0x0DB1) __sfr PWM3PH;
3631
3632 //==============================================================================
3633 // PWM3PHL Bits
3634
3635 extern __at(0x0DB1) __sfr PWM3PHL;
3636
3637 typedef struct
3638 {
3639 unsigned PWM3PHL0 : 1;
3640 unsigned PWM3PHL1 : 1;
3641 unsigned PWM3PHL2 : 1;
3642 unsigned PWM3PHL3 : 1;
3643 unsigned PWM3PHL4 : 1;
3644 unsigned PWM3PHL5 : 1;
3645 unsigned PWM3PHL6 : 1;
3646 unsigned PWM3PHL7 : 1;
3647 } __PWM3PHLbits_t;
3648
3649 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
3650
3651 #define _PWM3PHL0 0x01
3652 #define _PWM3PHL1 0x02
3653 #define _PWM3PHL2 0x04
3654 #define _PWM3PHL3 0x08
3655 #define _PWM3PHL4 0x10
3656 #define _PWM3PHL5 0x20
3657 #define _PWM3PHL6 0x40
3658 #define _PWM3PHL7 0x80
3659
3660 //==============================================================================
3661
3662
3663 //==============================================================================
3664 // PWM3PHH Bits
3665
3666 extern __at(0x0DB2) __sfr PWM3PHH;
3667
3668 typedef struct
3669 {
3670 unsigned PWM3PHH0 : 1;
3671 unsigned PWM3PHH1 : 1;
3672 unsigned PWM3PHH2 : 1;
3673 unsigned PWM3PHH3 : 1;
3674 unsigned PWM3PHH4 : 1;
3675 unsigned PWM3PHH5 : 1;
3676 unsigned PWM3PHH6 : 1;
3677 unsigned PWM3PHH7 : 1;
3678 } __PWM3PHHbits_t;
3679
3680 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
3681
3682 #define _PWM3PHH0 0x01
3683 #define _PWM3PHH1 0x02
3684 #define _PWM3PHH2 0x04
3685 #define _PWM3PHH3 0x08
3686 #define _PWM3PHH4 0x10
3687 #define _PWM3PHH5 0x20
3688 #define _PWM3PHH6 0x40
3689 #define _PWM3PHH7 0x80
3690
3691 //==============================================================================
3692
3693 extern __at(0x0DB3) __sfr PWM3DC;
3694
3695 //==============================================================================
3696 // PWM3DCL Bits
3697
3698 extern __at(0x0DB3) __sfr PWM3DCL;
3699
3700 typedef struct
3701 {
3702 unsigned PWM3DCL0 : 1;
3703 unsigned PWM3DCL1 : 1;
3704 unsigned PWM3DCL2 : 1;
3705 unsigned PWM3DCL3 : 1;
3706 unsigned PWM3DCL4 : 1;
3707 unsigned PWM3DCL5 : 1;
3708 unsigned PWM3DCL6 : 1;
3709 unsigned PWM3DCL7 : 1;
3710 } __PWM3DCLbits_t;
3711
3712 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
3713
3714 #define _PWM3DCL0 0x01
3715 #define _PWM3DCL1 0x02
3716 #define _PWM3DCL2 0x04
3717 #define _PWM3DCL3 0x08
3718 #define _PWM3DCL4 0x10
3719 #define _PWM3DCL5 0x20
3720 #define _PWM3DCL6 0x40
3721 #define _PWM3DCL7 0x80
3722
3723 //==============================================================================
3724
3725
3726 //==============================================================================
3727 // PWM3DCH Bits
3728
3729 extern __at(0x0DB4) __sfr PWM3DCH;
3730
3731 typedef struct
3732 {
3733 unsigned PWM3DCH0 : 1;
3734 unsigned PWM3DCH1 : 1;
3735 unsigned PWM3DCH2 : 1;
3736 unsigned PWM3DCH3 : 1;
3737 unsigned PWM3DCH4 : 1;
3738 unsigned PWM3DCH5 : 1;
3739 unsigned PWM3DCH6 : 1;
3740 unsigned PWM3DCH7 : 1;
3741 } __PWM3DCHbits_t;
3742
3743 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
3744
3745 #define _PWM3DCH0 0x01
3746 #define _PWM3DCH1 0x02
3747 #define _PWM3DCH2 0x04
3748 #define _PWM3DCH3 0x08
3749 #define _PWM3DCH4 0x10
3750 #define _PWM3DCH5 0x20
3751 #define _PWM3DCH6 0x40
3752 #define _PWM3DCH7 0x80
3753
3754 //==============================================================================
3755
3756 extern __at(0x0DB5) __sfr PWM3PR;
3757
3758 //==============================================================================
3759 // PWM3PRL Bits
3760
3761 extern __at(0x0DB5) __sfr PWM3PRL;
3762
3763 typedef struct
3764 {
3765 unsigned PWM3PRL0 : 1;
3766 unsigned PWM3PRL1 : 1;
3767 unsigned PWM3PRL2 : 1;
3768 unsigned PWM3PRL3 : 1;
3769 unsigned PWM3PRL4 : 1;
3770 unsigned PWM3PRL5 : 1;
3771 unsigned PWM3PRL6 : 1;
3772 unsigned PWM3PRL7 : 1;
3773 } __PWM3PRLbits_t;
3774
3775 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
3776
3777 #define _PWM3PRL0 0x01
3778 #define _PWM3PRL1 0x02
3779 #define _PWM3PRL2 0x04
3780 #define _PWM3PRL3 0x08
3781 #define _PWM3PRL4 0x10
3782 #define _PWM3PRL5 0x20
3783 #define _PWM3PRL6 0x40
3784 #define _PWM3PRL7 0x80
3785
3786 //==============================================================================
3787
3788
3789 //==============================================================================
3790 // PWM3PRH Bits
3791
3792 extern __at(0x0DB6) __sfr PWM3PRH;
3793
3794 typedef struct
3795 {
3796 unsigned PWM3PRH0 : 1;
3797 unsigned PWM3PRH1 : 1;
3798 unsigned PWM3PRH2 : 1;
3799 unsigned PWM3PRH3 : 1;
3800 unsigned PWM3PRH4 : 1;
3801 unsigned PWM3PRH5 : 1;
3802 unsigned PWM3PRH6 : 1;
3803 unsigned PWM3PRH7 : 1;
3804 } __PWM3PRHbits_t;
3805
3806 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
3807
3808 #define _PWM3PRH0 0x01
3809 #define _PWM3PRH1 0x02
3810 #define _PWM3PRH2 0x04
3811 #define _PWM3PRH3 0x08
3812 #define _PWM3PRH4 0x10
3813 #define _PWM3PRH5 0x20
3814 #define _PWM3PRH6 0x40
3815 #define _PWM3PRH7 0x80
3816
3817 //==============================================================================
3818
3819 extern __at(0x0DB7) __sfr PWM3OF;
3820
3821 //==============================================================================
3822 // PWM3OFL Bits
3823
3824 extern __at(0x0DB7) __sfr PWM3OFL;
3825
3826 typedef struct
3827 {
3828 unsigned PWM3OFL0 : 1;
3829 unsigned PWM3OFL1 : 1;
3830 unsigned PWM3OFL2 : 1;
3831 unsigned PWM3OFL3 : 1;
3832 unsigned PWM3OFL4 : 1;
3833 unsigned PWM3OFL5 : 1;
3834 unsigned PWM3OFL6 : 1;
3835 unsigned PWM3OFL7 : 1;
3836 } __PWM3OFLbits_t;
3837
3838 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
3839
3840 #define _PWM3OFL0 0x01
3841 #define _PWM3OFL1 0x02
3842 #define _PWM3OFL2 0x04
3843 #define _PWM3OFL3 0x08
3844 #define _PWM3OFL4 0x10
3845 #define _PWM3OFL5 0x20
3846 #define _PWM3OFL6 0x40
3847 #define _PWM3OFL7 0x80
3848
3849 //==============================================================================
3850
3851
3852 //==============================================================================
3853 // PWM3OFH Bits
3854
3855 extern __at(0x0DB8) __sfr PWM3OFH;
3856
3857 typedef struct
3858 {
3859 unsigned PWM3OFH0 : 1;
3860 unsigned PWM3OFH1 : 1;
3861 unsigned PWM3OFH2 : 1;
3862 unsigned PWM3OFH3 : 1;
3863 unsigned PWM3OFH4 : 1;
3864 unsigned PWM3OFH5 : 1;
3865 unsigned PWM3OFH6 : 1;
3866 unsigned PWM3OFH7 : 1;
3867 } __PWM3OFHbits_t;
3868
3869 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
3870
3871 #define _PWM3OFH0 0x01
3872 #define _PWM3OFH1 0x02
3873 #define _PWM3OFH2 0x04
3874 #define _PWM3OFH3 0x08
3875 #define _PWM3OFH4 0x10
3876 #define _PWM3OFH5 0x20
3877 #define _PWM3OFH6 0x40
3878 #define _PWM3OFH7 0x80
3879
3880 //==============================================================================
3881
3882 extern __at(0x0DB9) __sfr PWM3TMR;
3883
3884 //==============================================================================
3885 // PWM3TMRL Bits
3886
3887 extern __at(0x0DB9) __sfr PWM3TMRL;
3888
3889 typedef struct
3890 {
3891 unsigned PWM3TMRL0 : 1;
3892 unsigned PWM3TMRL1 : 1;
3893 unsigned PWM3TMRL2 : 1;
3894 unsigned PWM3TMRL3 : 1;
3895 unsigned PWM3TMRL4 : 1;
3896 unsigned PWM3TMRL5 : 1;
3897 unsigned PWM3TMRL6 : 1;
3898 unsigned PWM3TMRL7 : 1;
3899 } __PWM3TMRLbits_t;
3900
3901 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
3902
3903 #define _PWM3TMRL0 0x01
3904 #define _PWM3TMRL1 0x02
3905 #define _PWM3TMRL2 0x04
3906 #define _PWM3TMRL3 0x08
3907 #define _PWM3TMRL4 0x10
3908 #define _PWM3TMRL5 0x20
3909 #define _PWM3TMRL6 0x40
3910 #define _PWM3TMRL7 0x80
3911
3912 //==============================================================================
3913
3914
3915 //==============================================================================
3916 // PWM3TMRH Bits
3917
3918 extern __at(0x0DBA) __sfr PWM3TMRH;
3919
3920 typedef struct
3921 {
3922 unsigned PWM3TMRH0 : 1;
3923 unsigned PWM3TMRH1 : 1;
3924 unsigned PWM3TMRH2 : 1;
3925 unsigned PWM3TMRH3 : 1;
3926 unsigned PWM3TMRH4 : 1;
3927 unsigned PWM3TMRH5 : 1;
3928 unsigned PWM3TMRH6 : 1;
3929 unsigned PWM3TMRH7 : 1;
3930 } __PWM3TMRHbits_t;
3931
3932 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
3933
3934 #define _PWM3TMRH0 0x01
3935 #define _PWM3TMRH1 0x02
3936 #define _PWM3TMRH2 0x04
3937 #define _PWM3TMRH3 0x08
3938 #define _PWM3TMRH4 0x10
3939 #define _PWM3TMRH5 0x20
3940 #define _PWM3TMRH6 0x40
3941 #define _PWM3TMRH7 0x80
3942
3943 //==============================================================================
3944
3945
3946 //==============================================================================
3947 // PWM3CON Bits
3948
3949 extern __at(0x0DBB) __sfr PWM3CON;
3950
3951 typedef union
3952 {
3953 struct
3954 {
3955 unsigned : 1;
3956 unsigned : 1;
3957 unsigned PWM3MODE0 : 1;
3958 unsigned PWM3MODE1 : 1;
3959 unsigned POL : 1;
3960 unsigned OUT : 1;
3961 unsigned OE : 1;
3962 unsigned EN : 1;
3963 };
3964
3965 struct
3966 {
3967 unsigned : 1;
3968 unsigned : 1;
3969 unsigned MODE0 : 1;
3970 unsigned MODE1 : 1;
3971 unsigned PWM3POL : 1;
3972 unsigned PWM3OUT : 1;
3973 unsigned PWM3OE : 1;
3974 unsigned PWM3EN : 1;
3975 };
3976
3977 struct
3978 {
3979 unsigned : 2;
3980 unsigned MODE : 2;
3981 unsigned : 4;
3982 };
3983
3984 struct
3985 {
3986 unsigned : 2;
3987 unsigned PWM3MODE : 2;
3988 unsigned : 4;
3989 };
3990 } __PWM3CONbits_t;
3991
3992 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
3993
3994 #define _PWM3CON_PWM3MODE0 0x04
3995 #define _PWM3CON_MODE0 0x04
3996 #define _PWM3CON_PWM3MODE1 0x08
3997 #define _PWM3CON_MODE1 0x08
3998 #define _PWM3CON_POL 0x10
3999 #define _PWM3CON_PWM3POL 0x10
4000 #define _PWM3CON_OUT 0x20
4001 #define _PWM3CON_PWM3OUT 0x20
4002 #define _PWM3CON_OE 0x40
4003 #define _PWM3CON_PWM3OE 0x40
4004 #define _PWM3CON_EN 0x80
4005 #define _PWM3CON_PWM3EN 0x80
4006
4007 //==============================================================================
4008
4009
4010 //==============================================================================
4011 // PWM3INTCON Bits
4012
4013 extern __at(0x0DBC) __sfr PWM3INTCON;
4014
4015 typedef union
4016 {
4017 struct
4018 {
4019 unsigned PRIE : 1;
4020 unsigned DCIE : 1;
4021 unsigned PHIE : 1;
4022 unsigned OFIE : 1;
4023 unsigned : 1;
4024 unsigned : 1;
4025 unsigned : 1;
4026 unsigned : 1;
4027 };
4028
4029 struct
4030 {
4031 unsigned PWM3PRIE : 1;
4032 unsigned PWM3DCIE : 1;
4033 unsigned PWM3PHIE : 1;
4034 unsigned PWM3OFIE : 1;
4035 unsigned : 1;
4036 unsigned : 1;
4037 unsigned : 1;
4038 unsigned : 1;
4039 };
4040 } __PWM3INTCONbits_t;
4041
4042 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
4043
4044 #define _PWM3INTCON_PRIE 0x01
4045 #define _PWM3INTCON_PWM3PRIE 0x01
4046 #define _PWM3INTCON_DCIE 0x02
4047 #define _PWM3INTCON_PWM3DCIE 0x02
4048 #define _PWM3INTCON_PHIE 0x04
4049 #define _PWM3INTCON_PWM3PHIE 0x04
4050 #define _PWM3INTCON_OFIE 0x08
4051 #define _PWM3INTCON_PWM3OFIE 0x08
4052
4053 //==============================================================================
4054
4055
4056 //==============================================================================
4057 // PWM3INTE Bits
4058
4059 extern __at(0x0DBC) __sfr PWM3INTE;
4060
4061 typedef union
4062 {
4063 struct
4064 {
4065 unsigned PRIE : 1;
4066 unsigned DCIE : 1;
4067 unsigned PHIE : 1;
4068 unsigned OFIE : 1;
4069 unsigned : 1;
4070 unsigned : 1;
4071 unsigned : 1;
4072 unsigned : 1;
4073 };
4074
4075 struct
4076 {
4077 unsigned PWM3PRIE : 1;
4078 unsigned PWM3DCIE : 1;
4079 unsigned PWM3PHIE : 1;
4080 unsigned PWM3OFIE : 1;
4081 unsigned : 1;
4082 unsigned : 1;
4083 unsigned : 1;
4084 unsigned : 1;
4085 };
4086 } __PWM3INTEbits_t;
4087
4088 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
4089
4090 #define _PWM3INTE_PRIE 0x01
4091 #define _PWM3INTE_PWM3PRIE 0x01
4092 #define _PWM3INTE_DCIE 0x02
4093 #define _PWM3INTE_PWM3DCIE 0x02
4094 #define _PWM3INTE_PHIE 0x04
4095 #define _PWM3INTE_PWM3PHIE 0x04
4096 #define _PWM3INTE_OFIE 0x08
4097 #define _PWM3INTE_PWM3OFIE 0x08
4098
4099 //==============================================================================
4100
4101
4102 //==============================================================================
4103 // PWM3INTF Bits
4104
4105 extern __at(0x0DBD) __sfr PWM3INTF;
4106
4107 typedef union
4108 {
4109 struct
4110 {
4111 unsigned PRIF : 1;
4112 unsigned DCIF : 1;
4113 unsigned PHIF : 1;
4114 unsigned OFIF : 1;
4115 unsigned : 1;
4116 unsigned : 1;
4117 unsigned : 1;
4118 unsigned : 1;
4119 };
4120
4121 struct
4122 {
4123 unsigned PWM3PRIF : 1;
4124 unsigned PWM3DCIF : 1;
4125 unsigned PWM3PHIF : 1;
4126 unsigned PWM3OFIF : 1;
4127 unsigned : 1;
4128 unsigned : 1;
4129 unsigned : 1;
4130 unsigned : 1;
4131 };
4132 } __PWM3INTFbits_t;
4133
4134 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
4135
4136 #define _PWM3INTF_PRIF 0x01
4137 #define _PWM3INTF_PWM3PRIF 0x01
4138 #define _PWM3INTF_DCIF 0x02
4139 #define _PWM3INTF_PWM3DCIF 0x02
4140 #define _PWM3INTF_PHIF 0x04
4141 #define _PWM3INTF_PWM3PHIF 0x04
4142 #define _PWM3INTF_OFIF 0x08
4143 #define _PWM3INTF_PWM3OFIF 0x08
4144
4145 //==============================================================================
4146
4147
4148 //==============================================================================
4149 // PWM3INTFLG Bits
4150
4151 extern __at(0x0DBD) __sfr PWM3INTFLG;
4152
4153 typedef union
4154 {
4155 struct
4156 {
4157 unsigned PRIF : 1;
4158 unsigned DCIF : 1;
4159 unsigned PHIF : 1;
4160 unsigned OFIF : 1;
4161 unsigned : 1;
4162 unsigned : 1;
4163 unsigned : 1;
4164 unsigned : 1;
4165 };
4166
4167 struct
4168 {
4169 unsigned PWM3PRIF : 1;
4170 unsigned PWM3DCIF : 1;
4171 unsigned PWM3PHIF : 1;
4172 unsigned PWM3OFIF : 1;
4173 unsigned : 1;
4174 unsigned : 1;
4175 unsigned : 1;
4176 unsigned : 1;
4177 };
4178 } __PWM3INTFLGbits_t;
4179
4180 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
4181
4182 #define _PWM3INTFLG_PRIF 0x01
4183 #define _PWM3INTFLG_PWM3PRIF 0x01
4184 #define _PWM3INTFLG_DCIF 0x02
4185 #define _PWM3INTFLG_PWM3DCIF 0x02
4186 #define _PWM3INTFLG_PHIF 0x04
4187 #define _PWM3INTFLG_PWM3PHIF 0x04
4188 #define _PWM3INTFLG_OFIF 0x08
4189 #define _PWM3INTFLG_PWM3OFIF 0x08
4190
4191 //==============================================================================
4192
4193
4194 //==============================================================================
4195 // PWM3CLKCON Bits
4196
4197 extern __at(0x0DBE) __sfr PWM3CLKCON;
4198
4199 typedef union
4200 {
4201 struct
4202 {
4203 unsigned PWM3CS0 : 1;
4204 unsigned PWM3CS1 : 1;
4205 unsigned : 1;
4206 unsigned : 1;
4207 unsigned PWM3PS0 : 1;
4208 unsigned PWM3PS1 : 1;
4209 unsigned PWM3PS2 : 1;
4210 unsigned : 1;
4211 };
4212
4213 struct
4214 {
4215 unsigned CS0 : 1;
4216 unsigned CS1 : 1;
4217 unsigned : 1;
4218 unsigned : 1;
4219 unsigned PS0 : 1;
4220 unsigned PS1 : 1;
4221 unsigned PS2 : 1;
4222 unsigned : 1;
4223 };
4224
4225 struct
4226 {
4227 unsigned PWM3CS : 2;
4228 unsigned : 6;
4229 };
4230
4231 struct
4232 {
4233 unsigned CS : 2;
4234 unsigned : 6;
4235 };
4236
4237 struct
4238 {
4239 unsigned : 4;
4240 unsigned PS : 3;
4241 unsigned : 1;
4242 };
4243
4244 struct
4245 {
4246 unsigned : 4;
4247 unsigned PWM3PS : 3;
4248 unsigned : 1;
4249 };
4250 } __PWM3CLKCONbits_t;
4251
4252 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
4253
4254 #define _PWM3CLKCON_PWM3CS0 0x01
4255 #define _PWM3CLKCON_CS0 0x01
4256 #define _PWM3CLKCON_PWM3CS1 0x02
4257 #define _PWM3CLKCON_CS1 0x02
4258 #define _PWM3CLKCON_PWM3PS0 0x10
4259 #define _PWM3CLKCON_PS0 0x10
4260 #define _PWM3CLKCON_PWM3PS1 0x20
4261 #define _PWM3CLKCON_PS1 0x20
4262 #define _PWM3CLKCON_PWM3PS2 0x40
4263 #define _PWM3CLKCON_PS2 0x40
4264
4265 //==============================================================================
4266
4267
4268 //==============================================================================
4269 // PWM3LDCON Bits
4270
4271 extern __at(0x0DBF) __sfr PWM3LDCON;
4272
4273 typedef union
4274 {
4275 struct
4276 {
4277 unsigned PWM3LDS0 : 1;
4278 unsigned PWM3LDS1 : 1;
4279 unsigned : 1;
4280 unsigned : 1;
4281 unsigned : 1;
4282 unsigned : 1;
4283 unsigned LDT : 1;
4284 unsigned LDA : 1;
4285 };
4286
4287 struct
4288 {
4289 unsigned LDS0 : 1;
4290 unsigned LDS1 : 1;
4291 unsigned : 1;
4292 unsigned : 1;
4293 unsigned : 1;
4294 unsigned : 1;
4295 unsigned PWM3LDM : 1;
4296 unsigned PWM3LD : 1;
4297 };
4298
4299 struct
4300 {
4301 unsigned LDS : 2;
4302 unsigned : 6;
4303 };
4304
4305 struct
4306 {
4307 unsigned PWM3LDS : 2;
4308 unsigned : 6;
4309 };
4310 } __PWM3LDCONbits_t;
4311
4312 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
4313
4314 #define _PWM3LDCON_PWM3LDS0 0x01
4315 #define _PWM3LDCON_LDS0 0x01
4316 #define _PWM3LDCON_PWM3LDS1 0x02
4317 #define _PWM3LDCON_LDS1 0x02
4318 #define _PWM3LDCON_LDT 0x40
4319 #define _PWM3LDCON_PWM3LDM 0x40
4320 #define _PWM3LDCON_LDA 0x80
4321 #define _PWM3LDCON_PWM3LD 0x80
4322
4323 //==============================================================================
4324
4325
4326 //==============================================================================
4327 // PWM3OFCON Bits
4328
4329 extern __at(0x0DC0) __sfr PWM3OFCON;
4330
4331 typedef union
4332 {
4333 struct
4334 {
4335 unsigned PWM3OFS0 : 1;
4336 unsigned PWM3OFS1 : 1;
4337 unsigned : 1;
4338 unsigned : 1;
4339 unsigned OFO : 1;
4340 unsigned PWM3OFM0 : 1;
4341 unsigned PWM3OFM1 : 1;
4342 unsigned : 1;
4343 };
4344
4345 struct
4346 {
4347 unsigned OFS0 : 1;
4348 unsigned OFS1 : 1;
4349 unsigned : 1;
4350 unsigned : 1;
4351 unsigned PWM3OFMC : 1;
4352 unsigned OFM0 : 1;
4353 unsigned OFM1 : 1;
4354 unsigned : 1;
4355 };
4356
4357 struct
4358 {
4359 unsigned OFS : 2;
4360 unsigned : 6;
4361 };
4362
4363 struct
4364 {
4365 unsigned PWM3OFS : 2;
4366 unsigned : 6;
4367 };
4368
4369 struct
4370 {
4371 unsigned : 5;
4372 unsigned OFM : 2;
4373 unsigned : 1;
4374 };
4375
4376 struct
4377 {
4378 unsigned : 5;
4379 unsigned PWM3OFM : 2;
4380 unsigned : 1;
4381 };
4382 } __PWM3OFCONbits_t;
4383
4384 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
4385
4386 #define _PWM3OFCON_PWM3OFS0 0x01
4387 #define _PWM3OFCON_OFS0 0x01
4388 #define _PWM3OFCON_PWM3OFS1 0x02
4389 #define _PWM3OFCON_OFS1 0x02
4390 #define _PWM3OFCON_OFO 0x10
4391 #define _PWM3OFCON_PWM3OFMC 0x10
4392 #define _PWM3OFCON_PWM3OFM0 0x20
4393 #define _PWM3OFCON_OFM0 0x20
4394 #define _PWM3OFCON_PWM3OFM1 0x40
4395 #define _PWM3OFCON_OFM1 0x40
4396
4397 //==============================================================================
4398
4399
4400 //==============================================================================
4401 // STATUS_SHAD Bits
4402
4403 extern __at(0x0FE4) __sfr STATUS_SHAD;
4404
4405 typedef struct
4406 {
4407 unsigned C_SHAD : 1;
4408 unsigned DC_SHAD : 1;
4409 unsigned Z_SHAD : 1;
4410 unsigned : 1;
4411 unsigned : 1;
4412 unsigned : 1;
4413 unsigned : 1;
4414 unsigned : 1;
4415 } __STATUS_SHADbits_t;
4416
4417 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
4418
4419 #define _C_SHAD 0x01
4420 #define _DC_SHAD 0x02
4421 #define _Z_SHAD 0x04
4422
4423 //==============================================================================
4424
4425 extern __at(0x0FE5) __sfr WREG_SHAD;
4426 extern __at(0x0FE6) __sfr BSR_SHAD;
4427 extern __at(0x0FE7) __sfr PCLATH_SHAD;
4428 extern __at(0x0FE8) __sfr FSR0L_SHAD;
4429 extern __at(0x0FE8) __sfr FSR0_SHAD;
4430 extern __at(0x0FE9) __sfr FSR0H_SHAD;
4431 extern __at(0x0FEA) __sfr FSR1L_SHAD;
4432 extern __at(0x0FEA) __sfr FSR1_SHAD;
4433 extern __at(0x0FEB) __sfr FSR1H_SHAD;
4434 extern __at(0x0FED) __sfr STKPTR;
4435 extern __at(0x0FEE) __sfr TOS;
4436 extern __at(0x0FEE) __sfr TOSL;
4437 extern __at(0x0FEF) __sfr TOSH;
4438
4439 //==============================================================================
4440 //
4441 // Configuration Bits
4442 //
4443 //==============================================================================
4444
4445 #define _CONFIG1 0x8007
4446 #define _CONFIG2 0x8008
4447
4448 //----------------------------- CONFIG1 Options -------------------------------
4449
4450 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin.
4451 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin.
4452 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin.
4453 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin.
4454 #define _WDTE_OFF 0x3FE7 // WDT disabled.
4455 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
4456 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
4457 #define _WDTE_ON 0x3FFF // WDT enabled.
4458 #define _PWRTE_ON 0x3FDF // PWRT enabled.
4459 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
4460 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
4461 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
4462 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
4463 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
4464 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
4465 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
4466 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
4467 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
4468 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
4469 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
4470
4471 //----------------------------- CONFIG2 Options -------------------------------
4472
4473 #define _WRT_ALL 0x3FFC // 000h to 7FFh write protected, no addresses may be modified by EECON control.
4474 #define _WRT_HALF 0x3FFD // 000h to 1FFh write protected, 200h to 3FFh may be modified by EECON control.
4475 #define _WRT_BOOT 0x3FFE // 000h to 0FFh write protected, 100h to 3FFh may be modified by EECON control.
4476 #define _WRT_OFF 0x3FFF // Write protection off.
4477 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
4478 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
4479 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
4480 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
4481 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
4482 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4483 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4484 #define _LPBOREN_ON 0x37FF // LPBOR is enabled.
4485 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled.
4486 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
4487 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
4488 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
4489 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
4490
4491 //==============================================================================
4492
4493 #define _DEVID1 0x8006
4494
4495 #define _IDLOC0 0x8000
4496 #define _IDLOC1 0x8001
4497 #define _IDLOC2 0x8002
4498 #define _IDLOC3 0x8003
4499
4500 //==============================================================================
4501
4502 #ifndef NO_BIT_DEFINES
4503
4504 #define ADON ADCON0bits.ADON // bit 0
4505 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
4506 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
4507 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
4508 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
4509 #define CHS0 ADCON0bits.CHS0 // bit 2
4510 #define CHS1 ADCON0bits.CHS1 // bit 3
4511 #define CHS2 ADCON0bits.CHS2 // bit 4
4512 #define CHS3 ADCON0bits.CHS3 // bit 5
4513 #define CHS4 ADCON0bits.CHS4 // bit 6
4514
4515 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
4516 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
4517 #define ADCS0 ADCON1bits.ADCS0 // bit 4
4518 #define ADCS1 ADCON1bits.ADCS1 // bit 5
4519 #define ADCS2 ADCON1bits.ADCS2 // bit 6
4520 #define ADFM ADCON1bits.ADFM // bit 7
4521
4522 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
4523 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
4524 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
4525 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
4526
4527 #define ANSA0 ANSELAbits.ANSA0 // bit 0
4528 #define ANSA1 ANSELAbits.ANSA1 // bit 1
4529 #define ANSA2 ANSELAbits.ANSA2 // bit 2
4530 #define ANSA4 ANSELAbits.ANSA4 // bit 4
4531
4532 #define P1SEL APFCONbits.P1SEL // bit 0
4533 #define P2SEL APFCONbits.P2SEL // bit 1
4534 #define T1GSEL APFCONbits.T1GSEL // bit 3
4535 #define CWGBSEL APFCONbits.CWGBSEL // bit 5
4536 #define CWGASEL APFCONbits.CWGASEL // bit 6
4537
4538 #define BORRDY BORCONbits.BORRDY // bit 0
4539 #define BORFS BORCONbits.BORFS // bit 6
4540 #define SBOREN BORCONbits.SBOREN // bit 7
4541
4542 #define BSR0 BSRbits.BSR0 // bit 0
4543 #define BSR1 BSRbits.BSR1 // bit 1
4544 #define BSR2 BSRbits.BSR2 // bit 2
4545 #define BSR3 BSRbits.BSR3 // bit 3
4546 #define BSR4 BSRbits.BSR4 // bit 4
4547
4548 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
4549 #define C1HYS CM1CON0bits.C1HYS // bit 1
4550 #define C1SP CM1CON0bits.C1SP // bit 2
4551 #define C1POL CM1CON0bits.C1POL // bit 4
4552 #define C1OE CM1CON0bits.C1OE // bit 5
4553 #define C1OUT CM1CON0bits.C1OUT // bit 6
4554 #define C1ON CM1CON0bits.C1ON // bit 7
4555
4556 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
4557 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
4558 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
4559 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
4560 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
4561 #define C1INTN CM1CON1bits.C1INTN // bit 6
4562 #define C1INTP CM1CON1bits.C1INTP // bit 7
4563
4564 #define MC1OUT CMOUTbits.MC1OUT // bit 0
4565
4566 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
4567 #define G1POLA CWG1CON0bits.G1POLA // bit 3
4568 #define G1POLB CWG1CON0bits.G1POLB // bit 4
4569 #define G1OEA CWG1CON0bits.G1OEA // bit 5
4570 #define G1OEB CWG1CON0bits.G1OEB // bit 6
4571 #define G1EN CWG1CON0bits.G1EN // bit 7
4572
4573 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
4574 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
4575 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
4576 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
4577 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
4578 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
4579 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
4580
4581 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
4582 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
4583 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
4584 #define G1ASE CWG1CON2bits.G1ASE // bit 7
4585
4586 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
4587 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
4588 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
4589 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
4590 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
4591 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
4592
4593 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
4594 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
4595 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
4596 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
4597 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
4598 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
4599
4600 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
4601 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
4602 #define DACOE DACCON0bits.DACOE // bit 5
4603 #define DACLPS DACCON0bits.DACLPS // bit 6
4604 #define DACEN DACCON0bits.DACEN // bit 7
4605
4606 #define DACR0 DACCON1bits.DACR0 // bit 0
4607 #define DACR1 DACCON1bits.DACR1 // bit 1
4608 #define DACR2 DACCON1bits.DACR2 // bit 2
4609 #define DACR3 DACCON1bits.DACR3 // bit 3
4610 #define DACR4 DACCON1bits.DACR4 // bit 4
4611
4612 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
4613 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
4614 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
4615 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
4616 #define TSRNG FVRCONbits.TSRNG // bit 4
4617 #define TSEN FVRCONbits.TSEN // bit 5
4618 #define FVRRDY FVRCONbits.FVRRDY // bit 6
4619 #define FVREN FVRCONbits.FVREN // bit 7
4620
4621 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
4622 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
4623 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
4624 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
4625 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
4626 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
4627
4628 #define IOCIF INTCONbits.IOCIF // bit 0
4629 #define INTF INTCONbits.INTF // bit 1
4630 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
4631 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
4632 #define IOCIE INTCONbits.IOCIE // bit 3
4633 #define INTE INTCONbits.INTE // bit 4
4634 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
4635 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
4636 #define PEIE INTCONbits.PEIE // bit 6
4637 #define GIE INTCONbits.GIE // bit 7
4638
4639 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
4640 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
4641 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
4642 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
4643 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
4644 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
4645
4646 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
4647 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
4648 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
4649 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
4650 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
4651 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
4652
4653 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
4654 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
4655 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
4656 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
4657 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
4658 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
4659
4660 #define LATA0 LATAbits.LATA0 // bit 0
4661 #define LATA1 LATAbits.LATA1 // bit 1
4662 #define LATA2 LATAbits.LATA2 // bit 2
4663 #define LATA4 LATAbits.LATA4 // bit 4
4664 #define LATA5 LATAbits.LATA5 // bit 5
4665
4666 #define ODA0 ODCONAbits.ODA0 // bit 0
4667 #define ODA1 ODCONAbits.ODA1 // bit 1
4668 #define ODA2 ODCONAbits.ODA2 // bit 2
4669 #define ODA4 ODCONAbits.ODA4 // bit 4
4670 #define ODA5 ODCONAbits.ODA5 // bit 5
4671
4672 #define PS0 OPTION_REGbits.PS0 // bit 0
4673 #define PS1 OPTION_REGbits.PS1 // bit 1
4674 #define PS2 OPTION_REGbits.PS2 // bit 2
4675 #define PSA OPTION_REGbits.PSA // bit 3
4676 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
4677 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
4678 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
4679 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
4680 #define INTEDG OPTION_REGbits.INTEDG // bit 6
4681 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
4682
4683 #define SCS0 OSCCONbits.SCS0 // bit 0
4684 #define SCS1 OSCCONbits.SCS1 // bit 1
4685 #define IRCF0 OSCCONbits.IRCF0 // bit 3
4686 #define IRCF1 OSCCONbits.IRCF1 // bit 4
4687 #define IRCF2 OSCCONbits.IRCF2 // bit 5
4688 #define IRCF3 OSCCONbits.IRCF3 // bit 6
4689 #define SPLLEN OSCCONbits.SPLLEN // bit 7
4690
4691 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
4692 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
4693 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
4694 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
4695 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
4696 #define OSTS OSCSTATbits.OSTS // bit 5
4697 #define PLLR OSCSTATbits.PLLR // bit 6
4698
4699 #define TUN0 OSCTUNEbits.TUN0 // bit 0
4700 #define TUN1 OSCTUNEbits.TUN1 // bit 1
4701 #define TUN2 OSCTUNEbits.TUN2 // bit 2
4702 #define TUN3 OSCTUNEbits.TUN3 // bit 3
4703 #define TUN4 OSCTUNEbits.TUN4 // bit 4
4704 #define TUN5 OSCTUNEbits.TUN5 // bit 5
4705
4706 #define NOT_BOR PCONbits.NOT_BOR // bit 0
4707 #define NOT_POR PCONbits.NOT_POR // bit 1
4708 #define NOT_RI PCONbits.NOT_RI // bit 2
4709 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
4710 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
4711 #define STKUNF PCONbits.STKUNF // bit 6
4712 #define STKOVF PCONbits.STKOVF // bit 7
4713
4714 #define TMR1IE PIE1bits.TMR1IE // bit 0
4715 #define TMR2IE PIE1bits.TMR2IE // bit 1
4716 #define ADIE PIE1bits.ADIE // bit 6
4717 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
4718
4719 #define C1IE PIE2bits.C1IE // bit 5
4720
4721 #define PWM1IE PIE3bits.PWM1IE // bit 4
4722 #define PWM2IE PIE3bits.PWM2IE // bit 5
4723 #define PWM3IE PIE3bits.PWM3IE // bit 6
4724
4725 #define TMR1IF PIR1bits.TMR1IF // bit 0
4726 #define TMR2IF PIR1bits.TMR2IF // bit 1
4727 #define ADIF PIR1bits.ADIF // bit 6
4728 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
4729
4730 #define C1IF PIR2bits.C1IF // bit 5
4731
4732 #define PWM1IF PIR3bits.PWM1IF // bit 4
4733 #define PWM2IF PIR3bits.PWM2IF // bit 5
4734 #define PWM3IF PIR3bits.PWM3IF // bit 6
4735
4736 #define RD PMCON1bits.RD // bit 0
4737 #define WR PMCON1bits.WR // bit 1
4738 #define WREN PMCON1bits.WREN // bit 2
4739 #define WRERR PMCON1bits.WRERR // bit 3
4740 #define FREE PMCON1bits.FREE // bit 4
4741 #define LWLO PMCON1bits.LWLO // bit 5
4742 #define CFGS PMCON1bits.CFGS // bit 6
4743
4744 #define RA0 PORTAbits.RA0 // bit 0
4745 #define RA1 PORTAbits.RA1 // bit 1
4746 #define RA2 PORTAbits.RA2 // bit 2
4747 #define RA3 PORTAbits.RA3 // bit 3
4748 #define RA4 PORTAbits.RA4 // bit 4
4749 #define RA5 PORTAbits.RA5 // bit 5
4750
4751 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits
4752 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits
4753 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits
4754 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits
4755 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits
4756 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits
4757 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits
4758 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits
4759 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits
4760 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits
4761 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits
4762 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits
4763
4764 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
4765 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
4766 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
4767 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
4768 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
4769 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
4770 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
4771 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
4772
4773 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0
4774 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1
4775 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2
4776 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3
4777 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4
4778 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5
4779 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6
4780 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7
4781
4782 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits
4783 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits
4784 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits
4785 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits
4786 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits
4787 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits
4788 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits
4789 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits
4790
4791 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits
4792 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits
4793 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits
4794 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits
4795 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits
4796 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits
4797 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits
4798 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits
4799
4800 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits
4801 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits
4802 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits
4803 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits
4804 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits
4805 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits
4806 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits
4807 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits
4808
4809 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits
4810 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits
4811 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits
4812 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits
4813 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits
4814 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits
4815 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits
4816 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits
4817 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits
4818 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits
4819
4820 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0
4821 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1
4822 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2
4823 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3
4824 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4
4825 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5
4826 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6
4827 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7
4828
4829 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0
4830 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1
4831 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2
4832 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3
4833 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4
4834 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5
4835 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6
4836 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7
4837
4838 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0
4839 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1
4840 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2
4841 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3
4842 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4
4843 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5
4844 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6
4845 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7
4846
4847 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0
4848 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1
4849 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2
4850 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3
4851 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4
4852 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5
4853 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6
4854 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7
4855
4856 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0
4857 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1
4858 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2
4859 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3
4860 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4
4861 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5
4862 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6
4863 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7
4864
4865 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0
4866 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1
4867 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2
4868 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3
4869 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4
4870 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5
4871 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6
4872 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7
4873
4874 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0
4875 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1
4876 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2
4877 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3
4878 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4
4879 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5
4880 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6
4881 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7
4882
4883 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0
4884 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1
4885 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2
4886 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3
4887 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4
4888 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5
4889 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6
4890 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7
4891
4892 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
4893 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
4894 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
4895 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
4896 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
4897 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
4898 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
4899 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
4900
4901 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0
4902 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1
4903 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2
4904 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3
4905 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4
4906 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5
4907 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6
4908 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7
4909
4910 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0
4911 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1
4912 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2
4913 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3
4914 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4
4915 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5
4916 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6
4917 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7
4918
4919 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0
4920 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1
4921 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2
4922 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3
4923 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4
4924 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5
4925 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6
4926 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7
4927
4928 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0
4929 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1
4930 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2
4931 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3
4932 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4
4933 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5
4934 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6
4935 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7
4936
4937 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0
4938 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1
4939 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2
4940 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3
4941 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4
4942 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5
4943 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6
4944 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7
4945
4946 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0
4947 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1
4948 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2
4949 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3
4950 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4
4951 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5
4952 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6
4953 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7
4954
4955 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0
4956 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1
4957 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2
4958 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3
4959 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4
4960 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5
4961 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6
4962 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7
4963
4964 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0
4965 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1
4966 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2
4967 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3
4968 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4
4969 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5
4970 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6
4971 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7
4972
4973 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0
4974 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1
4975 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2
4976 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3
4977 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4
4978 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5
4979 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6
4980 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7
4981
4982 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
4983 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
4984 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
4985 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
4986 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
4987 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
4988 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
4989 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
4990
4991 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0
4992 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1
4993 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2
4994 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3
4995 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4
4996 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5
4997 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6
4998 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7
4999
5000 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0
5001 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1
5002 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2
5003 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3
5004 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4
5005 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5
5006 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6
5007 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7
5008
5009 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0
5010 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1
5011 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2
5012 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3
5013 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4
5014 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5
5015 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6
5016 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7
5017
5018 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0
5019 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1
5020 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2
5021 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3
5022 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4
5023 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5
5024 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6
5025 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7
5026
5027 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0
5028 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1
5029 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2
5030 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3
5031 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4
5032 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5
5033 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6
5034 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7
5035
5036 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0
5037 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1
5038 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2
5039 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3
5040 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4
5041 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5
5042 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6
5043 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7
5044
5045 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0
5046 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1
5047 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2
5048 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3
5049 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4
5050 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5
5051 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6
5052 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7
5053
5054 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0
5055 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1
5056 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2
5057 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3
5058 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4
5059 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5
5060 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6
5061 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7
5062
5063 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0
5064 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1
5065 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2
5066 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3
5067 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4
5068 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5
5069 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6
5070 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7
5071
5072 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits
5073 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits
5074 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits
5075 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits
5076 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits
5077 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits
5078
5079 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits
5080 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits
5081 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits
5082 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits
5083 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits
5084 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits
5085
5086 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits
5087 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits
5088 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits
5089 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits
5090 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits
5091 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits
5092
5093 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
5094 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
5095 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
5096 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
5097 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
5098
5099 #define C STATUSbits.C // bit 0
5100 #define DC STATUSbits.DC // bit 1
5101 #define Z STATUSbits.Z // bit 2
5102 #define NOT_PD STATUSbits.NOT_PD // bit 3
5103 #define NOT_TO STATUSbits.NOT_TO // bit 4
5104
5105 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
5106 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
5107 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
5108
5109 #define TMR1ON T1CONbits.TMR1ON // bit 0
5110 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
5111 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
5112 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
5113 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
5114 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
5115
5116 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
5117 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
5118 #define T1GVAL T1GCONbits.T1GVAL // bit 2
5119 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
5120 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
5121 #define T1GSPM T1GCONbits.T1GSPM // bit 4
5122 #define T1GTM T1GCONbits.T1GTM // bit 5
5123 #define T1GPOL T1GCONbits.T1GPOL // bit 6
5124 #define TMR1GE T1GCONbits.TMR1GE // bit 7
5125
5126 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
5127 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
5128 #define TMR2ON T2CONbits.TMR2ON // bit 2
5129 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
5130 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
5131 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
5132 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
5133
5134 #define TRISA0 TRISAbits.TRISA0 // bit 0
5135 #define TRISA1 TRISAbits.TRISA1 // bit 1
5136 #define TRISA2 TRISAbits.TRISA2 // bit 2
5137 #define TRISA3 TRISAbits.TRISA3 // bit 3
5138 #define TRISA4 TRISAbits.TRISA4 // bit 4
5139 #define TRISA5 TRISAbits.TRISA5 // bit 5
5140
5141 #define VREGPM VREGCONbits.VREGPM // bit 1
5142
5143 #define SWDTEN WDTCONbits.SWDTEN // bit 0
5144 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
5145 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
5146 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
5147 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
5148 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
5149
5150 #define WPUA0 WPUAbits.WPUA0 // bit 0
5151 #define WPUA1 WPUAbits.WPUA1 // bit 1
5152 #define WPUA2 WPUAbits.WPUA2 // bit 2
5153 #define WPUA3 WPUAbits.WPUA3 // bit 3
5154 #define WPUA4 WPUAbits.WPUA4 // bit 4
5155 #define WPUA5 WPUAbits.WPUA5 // bit 5
5156
5157 #endif // #ifndef NO_BIT_DEFINES
5158
5159 #endif // #ifndef __PIC12F1571_H__
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