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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12f1572.h
blobaf22fd1a8b225ef6954ea50ebea4c4a1365d0f2a
1 /*
2 * This declarations of the PIC12F1572 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12F1572_H__
26 #define __PIC12F1572_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define PIE1_ADDR 0x0091
65 #define PIE2_ADDR 0x0092
66 #define PIE3_ADDR 0x0093
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCTUNE_ADDR 0x0098
71 #define OSCCON_ADDR 0x0099
72 #define OSCSTAT_ADDR 0x009A
73 #define ADRES_ADDR 0x009B
74 #define ADRESL_ADDR 0x009B
75 #define ADRESH_ADDR 0x009C
76 #define ADCON0_ADDR 0x009D
77 #define ADCON1_ADDR 0x009E
78 #define ADCON2_ADDR 0x009F
79 #define LATA_ADDR 0x010C
80 #define CM1CON0_ADDR 0x0111
81 #define CM1CON1_ADDR 0x0112
82 #define CMOUT_ADDR 0x0115
83 #define BORCON_ADDR 0x0116
84 #define FVRCON_ADDR 0x0117
85 #define DACCON0_ADDR 0x0118
86 #define DACCON1_ADDR 0x0119
87 #define APFCON_ADDR 0x011D
88 #define APFCON0_ADDR 0x011D
89 #define ANSELA_ADDR 0x018C
90 #define PMADR_ADDR 0x0191
91 #define PMADRL_ADDR 0x0191
92 #define PMADRH_ADDR 0x0192
93 #define PMDAT_ADDR 0x0193
94 #define PMDATL_ADDR 0x0193
95 #define PMDATH_ADDR 0x0194
96 #define PMCON1_ADDR 0x0195
97 #define PMCON2_ADDR 0x0196
98 #define VREGCON_ADDR 0x0197
99 #define RCREG_ADDR 0x0199
100 #define TXREG_ADDR 0x019A
101 #define SPBRG_ADDR 0x019B
102 #define SPBRGL_ADDR 0x019B
103 #define SPBRGH_ADDR 0x019C
104 #define RCSTA_ADDR 0x019D
105 #define TXSTA_ADDR 0x019E
106 #define BAUDCON_ADDR 0x019F
107 #define WPUA_ADDR 0x020C
108 #define ODCONA_ADDR 0x028C
109 #define SLRCONA_ADDR 0x030C
110 #define INLVLA_ADDR 0x038C
111 #define IOCAP_ADDR 0x0391
112 #define IOCAN_ADDR 0x0392
113 #define IOCAF_ADDR 0x0393
114 #define CWG1DBR_ADDR 0x0691
115 #define CWG1DBF_ADDR 0x0692
116 #define CWG1CON0_ADDR 0x0693
117 #define CWG1CON1_ADDR 0x0694
118 #define CWG1CON2_ADDR 0x0695
119 #define PWMEN_ADDR 0x0D8E
120 #define PWMLD_ADDR 0x0D8F
121 #define PWMOUT_ADDR 0x0D90
122 #define PWM1PH_ADDR 0x0D91
123 #define PWM1PHL_ADDR 0x0D91
124 #define PWM1PHH_ADDR 0x0D92
125 #define PWM1DC_ADDR 0x0D93
126 #define PWM1DCL_ADDR 0x0D93
127 #define PWM1DCH_ADDR 0x0D94
128 #define PWM1PR_ADDR 0x0D95
129 #define PWM1PRL_ADDR 0x0D95
130 #define PWM1PRH_ADDR 0x0D96
131 #define PWM1OF_ADDR 0x0D97
132 #define PWM1OFL_ADDR 0x0D97
133 #define PWM1OFH_ADDR 0x0D98
134 #define PWM1TMR_ADDR 0x0D99
135 #define PWM1TMRL_ADDR 0x0D99
136 #define PWM1TMRH_ADDR 0x0D9A
137 #define PWM1CON_ADDR 0x0D9B
138 #define PWM1INTCON_ADDR 0x0D9C
139 #define PWM1INTE_ADDR 0x0D9C
140 #define PWM1INTF_ADDR 0x0D9D
141 #define PWM1INTFLG_ADDR 0x0D9D
142 #define PWM1CLKCON_ADDR 0x0D9E
143 #define PWM1LDCON_ADDR 0x0D9F
144 #define PWM1OFCON_ADDR 0x0DA0
145 #define PWM2PH_ADDR 0x0DA1
146 #define PWM2PHL_ADDR 0x0DA1
147 #define PWM2PHH_ADDR 0x0DA2
148 #define PWM2DC_ADDR 0x0DA3
149 #define PWM2DCL_ADDR 0x0DA3
150 #define PWM2DCH_ADDR 0x0DA4
151 #define PWM2PR_ADDR 0x0DA5
152 #define PWM2PRL_ADDR 0x0DA5
153 #define PWM2PRH_ADDR 0x0DA6
154 #define PWM2OF_ADDR 0x0DA7
155 #define PWM2OFL_ADDR 0x0DA7
156 #define PWM2OFH_ADDR 0x0DA8
157 #define PWM2TMR_ADDR 0x0DA9
158 #define PWM2TMRL_ADDR 0x0DA9
159 #define PWM2TMRH_ADDR 0x0DAA
160 #define PWM2CON_ADDR 0x0DAB
161 #define PWM2INTCON_ADDR 0x0DAC
162 #define PWM2INTE_ADDR 0x0DAC
163 #define PWM2INTF_ADDR 0x0DAD
164 #define PWM2INTFLG_ADDR 0x0DAD
165 #define PWM2CLKCON_ADDR 0x0DAE
166 #define PWM2LDCON_ADDR 0x0DAF
167 #define PWM2OFCON_ADDR 0x0DB0
168 #define PWM3PH_ADDR 0x0DB1
169 #define PWM3PHL_ADDR 0x0DB1
170 #define PWM3PHH_ADDR 0x0DB2
171 #define PWM3DC_ADDR 0x0DB3
172 #define PWM3DCL_ADDR 0x0DB3
173 #define PWM3DCH_ADDR 0x0DB4
174 #define PWM3PR_ADDR 0x0DB5
175 #define PWM3PRL_ADDR 0x0DB5
176 #define PWM3PRH_ADDR 0x0DB6
177 #define PWM3OF_ADDR 0x0DB7
178 #define PWM3OFL_ADDR 0x0DB7
179 #define PWM3OFH_ADDR 0x0DB8
180 #define PWM3TMR_ADDR 0x0DB9
181 #define PWM3TMRL_ADDR 0x0DB9
182 #define PWM3TMRH_ADDR 0x0DBA
183 #define PWM3CON_ADDR 0x0DBB
184 #define PWM3INTCON_ADDR 0x0DBC
185 #define PWM3INTE_ADDR 0x0DBC
186 #define PWM3INTF_ADDR 0x0DBD
187 #define PWM3INTFLG_ADDR 0x0DBD
188 #define PWM3CLKCON_ADDR 0x0DBE
189 #define PWM3LDCON_ADDR 0x0DBF
190 #define PWM3OFCON_ADDR 0x0DC0
191 #define STATUS_SHAD_ADDR 0x0FE4
192 #define WREG_SHAD_ADDR 0x0FE5
193 #define BSR_SHAD_ADDR 0x0FE6
194 #define PCLATH_SHAD_ADDR 0x0FE7
195 #define FSR0L_SHAD_ADDR 0x0FE8
196 #define FSR0_SHAD_ADDR 0x0FE8
197 #define FSR0H_SHAD_ADDR 0x0FE9
198 #define FSR1L_SHAD_ADDR 0x0FEA
199 #define FSR1_SHAD_ADDR 0x0FEA
200 #define FSR1H_SHAD_ADDR 0x0FEB
201 #define STKPTR_ADDR 0x0FED
202 #define TOS_ADDR 0x0FEE
203 #define TOSL_ADDR 0x0FEE
204 #define TOSH_ADDR 0x0FEF
205
206 #endif // #ifndef NO_ADDR_DEFINES
207
208 //==============================================================================
209 //
210 // Register Definitions
211 //
212 //==============================================================================
213
214 extern __at(0x0000) __sfr INDF0;
215 extern __at(0x0001) __sfr INDF1;
216 extern __at(0x0002) __sfr PCL;
217
218 //==============================================================================
219 // STATUS Bits
220
221 extern __at(0x0003) __sfr STATUS;
222
223 typedef struct
224 {
225 unsigned C : 1;
226 unsigned DC : 1;
227 unsigned Z : 1;
228 unsigned NOT_PD : 1;
229 unsigned NOT_TO : 1;
230 unsigned : 1;
231 unsigned : 1;
232 unsigned : 1;
233 } __STATUSbits_t;
234
235 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
236
237 #define _C 0x01
238 #define _DC 0x02
239 #define _Z 0x04
240 #define _NOT_PD 0x08
241 #define _NOT_TO 0x10
242
243 //==============================================================================
244
245 extern __at(0x0004) __sfr FSR0;
246 extern __at(0x0004) __sfr FSR0L;
247 extern __at(0x0005) __sfr FSR0H;
248 extern __at(0x0006) __sfr FSR1;
249 extern __at(0x0006) __sfr FSR1L;
250 extern __at(0x0007) __sfr FSR1H;
251
252 //==============================================================================
253 // BSR Bits
254
255 extern __at(0x0008) __sfr BSR;
256
257 typedef union
258 {
259 struct
260 {
261 unsigned BSR0 : 1;
262 unsigned BSR1 : 1;
263 unsigned BSR2 : 1;
264 unsigned BSR3 : 1;
265 unsigned BSR4 : 1;
266 unsigned : 1;
267 unsigned : 1;
268 unsigned : 1;
269 };
270
271 struct
272 {
273 unsigned BSR : 5;
274 unsigned : 3;
275 };
276 } __BSRbits_t;
277
278 extern __at(0x0008) volatile __BSRbits_t BSRbits;
279
280 #define _BSR0 0x01
281 #define _BSR1 0x02
282 #define _BSR2 0x04
283 #define _BSR3 0x08
284 #define _BSR4 0x10
285
286 //==============================================================================
287
288 extern __at(0x0009) __sfr WREG;
289 extern __at(0x000A) __sfr PCLATH;
290
291 //==============================================================================
292 // INTCON Bits
293
294 extern __at(0x000B) __sfr INTCON;
295
296 typedef union
297 {
298 struct
299 {
300 unsigned IOCIF : 1;
301 unsigned INTF : 1;
302 unsigned TMR0IF : 1;
303 unsigned IOCIE : 1;
304 unsigned INTE : 1;
305 unsigned TMR0IE : 1;
306 unsigned PEIE : 1;
307 unsigned GIE : 1;
308 };
309
310 struct
311 {
312 unsigned : 1;
313 unsigned : 1;
314 unsigned T0IF : 1;
315 unsigned : 1;
316 unsigned : 1;
317 unsigned T0IE : 1;
318 unsigned : 1;
319 unsigned : 1;
320 };
321 } __INTCONbits_t;
322
323 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
324
325 #define _IOCIF 0x01
326 #define _INTF 0x02
327 #define _TMR0IF 0x04
328 #define _T0IF 0x04
329 #define _IOCIE 0x08
330 #define _INTE 0x10
331 #define _TMR0IE 0x20
332 #define _T0IE 0x20
333 #define _PEIE 0x40
334 #define _GIE 0x80
335
336 //==============================================================================
337
338
339 //==============================================================================
340 // PORTA Bits
341
342 extern __at(0x000C) __sfr PORTA;
343
344 typedef union
345 {
346 struct
347 {
348 unsigned RA0 : 1;
349 unsigned RA1 : 1;
350 unsigned RA2 : 1;
351 unsigned RA3 : 1;
352 unsigned RA4 : 1;
353 unsigned RA5 : 1;
354 unsigned : 1;
355 unsigned : 1;
356 };
357
358 struct
359 {
360 unsigned RA : 6;
361 unsigned : 2;
362 };
363 } __PORTAbits_t;
364
365 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
366
367 #define _RA0 0x01
368 #define _RA1 0x02
369 #define _RA2 0x04
370 #define _RA3 0x08
371 #define _RA4 0x10
372 #define _RA5 0x20
373
374 //==============================================================================
375
376
377 //==============================================================================
378 // PIR1 Bits
379
380 extern __at(0x0011) __sfr PIR1;
381
382 typedef struct
383 {
384 unsigned TMR1IF : 1;
385 unsigned TMR2IF : 1;
386 unsigned : 1;
387 unsigned : 1;
388 unsigned TXIF : 1;
389 unsigned RCIF : 1;
390 unsigned ADIF : 1;
391 unsigned TMR1GIF : 1;
392 } __PIR1bits_t;
393
394 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
395
396 #define _TMR1IF 0x01
397 #define _TMR2IF 0x02
398 #define _TXIF 0x10
399 #define _RCIF 0x20
400 #define _ADIF 0x40
401 #define _TMR1GIF 0x80
402
403 //==============================================================================
404
405
406 //==============================================================================
407 // PIR2 Bits
408
409 extern __at(0x0012) __sfr PIR2;
410
411 typedef struct
412 {
413 unsigned : 1;
414 unsigned : 1;
415 unsigned : 1;
416 unsigned : 1;
417 unsigned : 1;
418 unsigned C1IF : 1;
419 unsigned : 1;
420 unsigned : 1;
421 } __PIR2bits_t;
422
423 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
424
425 #define _C1IF 0x20
426
427 //==============================================================================
428
429
430 //==============================================================================
431 // PIR3 Bits
432
433 extern __at(0x0013) __sfr PIR3;
434
435 typedef struct
436 {
437 unsigned : 1;
438 unsigned : 1;
439 unsigned : 1;
440 unsigned : 1;
441 unsigned PWM1IF : 1;
442 unsigned PWM2IF : 1;
443 unsigned PWM3IF : 1;
444 unsigned : 1;
445 } __PIR3bits_t;
446
447 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
448
449 #define _PWM1IF 0x10
450 #define _PWM2IF 0x20
451 #define _PWM3IF 0x40
452
453 //==============================================================================
454
455 extern __at(0x0015) __sfr TMR0;
456 extern __at(0x0016) __sfr TMR1;
457 extern __at(0x0016) __sfr TMR1L;
458 extern __at(0x0017) __sfr TMR1H;
459
460 //==============================================================================
461 // T1CON Bits
462
463 extern __at(0x0018) __sfr T1CON;
464
465 typedef union
466 {
467 struct
468 {
469 unsigned TMR1ON : 1;
470 unsigned : 1;
471 unsigned NOT_T1SYNC : 1;
472 unsigned : 1;
473 unsigned T1CKPS0 : 1;
474 unsigned T1CKPS1 : 1;
475 unsigned TMR1CS0 : 1;
476 unsigned TMR1CS1 : 1;
477 };
478
479 struct
480 {
481 unsigned : 4;
482 unsigned T1CKPS : 2;
483 unsigned : 2;
484 };
485
486 struct
487 {
488 unsigned : 6;
489 unsigned TMR1CS : 2;
490 };
491 } __T1CONbits_t;
492
493 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
494
495 #define _TMR1ON 0x01
496 #define _NOT_T1SYNC 0x04
497 #define _T1CKPS0 0x10
498 #define _T1CKPS1 0x20
499 #define _TMR1CS0 0x40
500 #define _TMR1CS1 0x80
501
502 //==============================================================================
503
504
505 //==============================================================================
506 // T1GCON Bits
507
508 extern __at(0x0019) __sfr T1GCON;
509
510 typedef union
511 {
512 struct
513 {
514 unsigned T1GSS0 : 1;
515 unsigned T1GSS1 : 1;
516 unsigned T1GVAL : 1;
517 unsigned T1GGO_NOT_DONE : 1;
518 unsigned T1GSPM : 1;
519 unsigned T1GTM : 1;
520 unsigned T1GPOL : 1;
521 unsigned TMR1GE : 1;
522 };
523
524 struct
525 {
526 unsigned : 1;
527 unsigned : 1;
528 unsigned : 1;
529 unsigned T1GGO : 1;
530 unsigned : 1;
531 unsigned : 1;
532 unsigned : 1;
533 unsigned : 1;
534 };
535
536 struct
537 {
538 unsigned T1GSS : 2;
539 unsigned : 6;
540 };
541 } __T1GCONbits_t;
542
543 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
544
545 #define _T1GSS0 0x01
546 #define _T1GSS1 0x02
547 #define _T1GVAL 0x04
548 #define _T1GGO_NOT_DONE 0x08
549 #define _T1GGO 0x08
550 #define _T1GSPM 0x10
551 #define _T1GTM 0x20
552 #define _T1GPOL 0x40
553 #define _TMR1GE 0x80
554
555 //==============================================================================
556
557 extern __at(0x001A) __sfr TMR2;
558 extern __at(0x001B) __sfr PR2;
559
560 //==============================================================================
561 // T2CON Bits
562
563 extern __at(0x001C) __sfr T2CON;
564
565 typedef union
566 {
567 struct
568 {
569 unsigned T2CKPS0 : 1;
570 unsigned T2CKPS1 : 1;
571 unsigned TMR2ON : 1;
572 unsigned T2OUTPS0 : 1;
573 unsigned T2OUTPS1 : 1;
574 unsigned T2OUTPS2 : 1;
575 unsigned T2OUTPS3 : 1;
576 unsigned : 1;
577 };
578
579 struct
580 {
581 unsigned T2CKPS : 2;
582 unsigned : 6;
583 };
584
585 struct
586 {
587 unsigned : 3;
588 unsigned T2OUTPS : 4;
589 unsigned : 1;
590 };
591 } __T2CONbits_t;
592
593 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
594
595 #define _T2CKPS0 0x01
596 #define _T2CKPS1 0x02
597 #define _TMR2ON 0x04
598 #define _T2OUTPS0 0x08
599 #define _T2OUTPS1 0x10
600 #define _T2OUTPS2 0x20
601 #define _T2OUTPS3 0x40
602
603 //==============================================================================
604
605
606 //==============================================================================
607 // TRISA Bits
608
609 extern __at(0x008C) __sfr TRISA;
610
611 typedef union
612 {
613 struct
614 {
615 unsigned TRISA0 : 1;
616 unsigned TRISA1 : 1;
617 unsigned TRISA2 : 1;
618 unsigned TRISA3 : 1;
619 unsigned TRISA4 : 1;
620 unsigned TRISA5 : 1;
621 unsigned : 1;
622 unsigned : 1;
623 };
624
625 struct
626 {
627 unsigned TRISA : 6;
628 unsigned : 2;
629 };
630 } __TRISAbits_t;
631
632 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
633
634 #define _TRISA0 0x01
635 #define _TRISA1 0x02
636 #define _TRISA2 0x04
637 #define _TRISA3 0x08
638 #define _TRISA4 0x10
639 #define _TRISA5 0x20
640
641 //==============================================================================
642
643
644 //==============================================================================
645 // PIE1 Bits
646
647 extern __at(0x0091) __sfr PIE1;
648
649 typedef struct
650 {
651 unsigned TMR1IE : 1;
652 unsigned TMR2IE : 1;
653 unsigned : 1;
654 unsigned : 1;
655 unsigned TXIE : 1;
656 unsigned RCIE : 1;
657 unsigned ADIE : 1;
658 unsigned TMR1GIE : 1;
659 } __PIE1bits_t;
660
661 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
662
663 #define _TMR1IE 0x01
664 #define _TMR2IE 0x02
665 #define _TXIE 0x10
666 #define _RCIE 0x20
667 #define _ADIE 0x40
668 #define _TMR1GIE 0x80
669
670 //==============================================================================
671
672
673 //==============================================================================
674 // PIE2 Bits
675
676 extern __at(0x0092) __sfr PIE2;
677
678 typedef struct
679 {
680 unsigned : 1;
681 unsigned : 1;
682 unsigned : 1;
683 unsigned : 1;
684 unsigned : 1;
685 unsigned C1IE : 1;
686 unsigned : 1;
687 unsigned : 1;
688 } __PIE2bits_t;
689
690 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
691
692 #define _C1IE 0x20
693
694 //==============================================================================
695
696
697 //==============================================================================
698 // PIE3 Bits
699
700 extern __at(0x0093) __sfr PIE3;
701
702 typedef struct
703 {
704 unsigned : 1;
705 unsigned : 1;
706 unsigned : 1;
707 unsigned : 1;
708 unsigned PWM1IE : 1;
709 unsigned PWM2IE : 1;
710 unsigned PWM3IE : 1;
711 unsigned : 1;
712 } __PIE3bits_t;
713
714 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
715
716 #define _PWM1IE 0x10
717 #define _PWM2IE 0x20
718 #define _PWM3IE 0x40
719
720 //==============================================================================
721
722
723 //==============================================================================
724 // OPTION_REG Bits
725
726 extern __at(0x0095) __sfr OPTION_REG;
727
728 typedef union
729 {
730 struct
731 {
732 unsigned PS0 : 1;
733 unsigned PS1 : 1;
734 unsigned PS2 : 1;
735 unsigned PSA : 1;
736 unsigned TMR0SE : 1;
737 unsigned TMR0CS : 1;
738 unsigned INTEDG : 1;
739 unsigned NOT_WPUEN : 1;
740 };
741
742 struct
743 {
744 unsigned : 1;
745 unsigned : 1;
746 unsigned : 1;
747 unsigned : 1;
748 unsigned T0SE : 1;
749 unsigned T0CS : 1;
750 unsigned : 1;
751 unsigned : 1;
752 };
753
754 struct
755 {
756 unsigned PS : 3;
757 unsigned : 5;
758 };
759 } __OPTION_REGbits_t;
760
761 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
762
763 #define _PS0 0x01
764 #define _PS1 0x02
765 #define _PS2 0x04
766 #define _PSA 0x08
767 #define _TMR0SE 0x10
768 #define _T0SE 0x10
769 #define _TMR0CS 0x20
770 #define _T0CS 0x20
771 #define _INTEDG 0x40
772 #define _NOT_WPUEN 0x80
773
774 //==============================================================================
775
776
777 //==============================================================================
778 // PCON Bits
779
780 extern __at(0x0096) __sfr PCON;
781
782 typedef struct
783 {
784 unsigned NOT_BOR : 1;
785 unsigned NOT_POR : 1;
786 unsigned NOT_RI : 1;
787 unsigned NOT_RMCLR : 1;
788 unsigned NOT_RWDT : 1;
789 unsigned : 1;
790 unsigned STKUNF : 1;
791 unsigned STKOVF : 1;
792 } __PCONbits_t;
793
794 extern __at(0x0096) volatile __PCONbits_t PCONbits;
795
796 #define _NOT_BOR 0x01
797 #define _NOT_POR 0x02
798 #define _NOT_RI 0x04
799 #define _NOT_RMCLR 0x08
800 #define _NOT_RWDT 0x10
801 #define _STKUNF 0x40
802 #define _STKOVF 0x80
803
804 //==============================================================================
805
806
807 //==============================================================================
808 // WDTCON Bits
809
810 extern __at(0x0097) __sfr WDTCON;
811
812 typedef union
813 {
814 struct
815 {
816 unsigned SWDTEN : 1;
817 unsigned WDTPS0 : 1;
818 unsigned WDTPS1 : 1;
819 unsigned WDTPS2 : 1;
820 unsigned WDTPS3 : 1;
821 unsigned WDTPS4 : 1;
822 unsigned : 1;
823 unsigned : 1;
824 };
825
826 struct
827 {
828 unsigned : 1;
829 unsigned WDTPS : 5;
830 unsigned : 2;
831 };
832 } __WDTCONbits_t;
833
834 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
835
836 #define _SWDTEN 0x01
837 #define _WDTPS0 0x02
838 #define _WDTPS1 0x04
839 #define _WDTPS2 0x08
840 #define _WDTPS3 0x10
841 #define _WDTPS4 0x20
842
843 //==============================================================================
844
845
846 //==============================================================================
847 // OSCTUNE Bits
848
849 extern __at(0x0098) __sfr OSCTUNE;
850
851 typedef union
852 {
853 struct
854 {
855 unsigned TUN0 : 1;
856 unsigned TUN1 : 1;
857 unsigned TUN2 : 1;
858 unsigned TUN3 : 1;
859 unsigned TUN4 : 1;
860 unsigned TUN5 : 1;
861 unsigned : 1;
862 unsigned : 1;
863 };
864
865 struct
866 {
867 unsigned TUN : 6;
868 unsigned : 2;
869 };
870 } __OSCTUNEbits_t;
871
872 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
873
874 #define _TUN0 0x01
875 #define _TUN1 0x02
876 #define _TUN2 0x04
877 #define _TUN3 0x08
878 #define _TUN4 0x10
879 #define _TUN5 0x20
880
881 //==============================================================================
882
883
884 //==============================================================================
885 // OSCCON Bits
886
887 extern __at(0x0099) __sfr OSCCON;
888
889 typedef union
890 {
891 struct
892 {
893 unsigned SCS0 : 1;
894 unsigned SCS1 : 1;
895 unsigned : 1;
896 unsigned IRCF0 : 1;
897 unsigned IRCF1 : 1;
898 unsigned IRCF2 : 1;
899 unsigned IRCF3 : 1;
900 unsigned SPLLEN : 1;
901 };
902
903 struct
904 {
905 unsigned SCS : 2;
906 unsigned : 6;
907 };
908
909 struct
910 {
911 unsigned : 3;
912 unsigned IRCF : 4;
913 unsigned : 1;
914 };
915 } __OSCCONbits_t;
916
917 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
918
919 #define _SCS0 0x01
920 #define _SCS1 0x02
921 #define _IRCF0 0x08
922 #define _IRCF1 0x10
923 #define _IRCF2 0x20
924 #define _IRCF3 0x40
925 #define _SPLLEN 0x80
926
927 //==============================================================================
928
929
930 //==============================================================================
931 // OSCSTAT Bits
932
933 extern __at(0x009A) __sfr OSCSTAT;
934
935 typedef struct
936 {
937 unsigned HFIOFS : 1;
938 unsigned LFIOFR : 1;
939 unsigned MFIOFR : 1;
940 unsigned HFIOFL : 1;
941 unsigned HFIOFR : 1;
942 unsigned OSTS : 1;
943 unsigned PLLR : 1;
944 unsigned : 1;
945 } __OSCSTATbits_t;
946
947 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
948
949 #define _HFIOFS 0x01
950 #define _LFIOFR 0x02
951 #define _MFIOFR 0x04
952 #define _HFIOFL 0x08
953 #define _HFIOFR 0x10
954 #define _OSTS 0x20
955 #define _PLLR 0x40
956
957 //==============================================================================
958
959 extern __at(0x009B) __sfr ADRES;
960 extern __at(0x009B) __sfr ADRESL;
961 extern __at(0x009C) __sfr ADRESH;
962
963 //==============================================================================
964 // ADCON0 Bits
965
966 extern __at(0x009D) __sfr ADCON0;
967
968 typedef union
969 {
970 struct
971 {
972 unsigned ADON : 1;
973 unsigned GO_NOT_DONE : 1;
974 unsigned CHS0 : 1;
975 unsigned CHS1 : 1;
976 unsigned CHS2 : 1;
977 unsigned CHS3 : 1;
978 unsigned CHS4 : 1;
979 unsigned : 1;
980 };
981
982 struct
983 {
984 unsigned : 1;
985 unsigned ADGO : 1;
986 unsigned : 1;
987 unsigned : 1;
988 unsigned : 1;
989 unsigned : 1;
990 unsigned : 1;
991 unsigned : 1;
992 };
993
994 struct
995 {
996 unsigned : 1;
997 unsigned GO : 1;
998 unsigned : 1;
999 unsigned : 1;
1000 unsigned : 1;
1001 unsigned : 1;
1002 unsigned : 1;
1003 unsigned : 1;
1004 };
1005
1006 struct
1007 {
1008 unsigned : 1;
1009 unsigned NOT_DONE : 1;
1010 unsigned : 1;
1011 unsigned : 1;
1012 unsigned : 1;
1013 unsigned : 1;
1014 unsigned : 1;
1015 unsigned : 1;
1016 };
1017
1018 struct
1019 {
1020 unsigned : 2;
1021 unsigned CHS : 5;
1022 unsigned : 1;
1023 };
1024 } __ADCON0bits_t;
1025
1026 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1027
1028 #define _ADON 0x01
1029 #define _GO_NOT_DONE 0x02
1030 #define _ADGO 0x02
1031 #define _GO 0x02
1032 #define _NOT_DONE 0x02
1033 #define _CHS0 0x04
1034 #define _CHS1 0x08
1035 #define _CHS2 0x10
1036 #define _CHS3 0x20
1037 #define _CHS4 0x40
1038
1039 //==============================================================================
1040
1041
1042 //==============================================================================
1043 // ADCON1 Bits
1044
1045 extern __at(0x009E) __sfr ADCON1;
1046
1047 typedef union
1048 {
1049 struct
1050 {
1051 unsigned ADPREF0 : 1;
1052 unsigned ADPREF1 : 1;
1053 unsigned : 1;
1054 unsigned : 1;
1055 unsigned ADCS0 : 1;
1056 unsigned ADCS1 : 1;
1057 unsigned ADCS2 : 1;
1058 unsigned ADFM : 1;
1059 };
1060
1061 struct
1062 {
1063 unsigned ADPREF : 2;
1064 unsigned : 6;
1065 };
1066
1067 struct
1068 {
1069 unsigned : 4;
1070 unsigned ADCS : 3;
1071 unsigned : 1;
1072 };
1073 } __ADCON1bits_t;
1074
1075 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1076
1077 #define _ADPREF0 0x01
1078 #define _ADPREF1 0x02
1079 #define _ADCS0 0x10
1080 #define _ADCS1 0x20
1081 #define _ADCS2 0x40
1082 #define _ADFM 0x80
1083
1084 //==============================================================================
1085
1086
1087 //==============================================================================
1088 // ADCON2 Bits
1089
1090 extern __at(0x009F) __sfr ADCON2;
1091
1092 typedef union
1093 {
1094 struct
1095 {
1096 unsigned : 1;
1097 unsigned : 1;
1098 unsigned : 1;
1099 unsigned : 1;
1100 unsigned TRIGSEL0 : 1;
1101 unsigned TRIGSEL1 : 1;
1102 unsigned TRIGSEL2 : 1;
1103 unsigned TRIGSEL3 : 1;
1104 };
1105
1106 struct
1107 {
1108 unsigned : 4;
1109 unsigned TRIGSEL : 4;
1110 };
1111 } __ADCON2bits_t;
1112
1113 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1114
1115 #define _TRIGSEL0 0x10
1116 #define _TRIGSEL1 0x20
1117 #define _TRIGSEL2 0x40
1118 #define _TRIGSEL3 0x80
1119
1120 //==============================================================================
1121
1122
1123 //==============================================================================
1124 // LATA Bits
1125
1126 extern __at(0x010C) __sfr LATA;
1127
1128 typedef struct
1129 {
1130 unsigned LATA0 : 1;
1131 unsigned LATA1 : 1;
1132 unsigned LATA2 : 1;
1133 unsigned : 1;
1134 unsigned LATA4 : 1;
1135 unsigned LATA5 : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1138 } __LATAbits_t;
1139
1140 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1141
1142 #define _LATA0 0x01
1143 #define _LATA1 0x02
1144 #define _LATA2 0x04
1145 #define _LATA4 0x10
1146 #define _LATA5 0x20
1147
1148 //==============================================================================
1149
1150
1151 //==============================================================================
1152 // CM1CON0 Bits
1153
1154 extern __at(0x0111) __sfr CM1CON0;
1155
1156 typedef struct
1157 {
1158 unsigned C1SYNC : 1;
1159 unsigned C1HYS : 1;
1160 unsigned C1SP : 1;
1161 unsigned : 1;
1162 unsigned C1POL : 1;
1163 unsigned C1OE : 1;
1164 unsigned C1OUT : 1;
1165 unsigned C1ON : 1;
1166 } __CM1CON0bits_t;
1167
1168 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1169
1170 #define _C1SYNC 0x01
1171 #define _C1HYS 0x02
1172 #define _C1SP 0x04
1173 #define _C1POL 0x10
1174 #define _C1OE 0x20
1175 #define _C1OUT 0x40
1176 #define _C1ON 0x80
1177
1178 //==============================================================================
1179
1180
1181 //==============================================================================
1182 // CM1CON1 Bits
1183
1184 extern __at(0x0112) __sfr CM1CON1;
1185
1186 typedef union
1187 {
1188 struct
1189 {
1190 unsigned C1NCH0 : 1;
1191 unsigned C1NCH1 : 1;
1192 unsigned C1NCH2 : 1;
1193 unsigned : 1;
1194 unsigned C1PCH0 : 1;
1195 unsigned C1PCH1 : 1;
1196 unsigned C1INTN : 1;
1197 unsigned C1INTP : 1;
1198 };
1199
1200 struct
1201 {
1202 unsigned C1NCH : 3;
1203 unsigned : 5;
1204 };
1205
1206 struct
1207 {
1208 unsigned : 4;
1209 unsigned C1PCH : 2;
1210 unsigned : 2;
1211 };
1212 } __CM1CON1bits_t;
1213
1214 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1215
1216 #define _C1NCH0 0x01
1217 #define _C1NCH1 0x02
1218 #define _C1NCH2 0x04
1219 #define _C1PCH0 0x10
1220 #define _C1PCH1 0x20
1221 #define _C1INTN 0x40
1222 #define _C1INTP 0x80
1223
1224 //==============================================================================
1225
1226
1227 //==============================================================================
1228 // CMOUT Bits
1229
1230 extern __at(0x0115) __sfr CMOUT;
1231
1232 typedef struct
1233 {
1234 unsigned MC1OUT : 1;
1235 unsigned : 1;
1236 unsigned : 1;
1237 unsigned : 1;
1238 unsigned : 1;
1239 unsigned : 1;
1240 unsigned : 1;
1241 unsigned : 1;
1242 } __CMOUTbits_t;
1243
1244 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1245
1246 #define _MC1OUT 0x01
1247
1248 //==============================================================================
1249
1250
1251 //==============================================================================
1252 // BORCON Bits
1253
1254 extern __at(0x0116) __sfr BORCON;
1255
1256 typedef struct
1257 {
1258 unsigned BORRDY : 1;
1259 unsigned : 1;
1260 unsigned : 1;
1261 unsigned : 1;
1262 unsigned : 1;
1263 unsigned : 1;
1264 unsigned BORFS : 1;
1265 unsigned SBOREN : 1;
1266 } __BORCONbits_t;
1267
1268 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1269
1270 #define _BORRDY 0x01
1271 #define _BORFS 0x40
1272 #define _SBOREN 0x80
1273
1274 //==============================================================================
1275
1276
1277 //==============================================================================
1278 // FVRCON Bits
1279
1280 extern __at(0x0117) __sfr FVRCON;
1281
1282 typedef union
1283 {
1284 struct
1285 {
1286 unsigned ADFVR0 : 1;
1287 unsigned ADFVR1 : 1;
1288 unsigned CDAFVR0 : 1;
1289 unsigned CDAFVR1 : 1;
1290 unsigned TSRNG : 1;
1291 unsigned TSEN : 1;
1292 unsigned FVRRDY : 1;
1293 unsigned FVREN : 1;
1294 };
1295
1296 struct
1297 {
1298 unsigned ADFVR : 2;
1299 unsigned : 6;
1300 };
1301
1302 struct
1303 {
1304 unsigned : 2;
1305 unsigned CDAFVR : 2;
1306 unsigned : 4;
1307 };
1308 } __FVRCONbits_t;
1309
1310 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1311
1312 #define _ADFVR0 0x01
1313 #define _ADFVR1 0x02
1314 #define _CDAFVR0 0x04
1315 #define _CDAFVR1 0x08
1316 #define _TSRNG 0x10
1317 #define _TSEN 0x20
1318 #define _FVRRDY 0x40
1319 #define _FVREN 0x80
1320
1321 //==============================================================================
1322
1323
1324 //==============================================================================
1325 // DACCON0 Bits
1326
1327 extern __at(0x0118) __sfr DACCON0;
1328
1329 typedef union
1330 {
1331 struct
1332 {
1333 unsigned : 1;
1334 unsigned : 1;
1335 unsigned DACPSS0 : 1;
1336 unsigned DACPSS1 : 1;
1337 unsigned : 1;
1338 unsigned DACOE : 1;
1339 unsigned DACLPS : 1;
1340 unsigned DACEN : 1;
1341 };
1342
1343 struct
1344 {
1345 unsigned : 2;
1346 unsigned DACPSS : 2;
1347 unsigned : 4;
1348 };
1349 } __DACCON0bits_t;
1350
1351 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1352
1353 #define _DACPSS0 0x04
1354 #define _DACPSS1 0x08
1355 #define _DACOE 0x20
1356 #define _DACLPS 0x40
1357 #define _DACEN 0x80
1358
1359 //==============================================================================
1360
1361
1362 //==============================================================================
1363 // DACCON1 Bits
1364
1365 extern __at(0x0119) __sfr DACCON1;
1366
1367 typedef union
1368 {
1369 struct
1370 {
1371 unsigned DACR0 : 1;
1372 unsigned DACR1 : 1;
1373 unsigned DACR2 : 1;
1374 unsigned DACR3 : 1;
1375 unsigned DACR4 : 1;
1376 unsigned : 1;
1377 unsigned : 1;
1378 unsigned : 1;
1379 };
1380
1381 struct
1382 {
1383 unsigned DACR : 5;
1384 unsigned : 3;
1385 };
1386 } __DACCON1bits_t;
1387
1388 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1389
1390 #define _DACR0 0x01
1391 #define _DACR1 0x02
1392 #define _DACR2 0x04
1393 #define _DACR3 0x08
1394 #define _DACR4 0x10
1395
1396 //==============================================================================
1397
1398
1399 //==============================================================================
1400 // APFCON Bits
1401
1402 extern __at(0x011D) __sfr APFCON;
1403
1404 typedef struct
1405 {
1406 unsigned P1SEL : 1;
1407 unsigned P2SEL : 1;
1408 unsigned TXCKSEL : 1;
1409 unsigned T1GSEL : 1;
1410 unsigned : 1;
1411 unsigned CWGBSEL : 1;
1412 unsigned CWGASEL : 1;
1413 unsigned RXDTSEL : 1;
1414 } __APFCONbits_t;
1415
1416 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1417
1418 #define _P1SEL 0x01
1419 #define _P2SEL 0x02
1420 #define _TXCKSEL 0x04
1421 #define _T1GSEL 0x08
1422 #define _CWGBSEL 0x20
1423 #define _CWGASEL 0x40
1424 #define _RXDTSEL 0x80
1425
1426 //==============================================================================
1427
1428
1429 //==============================================================================
1430 // APFCON0 Bits
1431
1432 extern __at(0x011D) __sfr APFCON0;
1433
1434 typedef struct
1435 {
1436 unsigned P1SEL : 1;
1437 unsigned P2SEL : 1;
1438 unsigned TXCKSEL : 1;
1439 unsigned T1GSEL : 1;
1440 unsigned : 1;
1441 unsigned CWGBSEL : 1;
1442 unsigned CWGASEL : 1;
1443 unsigned RXDTSEL : 1;
1444 } __APFCON0bits_t;
1445
1446 extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
1447
1448 #define _APFCON0_P1SEL 0x01
1449 #define _APFCON0_P2SEL 0x02
1450 #define _APFCON0_TXCKSEL 0x04
1451 #define _APFCON0_T1GSEL 0x08
1452 #define _APFCON0_CWGBSEL 0x20
1453 #define _APFCON0_CWGASEL 0x40
1454 #define _APFCON0_RXDTSEL 0x80
1455
1456 //==============================================================================
1457
1458
1459 //==============================================================================
1460 // ANSELA Bits
1461
1462 extern __at(0x018C) __sfr ANSELA;
1463
1464 typedef struct
1465 {
1466 unsigned ANSA0 : 1;
1467 unsigned ANSA1 : 1;
1468 unsigned ANSA2 : 1;
1469 unsigned : 1;
1470 unsigned ANSA4 : 1;
1471 unsigned : 1;
1472 unsigned : 1;
1473 unsigned : 1;
1474 } __ANSELAbits_t;
1475
1476 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1477
1478 #define _ANSA0 0x01
1479 #define _ANSA1 0x02
1480 #define _ANSA2 0x04
1481 #define _ANSA4 0x10
1482
1483 //==============================================================================
1484
1485 extern __at(0x0191) __sfr PMADR;
1486 extern __at(0x0191) __sfr PMADRL;
1487 extern __at(0x0192) __sfr PMADRH;
1488 extern __at(0x0193) __sfr PMDAT;
1489 extern __at(0x0193) __sfr PMDATL;
1490 extern __at(0x0194) __sfr PMDATH;
1491
1492 //==============================================================================
1493 // PMCON1 Bits
1494
1495 extern __at(0x0195) __sfr PMCON1;
1496
1497 typedef struct
1498 {
1499 unsigned RD : 1;
1500 unsigned WR : 1;
1501 unsigned WREN : 1;
1502 unsigned WRERR : 1;
1503 unsigned FREE : 1;
1504 unsigned LWLO : 1;
1505 unsigned CFGS : 1;
1506 unsigned : 1;
1507 } __PMCON1bits_t;
1508
1509 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1510
1511 #define _RD 0x01
1512 #define _WR 0x02
1513 #define _WREN 0x04
1514 #define _WRERR 0x08
1515 #define _FREE 0x10
1516 #define _LWLO 0x20
1517 #define _CFGS 0x40
1518
1519 //==============================================================================
1520
1521 extern __at(0x0196) __sfr PMCON2;
1522
1523 //==============================================================================
1524 // VREGCON Bits
1525
1526 extern __at(0x0197) __sfr VREGCON;
1527
1528 typedef struct
1529 {
1530 unsigned : 1;
1531 unsigned VREGPM : 1;
1532 unsigned : 1;
1533 unsigned : 1;
1534 unsigned : 1;
1535 unsigned : 1;
1536 unsigned : 1;
1537 unsigned : 1;
1538 } __VREGCONbits_t;
1539
1540 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1541
1542 #define _VREGPM 0x02
1543
1544 //==============================================================================
1545
1546 extern __at(0x0199) __sfr RCREG;
1547 extern __at(0x019A) __sfr TXREG;
1548 extern __at(0x019B) __sfr SPBRG;
1549 extern __at(0x019B) __sfr SPBRGL;
1550 extern __at(0x019C) __sfr SPBRGH;
1551
1552 //==============================================================================
1553 // RCSTA Bits
1554
1555 extern __at(0x019D) __sfr RCSTA;
1556
1557 typedef struct
1558 {
1559 unsigned RX9D : 1;
1560 unsigned OERR : 1;
1561 unsigned FERR : 1;
1562 unsigned ADDEN : 1;
1563 unsigned CREN : 1;
1564 unsigned SREN : 1;
1565 unsigned RX9 : 1;
1566 unsigned SPEN : 1;
1567 } __RCSTAbits_t;
1568
1569 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1570
1571 #define _RX9D 0x01
1572 #define _OERR 0x02
1573 #define _FERR 0x04
1574 #define _ADDEN 0x08
1575 #define _CREN 0x10
1576 #define _SREN 0x20
1577 #define _RX9 0x40
1578 #define _SPEN 0x80
1579
1580 //==============================================================================
1581
1582
1583 //==============================================================================
1584 // TXSTA Bits
1585
1586 extern __at(0x019E) __sfr TXSTA;
1587
1588 typedef struct
1589 {
1590 unsigned TX9D : 1;
1591 unsigned TRMT : 1;
1592 unsigned BRGH : 1;
1593 unsigned SENDB : 1;
1594 unsigned SYNC : 1;
1595 unsigned TXEN : 1;
1596 unsigned TX9 : 1;
1597 unsigned CSRC : 1;
1598 } __TXSTAbits_t;
1599
1600 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1601
1602 #define _TX9D 0x01
1603 #define _TRMT 0x02
1604 #define _BRGH 0x04
1605 #define _SENDB 0x08
1606 #define _SYNC 0x10
1607 #define _TXEN 0x20
1608 #define _TX9 0x40
1609 #define _CSRC 0x80
1610
1611 //==============================================================================
1612
1613
1614 //==============================================================================
1615 // BAUDCON Bits
1616
1617 extern __at(0x019F) __sfr BAUDCON;
1618
1619 typedef struct
1620 {
1621 unsigned ABDEN : 1;
1622 unsigned WUE : 1;
1623 unsigned : 1;
1624 unsigned BRG16 : 1;
1625 unsigned SCKP : 1;
1626 unsigned : 1;
1627 unsigned RCIDL : 1;
1628 unsigned ABDOVF : 1;
1629 } __BAUDCONbits_t;
1630
1631 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1632
1633 #define _ABDEN 0x01
1634 #define _WUE 0x02
1635 #define _BRG16 0x08
1636 #define _SCKP 0x10
1637 #define _RCIDL 0x40
1638 #define _ABDOVF 0x80
1639
1640 //==============================================================================
1641
1642
1643 //==============================================================================
1644 // WPUA Bits
1645
1646 extern __at(0x020C) __sfr WPUA;
1647
1648 typedef union
1649 {
1650 struct
1651 {
1652 unsigned WPUA0 : 1;
1653 unsigned WPUA1 : 1;
1654 unsigned WPUA2 : 1;
1655 unsigned WPUA3 : 1;
1656 unsigned WPUA4 : 1;
1657 unsigned WPUA5 : 1;
1658 unsigned : 1;
1659 unsigned : 1;
1660 };
1661
1662 struct
1663 {
1664 unsigned WPUA : 6;
1665 unsigned : 2;
1666 };
1667 } __WPUAbits_t;
1668
1669 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1670
1671 #define _WPUA0 0x01
1672 #define _WPUA1 0x02
1673 #define _WPUA2 0x04
1674 #define _WPUA3 0x08
1675 #define _WPUA4 0x10
1676 #define _WPUA5 0x20
1677
1678 //==============================================================================
1679
1680
1681 //==============================================================================
1682 // ODCONA Bits
1683
1684 extern __at(0x028C) __sfr ODCONA;
1685
1686 typedef struct
1687 {
1688 unsigned ODA0 : 1;
1689 unsigned ODA1 : 1;
1690 unsigned ODA2 : 1;
1691 unsigned : 1;
1692 unsigned ODA4 : 1;
1693 unsigned ODA5 : 1;
1694 unsigned : 1;
1695 unsigned : 1;
1696 } __ODCONAbits_t;
1697
1698 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
1699
1700 #define _ODA0 0x01
1701 #define _ODA1 0x02
1702 #define _ODA2 0x04
1703 #define _ODA4 0x10
1704 #define _ODA5 0x20
1705
1706 //==============================================================================
1707
1708
1709 //==============================================================================
1710 // SLRCONA Bits
1711
1712 extern __at(0x030C) __sfr SLRCONA;
1713
1714 typedef struct
1715 {
1716 unsigned SLRA0 : 1;
1717 unsigned SLRA1 : 1;
1718 unsigned SLRA2 : 1;
1719 unsigned : 1;
1720 unsigned SLRA4 : 1;
1721 unsigned SLRA5 : 1;
1722 unsigned : 1;
1723 unsigned : 1;
1724 } __SLRCONAbits_t;
1725
1726 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
1727
1728 #define _SLRA0 0x01
1729 #define _SLRA1 0x02
1730 #define _SLRA2 0x04
1731 #define _SLRA4 0x10
1732 #define _SLRA5 0x20
1733
1734 //==============================================================================
1735
1736
1737 //==============================================================================
1738 // INLVLA Bits
1739
1740 extern __at(0x038C) __sfr INLVLA;
1741
1742 typedef union
1743 {
1744 struct
1745 {
1746 unsigned INLVLA0 : 1;
1747 unsigned INLVLA1 : 1;
1748 unsigned INLVLA2 : 1;
1749 unsigned INLVLA3 : 1;
1750 unsigned INLVLA4 : 1;
1751 unsigned INLVLA5 : 1;
1752 unsigned : 1;
1753 unsigned : 1;
1754 };
1755
1756 struct
1757 {
1758 unsigned INLVLA : 6;
1759 unsigned : 2;
1760 };
1761 } __INLVLAbits_t;
1762
1763 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
1764
1765 #define _INLVLA0 0x01
1766 #define _INLVLA1 0x02
1767 #define _INLVLA2 0x04
1768 #define _INLVLA3 0x08
1769 #define _INLVLA4 0x10
1770 #define _INLVLA5 0x20
1771
1772 //==============================================================================
1773
1774
1775 //==============================================================================
1776 // IOCAP Bits
1777
1778 extern __at(0x0391) __sfr IOCAP;
1779
1780 typedef union
1781 {
1782 struct
1783 {
1784 unsigned IOCAP0 : 1;
1785 unsigned IOCAP1 : 1;
1786 unsigned IOCAP2 : 1;
1787 unsigned IOCAP3 : 1;
1788 unsigned IOCAP4 : 1;
1789 unsigned IOCAP5 : 1;
1790 unsigned : 1;
1791 unsigned : 1;
1792 };
1793
1794 struct
1795 {
1796 unsigned IOCAP : 6;
1797 unsigned : 2;
1798 };
1799 } __IOCAPbits_t;
1800
1801 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1802
1803 #define _IOCAP0 0x01
1804 #define _IOCAP1 0x02
1805 #define _IOCAP2 0x04
1806 #define _IOCAP3 0x08
1807 #define _IOCAP4 0x10
1808 #define _IOCAP5 0x20
1809
1810 //==============================================================================
1811
1812
1813 //==============================================================================
1814 // IOCAN Bits
1815
1816 extern __at(0x0392) __sfr IOCAN;
1817
1818 typedef union
1819 {
1820 struct
1821 {
1822 unsigned IOCAN0 : 1;
1823 unsigned IOCAN1 : 1;
1824 unsigned IOCAN2 : 1;
1825 unsigned IOCAN3 : 1;
1826 unsigned IOCAN4 : 1;
1827 unsigned IOCAN5 : 1;
1828 unsigned : 1;
1829 unsigned : 1;
1830 };
1831
1832 struct
1833 {
1834 unsigned IOCAN : 6;
1835 unsigned : 2;
1836 };
1837 } __IOCANbits_t;
1838
1839 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
1840
1841 #define _IOCAN0 0x01
1842 #define _IOCAN1 0x02
1843 #define _IOCAN2 0x04
1844 #define _IOCAN3 0x08
1845 #define _IOCAN4 0x10
1846 #define _IOCAN5 0x20
1847
1848 //==============================================================================
1849
1850
1851 //==============================================================================
1852 // IOCAF Bits
1853
1854 extern __at(0x0393) __sfr IOCAF;
1855
1856 typedef union
1857 {
1858 struct
1859 {
1860 unsigned IOCAF0 : 1;
1861 unsigned IOCAF1 : 1;
1862 unsigned IOCAF2 : 1;
1863 unsigned IOCAF3 : 1;
1864 unsigned IOCAF4 : 1;
1865 unsigned IOCAF5 : 1;
1866 unsigned : 1;
1867 unsigned : 1;
1868 };
1869
1870 struct
1871 {
1872 unsigned IOCAF : 6;
1873 unsigned : 2;
1874 };
1875 } __IOCAFbits_t;
1876
1877 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
1878
1879 #define _IOCAF0 0x01
1880 #define _IOCAF1 0x02
1881 #define _IOCAF2 0x04
1882 #define _IOCAF3 0x08
1883 #define _IOCAF4 0x10
1884 #define _IOCAF5 0x20
1885
1886 //==============================================================================
1887
1888
1889 //==============================================================================
1890 // CWG1DBR Bits
1891
1892 extern __at(0x0691) __sfr CWG1DBR;
1893
1894 typedef union
1895 {
1896 struct
1897 {
1898 unsigned CWG1DBR0 : 1;
1899 unsigned CWG1DBR1 : 1;
1900 unsigned CWG1DBR2 : 1;
1901 unsigned CWG1DBR3 : 1;
1902 unsigned CWG1DBR4 : 1;
1903 unsigned CWG1DBR5 : 1;
1904 unsigned : 1;
1905 unsigned : 1;
1906 };
1907
1908 struct
1909 {
1910 unsigned CWG1DBR : 6;
1911 unsigned : 2;
1912 };
1913 } __CWG1DBRbits_t;
1914
1915 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
1916
1917 #define _CWG1DBR0 0x01
1918 #define _CWG1DBR1 0x02
1919 #define _CWG1DBR2 0x04
1920 #define _CWG1DBR3 0x08
1921 #define _CWG1DBR4 0x10
1922 #define _CWG1DBR5 0x20
1923
1924 //==============================================================================
1925
1926
1927 //==============================================================================
1928 // CWG1DBF Bits
1929
1930 extern __at(0x0692) __sfr CWG1DBF;
1931
1932 typedef union
1933 {
1934 struct
1935 {
1936 unsigned CWG1DBF0 : 1;
1937 unsigned CWG1DBF1 : 1;
1938 unsigned CWG1DBF2 : 1;
1939 unsigned CWG1DBF3 : 1;
1940 unsigned CWG1DBF4 : 1;
1941 unsigned CWG1DBF5 : 1;
1942 unsigned : 1;
1943 unsigned : 1;
1944 };
1945
1946 struct
1947 {
1948 unsigned CWG1DBF : 6;
1949 unsigned : 2;
1950 };
1951 } __CWG1DBFbits_t;
1952
1953 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
1954
1955 #define _CWG1DBF0 0x01
1956 #define _CWG1DBF1 0x02
1957 #define _CWG1DBF2 0x04
1958 #define _CWG1DBF3 0x08
1959 #define _CWG1DBF4 0x10
1960 #define _CWG1DBF5 0x20
1961
1962 //==============================================================================
1963
1964
1965 //==============================================================================
1966 // CWG1CON0 Bits
1967
1968 extern __at(0x0693) __sfr CWG1CON0;
1969
1970 typedef struct
1971 {
1972 unsigned G1CS0 : 1;
1973 unsigned : 1;
1974 unsigned : 1;
1975 unsigned G1POLA : 1;
1976 unsigned G1POLB : 1;
1977 unsigned G1OEA : 1;
1978 unsigned G1OEB : 1;
1979 unsigned G1EN : 1;
1980 } __CWG1CON0bits_t;
1981
1982 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
1983
1984 #define _G1CS0 0x01
1985 #define _G1POLA 0x08
1986 #define _G1POLB 0x10
1987 #define _G1OEA 0x20
1988 #define _G1OEB 0x40
1989 #define _G1EN 0x80
1990
1991 //==============================================================================
1992
1993
1994 //==============================================================================
1995 // CWG1CON1 Bits
1996
1997 extern __at(0x0694) __sfr CWG1CON1;
1998
1999 typedef union
2000 {
2001 struct
2002 {
2003 unsigned G1IS0 : 1;
2004 unsigned G1IS1 : 1;
2005 unsigned G1IS2 : 1;
2006 unsigned : 1;
2007 unsigned G1ASDLA0 : 1;
2008 unsigned G1ASDLA1 : 1;
2009 unsigned G1ASDLB0 : 1;
2010 unsigned G1ASDLB1 : 1;
2011 };
2012
2013 struct
2014 {
2015 unsigned G1IS : 3;
2016 unsigned : 5;
2017 };
2018
2019 struct
2020 {
2021 unsigned : 4;
2022 unsigned G1ASDLA : 2;
2023 unsigned : 2;
2024 };
2025
2026 struct
2027 {
2028 unsigned : 6;
2029 unsigned G1ASDLB : 2;
2030 };
2031 } __CWG1CON1bits_t;
2032
2033 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2034
2035 #define _G1IS0 0x01
2036 #define _G1IS1 0x02
2037 #define _G1IS2 0x04
2038 #define _G1ASDLA0 0x10
2039 #define _G1ASDLA1 0x20
2040 #define _G1ASDLB0 0x40
2041 #define _G1ASDLB1 0x80
2042
2043 //==============================================================================
2044
2045
2046 //==============================================================================
2047 // CWG1CON2 Bits
2048
2049 extern __at(0x0695) __sfr CWG1CON2;
2050
2051 typedef struct
2052 {
2053 unsigned : 1;
2054 unsigned G1ASDSFLT : 1;
2055 unsigned G1ASDSC1 : 1;
2056 unsigned : 1;
2057 unsigned : 1;
2058 unsigned : 1;
2059 unsigned G1ARSEN : 1;
2060 unsigned G1ASE : 1;
2061 } __CWG1CON2bits_t;
2062
2063 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2064
2065 #define _G1ASDSFLT 0x02
2066 #define _G1ASDSC1 0x04
2067 #define _G1ARSEN 0x40
2068 #define _G1ASE 0x80
2069
2070 //==============================================================================
2071
2072
2073 //==============================================================================
2074 // PWMEN Bits
2075
2076 extern __at(0x0D8E) __sfr PWMEN;
2077
2078 typedef union
2079 {
2080 struct
2081 {
2082 unsigned PWM1EN_A : 1;
2083 unsigned PWM2EN_A : 1;
2084 unsigned PWM3EN_A : 1;
2085 unsigned : 1;
2086 unsigned : 1;
2087 unsigned : 1;
2088 unsigned : 1;
2089 unsigned : 1;
2090 };
2091
2092 struct
2093 {
2094 unsigned MPWM1EN : 1;
2095 unsigned MPWM2EN : 1;
2096 unsigned MPWM3EN : 1;
2097 unsigned : 1;
2098 unsigned : 1;
2099 unsigned : 1;
2100 unsigned : 1;
2101 unsigned : 1;
2102 };
2103 } __PWMENbits_t;
2104
2105 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
2106
2107 #define _PWM1EN_A 0x01
2108 #define _MPWM1EN 0x01
2109 #define _PWM2EN_A 0x02
2110 #define _MPWM2EN 0x02
2111 #define _PWM3EN_A 0x04
2112 #define _MPWM3EN 0x04
2113
2114 //==============================================================================
2115
2116
2117 //==============================================================================
2118 // PWMLD Bits
2119
2120 extern __at(0x0D8F) __sfr PWMLD;
2121
2122 typedef union
2123 {
2124 struct
2125 {
2126 unsigned PWM1LDA_A : 1;
2127 unsigned PWM2LDA_A : 1;
2128 unsigned PWM3LDA_A : 1;
2129 unsigned : 1;
2130 unsigned : 1;
2131 unsigned : 1;
2132 unsigned : 1;
2133 unsigned : 1;
2134 };
2135
2136 struct
2137 {
2138 unsigned MPWM1LD : 1;
2139 unsigned MPWM2LD : 1;
2140 unsigned MPWM3LD : 1;
2141 unsigned : 1;
2142 unsigned : 1;
2143 unsigned : 1;
2144 unsigned : 1;
2145 unsigned : 1;
2146 };
2147 } __PWMLDbits_t;
2148
2149 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
2150
2151 #define _PWM1LDA_A 0x01
2152 #define _MPWM1LD 0x01
2153 #define _PWM2LDA_A 0x02
2154 #define _MPWM2LD 0x02
2155 #define _PWM3LDA_A 0x04
2156 #define _MPWM3LD 0x04
2157
2158 //==============================================================================
2159
2160
2161 //==============================================================================
2162 // PWMOUT Bits
2163
2164 extern __at(0x0D90) __sfr PWMOUT;
2165
2166 typedef union
2167 {
2168 struct
2169 {
2170 unsigned PWM1OUT_A : 1;
2171 unsigned PWM2OUT_A : 1;
2172 unsigned PWM3OUT_A : 1;
2173 unsigned : 1;
2174 unsigned : 1;
2175 unsigned : 1;
2176 unsigned : 1;
2177 unsigned : 1;
2178 };
2179
2180 struct
2181 {
2182 unsigned MPWM1OUT : 1;
2183 unsigned MPWM2OUT : 1;
2184 unsigned MPWM3OUT : 1;
2185 unsigned : 1;
2186 unsigned : 1;
2187 unsigned : 1;
2188 unsigned : 1;
2189 unsigned : 1;
2190 };
2191 } __PWMOUTbits_t;
2192
2193 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
2194
2195 #define _PWM1OUT_A 0x01
2196 #define _MPWM1OUT 0x01
2197 #define _PWM2OUT_A 0x02
2198 #define _MPWM2OUT 0x02
2199 #define _PWM3OUT_A 0x04
2200 #define _MPWM3OUT 0x04
2201
2202 //==============================================================================
2203
2204 extern __at(0x0D91) __sfr PWM1PH;
2205
2206 //==============================================================================
2207 // PWM1PHL Bits
2208
2209 extern __at(0x0D91) __sfr PWM1PHL;
2210
2211 typedef struct
2212 {
2213 unsigned PWM1PHL0 : 1;
2214 unsigned PWM1PHL1 : 1;
2215 unsigned PWM1PHL2 : 1;
2216 unsigned PWM1PHL3 : 1;
2217 unsigned PWM1PHL4 : 1;
2218 unsigned PWM1PHL5 : 1;
2219 unsigned PWM1PHL6 : 1;
2220 unsigned PWM1PHL7 : 1;
2221 } __PWM1PHLbits_t;
2222
2223 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
2224
2225 #define _PWM1PHL0 0x01
2226 #define _PWM1PHL1 0x02
2227 #define _PWM1PHL2 0x04
2228 #define _PWM1PHL3 0x08
2229 #define _PWM1PHL4 0x10
2230 #define _PWM1PHL5 0x20
2231 #define _PWM1PHL6 0x40
2232 #define _PWM1PHL7 0x80
2233
2234 //==============================================================================
2235
2236
2237 //==============================================================================
2238 // PWM1PHH Bits
2239
2240 extern __at(0x0D92) __sfr PWM1PHH;
2241
2242 typedef struct
2243 {
2244 unsigned PWM1PHH0 : 1;
2245 unsigned PWM1PHH1 : 1;
2246 unsigned PWM1PHH2 : 1;
2247 unsigned PWM1PHH3 : 1;
2248 unsigned PWM1PHH4 : 1;
2249 unsigned PWM1PHH5 : 1;
2250 unsigned PWM1PHH6 : 1;
2251 unsigned PWM1PHH7 : 1;
2252 } __PWM1PHHbits_t;
2253
2254 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
2255
2256 #define _PWM1PHH0 0x01
2257 #define _PWM1PHH1 0x02
2258 #define _PWM1PHH2 0x04
2259 #define _PWM1PHH3 0x08
2260 #define _PWM1PHH4 0x10
2261 #define _PWM1PHH5 0x20
2262 #define _PWM1PHH6 0x40
2263 #define _PWM1PHH7 0x80
2264
2265 //==============================================================================
2266
2267 extern __at(0x0D93) __sfr PWM1DC;
2268
2269 //==============================================================================
2270 // PWM1DCL Bits
2271
2272 extern __at(0x0D93) __sfr PWM1DCL;
2273
2274 typedef struct
2275 {
2276 unsigned PWM1DCL0 : 1;
2277 unsigned PWM1DCL1 : 1;
2278 unsigned PWM1DCL2 : 1;
2279 unsigned PWM1DCL3 : 1;
2280 unsigned PWM1DCL4 : 1;
2281 unsigned PWM1DCL5 : 1;
2282 unsigned PWM1DCL6 : 1;
2283 unsigned PWM1DCL7 : 1;
2284 } __PWM1DCLbits_t;
2285
2286 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
2287
2288 #define _PWM1DCL0 0x01
2289 #define _PWM1DCL1 0x02
2290 #define _PWM1DCL2 0x04
2291 #define _PWM1DCL3 0x08
2292 #define _PWM1DCL4 0x10
2293 #define _PWM1DCL5 0x20
2294 #define _PWM1DCL6 0x40
2295 #define _PWM1DCL7 0x80
2296
2297 //==============================================================================
2298
2299
2300 //==============================================================================
2301 // PWM1DCH Bits
2302
2303 extern __at(0x0D94) __sfr PWM1DCH;
2304
2305 typedef struct
2306 {
2307 unsigned PWM1DCH0 : 1;
2308 unsigned PWM1DCH1 : 1;
2309 unsigned PWM1DCH2 : 1;
2310 unsigned PWM1DCH3 : 1;
2311 unsigned PWM1DCH4 : 1;
2312 unsigned PWM1DCH5 : 1;
2313 unsigned PWM1DCH6 : 1;
2314 unsigned PWM1DCH7 : 1;
2315 } __PWM1DCHbits_t;
2316
2317 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
2318
2319 #define _PWM1DCH0 0x01
2320 #define _PWM1DCH1 0x02
2321 #define _PWM1DCH2 0x04
2322 #define _PWM1DCH3 0x08
2323 #define _PWM1DCH4 0x10
2324 #define _PWM1DCH5 0x20
2325 #define _PWM1DCH6 0x40
2326 #define _PWM1DCH7 0x80
2327
2328 //==============================================================================
2329
2330 extern __at(0x0D95) __sfr PWM1PR;
2331
2332 //==============================================================================
2333 // PWM1PRL Bits
2334
2335 extern __at(0x0D95) __sfr PWM1PRL;
2336
2337 typedef struct
2338 {
2339 unsigned PWM1PRL0 : 1;
2340 unsigned PWM1PRL1 : 1;
2341 unsigned PWM1PRL2 : 1;
2342 unsigned PWM1PRL3 : 1;
2343 unsigned PWM1PRL4 : 1;
2344 unsigned PWM1PRL5 : 1;
2345 unsigned PWM1PRL6 : 1;
2346 unsigned PWM1PRL7 : 1;
2347 } __PWM1PRLbits_t;
2348
2349 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
2350
2351 #define _PWM1PRL0 0x01
2352 #define _PWM1PRL1 0x02
2353 #define _PWM1PRL2 0x04
2354 #define _PWM1PRL3 0x08
2355 #define _PWM1PRL4 0x10
2356 #define _PWM1PRL5 0x20
2357 #define _PWM1PRL6 0x40
2358 #define _PWM1PRL7 0x80
2359
2360 //==============================================================================
2361
2362
2363 //==============================================================================
2364 // PWM1PRH Bits
2365
2366 extern __at(0x0D96) __sfr PWM1PRH;
2367
2368 typedef struct
2369 {
2370 unsigned PWM1PRH0 : 1;
2371 unsigned PWM1PRH1 : 1;
2372 unsigned PWM1PRH2 : 1;
2373 unsigned PWM1PRH3 : 1;
2374 unsigned PWM1PRH4 : 1;
2375 unsigned PWM1PRH5 : 1;
2376 unsigned PWM1PRH6 : 1;
2377 unsigned PWM1PRH7 : 1;
2378 } __PWM1PRHbits_t;
2379
2380 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
2381
2382 #define _PWM1PRH0 0x01
2383 #define _PWM1PRH1 0x02
2384 #define _PWM1PRH2 0x04
2385 #define _PWM1PRH3 0x08
2386 #define _PWM1PRH4 0x10
2387 #define _PWM1PRH5 0x20
2388 #define _PWM1PRH6 0x40
2389 #define _PWM1PRH7 0x80
2390
2391 //==============================================================================
2392
2393 extern __at(0x0D97) __sfr PWM1OF;
2394
2395 //==============================================================================
2396 // PWM1OFL Bits
2397
2398 extern __at(0x0D97) __sfr PWM1OFL;
2399
2400 typedef struct
2401 {
2402 unsigned PWM1OFL0 : 1;
2403 unsigned PWM1OFL1 : 1;
2404 unsigned PWM1OFL2 : 1;
2405 unsigned PWM1OFL3 : 1;
2406 unsigned PWM1OFL4 : 1;
2407 unsigned PWM1OFL5 : 1;
2408 unsigned PWM1OFL6 : 1;
2409 unsigned PWM1OFL7 : 1;
2410 } __PWM1OFLbits_t;
2411
2412 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
2413
2414 #define _PWM1OFL0 0x01
2415 #define _PWM1OFL1 0x02
2416 #define _PWM1OFL2 0x04
2417 #define _PWM1OFL3 0x08
2418 #define _PWM1OFL4 0x10
2419 #define _PWM1OFL5 0x20
2420 #define _PWM1OFL6 0x40
2421 #define _PWM1OFL7 0x80
2422
2423 //==============================================================================
2424
2425
2426 //==============================================================================
2427 // PWM1OFH Bits
2428
2429 extern __at(0x0D98) __sfr PWM1OFH;
2430
2431 typedef struct
2432 {
2433 unsigned PWM1OFH0 : 1;
2434 unsigned PWM1OFH1 : 1;
2435 unsigned PWM1OFH2 : 1;
2436 unsigned PWM1OFH3 : 1;
2437 unsigned PWM1OFH4 : 1;
2438 unsigned PWM1OFH5 : 1;
2439 unsigned PWM1OFH6 : 1;
2440 unsigned PWM1OFH7 : 1;
2441 } __PWM1OFHbits_t;
2442
2443 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
2444
2445 #define _PWM1OFH0 0x01
2446 #define _PWM1OFH1 0x02
2447 #define _PWM1OFH2 0x04
2448 #define _PWM1OFH3 0x08
2449 #define _PWM1OFH4 0x10
2450 #define _PWM1OFH5 0x20
2451 #define _PWM1OFH6 0x40
2452 #define _PWM1OFH7 0x80
2453
2454 //==============================================================================
2455
2456 extern __at(0x0D99) __sfr PWM1TMR;
2457
2458 //==============================================================================
2459 // PWM1TMRL Bits
2460
2461 extern __at(0x0D99) __sfr PWM1TMRL;
2462
2463 typedef struct
2464 {
2465 unsigned PWM1TMRL0 : 1;
2466 unsigned PWM1TMRL1 : 1;
2467 unsigned PWM1TMRL2 : 1;
2468 unsigned PWM1TMRL3 : 1;
2469 unsigned PWM1TMRL4 : 1;
2470 unsigned PWM1TMRL5 : 1;
2471 unsigned PWM1TMRL6 : 1;
2472 unsigned PWM1TMRL7 : 1;
2473 } __PWM1TMRLbits_t;
2474
2475 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
2476
2477 #define _PWM1TMRL0 0x01
2478 #define _PWM1TMRL1 0x02
2479 #define _PWM1TMRL2 0x04
2480 #define _PWM1TMRL3 0x08
2481 #define _PWM1TMRL4 0x10
2482 #define _PWM1TMRL5 0x20
2483 #define _PWM1TMRL6 0x40
2484 #define _PWM1TMRL7 0x80
2485
2486 //==============================================================================
2487
2488
2489 //==============================================================================
2490 // PWM1TMRH Bits
2491
2492 extern __at(0x0D9A) __sfr PWM1TMRH;
2493
2494 typedef struct
2495 {
2496 unsigned PWM1TMRH0 : 1;
2497 unsigned PWM1TMRH1 : 1;
2498 unsigned PWM1TMRH2 : 1;
2499 unsigned PWM1TMRH3 : 1;
2500 unsigned PWM1TMRH4 : 1;
2501 unsigned PWM1TMRH5 : 1;
2502 unsigned PWM1TMRH6 : 1;
2503 unsigned PWM1TMRH7 : 1;
2504 } __PWM1TMRHbits_t;
2505
2506 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
2507
2508 #define _PWM1TMRH0 0x01
2509 #define _PWM1TMRH1 0x02
2510 #define _PWM1TMRH2 0x04
2511 #define _PWM1TMRH3 0x08
2512 #define _PWM1TMRH4 0x10
2513 #define _PWM1TMRH5 0x20
2514 #define _PWM1TMRH6 0x40
2515 #define _PWM1TMRH7 0x80
2516
2517 //==============================================================================
2518
2519
2520 //==============================================================================
2521 // PWM1CON Bits
2522
2523 extern __at(0x0D9B) __sfr PWM1CON;
2524
2525 typedef union
2526 {
2527 struct
2528 {
2529 unsigned : 1;
2530 unsigned : 1;
2531 unsigned PWM1MODE0 : 1;
2532 unsigned PWM1MODE1 : 1;
2533 unsigned POL : 1;
2534 unsigned OUT : 1;
2535 unsigned OE : 1;
2536 unsigned EN : 1;
2537 };
2538
2539 struct
2540 {
2541 unsigned : 1;
2542 unsigned : 1;
2543 unsigned MODE0 : 1;
2544 unsigned MODE1 : 1;
2545 unsigned PWM1POL : 1;
2546 unsigned PWM1OUT : 1;
2547 unsigned PWM1OE : 1;
2548 unsigned PWM1EN : 1;
2549 };
2550
2551 struct
2552 {
2553 unsigned : 2;
2554 unsigned MODE : 2;
2555 unsigned : 4;
2556 };
2557
2558 struct
2559 {
2560 unsigned : 2;
2561 unsigned PWM1MODE : 2;
2562 unsigned : 4;
2563 };
2564 } __PWM1CONbits_t;
2565
2566 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
2567
2568 #define _PWM1MODE0 0x04
2569 #define _MODE0 0x04
2570 #define _PWM1MODE1 0x08
2571 #define _MODE1 0x08
2572 #define _POL 0x10
2573 #define _PWM1POL 0x10
2574 #define _OUT 0x20
2575 #define _PWM1OUT 0x20
2576 #define _OE 0x40
2577 #define _PWM1OE 0x40
2578 #define _EN 0x80
2579 #define _PWM1EN 0x80
2580
2581 //==============================================================================
2582
2583
2584 //==============================================================================
2585 // PWM1INTCON Bits
2586
2587 extern __at(0x0D9C) __sfr PWM1INTCON;
2588
2589 typedef union
2590 {
2591 struct
2592 {
2593 unsigned PRIE : 1;
2594 unsigned DCIE : 1;
2595 unsigned PHIE : 1;
2596 unsigned OFIE : 1;
2597 unsigned : 1;
2598 unsigned : 1;
2599 unsigned : 1;
2600 unsigned : 1;
2601 };
2602
2603 struct
2604 {
2605 unsigned PWM1PRIE : 1;
2606 unsigned PWM1DCIE : 1;
2607 unsigned PWM1PHIE : 1;
2608 unsigned PWM1OFIE : 1;
2609 unsigned : 1;
2610 unsigned : 1;
2611 unsigned : 1;
2612 unsigned : 1;
2613 };
2614 } __PWM1INTCONbits_t;
2615
2616 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
2617
2618 #define _PRIE 0x01
2619 #define _PWM1PRIE 0x01
2620 #define _DCIE 0x02
2621 #define _PWM1DCIE 0x02
2622 #define _PHIE 0x04
2623 #define _PWM1PHIE 0x04
2624 #define _OFIE 0x08
2625 #define _PWM1OFIE 0x08
2626
2627 //==============================================================================
2628
2629
2630 //==============================================================================
2631 // PWM1INTE Bits
2632
2633 extern __at(0x0D9C) __sfr PWM1INTE;
2634
2635 typedef union
2636 {
2637 struct
2638 {
2639 unsigned PRIE : 1;
2640 unsigned DCIE : 1;
2641 unsigned PHIE : 1;
2642 unsigned OFIE : 1;
2643 unsigned : 1;
2644 unsigned : 1;
2645 unsigned : 1;
2646 unsigned : 1;
2647 };
2648
2649 struct
2650 {
2651 unsigned PWM1PRIE : 1;
2652 unsigned PWM1DCIE : 1;
2653 unsigned PWM1PHIE : 1;
2654 unsigned PWM1OFIE : 1;
2655 unsigned : 1;
2656 unsigned : 1;
2657 unsigned : 1;
2658 unsigned : 1;
2659 };
2660 } __PWM1INTEbits_t;
2661
2662 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
2663
2664 #define _PWM1INTE_PRIE 0x01
2665 #define _PWM1INTE_PWM1PRIE 0x01
2666 #define _PWM1INTE_DCIE 0x02
2667 #define _PWM1INTE_PWM1DCIE 0x02
2668 #define _PWM1INTE_PHIE 0x04
2669 #define _PWM1INTE_PWM1PHIE 0x04
2670 #define _PWM1INTE_OFIE 0x08
2671 #define _PWM1INTE_PWM1OFIE 0x08
2672
2673 //==============================================================================
2674
2675
2676 //==============================================================================
2677 // PWM1INTF Bits
2678
2679 extern __at(0x0D9D) __sfr PWM1INTF;
2680
2681 typedef union
2682 {
2683 struct
2684 {
2685 unsigned PRIF : 1;
2686 unsigned DCIF : 1;
2687 unsigned PHIF : 1;
2688 unsigned OFIF : 1;
2689 unsigned : 1;
2690 unsigned : 1;
2691 unsigned : 1;
2692 unsigned : 1;
2693 };
2694
2695 struct
2696 {
2697 unsigned PWM1PRIF : 1;
2698 unsigned PWM1DCIF : 1;
2699 unsigned PWM1PHIF : 1;
2700 unsigned PWM1OFIF : 1;
2701 unsigned : 1;
2702 unsigned : 1;
2703 unsigned : 1;
2704 unsigned : 1;
2705 };
2706 } __PWM1INTFbits_t;
2707
2708 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
2709
2710 #define _PRIF 0x01
2711 #define _PWM1PRIF 0x01
2712 #define _DCIF 0x02
2713 #define _PWM1DCIF 0x02
2714 #define _PHIF 0x04
2715 #define _PWM1PHIF 0x04
2716 #define _OFIF 0x08
2717 #define _PWM1OFIF 0x08
2718
2719 //==============================================================================
2720
2721
2722 //==============================================================================
2723 // PWM1INTFLG Bits
2724
2725 extern __at(0x0D9D) __sfr PWM1INTFLG;
2726
2727 typedef union
2728 {
2729 struct
2730 {
2731 unsigned PRIF : 1;
2732 unsigned DCIF : 1;
2733 unsigned PHIF : 1;
2734 unsigned OFIF : 1;
2735 unsigned : 1;
2736 unsigned : 1;
2737 unsigned : 1;
2738 unsigned : 1;
2739 };
2740
2741 struct
2742 {
2743 unsigned PWM1PRIF : 1;
2744 unsigned PWM1DCIF : 1;
2745 unsigned PWM1PHIF : 1;
2746 unsigned PWM1OFIF : 1;
2747 unsigned : 1;
2748 unsigned : 1;
2749 unsigned : 1;
2750 unsigned : 1;
2751 };
2752 } __PWM1INTFLGbits_t;
2753
2754 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
2755
2756 #define _PWM1INTFLG_PRIF 0x01
2757 #define _PWM1INTFLG_PWM1PRIF 0x01
2758 #define _PWM1INTFLG_DCIF 0x02
2759 #define _PWM1INTFLG_PWM1DCIF 0x02
2760 #define _PWM1INTFLG_PHIF 0x04
2761 #define _PWM1INTFLG_PWM1PHIF 0x04
2762 #define _PWM1INTFLG_OFIF 0x08
2763 #define _PWM1INTFLG_PWM1OFIF 0x08
2764
2765 //==============================================================================
2766
2767
2768 //==============================================================================
2769 // PWM1CLKCON Bits
2770
2771 extern __at(0x0D9E) __sfr PWM1CLKCON;
2772
2773 typedef union
2774 {
2775 struct
2776 {
2777 unsigned PWM1CS0 : 1;
2778 unsigned PWM1CS1 : 1;
2779 unsigned : 1;
2780 unsigned : 1;
2781 unsigned PWM1PS0 : 1;
2782 unsigned PWM1PS1 : 1;
2783 unsigned PWM1PS2 : 1;
2784 unsigned : 1;
2785 };
2786
2787 struct
2788 {
2789 unsigned CS0 : 1;
2790 unsigned CS1 : 1;
2791 unsigned : 1;
2792 unsigned : 1;
2793 unsigned PS0 : 1;
2794 unsigned PS1 : 1;
2795 unsigned PS2 : 1;
2796 unsigned : 1;
2797 };
2798
2799 struct
2800 {
2801 unsigned PWM1CS : 2;
2802 unsigned : 6;
2803 };
2804
2805 struct
2806 {
2807 unsigned CS : 2;
2808 unsigned : 6;
2809 };
2810
2811 struct
2812 {
2813 unsigned : 4;
2814 unsigned PS : 3;
2815 unsigned : 1;
2816 };
2817
2818 struct
2819 {
2820 unsigned : 4;
2821 unsigned PWM1PS : 3;
2822 unsigned : 1;
2823 };
2824 } __PWM1CLKCONbits_t;
2825
2826 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
2827
2828 #define _PWM1CLKCON_PWM1CS0 0x01
2829 #define _PWM1CLKCON_CS0 0x01
2830 #define _PWM1CLKCON_PWM1CS1 0x02
2831 #define _PWM1CLKCON_CS1 0x02
2832 #define _PWM1CLKCON_PWM1PS0 0x10
2833 #define _PWM1CLKCON_PS0 0x10
2834 #define _PWM1CLKCON_PWM1PS1 0x20
2835 #define _PWM1CLKCON_PS1 0x20
2836 #define _PWM1CLKCON_PWM1PS2 0x40
2837 #define _PWM1CLKCON_PS2 0x40
2838
2839 //==============================================================================
2840
2841
2842 //==============================================================================
2843 // PWM1LDCON Bits
2844
2845 extern __at(0x0D9F) __sfr PWM1LDCON;
2846
2847 typedef union
2848 {
2849 struct
2850 {
2851 unsigned PWM1LDS0 : 1;
2852 unsigned PWM1LDS1 : 1;
2853 unsigned : 1;
2854 unsigned : 1;
2855 unsigned : 1;
2856 unsigned : 1;
2857 unsigned LDT : 1;
2858 unsigned LDA : 1;
2859 };
2860
2861 struct
2862 {
2863 unsigned LDS0 : 1;
2864 unsigned LDS1 : 1;
2865 unsigned : 1;
2866 unsigned : 1;
2867 unsigned : 1;
2868 unsigned : 1;
2869 unsigned PWM1LDM : 1;
2870 unsigned PWM1LD : 1;
2871 };
2872
2873 struct
2874 {
2875 unsigned PWM1LDS : 2;
2876 unsigned : 6;
2877 };
2878
2879 struct
2880 {
2881 unsigned LDS : 2;
2882 unsigned : 6;
2883 };
2884 } __PWM1LDCONbits_t;
2885
2886 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
2887
2888 #define _PWM1LDS0 0x01
2889 #define _LDS0 0x01
2890 #define _PWM1LDS1 0x02
2891 #define _LDS1 0x02
2892 #define _LDT 0x40
2893 #define _PWM1LDM 0x40
2894 #define _LDA 0x80
2895 #define _PWM1LD 0x80
2896
2897 //==============================================================================
2898
2899
2900 //==============================================================================
2901 // PWM1OFCON Bits
2902
2903 extern __at(0x0DA0) __sfr PWM1OFCON;
2904
2905 typedef union
2906 {
2907 struct
2908 {
2909 unsigned PWM1OFS0 : 1;
2910 unsigned PWM1OFS1 : 1;
2911 unsigned : 1;
2912 unsigned : 1;
2913 unsigned OFO : 1;
2914 unsigned PWM1OFM0 : 1;
2915 unsigned PWM1OFM1 : 1;
2916 unsigned : 1;
2917 };
2918
2919 struct
2920 {
2921 unsigned OFS0 : 1;
2922 unsigned OFS1 : 1;
2923 unsigned : 1;
2924 unsigned : 1;
2925 unsigned PWM1OFMC : 1;
2926 unsigned OFM0 : 1;
2927 unsigned OFM1 : 1;
2928 unsigned : 1;
2929 };
2930
2931 struct
2932 {
2933 unsigned OFS : 2;
2934 unsigned : 6;
2935 };
2936
2937 struct
2938 {
2939 unsigned PWM1OFS : 2;
2940 unsigned : 6;
2941 };
2942
2943 struct
2944 {
2945 unsigned : 5;
2946 unsigned PWM1OFM : 2;
2947 unsigned : 1;
2948 };
2949
2950 struct
2951 {
2952 unsigned : 5;
2953 unsigned OFM : 2;
2954 unsigned : 1;
2955 };
2956 } __PWM1OFCONbits_t;
2957
2958 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
2959
2960 #define _PWM1OFS0 0x01
2961 #define _OFS0 0x01
2962 #define _PWM1OFS1 0x02
2963 #define _OFS1 0x02
2964 #define _OFO 0x10
2965 #define _PWM1OFMC 0x10
2966 #define _PWM1OFM0 0x20
2967 #define _OFM0 0x20
2968 #define _PWM1OFM1 0x40
2969 #define _OFM1 0x40
2970
2971 //==============================================================================
2972
2973 extern __at(0x0DA1) __sfr PWM2PH;
2974
2975 //==============================================================================
2976 // PWM2PHL Bits
2977
2978 extern __at(0x0DA1) __sfr PWM2PHL;
2979
2980 typedef struct
2981 {
2982 unsigned PWM2PHL0 : 1;
2983 unsigned PWM2PHL1 : 1;
2984 unsigned PWM2PHL2 : 1;
2985 unsigned PWM2PHL3 : 1;
2986 unsigned PWM2PHL4 : 1;
2987 unsigned PWM2PHL5 : 1;
2988 unsigned PWM2PHL6 : 1;
2989 unsigned PWM2PHL7 : 1;
2990 } __PWM2PHLbits_t;
2991
2992 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
2993
2994 #define _PWM2PHL0 0x01
2995 #define _PWM2PHL1 0x02
2996 #define _PWM2PHL2 0x04
2997 #define _PWM2PHL3 0x08
2998 #define _PWM2PHL4 0x10
2999 #define _PWM2PHL5 0x20
3000 #define _PWM2PHL6 0x40
3001 #define _PWM2PHL7 0x80
3002
3003 //==============================================================================
3004
3005
3006 //==============================================================================
3007 // PWM2PHH Bits
3008
3009 extern __at(0x0DA2) __sfr PWM2PHH;
3010
3011 typedef struct
3012 {
3013 unsigned PWM2PHH0 : 1;
3014 unsigned PWM2PHH1 : 1;
3015 unsigned PWM2PHH2 : 1;
3016 unsigned PWM2PHH3 : 1;
3017 unsigned PWM2PHH4 : 1;
3018 unsigned PWM2PHH5 : 1;
3019 unsigned PWM2PHH6 : 1;
3020 unsigned PWM2PHH7 : 1;
3021 } __PWM2PHHbits_t;
3022
3023 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
3024
3025 #define _PWM2PHH0 0x01
3026 #define _PWM2PHH1 0x02
3027 #define _PWM2PHH2 0x04
3028 #define _PWM2PHH3 0x08
3029 #define _PWM2PHH4 0x10
3030 #define _PWM2PHH5 0x20
3031 #define _PWM2PHH6 0x40
3032 #define _PWM2PHH7 0x80
3033
3034 //==============================================================================
3035
3036 extern __at(0x0DA3) __sfr PWM2DC;
3037
3038 //==============================================================================
3039 // PWM2DCL Bits
3040
3041 extern __at(0x0DA3) __sfr PWM2DCL;
3042
3043 typedef struct
3044 {
3045 unsigned PWM2DCL0 : 1;
3046 unsigned PWM2DCL1 : 1;
3047 unsigned PWM2DCL2 : 1;
3048 unsigned PWM2DCL3 : 1;
3049 unsigned PWM2DCL4 : 1;
3050 unsigned PWM2DCL5 : 1;
3051 unsigned PWM2DCL6 : 1;
3052 unsigned PWM2DCL7 : 1;
3053 } __PWM2DCLbits_t;
3054
3055 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
3056
3057 #define _PWM2DCL0 0x01
3058 #define _PWM2DCL1 0x02
3059 #define _PWM2DCL2 0x04
3060 #define _PWM2DCL3 0x08
3061 #define _PWM2DCL4 0x10
3062 #define _PWM2DCL5 0x20
3063 #define _PWM2DCL6 0x40
3064 #define _PWM2DCL7 0x80
3065
3066 //==============================================================================
3067
3068
3069 //==============================================================================
3070 // PWM2DCH Bits
3071
3072 extern __at(0x0DA4) __sfr PWM2DCH;
3073
3074 typedef struct
3075 {
3076 unsigned PWM2DCH0 : 1;
3077 unsigned PWM2DCH1 : 1;
3078 unsigned PWM2DCH2 : 1;
3079 unsigned PWM2DCH3 : 1;
3080 unsigned PWM2DCH4 : 1;
3081 unsigned PWM2DCH5 : 1;
3082 unsigned PWM2DCH6 : 1;
3083 unsigned PWM2DCH7 : 1;
3084 } __PWM2DCHbits_t;
3085
3086 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
3087
3088 #define _PWM2DCH0 0x01
3089 #define _PWM2DCH1 0x02
3090 #define _PWM2DCH2 0x04
3091 #define _PWM2DCH3 0x08
3092 #define _PWM2DCH4 0x10
3093 #define _PWM2DCH5 0x20
3094 #define _PWM2DCH6 0x40
3095 #define _PWM2DCH7 0x80
3096
3097 //==============================================================================
3098
3099 extern __at(0x0DA5) __sfr PWM2PR;
3100
3101 //==============================================================================
3102 // PWM2PRL Bits
3103
3104 extern __at(0x0DA5) __sfr PWM2PRL;
3105
3106 typedef struct
3107 {
3108 unsigned PWM2PRL0 : 1;
3109 unsigned PWM2PRL1 : 1;
3110 unsigned PWM2PRL2 : 1;
3111 unsigned PWM2PRL3 : 1;
3112 unsigned PWM2PRL4 : 1;
3113 unsigned PWM2PRL5 : 1;
3114 unsigned PWM2PRL6 : 1;
3115 unsigned PWM2PRL7 : 1;
3116 } __PWM2PRLbits_t;
3117
3118 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
3119
3120 #define _PWM2PRL0 0x01
3121 #define _PWM2PRL1 0x02
3122 #define _PWM2PRL2 0x04
3123 #define _PWM2PRL3 0x08
3124 #define _PWM2PRL4 0x10
3125 #define _PWM2PRL5 0x20
3126 #define _PWM2PRL6 0x40
3127 #define _PWM2PRL7 0x80
3128
3129 //==============================================================================
3130
3131
3132 //==============================================================================
3133 // PWM2PRH Bits
3134
3135 extern __at(0x0DA6) __sfr PWM2PRH;
3136
3137 typedef struct
3138 {
3139 unsigned PWM2PRH0 : 1;
3140 unsigned PWM2PRH1 : 1;
3141 unsigned PWM2PRH2 : 1;
3142 unsigned PWM2PRH3 : 1;
3143 unsigned PWM2PRH4 : 1;
3144 unsigned PWM2PRH5 : 1;
3145 unsigned PWM2PRH6 : 1;
3146 unsigned PWM2PRH7 : 1;
3147 } __PWM2PRHbits_t;
3148
3149 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
3150
3151 #define _PWM2PRH0 0x01
3152 #define _PWM2PRH1 0x02
3153 #define _PWM2PRH2 0x04
3154 #define _PWM2PRH3 0x08
3155 #define _PWM2PRH4 0x10
3156 #define _PWM2PRH5 0x20
3157 #define _PWM2PRH6 0x40
3158 #define _PWM2PRH7 0x80
3159
3160 //==============================================================================
3161
3162 extern __at(0x0DA7) __sfr PWM2OF;
3163
3164 //==============================================================================
3165 // PWM2OFL Bits
3166
3167 extern __at(0x0DA7) __sfr PWM2OFL;
3168
3169 typedef struct
3170 {
3171 unsigned PWM2OFL0 : 1;
3172 unsigned PWM2OFL1 : 1;
3173 unsigned PWM2OFL2 : 1;
3174 unsigned PWM2OFL3 : 1;
3175 unsigned PWM2OFL4 : 1;
3176 unsigned PWM2OFL5 : 1;
3177 unsigned PWM2OFL6 : 1;
3178 unsigned PWM2OFL7 : 1;
3179 } __PWM2OFLbits_t;
3180
3181 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
3182
3183 #define _PWM2OFL0 0x01
3184 #define _PWM2OFL1 0x02
3185 #define _PWM2OFL2 0x04
3186 #define _PWM2OFL3 0x08
3187 #define _PWM2OFL4 0x10
3188 #define _PWM2OFL5 0x20
3189 #define _PWM2OFL6 0x40
3190 #define _PWM2OFL7 0x80
3191
3192 //==============================================================================
3193
3194
3195 //==============================================================================
3196 // PWM2OFH Bits
3197
3198 extern __at(0x0DA8) __sfr PWM2OFH;
3199
3200 typedef struct
3201 {
3202 unsigned PWM2OFH0 : 1;
3203 unsigned PWM2OFH1 : 1;
3204 unsigned PWM2OFH2 : 1;
3205 unsigned PWM2OFH3 : 1;
3206 unsigned PWM2OFH4 : 1;
3207 unsigned PWM2OFH5 : 1;
3208 unsigned PWM2OFH6 : 1;
3209 unsigned PWM2OFH7 : 1;
3210 } __PWM2OFHbits_t;
3211
3212 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
3213
3214 #define _PWM2OFH0 0x01
3215 #define _PWM2OFH1 0x02
3216 #define _PWM2OFH2 0x04
3217 #define _PWM2OFH3 0x08
3218 #define _PWM2OFH4 0x10
3219 #define _PWM2OFH5 0x20
3220 #define _PWM2OFH6 0x40
3221 #define _PWM2OFH7 0x80
3222
3223 //==============================================================================
3224
3225 extern __at(0x0DA9) __sfr PWM2TMR;
3226
3227 //==============================================================================
3228 // PWM2TMRL Bits
3229
3230 extern __at(0x0DA9) __sfr PWM2TMRL;
3231
3232 typedef struct
3233 {
3234 unsigned PWM2TMRL0 : 1;
3235 unsigned PWM2TMRL1 : 1;
3236 unsigned PWM2TMRL2 : 1;
3237 unsigned PWM2TMRL3 : 1;
3238 unsigned PWM2TMRL4 : 1;
3239 unsigned PWM2TMRL5 : 1;
3240 unsigned PWM2TMRL6 : 1;
3241 unsigned PWM2TMRL7 : 1;
3242 } __PWM2TMRLbits_t;
3243
3244 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
3245
3246 #define _PWM2TMRL0 0x01
3247 #define _PWM2TMRL1 0x02
3248 #define _PWM2TMRL2 0x04
3249 #define _PWM2TMRL3 0x08
3250 #define _PWM2TMRL4 0x10
3251 #define _PWM2TMRL5 0x20
3252 #define _PWM2TMRL6 0x40
3253 #define _PWM2TMRL7 0x80
3254
3255 //==============================================================================
3256
3257
3258 //==============================================================================
3259 // PWM2TMRH Bits
3260
3261 extern __at(0x0DAA) __sfr PWM2TMRH;
3262
3263 typedef struct
3264 {
3265 unsigned PWM2TMRH0 : 1;
3266 unsigned PWM2TMRH1 : 1;
3267 unsigned PWM2TMRH2 : 1;
3268 unsigned PWM2TMRH3 : 1;
3269 unsigned PWM2TMRH4 : 1;
3270 unsigned PWM2TMRH5 : 1;
3271 unsigned PWM2TMRH6 : 1;
3272 unsigned PWM2TMRH7 : 1;
3273 } __PWM2TMRHbits_t;
3274
3275 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
3276
3277 #define _PWM2TMRH0 0x01
3278 #define _PWM2TMRH1 0x02
3279 #define _PWM2TMRH2 0x04
3280 #define _PWM2TMRH3 0x08
3281 #define _PWM2TMRH4 0x10
3282 #define _PWM2TMRH5 0x20
3283 #define _PWM2TMRH6 0x40
3284 #define _PWM2TMRH7 0x80
3285
3286 //==============================================================================
3287
3288
3289 //==============================================================================
3290 // PWM2CON Bits
3291
3292 extern __at(0x0DAB) __sfr PWM2CON;
3293
3294 typedef union
3295 {
3296 struct
3297 {
3298 unsigned : 1;
3299 unsigned : 1;
3300 unsigned PWM2MODE0 : 1;
3301 unsigned PWM2MODE1 : 1;
3302 unsigned POL : 1;
3303 unsigned OUT : 1;
3304 unsigned OE : 1;
3305 unsigned EN : 1;
3306 };
3307
3308 struct
3309 {
3310 unsigned : 1;
3311 unsigned : 1;
3312 unsigned MODE0 : 1;
3313 unsigned MODE1 : 1;
3314 unsigned PWM2POL : 1;
3315 unsigned PWM2OUT : 1;
3316 unsigned PWM2OE : 1;
3317 unsigned PWM2EN : 1;
3318 };
3319
3320 struct
3321 {
3322 unsigned : 2;
3323 unsigned MODE : 2;
3324 unsigned : 4;
3325 };
3326
3327 struct
3328 {
3329 unsigned : 2;
3330 unsigned PWM2MODE : 2;
3331 unsigned : 4;
3332 };
3333 } __PWM2CONbits_t;
3334
3335 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
3336
3337 #define _PWM2CON_PWM2MODE0 0x04
3338 #define _PWM2CON_MODE0 0x04
3339 #define _PWM2CON_PWM2MODE1 0x08
3340 #define _PWM2CON_MODE1 0x08
3341 #define _PWM2CON_POL 0x10
3342 #define _PWM2CON_PWM2POL 0x10
3343 #define _PWM2CON_OUT 0x20
3344 #define _PWM2CON_PWM2OUT 0x20
3345 #define _PWM2CON_OE 0x40
3346 #define _PWM2CON_PWM2OE 0x40
3347 #define _PWM2CON_EN 0x80
3348 #define _PWM2CON_PWM2EN 0x80
3349
3350 //==============================================================================
3351
3352
3353 //==============================================================================
3354 // PWM2INTCON Bits
3355
3356 extern __at(0x0DAC) __sfr PWM2INTCON;
3357
3358 typedef union
3359 {
3360 struct
3361 {
3362 unsigned PRIE : 1;
3363 unsigned DCIE : 1;
3364 unsigned PHIE : 1;
3365 unsigned OFIE : 1;
3366 unsigned : 1;
3367 unsigned : 1;
3368 unsigned : 1;
3369 unsigned : 1;
3370 };
3371
3372 struct
3373 {
3374 unsigned PWM2PRIE : 1;
3375 unsigned PWM2DCIE : 1;
3376 unsigned PWM2PHIE : 1;
3377 unsigned PWM2OFIE : 1;
3378 unsigned : 1;
3379 unsigned : 1;
3380 unsigned : 1;
3381 unsigned : 1;
3382 };
3383 } __PWM2INTCONbits_t;
3384
3385 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
3386
3387 #define _PWM2INTCON_PRIE 0x01
3388 #define _PWM2INTCON_PWM2PRIE 0x01
3389 #define _PWM2INTCON_DCIE 0x02
3390 #define _PWM2INTCON_PWM2DCIE 0x02
3391 #define _PWM2INTCON_PHIE 0x04
3392 #define _PWM2INTCON_PWM2PHIE 0x04
3393 #define _PWM2INTCON_OFIE 0x08
3394 #define _PWM2INTCON_PWM2OFIE 0x08
3395
3396 //==============================================================================
3397
3398
3399 //==============================================================================
3400 // PWM2INTE Bits
3401
3402 extern __at(0x0DAC) __sfr PWM2INTE;
3403
3404 typedef union
3405 {
3406 struct
3407 {
3408 unsigned PRIE : 1;
3409 unsigned DCIE : 1;
3410 unsigned PHIE : 1;
3411 unsigned OFIE : 1;
3412 unsigned : 1;
3413 unsigned : 1;
3414 unsigned : 1;
3415 unsigned : 1;
3416 };
3417
3418 struct
3419 {
3420 unsigned PWM2PRIE : 1;
3421 unsigned PWM2DCIE : 1;
3422 unsigned PWM2PHIE : 1;
3423 unsigned PWM2OFIE : 1;
3424 unsigned : 1;
3425 unsigned : 1;
3426 unsigned : 1;
3427 unsigned : 1;
3428 };
3429 } __PWM2INTEbits_t;
3430
3431 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
3432
3433 #define _PWM2INTE_PRIE 0x01
3434 #define _PWM2INTE_PWM2PRIE 0x01
3435 #define _PWM2INTE_DCIE 0x02
3436 #define _PWM2INTE_PWM2DCIE 0x02
3437 #define _PWM2INTE_PHIE 0x04
3438 #define _PWM2INTE_PWM2PHIE 0x04
3439 #define _PWM2INTE_OFIE 0x08
3440 #define _PWM2INTE_PWM2OFIE 0x08
3441
3442 //==============================================================================
3443
3444
3445 //==============================================================================
3446 // PWM2INTF Bits
3447
3448 extern __at(0x0DAD) __sfr PWM2INTF;
3449
3450 typedef union
3451 {
3452 struct
3453 {
3454 unsigned PRIF : 1;
3455 unsigned DCIF : 1;
3456 unsigned PHIF : 1;
3457 unsigned OFIF : 1;
3458 unsigned : 1;
3459 unsigned : 1;
3460 unsigned : 1;
3461 unsigned : 1;
3462 };
3463
3464 struct
3465 {
3466 unsigned PWM2PRIF : 1;
3467 unsigned PWM2DCIF : 1;
3468 unsigned PWM2PHIF : 1;
3469 unsigned PWM2OFIF : 1;
3470 unsigned : 1;
3471 unsigned : 1;
3472 unsigned : 1;
3473 unsigned : 1;
3474 };
3475 } __PWM2INTFbits_t;
3476
3477 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
3478
3479 #define _PWM2INTF_PRIF 0x01
3480 #define _PWM2INTF_PWM2PRIF 0x01
3481 #define _PWM2INTF_DCIF 0x02
3482 #define _PWM2INTF_PWM2DCIF 0x02
3483 #define _PWM2INTF_PHIF 0x04
3484 #define _PWM2INTF_PWM2PHIF 0x04
3485 #define _PWM2INTF_OFIF 0x08
3486 #define _PWM2INTF_PWM2OFIF 0x08
3487
3488 //==============================================================================
3489
3490
3491 //==============================================================================
3492 // PWM2INTFLG Bits
3493
3494 extern __at(0x0DAD) __sfr PWM2INTFLG;
3495
3496 typedef union
3497 {
3498 struct
3499 {
3500 unsigned PRIF : 1;
3501 unsigned DCIF : 1;
3502 unsigned PHIF : 1;
3503 unsigned OFIF : 1;
3504 unsigned : 1;
3505 unsigned : 1;
3506 unsigned : 1;
3507 unsigned : 1;
3508 };
3509
3510 struct
3511 {
3512 unsigned PWM2PRIF : 1;
3513 unsigned PWM2DCIF : 1;
3514 unsigned PWM2PHIF : 1;
3515 unsigned PWM2OFIF : 1;
3516 unsigned : 1;
3517 unsigned : 1;
3518 unsigned : 1;
3519 unsigned : 1;
3520 };
3521 } __PWM2INTFLGbits_t;
3522
3523 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
3524
3525 #define _PWM2INTFLG_PRIF 0x01
3526 #define _PWM2INTFLG_PWM2PRIF 0x01
3527 #define _PWM2INTFLG_DCIF 0x02
3528 #define _PWM2INTFLG_PWM2DCIF 0x02
3529 #define _PWM2INTFLG_PHIF 0x04
3530 #define _PWM2INTFLG_PWM2PHIF 0x04
3531 #define _PWM2INTFLG_OFIF 0x08
3532 #define _PWM2INTFLG_PWM2OFIF 0x08
3533
3534 //==============================================================================
3535
3536
3537 //==============================================================================
3538 // PWM2CLKCON Bits
3539
3540 extern __at(0x0DAE) __sfr PWM2CLKCON;
3541
3542 typedef union
3543 {
3544 struct
3545 {
3546 unsigned PWM2CS0 : 1;
3547 unsigned PWM2CS1 : 1;
3548 unsigned : 1;
3549 unsigned : 1;
3550 unsigned PWM2PS0 : 1;
3551 unsigned PWM2PS1 : 1;
3552 unsigned PWM2PS2 : 1;
3553 unsigned : 1;
3554 };
3555
3556 struct
3557 {
3558 unsigned CS0 : 1;
3559 unsigned CS1 : 1;
3560 unsigned : 1;
3561 unsigned : 1;
3562 unsigned PS0 : 1;
3563 unsigned PS1 : 1;
3564 unsigned PS2 : 1;
3565 unsigned : 1;
3566 };
3567
3568 struct
3569 {
3570 unsigned CS : 2;
3571 unsigned : 6;
3572 };
3573
3574 struct
3575 {
3576 unsigned PWM2CS : 2;
3577 unsigned : 6;
3578 };
3579
3580 struct
3581 {
3582 unsigned : 4;
3583 unsigned PWM2PS : 3;
3584 unsigned : 1;
3585 };
3586
3587 struct
3588 {
3589 unsigned : 4;
3590 unsigned PS : 3;
3591 unsigned : 1;
3592 };
3593 } __PWM2CLKCONbits_t;
3594
3595 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
3596
3597 #define _PWM2CLKCON_PWM2CS0 0x01
3598 #define _PWM2CLKCON_CS0 0x01
3599 #define _PWM2CLKCON_PWM2CS1 0x02
3600 #define _PWM2CLKCON_CS1 0x02
3601 #define _PWM2CLKCON_PWM2PS0 0x10
3602 #define _PWM2CLKCON_PS0 0x10
3603 #define _PWM2CLKCON_PWM2PS1 0x20
3604 #define _PWM2CLKCON_PS1 0x20
3605 #define _PWM2CLKCON_PWM2PS2 0x40
3606 #define _PWM2CLKCON_PS2 0x40
3607
3608 //==============================================================================
3609
3610
3611 //==============================================================================
3612 // PWM2LDCON Bits
3613
3614 extern __at(0x0DAF) __sfr PWM2LDCON;
3615
3616 typedef union
3617 {
3618 struct
3619 {
3620 unsigned PWM2LDS0 : 1;
3621 unsigned PWM2LDS1 : 1;
3622 unsigned : 1;
3623 unsigned : 1;
3624 unsigned : 1;
3625 unsigned : 1;
3626 unsigned LDT : 1;
3627 unsigned LDA : 1;
3628 };
3629
3630 struct
3631 {
3632 unsigned LDS0 : 1;
3633 unsigned LDS1 : 1;
3634 unsigned : 1;
3635 unsigned : 1;
3636 unsigned : 1;
3637 unsigned : 1;
3638 unsigned PWM2LDM : 1;
3639 unsigned PWM2LD : 1;
3640 };
3641
3642 struct
3643 {
3644 unsigned LDS : 2;
3645 unsigned : 6;
3646 };
3647
3648 struct
3649 {
3650 unsigned PWM2LDS : 2;
3651 unsigned : 6;
3652 };
3653 } __PWM2LDCONbits_t;
3654
3655 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
3656
3657 #define _PWM2LDCON_PWM2LDS0 0x01
3658 #define _PWM2LDCON_LDS0 0x01
3659 #define _PWM2LDCON_PWM2LDS1 0x02
3660 #define _PWM2LDCON_LDS1 0x02
3661 #define _PWM2LDCON_LDT 0x40
3662 #define _PWM2LDCON_PWM2LDM 0x40
3663 #define _PWM2LDCON_LDA 0x80
3664 #define _PWM2LDCON_PWM2LD 0x80
3665
3666 //==============================================================================
3667
3668
3669 //==============================================================================
3670 // PWM2OFCON Bits
3671
3672 extern __at(0x0DB0) __sfr PWM2OFCON;
3673
3674 typedef union
3675 {
3676 struct
3677 {
3678 unsigned PWM2OFS0 : 1;
3679 unsigned PWM2OFS1 : 1;
3680 unsigned : 1;
3681 unsigned : 1;
3682 unsigned OFO : 1;
3683 unsigned PWM2OFM0 : 1;
3684 unsigned PWM2OFM1 : 1;
3685 unsigned : 1;
3686 };
3687
3688 struct
3689 {
3690 unsigned OFS0 : 1;
3691 unsigned OFS1 : 1;
3692 unsigned : 1;
3693 unsigned : 1;
3694 unsigned PWM2OFMC : 1;
3695 unsigned OFM0 : 1;
3696 unsigned OFM1 : 1;
3697 unsigned : 1;
3698 };
3699
3700 struct
3701 {
3702 unsigned OFS : 2;
3703 unsigned : 6;
3704 };
3705
3706 struct
3707 {
3708 unsigned PWM2OFS : 2;
3709 unsigned : 6;
3710 };
3711
3712 struct
3713 {
3714 unsigned : 5;
3715 unsigned PWM2OFM : 2;
3716 unsigned : 1;
3717 };
3718
3719 struct
3720 {
3721 unsigned : 5;
3722 unsigned OFM : 2;
3723 unsigned : 1;
3724 };
3725 } __PWM2OFCONbits_t;
3726
3727 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
3728
3729 #define _PWM2OFCON_PWM2OFS0 0x01
3730 #define _PWM2OFCON_OFS0 0x01
3731 #define _PWM2OFCON_PWM2OFS1 0x02
3732 #define _PWM2OFCON_OFS1 0x02
3733 #define _PWM2OFCON_OFO 0x10
3734 #define _PWM2OFCON_PWM2OFMC 0x10
3735 #define _PWM2OFCON_PWM2OFM0 0x20
3736 #define _PWM2OFCON_OFM0 0x20
3737 #define _PWM2OFCON_PWM2OFM1 0x40
3738 #define _PWM2OFCON_OFM1 0x40
3739
3740 //==============================================================================
3741
3742 extern __at(0x0DB1) __sfr PWM3PH;
3743
3744 //==============================================================================
3745 // PWM3PHL Bits
3746
3747 extern __at(0x0DB1) __sfr PWM3PHL;
3748
3749 typedef struct
3750 {
3751 unsigned PWM3PHL0 : 1;
3752 unsigned PWM3PHL1 : 1;
3753 unsigned PWM3PHL2 : 1;
3754 unsigned PWM3PHL3 : 1;
3755 unsigned PWM3PHL4 : 1;
3756 unsigned PWM3PHL5 : 1;
3757 unsigned PWM3PHL6 : 1;
3758 unsigned PWM3PHL7 : 1;
3759 } __PWM3PHLbits_t;
3760
3761 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
3762
3763 #define _PWM3PHL0 0x01
3764 #define _PWM3PHL1 0x02
3765 #define _PWM3PHL2 0x04
3766 #define _PWM3PHL3 0x08
3767 #define _PWM3PHL4 0x10
3768 #define _PWM3PHL5 0x20
3769 #define _PWM3PHL6 0x40
3770 #define _PWM3PHL7 0x80
3771
3772 //==============================================================================
3773
3774
3775 //==============================================================================
3776 // PWM3PHH Bits
3777
3778 extern __at(0x0DB2) __sfr PWM3PHH;
3779
3780 typedef struct
3781 {
3782 unsigned PWM3PHH0 : 1;
3783 unsigned PWM3PHH1 : 1;
3784 unsigned PWM3PHH2 : 1;
3785 unsigned PWM3PHH3 : 1;
3786 unsigned PWM3PHH4 : 1;
3787 unsigned PWM3PHH5 : 1;
3788 unsigned PWM3PHH6 : 1;
3789 unsigned PWM3PHH7 : 1;
3790 } __PWM3PHHbits_t;
3791
3792 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
3793
3794 #define _PWM3PHH0 0x01
3795 #define _PWM3PHH1 0x02
3796 #define _PWM3PHH2 0x04
3797 #define _PWM3PHH3 0x08
3798 #define _PWM3PHH4 0x10
3799 #define _PWM3PHH5 0x20
3800 #define _PWM3PHH6 0x40
3801 #define _PWM3PHH7 0x80
3802
3803 //==============================================================================
3804
3805 extern __at(0x0DB3) __sfr PWM3DC;
3806
3807 //==============================================================================
3808 // PWM3DCL Bits
3809
3810 extern __at(0x0DB3) __sfr PWM3DCL;
3811
3812 typedef struct
3813 {
3814 unsigned PWM3DCL0 : 1;
3815 unsigned PWM3DCL1 : 1;
3816 unsigned PWM3DCL2 : 1;
3817 unsigned PWM3DCL3 : 1;
3818 unsigned PWM3DCL4 : 1;
3819 unsigned PWM3DCL5 : 1;
3820 unsigned PWM3DCL6 : 1;
3821 unsigned PWM3DCL7 : 1;
3822 } __PWM3DCLbits_t;
3823
3824 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
3825
3826 #define _PWM3DCL0 0x01
3827 #define _PWM3DCL1 0x02
3828 #define _PWM3DCL2 0x04
3829 #define _PWM3DCL3 0x08
3830 #define _PWM3DCL4 0x10
3831 #define _PWM3DCL5 0x20
3832 #define _PWM3DCL6 0x40
3833 #define _PWM3DCL7 0x80
3834
3835 //==============================================================================
3836
3837
3838 //==============================================================================
3839 // PWM3DCH Bits
3840
3841 extern __at(0x0DB4) __sfr PWM3DCH;
3842
3843 typedef struct
3844 {
3845 unsigned PWM3DCH0 : 1;
3846 unsigned PWM3DCH1 : 1;
3847 unsigned PWM3DCH2 : 1;
3848 unsigned PWM3DCH3 : 1;
3849 unsigned PWM3DCH4 : 1;
3850 unsigned PWM3DCH5 : 1;
3851 unsigned PWM3DCH6 : 1;
3852 unsigned PWM3DCH7 : 1;
3853 } __PWM3DCHbits_t;
3854
3855 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
3856
3857 #define _PWM3DCH0 0x01
3858 #define _PWM3DCH1 0x02
3859 #define _PWM3DCH2 0x04
3860 #define _PWM3DCH3 0x08
3861 #define _PWM3DCH4 0x10
3862 #define _PWM3DCH5 0x20
3863 #define _PWM3DCH6 0x40
3864 #define _PWM3DCH7 0x80
3865
3866 //==============================================================================
3867
3868 extern __at(0x0DB5) __sfr PWM3PR;
3869
3870 //==============================================================================
3871 // PWM3PRL Bits
3872
3873 extern __at(0x0DB5) __sfr PWM3PRL;
3874
3875 typedef struct
3876 {
3877 unsigned PWM3PRL0 : 1;
3878 unsigned PWM3PRL1 : 1;
3879 unsigned PWM3PRL2 : 1;
3880 unsigned PWM3PRL3 : 1;
3881 unsigned PWM3PRL4 : 1;
3882 unsigned PWM3PRL5 : 1;
3883 unsigned PWM3PRL6 : 1;
3884 unsigned PWM3PRL7 : 1;
3885 } __PWM3PRLbits_t;
3886
3887 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
3888
3889 #define _PWM3PRL0 0x01
3890 #define _PWM3PRL1 0x02
3891 #define _PWM3PRL2 0x04
3892 #define _PWM3PRL3 0x08
3893 #define _PWM3PRL4 0x10
3894 #define _PWM3PRL5 0x20
3895 #define _PWM3PRL6 0x40
3896 #define _PWM3PRL7 0x80
3897
3898 //==============================================================================
3899
3900
3901 //==============================================================================
3902 // PWM3PRH Bits
3903
3904 extern __at(0x0DB6) __sfr PWM3PRH;
3905
3906 typedef struct
3907 {
3908 unsigned PWM3PRH0 : 1;
3909 unsigned PWM3PRH1 : 1;
3910 unsigned PWM3PRH2 : 1;
3911 unsigned PWM3PRH3 : 1;
3912 unsigned PWM3PRH4 : 1;
3913 unsigned PWM3PRH5 : 1;
3914 unsigned PWM3PRH6 : 1;
3915 unsigned PWM3PRH7 : 1;
3916 } __PWM3PRHbits_t;
3917
3918 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
3919
3920 #define _PWM3PRH0 0x01
3921 #define _PWM3PRH1 0x02
3922 #define _PWM3PRH2 0x04
3923 #define _PWM3PRH3 0x08
3924 #define _PWM3PRH4 0x10
3925 #define _PWM3PRH5 0x20
3926 #define _PWM3PRH6 0x40
3927 #define _PWM3PRH7 0x80
3928
3929 //==============================================================================
3930
3931 extern __at(0x0DB7) __sfr PWM3OF;
3932
3933 //==============================================================================
3934 // PWM3OFL Bits
3935
3936 extern __at(0x0DB7) __sfr PWM3OFL;
3937
3938 typedef struct
3939 {
3940 unsigned PWM3OFL0 : 1;
3941 unsigned PWM3OFL1 : 1;
3942 unsigned PWM3OFL2 : 1;
3943 unsigned PWM3OFL3 : 1;
3944 unsigned PWM3OFL4 : 1;
3945 unsigned PWM3OFL5 : 1;
3946 unsigned PWM3OFL6 : 1;
3947 unsigned PWM3OFL7 : 1;
3948 } __PWM3OFLbits_t;
3949
3950 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
3951
3952 #define _PWM3OFL0 0x01
3953 #define _PWM3OFL1 0x02
3954 #define _PWM3OFL2 0x04
3955 #define _PWM3OFL3 0x08
3956 #define _PWM3OFL4 0x10
3957 #define _PWM3OFL5 0x20
3958 #define _PWM3OFL6 0x40
3959 #define _PWM3OFL7 0x80
3960
3961 //==============================================================================
3962
3963
3964 //==============================================================================
3965 // PWM3OFH Bits
3966
3967 extern __at(0x0DB8) __sfr PWM3OFH;
3968
3969 typedef struct
3970 {
3971 unsigned PWM3OFH0 : 1;
3972 unsigned PWM3OFH1 : 1;
3973 unsigned PWM3OFH2 : 1;
3974 unsigned PWM3OFH3 : 1;
3975 unsigned PWM3OFH4 : 1;
3976 unsigned PWM3OFH5 : 1;
3977 unsigned PWM3OFH6 : 1;
3978 unsigned PWM3OFH7 : 1;
3979 } __PWM3OFHbits_t;
3980
3981 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
3982
3983 #define _PWM3OFH0 0x01
3984 #define _PWM3OFH1 0x02
3985 #define _PWM3OFH2 0x04
3986 #define _PWM3OFH3 0x08
3987 #define _PWM3OFH4 0x10
3988 #define _PWM3OFH5 0x20
3989 #define _PWM3OFH6 0x40
3990 #define _PWM3OFH7 0x80
3991
3992 //==============================================================================
3993
3994 extern __at(0x0DB9) __sfr PWM3TMR;
3995
3996 //==============================================================================
3997 // PWM3TMRL Bits
3998
3999 extern __at(0x0DB9) __sfr PWM3TMRL;
4000
4001 typedef struct
4002 {
4003 unsigned PWM3TMRL0 : 1;
4004 unsigned PWM3TMRL1 : 1;
4005 unsigned PWM3TMRL2 : 1;
4006 unsigned PWM3TMRL3 : 1;
4007 unsigned PWM3TMRL4 : 1;
4008 unsigned PWM3TMRL5 : 1;
4009 unsigned PWM3TMRL6 : 1;
4010 unsigned PWM3TMRL7 : 1;
4011 } __PWM3TMRLbits_t;
4012
4013 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
4014
4015 #define _PWM3TMRL0 0x01
4016 #define _PWM3TMRL1 0x02
4017 #define _PWM3TMRL2 0x04
4018 #define _PWM3TMRL3 0x08
4019 #define _PWM3TMRL4 0x10
4020 #define _PWM3TMRL5 0x20
4021 #define _PWM3TMRL6 0x40
4022 #define _PWM3TMRL7 0x80
4023
4024 //==============================================================================
4025
4026
4027 //==============================================================================
4028 // PWM3TMRH Bits
4029
4030 extern __at(0x0DBA) __sfr PWM3TMRH;
4031
4032 typedef struct
4033 {
4034 unsigned PWM3TMRH0 : 1;
4035 unsigned PWM3TMRH1 : 1;
4036 unsigned PWM3TMRH2 : 1;
4037 unsigned PWM3TMRH3 : 1;
4038 unsigned PWM3TMRH4 : 1;
4039 unsigned PWM3TMRH5 : 1;
4040 unsigned PWM3TMRH6 : 1;
4041 unsigned PWM3TMRH7 : 1;
4042 } __PWM3TMRHbits_t;
4043
4044 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
4045
4046 #define _PWM3TMRH0 0x01
4047 #define _PWM3TMRH1 0x02
4048 #define _PWM3TMRH2 0x04
4049 #define _PWM3TMRH3 0x08
4050 #define _PWM3TMRH4 0x10
4051 #define _PWM3TMRH5 0x20
4052 #define _PWM3TMRH6 0x40
4053 #define _PWM3TMRH7 0x80
4054
4055 //==============================================================================
4056
4057
4058 //==============================================================================
4059 // PWM3CON Bits
4060
4061 extern __at(0x0DBB) __sfr PWM3CON;
4062
4063 typedef union
4064 {
4065 struct
4066 {
4067 unsigned : 1;
4068 unsigned : 1;
4069 unsigned PWM3MODE0 : 1;
4070 unsigned PWM3MODE1 : 1;
4071 unsigned POL : 1;
4072 unsigned OUT : 1;
4073 unsigned OE : 1;
4074 unsigned EN : 1;
4075 };
4076
4077 struct
4078 {
4079 unsigned : 1;
4080 unsigned : 1;
4081 unsigned MODE0 : 1;
4082 unsigned MODE1 : 1;
4083 unsigned PWM3POL : 1;
4084 unsigned PWM3OUT : 1;
4085 unsigned PWM3OE : 1;
4086 unsigned PWM3EN : 1;
4087 };
4088
4089 struct
4090 {
4091 unsigned : 2;
4092 unsigned PWM3MODE : 2;
4093 unsigned : 4;
4094 };
4095
4096 struct
4097 {
4098 unsigned : 2;
4099 unsigned MODE : 2;
4100 unsigned : 4;
4101 };
4102 } __PWM3CONbits_t;
4103
4104 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
4105
4106 #define _PWM3CON_PWM3MODE0 0x04
4107 #define _PWM3CON_MODE0 0x04
4108 #define _PWM3CON_PWM3MODE1 0x08
4109 #define _PWM3CON_MODE1 0x08
4110 #define _PWM3CON_POL 0x10
4111 #define _PWM3CON_PWM3POL 0x10
4112 #define _PWM3CON_OUT 0x20
4113 #define _PWM3CON_PWM3OUT 0x20
4114 #define _PWM3CON_OE 0x40
4115 #define _PWM3CON_PWM3OE 0x40
4116 #define _PWM3CON_EN 0x80
4117 #define _PWM3CON_PWM3EN 0x80
4118
4119 //==============================================================================
4120
4121
4122 //==============================================================================
4123 // PWM3INTCON Bits
4124
4125 extern __at(0x0DBC) __sfr PWM3INTCON;
4126
4127 typedef union
4128 {
4129 struct
4130 {
4131 unsigned PRIE : 1;
4132 unsigned DCIE : 1;
4133 unsigned PHIE : 1;
4134 unsigned OFIE : 1;
4135 unsigned : 1;
4136 unsigned : 1;
4137 unsigned : 1;
4138 unsigned : 1;
4139 };
4140
4141 struct
4142 {
4143 unsigned PWM3PRIE : 1;
4144 unsigned PWM3DCIE : 1;
4145 unsigned PWM3PHIE : 1;
4146 unsigned PWM3OFIE : 1;
4147 unsigned : 1;
4148 unsigned : 1;
4149 unsigned : 1;
4150 unsigned : 1;
4151 };
4152 } __PWM3INTCONbits_t;
4153
4154 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
4155
4156 #define _PWM3INTCON_PRIE 0x01
4157 #define _PWM3INTCON_PWM3PRIE 0x01
4158 #define _PWM3INTCON_DCIE 0x02
4159 #define _PWM3INTCON_PWM3DCIE 0x02
4160 #define _PWM3INTCON_PHIE 0x04
4161 #define _PWM3INTCON_PWM3PHIE 0x04
4162 #define _PWM3INTCON_OFIE 0x08
4163 #define _PWM3INTCON_PWM3OFIE 0x08
4164
4165 //==============================================================================
4166
4167
4168 //==============================================================================
4169 // PWM3INTE Bits
4170
4171 extern __at(0x0DBC) __sfr PWM3INTE;
4172
4173 typedef union
4174 {
4175 struct
4176 {
4177 unsigned PRIE : 1;
4178 unsigned DCIE : 1;
4179 unsigned PHIE : 1;
4180 unsigned OFIE : 1;
4181 unsigned : 1;
4182 unsigned : 1;
4183 unsigned : 1;
4184 unsigned : 1;
4185 };
4186
4187 struct
4188 {
4189 unsigned PWM3PRIE : 1;
4190 unsigned PWM3DCIE : 1;
4191 unsigned PWM3PHIE : 1;
4192 unsigned PWM3OFIE : 1;
4193 unsigned : 1;
4194 unsigned : 1;
4195 unsigned : 1;
4196 unsigned : 1;
4197 };
4198 } __PWM3INTEbits_t;
4199
4200 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
4201
4202 #define _PWM3INTE_PRIE 0x01
4203 #define _PWM3INTE_PWM3PRIE 0x01
4204 #define _PWM3INTE_DCIE 0x02
4205 #define _PWM3INTE_PWM3DCIE 0x02
4206 #define _PWM3INTE_PHIE 0x04
4207 #define _PWM3INTE_PWM3PHIE 0x04
4208 #define _PWM3INTE_OFIE 0x08
4209 #define _PWM3INTE_PWM3OFIE 0x08
4210
4211 //==============================================================================
4212
4213
4214 //==============================================================================
4215 // PWM3INTF Bits
4216
4217 extern __at(0x0DBD) __sfr PWM3INTF;
4218
4219 typedef union
4220 {
4221 struct
4222 {
4223 unsigned PRIF : 1;
4224 unsigned DCIF : 1;
4225 unsigned PHIF : 1;
4226 unsigned OFIF : 1;
4227 unsigned : 1;
4228 unsigned : 1;
4229 unsigned : 1;
4230 unsigned : 1;
4231 };
4232
4233 struct
4234 {
4235 unsigned PWM3PRIF : 1;
4236 unsigned PWM3DCIF : 1;
4237 unsigned PWM3PHIF : 1;
4238 unsigned PWM3OFIF : 1;
4239 unsigned : 1;
4240 unsigned : 1;
4241 unsigned : 1;
4242 unsigned : 1;
4243 };
4244 } __PWM3INTFbits_t;
4245
4246 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
4247
4248 #define _PWM3INTF_PRIF 0x01
4249 #define _PWM3INTF_PWM3PRIF 0x01
4250 #define _PWM3INTF_DCIF 0x02
4251 #define _PWM3INTF_PWM3DCIF 0x02
4252 #define _PWM3INTF_PHIF 0x04
4253 #define _PWM3INTF_PWM3PHIF 0x04
4254 #define _PWM3INTF_OFIF 0x08
4255 #define _PWM3INTF_PWM3OFIF 0x08
4256
4257 //==============================================================================
4258
4259
4260 //==============================================================================
4261 // PWM3INTFLG Bits
4262
4263 extern __at(0x0DBD) __sfr PWM3INTFLG;
4264
4265 typedef union
4266 {
4267 struct
4268 {
4269 unsigned PRIF : 1;
4270 unsigned DCIF : 1;
4271 unsigned PHIF : 1;
4272 unsigned OFIF : 1;
4273 unsigned : 1;
4274 unsigned : 1;
4275 unsigned : 1;
4276 unsigned : 1;
4277 };
4278
4279 struct
4280 {
4281 unsigned PWM3PRIF : 1;
4282 unsigned PWM3DCIF : 1;
4283 unsigned PWM3PHIF : 1;
4284 unsigned PWM3OFIF : 1;
4285 unsigned : 1;
4286 unsigned : 1;
4287 unsigned : 1;
4288 unsigned : 1;
4289 };
4290 } __PWM3INTFLGbits_t;
4291
4292 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
4293
4294 #define _PWM3INTFLG_PRIF 0x01
4295 #define _PWM3INTFLG_PWM3PRIF 0x01
4296 #define _PWM3INTFLG_DCIF 0x02
4297 #define _PWM3INTFLG_PWM3DCIF 0x02
4298 #define _PWM3INTFLG_PHIF 0x04
4299 #define _PWM3INTFLG_PWM3PHIF 0x04
4300 #define _PWM3INTFLG_OFIF 0x08
4301 #define _PWM3INTFLG_PWM3OFIF 0x08
4302
4303 //==============================================================================
4304
4305
4306 //==============================================================================
4307 // PWM3CLKCON Bits
4308
4309 extern __at(0x0DBE) __sfr PWM3CLKCON;
4310
4311 typedef union
4312 {
4313 struct
4314 {
4315 unsigned PWM3CS0 : 1;
4316 unsigned PWM3CS1 : 1;
4317 unsigned : 1;
4318 unsigned : 1;
4319 unsigned PWM3PS0 : 1;
4320 unsigned PWM3PS1 : 1;
4321 unsigned PWM3PS2 : 1;
4322 unsigned : 1;
4323 };
4324
4325 struct
4326 {
4327 unsigned CS0 : 1;
4328 unsigned CS1 : 1;
4329 unsigned : 1;
4330 unsigned : 1;
4331 unsigned PS0 : 1;
4332 unsigned PS1 : 1;
4333 unsigned PS2 : 1;
4334 unsigned : 1;
4335 };
4336
4337 struct
4338 {
4339 unsigned PWM3CS : 2;
4340 unsigned : 6;
4341 };
4342
4343 struct
4344 {
4345 unsigned CS : 2;
4346 unsigned : 6;
4347 };
4348
4349 struct
4350 {
4351 unsigned : 4;
4352 unsigned PWM3PS : 3;
4353 unsigned : 1;
4354 };
4355
4356 struct
4357 {
4358 unsigned : 4;
4359 unsigned PS : 3;
4360 unsigned : 1;
4361 };
4362 } __PWM3CLKCONbits_t;
4363
4364 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
4365
4366 #define _PWM3CLKCON_PWM3CS0 0x01
4367 #define _PWM3CLKCON_CS0 0x01
4368 #define _PWM3CLKCON_PWM3CS1 0x02
4369 #define _PWM3CLKCON_CS1 0x02
4370 #define _PWM3CLKCON_PWM3PS0 0x10
4371 #define _PWM3CLKCON_PS0 0x10
4372 #define _PWM3CLKCON_PWM3PS1 0x20
4373 #define _PWM3CLKCON_PS1 0x20
4374 #define _PWM3CLKCON_PWM3PS2 0x40
4375 #define _PWM3CLKCON_PS2 0x40
4376
4377 //==============================================================================
4378
4379
4380 //==============================================================================
4381 // PWM3LDCON Bits
4382
4383 extern __at(0x0DBF) __sfr PWM3LDCON;
4384
4385 typedef union
4386 {
4387 struct
4388 {
4389 unsigned PWM3LDS0 : 1;
4390 unsigned PWM3LDS1 : 1;
4391 unsigned : 1;
4392 unsigned : 1;
4393 unsigned : 1;
4394 unsigned : 1;
4395 unsigned LDT : 1;
4396 unsigned LDA : 1;
4397 };
4398
4399 struct
4400 {
4401 unsigned LDS0 : 1;
4402 unsigned LDS1 : 1;
4403 unsigned : 1;
4404 unsigned : 1;
4405 unsigned : 1;
4406 unsigned : 1;
4407 unsigned PWM3LDM : 1;
4408 unsigned PWM3LD : 1;
4409 };
4410
4411 struct
4412 {
4413 unsigned PWM3LDS : 2;
4414 unsigned : 6;
4415 };
4416
4417 struct
4418 {
4419 unsigned LDS : 2;
4420 unsigned : 6;
4421 };
4422 } __PWM3LDCONbits_t;
4423
4424 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
4425
4426 #define _PWM3LDCON_PWM3LDS0 0x01
4427 #define _PWM3LDCON_LDS0 0x01
4428 #define _PWM3LDCON_PWM3LDS1 0x02
4429 #define _PWM3LDCON_LDS1 0x02
4430 #define _PWM3LDCON_LDT 0x40
4431 #define _PWM3LDCON_PWM3LDM 0x40
4432 #define _PWM3LDCON_LDA 0x80
4433 #define _PWM3LDCON_PWM3LD 0x80
4434
4435 //==============================================================================
4436
4437
4438 //==============================================================================
4439 // PWM3OFCON Bits
4440
4441 extern __at(0x0DC0) __sfr PWM3OFCON;
4442
4443 typedef union
4444 {
4445 struct
4446 {
4447 unsigned PWM3OFS0 : 1;
4448 unsigned PWM3OFS1 : 1;
4449 unsigned : 1;
4450 unsigned : 1;
4451 unsigned OFO : 1;
4452 unsigned PWM3OFM0 : 1;
4453 unsigned PWM3OFM1 : 1;
4454 unsigned : 1;
4455 };
4456
4457 struct
4458 {
4459 unsigned OFS0 : 1;
4460 unsigned OFS1 : 1;
4461 unsigned : 1;
4462 unsigned : 1;
4463 unsigned PWM3OFMC : 1;
4464 unsigned OFM0 : 1;
4465 unsigned OFM1 : 1;
4466 unsigned : 1;
4467 };
4468
4469 struct
4470 {
4471 unsigned OFS : 2;
4472 unsigned : 6;
4473 };
4474
4475 struct
4476 {
4477 unsigned PWM3OFS : 2;
4478 unsigned : 6;
4479 };
4480
4481 struct
4482 {
4483 unsigned : 5;
4484 unsigned PWM3OFM : 2;
4485 unsigned : 1;
4486 };
4487
4488 struct
4489 {
4490 unsigned : 5;
4491 unsigned OFM : 2;
4492 unsigned : 1;
4493 };
4494 } __PWM3OFCONbits_t;
4495
4496 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
4497
4498 #define _PWM3OFCON_PWM3OFS0 0x01
4499 #define _PWM3OFCON_OFS0 0x01
4500 #define _PWM3OFCON_PWM3OFS1 0x02
4501 #define _PWM3OFCON_OFS1 0x02
4502 #define _PWM3OFCON_OFO 0x10
4503 #define _PWM3OFCON_PWM3OFMC 0x10
4504 #define _PWM3OFCON_PWM3OFM0 0x20
4505 #define _PWM3OFCON_OFM0 0x20
4506 #define _PWM3OFCON_PWM3OFM1 0x40
4507 #define _PWM3OFCON_OFM1 0x40
4508
4509 //==============================================================================
4510
4511
4512 //==============================================================================
4513 // STATUS_SHAD Bits
4514
4515 extern __at(0x0FE4) __sfr STATUS_SHAD;
4516
4517 typedef struct
4518 {
4519 unsigned C_SHAD : 1;
4520 unsigned DC_SHAD : 1;
4521 unsigned Z_SHAD : 1;
4522 unsigned : 1;
4523 unsigned : 1;
4524 unsigned : 1;
4525 unsigned : 1;
4526 unsigned : 1;
4527 } __STATUS_SHADbits_t;
4528
4529 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
4530
4531 #define _C_SHAD 0x01
4532 #define _DC_SHAD 0x02
4533 #define _Z_SHAD 0x04
4534
4535 //==============================================================================
4536
4537 extern __at(0x0FE5) __sfr WREG_SHAD;
4538 extern __at(0x0FE6) __sfr BSR_SHAD;
4539 extern __at(0x0FE7) __sfr PCLATH_SHAD;
4540 extern __at(0x0FE8) __sfr FSR0L_SHAD;
4541 extern __at(0x0FE8) __sfr FSR0_SHAD;
4542 extern __at(0x0FE9) __sfr FSR0H_SHAD;
4543 extern __at(0x0FEA) __sfr FSR1L_SHAD;
4544 extern __at(0x0FEA) __sfr FSR1_SHAD;
4545 extern __at(0x0FEB) __sfr FSR1H_SHAD;
4546 extern __at(0x0FED) __sfr STKPTR;
4547 extern __at(0x0FEE) __sfr TOS;
4548 extern __at(0x0FEE) __sfr TOSL;
4549 extern __at(0x0FEF) __sfr TOSH;
4550
4551 //==============================================================================
4552 //
4553 // Configuration Bits
4554 //
4555 //==============================================================================
4556
4557 #define _CONFIG1 0x8007
4558 #define _CONFIG2 0x8008
4559
4560 //----------------------------- CONFIG1 Options -------------------------------
4561
4562 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin.
4563 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin.
4564 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin.
4565 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin.
4566 #define _WDTE_OFF 0x3FE7 // WDT disabled.
4567 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
4568 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
4569 #define _WDTE_ON 0x3FFF // WDT enabled.
4570 #define _PWRTE_ON 0x3FDF // PWRT enabled.
4571 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
4572 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
4573 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
4574 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
4575 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
4576 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
4577 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
4578 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
4579 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
4580 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
4581 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
4582
4583 //----------------------------- CONFIG2 Options -------------------------------
4584
4585 #define _WRT_ALL 0x3FFC // 000h to 7FFh write protected, no addresses may be modified by EECON control.
4586 #define _WRT_HALF 0x3FFD // 000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control.
4587 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control.
4588 #define _WRT_OFF 0x3FFF // Write protection off.
4589 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
4590 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
4591 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
4592 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
4593 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
4594 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4595 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4596 #define _LPBOREN_ON 0x37FF // LPBOR is enabled.
4597 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled.
4598 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
4599 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
4600 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
4601 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
4602
4603 //==============================================================================
4604
4605 #define _DEVID1 0x8006
4606
4607 #define _IDLOC0 0x8000
4608 #define _IDLOC1 0x8001
4609 #define _IDLOC2 0x8002
4610 #define _IDLOC3 0x8003
4611
4612 //==============================================================================
4613
4614 #ifndef NO_BIT_DEFINES
4615
4616 #define ADON ADCON0bits.ADON // bit 0
4617 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
4618 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
4619 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
4620 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
4621 #define CHS0 ADCON0bits.CHS0 // bit 2
4622 #define CHS1 ADCON0bits.CHS1 // bit 3
4623 #define CHS2 ADCON0bits.CHS2 // bit 4
4624 #define CHS3 ADCON0bits.CHS3 // bit 5
4625 #define CHS4 ADCON0bits.CHS4 // bit 6
4626
4627 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
4628 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
4629 #define ADCS0 ADCON1bits.ADCS0 // bit 4
4630 #define ADCS1 ADCON1bits.ADCS1 // bit 5
4631 #define ADCS2 ADCON1bits.ADCS2 // bit 6
4632 #define ADFM ADCON1bits.ADFM // bit 7
4633
4634 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
4635 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
4636 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
4637 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
4638
4639 #define ANSA0 ANSELAbits.ANSA0 // bit 0
4640 #define ANSA1 ANSELAbits.ANSA1 // bit 1
4641 #define ANSA2 ANSELAbits.ANSA2 // bit 2
4642 #define ANSA4 ANSELAbits.ANSA4 // bit 4
4643
4644 #define P1SEL APFCONbits.P1SEL // bit 0
4645 #define P2SEL APFCONbits.P2SEL // bit 1
4646 #define TXCKSEL APFCONbits.TXCKSEL // bit 2
4647 #define T1GSEL APFCONbits.T1GSEL // bit 3
4648 #define CWGBSEL APFCONbits.CWGBSEL // bit 5
4649 #define CWGASEL APFCONbits.CWGASEL // bit 6
4650 #define RXDTSEL APFCONbits.RXDTSEL // bit 7
4651
4652 #define ABDEN BAUDCONbits.ABDEN // bit 0
4653 #define WUE BAUDCONbits.WUE // bit 1
4654 #define BRG16 BAUDCONbits.BRG16 // bit 3
4655 #define SCKP BAUDCONbits.SCKP // bit 4
4656 #define RCIDL BAUDCONbits.RCIDL // bit 6
4657 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
4658
4659 #define BORRDY BORCONbits.BORRDY // bit 0
4660 #define BORFS BORCONbits.BORFS // bit 6
4661 #define SBOREN BORCONbits.SBOREN // bit 7
4662
4663 #define BSR0 BSRbits.BSR0 // bit 0
4664 #define BSR1 BSRbits.BSR1 // bit 1
4665 #define BSR2 BSRbits.BSR2 // bit 2
4666 #define BSR3 BSRbits.BSR3 // bit 3
4667 #define BSR4 BSRbits.BSR4 // bit 4
4668
4669 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
4670 #define C1HYS CM1CON0bits.C1HYS // bit 1
4671 #define C1SP CM1CON0bits.C1SP // bit 2
4672 #define C1POL CM1CON0bits.C1POL // bit 4
4673 #define C1OE CM1CON0bits.C1OE // bit 5
4674 #define C1OUT CM1CON0bits.C1OUT // bit 6
4675 #define C1ON CM1CON0bits.C1ON // bit 7
4676
4677 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
4678 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
4679 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
4680 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
4681 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
4682 #define C1INTN CM1CON1bits.C1INTN // bit 6
4683 #define C1INTP CM1CON1bits.C1INTP // bit 7
4684
4685 #define MC1OUT CMOUTbits.MC1OUT // bit 0
4686
4687 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
4688 #define G1POLA CWG1CON0bits.G1POLA // bit 3
4689 #define G1POLB CWG1CON0bits.G1POLB // bit 4
4690 #define G1OEA CWG1CON0bits.G1OEA // bit 5
4691 #define G1OEB CWG1CON0bits.G1OEB // bit 6
4692 #define G1EN CWG1CON0bits.G1EN // bit 7
4693
4694 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
4695 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
4696 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
4697 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
4698 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
4699 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
4700 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
4701
4702 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
4703 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
4704 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
4705 #define G1ASE CWG1CON2bits.G1ASE // bit 7
4706
4707 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
4708 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
4709 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
4710 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
4711 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
4712 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
4713
4714 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
4715 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
4716 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
4717 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
4718 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
4719 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
4720
4721 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
4722 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
4723 #define DACOE DACCON0bits.DACOE // bit 5
4724 #define DACLPS DACCON0bits.DACLPS // bit 6
4725 #define DACEN DACCON0bits.DACEN // bit 7
4726
4727 #define DACR0 DACCON1bits.DACR0 // bit 0
4728 #define DACR1 DACCON1bits.DACR1 // bit 1
4729 #define DACR2 DACCON1bits.DACR2 // bit 2
4730 #define DACR3 DACCON1bits.DACR3 // bit 3
4731 #define DACR4 DACCON1bits.DACR4 // bit 4
4732
4733 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
4734 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
4735 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
4736 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
4737 #define TSRNG FVRCONbits.TSRNG // bit 4
4738 #define TSEN FVRCONbits.TSEN // bit 5
4739 #define FVRRDY FVRCONbits.FVRRDY // bit 6
4740 #define FVREN FVRCONbits.FVREN // bit 7
4741
4742 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
4743 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
4744 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
4745 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
4746 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
4747 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
4748
4749 #define IOCIF INTCONbits.IOCIF // bit 0
4750 #define INTF INTCONbits.INTF // bit 1
4751 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
4752 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
4753 #define IOCIE INTCONbits.IOCIE // bit 3
4754 #define INTE INTCONbits.INTE // bit 4
4755 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
4756 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
4757 #define PEIE INTCONbits.PEIE // bit 6
4758 #define GIE INTCONbits.GIE // bit 7
4759
4760 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
4761 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
4762 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
4763 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
4764 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
4765 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
4766
4767 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
4768 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
4769 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
4770 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
4771 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
4772 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
4773
4774 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
4775 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
4776 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
4777 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
4778 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
4779 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
4780
4781 #define LATA0 LATAbits.LATA0 // bit 0
4782 #define LATA1 LATAbits.LATA1 // bit 1
4783 #define LATA2 LATAbits.LATA2 // bit 2
4784 #define LATA4 LATAbits.LATA4 // bit 4
4785 #define LATA5 LATAbits.LATA5 // bit 5
4786
4787 #define ODA0 ODCONAbits.ODA0 // bit 0
4788 #define ODA1 ODCONAbits.ODA1 // bit 1
4789 #define ODA2 ODCONAbits.ODA2 // bit 2
4790 #define ODA4 ODCONAbits.ODA4 // bit 4
4791 #define ODA5 ODCONAbits.ODA5 // bit 5
4792
4793 #define PS0 OPTION_REGbits.PS0 // bit 0
4794 #define PS1 OPTION_REGbits.PS1 // bit 1
4795 #define PS2 OPTION_REGbits.PS2 // bit 2
4796 #define PSA OPTION_REGbits.PSA // bit 3
4797 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
4798 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
4799 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
4800 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
4801 #define INTEDG OPTION_REGbits.INTEDG // bit 6
4802 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
4803
4804 #define SCS0 OSCCONbits.SCS0 // bit 0
4805 #define SCS1 OSCCONbits.SCS1 // bit 1
4806 #define IRCF0 OSCCONbits.IRCF0 // bit 3
4807 #define IRCF1 OSCCONbits.IRCF1 // bit 4
4808 #define IRCF2 OSCCONbits.IRCF2 // bit 5
4809 #define IRCF3 OSCCONbits.IRCF3 // bit 6
4810 #define SPLLEN OSCCONbits.SPLLEN // bit 7
4811
4812 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
4813 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
4814 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
4815 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
4816 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
4817 #define OSTS OSCSTATbits.OSTS // bit 5
4818 #define PLLR OSCSTATbits.PLLR // bit 6
4819
4820 #define TUN0 OSCTUNEbits.TUN0 // bit 0
4821 #define TUN1 OSCTUNEbits.TUN1 // bit 1
4822 #define TUN2 OSCTUNEbits.TUN2 // bit 2
4823 #define TUN3 OSCTUNEbits.TUN3 // bit 3
4824 #define TUN4 OSCTUNEbits.TUN4 // bit 4
4825 #define TUN5 OSCTUNEbits.TUN5 // bit 5
4826
4827 #define NOT_BOR PCONbits.NOT_BOR // bit 0
4828 #define NOT_POR PCONbits.NOT_POR // bit 1
4829 #define NOT_RI PCONbits.NOT_RI // bit 2
4830 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
4831 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
4832 #define STKUNF PCONbits.STKUNF // bit 6
4833 #define STKOVF PCONbits.STKOVF // bit 7
4834
4835 #define TMR1IE PIE1bits.TMR1IE // bit 0
4836 #define TMR2IE PIE1bits.TMR2IE // bit 1
4837 #define TXIE PIE1bits.TXIE // bit 4
4838 #define RCIE PIE1bits.RCIE // bit 5
4839 #define ADIE PIE1bits.ADIE // bit 6
4840 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
4841
4842 #define C1IE PIE2bits.C1IE // bit 5
4843
4844 #define PWM1IE PIE3bits.PWM1IE // bit 4
4845 #define PWM2IE PIE3bits.PWM2IE // bit 5
4846 #define PWM3IE PIE3bits.PWM3IE // bit 6
4847
4848 #define TMR1IF PIR1bits.TMR1IF // bit 0
4849 #define TMR2IF PIR1bits.TMR2IF // bit 1
4850 #define TXIF PIR1bits.TXIF // bit 4
4851 #define RCIF PIR1bits.RCIF // bit 5
4852 #define ADIF PIR1bits.ADIF // bit 6
4853 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
4854
4855 #define C1IF PIR2bits.C1IF // bit 5
4856
4857 #define PWM1IF PIR3bits.PWM1IF // bit 4
4858 #define PWM2IF PIR3bits.PWM2IF // bit 5
4859 #define PWM3IF PIR3bits.PWM3IF // bit 6
4860
4861 #define RD PMCON1bits.RD // bit 0
4862 #define WR PMCON1bits.WR // bit 1
4863 #define WREN PMCON1bits.WREN // bit 2
4864 #define WRERR PMCON1bits.WRERR // bit 3
4865 #define FREE PMCON1bits.FREE // bit 4
4866 #define LWLO PMCON1bits.LWLO // bit 5
4867 #define CFGS PMCON1bits.CFGS // bit 6
4868
4869 #define RA0 PORTAbits.RA0 // bit 0
4870 #define RA1 PORTAbits.RA1 // bit 1
4871 #define RA2 PORTAbits.RA2 // bit 2
4872 #define RA3 PORTAbits.RA3 // bit 3
4873 #define RA4 PORTAbits.RA4 // bit 4
4874 #define RA5 PORTAbits.RA5 // bit 5
4875
4876 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits
4877 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits
4878 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits
4879 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits
4880 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits
4881 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits
4882 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits
4883 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits
4884 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits
4885 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits
4886 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits
4887 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits
4888
4889 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
4890 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
4891 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
4892 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
4893 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
4894 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
4895 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
4896 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
4897
4898 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0
4899 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1
4900 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2
4901 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3
4902 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4
4903 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5
4904 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6
4905 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7
4906
4907 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits
4908 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits
4909 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits
4910 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits
4911 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits
4912 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits
4913 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits
4914 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits
4915
4916 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits
4917 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits
4918 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits
4919 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits
4920 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits
4921 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits
4922 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits
4923 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits
4924
4925 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits
4926 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits
4927 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits
4928 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits
4929 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits
4930 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits
4931 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits
4932 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits
4933
4934 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits
4935 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits
4936 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits
4937 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits
4938 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits
4939 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits
4940 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits
4941 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits
4942 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits
4943 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits
4944
4945 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0
4946 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1
4947 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2
4948 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3
4949 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4
4950 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5
4951 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6
4952 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7
4953
4954 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0
4955 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1
4956 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2
4957 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3
4958 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4
4959 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5
4960 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6
4961 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7
4962
4963 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0
4964 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1
4965 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2
4966 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3
4967 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4
4968 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5
4969 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6
4970 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7
4971
4972 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0
4973 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1
4974 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2
4975 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3
4976 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4
4977 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5
4978 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6
4979 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7
4980
4981 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0
4982 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1
4983 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2
4984 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3
4985 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4
4986 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5
4987 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6
4988 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7
4989
4990 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0
4991 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1
4992 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2
4993 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3
4994 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4
4995 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5
4996 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6
4997 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7
4998
4999 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0
5000 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1
5001 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2
5002 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3
5003 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4
5004 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5
5005 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6
5006 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7
5007
5008 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0
5009 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1
5010 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2
5011 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3
5012 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4
5013 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5
5014 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6
5015 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7
5016
5017 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
5018 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
5019 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
5020 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
5021 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
5022 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
5023 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
5024 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
5025
5026 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0
5027 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1
5028 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2
5029 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3
5030 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4
5031 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5
5032 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6
5033 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7
5034
5035 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0
5036 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1
5037 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2
5038 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3
5039 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4
5040 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5
5041 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6
5042 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7
5043
5044 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0
5045 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1
5046 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2
5047 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3
5048 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4
5049 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5
5050 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6
5051 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7
5052
5053 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0
5054 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1
5055 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2
5056 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3
5057 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4
5058 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5
5059 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6
5060 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7
5061
5062 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0
5063 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1
5064 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2
5065 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3
5066 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4
5067 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5
5068 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6
5069 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7
5070
5071 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0
5072 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1
5073 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2
5074 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3
5075 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4
5076 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5
5077 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6
5078 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7
5079
5080 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0
5081 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1
5082 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2
5083 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3
5084 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4
5085 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5
5086 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6
5087 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7
5088
5089 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0
5090 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1
5091 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2
5092 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3
5093 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4
5094 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5
5095 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6
5096 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7
5097
5098 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0
5099 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1
5100 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2
5101 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3
5102 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4
5103 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5
5104 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6
5105 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7
5106
5107 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
5108 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
5109 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
5110 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
5111 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
5112 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
5113 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
5114 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
5115
5116 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0
5117 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1
5118 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2
5119 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3
5120 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4
5121 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5
5122 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6
5123 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7
5124
5125 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0
5126 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1
5127 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2
5128 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3
5129 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4
5130 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5
5131 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6
5132 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7
5133
5134 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0
5135 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1
5136 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2
5137 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3
5138 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4
5139 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5
5140 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6
5141 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7
5142
5143 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0
5144 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1
5145 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2
5146 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3
5147 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4
5148 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5
5149 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6
5150 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7
5151
5152 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0
5153 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1
5154 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2
5155 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3
5156 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4
5157 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5
5158 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6
5159 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7
5160
5161 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0
5162 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1
5163 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2
5164 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3
5165 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4
5166 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5
5167 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6
5168 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7
5169
5170 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0
5171 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1
5172 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2
5173 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3
5174 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4
5175 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5
5176 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6
5177 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7
5178
5179 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0
5180 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1
5181 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2
5182 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3
5183 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4
5184 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5
5185 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6
5186 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7
5187
5188 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0
5189 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1
5190 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2
5191 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3
5192 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4
5193 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5
5194 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6
5195 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7
5196
5197 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits
5198 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits
5199 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits
5200 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits
5201 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits
5202 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits
5203
5204 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits
5205 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits
5206 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits
5207 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits
5208 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits
5209 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits
5210
5211 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits
5212 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits
5213 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits
5214 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits
5215 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits
5216 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits
5217
5218 #define RX9D RCSTAbits.RX9D // bit 0
5219 #define OERR RCSTAbits.OERR // bit 1
5220 #define FERR RCSTAbits.FERR // bit 2
5221 #define ADDEN RCSTAbits.ADDEN // bit 3
5222 #define CREN RCSTAbits.CREN // bit 4
5223 #define SREN RCSTAbits.SREN // bit 5
5224 #define RX9 RCSTAbits.RX9 // bit 6
5225 #define SPEN RCSTAbits.SPEN // bit 7
5226
5227 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
5228 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
5229 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
5230 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
5231 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
5232
5233 #define C STATUSbits.C // bit 0
5234 #define DC STATUSbits.DC // bit 1
5235 #define Z STATUSbits.Z // bit 2
5236 #define NOT_PD STATUSbits.NOT_PD // bit 3
5237 #define NOT_TO STATUSbits.NOT_TO // bit 4
5238
5239 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
5240 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
5241 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
5242
5243 #define TMR1ON T1CONbits.TMR1ON // bit 0
5244 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
5245 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
5246 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
5247 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
5248 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
5249
5250 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
5251 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
5252 #define T1GVAL T1GCONbits.T1GVAL // bit 2
5253 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
5254 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
5255 #define T1GSPM T1GCONbits.T1GSPM // bit 4
5256 #define T1GTM T1GCONbits.T1GTM // bit 5
5257 #define T1GPOL T1GCONbits.T1GPOL // bit 6
5258 #define TMR1GE T1GCONbits.TMR1GE // bit 7
5259
5260 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
5261 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
5262 #define TMR2ON T2CONbits.TMR2ON // bit 2
5263 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
5264 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
5265 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
5266 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
5267
5268 #define TRISA0 TRISAbits.TRISA0 // bit 0
5269 #define TRISA1 TRISAbits.TRISA1 // bit 1
5270 #define TRISA2 TRISAbits.TRISA2 // bit 2
5271 #define TRISA3 TRISAbits.TRISA3 // bit 3
5272 #define TRISA4 TRISAbits.TRISA4 // bit 4
5273 #define TRISA5 TRISAbits.TRISA5 // bit 5
5274
5275 #define TX9D TXSTAbits.TX9D // bit 0
5276 #define TRMT TXSTAbits.TRMT // bit 1
5277 #define BRGH TXSTAbits.BRGH // bit 2
5278 #define SENDB TXSTAbits.SENDB // bit 3
5279 #define SYNC TXSTAbits.SYNC // bit 4
5280 #define TXEN TXSTAbits.TXEN // bit 5
5281 #define TX9 TXSTAbits.TX9 // bit 6
5282 #define CSRC TXSTAbits.CSRC // bit 7
5283
5284 #define VREGPM VREGCONbits.VREGPM // bit 1
5285
5286 #define SWDTEN WDTCONbits.SWDTEN // bit 0
5287 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
5288 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
5289 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
5290 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
5291 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
5292
5293 #define WPUA0 WPUAbits.WPUA0 // bit 0
5294 #define WPUA1 WPUAbits.WPUA1 // bit 1
5295 #define WPUA2 WPUAbits.WPUA2 // bit 2
5296 #define WPUA3 WPUAbits.WPUA3 // bit 3
5297 #define WPUA4 WPUAbits.WPUA4 // bit 4
5298 #define WPUA5 WPUAbits.WPUA5 // bit 5
5299
5300 #endif // #ifndef NO_BIT_DEFINES
5301
5302 #endif // #ifndef __PIC12F1572_H__
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