2 * This declarations of the PIC12F1612 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC12F1612_H__
26 #define __PIC12F1612_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define PIR4_ADDR 0x0014
55 #define TMR0_ADDR 0x0015
56 #define TMR1_ADDR 0x0016
57 #define TMR1L_ADDR 0x0016
58 #define TMR1H_ADDR 0x0017
59 #define T1CON_ADDR 0x0018
60 #define T1GCON_ADDR 0x0019
61 #define T2TMR_ADDR 0x001A
62 #define TMR2_ADDR 0x001A
63 #define PR2_ADDR 0x001B
64 #define T2PR_ADDR 0x001B
65 #define T2CON_ADDR 0x001C
66 #define T2HLT_ADDR 0x001D
67 #define T2CLKCON_ADDR 0x001E
68 #define T2RST_ADDR 0x001F
69 #define TRISA_ADDR 0x008C
70 #define PIE1_ADDR 0x0091
71 #define PIE2_ADDR 0x0092
72 #define PIE3_ADDR 0x0093
73 #define PIE4_ADDR 0x0094
74 #define OPTION_REG_ADDR 0x0095
75 #define PCON_ADDR 0x0096
76 #define OSCTUNE_ADDR 0x0098
77 #define OSCCON_ADDR 0x0099
78 #define OSCSTAT_ADDR 0x009A
79 #define ADRES_ADDR 0x009B
80 #define ADRESL_ADDR 0x009B
81 #define ADRESH_ADDR 0x009C
82 #define ADCON0_ADDR 0x009D
83 #define ADCON1_ADDR 0x009E
84 #define ADCON2_ADDR 0x009F
85 #define LATA_ADDR 0x010C
86 #define CM1CON0_ADDR 0x0111
87 #define CM1CON1_ADDR 0x0112
88 #define CMOUT_ADDR 0x0115
89 #define BORCON_ADDR 0x0116
90 #define FVRCON_ADDR 0x0117
91 #define DAC1CON0_ADDR 0x0118
92 #define DAC1CON1_ADDR 0x0119
93 #define ZCD1CON_ADDR 0x011C
94 #define APFCON_ADDR 0x011D
95 #define ANSELA_ADDR 0x018C
96 #define PMADR_ADDR 0x0191
97 #define PMADRL_ADDR 0x0191
98 #define PMADRH_ADDR 0x0192
99 #define PMDAT_ADDR 0x0193
100 #define PMDATL_ADDR 0x0193
101 #define PMDATH_ADDR 0x0194
102 #define PMCON1_ADDR 0x0195
103 #define PMCON2_ADDR 0x0196
104 #define VREGCON_ADDR 0x0197
105 #define WPUA_ADDR 0x020C
106 #define ODCONA_ADDR 0x028C
107 #define CCPR1_ADDR 0x0291
108 #define CCPR1L_ADDR 0x0291
109 #define CCPR1H_ADDR 0x0292
110 #define CCP1CON_ADDR 0x0293
111 #define CCP1CAP_ADDR 0x0294
112 #define CCPR2_ADDR 0x0298
113 #define CCPR2L_ADDR 0x0298
114 #define CCPR2H_ADDR 0x0299
115 #define CCP2CON_ADDR 0x029A
116 #define CCP2CAP_ADDR 0x029B
117 #define CCPTMRS_ADDR 0x029E
118 #define SLRCONA_ADDR 0x030C
119 #define INLVLA_ADDR 0x038C
120 #define IOCAP_ADDR 0x0391
121 #define IOCAN_ADDR 0x0392
122 #define IOCAF_ADDR 0x0393
123 #define T4TMR_ADDR 0x0413
124 #define TMR4_ADDR 0x0413
125 #define PR4_ADDR 0x0414
126 #define T4PR_ADDR 0x0414
127 #define T4CON_ADDR 0x0415
128 #define T4HLT_ADDR 0x0416
129 #define T4CLKCON_ADDR 0x0417
130 #define T4RST_ADDR 0x0418
131 #define T6TMR_ADDR 0x041A
132 #define TMR6_ADDR 0x041A
133 #define PR6_ADDR 0x041B
134 #define T6PR_ADDR 0x041B
135 #define T6CON_ADDR 0x041C
136 #define T6HLT_ADDR 0x041D
137 #define T6CLKCON_ADDR 0x041E
138 #define T6RST_ADDR 0x041F
139 #define CWG1DBR_ADDR 0x0691
140 #define CWG1DBF_ADDR 0x0692
141 #define CWG1AS0_ADDR 0x0693
142 #define CWG1AS1_ADDR 0x0694
143 #define CWG1OCON0_ADDR 0x0695
144 #define CWG1CON0_ADDR 0x0696
145 #define CWG1CON1_ADDR 0x0697
146 #define CWG1OCON1_ADDR 0x0698
147 #define CWG1CLKCON_ADDR 0x0699
148 #define CWG1ISM_ADDR 0x069A
149 #define WDTCON0_ADDR 0x0711
150 #define WDTCON1_ADDR 0x0712
151 #define WDTPSL_ADDR 0x0713
152 #define WDTPSH_ADDR 0x0714
153 #define WDTTMR_ADDR 0x0715
154 #define SCANLADR_ADDR 0x0718
155 #define SCANLADRL_ADDR 0x0718
156 #define SCANLADRH_ADDR 0x0719
157 #define SCANHADR_ADDR 0x071A
158 #define SCANHADRL_ADDR 0x071A
159 #define SCANHADRH_ADDR 0x071B
160 #define SCANCON0_ADDR 0x071C
161 #define SCANTRIG_ADDR 0x071D
162 #define CRCDAT_ADDR 0x0791
163 #define CRCDATL_ADDR 0x0791
164 #define CRCDATH_ADDR 0x0792
165 #define CRCACC_ADDR 0x0793
166 #define CRCACCL_ADDR 0x0793
167 #define CRCACCH_ADDR 0x0794
168 #define CRCSHIFT_ADDR 0x0795
169 #define CRCSHIFTL_ADDR 0x0795
170 #define CRCSHIFTH_ADDR 0x0796
171 #define CRCXOR_ADDR 0x0797
172 #define CRCXORL_ADDR 0x0797
173 #define CRCXORH_ADDR 0x0798
174 #define CRCCON0_ADDR 0x0799
175 #define CRCCON1_ADDR 0x079A
176 #define SMT1TMR_ADDR 0x0D8C
177 #define SMT1TMRL_ADDR 0x0D8C
178 #define SMT1TMRH_ADDR 0x0D8D
179 #define SMT1TMRU_ADDR 0x0D8E
180 #define SMT1CPR_ADDR 0x0D8F
181 #define SMT1CPRL_ADDR 0x0D8F
182 #define SMT1CPRH_ADDR 0x0D90
183 #define SMT1CPRU_ADDR 0x0D91
184 #define SMT1CPW_ADDR 0x0D92
185 #define SMT1CPWL_ADDR 0x0D92
186 #define SMT1CPWH_ADDR 0x0D93
187 #define SMT1CPWU_ADDR 0x0D94
188 #define SMT1PR_ADDR 0x0D95
189 #define SMT1PRL_ADDR 0x0D95
190 #define SMT1PRH_ADDR 0x0D96
191 #define SMT1PRU_ADDR 0x0D97
192 #define SMT1CON0_ADDR 0x0D98
193 #define SMT1CON1_ADDR 0x0D99
194 #define SMT1STAT_ADDR 0x0D9A
195 #define SMT1CLK_ADDR 0x0D9B
196 #define SMT1SIG_ADDR 0x0D9C
197 #define SMT1WIN_ADDR 0x0D9D
198 #define SMT2TMR_ADDR 0x0D9E
199 #define SMT2TMRL_ADDR 0x0D9E
200 #define SMT2TMRH_ADDR 0x0D9F
201 #define SMT2TMRU_ADDR 0x0DA0
202 #define SMT2CPR_ADDR 0x0DA1
203 #define SMT2CPRL_ADDR 0x0DA1
204 #define SMT2CPRH_ADDR 0x0DA2
205 #define SMT2CPRU_ADDR 0x0DA3
206 #define SMT2CPW_ADDR 0x0DA4
207 #define SMT2CPWL_ADDR 0x0DA4
208 #define SMT2CPWH_ADDR 0x0DA5
209 #define SMT2CPWU_ADDR 0x0DA6
210 #define SMT2PR_ADDR 0x0DA7
211 #define SMT2PRL_ADDR 0x0DA7
212 #define SMT2PRH_ADDR 0x0DA8
213 #define SMT2PRU_ADDR 0x0DA9
214 #define SMT2CON0_ADDR 0x0DAA
215 #define SMT2CON1_ADDR 0x0DAB
216 #define SMT2STAT_ADDR 0x0DAC
217 #define SMT2CLK_ADDR 0x0DAD
218 #define SMT2SIG_ADDR 0x0DAE
219 #define SMT2WIN_ADDR 0x0DAF
220 #define STATUS_SHAD_ADDR 0x0FE4
221 #define WREG_SHAD_ADDR 0x0FE5
222 #define BSR_SHAD_ADDR 0x0FE6
223 #define PCLATH_SHAD_ADDR 0x0FE7
224 #define FSR0L_SHAD_ADDR 0x0FE8
225 #define FSR0H_SHAD_ADDR 0x0FE9
226 #define FSR1L_SHAD_ADDR 0x0FEA
227 #define FSR1H_SHAD_ADDR 0x0FEB
228 #define STKPTR_ADDR 0x0FED
229 #define TOSL_ADDR 0x0FEE
230 #define TOSH_ADDR 0x0FEF
232 #endif // #ifndef NO_ADDR_DEFINES
234 //==============================================================================
236 // Register Definitions
238 //==============================================================================
240 extern __at(0x0000) __sfr INDF0
;
241 extern __at(0x0001) __sfr INDF1
;
242 extern __at(0x0002) __sfr PCL
;
244 //==============================================================================
247 extern __at(0x0003) __sfr STATUS
;
261 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
269 //==============================================================================
271 extern __at(0x0004) __sfr FSR0
;
272 extern __at(0x0004) __sfr FSR0L
;
273 extern __at(0x0005) __sfr FSR0H
;
274 extern __at(0x0006) __sfr FSR1
;
275 extern __at(0x0006) __sfr FSR1L
;
276 extern __at(0x0007) __sfr FSR1H
;
278 //==============================================================================
281 extern __at(0x0008) __sfr BSR
;
304 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
312 //==============================================================================
314 extern __at(0x0009) __sfr WREG
;
315 extern __at(0x000A) __sfr PCLATH
;
317 //==============================================================================
320 extern __at(0x000B) __sfr INTCON
;
349 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
362 //==============================================================================
365 //==============================================================================
368 extern __at(0x000C) __sfr PORTA
;
391 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
400 //==============================================================================
403 //==============================================================================
406 extern __at(0x0011) __sfr PIR1
;
417 unsigned TMR1GIF
: 1;
420 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
426 #define _TMR1GIF 0x80
428 //==============================================================================
431 //==============================================================================
434 extern __at(0x0012) __sfr PIR2
;
448 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
456 //==============================================================================
459 //==============================================================================
462 extern __at(0x0013) __sfr PIR3
;
476 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
481 //==============================================================================
484 //==============================================================================
487 extern __at(0x0014) __sfr PIR4
;
492 unsigned SMT1PRAIF
: 1;
493 unsigned SMT1PWAIF
: 1;
495 unsigned SMT2PRAIF
: 1;
496 unsigned SMT2PWAIF
: 1;
501 extern __at(0x0014) volatile __PIR4bits_t PIR4bits
;
504 #define _SMT1PRAIF 0x02
505 #define _SMT1PWAIF 0x04
507 #define _SMT2PRAIF 0x10
508 #define _SMT2PWAIF 0x20
512 //==============================================================================
514 extern __at(0x0015) __sfr TMR0
;
515 extern __at(0x0016) __sfr TMR1
;
516 extern __at(0x0016) __sfr TMR1L
;
517 extern __at(0x0017) __sfr TMR1H
;
519 //==============================================================================
522 extern __at(0x0018) __sfr T1CON
;
530 unsigned NOT_T1SYNC
: 1;
532 unsigned T1CKPS0
: 1;
533 unsigned T1CKPS1
: 1;
534 unsigned TMR1CS0
: 1;
535 unsigned TMR1CS1
: 1;
552 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
555 #define _NOT_T1SYNC 0x04
556 #define _T1CKPS0 0x10
557 #define _T1CKPS1 0x20
558 #define _TMR1CS0 0x40
559 #define _TMR1CS1 0x80
561 //==============================================================================
564 //==============================================================================
567 extern __at(0x0019) __sfr T1GCON
;
576 unsigned T1GGO_NOT_DONE
: 1;
590 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
595 #define _T1GGO_NOT_DONE 0x08
601 //==============================================================================
603 extern __at(0x001A) __sfr T2TMR
;
604 extern __at(0x001A) __sfr TMR2
;
605 extern __at(0x001B) __sfr PR2
;
606 extern __at(0x001B) __sfr T2PR
;
608 //==============================================================================
611 extern __at(0x001C) __sfr T2CON
;
617 unsigned T2OUTPS0
: 1;
618 unsigned T2OUTPS1
: 1;
619 unsigned T2OUTPS2
: 1;
620 unsigned T2OUTPS3
: 1;
621 unsigned T2CKPS0
: 1;
622 unsigned T2CKPS1
: 1;
623 unsigned T2CKPS2
: 1;
659 unsigned T2OUTPS
: 4;
678 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
680 #define _T2OUTPS0 0x01
682 #define _T2OUTPS1 0x02
684 #define _T2OUTPS2 0x04
686 #define _T2OUTPS3 0x08
688 #define _T2CKPS0 0x10
690 #define _T2CKPS1 0x20
692 #define _T2CKPS2 0x40
698 //==============================================================================
701 //==============================================================================
704 extern __at(0x001D) __sfr T2HLT
;
722 unsigned T2MODE0
: 1;
723 unsigned T2MODE1
: 1;
724 unsigned T2MODE2
: 1;
725 unsigned T2MODE3
: 1;
727 unsigned T2CKSYNC
: 1;
728 unsigned T2CKPOL
: 1;
729 unsigned T2PSYNC
: 1;
745 extern __at(0x001D) volatile __T2HLTbits_t T2HLTbits
;
747 #define _T2HLT_MODE0 0x01
748 #define _T2HLT_T2MODE0 0x01
749 #define _T2HLT_MODE1 0x02
750 #define _T2HLT_T2MODE1 0x02
751 #define _T2HLT_MODE2 0x04
752 #define _T2HLT_T2MODE2 0x04
753 #define _T2HLT_MODE3 0x08
754 #define _T2HLT_T2MODE3 0x08
755 #define _T2HLT_CKSYNC 0x20
756 #define _T2HLT_T2CKSYNC 0x20
757 #define _T2HLT_CKPOL 0x40
758 #define _T2HLT_T2CKPOL 0x40
759 #define _T2HLT_PSYNC 0x80
760 #define _T2HLT_T2PSYNC 0x80
762 //==============================================================================
765 //==============================================================================
768 extern __at(0x001E) __sfr T2CLKCON
;
791 extern __at(0x001E) volatile __T2CLKCONbits_t T2CLKCONbits
;
797 //==============================================================================
800 //==============================================================================
803 extern __at(0x001F) __sfr T2RST
;
821 unsigned T2RSEL0
: 1;
822 unsigned T2RSEL1
: 1;
823 unsigned T2RSEL2
: 1;
824 unsigned T2RSEL3
: 1;
844 extern __at(0x001F) volatile __T2RSTbits_t T2RSTbits
;
847 #define _T2RSEL0 0x01
849 #define _T2RSEL1 0x02
851 #define _T2RSEL2 0x04
853 #define _T2RSEL3 0x08
855 //==============================================================================
858 //==============================================================================
861 extern __at(0x008C) __sfr TRISA
;
884 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
893 //==============================================================================
896 //==============================================================================
899 extern __at(0x0091) __sfr PIE1
;
910 unsigned TMR1GIE
: 1;
913 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
919 #define _TMR1GIE 0x80
921 //==============================================================================
924 //==============================================================================
927 extern __at(0x0092) __sfr PIE2
;
941 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
949 //==============================================================================
952 //==============================================================================
955 extern __at(0x0093) __sfr PIE3
;
969 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
974 //==============================================================================
977 //==============================================================================
980 extern __at(0x0094) __sfr PIE4
;
985 unsigned SMT1PRAIE
: 1;
986 unsigned SMT1PWAIE
: 1;
988 unsigned SMT2PRAIE
: 1;
989 unsigned SMT2PWAIE
: 1;
994 extern __at(0x0094) volatile __PIE4bits_t PIE4bits
;
997 #define _SMT1PRAIE 0x02
998 #define _SMT1PWAIE 0x04
1000 #define _SMT2PRAIE 0x10
1001 #define _SMT2PWAIE 0x20
1003 #define _SCANIE 0x80
1005 //==============================================================================
1008 //==============================================================================
1011 extern __at(0x0095) __sfr OPTION_REG
;
1021 unsigned TMR0SE
: 1;
1022 unsigned TMR0CS
: 1;
1023 unsigned INTEDG
: 1;
1024 unsigned NOT_WPUEN
: 1;
1044 } __OPTION_REGbits_t
;
1046 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1052 #define _TMR0SE 0x10
1054 #define _TMR0CS 0x20
1056 #define _INTEDG 0x40
1057 #define _NOT_WPUEN 0x80
1059 //==============================================================================
1062 //==============================================================================
1065 extern __at(0x0096) __sfr PCON
;
1069 unsigned NOT_BOR
: 1;
1070 unsigned NOT_POR
: 1;
1071 unsigned NOT_RI
: 1;
1072 unsigned NOT_RMCLR
: 1;
1073 unsigned NOT_RWDT
: 1;
1074 unsigned NOT_WDTWV
: 1;
1075 unsigned STKUNF
: 1;
1076 unsigned STKOVF
: 1;
1079 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1081 #define _NOT_BOR 0x01
1082 #define _NOT_POR 0x02
1083 #define _NOT_RI 0x04
1084 #define _NOT_RMCLR 0x08
1085 #define _NOT_RWDT 0x10
1086 #define _NOT_WDTWV 0x20
1087 #define _STKUNF 0x40
1088 #define _STKOVF 0x80
1090 //==============================================================================
1093 //==============================================================================
1096 extern __at(0x0098) __sfr OSCTUNE
;
1119 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1128 //==============================================================================
1131 //==============================================================================
1134 extern __at(0x0099) __sfr OSCCON
;
1147 unsigned SPLLEN
: 1;
1164 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1172 #define _SPLLEN 0x80
1174 //==============================================================================
1177 //==============================================================================
1180 extern __at(0x009A) __sfr OSCSTAT
;
1184 unsigned HFIOFS
: 1;
1185 unsigned LFIOFR
: 1;
1186 unsigned MFIOFR
: 1;
1187 unsigned HFIOFL
: 1;
1188 unsigned HFIOFR
: 1;
1194 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1196 #define _HFIOFS 0x01
1197 #define _LFIOFR 0x02
1198 #define _MFIOFR 0x04
1199 #define _HFIOFL 0x08
1200 #define _HFIOFR 0x10
1203 //==============================================================================
1205 extern __at(0x009B) __sfr ADRES
;
1206 extern __at(0x009B) __sfr ADRESL
;
1207 extern __at(0x009C) __sfr ADRESH
;
1209 //==============================================================================
1212 extern __at(0x009D) __sfr ADCON0
;
1219 unsigned GO_NOT_DONE
: 1;
1260 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1263 #define _GO_NOT_DONE 0x02
1272 //==============================================================================
1275 //==============================================================================
1278 extern __at(0x009E) __sfr ADCON1
;
1284 unsigned ADPREF0
: 1;
1285 unsigned ADPREF1
: 1;
1296 unsigned ADPREF
: 2;
1308 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1310 #define _ADPREF0 0x01
1311 #define _ADPREF1 0x02
1317 //==============================================================================
1320 //==============================================================================
1323 extern __at(0x009F) __sfr ADCON2
;
1333 unsigned TRIGSEL0
: 1;
1334 unsigned TRIGSEL1
: 1;
1335 unsigned TRIGSEL2
: 1;
1336 unsigned TRIGSEL3
: 1;
1342 unsigned TRIGSEL
: 4;
1346 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1348 #define _TRIGSEL0 0x10
1349 #define _TRIGSEL1 0x20
1350 #define _TRIGSEL2 0x40
1351 #define _TRIGSEL3 0x80
1353 //==============================================================================
1356 //==============================================================================
1359 extern __at(0x010C) __sfr LATA
;
1382 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1391 //==============================================================================
1394 //==============================================================================
1397 extern __at(0x0111) __sfr CM1CON0
;
1401 unsigned C1SYNC
: 1;
1411 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1413 #define _C1SYNC 0x01
1421 //==============================================================================
1424 //==============================================================================
1427 extern __at(0x0112) __sfr CM1CON1
;
1433 unsigned C1NCH0
: 1;
1434 unsigned C1NCH1
: 1;
1435 unsigned C1NCH2
: 1;
1437 unsigned C1PCH0
: 1;
1438 unsigned C1PCH1
: 1;
1439 unsigned C1INTN
: 1;
1440 unsigned C1INTP
: 1;
1457 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1459 #define _C1NCH0 0x01
1460 #define _C1NCH1 0x02
1461 #define _C1NCH2 0x04
1462 #define _C1PCH0 0x10
1463 #define _C1PCH1 0x20
1464 #define _C1INTN 0x40
1465 #define _C1INTP 0x80
1467 //==============================================================================
1470 //==============================================================================
1473 extern __at(0x0115) __sfr CMOUT
;
1477 unsigned MC1OUT
: 1;
1487 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1489 #define _MC1OUT 0x01
1491 //==============================================================================
1494 //==============================================================================
1497 extern __at(0x0116) __sfr BORCON
;
1501 unsigned BORRDY
: 1;
1508 unsigned SBOREN
: 1;
1511 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1513 #define _BORRDY 0x01
1515 #define _SBOREN 0x80
1517 //==============================================================================
1520 //==============================================================================
1523 extern __at(0x0117) __sfr FVRCON
;
1529 unsigned ADFVR0
: 1;
1530 unsigned ADFVR1
: 1;
1531 unsigned CDAFVR0
: 1;
1532 unsigned CDAFVR1
: 1;
1535 unsigned FVRRDY
: 1;
1548 unsigned CDAFVR
: 2;
1553 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1555 #define _ADFVR0 0x01
1556 #define _ADFVR1 0x02
1557 #define _CDAFVR0 0x04
1558 #define _CDAFVR1 0x08
1561 #define _FVRRDY 0x40
1564 //==============================================================================
1567 //==============================================================================
1570 extern __at(0x0118) __sfr DAC1CON0
;
1578 unsigned D1PSS0
: 1;
1579 unsigned D1PSS1
: 1;
1581 unsigned DAC1OE
: 1;
1583 unsigned DAC1EN
: 1;
1594 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1596 #define _D1PSS0 0x04
1597 #define _D1PSS1 0x08
1598 #define _DAC1OE 0x20
1599 #define _DAC1EN 0x80
1601 //==============================================================================
1604 //==============================================================================
1607 extern __at(0x0119) __sfr DAC1CON1
;
1611 unsigned DAC1R0
: 1;
1612 unsigned DAC1R1
: 1;
1613 unsigned DAC1R2
: 1;
1614 unsigned DAC1R3
: 1;
1615 unsigned DAC1R4
: 1;
1616 unsigned DAC1R5
: 1;
1617 unsigned DAC1R6
: 1;
1618 unsigned DAC1R7
: 1;
1621 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
1623 #define _DAC1R0 0x01
1624 #define _DAC1R1 0x02
1625 #define _DAC1R2 0x04
1626 #define _DAC1R3 0x08
1627 #define _DAC1R4 0x10
1628 #define _DAC1R5 0x20
1629 #define _DAC1R6 0x40
1630 #define _DAC1R7 0x80
1632 //==============================================================================
1635 //==============================================================================
1638 extern __at(0x011C) __sfr ZCD1CON
;
1642 unsigned ZCD1INTN
: 1;
1643 unsigned ZCD1INTP
: 1;
1646 unsigned ZCD1POL
: 1;
1647 unsigned ZCD1OUT
: 1;
1648 unsigned ZCD1OE
: 1;
1649 unsigned ZCD1EN
: 1;
1652 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
1654 #define _ZCD1INTN 0x01
1655 #define _ZCD1INTP 0x02
1656 #define _ZCD1POL 0x10
1657 #define _ZCD1OUT 0x20
1658 #define _ZCD1OE 0x40
1659 #define _ZCD1EN 0x80
1661 //==============================================================================
1664 //==============================================================================
1667 extern __at(0x011D) __sfr APFCON
;
1671 unsigned CCP1SEL
: 1;
1674 unsigned T1GSEL
: 1;
1676 unsigned CWGBSEL
: 1;
1677 unsigned CWGASEL
: 1;
1681 extern __at(0x011D) volatile __APFCONbits_t APFCONbits
;
1683 #define _CCP1SEL 0x01
1684 #define _T1GSEL 0x08
1685 #define _CWGBSEL 0x20
1686 #define _CWGASEL 0x40
1688 //==============================================================================
1691 //==============================================================================
1694 extern __at(0x018C) __sfr ANSELA
;
1708 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
1715 //==============================================================================
1717 extern __at(0x0191) __sfr PMADR
;
1718 extern __at(0x0191) __sfr PMADRL
;
1719 extern __at(0x0192) __sfr PMADRH
;
1720 extern __at(0x0193) __sfr PMDAT
;
1721 extern __at(0x0193) __sfr PMDATL
;
1722 extern __at(0x0194) __sfr PMDATH
;
1724 //==============================================================================
1727 extern __at(0x0195) __sfr PMCON1
;
1741 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
1751 //==============================================================================
1753 extern __at(0x0196) __sfr PMCON2
;
1755 //==============================================================================
1758 extern __at(0x0197) __sfr VREGCON
;
1764 unsigned VREGPM0
: 1;
1765 unsigned VREGPM1
: 1;
1776 unsigned VREGPM
: 2;
1781 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits
;
1783 #define _VREGPM0 0x01
1784 #define _VREGPM1 0x02
1786 //==============================================================================
1789 //==============================================================================
1792 extern __at(0x020C) __sfr WPUA
;
1815 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
1824 //==============================================================================
1827 //==============================================================================
1830 extern __at(0x028C) __sfr ODCONA
;
1844 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
1852 //==============================================================================
1854 extern __at(0x0291) __sfr CCPR1
;
1855 extern __at(0x0291) __sfr CCPR1L
;
1856 extern __at(0x0292) __sfr CCPR1H
;
1858 //==============================================================================
1861 extern __at(0x0293) __sfr CCP1CON
;
1879 unsigned CCP1MODE0
: 1;
1880 unsigned CCP1MODE1
: 1;
1881 unsigned CCP1MODE2
: 1;
1882 unsigned CCP1MODE3
: 1;
1883 unsigned CCP1FMT
: 1;
1884 unsigned CCP1OUT
: 1;
1885 unsigned CCP1OE
: 1;
1886 unsigned CCP1EN
: 1;
1891 unsigned CCP1MODE
: 4;
1902 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
1905 #define _CCP1MODE0 0x01
1907 #define _CCP1MODE1 0x02
1909 #define _CCP1MODE2 0x04
1911 #define _CCP1MODE3 0x08
1913 #define _CCP1FMT 0x10
1915 #define _CCP1OUT 0x20
1917 #define _CCP1OE 0x40
1919 #define _CCP1EN 0x80
1921 //==============================================================================
1924 //==============================================================================
1927 extern __at(0x0294) __sfr CCP1CAP
;
1945 unsigned CCP1CTS0
: 1;
1946 unsigned CCP1CTS1
: 1;
1963 unsigned CCP1CTS
: 2;
1968 extern __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits
;
1971 #define _CCP1CTS0 0x01
1973 #define _CCP1CTS1 0x02
1975 //==============================================================================
1977 extern __at(0x0298) __sfr CCPR2
;
1978 extern __at(0x0298) __sfr CCPR2L
;
1979 extern __at(0x0299) __sfr CCPR2H
;
1981 //==============================================================================
1984 extern __at(0x029A) __sfr CCP2CON
;
2002 unsigned CCP2MODE0
: 1;
2003 unsigned CCP2MODE1
: 1;
2004 unsigned CCP2MODE2
: 1;
2005 unsigned CCP2MODE3
: 1;
2006 unsigned CCP2FMT
: 1;
2007 unsigned CCP2OUT
: 1;
2008 unsigned CCP2OE
: 1;
2009 unsigned CCP2EN
: 1;
2020 unsigned CCP2MODE
: 4;
2025 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
2027 #define _CCP2CON_MODE0 0x01
2028 #define _CCP2CON_CCP2MODE0 0x01
2029 #define _CCP2CON_MODE1 0x02
2030 #define _CCP2CON_CCP2MODE1 0x02
2031 #define _CCP2CON_MODE2 0x04
2032 #define _CCP2CON_CCP2MODE2 0x04
2033 #define _CCP2CON_MODE3 0x08
2034 #define _CCP2CON_CCP2MODE3 0x08
2035 #define _CCP2CON_FMT 0x10
2036 #define _CCP2CON_CCP2FMT 0x10
2037 #define _CCP2CON_OUT 0x20
2038 #define _CCP2CON_CCP2OUT 0x20
2039 #define _CCP2CON_OE 0x40
2040 #define _CCP2CON_CCP2OE 0x40
2041 #define _CCP2CON_EN 0x80
2042 #define _CCP2CON_CCP2EN 0x80
2044 //==============================================================================
2047 //==============================================================================
2050 extern __at(0x029B) __sfr CCP2CAP
;
2068 unsigned CCP2CTS0
: 1;
2069 unsigned CCP2CTS1
: 1;
2080 unsigned CCP2CTS
: 2;
2091 extern __at(0x029B) volatile __CCP2CAPbits_t CCP2CAPbits
;
2093 #define _CCP2CAP_CTS0 0x01
2094 #define _CCP2CAP_CCP2CTS0 0x01
2095 #define _CCP2CAP_CTS1 0x02
2096 #define _CCP2CAP_CCP2CTS1 0x02
2098 //==============================================================================
2101 //==============================================================================
2104 extern __at(0x029E) __sfr CCPTMRS
;
2110 unsigned CCP1TSEL0
: 1;
2111 unsigned CCP1TSEL1
: 1;
2112 unsigned CCP2TSEL0
: 1;
2113 unsigned CCP2TSEL1
: 1;
2122 unsigned CCP1TSEL
: 2;
2129 unsigned CCP2TSEL
: 2;
2134 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
2136 #define _CCP1TSEL0 0x01
2137 #define _CCP1TSEL1 0x02
2138 #define _CCP2TSEL0 0x04
2139 #define _CCP2TSEL1 0x08
2141 //==============================================================================
2144 //==============================================================================
2147 extern __at(0x030C) __sfr SLRCONA
;
2161 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
2169 //==============================================================================
2172 //==============================================================================
2175 extern __at(0x038C) __sfr INLVLA
;
2181 unsigned INLVLA0
: 1;
2182 unsigned INLVLA1
: 1;
2183 unsigned INLVLA2
: 1;
2184 unsigned INLVLA3
: 1;
2185 unsigned INLVLA4
: 1;
2186 unsigned INLVLA5
: 1;
2193 unsigned INLVLA
: 6;
2198 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
2200 #define _INLVLA0 0x01
2201 #define _INLVLA1 0x02
2202 #define _INLVLA2 0x04
2203 #define _INLVLA3 0x08
2204 #define _INLVLA4 0x10
2205 #define _INLVLA5 0x20
2207 //==============================================================================
2209 extern __at(0x0391) __sfr IOCAP
;
2210 extern __at(0x0392) __sfr IOCAN
;
2211 extern __at(0x0393) __sfr IOCAF
;
2212 extern __at(0x0413) __sfr T4TMR
;
2213 extern __at(0x0413) __sfr TMR4
;
2214 extern __at(0x0414) __sfr PR4
;
2215 extern __at(0x0414) __sfr T4PR
;
2217 //==============================================================================
2220 extern __at(0x0415) __sfr T4CON
;
2226 unsigned T4OUTPS0
: 1;
2227 unsigned T4OUTPS1
: 1;
2228 unsigned T4OUTPS2
: 1;
2229 unsigned T4OUTPS3
: 1;
2230 unsigned T4CKPS0
: 1;
2231 unsigned T4CKPS1
: 1;
2232 unsigned T4CKPS2
: 1;
2238 unsigned OUTPS0
: 1;
2239 unsigned OUTPS1
: 1;
2240 unsigned OUTPS2
: 1;
2241 unsigned OUTPS3
: 1;
2257 unsigned TMR4ON
: 1;
2262 unsigned T4OUTPS
: 4;
2275 unsigned T4CKPS
: 3;
2287 extern __at(0x0415) volatile __T4CONbits_t T4CONbits
;
2289 #define _T4CON_T4OUTPS0 0x01
2290 #define _T4CON_OUTPS0 0x01
2291 #define _T4CON_T4OUTPS1 0x02
2292 #define _T4CON_OUTPS1 0x02
2293 #define _T4CON_T4OUTPS2 0x04
2294 #define _T4CON_OUTPS2 0x04
2295 #define _T4CON_T4OUTPS3 0x08
2296 #define _T4CON_OUTPS3 0x08
2297 #define _T4CON_T4CKPS0 0x10
2298 #define _T4CON_CKPS0 0x10
2299 #define _T4CON_T4CKPS1 0x20
2300 #define _T4CON_CKPS1 0x20
2301 #define _T4CON_T4CKPS2 0x40
2302 #define _T4CON_CKPS2 0x40
2303 #define _T4CON_ON 0x80
2304 #define _T4CON_T4ON 0x80
2305 #define _T4CON_TMR4ON 0x80
2307 //==============================================================================
2310 //==============================================================================
2313 extern __at(0x0416) __sfr T4HLT
;
2324 unsigned CKSYNC
: 1;
2331 unsigned T4MODE0
: 1;
2332 unsigned T4MODE1
: 1;
2333 unsigned T4MODE2
: 1;
2334 unsigned T4MODE3
: 1;
2336 unsigned T4CKSYNC
: 1;
2337 unsigned T4CKPOL
: 1;
2338 unsigned T4PSYNC
: 1;
2349 unsigned T4MODE
: 4;
2354 extern __at(0x0416) volatile __T4HLTbits_t T4HLTbits
;
2356 #define _T4HLT_MODE0 0x01
2357 #define _T4HLT_T4MODE0 0x01
2358 #define _T4HLT_MODE1 0x02
2359 #define _T4HLT_T4MODE1 0x02
2360 #define _T4HLT_MODE2 0x04
2361 #define _T4HLT_T4MODE2 0x04
2362 #define _T4HLT_MODE3 0x08
2363 #define _T4HLT_T4MODE3 0x08
2364 #define _T4HLT_CKSYNC 0x20
2365 #define _T4HLT_T4CKSYNC 0x20
2366 #define _T4HLT_CKPOL 0x40
2367 #define _T4HLT_T4CKPOL 0x40
2368 #define _T4HLT_PSYNC 0x80
2369 #define _T4HLT_T4PSYNC 0x80
2371 //==============================================================================
2374 //==============================================================================
2377 extern __at(0x0417) __sfr T4CLKCON
;
2400 extern __at(0x0417) volatile __T4CLKCONbits_t T4CLKCONbits
;
2406 //==============================================================================
2409 //==============================================================================
2412 extern __at(0x0418) __sfr T4RST
;
2430 unsigned T4RSEL0
: 1;
2431 unsigned T4RSEL1
: 1;
2432 unsigned T4RSEL2
: 1;
2433 unsigned T4RSEL3
: 1;
2448 unsigned T4RSEL
: 4;
2453 extern __at(0x0418) volatile __T4RSTbits_t T4RSTbits
;
2455 #define _T4RST_RSEL0 0x01
2456 #define _T4RST_T4RSEL0 0x01
2457 #define _T4RST_RSEL1 0x02
2458 #define _T4RST_T4RSEL1 0x02
2459 #define _T4RST_RSEL2 0x04
2460 #define _T4RST_T4RSEL2 0x04
2461 #define _T4RST_RSEL3 0x08
2462 #define _T4RST_T4RSEL3 0x08
2464 //==============================================================================
2466 extern __at(0x041A) __sfr T6TMR
;
2467 extern __at(0x041A) __sfr TMR6
;
2468 extern __at(0x041B) __sfr PR6
;
2469 extern __at(0x041B) __sfr T6PR
;
2471 //==============================================================================
2474 extern __at(0x041C) __sfr T6CON
;
2480 unsigned T6OUTPS0
: 1;
2481 unsigned T6OUTPS1
: 1;
2482 unsigned T6OUTPS2
: 1;
2483 unsigned T6OUTPS3
: 1;
2484 unsigned T6CKPS0
: 1;
2485 unsigned T6CKPS1
: 1;
2486 unsigned T6CKPS2
: 1;
2492 unsigned OUTPS0
: 1;
2493 unsigned OUTPS1
: 1;
2494 unsigned OUTPS2
: 1;
2495 unsigned OUTPS3
: 1;
2511 unsigned TMR6ON
: 1;
2522 unsigned T6OUTPS
: 4;
2536 unsigned T6CKPS
: 3;
2541 extern __at(0x041C) volatile __T6CONbits_t T6CONbits
;
2543 #define _T6CON_T6OUTPS0 0x01
2544 #define _T6CON_OUTPS0 0x01
2545 #define _T6CON_T6OUTPS1 0x02
2546 #define _T6CON_OUTPS1 0x02
2547 #define _T6CON_T6OUTPS2 0x04
2548 #define _T6CON_OUTPS2 0x04
2549 #define _T6CON_T6OUTPS3 0x08
2550 #define _T6CON_OUTPS3 0x08
2551 #define _T6CON_T6CKPS0 0x10
2552 #define _T6CON_CKPS0 0x10
2553 #define _T6CON_T6CKPS1 0x20
2554 #define _T6CON_CKPS1 0x20
2555 #define _T6CON_T6CKPS2 0x40
2556 #define _T6CON_CKPS2 0x40
2557 #define _T6CON_ON 0x80
2558 #define _T6CON_T6ON 0x80
2559 #define _T6CON_TMR6ON 0x80
2561 //==============================================================================
2564 //==============================================================================
2567 extern __at(0x041D) __sfr T6HLT
;
2578 unsigned CKSYNC
: 1;
2585 unsigned T6MODE0
: 1;
2586 unsigned T6MODE1
: 1;
2587 unsigned T6MODE2
: 1;
2588 unsigned T6MODE3
: 1;
2590 unsigned T6CKSYNC
: 1;
2591 unsigned T6CKPOL
: 1;
2592 unsigned T6PSYNC
: 1;
2603 unsigned T6MODE
: 4;
2608 extern __at(0x041D) volatile __T6HLTbits_t T6HLTbits
;
2610 #define _T6HLT_MODE0 0x01
2611 #define _T6HLT_T6MODE0 0x01
2612 #define _T6HLT_MODE1 0x02
2613 #define _T6HLT_T6MODE1 0x02
2614 #define _T6HLT_MODE2 0x04
2615 #define _T6HLT_T6MODE2 0x04
2616 #define _T6HLT_MODE3 0x08
2617 #define _T6HLT_T6MODE3 0x08
2618 #define _T6HLT_CKSYNC 0x20
2619 #define _T6HLT_T6CKSYNC 0x20
2620 #define _T6HLT_CKPOL 0x40
2621 #define _T6HLT_T6CKPOL 0x40
2622 #define _T6HLT_PSYNC 0x80
2623 #define _T6HLT_T6PSYNC 0x80
2625 //==============================================================================
2628 //==============================================================================
2631 extern __at(0x041E) __sfr T6CLKCON
;
2654 extern __at(0x041E) volatile __T6CLKCONbits_t T6CLKCONbits
;
2660 //==============================================================================
2663 //==============================================================================
2666 extern __at(0x041F) __sfr T6RST
;
2684 unsigned T6RSEL0
: 1;
2685 unsigned T6RSEL1
: 1;
2686 unsigned T6RSEL2
: 1;
2687 unsigned T6RSEL3
: 1;
2702 unsigned T6RSEL
: 4;
2707 extern __at(0x041F) volatile __T6RSTbits_t T6RSTbits
;
2709 #define _T6RST_RSEL0 0x01
2710 #define _T6RST_T6RSEL0 0x01
2711 #define _T6RST_RSEL1 0x02
2712 #define _T6RST_T6RSEL1 0x02
2713 #define _T6RST_RSEL2 0x04
2714 #define _T6RST_T6RSEL2 0x04
2715 #define _T6RST_RSEL3 0x08
2716 #define _T6RST_T6RSEL3 0x08
2718 //==============================================================================
2721 //==============================================================================
2724 extern __at(0x0691) __sfr CWG1DBR
;
2742 unsigned CWG1DBR0
: 1;
2743 unsigned CWG1DBR1
: 1;
2744 unsigned CWG1DBR2
: 1;
2745 unsigned CWG1DBR3
: 1;
2746 unsigned CWG1DBR4
: 1;
2747 unsigned CWG1DBR5
: 1;
2754 unsigned CWG1DBR
: 6;
2765 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits
;
2768 #define _CWG1DBR0 0x01
2770 #define _CWG1DBR1 0x02
2772 #define _CWG1DBR2 0x04
2774 #define _CWG1DBR3 0x08
2776 #define _CWG1DBR4 0x10
2778 #define _CWG1DBR5 0x20
2780 //==============================================================================
2783 //==============================================================================
2786 extern __at(0x0692) __sfr CWG1DBF
;
2804 unsigned CWG1DBF0
: 1;
2805 unsigned CWG1DBF1
: 1;
2806 unsigned CWG1DBF2
: 1;
2807 unsigned CWG1DBF3
: 1;
2808 unsigned CWG1DBF4
: 1;
2809 unsigned CWG1DBF5
: 1;
2822 unsigned CWG1DBF
: 6;
2827 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits
;
2830 #define _CWG1DBF0 0x01
2832 #define _CWG1DBF1 0x02
2834 #define _CWG1DBF2 0x04
2836 #define _CWG1DBF3 0x08
2838 #define _CWG1DBF4 0x10
2840 #define _CWG1DBF5 0x20
2842 //==============================================================================
2845 //==============================================================================
2848 extern __at(0x0693) __sfr CWG1AS0
;
2861 unsigned SHUTDOWN
: 1;
2868 unsigned CWG1LSAC0
: 1;
2869 unsigned CWG1LSAC1
: 1;
2870 unsigned CWG1LSBD0
: 1;
2871 unsigned CWG1LSBD1
: 1;
2872 unsigned CWG1REN
: 1;
2873 unsigned CWG1SHUTDOWN
: 1;
2886 unsigned CWG1LSAC
: 2;
2893 unsigned CWG1LSBD
: 2;
2905 extern __at(0x0693) volatile __CWG1AS0bits_t CWG1AS0bits
;
2908 #define _CWG1LSAC0 0x04
2910 #define _CWG1LSAC1 0x08
2912 #define _CWG1LSBD0 0x10
2914 #define _CWG1LSBD1 0x20
2916 #define _CWG1REN 0x40
2917 #define _SHUTDOWN 0x80
2918 #define _CWG1SHUTDOWN 0x80
2920 //==============================================================================
2923 //==============================================================================
2926 extern __at(0x0694) __sfr CWG1AS1
;
2936 unsigned TMR2AS
: 1;
2937 unsigned TMR4AS
: 1;
2938 unsigned TMR6AS
: 1;
2944 unsigned CWG1INAS
: 1;
2945 unsigned CWG1C1AS
: 1;
2946 unsigned CWG1C2AS
: 1;
2948 unsigned CWG1TMR2AS
: 1;
2949 unsigned CWG1TMR4AS
: 1;
2950 unsigned CWG1TMR6AS
: 1;
2955 extern __at(0x0694) volatile __CWG1AS1bits_t CWG1AS1bits
;
2958 #define _CWG1INAS 0x01
2960 #define _CWG1C1AS 0x02
2962 #define _CWG1C2AS 0x04
2963 #define _TMR2AS 0x10
2964 #define _CWG1TMR2AS 0x10
2965 #define _TMR4AS 0x20
2966 #define _CWG1TMR4AS 0x20
2967 #define _TMR6AS 0x40
2968 #define _CWG1TMR6AS 0x40
2970 //==============================================================================
2973 //==============================================================================
2976 extern __at(0x0695) __sfr CWG1OCON0
;
2994 unsigned CWG1STRA
: 1;
2995 unsigned CWG1STRB
: 1;
2996 unsigned CWG1STRC
: 1;
2997 unsigned CWG1STRD
: 1;
2998 unsigned CWG1OVRA
: 1;
2999 unsigned CWG1OVRB
: 1;
3000 unsigned CWG1OVRC
: 1;
3001 unsigned CWG1OVRD
: 1;
3003 } __CWG1OCON0bits_t
;
3005 extern __at(0x0695) volatile __CWG1OCON0bits_t CWG1OCON0bits
;
3008 #define _CWG1STRA 0x01
3010 #define _CWG1STRB 0x02
3012 #define _CWG1STRC 0x04
3014 #define _CWG1STRD 0x08
3016 #define _CWG1OVRA 0x10
3018 #define _CWG1OVRB 0x20
3020 #define _CWG1OVRC 0x40
3022 #define _CWG1OVRD 0x80
3024 //==============================================================================
3027 //==============================================================================
3030 extern __at(0x0696) __sfr CWG1CON0
;
3048 unsigned CWG1MODE0
: 1;
3049 unsigned CWG1MODE1
: 1;
3050 unsigned CWG1MODE2
: 1;
3054 unsigned CWG1LD
: 1;
3067 unsigned CWG1EN
: 1;
3078 unsigned CWG1MODE
: 3;
3083 extern __at(0x0696) volatile __CWG1CON0bits_t CWG1CON0bits
;
3085 #define _CWG1CON0_MODE0 0x01
3086 #define _CWG1CON0_CWG1MODE0 0x01
3087 #define _CWG1CON0_MODE1 0x02
3088 #define _CWG1CON0_CWG1MODE1 0x02
3089 #define _CWG1CON0_MODE2 0x04
3090 #define _CWG1CON0_CWG1MODE2 0x04
3091 #define _CWG1CON0_LD 0x40
3092 #define _CWG1CON0_CWG1LD 0x40
3093 #define _CWG1CON0_EN 0x80
3094 #define _CWG1CON0_G1EN 0x80
3095 #define _CWG1CON0_CWG1EN 0x80
3097 //==============================================================================
3100 //==============================================================================
3103 extern __at(0x0697) __sfr CWG1CON1
;
3121 unsigned CWG1POLA
: 1;
3122 unsigned CWG1POLB
: 1;
3123 unsigned CWG1POLC
: 1;
3124 unsigned CWG1POLD
: 1;
3126 unsigned CWG1IN
: 1;
3132 extern __at(0x0697) volatile __CWG1CON1bits_t CWG1CON1bits
;
3135 #define _CWG1POLA 0x01
3137 #define _CWG1POLB 0x02
3139 #define _CWG1POLC 0x04
3141 #define _CWG1POLD 0x08
3143 #define _CWG1IN 0x20
3145 //==============================================================================
3148 //==============================================================================
3151 extern __at(0x0698) __sfr CWG1OCON1
;
3169 unsigned CWG1OEA
: 1;
3170 unsigned CWG1OEB
: 1;
3171 unsigned CWG1OEC
: 1;
3172 unsigned CWG1OED
: 1;
3178 } __CWG1OCON1bits_t
;
3180 extern __at(0x0698) volatile __CWG1OCON1bits_t CWG1OCON1bits
;
3183 #define _CWG1OEA 0x01
3185 #define _CWG1OEB 0x02
3187 #define _CWG1OEC 0x04
3189 #define _CWG1OED 0x08
3191 //==============================================================================
3194 //==============================================================================
3197 extern __at(0x0699) __sfr CWG1CLKCON
;
3215 unsigned CWG1CS
: 1;
3224 } __CWG1CLKCONbits_t
;
3226 extern __at(0x0699) volatile __CWG1CLKCONbits_t CWG1CLKCONbits
;
3229 #define _CWG1CS 0x01
3231 //==============================================================================
3234 //==============================================================================
3237 extern __at(0x069A) __sfr CWG1ISM
;
3255 unsigned CWG1IS0
: 1;
3256 unsigned CWG1IS1
: 1;
3257 unsigned CWG1IS2
: 1;
3273 unsigned CWG1IS
: 3;
3278 extern __at(0x069A) volatile __CWG1ISMbits_t CWG1ISMbits
;
3281 #define _CWG1IS0 0x01
3283 #define _CWG1IS1 0x02
3285 #define _CWG1IS2 0x04
3287 //==============================================================================
3290 //==============================================================================
3293 extern __at(0x0711) __sfr WDTCON0
;
3300 unsigned WDTPS0
: 1;
3301 unsigned WDTPS1
: 1;
3302 unsigned WDTPS2
: 1;
3303 unsigned WDTPS3
: 1;
3304 unsigned WDTPS4
: 1;
3311 unsigned SWDTEN
: 1;
3323 unsigned WDTSEN
: 1;
3341 extern __at(0x0711) volatile __WDTCON0bits_t WDTCON0bits
;
3344 #define _SWDTEN 0x01
3345 #define _WDTSEN 0x01
3346 #define _WDTPS0 0x02
3347 #define _WDTPS1 0x04
3348 #define _WDTPS2 0x08
3349 #define _WDTPS3 0x10
3350 #define _WDTPS4 0x20
3352 //==============================================================================
3355 //==============================================================================
3358 extern __at(0x0712) __sfr WDTCON1
;
3364 unsigned WINDOW0
: 1;
3365 unsigned WINDOW1
: 1;
3366 unsigned WINDOW2
: 1;
3368 unsigned WDTCS0
: 1;
3369 unsigned WDTCS1
: 1;
3370 unsigned WDTCS2
: 1;
3376 unsigned WDTWINDOW0
: 1;
3377 unsigned WDTWINDOW1
: 1;
3378 unsigned WDTWINDOW2
: 1;
3388 unsigned WINDOW
: 3;
3394 unsigned WDTWINDOW
: 3;
3406 extern __at(0x0712) volatile __WDTCON1bits_t WDTCON1bits
;
3408 #define _WINDOW0 0x01
3409 #define _WDTWINDOW0 0x01
3410 #define _WINDOW1 0x02
3411 #define _WDTWINDOW1 0x02
3412 #define _WINDOW2 0x04
3413 #define _WDTWINDOW2 0x04
3414 #define _WDTCS0 0x10
3415 #define _WDTCS1 0x20
3416 #define _WDTCS2 0x40
3418 //==============================================================================
3421 //==============================================================================
3424 extern __at(0x0713) __sfr WDTPSL
;
3430 unsigned PSCNT0
: 1;
3431 unsigned PSCNT1
: 1;
3432 unsigned PSCNT2
: 1;
3433 unsigned PSCNT3
: 1;
3434 unsigned PSCNT4
: 1;
3435 unsigned PSCNT5
: 1;
3436 unsigned PSCNT6
: 1;
3437 unsigned PSCNT7
: 1;
3442 unsigned WDTPSCNT0
: 1;
3443 unsigned WDTPSCNT1
: 1;
3444 unsigned WDTPSCNT2
: 1;
3445 unsigned WDTPSCNT3
: 1;
3446 unsigned WDTPSCNT4
: 1;
3447 unsigned WDTPSCNT5
: 1;
3448 unsigned WDTPSCNT6
: 1;
3449 unsigned WDTPSCNT7
: 1;
3453 extern __at(0x0713) volatile __WDTPSLbits_t WDTPSLbits
;
3455 #define _PSCNT0 0x01
3456 #define _WDTPSCNT0 0x01
3457 #define _PSCNT1 0x02
3458 #define _WDTPSCNT1 0x02
3459 #define _PSCNT2 0x04
3460 #define _WDTPSCNT2 0x04
3461 #define _PSCNT3 0x08
3462 #define _WDTPSCNT3 0x08
3463 #define _PSCNT4 0x10
3464 #define _WDTPSCNT4 0x10
3465 #define _PSCNT5 0x20
3466 #define _WDTPSCNT5 0x20
3467 #define _PSCNT6 0x40
3468 #define _WDTPSCNT6 0x40
3469 #define _PSCNT7 0x80
3470 #define _WDTPSCNT7 0x80
3472 //==============================================================================
3475 //==============================================================================
3478 extern __at(0x0714) __sfr WDTPSH
;
3484 unsigned PSCNT8
: 1;
3485 unsigned PSCNT9
: 1;
3486 unsigned PSCNT10
: 1;
3487 unsigned PSCNT11
: 1;
3488 unsigned PSCNT12
: 1;
3489 unsigned PSCNT13
: 1;
3490 unsigned PSCNT14
: 1;
3491 unsigned PSCNT15
: 1;
3496 unsigned WDTPSCNT8
: 1;
3497 unsigned WDTPSCNT9
: 1;
3498 unsigned WDTPSCNT10
: 1;
3499 unsigned WDTPSCNT11
: 1;
3500 unsigned WDTPSCNT12
: 1;
3501 unsigned WDTPSCNT13
: 1;
3502 unsigned WDTPSCNT14
: 1;
3503 unsigned WDTPSCNT15
: 1;
3507 extern __at(0x0714) volatile __WDTPSHbits_t WDTPSHbits
;
3509 #define _PSCNT8 0x01
3510 #define _WDTPSCNT8 0x01
3511 #define _PSCNT9 0x02
3512 #define _WDTPSCNT9 0x02
3513 #define _PSCNT10 0x04
3514 #define _WDTPSCNT10 0x04
3515 #define _PSCNT11 0x08
3516 #define _WDTPSCNT11 0x08
3517 #define _PSCNT12 0x10
3518 #define _WDTPSCNT12 0x10
3519 #define _PSCNT13 0x20
3520 #define _WDTPSCNT13 0x20
3521 #define _PSCNT14 0x40
3522 #define _WDTPSCNT14 0x40
3523 #define _PSCNT15 0x80
3524 #define _WDTPSCNT15 0x80
3526 //==============================================================================
3529 //==============================================================================
3532 extern __at(0x0715) __sfr WDTTMR
;
3538 unsigned PSCNT16
: 1;
3539 unsigned PSCNT17
: 1;
3541 unsigned WDTTMR0
: 1;
3542 unsigned WDTTMR1
: 1;
3543 unsigned WDTTMR2
: 1;
3544 unsigned WDTTMR3
: 1;
3545 unsigned WDTTMR4
: 1;
3550 unsigned WDTPSCNT16
: 1;
3551 unsigned WDTPSCNT17
: 1;
3552 unsigned WDTSTATE
: 1;
3563 unsigned WDTTMR
: 5;
3567 extern __at(0x0715) volatile __WDTTMRbits_t WDTTMRbits
;
3569 #define _PSCNT16 0x01
3570 #define _WDTPSCNT16 0x01
3571 #define _PSCNT17 0x02
3572 #define _WDTPSCNT17 0x02
3574 #define _WDTSTATE 0x04
3575 #define _WDTTMR0 0x08
3576 #define _WDTTMR1 0x10
3577 #define _WDTTMR2 0x20
3578 #define _WDTTMR3 0x40
3579 #define _WDTTMR4 0x80
3581 //==============================================================================
3583 extern __at(0x0718) __sfr SCANLADR
;
3585 //==============================================================================
3588 extern __at(0x0718) __sfr SCANLADRL
;
3606 unsigned SCANLADR0
: 1;
3607 unsigned SCANLADR1
: 1;
3608 unsigned SCANLADR2
: 1;
3609 unsigned SCANLADR3
: 1;
3610 unsigned SCANLADR4
: 1;
3611 unsigned SCANLADR5
: 1;
3612 unsigned SCANLADR6
: 1;
3613 unsigned SCANLADR7
: 1;
3621 } __SCANLADRLbits_t
;
3623 extern __at(0x0718) volatile __SCANLADRLbits_t SCANLADRLbits
;
3626 #define _SCANLADR0 0x01
3628 #define _SCANLADR1 0x02
3630 #define _SCANLADR2 0x04
3632 #define _SCANLADR3 0x08
3634 #define _SCANLADR4 0x10
3636 #define _SCANLADR5 0x20
3638 #define _SCANLADR6 0x40
3640 #define _SCANLADR7 0x80
3642 //==============================================================================
3645 //==============================================================================
3648 extern __at(0x0719) __sfr SCANLADRH
;
3656 unsigned LADR10
: 1;
3657 unsigned LADR11
: 1;
3658 unsigned LADR12
: 1;
3659 unsigned LADR13
: 1;
3660 unsigned LADR14
: 1;
3661 unsigned LADR15
: 1;
3666 unsigned SCANLADR8
: 1;
3667 unsigned SCANLADR9
: 1;
3668 unsigned SCANLADR10
: 1;
3669 unsigned SCANLADR11
: 1;
3670 unsigned SCANLADR12
: 1;
3671 unsigned SCANLADR13
: 1;
3672 unsigned SCANLADR14
: 1;
3673 unsigned SCANLADR15
: 1;
3675 } __SCANLADRHbits_t
;
3677 extern __at(0x0719) volatile __SCANLADRHbits_t SCANLADRHbits
;
3680 #define _SCANLADR8 0x01
3682 #define _SCANLADR9 0x02
3683 #define _LADR10 0x04
3684 #define _SCANLADR10 0x04
3685 #define _LADR11 0x08
3686 #define _SCANLADR11 0x08
3687 #define _LADR12 0x10
3688 #define _SCANLADR12 0x10
3689 #define _LADR13 0x20
3690 #define _SCANLADR13 0x20
3691 #define _LADR14 0x40
3692 #define _SCANLADR14 0x40
3693 #define _LADR15 0x80
3694 #define _SCANLADR15 0x80
3696 //==============================================================================
3698 extern __at(0x071A) __sfr SCANHADR
;
3700 //==============================================================================
3703 extern __at(0x071A) __sfr SCANHADRL
;
3721 unsigned SCANHADR0
: 1;
3722 unsigned SCANHADR1
: 1;
3723 unsigned SCANHADR2
: 1;
3724 unsigned SCANHADR3
: 1;
3725 unsigned SCANHADR4
: 1;
3726 unsigned SCANHADR5
: 1;
3727 unsigned SCANHADR6
: 1;
3728 unsigned SCANHADR7
: 1;
3730 } __SCANHADRLbits_t
;
3732 extern __at(0x071A) volatile __SCANHADRLbits_t SCANHADRLbits
;
3735 #define _SCANHADR0 0x01
3737 #define _SCANHADR1 0x02
3739 #define _SCANHADR2 0x04
3741 #define _SCANHADR3 0x08
3743 #define _SCANHADR4 0x10
3745 #define _SCANHADR5 0x20
3747 #define _SCANHADR6 0x40
3749 #define _SCANHADR7 0x80
3751 //==============================================================================
3754 //==============================================================================
3757 extern __at(0x071B) __sfr SCANHADRH
;
3765 unsigned HADR10
: 1;
3766 unsigned HADR11
: 1;
3767 unsigned HADR12
: 1;
3768 unsigned HADR13
: 1;
3769 unsigned HADR14
: 1;
3770 unsigned HADR15
: 1;
3775 unsigned SCANHADR8
: 1;
3776 unsigned SCANHADR9
: 1;
3777 unsigned SCANHADR10
: 1;
3778 unsigned SCANHADR11
: 1;
3779 unsigned SCANHADR12
: 1;
3780 unsigned SCANHADR13
: 1;
3781 unsigned SCANHADR14
: 1;
3782 unsigned SCANHADR15
: 1;
3784 } __SCANHADRHbits_t
;
3786 extern __at(0x071B) volatile __SCANHADRHbits_t SCANHADRHbits
;
3789 #define _SCANHADR8 0x01
3791 #define _SCANHADR9 0x02
3792 #define _HADR10 0x04
3793 #define _SCANHADR10 0x04
3794 #define _HADR11 0x08
3795 #define _SCANHADR11 0x08
3796 #define _HADR12 0x10
3797 #define _SCANHADR12 0x10
3798 #define _HADR13 0x20
3799 #define _SCANHADR13 0x20
3800 #define _HADR14 0x40
3801 #define _SCANHADR14 0x40
3802 #define _HADR15 0x80
3803 #define _SCANHADR15 0x80
3805 //==============================================================================
3808 //==============================================================================
3811 extern __at(0x071C) __sfr SCANCON0
;
3821 unsigned INVALID
: 1;
3823 unsigned SCANGO
: 1;
3829 unsigned SCANMODE0
: 1;
3830 unsigned SCANMODE1
: 1;
3832 unsigned SCANINTM
: 1;
3833 unsigned SCANINVALID
: 1;
3834 unsigned SCANBUSY
: 1;
3836 unsigned SCANEN
: 1;
3847 unsigned SCANMODE
: 2;
3852 extern __at(0x071C) volatile __SCANCON0bits_t SCANCON0bits
;
3854 #define _SCANCON0_MODE0 0x01
3855 #define _SCANCON0_SCANMODE0 0x01
3856 #define _SCANCON0_MODE1 0x02
3857 #define _SCANCON0_SCANMODE1 0x02
3858 #define _SCANCON0_INTM 0x08
3859 #define _SCANCON0_SCANINTM 0x08
3860 #define _SCANCON0_INVALID 0x10
3861 #define _SCANCON0_SCANINVALID 0x10
3862 #define _SCANCON0_BUSY 0x20
3863 #define _SCANCON0_SCANBUSY 0x20
3864 #define _SCANCON0_SCANGO 0x40
3865 #define _SCANCON0_EN 0x80
3866 #define _SCANCON0_SCANEN 0x80
3868 //==============================================================================
3871 //==============================================================================
3874 extern __at(0x071D) __sfr SCANTRIG
;
3892 unsigned SCANTSEL0
: 1;
3893 unsigned SCANTSEL1
: 1;
3904 unsigned SCANTSEL
: 2;
3915 extern __at(0x071D) volatile __SCANTRIGbits_t SCANTRIGbits
;
3918 #define _SCANTSEL0 0x01
3920 #define _SCANTSEL1 0x02
3922 //==============================================================================
3924 extern __at(0x0791) __sfr CRCDAT
;
3926 //==============================================================================
3929 extern __at(0x0791) __sfr CRCDATL
;
3947 unsigned CRCDAT0
: 1;
3948 unsigned CRCDAT1
: 1;
3949 unsigned CRCDAT2
: 1;
3950 unsigned CRCDAT3
: 1;
3951 unsigned CRCDAT4
: 1;
3952 unsigned CRCDAT5
: 1;
3953 unsigned CRCDAT6
: 1;
3954 unsigned CRDCDAT7
: 1;
3959 unsigned CRCDAT
: 7;
3964 extern __at(0x0791) volatile __CRCDATLbits_t CRCDATLbits
;
3967 #define _CRCDAT0 0x01
3969 #define _CRCDAT1 0x02
3971 #define _CRCDAT2 0x04
3973 #define _CRCDAT3 0x08
3975 #define _CRCDAT4 0x10
3977 #define _CRCDAT5 0x20
3979 #define _CRCDAT6 0x40
3981 #define _CRDCDAT7 0x80
3983 //==============================================================================
3986 //==============================================================================
3989 extern __at(0x0792) __sfr CRCDATH
;
4007 unsigned CRCDAT8
: 1;
4008 unsigned CRCDAT9
: 1;
4009 unsigned CRCDAT10
: 1;
4010 unsigned CRCDAT11
: 1;
4011 unsigned CRCDAT12
: 1;
4012 unsigned CRCDAT13
: 1;
4013 unsigned CRCDAT14
: 1;
4014 unsigned CRCDAT15
: 1;
4018 extern __at(0x0792) volatile __CRCDATHbits_t CRCDATHbits
;
4021 #define _CRCDAT8 0x01
4023 #define _CRCDAT9 0x02
4025 #define _CRCDAT10 0x04
4027 #define _CRCDAT11 0x08
4029 #define _CRCDAT12 0x10
4031 #define _CRCDAT13 0x20
4033 #define _CRCDAT14 0x40
4035 #define _CRCDAT15 0x80
4037 //==============================================================================
4039 extern __at(0x0793) __sfr CRCACC
;
4041 //==============================================================================
4044 extern __at(0x0793) __sfr CRCACCL
;
4062 unsigned CRCACC0
: 1;
4063 unsigned CRCACC1
: 1;
4064 unsigned CRCACC2
: 1;
4065 unsigned CRCACC3
: 1;
4066 unsigned CRCACC4
: 1;
4067 unsigned CRCACC5
: 1;
4068 unsigned CRCACC6
: 1;
4069 unsigned CRCACC7
: 1;
4073 extern __at(0x0793) volatile __CRCACCLbits_t CRCACCLbits
;
4076 #define _CRCACC0 0x01
4078 #define _CRCACC1 0x02
4080 #define _CRCACC2 0x04
4082 #define _CRCACC3 0x08
4084 #define _CRCACC4 0x10
4086 #define _CRCACC5 0x20
4088 #define _CRCACC6 0x40
4090 #define _CRCACC7 0x80
4092 //==============================================================================
4095 //==============================================================================
4098 extern __at(0x0794) __sfr CRCACCH
;
4116 unsigned CRCACC8
: 1;
4117 unsigned CRCACC9
: 1;
4118 unsigned CRCACC10
: 1;
4119 unsigned CRCACC11
: 1;
4120 unsigned CRCACC12
: 1;
4121 unsigned CRCACC13
: 1;
4122 unsigned CRCACC14
: 1;
4123 unsigned CRCACC15
: 1;
4127 extern __at(0x0794) volatile __CRCACCHbits_t CRCACCHbits
;
4130 #define _CRCACC8 0x01
4132 #define _CRCACC9 0x02
4134 #define _CRCACC10 0x04
4136 #define _CRCACC11 0x08
4138 #define _CRCACC12 0x10
4140 #define _CRCACC13 0x20
4142 #define _CRCACC14 0x40
4144 #define _CRCACC15 0x80
4146 //==============================================================================
4148 extern __at(0x0795) __sfr CRCSHIFT
;
4150 //==============================================================================
4153 extern __at(0x0795) __sfr CRCSHIFTL
;
4159 unsigned SHIFT0
: 1;
4160 unsigned SHIFT1
: 1;
4161 unsigned SHIFT2
: 1;
4162 unsigned SHIFT3
: 1;
4163 unsigned SHIFT4
: 1;
4164 unsigned SHIFT5
: 1;
4165 unsigned SHIFT6
: 1;
4166 unsigned SHIFT7
: 1;
4171 unsigned CRCSHIFT0
: 1;
4172 unsigned CRCSHIFT1
: 1;
4173 unsigned CRCSHIFT2
: 1;
4174 unsigned CRCSHIFT3
: 1;
4175 unsigned CRCSHIFT4
: 1;
4176 unsigned CRCSHIFT5
: 1;
4177 unsigned CRCSHIFT6
: 1;
4178 unsigned CRCSHIFT7
: 1;
4180 } __CRCSHIFTLbits_t
;
4182 extern __at(0x0795) volatile __CRCSHIFTLbits_t CRCSHIFTLbits
;
4184 #define _SHIFT0 0x01
4185 #define _CRCSHIFT0 0x01
4186 #define _SHIFT1 0x02
4187 #define _CRCSHIFT1 0x02
4188 #define _SHIFT2 0x04
4189 #define _CRCSHIFT2 0x04
4190 #define _SHIFT3 0x08
4191 #define _CRCSHIFT3 0x08
4192 #define _SHIFT4 0x10
4193 #define _CRCSHIFT4 0x10
4194 #define _SHIFT5 0x20
4195 #define _CRCSHIFT5 0x20
4196 #define _SHIFT6 0x40
4197 #define _CRCSHIFT6 0x40
4198 #define _SHIFT7 0x80
4199 #define _CRCSHIFT7 0x80
4201 //==============================================================================
4204 //==============================================================================
4207 extern __at(0x0796) __sfr CRCSHIFTH
;
4213 unsigned SHIFT8
: 1;
4214 unsigned SHIFT9
: 1;
4215 unsigned SHIFT10
: 1;
4216 unsigned SHIFT11
: 1;
4217 unsigned SHIFT12
: 1;
4218 unsigned SHIFT13
: 1;
4219 unsigned SHIFT14
: 1;
4220 unsigned SHIFT15
: 1;
4225 unsigned CRCSHIFT8
: 1;
4226 unsigned CRCSHIFT9
: 1;
4227 unsigned CRCSHIFT10
: 1;
4228 unsigned CRCSHIFT11
: 1;
4229 unsigned CRCSHIFT12
: 1;
4230 unsigned CRCSHIFT13
: 1;
4231 unsigned CRCSHIFT14
: 1;
4232 unsigned CRCSHIFT15
: 1;
4234 } __CRCSHIFTHbits_t
;
4236 extern __at(0x0796) volatile __CRCSHIFTHbits_t CRCSHIFTHbits
;
4238 #define _SHIFT8 0x01
4239 #define _CRCSHIFT8 0x01
4240 #define _SHIFT9 0x02
4241 #define _CRCSHIFT9 0x02
4242 #define _SHIFT10 0x04
4243 #define _CRCSHIFT10 0x04
4244 #define _SHIFT11 0x08
4245 #define _CRCSHIFT11 0x08
4246 #define _SHIFT12 0x10
4247 #define _CRCSHIFT12 0x10
4248 #define _SHIFT13 0x20
4249 #define _CRCSHIFT13 0x20
4250 #define _SHIFT14 0x40
4251 #define _CRCSHIFT14 0x40
4252 #define _SHIFT15 0x80
4253 #define _CRCSHIFT15 0x80
4255 //==============================================================================
4257 extern __at(0x0797) __sfr CRCXOR
;
4259 //==============================================================================
4262 extern __at(0x0797) __sfr CRCXORL
;
4281 unsigned CRCXOR1
: 1;
4282 unsigned CRCXOR2
: 1;
4283 unsigned CRCXOR3
: 1;
4284 unsigned CRCXOR4
: 1;
4285 unsigned CRCXOR5
: 1;
4286 unsigned CRCXOR6
: 1;
4287 unsigned CRCXOR7
: 1;
4291 extern __at(0x0797) volatile __CRCXORLbits_t CRCXORLbits
;
4294 #define _CRCXOR1 0x02
4296 #define _CRCXOR2 0x04
4298 #define _CRCXOR3 0x08
4300 #define _CRCXOR4 0x10
4302 #define _CRCXOR5 0x20
4304 #define _CRCXOR6 0x40
4306 #define _CRCXOR7 0x80
4308 //==============================================================================
4311 //==============================================================================
4314 extern __at(0x0798) __sfr CRCXORH
;
4332 unsigned CRCXOR8
: 1;
4333 unsigned CRCXOR9
: 1;
4334 unsigned CRCXOR10
: 1;
4335 unsigned CRCXOR11
: 1;
4336 unsigned CRCXOR12
: 1;
4337 unsigned CRCXOR13
: 1;
4338 unsigned CRCXOR14
: 1;
4339 unsigned CRCXOR15
: 1;
4343 extern __at(0x0798) volatile __CRCXORHbits_t CRCXORHbits
;
4346 #define _CRCXOR8 0x01
4348 #define _CRCXOR9 0x02
4350 #define _CRCXOR10 0x04
4352 #define _CRCXOR11 0x08
4354 #define _CRCXOR12 0x10
4356 #define _CRCXOR13 0x20
4358 #define _CRCXOR14 0x40
4360 #define _CRCXOR15 0x80
4362 //==============================================================================
4365 //==============================================================================
4368 extern __at(0x0799) __sfr CRCCON0
;
4375 unsigned SHIFTM
: 1;
4386 unsigned CRCFULL
: 1;
4387 unsigned CRCSHIFTM
: 1;
4390 unsigned CRCACCM
: 1;
4391 unsigned CRCBUSY
: 1;
4397 extern __at(0x0799) volatile __CRCCON0bits_t CRCCON0bits
;
4399 #define _CRCCON0_FULL 0x01
4400 #define _CRCCON0_CRCFULL 0x01
4401 #define _CRCCON0_SHIFTM 0x02
4402 #define _CRCCON0_CRCSHIFTM 0x02
4403 #define _CRCCON0_ACCM 0x10
4404 #define _CRCCON0_CRCACCM 0x10
4405 #define _CRCCON0_BUSY 0x20
4406 #define _CRCCON0_CRCBUSY 0x20
4407 #define _CRCCON0_CRCGO 0x40
4408 #define _CRCCON0_EN 0x80
4409 #define _CRCCON0_CRCEN 0x80
4411 //==============================================================================
4414 //==============================================================================
4417 extern __at(0x079A) __sfr CRCCON1
;
4435 unsigned CRCPLEN0
: 1;
4436 unsigned CRCPLEN1
: 1;
4437 unsigned CRCPLEN2
: 1;
4438 unsigned CRCPLEN3
: 1;
4439 unsigned CRCDLEN0
: 1;
4440 unsigned CRCDLEN1
: 1;
4441 unsigned CRCDLEN2
: 1;
4442 unsigned CRCDLEN3
: 1;
4453 unsigned CRCPLEN
: 4;
4460 unsigned CRCDLEN
: 4;
4470 extern __at(0x079A) volatile __CRCCON1bits_t CRCCON1bits
;
4473 #define _CRCPLEN0 0x01
4475 #define _CRCPLEN1 0x02
4477 #define _CRCPLEN2 0x04
4479 #define _CRCPLEN3 0x08
4481 #define _CRCDLEN0 0x10
4483 #define _CRCDLEN1 0x20
4485 #define _CRCDLEN2 0x40
4487 #define _CRCDLEN3 0x80
4489 //==============================================================================
4491 extern __at(0x0D8C) __sfr SMT1TMR
;
4493 //==============================================================================
4496 extern __at(0x0D8C) __sfr SMT1TMRL
;
4500 unsigned SMT1TMR0
: 1;
4501 unsigned SMT1TMR1
: 1;
4502 unsigned SMT1TMR2
: 1;
4503 unsigned SMT1TMR3
: 1;
4504 unsigned SMT1TMR4
: 1;
4505 unsigned SMT1TMR5
: 1;
4506 unsigned SMT1TMR6
: 1;
4507 unsigned SMT1TMR7
: 1;
4510 extern __at(0x0D8C) volatile __SMT1TMRLbits_t SMT1TMRLbits
;
4512 #define _SMT1TMR0 0x01
4513 #define _SMT1TMR1 0x02
4514 #define _SMT1TMR2 0x04
4515 #define _SMT1TMR3 0x08
4516 #define _SMT1TMR4 0x10
4517 #define _SMT1TMR5 0x20
4518 #define _SMT1TMR6 0x40
4519 #define _SMT1TMR7 0x80
4521 //==============================================================================
4524 //==============================================================================
4527 extern __at(0x0D8D) __sfr SMT1TMRH
;
4531 unsigned SMT1TMR8
: 1;
4532 unsigned SMT1TMR9
: 1;
4533 unsigned SMT1TMR10
: 1;
4534 unsigned SMT1TMR11
: 1;
4535 unsigned SMT1TMR12
: 1;
4536 unsigned SMT1TMR13
: 1;
4537 unsigned SMT1TMR14
: 1;
4538 unsigned SMT1TMR15
: 1;
4541 extern __at(0x0D8D) volatile __SMT1TMRHbits_t SMT1TMRHbits
;
4543 #define _SMT1TMR8 0x01
4544 #define _SMT1TMR9 0x02
4545 #define _SMT1TMR10 0x04
4546 #define _SMT1TMR11 0x08
4547 #define _SMT1TMR12 0x10
4548 #define _SMT1TMR13 0x20
4549 #define _SMT1TMR14 0x40
4550 #define _SMT1TMR15 0x80
4552 //==============================================================================
4555 //==============================================================================
4558 extern __at(0x0D8E) __sfr SMT1TMRU
;
4562 unsigned SMT1TMR16
: 1;
4563 unsigned SMT1TMR17
: 1;
4564 unsigned SMT1TMR18
: 1;
4565 unsigned SMT1TMR19
: 1;
4566 unsigned SMT1TMR20
: 1;
4567 unsigned SMT1TMR21
: 1;
4568 unsigned SMT1TMR22
: 1;
4569 unsigned SMT1TMR23
: 1;
4572 extern __at(0x0D8E) volatile __SMT1TMRUbits_t SMT1TMRUbits
;
4574 #define _SMT1TMR16 0x01
4575 #define _SMT1TMR17 0x02
4576 #define _SMT1TMR18 0x04
4577 #define _SMT1TMR19 0x08
4578 #define _SMT1TMR20 0x10
4579 #define _SMT1TMR21 0x20
4580 #define _SMT1TMR22 0x40
4581 #define _SMT1TMR23 0x80
4583 //==============================================================================
4585 extern __at(0x0D8F) __sfr SMT1CPR
;
4587 //==============================================================================
4590 extern __at(0x0D8F) __sfr SMT1CPRL
;
4594 unsigned SMT1CPR0
: 1;
4595 unsigned SMT1CPR1
: 1;
4596 unsigned SMT1CPR2
: 1;
4597 unsigned SMT1CPR3
: 1;
4598 unsigned SMT1CPR4
: 1;
4599 unsigned SMT1CPR5
: 1;
4600 unsigned SMT1CPR6
: 1;
4601 unsigned SMT1CPR7
: 1;
4604 extern __at(0x0D8F) volatile __SMT1CPRLbits_t SMT1CPRLbits
;
4606 #define _SMT1CPR0 0x01
4607 #define _SMT1CPR1 0x02
4608 #define _SMT1CPR2 0x04
4609 #define _SMT1CPR3 0x08
4610 #define _SMT1CPR4 0x10
4611 #define _SMT1CPR5 0x20
4612 #define _SMT1CPR6 0x40
4613 #define _SMT1CPR7 0x80
4615 //==============================================================================
4618 //==============================================================================
4621 extern __at(0x0D90) __sfr SMT1CPRH
;
4625 unsigned SMT1CPR8
: 1;
4626 unsigned SMT1CPR9
: 1;
4627 unsigned SMT1CPR10
: 1;
4628 unsigned SMT1CPR11
: 1;
4629 unsigned SMT1CPR12
: 1;
4630 unsigned SMT1CPR13
: 1;
4631 unsigned SMT1CPR14
: 1;
4632 unsigned SMT1CPR15
: 1;
4635 extern __at(0x0D90) volatile __SMT1CPRHbits_t SMT1CPRHbits
;
4637 #define _SMT1CPR8 0x01
4638 #define _SMT1CPR9 0x02
4639 #define _SMT1CPR10 0x04
4640 #define _SMT1CPR11 0x08
4641 #define _SMT1CPR12 0x10
4642 #define _SMT1CPR13 0x20
4643 #define _SMT1CPR14 0x40
4644 #define _SMT1CPR15 0x80
4646 //==============================================================================
4649 //==============================================================================
4652 extern __at(0x0D91) __sfr SMT1CPRU
;
4656 unsigned SMT1CPR16
: 1;
4657 unsigned SMT1CPR17
: 1;
4658 unsigned SMT1CPR18
: 1;
4659 unsigned SMT1CPR19
: 1;
4660 unsigned SMT1CPR20
: 1;
4661 unsigned SMT1CPR21
: 1;
4662 unsigned SMT1CPR22
: 1;
4663 unsigned SMT1CPR23
: 1;
4666 extern __at(0x0D91) volatile __SMT1CPRUbits_t SMT1CPRUbits
;
4668 #define _SMT1CPR16 0x01
4669 #define _SMT1CPR17 0x02
4670 #define _SMT1CPR18 0x04
4671 #define _SMT1CPR19 0x08
4672 #define _SMT1CPR20 0x10
4673 #define _SMT1CPR21 0x20
4674 #define _SMT1CPR22 0x40
4675 #define _SMT1CPR23 0x80
4677 //==============================================================================
4679 extern __at(0x0D92) __sfr SMT1CPW
;
4681 //==============================================================================
4684 extern __at(0x0D92) __sfr SMT1CPWL
;
4688 unsigned SMT1CPW0
: 1;
4689 unsigned SMT1CPW1
: 1;
4690 unsigned SMT1CPW2
: 1;
4691 unsigned SMT1CPW3
: 1;
4692 unsigned SMT1CPW4
: 1;
4693 unsigned SMT1CPW5
: 1;
4694 unsigned SMT1CPW6
: 1;
4695 unsigned SMT1CPW7
: 1;
4698 extern __at(0x0D92) volatile __SMT1CPWLbits_t SMT1CPWLbits
;
4700 #define _SMT1CPW0 0x01
4701 #define _SMT1CPW1 0x02
4702 #define _SMT1CPW2 0x04
4703 #define _SMT1CPW3 0x08
4704 #define _SMT1CPW4 0x10
4705 #define _SMT1CPW5 0x20
4706 #define _SMT1CPW6 0x40
4707 #define _SMT1CPW7 0x80
4709 //==============================================================================
4712 //==============================================================================
4715 extern __at(0x0D93) __sfr SMT1CPWH
;
4719 unsigned SMT1CPW8
: 1;
4720 unsigned SMT1CPW9
: 1;
4721 unsigned SMT1CPW10
: 1;
4722 unsigned SMT1CPW11
: 1;
4723 unsigned SMT1CPW12
: 1;
4724 unsigned SMT1CPW13
: 1;
4725 unsigned SMT1CPW14
: 1;
4726 unsigned SMT1CPW15
: 1;
4729 extern __at(0x0D93) volatile __SMT1CPWHbits_t SMT1CPWHbits
;
4731 #define _SMT1CPW8 0x01
4732 #define _SMT1CPW9 0x02
4733 #define _SMT1CPW10 0x04
4734 #define _SMT1CPW11 0x08
4735 #define _SMT1CPW12 0x10
4736 #define _SMT1CPW13 0x20
4737 #define _SMT1CPW14 0x40
4738 #define _SMT1CPW15 0x80
4740 //==============================================================================
4743 //==============================================================================
4746 extern __at(0x0D94) __sfr SMT1CPWU
;
4750 unsigned SMT1CPW16
: 1;
4751 unsigned SMT1CPW17
: 1;
4752 unsigned SMT1CPW18
: 1;
4753 unsigned SMT1CPW19
: 1;
4754 unsigned SMT1CPW20
: 1;
4755 unsigned SMT1CPW21
: 1;
4756 unsigned SMT1CPW22
: 1;
4757 unsigned SMT1CPW23
: 1;
4760 extern __at(0x0D94) volatile __SMT1CPWUbits_t SMT1CPWUbits
;
4762 #define _SMT1CPW16 0x01
4763 #define _SMT1CPW17 0x02
4764 #define _SMT1CPW18 0x04
4765 #define _SMT1CPW19 0x08
4766 #define _SMT1CPW20 0x10
4767 #define _SMT1CPW21 0x20
4768 #define _SMT1CPW22 0x40
4769 #define _SMT1CPW23 0x80
4771 //==============================================================================
4773 extern __at(0x0D95) __sfr SMT1PR
;
4775 //==============================================================================
4778 extern __at(0x0D95) __sfr SMT1PRL
;
4782 unsigned SMT1PR0
: 1;
4783 unsigned SMT1PR1
: 1;
4784 unsigned SMT1PR2
: 1;
4785 unsigned SMT1PR3
: 1;
4786 unsigned SMT1PR4
: 1;
4787 unsigned SMT1PR5
: 1;
4788 unsigned SMT1PR6
: 1;
4789 unsigned SMT1PR7
: 1;
4792 extern __at(0x0D95) volatile __SMT1PRLbits_t SMT1PRLbits
;
4794 #define _SMT1PR0 0x01
4795 #define _SMT1PR1 0x02
4796 #define _SMT1PR2 0x04
4797 #define _SMT1PR3 0x08
4798 #define _SMT1PR4 0x10
4799 #define _SMT1PR5 0x20
4800 #define _SMT1PR6 0x40
4801 #define _SMT1PR7 0x80
4803 //==============================================================================
4806 //==============================================================================
4809 extern __at(0x0D96) __sfr SMT1PRH
;
4813 unsigned SMT1PR8
: 1;
4814 unsigned SMT1PR9
: 1;
4815 unsigned SMT1PR10
: 1;
4816 unsigned SMT1PR11
: 1;
4817 unsigned SMT1PR12
: 1;
4818 unsigned SMT1PR13
: 1;
4819 unsigned SMT1PR14
: 1;
4820 unsigned SMT1PR15
: 1;
4823 extern __at(0x0D96) volatile __SMT1PRHbits_t SMT1PRHbits
;
4825 #define _SMT1PR8 0x01
4826 #define _SMT1PR9 0x02
4827 #define _SMT1PR10 0x04
4828 #define _SMT1PR11 0x08
4829 #define _SMT1PR12 0x10
4830 #define _SMT1PR13 0x20
4831 #define _SMT1PR14 0x40
4832 #define _SMT1PR15 0x80
4834 //==============================================================================
4837 //==============================================================================
4840 extern __at(0x0D97) __sfr SMT1PRU
;
4844 unsigned SMT1PR16
: 1;
4845 unsigned SMT1PR17
: 1;
4846 unsigned SMT1PR18
: 1;
4847 unsigned SMT1PR19
: 1;
4848 unsigned SMT1PR20
: 1;
4849 unsigned SMT1PR21
: 1;
4850 unsigned SMT1PR22
: 1;
4851 unsigned SMT1PR23
: 1;
4854 extern __at(0x0D97) volatile __SMT1PRUbits_t SMT1PRUbits
;
4856 #define _SMT1PR16 0x01
4857 #define _SMT1PR17 0x02
4858 #define _SMT1PR18 0x04
4859 #define _SMT1PR19 0x08
4860 #define _SMT1PR20 0x10
4861 #define _SMT1PR21 0x20
4862 #define _SMT1PR22 0x40
4863 #define _SMT1PR23 0x80
4865 //==============================================================================
4868 //==============================================================================
4871 extern __at(0x0D98) __sfr SMT1CON0
;
4877 unsigned SMT1PS0
: 1;
4878 unsigned SMT1PS1
: 1;
4889 unsigned SMT1PS
: 2;
4894 extern __at(0x0D98) volatile __SMT1CON0bits_t SMT1CON0bits
;
4896 #define _SMT1CON0_SMT1PS0 0x01
4897 #define _SMT1CON0_SMT1PS1 0x02
4898 #define _SMT1CON0_CPOL 0x04
4899 #define _SMT1CON0_SPOL 0x08
4900 #define _SMT1CON0_WPOL 0x10
4901 #define _SMT1CON0_STP 0x20
4902 #define _SMT1CON0_EN 0x80
4904 //==============================================================================
4907 //==============================================================================
4910 extern __at(0x0D99) __sfr SMT1CON1
;
4922 unsigned REPEAT
: 1;
4923 unsigned SMT1GO
: 1;
4928 unsigned SMT1MODE0
: 1;
4929 unsigned SMT1MODE1
: 1;
4930 unsigned SMT1MODE2
: 1;
4931 unsigned SMT1MODE3
: 1;
4934 unsigned SMT1REPEAT
: 1;
4940 unsigned SMT1MODE
: 4;
4951 extern __at(0x0D99) volatile __SMT1CON1bits_t SMT1CON1bits
;
4953 #define _SMT1CON1_MODE0 0x01
4954 #define _SMT1CON1_SMT1MODE0 0x01
4955 #define _SMT1CON1_MODE1 0x02
4956 #define _SMT1CON1_SMT1MODE1 0x02
4957 #define _SMT1CON1_MODE2 0x04
4958 #define _SMT1CON1_SMT1MODE2 0x04
4959 #define _SMT1CON1_MODE3 0x08
4960 #define _SMT1CON1_SMT1MODE3 0x08
4961 #define _SMT1CON1_REPEAT 0x40
4962 #define _SMT1CON1_SMT1REPEAT 0x40
4963 #define _SMT1CON1_SMT1GO 0x80
4965 //==============================================================================
4968 //==============================================================================
4971 extern __at(0x0D9A) __sfr SMT1STAT
;
4989 unsigned SMT1AS
: 1;
4990 unsigned SMT1WS
: 1;
4991 unsigned SMT1TS
: 1;
4994 unsigned SMT1RESET
: 1;
4995 unsigned SMT1CPWUP
: 1;
4996 unsigned SMT1CPRUP
: 1;
5000 extern __at(0x0D9A) volatile __SMT1STATbits_t SMT1STATbits
;
5003 #define _SMT1AS 0x01
5005 #define _SMT1WS 0x02
5007 #define _SMT1TS 0x04
5009 #define _SMT1RESET 0x20
5011 #define _SMT1CPWUP 0x40
5013 #define _SMT1CPRUP 0x80
5015 //==============================================================================
5018 //==============================================================================
5021 extern __at(0x0D9B) __sfr SMT1CLK
;
5039 unsigned SMT1CSEL0
: 1;
5040 unsigned SMT1CSEL1
: 1;
5041 unsigned SMT1CSEL2
: 1;
5057 unsigned SMT1CSEL
: 3;
5062 extern __at(0x0D9B) volatile __SMT1CLKbits_t SMT1CLKbits
;
5065 #define _SMT1CSEL0 0x01
5067 #define _SMT1CSEL1 0x02
5069 #define _SMT1CSEL2 0x04
5071 //==============================================================================
5074 //==============================================================================
5077 extern __at(0x0D9C) __sfr SMT1SIG
;
5095 unsigned SMT1SSEL0
: 1;
5096 unsigned SMT1SSEL1
: 1;
5097 unsigned SMT1SSEL2
: 1;
5113 unsigned SMT1SSEL
: 3;
5118 extern __at(0x0D9C) volatile __SMT1SIGbits_t SMT1SIGbits
;
5121 #define _SMT1SSEL0 0x01
5123 #define _SMT1SSEL1 0x02
5125 #define _SMT1SSEL2 0x04
5127 //==============================================================================
5130 //==============================================================================
5133 extern __at(0x0D9D) __sfr SMT1WIN
;
5151 unsigned SMT1WSEL0
: 1;
5152 unsigned SMT1WSEL1
: 1;
5153 unsigned SMT1WSEL2
: 1;
5154 unsigned SMT1WSEL3
: 1;
5163 unsigned SMT1WSEL
: 4;
5174 extern __at(0x0D9D) volatile __SMT1WINbits_t SMT1WINbits
;
5177 #define _SMT1WSEL0 0x01
5179 #define _SMT1WSEL1 0x02
5181 #define _SMT1WSEL2 0x04
5183 #define _SMT1WSEL3 0x08
5185 //==============================================================================
5187 extern __at(0x0D9E) __sfr SMT2TMR
;
5189 //==============================================================================
5192 extern __at(0x0D9E) __sfr SMT2TMRL
;
5196 unsigned SMT2TMR0
: 1;
5197 unsigned SMT2TMR1
: 1;
5198 unsigned SMT2TMR2
: 1;
5199 unsigned SMT2TMR3
: 1;
5200 unsigned SMT2TMR4
: 1;
5201 unsigned SMT2TMR5
: 1;
5202 unsigned SMT2TMR6
: 1;
5203 unsigned SMT2TMR7
: 1;
5206 extern __at(0x0D9E) volatile __SMT2TMRLbits_t SMT2TMRLbits
;
5208 #define _SMT2TMR0 0x01
5209 #define _SMT2TMR1 0x02
5210 #define _SMT2TMR2 0x04
5211 #define _SMT2TMR3 0x08
5212 #define _SMT2TMR4 0x10
5213 #define _SMT2TMR5 0x20
5214 #define _SMT2TMR6 0x40
5215 #define _SMT2TMR7 0x80
5217 //==============================================================================
5220 //==============================================================================
5223 extern __at(0x0D9F) __sfr SMT2TMRH
;
5227 unsigned SMT2TMR8
: 1;
5228 unsigned SMT2TMR9
: 1;
5229 unsigned SMT2TMR10
: 1;
5230 unsigned SMT2TMR11
: 1;
5231 unsigned SMT2TMR12
: 1;
5232 unsigned SMT2TMR13
: 1;
5233 unsigned SMT2TMR14
: 1;
5234 unsigned SMT2TMR15
: 1;
5237 extern __at(0x0D9F) volatile __SMT2TMRHbits_t SMT2TMRHbits
;
5239 #define _SMT2TMR8 0x01
5240 #define _SMT2TMR9 0x02
5241 #define _SMT2TMR10 0x04
5242 #define _SMT2TMR11 0x08
5243 #define _SMT2TMR12 0x10
5244 #define _SMT2TMR13 0x20
5245 #define _SMT2TMR14 0x40
5246 #define _SMT2TMR15 0x80
5248 //==============================================================================
5251 //==============================================================================
5254 extern __at(0x0DA0) __sfr SMT2TMRU
;
5258 unsigned SMT2TMR16
: 1;
5259 unsigned SMT2TMR17
: 1;
5260 unsigned SMT2TMR18
: 1;
5261 unsigned SMT2TMR19
: 1;
5262 unsigned SMT2TMR20
: 1;
5263 unsigned SMT2TMR21
: 1;
5264 unsigned SMT2TMR22
: 1;
5265 unsigned SMT2TMR23
: 1;
5268 extern __at(0x0DA0) volatile __SMT2TMRUbits_t SMT2TMRUbits
;
5270 #define _SMT2TMR16 0x01
5271 #define _SMT2TMR17 0x02
5272 #define _SMT2TMR18 0x04
5273 #define _SMT2TMR19 0x08
5274 #define _SMT2TMR20 0x10
5275 #define _SMT2TMR21 0x20
5276 #define _SMT2TMR22 0x40
5277 #define _SMT2TMR23 0x80
5279 //==============================================================================
5281 extern __at(0x0DA1) __sfr SMT2CPR
;
5283 //==============================================================================
5286 extern __at(0x0DA1) __sfr SMT2CPRL
;
5290 unsigned SMT2CPR0
: 1;
5291 unsigned SMT2CPR1
: 1;
5292 unsigned SMT2CPR2
: 1;
5293 unsigned SMT2CPR3
: 1;
5294 unsigned SMT2CPR4
: 1;
5295 unsigned SMT2CPR5
: 1;
5296 unsigned SMT2CPR6
: 1;
5297 unsigned SMT2CPR7
: 1;
5300 extern __at(0x0DA1) volatile __SMT2CPRLbits_t SMT2CPRLbits
;
5302 #define _SMT2CPR0 0x01
5303 #define _SMT2CPR1 0x02
5304 #define _SMT2CPR2 0x04
5305 #define _SMT2CPR3 0x08
5306 #define _SMT2CPR4 0x10
5307 #define _SMT2CPR5 0x20
5308 #define _SMT2CPR6 0x40
5309 #define _SMT2CPR7 0x80
5311 //==============================================================================
5314 //==============================================================================
5317 extern __at(0x0DA2) __sfr SMT2CPRH
;
5321 unsigned SMT2CPR8
: 1;
5322 unsigned SMT2CPR9
: 1;
5323 unsigned SMT2CPR10
: 1;
5324 unsigned SMT2CPR11
: 1;
5325 unsigned SMT2CPR12
: 1;
5326 unsigned SMT2CPR13
: 1;
5327 unsigned SMT2CPR14
: 1;
5328 unsigned SMT2CPR15
: 1;
5331 extern __at(0x0DA2) volatile __SMT2CPRHbits_t SMT2CPRHbits
;
5333 #define _SMT2CPR8 0x01
5334 #define _SMT2CPR9 0x02
5335 #define _SMT2CPR10 0x04
5336 #define _SMT2CPR11 0x08
5337 #define _SMT2CPR12 0x10
5338 #define _SMT2CPR13 0x20
5339 #define _SMT2CPR14 0x40
5340 #define _SMT2CPR15 0x80
5342 //==============================================================================
5345 //==============================================================================
5348 extern __at(0x0DA3) __sfr SMT2CPRU
;
5352 unsigned SMT2CPR16
: 1;
5353 unsigned SMT2CPR17
: 1;
5354 unsigned SMT2CPR18
: 1;
5355 unsigned SMT2CPR19
: 1;
5356 unsigned SMT2CPR20
: 1;
5357 unsigned SMT2CPR21
: 1;
5358 unsigned SMT2CPR22
: 1;
5359 unsigned SMT2CPR23
: 1;
5362 extern __at(0x0DA3) volatile __SMT2CPRUbits_t SMT2CPRUbits
;
5364 #define _SMT2CPR16 0x01
5365 #define _SMT2CPR17 0x02
5366 #define _SMT2CPR18 0x04
5367 #define _SMT2CPR19 0x08
5368 #define _SMT2CPR20 0x10
5369 #define _SMT2CPR21 0x20
5370 #define _SMT2CPR22 0x40
5371 #define _SMT2CPR23 0x80
5373 //==============================================================================
5375 extern __at(0x0DA4) __sfr SMT2CPW
;
5377 //==============================================================================
5380 extern __at(0x0DA4) __sfr SMT2CPWL
;
5384 unsigned SMT2CPW0
: 1;
5385 unsigned SMT2CPW1
: 1;
5386 unsigned SMT2CPW2
: 1;
5387 unsigned SMT2CPW3
: 1;
5388 unsigned SMT2CPW4
: 1;
5389 unsigned SMT2CPW5
: 1;
5390 unsigned SMT2CPW6
: 1;
5391 unsigned SMT2CPW7
: 1;
5394 extern __at(0x0DA4) volatile __SMT2CPWLbits_t SMT2CPWLbits
;
5396 #define _SMT2CPW0 0x01
5397 #define _SMT2CPW1 0x02
5398 #define _SMT2CPW2 0x04
5399 #define _SMT2CPW3 0x08
5400 #define _SMT2CPW4 0x10
5401 #define _SMT2CPW5 0x20
5402 #define _SMT2CPW6 0x40
5403 #define _SMT2CPW7 0x80
5405 //==============================================================================
5408 //==============================================================================
5411 extern __at(0x0DA5) __sfr SMT2CPWH
;
5415 unsigned SMT2CPW8
: 1;
5416 unsigned SMT2CPW9
: 1;
5417 unsigned SMT2CPW10
: 1;
5418 unsigned SMT2CPW11
: 1;
5419 unsigned SMT2CPW12
: 1;
5420 unsigned SMT2CPW13
: 1;
5421 unsigned SMT2CPW14
: 1;
5422 unsigned SMT2CPW15
: 1;
5425 extern __at(0x0DA5) volatile __SMT2CPWHbits_t SMT2CPWHbits
;
5427 #define _SMT2CPW8 0x01
5428 #define _SMT2CPW9 0x02
5429 #define _SMT2CPW10 0x04
5430 #define _SMT2CPW11 0x08
5431 #define _SMT2CPW12 0x10
5432 #define _SMT2CPW13 0x20
5433 #define _SMT2CPW14 0x40
5434 #define _SMT2CPW15 0x80
5436 //==============================================================================
5439 //==============================================================================
5442 extern __at(0x0DA6) __sfr SMT2CPWU
;
5446 unsigned SMT2CPW16
: 1;
5447 unsigned SMT2CPW17
: 1;
5448 unsigned SMT2CPW18
: 1;
5449 unsigned SMT2CPW19
: 1;
5450 unsigned SMT2CPW20
: 1;
5451 unsigned SMT2CPW21
: 1;
5452 unsigned SMT2CPW22
: 1;
5453 unsigned SMT2CPW23
: 1;
5456 extern __at(0x0DA6) volatile __SMT2CPWUbits_t SMT2CPWUbits
;
5458 #define _SMT2CPW16 0x01
5459 #define _SMT2CPW17 0x02
5460 #define _SMT2CPW18 0x04
5461 #define _SMT2CPW19 0x08
5462 #define _SMT2CPW20 0x10
5463 #define _SMT2CPW21 0x20
5464 #define _SMT2CPW22 0x40
5465 #define _SMT2CPW23 0x80
5467 //==============================================================================
5469 extern __at(0x0DA7) __sfr SMT2PR
;
5471 //==============================================================================
5474 extern __at(0x0DA7) __sfr SMT2PRL
;
5478 unsigned SMT2PR0
: 1;
5479 unsigned SMT2PR1
: 1;
5480 unsigned SMT2PR2
: 1;
5481 unsigned SMT2PR3
: 1;
5482 unsigned SMT2PR4
: 1;
5483 unsigned SMT2PR5
: 1;
5484 unsigned SMT2PR6
: 1;
5485 unsigned SMT2PR7
: 1;
5488 extern __at(0x0DA7) volatile __SMT2PRLbits_t SMT2PRLbits
;
5490 #define _SMT2PR0 0x01
5491 #define _SMT2PR1 0x02
5492 #define _SMT2PR2 0x04
5493 #define _SMT2PR3 0x08
5494 #define _SMT2PR4 0x10
5495 #define _SMT2PR5 0x20
5496 #define _SMT2PR6 0x40
5497 #define _SMT2PR7 0x80
5499 //==============================================================================
5502 //==============================================================================
5505 extern __at(0x0DA8) __sfr SMT2PRH
;
5509 unsigned SMT2PR8
: 1;
5510 unsigned SMT2PR9
: 1;
5511 unsigned SMT2PR10
: 1;
5512 unsigned SMT2PR11
: 1;
5513 unsigned SMT2PR12
: 1;
5514 unsigned SMT2PR13
: 1;
5515 unsigned SMT2PR14
: 1;
5516 unsigned SMT2PR15
: 1;
5519 extern __at(0x0DA8) volatile __SMT2PRHbits_t SMT2PRHbits
;
5521 #define _SMT2PR8 0x01
5522 #define _SMT2PR9 0x02
5523 #define _SMT2PR10 0x04
5524 #define _SMT2PR11 0x08
5525 #define _SMT2PR12 0x10
5526 #define _SMT2PR13 0x20
5527 #define _SMT2PR14 0x40
5528 #define _SMT2PR15 0x80
5530 //==============================================================================
5533 //==============================================================================
5536 extern __at(0x0DA9) __sfr SMT2PRU
;
5540 unsigned SMT2PR16
: 1;
5541 unsigned SMT2PR17
: 1;
5542 unsigned SMT2PR18
: 1;
5543 unsigned SMT2PR19
: 1;
5544 unsigned SMT2PR20
: 1;
5545 unsigned SMT2PR21
: 1;
5546 unsigned SMT2PR22
: 1;
5547 unsigned SMT2PR23
: 1;
5550 extern __at(0x0DA9) volatile __SMT2PRUbits_t SMT2PRUbits
;
5552 #define _SMT2PR16 0x01
5553 #define _SMT2PR17 0x02
5554 #define _SMT2PR18 0x04
5555 #define _SMT2PR19 0x08
5556 #define _SMT2PR20 0x10
5557 #define _SMT2PR21 0x20
5558 #define _SMT2PR22 0x40
5559 #define _SMT2PR23 0x80
5561 //==============================================================================
5564 //==============================================================================
5567 extern __at(0x0DAA) __sfr SMT2CON0
;
5573 unsigned SMT2PS0
: 1;
5574 unsigned SMT2PS1
: 1;
5585 unsigned SMT2PS
: 2;
5590 extern __at(0x0DAA) volatile __SMT2CON0bits_t SMT2CON0bits
;
5592 #define _SMT2CON0_SMT2PS0 0x01
5593 #define _SMT2CON0_SMT2PS1 0x02
5594 #define _SMT2CON0_CPOL 0x04
5595 #define _SMT2CON0_SPOL 0x08
5596 #define _SMT2CON0_WPOL 0x10
5597 #define _SMT2CON0_STP 0x20
5598 #define _SMT2CON0_EN 0x80
5600 //==============================================================================
5603 //==============================================================================
5606 extern __at(0x0DAB) __sfr SMT2CON1
;
5618 unsigned REPEAT
: 1;
5619 unsigned SMT2GO
: 1;
5624 unsigned SMT2MODE0
: 1;
5625 unsigned SMT2MODE1
: 1;
5626 unsigned SMT2MODE2
: 1;
5627 unsigned SMT2MODE3
: 1;
5630 unsigned SMT2REPEAT
: 1;
5636 unsigned SMT2MODE
: 4;
5647 extern __at(0x0DAB) volatile __SMT2CON1bits_t SMT2CON1bits
;
5649 #define _SMT2CON1_MODE0 0x01
5650 #define _SMT2CON1_SMT2MODE0 0x01
5651 #define _SMT2CON1_MODE1 0x02
5652 #define _SMT2CON1_SMT2MODE1 0x02
5653 #define _SMT2CON1_MODE2 0x04
5654 #define _SMT2CON1_SMT2MODE2 0x04
5655 #define _SMT2CON1_MODE3 0x08
5656 #define _SMT2CON1_SMT2MODE3 0x08
5657 #define _SMT2CON1_REPEAT 0x40
5658 #define _SMT2CON1_SMT2REPEAT 0x40
5659 #define _SMT2CON1_SMT2GO 0x80
5661 //==============================================================================
5664 //==============================================================================
5667 extern __at(0x0DAC) __sfr SMT2STAT
;
5685 unsigned SMT2AS
: 1;
5686 unsigned SMT2WS
: 1;
5687 unsigned SMT2TS
: 1;
5690 unsigned SMT2RESET
: 1;
5691 unsigned SMT2CPWUP
: 1;
5692 unsigned SMT2CPRUP
: 1;
5696 extern __at(0x0DAC) volatile __SMT2STATbits_t SMT2STATbits
;
5698 #define _SMT2STAT_AS 0x01
5699 #define _SMT2STAT_SMT2AS 0x01
5700 #define _SMT2STAT_WS 0x02
5701 #define _SMT2STAT_SMT2WS 0x02
5702 #define _SMT2STAT_TS 0x04
5703 #define _SMT2STAT_SMT2TS 0x04
5704 #define _SMT2STAT_RST 0x20
5705 #define _SMT2STAT_SMT2RESET 0x20
5706 #define _SMT2STAT_CPWUP 0x40
5707 #define _SMT2STAT_SMT2CPWUP 0x40
5708 #define _SMT2STAT_CPRUP 0x80
5709 #define _SMT2STAT_SMT2CPRUP 0x80
5711 //==============================================================================
5714 //==============================================================================
5717 extern __at(0x0DAD) __sfr SMT2CLK
;
5735 unsigned SMT2CSEL0
: 1;
5736 unsigned SMT2CSEL1
: 1;
5737 unsigned SMT2CSEL2
: 1;
5747 unsigned SMT2CSEL
: 3;
5758 extern __at(0x0DAD) volatile __SMT2CLKbits_t SMT2CLKbits
;
5760 #define _SMT2CLK_CSEL0 0x01
5761 #define _SMT2CLK_SMT2CSEL0 0x01
5762 #define _SMT2CLK_CSEL1 0x02
5763 #define _SMT2CLK_SMT2CSEL1 0x02
5764 #define _SMT2CLK_CSEL2 0x04
5765 #define _SMT2CLK_SMT2CSEL2 0x04
5767 //==============================================================================
5770 //==============================================================================
5773 extern __at(0x0DAE) __sfr SMT2SIG
;
5791 unsigned SMT2SSEL0
: 1;
5792 unsigned SMT2SSEL1
: 1;
5793 unsigned SMT2SSEL2
: 1;
5803 unsigned SMT2SSEL
: 3;
5814 extern __at(0x0DAE) volatile __SMT2SIGbits_t SMT2SIGbits
;
5816 #define _SMT2SIG_SSEL0 0x01
5817 #define _SMT2SIG_SMT2SSEL0 0x01
5818 #define _SMT2SIG_SSEL1 0x02
5819 #define _SMT2SIG_SMT2SSEL1 0x02
5820 #define _SMT2SIG_SSEL2 0x04
5821 #define _SMT2SIG_SMT2SSEL2 0x04
5823 //==============================================================================
5826 //==============================================================================
5829 extern __at(0x0DAF) __sfr SMT2WIN
;
5847 unsigned SMT2WSEL0
: 1;
5848 unsigned SMT2WSEL1
: 1;
5849 unsigned SMT2WSEL2
: 1;
5850 unsigned SMT2WSEL3
: 1;
5859 unsigned SMT2WSEL
: 4;
5870 extern __at(0x0DAF) volatile __SMT2WINbits_t SMT2WINbits
;
5872 #define _SMT2WIN_WSEL0 0x01
5873 #define _SMT2WIN_SMT2WSEL0 0x01
5874 #define _SMT2WIN_WSEL1 0x02
5875 #define _SMT2WIN_SMT2WSEL1 0x02
5876 #define _SMT2WIN_WSEL2 0x04
5877 #define _SMT2WIN_SMT2WSEL2 0x04
5878 #define _SMT2WIN_WSEL3 0x08
5879 #define _SMT2WIN_SMT2WSEL3 0x08
5881 //==============================================================================
5884 //==============================================================================
5887 extern __at(0x0FE4) __sfr STATUS_SHAD
;
5891 unsigned C_SHAD
: 1;
5892 unsigned DC_SHAD
: 1;
5893 unsigned Z_SHAD
: 1;
5899 } __STATUS_SHADbits_t
;
5901 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
5903 #define _C_SHAD 0x01
5904 #define _DC_SHAD 0x02
5905 #define _Z_SHAD 0x04
5907 //==============================================================================
5909 extern __at(0x0FE5) __sfr WREG_SHAD
;
5910 extern __at(0x0FE6) __sfr BSR_SHAD
;
5911 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
5912 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
5913 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
5914 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
5915 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
5916 extern __at(0x0FED) __sfr STKPTR
;
5917 extern __at(0x0FEE) __sfr TOSL
;
5918 extern __at(0x0FEF) __sfr TOSH
;
5920 //==============================================================================
5922 // Configuration Bits
5924 //==============================================================================
5926 #define _CONFIG1 0x8007
5927 #define _CONFIG2 0x8008
5928 #define _CONFIG3 0x8009
5930 //----------------------------- CONFIG1 Options -------------------------------
5932 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
5933 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
5934 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
5935 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
5936 #define _PWRTE_ON 0x3FDF // PWRT enabled.
5937 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
5938 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
5939 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
5940 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
5941 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
5942 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
5943 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
5944 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
5945 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
5946 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
5947 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
5949 //----------------------------- CONFIG2 Options -------------------------------
5951 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
5952 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
5953 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
5954 #define _WRT_OFF 0x3FFF // Write protection off.
5955 #define _ZCD_ON 0x3F7F // ZCD always enabled.
5956 #define _ZCD_OFF 0x3FFF // ZCD disable. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON.
5957 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
5958 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
5959 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
5960 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
5961 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
5962 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
5963 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
5964 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
5965 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
5966 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
5967 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
5968 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
5970 //----------------------------- CONFIG3 Options -------------------------------
5972 #define _WDTCPS_WDTCPS0 0x3FE0 // 1:32 (1 ms period).
5973 #define _WDTCPS_WDTCPS1 0x3FE1 // 1:64 (2 ms period).
5974 #define _WDTCPS_WDTCPS2 0x3FE2 // 1:128 (4 ms period).
5975 #define _WDTCPS_WDTCPS3 0x3FE3 // 1:256 (8 ms period).
5976 #define _WDTCPS_WDTCPS4 0x3FE4 // 1:512 (16 ms period).
5977 #define _WDTCPS_WDTCPS5 0x3FE5 // 1:1024 (32 ms period).
5978 #define _WDTCPS_WDTCPS6 0x3FE6 // 1:2048 (64 ms period).
5979 #define _WDTCPS_WDTCPS7 0x3FE7 // 1:4096 (128 ms period).
5980 #define _WDTCPS_WDTCPS8 0x3FE8 // 1:8192 (256 ms period).
5981 #define _WDTCPS_WDTCPS9 0x3FE9 // 1:16384 (512 ms period).
5982 #define _WDTCPS_WDTCPSA 0x3FEA // 1:32768 (1 s period).
5983 #define _WDTCPS_WDTCPSB 0x3FEB // 1:65536 (2 s period).
5984 #define _WDTCPS_WDTCPSC 0x3FEC // 1:131072 (4 s period).
5985 #define _WDTCPS_WDTCPSD 0x3FED // 1:262144 (8 s period).
5986 #define _WDTCPS_WDTCPSE 0x3FEE // 1:524299 (16 s period).
5987 #define _WDTCPS_WDTCPSF 0x3FEF // 1:1048576 (32 s period).
5988 #define _WDTCPS_WDTCPS10 0x3FF0 // 1:2097152 (64 s period).
5989 #define _WDTCPS_WDTCPS11 0x3FF1 // 1:4194304 (128 s period).
5990 #define _WDTCPS_WDTCPS12 0x3FF2 // 1:8388608 (256 s period).
5991 #define _WDTCPS_WDTCPS1F 0x3FFF // Software Control (WDTPS).
5992 #define _WDTE_OFF 0x3F9F // WDT disabled.
5993 #define _WDTE_SWDTEN 0x3FBF // WDT controlled by the SWDTEN bit in the WDTCON register.
5994 #define _WDTE_NSLEEP 0x3FDF // WDT enabled while running and disabled in Sleep.
5995 #define _WDTE_ON 0x3FFF // WDT enabled.
5996 #define _WDTCWS_WDTCWS125 0x38FF // 12.5 percent window open time.
5997 #define _WDTCWS_WDTCWS25 0x39FF // 25 percent window open time.
5998 #define _WDTCWS_WDTCWS375 0x3AFF // 37.5 percent window open time.
5999 #define _WDTCWS_WDTCWS50 0x3BFF // 50 percent window open time.
6000 #define _WDTCWS_WDTCWS625 0x3CFF // 62.5 percent window open time.
6001 #define _WDTCWS_WDTCWS75 0x3DFF // 75 percent window open time.
6002 #define _WDTCWS_WDTCWS100 0x3EFF // 100 percent window open time (Legacy WDT).
6003 #define _WDTCWS_WDTCWSSW 0x3FFF // Software WDT window size control (WDTWS bits).
6004 #define _WDTCCS_LFINTOSC 0x07FF // 31.0 kHz LFINTOSC.
6005 #define _WDTCCS_MFINTOSC 0x0FFF // 31.25 kHz HFINTOSC (MFINTOSC).
6006 #define _WDTCCS_SWC 0x3FFF // Software control, controlled by WDTCS bits.
6008 //==============================================================================
6010 #define _DEVID1 0x8006
6012 #define _IDLOC0 0x8000
6013 #define _IDLOC1 0x8001
6014 #define _IDLOC2 0x8002
6015 #define _IDLOC3 0x8003
6017 //==============================================================================
6019 #ifndef NO_BIT_DEFINES
6021 #define ADON ADCON0bits.ADON // bit 0
6022 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
6023 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
6024 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
6025 #define CHS0 ADCON0bits.CHS0 // bit 2
6026 #define CHS1 ADCON0bits.CHS1 // bit 3
6027 #define CHS2 ADCON0bits.CHS2 // bit 4
6028 #define CHS3 ADCON0bits.CHS3 // bit 5
6029 #define CHS4 ADCON0bits.CHS4 // bit 6
6031 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
6032 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
6033 #define ADCS0 ADCON1bits.ADCS0 // bit 4
6034 #define ADCS1 ADCON1bits.ADCS1 // bit 5
6035 #define ADCS2 ADCON1bits.ADCS2 // bit 6
6036 #define ADFM ADCON1bits.ADFM // bit 7
6038 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
6039 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
6040 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
6041 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
6043 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6044 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6045 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6046 #define ANSA4 ANSELAbits.ANSA4 // bit 4
6048 #define CCP1SEL APFCONbits.CCP1SEL // bit 0
6049 #define T1GSEL APFCONbits.T1GSEL // bit 3
6050 #define CWGBSEL APFCONbits.CWGBSEL // bit 5
6051 #define CWGASEL APFCONbits.CWGASEL // bit 6
6053 #define BORRDY BORCONbits.BORRDY // bit 0
6054 #define BORFS BORCONbits.BORFS // bit 6
6055 #define SBOREN BORCONbits.SBOREN // bit 7
6057 #define BSR0 BSRbits.BSR0 // bit 0
6058 #define BSR1 BSRbits.BSR1 // bit 1
6059 #define BSR2 BSRbits.BSR2 // bit 2
6060 #define BSR3 BSRbits.BSR3 // bit 3
6061 #define BSR4 BSRbits.BSR4 // bit 4
6063 #define CTS0 CCP1CAPbits.CTS0 // bit 0, shadows bit in CCP1CAPbits
6064 #define CCP1CTS0 CCP1CAPbits.CCP1CTS0 // bit 0, shadows bit in CCP1CAPbits
6065 #define CTS1 CCP1CAPbits.CTS1 // bit 1, shadows bit in CCP1CAPbits
6066 #define CCP1CTS1 CCP1CAPbits.CCP1CTS1 // bit 1, shadows bit in CCP1CAPbits
6068 #define MODE0 CCP1CONbits.MODE0 // bit 0, shadows bit in CCP1CONbits
6069 #define CCP1MODE0 CCP1CONbits.CCP1MODE0 // bit 0, shadows bit in CCP1CONbits
6070 #define MODE1 CCP1CONbits.MODE1 // bit 1, shadows bit in CCP1CONbits
6071 #define CCP1MODE1 CCP1CONbits.CCP1MODE1 // bit 1, shadows bit in CCP1CONbits
6072 #define MODE2 CCP1CONbits.MODE2 // bit 2, shadows bit in CCP1CONbits
6073 #define CCP1MODE2 CCP1CONbits.CCP1MODE2 // bit 2, shadows bit in CCP1CONbits
6074 #define MODE3 CCP1CONbits.MODE3 // bit 3, shadows bit in CCP1CONbits
6075 #define CCP1MODE3 CCP1CONbits.CCP1MODE3 // bit 3, shadows bit in CCP1CONbits
6076 #define FMT CCP1CONbits.FMT // bit 4, shadows bit in CCP1CONbits
6077 #define CCP1FMT CCP1CONbits.CCP1FMT // bit 4, shadows bit in CCP1CONbits
6078 #define OUT CCP1CONbits.OUT // bit 5, shadows bit in CCP1CONbits
6079 #define CCP1OUT CCP1CONbits.CCP1OUT // bit 5, shadows bit in CCP1CONbits
6080 #define OE CCP1CONbits.OE // bit 6, shadows bit in CCP1CONbits
6081 #define CCP1OE CCP1CONbits.CCP1OE // bit 6, shadows bit in CCP1CONbits
6082 #define EN CCP1CONbits.EN // bit 7, shadows bit in CCP1CONbits
6083 #define CCP1EN CCP1CONbits.CCP1EN // bit 7, shadows bit in CCP1CONbits
6085 #define CCP1TSEL0 CCPTMRSbits.CCP1TSEL0 // bit 0
6086 #define CCP1TSEL1 CCPTMRSbits.CCP1TSEL1 // bit 1
6087 #define CCP2TSEL0 CCPTMRSbits.CCP2TSEL0 // bit 2
6088 #define CCP2TSEL1 CCPTMRSbits.CCP2TSEL1 // bit 3
6090 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6091 #define C1HYS CM1CON0bits.C1HYS // bit 1
6092 #define C1SP CM1CON0bits.C1SP // bit 2
6093 #define C1POL CM1CON0bits.C1POL // bit 4
6094 #define C1OE CM1CON0bits.C1OE // bit 5
6095 #define C1OUT CM1CON0bits.C1OUT // bit 6
6096 #define C1ON CM1CON0bits.C1ON // bit 7
6098 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6099 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6100 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
6101 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
6102 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
6103 #define C1INTN CM1CON1bits.C1INTN // bit 6
6104 #define C1INTP CM1CON1bits.C1INTP // bit 7
6106 #define MC1OUT CMOUTbits.MC1OUT // bit 0
6108 #define ACC8 CRCACCHbits.ACC8 // bit 0, shadows bit in CRCACCHbits
6109 #define CRCACC8 CRCACCHbits.CRCACC8 // bit 0, shadows bit in CRCACCHbits
6110 #define ACC9 CRCACCHbits.ACC9 // bit 1, shadows bit in CRCACCHbits
6111 #define CRCACC9 CRCACCHbits.CRCACC9 // bit 1, shadows bit in CRCACCHbits
6112 #define ACC10 CRCACCHbits.ACC10 // bit 2, shadows bit in CRCACCHbits
6113 #define CRCACC10 CRCACCHbits.CRCACC10 // bit 2, shadows bit in CRCACCHbits
6114 #define ACC11 CRCACCHbits.ACC11 // bit 3, shadows bit in CRCACCHbits
6115 #define CRCACC11 CRCACCHbits.CRCACC11 // bit 3, shadows bit in CRCACCHbits
6116 #define ACC12 CRCACCHbits.ACC12 // bit 4, shadows bit in CRCACCHbits
6117 #define CRCACC12 CRCACCHbits.CRCACC12 // bit 4, shadows bit in CRCACCHbits
6118 #define ACC13 CRCACCHbits.ACC13 // bit 5, shadows bit in CRCACCHbits
6119 #define CRCACC13 CRCACCHbits.CRCACC13 // bit 5, shadows bit in CRCACCHbits
6120 #define ACC14 CRCACCHbits.ACC14 // bit 6, shadows bit in CRCACCHbits
6121 #define CRCACC14 CRCACCHbits.CRCACC14 // bit 6, shadows bit in CRCACCHbits
6122 #define ACC15 CRCACCHbits.ACC15 // bit 7, shadows bit in CRCACCHbits
6123 #define CRCACC15 CRCACCHbits.CRCACC15 // bit 7, shadows bit in CRCACCHbits
6125 #define ACC0 CRCACCLbits.ACC0 // bit 0, shadows bit in CRCACCLbits
6126 #define CRCACC0 CRCACCLbits.CRCACC0 // bit 0, shadows bit in CRCACCLbits
6127 #define ACC1 CRCACCLbits.ACC1 // bit 1, shadows bit in CRCACCLbits
6128 #define CRCACC1 CRCACCLbits.CRCACC1 // bit 1, shadows bit in CRCACCLbits
6129 #define ACC2 CRCACCLbits.ACC2 // bit 2, shadows bit in CRCACCLbits
6130 #define CRCACC2 CRCACCLbits.CRCACC2 // bit 2, shadows bit in CRCACCLbits
6131 #define ACC3 CRCACCLbits.ACC3 // bit 3, shadows bit in CRCACCLbits
6132 #define CRCACC3 CRCACCLbits.CRCACC3 // bit 3, shadows bit in CRCACCLbits
6133 #define ACC4 CRCACCLbits.ACC4 // bit 4, shadows bit in CRCACCLbits
6134 #define CRCACC4 CRCACCLbits.CRCACC4 // bit 4, shadows bit in CRCACCLbits
6135 #define ACC5 CRCACCLbits.ACC5 // bit 5, shadows bit in CRCACCLbits
6136 #define CRCACC5 CRCACCLbits.CRCACC5 // bit 5, shadows bit in CRCACCLbits
6137 #define ACC6 CRCACCLbits.ACC6 // bit 6, shadows bit in CRCACCLbits
6138 #define CRCACC6 CRCACCLbits.CRCACC6 // bit 6, shadows bit in CRCACCLbits
6139 #define ACC7 CRCACCLbits.ACC7 // bit 7, shadows bit in CRCACCLbits
6140 #define CRCACC7 CRCACCLbits.CRCACC7 // bit 7, shadows bit in CRCACCLbits
6142 #define PLEN0 CRCCON1bits.PLEN0 // bit 0, shadows bit in CRCCON1bits
6143 #define CRCPLEN0 CRCCON1bits.CRCPLEN0 // bit 0, shadows bit in CRCCON1bits
6144 #define PLEN1 CRCCON1bits.PLEN1 // bit 1, shadows bit in CRCCON1bits
6145 #define CRCPLEN1 CRCCON1bits.CRCPLEN1 // bit 1, shadows bit in CRCCON1bits
6146 #define PLEN2 CRCCON1bits.PLEN2 // bit 2, shadows bit in CRCCON1bits
6147 #define CRCPLEN2 CRCCON1bits.CRCPLEN2 // bit 2, shadows bit in CRCCON1bits
6148 #define PLEN3 CRCCON1bits.PLEN3 // bit 3, shadows bit in CRCCON1bits
6149 #define CRCPLEN3 CRCCON1bits.CRCPLEN3 // bit 3, shadows bit in CRCCON1bits
6150 #define DLEN0 CRCCON1bits.DLEN0 // bit 4, shadows bit in CRCCON1bits
6151 #define CRCDLEN0 CRCCON1bits.CRCDLEN0 // bit 4, shadows bit in CRCCON1bits
6152 #define DLEN1 CRCCON1bits.DLEN1 // bit 5, shadows bit in CRCCON1bits
6153 #define CRCDLEN1 CRCCON1bits.CRCDLEN1 // bit 5, shadows bit in CRCCON1bits
6154 #define DLEN2 CRCCON1bits.DLEN2 // bit 6, shadows bit in CRCCON1bits
6155 #define CRCDLEN2 CRCCON1bits.CRCDLEN2 // bit 6, shadows bit in CRCCON1bits
6156 #define DLEN3 CRCCON1bits.DLEN3 // bit 7, shadows bit in CRCCON1bits
6157 #define CRCDLEN3 CRCCON1bits.CRCDLEN3 // bit 7, shadows bit in CRCCON1bits
6159 #define DAT8 CRCDATHbits.DAT8 // bit 0, shadows bit in CRCDATHbits
6160 #define CRCDAT8 CRCDATHbits.CRCDAT8 // bit 0, shadows bit in CRCDATHbits
6161 #define DAT9 CRCDATHbits.DAT9 // bit 1, shadows bit in CRCDATHbits
6162 #define CRCDAT9 CRCDATHbits.CRCDAT9 // bit 1, shadows bit in CRCDATHbits
6163 #define DAT10 CRCDATHbits.DAT10 // bit 2, shadows bit in CRCDATHbits
6164 #define CRCDAT10 CRCDATHbits.CRCDAT10 // bit 2, shadows bit in CRCDATHbits
6165 #define DAT11 CRCDATHbits.DAT11 // bit 3, shadows bit in CRCDATHbits
6166 #define CRCDAT11 CRCDATHbits.CRCDAT11 // bit 3, shadows bit in CRCDATHbits
6167 #define DAT12 CRCDATHbits.DAT12 // bit 4, shadows bit in CRCDATHbits
6168 #define CRCDAT12 CRCDATHbits.CRCDAT12 // bit 4, shadows bit in CRCDATHbits
6169 #define DAT13 CRCDATHbits.DAT13 // bit 5, shadows bit in CRCDATHbits
6170 #define CRCDAT13 CRCDATHbits.CRCDAT13 // bit 5, shadows bit in CRCDATHbits
6171 #define DAT14 CRCDATHbits.DAT14 // bit 6, shadows bit in CRCDATHbits
6172 #define CRCDAT14 CRCDATHbits.CRCDAT14 // bit 6, shadows bit in CRCDATHbits
6173 #define DAT15 CRCDATHbits.DAT15 // bit 7, shadows bit in CRCDATHbits
6174 #define CRCDAT15 CRCDATHbits.CRCDAT15 // bit 7, shadows bit in CRCDATHbits
6176 #define DAT0 CRCDATLbits.DAT0 // bit 0, shadows bit in CRCDATLbits
6177 #define CRCDAT0 CRCDATLbits.CRCDAT0 // bit 0, shadows bit in CRCDATLbits
6178 #define DAT1 CRCDATLbits.DAT1 // bit 1, shadows bit in CRCDATLbits
6179 #define CRCDAT1 CRCDATLbits.CRCDAT1 // bit 1, shadows bit in CRCDATLbits
6180 #define DAT2 CRCDATLbits.DAT2 // bit 2, shadows bit in CRCDATLbits
6181 #define CRCDAT2 CRCDATLbits.CRCDAT2 // bit 2, shadows bit in CRCDATLbits
6182 #define DAT3 CRCDATLbits.DAT3 // bit 3, shadows bit in CRCDATLbits
6183 #define CRCDAT3 CRCDATLbits.CRCDAT3 // bit 3, shadows bit in CRCDATLbits
6184 #define DAT4 CRCDATLbits.DAT4 // bit 4, shadows bit in CRCDATLbits
6185 #define CRCDAT4 CRCDATLbits.CRCDAT4 // bit 4, shadows bit in CRCDATLbits
6186 #define DAT5 CRCDATLbits.DAT5 // bit 5, shadows bit in CRCDATLbits
6187 #define CRCDAT5 CRCDATLbits.CRCDAT5 // bit 5, shadows bit in CRCDATLbits
6188 #define DAT6 CRCDATLbits.DAT6 // bit 6, shadows bit in CRCDATLbits
6189 #define CRCDAT6 CRCDATLbits.CRCDAT6 // bit 6, shadows bit in CRCDATLbits
6190 #define DAT7 CRCDATLbits.DAT7 // bit 7, shadows bit in CRCDATLbits
6191 #define CRDCDAT7 CRCDATLbits.CRDCDAT7 // bit 7, shadows bit in CRCDATLbits
6193 #define SHIFT8 CRCSHIFTHbits.SHIFT8 // bit 0, shadows bit in CRCSHIFTHbits
6194 #define CRCSHIFT8 CRCSHIFTHbits.CRCSHIFT8 // bit 0, shadows bit in CRCSHIFTHbits
6195 #define SHIFT9 CRCSHIFTHbits.SHIFT9 // bit 1, shadows bit in CRCSHIFTHbits
6196 #define CRCSHIFT9 CRCSHIFTHbits.CRCSHIFT9 // bit 1, shadows bit in CRCSHIFTHbits
6197 #define SHIFT10 CRCSHIFTHbits.SHIFT10 // bit 2, shadows bit in CRCSHIFTHbits
6198 #define CRCSHIFT10 CRCSHIFTHbits.CRCSHIFT10 // bit 2, shadows bit in CRCSHIFTHbits
6199 #define SHIFT11 CRCSHIFTHbits.SHIFT11 // bit 3, shadows bit in CRCSHIFTHbits
6200 #define CRCSHIFT11 CRCSHIFTHbits.CRCSHIFT11 // bit 3, shadows bit in CRCSHIFTHbits
6201 #define SHIFT12 CRCSHIFTHbits.SHIFT12 // bit 4, shadows bit in CRCSHIFTHbits
6202 #define CRCSHIFT12 CRCSHIFTHbits.CRCSHIFT12 // bit 4, shadows bit in CRCSHIFTHbits
6203 #define SHIFT13 CRCSHIFTHbits.SHIFT13 // bit 5, shadows bit in CRCSHIFTHbits
6204 #define CRCSHIFT13 CRCSHIFTHbits.CRCSHIFT13 // bit 5, shadows bit in CRCSHIFTHbits
6205 #define SHIFT14 CRCSHIFTHbits.SHIFT14 // bit 6, shadows bit in CRCSHIFTHbits
6206 #define CRCSHIFT14 CRCSHIFTHbits.CRCSHIFT14 // bit 6, shadows bit in CRCSHIFTHbits
6207 #define SHIFT15 CRCSHIFTHbits.SHIFT15 // bit 7, shadows bit in CRCSHIFTHbits
6208 #define CRCSHIFT15 CRCSHIFTHbits.CRCSHIFT15 // bit 7, shadows bit in CRCSHIFTHbits
6210 #define SHIFT0 CRCSHIFTLbits.SHIFT0 // bit 0, shadows bit in CRCSHIFTLbits
6211 #define CRCSHIFT0 CRCSHIFTLbits.CRCSHIFT0 // bit 0, shadows bit in CRCSHIFTLbits
6212 #define SHIFT1 CRCSHIFTLbits.SHIFT1 // bit 1, shadows bit in CRCSHIFTLbits
6213 #define CRCSHIFT1 CRCSHIFTLbits.CRCSHIFT1 // bit 1, shadows bit in CRCSHIFTLbits
6214 #define SHIFT2 CRCSHIFTLbits.SHIFT2 // bit 2, shadows bit in CRCSHIFTLbits
6215 #define CRCSHIFT2 CRCSHIFTLbits.CRCSHIFT2 // bit 2, shadows bit in CRCSHIFTLbits
6216 #define SHIFT3 CRCSHIFTLbits.SHIFT3 // bit 3, shadows bit in CRCSHIFTLbits
6217 #define CRCSHIFT3 CRCSHIFTLbits.CRCSHIFT3 // bit 3, shadows bit in CRCSHIFTLbits
6218 #define SHIFT4 CRCSHIFTLbits.SHIFT4 // bit 4, shadows bit in CRCSHIFTLbits
6219 #define CRCSHIFT4 CRCSHIFTLbits.CRCSHIFT4 // bit 4, shadows bit in CRCSHIFTLbits
6220 #define SHIFT5 CRCSHIFTLbits.SHIFT5 // bit 5, shadows bit in CRCSHIFTLbits
6221 #define CRCSHIFT5 CRCSHIFTLbits.CRCSHIFT5 // bit 5, shadows bit in CRCSHIFTLbits
6222 #define SHIFT6 CRCSHIFTLbits.SHIFT6 // bit 6, shadows bit in CRCSHIFTLbits
6223 #define CRCSHIFT6 CRCSHIFTLbits.CRCSHIFT6 // bit 6, shadows bit in CRCSHIFTLbits
6224 #define SHIFT7 CRCSHIFTLbits.SHIFT7 // bit 7, shadows bit in CRCSHIFTLbits
6225 #define CRCSHIFT7 CRCSHIFTLbits.CRCSHIFT7 // bit 7, shadows bit in CRCSHIFTLbits
6227 #define XOR8 CRCXORHbits.XOR8 // bit 0, shadows bit in CRCXORHbits
6228 #define CRCXOR8 CRCXORHbits.CRCXOR8 // bit 0, shadows bit in CRCXORHbits
6229 #define XOR9 CRCXORHbits.XOR9 // bit 1, shadows bit in CRCXORHbits
6230 #define CRCXOR9 CRCXORHbits.CRCXOR9 // bit 1, shadows bit in CRCXORHbits
6231 #define XOR10 CRCXORHbits.XOR10 // bit 2, shadows bit in CRCXORHbits
6232 #define CRCXOR10 CRCXORHbits.CRCXOR10 // bit 2, shadows bit in CRCXORHbits
6233 #define XOR11 CRCXORHbits.XOR11 // bit 3, shadows bit in CRCXORHbits
6234 #define CRCXOR11 CRCXORHbits.CRCXOR11 // bit 3, shadows bit in CRCXORHbits
6235 #define XOR12 CRCXORHbits.XOR12 // bit 4, shadows bit in CRCXORHbits
6236 #define CRCXOR12 CRCXORHbits.CRCXOR12 // bit 4, shadows bit in CRCXORHbits
6237 #define XOR13 CRCXORHbits.XOR13 // bit 5, shadows bit in CRCXORHbits
6238 #define CRCXOR13 CRCXORHbits.CRCXOR13 // bit 5, shadows bit in CRCXORHbits
6239 #define XOR14 CRCXORHbits.XOR14 // bit 6, shadows bit in CRCXORHbits
6240 #define CRCXOR14 CRCXORHbits.CRCXOR14 // bit 6, shadows bit in CRCXORHbits
6241 #define XOR15 CRCXORHbits.XOR15 // bit 7, shadows bit in CRCXORHbits
6242 #define CRCXOR15 CRCXORHbits.CRCXOR15 // bit 7, shadows bit in CRCXORHbits
6244 #define XOR1 CRCXORLbits.XOR1 // bit 1, shadows bit in CRCXORLbits
6245 #define CRCXOR1 CRCXORLbits.CRCXOR1 // bit 1, shadows bit in CRCXORLbits
6246 #define XOR2 CRCXORLbits.XOR2 // bit 2, shadows bit in CRCXORLbits
6247 #define CRCXOR2 CRCXORLbits.CRCXOR2 // bit 2, shadows bit in CRCXORLbits
6248 #define XOR3 CRCXORLbits.XOR3 // bit 3, shadows bit in CRCXORLbits
6249 #define CRCXOR3 CRCXORLbits.CRCXOR3 // bit 3, shadows bit in CRCXORLbits
6250 #define XOR4 CRCXORLbits.XOR4 // bit 4, shadows bit in CRCXORLbits
6251 #define CRCXOR4 CRCXORLbits.CRCXOR4 // bit 4, shadows bit in CRCXORLbits
6252 #define XOR5 CRCXORLbits.XOR5 // bit 5, shadows bit in CRCXORLbits
6253 #define CRCXOR5 CRCXORLbits.CRCXOR5 // bit 5, shadows bit in CRCXORLbits
6254 #define XOR6 CRCXORLbits.XOR6 // bit 6, shadows bit in CRCXORLbits
6255 #define CRCXOR6 CRCXORLbits.CRCXOR6 // bit 6, shadows bit in CRCXORLbits
6256 #define XOR7 CRCXORLbits.XOR7 // bit 7, shadows bit in CRCXORLbits
6257 #define CRCXOR7 CRCXORLbits.CRCXOR7 // bit 7, shadows bit in CRCXORLbits
6259 #define LSAC0 CWG1AS0bits.LSAC0 // bit 2, shadows bit in CWG1AS0bits
6260 #define CWG1LSAC0 CWG1AS0bits.CWG1LSAC0 // bit 2, shadows bit in CWG1AS0bits
6261 #define LSAC1 CWG1AS0bits.LSAC1 // bit 3, shadows bit in CWG1AS0bits
6262 #define CWG1LSAC1 CWG1AS0bits.CWG1LSAC1 // bit 3, shadows bit in CWG1AS0bits
6263 #define LSBD0 CWG1AS0bits.LSBD0 // bit 4, shadows bit in CWG1AS0bits
6264 #define CWG1LSBD0 CWG1AS0bits.CWG1LSBD0 // bit 4, shadows bit in CWG1AS0bits
6265 #define LSBD1 CWG1AS0bits.LSBD1 // bit 5, shadows bit in CWG1AS0bits
6266 #define CWG1LSBD1 CWG1AS0bits.CWG1LSBD1 // bit 5, shadows bit in CWG1AS0bits
6267 #define REN CWG1AS0bits.REN // bit 6, shadows bit in CWG1AS0bits
6268 #define CWG1REN CWG1AS0bits.CWG1REN // bit 6, shadows bit in CWG1AS0bits
6269 #define SHUTDOWN CWG1AS0bits.SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
6270 #define CWG1SHUTDOWN CWG1AS0bits.CWG1SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
6272 #define INAS CWG1AS1bits.INAS // bit 0, shadows bit in CWG1AS1bits
6273 #define CWG1INAS CWG1AS1bits.CWG1INAS // bit 0, shadows bit in CWG1AS1bits
6274 #define C1AS CWG1AS1bits.C1AS // bit 1, shadows bit in CWG1AS1bits
6275 #define CWG1C1AS CWG1AS1bits.CWG1C1AS // bit 1, shadows bit in CWG1AS1bits
6276 #define C2AS CWG1AS1bits.C2AS // bit 2, shadows bit in CWG1AS1bits
6277 #define CWG1C2AS CWG1AS1bits.CWG1C2AS // bit 2, shadows bit in CWG1AS1bits
6278 #define TMR2AS CWG1AS1bits.TMR2AS // bit 4, shadows bit in CWG1AS1bits
6279 #define CWG1TMR2AS CWG1AS1bits.CWG1TMR2AS // bit 4, shadows bit in CWG1AS1bits
6280 #define TMR4AS CWG1AS1bits.TMR4AS // bit 5, shadows bit in CWG1AS1bits
6281 #define CWG1TMR4AS CWG1AS1bits.CWG1TMR4AS // bit 5, shadows bit in CWG1AS1bits
6282 #define TMR6AS CWG1AS1bits.TMR6AS // bit 6, shadows bit in CWG1AS1bits
6283 #define CWG1TMR6AS CWG1AS1bits.CWG1TMR6AS // bit 6, shadows bit in CWG1AS1bits
6285 #define CS CWG1CLKCONbits.CS // bit 0, shadows bit in CWG1CLKCONbits
6286 #define CWG1CS CWG1CLKCONbits.CWG1CS // bit 0, shadows bit in CWG1CLKCONbits
6288 #define POLA CWG1CON1bits.POLA // bit 0, shadows bit in CWG1CON1bits
6289 #define CWG1POLA CWG1CON1bits.CWG1POLA // bit 0, shadows bit in CWG1CON1bits
6290 #define POLB CWG1CON1bits.POLB // bit 1, shadows bit in CWG1CON1bits
6291 #define CWG1POLB CWG1CON1bits.CWG1POLB // bit 1, shadows bit in CWG1CON1bits
6292 #define POLC CWG1CON1bits.POLC // bit 2, shadows bit in CWG1CON1bits
6293 #define CWG1POLC CWG1CON1bits.CWG1POLC // bit 2, shadows bit in CWG1CON1bits
6294 #define POLD CWG1CON1bits.POLD // bit 3, shadows bit in CWG1CON1bits
6295 #define CWG1POLD CWG1CON1bits.CWG1POLD // bit 3, shadows bit in CWG1CON1bits
6296 #define IN CWG1CON1bits.IN // bit 5, shadows bit in CWG1CON1bits
6297 #define CWG1IN CWG1CON1bits.CWG1IN // bit 5, shadows bit in CWG1CON1bits
6299 #define DBF0 CWG1DBFbits.DBF0 // bit 0, shadows bit in CWG1DBFbits
6300 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0, shadows bit in CWG1DBFbits
6301 #define DBF1 CWG1DBFbits.DBF1 // bit 1, shadows bit in CWG1DBFbits
6302 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1, shadows bit in CWG1DBFbits
6303 #define DBF2 CWG1DBFbits.DBF2 // bit 2, shadows bit in CWG1DBFbits
6304 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2, shadows bit in CWG1DBFbits
6305 #define DBF3 CWG1DBFbits.DBF3 // bit 3, shadows bit in CWG1DBFbits
6306 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3, shadows bit in CWG1DBFbits
6307 #define DBF4 CWG1DBFbits.DBF4 // bit 4, shadows bit in CWG1DBFbits
6308 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4, shadows bit in CWG1DBFbits
6309 #define DBF5 CWG1DBFbits.DBF5 // bit 5, shadows bit in CWG1DBFbits
6310 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5, shadows bit in CWG1DBFbits
6312 #define DBR0 CWG1DBRbits.DBR0 // bit 0, shadows bit in CWG1DBRbits
6313 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0, shadows bit in CWG1DBRbits
6314 #define DBR1 CWG1DBRbits.DBR1 // bit 1, shadows bit in CWG1DBRbits
6315 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1, shadows bit in CWG1DBRbits
6316 #define DBR2 CWG1DBRbits.DBR2 // bit 2, shadows bit in CWG1DBRbits
6317 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2, shadows bit in CWG1DBRbits
6318 #define DBR3 CWG1DBRbits.DBR3 // bit 3, shadows bit in CWG1DBRbits
6319 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3, shadows bit in CWG1DBRbits
6320 #define DBR4 CWG1DBRbits.DBR4 // bit 4, shadows bit in CWG1DBRbits
6321 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4, shadows bit in CWG1DBRbits
6322 #define DBR5 CWG1DBRbits.DBR5 // bit 5, shadows bit in CWG1DBRbits
6323 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5, shadows bit in CWG1DBRbits
6325 #define IS0 CWG1ISMbits.IS0 // bit 0, shadows bit in CWG1ISMbits
6326 #define CWG1IS0 CWG1ISMbits.CWG1IS0 // bit 0, shadows bit in CWG1ISMbits
6327 #define IS1 CWG1ISMbits.IS1 // bit 1, shadows bit in CWG1ISMbits
6328 #define CWG1IS1 CWG1ISMbits.CWG1IS1 // bit 1, shadows bit in CWG1ISMbits
6329 #define IS2 CWG1ISMbits.IS2 // bit 2, shadows bit in CWG1ISMbits
6330 #define CWG1IS2 CWG1ISMbits.CWG1IS2 // bit 2, shadows bit in CWG1ISMbits
6332 #define STRA CWG1OCON0bits.STRA // bit 0, shadows bit in CWG1OCON0bits
6333 #define CWG1STRA CWG1OCON0bits.CWG1STRA // bit 0, shadows bit in CWG1OCON0bits
6334 #define STRB CWG1OCON0bits.STRB // bit 1, shadows bit in CWG1OCON0bits
6335 #define CWG1STRB CWG1OCON0bits.CWG1STRB // bit 1, shadows bit in CWG1OCON0bits
6336 #define STRC CWG1OCON0bits.STRC // bit 2, shadows bit in CWG1OCON0bits
6337 #define CWG1STRC CWG1OCON0bits.CWG1STRC // bit 2, shadows bit in CWG1OCON0bits
6338 #define STRD CWG1OCON0bits.STRD // bit 3, shadows bit in CWG1OCON0bits
6339 #define CWG1STRD CWG1OCON0bits.CWG1STRD // bit 3, shadows bit in CWG1OCON0bits
6340 #define OVRA CWG1OCON0bits.OVRA // bit 4, shadows bit in CWG1OCON0bits
6341 #define CWG1OVRA CWG1OCON0bits.CWG1OVRA // bit 4, shadows bit in CWG1OCON0bits
6342 #define OVRB CWG1OCON0bits.OVRB // bit 5, shadows bit in CWG1OCON0bits
6343 #define CWG1OVRB CWG1OCON0bits.CWG1OVRB // bit 5, shadows bit in CWG1OCON0bits
6344 #define OVRC CWG1OCON0bits.OVRC // bit 6, shadows bit in CWG1OCON0bits
6345 #define CWG1OVRC CWG1OCON0bits.CWG1OVRC // bit 6, shadows bit in CWG1OCON0bits
6346 #define OVRD CWG1OCON0bits.OVRD // bit 7, shadows bit in CWG1OCON0bits
6347 #define CWG1OVRD CWG1OCON0bits.CWG1OVRD // bit 7, shadows bit in CWG1OCON0bits
6349 #define OEA CWG1OCON1bits.OEA // bit 0, shadows bit in CWG1OCON1bits
6350 #define CWG1OEA CWG1OCON1bits.CWG1OEA // bit 0, shadows bit in CWG1OCON1bits
6351 #define OEB CWG1OCON1bits.OEB // bit 1, shadows bit in CWG1OCON1bits
6352 #define CWG1OEB CWG1OCON1bits.CWG1OEB // bit 1, shadows bit in CWG1OCON1bits
6353 #define OEC CWG1OCON1bits.OEC // bit 2, shadows bit in CWG1OCON1bits
6354 #define CWG1OEC CWG1OCON1bits.CWG1OEC // bit 2, shadows bit in CWG1OCON1bits
6355 #define OED CWG1OCON1bits.OED // bit 3, shadows bit in CWG1OCON1bits
6356 #define CWG1OED CWG1OCON1bits.CWG1OED // bit 3, shadows bit in CWG1OCON1bits
6358 #define D1PSS0 DAC1CON0bits.D1PSS0 // bit 2
6359 #define D1PSS1 DAC1CON0bits.D1PSS1 // bit 3
6360 #define DAC1OE DAC1CON0bits.DAC1OE // bit 5
6361 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7
6363 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0
6364 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1
6365 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2
6366 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3
6367 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4
6368 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5
6369 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6
6370 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7
6372 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
6373 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
6374 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
6375 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
6376 #define TSRNG FVRCONbits.TSRNG // bit 4
6377 #define TSEN FVRCONbits.TSEN // bit 5
6378 #define FVRRDY FVRCONbits.FVRRDY // bit 6
6379 #define FVREN FVRCONbits.FVREN // bit 7
6381 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
6382 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
6383 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
6384 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
6385 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
6386 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
6388 #define IOCIF INTCONbits.IOCIF // bit 0
6389 #define INTF INTCONbits.INTF // bit 1
6390 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
6391 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
6392 #define IOCIE INTCONbits.IOCIE // bit 3
6393 #define INTE INTCONbits.INTE // bit 4
6394 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
6395 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
6396 #define PEIE INTCONbits.PEIE // bit 6
6397 #define GIE INTCONbits.GIE // bit 7
6399 #define LATA0 LATAbits.LATA0 // bit 0
6400 #define LATA1 LATAbits.LATA1 // bit 1
6401 #define LATA2 LATAbits.LATA2 // bit 2
6402 #define LATA3 LATAbits.LATA3 // bit 3
6403 #define LATA4 LATAbits.LATA4 // bit 4
6404 #define LATA5 LATAbits.LATA5 // bit 5
6406 #define ODA0 ODCONAbits.ODA0 // bit 0
6407 #define ODA1 ODCONAbits.ODA1 // bit 1
6408 #define ODA2 ODCONAbits.ODA2 // bit 2
6409 #define ODA4 ODCONAbits.ODA4 // bit 4
6410 #define ODA5 ODCONAbits.ODA5 // bit 5
6412 #define PS0 OPTION_REGbits.PS0 // bit 0
6413 #define PS1 OPTION_REGbits.PS1 // bit 1
6414 #define PS2 OPTION_REGbits.PS2 // bit 2
6415 #define PSA OPTION_REGbits.PSA // bit 3
6416 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6417 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6418 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6419 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6420 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6421 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6423 #define SCS0 OSCCONbits.SCS0 // bit 0
6424 #define SCS1 OSCCONbits.SCS1 // bit 1
6425 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6426 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6427 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6428 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6429 #define SPLLEN OSCCONbits.SPLLEN // bit 7
6431 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6432 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6433 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
6434 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
6435 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6436 #define PLLR OSCSTATbits.PLLR // bit 6
6438 #define TUN0 OSCTUNEbits.TUN0 // bit 0
6439 #define TUN1 OSCTUNEbits.TUN1 // bit 1
6440 #define TUN2 OSCTUNEbits.TUN2 // bit 2
6441 #define TUN3 OSCTUNEbits.TUN3 // bit 3
6442 #define TUN4 OSCTUNEbits.TUN4 // bit 4
6443 #define TUN5 OSCTUNEbits.TUN5 // bit 5
6445 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6446 #define NOT_POR PCONbits.NOT_POR // bit 1
6447 #define NOT_RI PCONbits.NOT_RI // bit 2
6448 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6449 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
6450 #define NOT_WDTWV PCONbits.NOT_WDTWV // bit 5
6451 #define STKUNF PCONbits.STKUNF // bit 6
6452 #define STKOVF PCONbits.STKOVF // bit 7
6454 #define TMR1IE PIE1bits.TMR1IE // bit 0
6455 #define TMR2IE PIE1bits.TMR2IE // bit 1
6456 #define CCP1IE PIE1bits.CCP1IE // bit 2
6457 #define ADIE PIE1bits.ADIE // bit 6
6458 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6460 #define CCP2IE PIE2bits.CCP2IE // bit 0
6461 #define TMR4IE PIE2bits.TMR4IE // bit 1
6462 #define TMR6IE PIE2bits.TMR6IE // bit 2
6463 #define C1IE PIE2bits.C1IE // bit 5
6464 #define C2IE PIE2bits.C2IE // bit 6
6466 #define ZCDIE PIE3bits.ZCDIE // bit 4
6467 #define CWGIE PIE3bits.CWGIE // bit 5
6469 #define SMT1IE PIE4bits.SMT1IE // bit 0
6470 #define SMT1PRAIE PIE4bits.SMT1PRAIE // bit 1
6471 #define SMT1PWAIE PIE4bits.SMT1PWAIE // bit 2
6472 #define SMT2IE PIE4bits.SMT2IE // bit 3
6473 #define SMT2PRAIE PIE4bits.SMT2PRAIE // bit 4
6474 #define SMT2PWAIE PIE4bits.SMT2PWAIE // bit 5
6475 #define CRCIE PIE4bits.CRCIE // bit 6
6476 #define SCANIE PIE4bits.SCANIE // bit 7
6478 #define TMR1IF PIR1bits.TMR1IF // bit 0
6479 #define TMR2IF PIR1bits.TMR2IF // bit 1
6480 #define CCP1IF PIR1bits.CCP1IF // bit 2
6481 #define ADIF PIR1bits.ADIF // bit 6
6482 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6484 #define CCP2IF PIR2bits.CCP2IF // bit 0
6485 #define TMR4IF PIR2bits.TMR4IF // bit 1
6486 #define TMR6IF PIR2bits.TMR6IF // bit 2
6487 #define C1IF PIR2bits.C1IF // bit 5
6488 #define C2IF PIR2bits.C2IF // bit 6
6490 #define ZCDIF PIR3bits.ZCDIF // bit 4
6491 #define CWGIF PIR3bits.CWGIF // bit 5
6493 #define SMT1IF PIR4bits.SMT1IF // bit 0
6494 #define SMT1PRAIF PIR4bits.SMT1PRAIF // bit 1
6495 #define SMT1PWAIF PIR4bits.SMT1PWAIF // bit 2
6496 #define SMT2IF PIR4bits.SMT2IF // bit 3
6497 #define SMT2PRAIF PIR4bits.SMT2PRAIF // bit 4
6498 #define SMT2PWAIF PIR4bits.SMT2PWAIF // bit 5
6499 #define CRCIF PIR4bits.CRCIF // bit 6
6500 #define SCANIF PIR4bits.SCANIF // bit 7
6502 #define RD PMCON1bits.RD // bit 0
6503 #define WR PMCON1bits.WR // bit 1
6504 #define WREN PMCON1bits.WREN // bit 2
6505 #define WRERR PMCON1bits.WRERR // bit 3
6506 #define FREE PMCON1bits.FREE // bit 4
6507 #define LWLO PMCON1bits.LWLO // bit 5
6508 #define CFGS PMCON1bits.CFGS // bit 6
6510 #define RA0 PORTAbits.RA0 // bit 0
6511 #define RA1 PORTAbits.RA1 // bit 1
6512 #define RA2 PORTAbits.RA2 // bit 2
6513 #define RA3 PORTAbits.RA3 // bit 3
6514 #define RA4 PORTAbits.RA4 // bit 4
6515 #define RA5 PORTAbits.RA5 // bit 5
6517 #define HADR8 SCANHADRHbits.HADR8 // bit 0, shadows bit in SCANHADRHbits
6518 #define SCANHADR8 SCANHADRHbits.SCANHADR8 // bit 0, shadows bit in SCANHADRHbits
6519 #define HADR9 SCANHADRHbits.HADR9 // bit 1, shadows bit in SCANHADRHbits
6520 #define SCANHADR9 SCANHADRHbits.SCANHADR9 // bit 1, shadows bit in SCANHADRHbits
6521 #define HADR10 SCANHADRHbits.HADR10 // bit 2, shadows bit in SCANHADRHbits
6522 #define SCANHADR10 SCANHADRHbits.SCANHADR10 // bit 2, shadows bit in SCANHADRHbits
6523 #define HADR11 SCANHADRHbits.HADR11 // bit 3, shadows bit in SCANHADRHbits
6524 #define SCANHADR11 SCANHADRHbits.SCANHADR11 // bit 3, shadows bit in SCANHADRHbits
6525 #define HADR12 SCANHADRHbits.HADR12 // bit 4, shadows bit in SCANHADRHbits
6526 #define SCANHADR12 SCANHADRHbits.SCANHADR12 // bit 4, shadows bit in SCANHADRHbits
6527 #define HADR13 SCANHADRHbits.HADR13 // bit 5, shadows bit in SCANHADRHbits
6528 #define SCANHADR13 SCANHADRHbits.SCANHADR13 // bit 5, shadows bit in SCANHADRHbits
6529 #define HADR14 SCANHADRHbits.HADR14 // bit 6, shadows bit in SCANHADRHbits
6530 #define SCANHADR14 SCANHADRHbits.SCANHADR14 // bit 6, shadows bit in SCANHADRHbits
6531 #define HADR15 SCANHADRHbits.HADR15 // bit 7, shadows bit in SCANHADRHbits
6532 #define SCANHADR15 SCANHADRHbits.SCANHADR15 // bit 7, shadows bit in SCANHADRHbits
6534 #define HADR0 SCANHADRLbits.HADR0 // bit 0, shadows bit in SCANHADRLbits
6535 #define SCANHADR0 SCANHADRLbits.SCANHADR0 // bit 0, shadows bit in SCANHADRLbits
6536 #define HADR1 SCANHADRLbits.HADR1 // bit 1, shadows bit in SCANHADRLbits
6537 #define SCANHADR1 SCANHADRLbits.SCANHADR1 // bit 1, shadows bit in SCANHADRLbits
6538 #define HARD2 SCANHADRLbits.HARD2 // bit 2, shadows bit in SCANHADRLbits
6539 #define SCANHADR2 SCANHADRLbits.SCANHADR2 // bit 2, shadows bit in SCANHADRLbits
6540 #define HADR3 SCANHADRLbits.HADR3 // bit 3, shadows bit in SCANHADRLbits
6541 #define SCANHADR3 SCANHADRLbits.SCANHADR3 // bit 3, shadows bit in SCANHADRLbits
6542 #define HADR4 SCANHADRLbits.HADR4 // bit 4, shadows bit in SCANHADRLbits
6543 #define SCANHADR4 SCANHADRLbits.SCANHADR4 // bit 4, shadows bit in SCANHADRLbits
6544 #define HADR5 SCANHADRLbits.HADR5 // bit 5, shadows bit in SCANHADRLbits
6545 #define SCANHADR5 SCANHADRLbits.SCANHADR5 // bit 5, shadows bit in SCANHADRLbits
6546 #define HADR6 SCANHADRLbits.HADR6 // bit 6, shadows bit in SCANHADRLbits
6547 #define SCANHADR6 SCANHADRLbits.SCANHADR6 // bit 6, shadows bit in SCANHADRLbits
6548 #define HADR7 SCANHADRLbits.HADR7 // bit 7, shadows bit in SCANHADRLbits
6549 #define SCANHADR7 SCANHADRLbits.SCANHADR7 // bit 7, shadows bit in SCANHADRLbits
6551 #define LADR8 SCANLADRHbits.LADR8 // bit 0, shadows bit in SCANLADRHbits
6552 #define SCANLADR8 SCANLADRHbits.SCANLADR8 // bit 0, shadows bit in SCANLADRHbits
6553 #define LADR9 SCANLADRHbits.LADR9 // bit 1, shadows bit in SCANLADRHbits
6554 #define SCANLADR9 SCANLADRHbits.SCANLADR9 // bit 1, shadows bit in SCANLADRHbits
6555 #define LADR10 SCANLADRHbits.LADR10 // bit 2, shadows bit in SCANLADRHbits
6556 #define SCANLADR10 SCANLADRHbits.SCANLADR10 // bit 2, shadows bit in SCANLADRHbits
6557 #define LADR11 SCANLADRHbits.LADR11 // bit 3, shadows bit in SCANLADRHbits
6558 #define SCANLADR11 SCANLADRHbits.SCANLADR11 // bit 3, shadows bit in SCANLADRHbits
6559 #define LADR12 SCANLADRHbits.LADR12 // bit 4, shadows bit in SCANLADRHbits
6560 #define SCANLADR12 SCANLADRHbits.SCANLADR12 // bit 4, shadows bit in SCANLADRHbits
6561 #define LADR13 SCANLADRHbits.LADR13 // bit 5, shadows bit in SCANLADRHbits
6562 #define SCANLADR13 SCANLADRHbits.SCANLADR13 // bit 5, shadows bit in SCANLADRHbits
6563 #define LADR14 SCANLADRHbits.LADR14 // bit 6, shadows bit in SCANLADRHbits
6564 #define SCANLADR14 SCANLADRHbits.SCANLADR14 // bit 6, shadows bit in SCANLADRHbits
6565 #define LADR15 SCANLADRHbits.LADR15 // bit 7, shadows bit in SCANLADRHbits
6566 #define SCANLADR15 SCANLADRHbits.SCANLADR15 // bit 7, shadows bit in SCANLADRHbits
6568 #define LDAR0 SCANLADRLbits.LDAR0 // bit 0, shadows bit in SCANLADRLbits
6569 #define SCANLADR0 SCANLADRLbits.SCANLADR0 // bit 0, shadows bit in SCANLADRLbits
6570 #define LDAR1 SCANLADRLbits.LDAR1 // bit 1, shadows bit in SCANLADRLbits
6571 #define SCANLADR1 SCANLADRLbits.SCANLADR1 // bit 1, shadows bit in SCANLADRLbits
6572 #define LADR2 SCANLADRLbits.LADR2 // bit 2, shadows bit in SCANLADRLbits
6573 #define SCANLADR2 SCANLADRLbits.SCANLADR2 // bit 2, shadows bit in SCANLADRLbits
6574 #define LADR3 SCANLADRLbits.LADR3 // bit 3, shadows bit in SCANLADRLbits
6575 #define SCANLADR3 SCANLADRLbits.SCANLADR3 // bit 3, shadows bit in SCANLADRLbits
6576 #define LADR4 SCANLADRLbits.LADR4 // bit 4, shadows bit in SCANLADRLbits
6577 #define SCANLADR4 SCANLADRLbits.SCANLADR4 // bit 4, shadows bit in SCANLADRLbits
6578 #define LADR5 SCANLADRLbits.LADR5 // bit 5, shadows bit in SCANLADRLbits
6579 #define SCANLADR5 SCANLADRLbits.SCANLADR5 // bit 5, shadows bit in SCANLADRLbits
6580 #define LADR6 SCANLADRLbits.LADR6 // bit 6, shadows bit in SCANLADRLbits
6581 #define SCANLADR6 SCANLADRLbits.SCANLADR6 // bit 6, shadows bit in SCANLADRLbits
6582 #define LADR7 SCANLADRLbits.LADR7 // bit 7, shadows bit in SCANLADRLbits
6583 #define SCANLADR7 SCANLADRLbits.SCANLADR7 // bit 7, shadows bit in SCANLADRLbits
6585 #define TSEL0 SCANTRIGbits.TSEL0 // bit 0, shadows bit in SCANTRIGbits
6586 #define SCANTSEL0 SCANTRIGbits.SCANTSEL0 // bit 0, shadows bit in SCANTRIGbits
6587 #define TSEL1 SCANTRIGbits.TSEL1 // bit 1, shadows bit in SCANTRIGbits
6588 #define SCANTSEL1 SCANTRIGbits.SCANTSEL1 // bit 1, shadows bit in SCANTRIGbits
6590 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
6591 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
6592 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
6593 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
6594 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
6596 #define CSEL0 SMT1CLKbits.CSEL0 // bit 0, shadows bit in SMT1CLKbits
6597 #define SMT1CSEL0 SMT1CLKbits.SMT1CSEL0 // bit 0, shadows bit in SMT1CLKbits
6598 #define CSEL1 SMT1CLKbits.CSEL1 // bit 1, shadows bit in SMT1CLKbits
6599 #define SMT1CSEL1 SMT1CLKbits.SMT1CSEL1 // bit 1, shadows bit in SMT1CLKbits
6600 #define CSEL2 SMT1CLKbits.CSEL2 // bit 2, shadows bit in SMT1CLKbits
6601 #define SMT1CSEL2 SMT1CLKbits.SMT1CSEL2 // bit 2, shadows bit in SMT1CLKbits
6603 #define SMT1CPR8 SMT1CPRHbits.SMT1CPR8 // bit 0
6604 #define SMT1CPR9 SMT1CPRHbits.SMT1CPR9 // bit 1
6605 #define SMT1CPR10 SMT1CPRHbits.SMT1CPR10 // bit 2
6606 #define SMT1CPR11 SMT1CPRHbits.SMT1CPR11 // bit 3
6607 #define SMT1CPR12 SMT1CPRHbits.SMT1CPR12 // bit 4
6608 #define SMT1CPR13 SMT1CPRHbits.SMT1CPR13 // bit 5
6609 #define SMT1CPR14 SMT1CPRHbits.SMT1CPR14 // bit 6
6610 #define SMT1CPR15 SMT1CPRHbits.SMT1CPR15 // bit 7
6612 #define SMT1CPR0 SMT1CPRLbits.SMT1CPR0 // bit 0
6613 #define SMT1CPR1 SMT1CPRLbits.SMT1CPR1 // bit 1
6614 #define SMT1CPR2 SMT1CPRLbits.SMT1CPR2 // bit 2
6615 #define SMT1CPR3 SMT1CPRLbits.SMT1CPR3 // bit 3
6616 #define SMT1CPR4 SMT1CPRLbits.SMT1CPR4 // bit 4
6617 #define SMT1CPR5 SMT1CPRLbits.SMT1CPR5 // bit 5
6618 #define SMT1CPR6 SMT1CPRLbits.SMT1CPR6 // bit 6
6619 #define SMT1CPR7 SMT1CPRLbits.SMT1CPR7 // bit 7
6621 #define SMT1CPR16 SMT1CPRUbits.SMT1CPR16 // bit 0
6622 #define SMT1CPR17 SMT1CPRUbits.SMT1CPR17 // bit 1
6623 #define SMT1CPR18 SMT1CPRUbits.SMT1CPR18 // bit 2
6624 #define SMT1CPR19 SMT1CPRUbits.SMT1CPR19 // bit 3
6625 #define SMT1CPR20 SMT1CPRUbits.SMT1CPR20 // bit 4
6626 #define SMT1CPR21 SMT1CPRUbits.SMT1CPR21 // bit 5
6627 #define SMT1CPR22 SMT1CPRUbits.SMT1CPR22 // bit 6
6628 #define SMT1CPR23 SMT1CPRUbits.SMT1CPR23 // bit 7
6630 #define SMT1CPW8 SMT1CPWHbits.SMT1CPW8 // bit 0
6631 #define SMT1CPW9 SMT1CPWHbits.SMT1CPW9 // bit 1
6632 #define SMT1CPW10 SMT1CPWHbits.SMT1CPW10 // bit 2
6633 #define SMT1CPW11 SMT1CPWHbits.SMT1CPW11 // bit 3
6634 #define SMT1CPW12 SMT1CPWHbits.SMT1CPW12 // bit 4
6635 #define SMT1CPW13 SMT1CPWHbits.SMT1CPW13 // bit 5
6636 #define SMT1CPW14 SMT1CPWHbits.SMT1CPW14 // bit 6
6637 #define SMT1CPW15 SMT1CPWHbits.SMT1CPW15 // bit 7
6639 #define SMT1CPW0 SMT1CPWLbits.SMT1CPW0 // bit 0
6640 #define SMT1CPW1 SMT1CPWLbits.SMT1CPW1 // bit 1
6641 #define SMT1CPW2 SMT1CPWLbits.SMT1CPW2 // bit 2
6642 #define SMT1CPW3 SMT1CPWLbits.SMT1CPW3 // bit 3
6643 #define SMT1CPW4 SMT1CPWLbits.SMT1CPW4 // bit 4
6644 #define SMT1CPW5 SMT1CPWLbits.SMT1CPW5 // bit 5
6645 #define SMT1CPW6 SMT1CPWLbits.SMT1CPW6 // bit 6
6646 #define SMT1CPW7 SMT1CPWLbits.SMT1CPW7 // bit 7
6648 #define SMT1CPW16 SMT1CPWUbits.SMT1CPW16 // bit 0
6649 #define SMT1CPW17 SMT1CPWUbits.SMT1CPW17 // bit 1
6650 #define SMT1CPW18 SMT1CPWUbits.SMT1CPW18 // bit 2
6651 #define SMT1CPW19 SMT1CPWUbits.SMT1CPW19 // bit 3
6652 #define SMT1CPW20 SMT1CPWUbits.SMT1CPW20 // bit 4
6653 #define SMT1CPW21 SMT1CPWUbits.SMT1CPW21 // bit 5
6654 #define SMT1CPW22 SMT1CPWUbits.SMT1CPW22 // bit 6
6655 #define SMT1CPW23 SMT1CPWUbits.SMT1CPW23 // bit 7
6657 #define SMT1PR8 SMT1PRHbits.SMT1PR8 // bit 0
6658 #define SMT1PR9 SMT1PRHbits.SMT1PR9 // bit 1
6659 #define SMT1PR10 SMT1PRHbits.SMT1PR10 // bit 2
6660 #define SMT1PR11 SMT1PRHbits.SMT1PR11 // bit 3
6661 #define SMT1PR12 SMT1PRHbits.SMT1PR12 // bit 4
6662 #define SMT1PR13 SMT1PRHbits.SMT1PR13 // bit 5
6663 #define SMT1PR14 SMT1PRHbits.SMT1PR14 // bit 6
6664 #define SMT1PR15 SMT1PRHbits.SMT1PR15 // bit 7
6666 #define SMT1PR0 SMT1PRLbits.SMT1PR0 // bit 0
6667 #define SMT1PR1 SMT1PRLbits.SMT1PR1 // bit 1
6668 #define SMT1PR2 SMT1PRLbits.SMT1PR2 // bit 2
6669 #define SMT1PR3 SMT1PRLbits.SMT1PR3 // bit 3
6670 #define SMT1PR4 SMT1PRLbits.SMT1PR4 // bit 4
6671 #define SMT1PR5 SMT1PRLbits.SMT1PR5 // bit 5
6672 #define SMT1PR6 SMT1PRLbits.SMT1PR6 // bit 6
6673 #define SMT1PR7 SMT1PRLbits.SMT1PR7 // bit 7
6675 #define SMT1PR16 SMT1PRUbits.SMT1PR16 // bit 0
6676 #define SMT1PR17 SMT1PRUbits.SMT1PR17 // bit 1
6677 #define SMT1PR18 SMT1PRUbits.SMT1PR18 // bit 2
6678 #define SMT1PR19 SMT1PRUbits.SMT1PR19 // bit 3
6679 #define SMT1PR20 SMT1PRUbits.SMT1PR20 // bit 4
6680 #define SMT1PR21 SMT1PRUbits.SMT1PR21 // bit 5
6681 #define SMT1PR22 SMT1PRUbits.SMT1PR22 // bit 6
6682 #define SMT1PR23 SMT1PRUbits.SMT1PR23 // bit 7
6684 #define SSEL0 SMT1SIGbits.SSEL0 // bit 0, shadows bit in SMT1SIGbits
6685 #define SMT1SSEL0 SMT1SIGbits.SMT1SSEL0 // bit 0, shadows bit in SMT1SIGbits
6686 #define SSEL1 SMT1SIGbits.SSEL1 // bit 1, shadows bit in SMT1SIGbits
6687 #define SMT1SSEL1 SMT1SIGbits.SMT1SSEL1 // bit 1, shadows bit in SMT1SIGbits
6688 #define SSEL2 SMT1SIGbits.SSEL2 // bit 2, shadows bit in SMT1SIGbits
6689 #define SMT1SSEL2 SMT1SIGbits.SMT1SSEL2 // bit 2, shadows bit in SMT1SIGbits
6691 #define AS SMT1STATbits.AS // bit 0, shadows bit in SMT1STATbits
6692 #define SMT1AS SMT1STATbits.SMT1AS // bit 0, shadows bit in SMT1STATbits
6693 #define WS SMT1STATbits.WS // bit 1, shadows bit in SMT1STATbits
6694 #define SMT1WS SMT1STATbits.SMT1WS // bit 1, shadows bit in SMT1STATbits
6695 #define TS SMT1STATbits.TS // bit 2, shadows bit in SMT1STATbits
6696 #define SMT1TS SMT1STATbits.SMT1TS // bit 2, shadows bit in SMT1STATbits
6697 #define RST SMT1STATbits.RST // bit 5, shadows bit in SMT1STATbits
6698 #define SMT1RESET SMT1STATbits.SMT1RESET // bit 5, shadows bit in SMT1STATbits
6699 #define CPWUP SMT1STATbits.CPWUP // bit 6, shadows bit in SMT1STATbits
6700 #define SMT1CPWUP SMT1STATbits.SMT1CPWUP // bit 6, shadows bit in SMT1STATbits
6701 #define CPRUP SMT1STATbits.CPRUP // bit 7, shadows bit in SMT1STATbits
6702 #define SMT1CPRUP SMT1STATbits.SMT1CPRUP // bit 7, shadows bit in SMT1STATbits
6704 #define SMT1TMR8 SMT1TMRHbits.SMT1TMR8 // bit 0
6705 #define SMT1TMR9 SMT1TMRHbits.SMT1TMR9 // bit 1
6706 #define SMT1TMR10 SMT1TMRHbits.SMT1TMR10 // bit 2
6707 #define SMT1TMR11 SMT1TMRHbits.SMT1TMR11 // bit 3
6708 #define SMT1TMR12 SMT1TMRHbits.SMT1TMR12 // bit 4
6709 #define SMT1TMR13 SMT1TMRHbits.SMT1TMR13 // bit 5
6710 #define SMT1TMR14 SMT1TMRHbits.SMT1TMR14 // bit 6
6711 #define SMT1TMR15 SMT1TMRHbits.SMT1TMR15 // bit 7
6713 #define SMT1TMR0 SMT1TMRLbits.SMT1TMR0 // bit 0
6714 #define SMT1TMR1 SMT1TMRLbits.SMT1TMR1 // bit 1
6715 #define SMT1TMR2 SMT1TMRLbits.SMT1TMR2 // bit 2
6716 #define SMT1TMR3 SMT1TMRLbits.SMT1TMR3 // bit 3
6717 #define SMT1TMR4 SMT1TMRLbits.SMT1TMR4 // bit 4
6718 #define SMT1TMR5 SMT1TMRLbits.SMT1TMR5 // bit 5
6719 #define SMT1TMR6 SMT1TMRLbits.SMT1TMR6 // bit 6
6720 #define SMT1TMR7 SMT1TMRLbits.SMT1TMR7 // bit 7
6722 #define SMT1TMR16 SMT1TMRUbits.SMT1TMR16 // bit 0
6723 #define SMT1TMR17 SMT1TMRUbits.SMT1TMR17 // bit 1
6724 #define SMT1TMR18 SMT1TMRUbits.SMT1TMR18 // bit 2
6725 #define SMT1TMR19 SMT1TMRUbits.SMT1TMR19 // bit 3
6726 #define SMT1TMR20 SMT1TMRUbits.SMT1TMR20 // bit 4
6727 #define SMT1TMR21 SMT1TMRUbits.SMT1TMR21 // bit 5
6728 #define SMT1TMR22 SMT1TMRUbits.SMT1TMR22 // bit 6
6729 #define SMT1TMR23 SMT1TMRUbits.SMT1TMR23 // bit 7
6731 #define WSEL0 SMT1WINbits.WSEL0 // bit 0, shadows bit in SMT1WINbits
6732 #define SMT1WSEL0 SMT1WINbits.SMT1WSEL0 // bit 0, shadows bit in SMT1WINbits
6733 #define WSEL1 SMT1WINbits.WSEL1 // bit 1, shadows bit in SMT1WINbits
6734 #define SMT1WSEL1 SMT1WINbits.SMT1WSEL1 // bit 1, shadows bit in SMT1WINbits
6735 #define WSEL2 SMT1WINbits.WSEL2 // bit 2, shadows bit in SMT1WINbits
6736 #define SMT1WSEL2 SMT1WINbits.SMT1WSEL2 // bit 2, shadows bit in SMT1WINbits
6737 #define WSEL3 SMT1WINbits.WSEL3 // bit 3, shadows bit in SMT1WINbits
6738 #define SMT1WSEL3 SMT1WINbits.SMT1WSEL3 // bit 3, shadows bit in SMT1WINbits
6740 #define SMT2CPR8 SMT2CPRHbits.SMT2CPR8 // bit 0
6741 #define SMT2CPR9 SMT2CPRHbits.SMT2CPR9 // bit 1
6742 #define SMT2CPR10 SMT2CPRHbits.SMT2CPR10 // bit 2
6743 #define SMT2CPR11 SMT2CPRHbits.SMT2CPR11 // bit 3
6744 #define SMT2CPR12 SMT2CPRHbits.SMT2CPR12 // bit 4
6745 #define SMT2CPR13 SMT2CPRHbits.SMT2CPR13 // bit 5
6746 #define SMT2CPR14 SMT2CPRHbits.SMT2CPR14 // bit 6
6747 #define SMT2CPR15 SMT2CPRHbits.SMT2CPR15 // bit 7
6749 #define SMT2CPR0 SMT2CPRLbits.SMT2CPR0 // bit 0
6750 #define SMT2CPR1 SMT2CPRLbits.SMT2CPR1 // bit 1
6751 #define SMT2CPR2 SMT2CPRLbits.SMT2CPR2 // bit 2
6752 #define SMT2CPR3 SMT2CPRLbits.SMT2CPR3 // bit 3
6753 #define SMT2CPR4 SMT2CPRLbits.SMT2CPR4 // bit 4
6754 #define SMT2CPR5 SMT2CPRLbits.SMT2CPR5 // bit 5
6755 #define SMT2CPR6 SMT2CPRLbits.SMT2CPR6 // bit 6
6756 #define SMT2CPR7 SMT2CPRLbits.SMT2CPR7 // bit 7
6758 #define SMT2CPR16 SMT2CPRUbits.SMT2CPR16 // bit 0
6759 #define SMT2CPR17 SMT2CPRUbits.SMT2CPR17 // bit 1
6760 #define SMT2CPR18 SMT2CPRUbits.SMT2CPR18 // bit 2
6761 #define SMT2CPR19 SMT2CPRUbits.SMT2CPR19 // bit 3
6762 #define SMT2CPR20 SMT2CPRUbits.SMT2CPR20 // bit 4
6763 #define SMT2CPR21 SMT2CPRUbits.SMT2CPR21 // bit 5
6764 #define SMT2CPR22 SMT2CPRUbits.SMT2CPR22 // bit 6
6765 #define SMT2CPR23 SMT2CPRUbits.SMT2CPR23 // bit 7
6767 #define SMT2CPW8 SMT2CPWHbits.SMT2CPW8 // bit 0
6768 #define SMT2CPW9 SMT2CPWHbits.SMT2CPW9 // bit 1
6769 #define SMT2CPW10 SMT2CPWHbits.SMT2CPW10 // bit 2
6770 #define SMT2CPW11 SMT2CPWHbits.SMT2CPW11 // bit 3
6771 #define SMT2CPW12 SMT2CPWHbits.SMT2CPW12 // bit 4
6772 #define SMT2CPW13 SMT2CPWHbits.SMT2CPW13 // bit 5
6773 #define SMT2CPW14 SMT2CPWHbits.SMT2CPW14 // bit 6
6774 #define SMT2CPW15 SMT2CPWHbits.SMT2CPW15 // bit 7
6776 #define SMT2CPW0 SMT2CPWLbits.SMT2CPW0 // bit 0
6777 #define SMT2CPW1 SMT2CPWLbits.SMT2CPW1 // bit 1
6778 #define SMT2CPW2 SMT2CPWLbits.SMT2CPW2 // bit 2
6779 #define SMT2CPW3 SMT2CPWLbits.SMT2CPW3 // bit 3
6780 #define SMT2CPW4 SMT2CPWLbits.SMT2CPW4 // bit 4
6781 #define SMT2CPW5 SMT2CPWLbits.SMT2CPW5 // bit 5
6782 #define SMT2CPW6 SMT2CPWLbits.SMT2CPW6 // bit 6
6783 #define SMT2CPW7 SMT2CPWLbits.SMT2CPW7 // bit 7
6785 #define SMT2CPW16 SMT2CPWUbits.SMT2CPW16 // bit 0
6786 #define SMT2CPW17 SMT2CPWUbits.SMT2CPW17 // bit 1
6787 #define SMT2CPW18 SMT2CPWUbits.SMT2CPW18 // bit 2
6788 #define SMT2CPW19 SMT2CPWUbits.SMT2CPW19 // bit 3
6789 #define SMT2CPW20 SMT2CPWUbits.SMT2CPW20 // bit 4
6790 #define SMT2CPW21 SMT2CPWUbits.SMT2CPW21 // bit 5
6791 #define SMT2CPW22 SMT2CPWUbits.SMT2CPW22 // bit 6
6792 #define SMT2CPW23 SMT2CPWUbits.SMT2CPW23 // bit 7
6794 #define SMT2PR8 SMT2PRHbits.SMT2PR8 // bit 0
6795 #define SMT2PR9 SMT2PRHbits.SMT2PR9 // bit 1
6796 #define SMT2PR10 SMT2PRHbits.SMT2PR10 // bit 2
6797 #define SMT2PR11 SMT2PRHbits.SMT2PR11 // bit 3
6798 #define SMT2PR12 SMT2PRHbits.SMT2PR12 // bit 4
6799 #define SMT2PR13 SMT2PRHbits.SMT2PR13 // bit 5
6800 #define SMT2PR14 SMT2PRHbits.SMT2PR14 // bit 6
6801 #define SMT2PR15 SMT2PRHbits.SMT2PR15 // bit 7
6803 #define SMT2PR0 SMT2PRLbits.SMT2PR0 // bit 0
6804 #define SMT2PR1 SMT2PRLbits.SMT2PR1 // bit 1
6805 #define SMT2PR2 SMT2PRLbits.SMT2PR2 // bit 2
6806 #define SMT2PR3 SMT2PRLbits.SMT2PR3 // bit 3
6807 #define SMT2PR4 SMT2PRLbits.SMT2PR4 // bit 4
6808 #define SMT2PR5 SMT2PRLbits.SMT2PR5 // bit 5
6809 #define SMT2PR6 SMT2PRLbits.SMT2PR6 // bit 6
6810 #define SMT2PR7 SMT2PRLbits.SMT2PR7 // bit 7
6812 #define SMT2PR16 SMT2PRUbits.SMT2PR16 // bit 0
6813 #define SMT2PR17 SMT2PRUbits.SMT2PR17 // bit 1
6814 #define SMT2PR18 SMT2PRUbits.SMT2PR18 // bit 2
6815 #define SMT2PR19 SMT2PRUbits.SMT2PR19 // bit 3
6816 #define SMT2PR20 SMT2PRUbits.SMT2PR20 // bit 4
6817 #define SMT2PR21 SMT2PRUbits.SMT2PR21 // bit 5
6818 #define SMT2PR22 SMT2PRUbits.SMT2PR22 // bit 6
6819 #define SMT2PR23 SMT2PRUbits.SMT2PR23 // bit 7
6821 #define SMT2TMR8 SMT2TMRHbits.SMT2TMR8 // bit 0
6822 #define SMT2TMR9 SMT2TMRHbits.SMT2TMR9 // bit 1
6823 #define SMT2TMR10 SMT2TMRHbits.SMT2TMR10 // bit 2
6824 #define SMT2TMR11 SMT2TMRHbits.SMT2TMR11 // bit 3
6825 #define SMT2TMR12 SMT2TMRHbits.SMT2TMR12 // bit 4
6826 #define SMT2TMR13 SMT2TMRHbits.SMT2TMR13 // bit 5
6827 #define SMT2TMR14 SMT2TMRHbits.SMT2TMR14 // bit 6
6828 #define SMT2TMR15 SMT2TMRHbits.SMT2TMR15 // bit 7
6830 #define SMT2TMR0 SMT2TMRLbits.SMT2TMR0 // bit 0
6831 #define SMT2TMR1 SMT2TMRLbits.SMT2TMR1 // bit 1
6832 #define SMT2TMR2 SMT2TMRLbits.SMT2TMR2 // bit 2
6833 #define SMT2TMR3 SMT2TMRLbits.SMT2TMR3 // bit 3
6834 #define SMT2TMR4 SMT2TMRLbits.SMT2TMR4 // bit 4
6835 #define SMT2TMR5 SMT2TMRLbits.SMT2TMR5 // bit 5
6836 #define SMT2TMR6 SMT2TMRLbits.SMT2TMR6 // bit 6
6837 #define SMT2TMR7 SMT2TMRLbits.SMT2TMR7 // bit 7
6839 #define SMT2TMR16 SMT2TMRUbits.SMT2TMR16 // bit 0
6840 #define SMT2TMR17 SMT2TMRUbits.SMT2TMR17 // bit 1
6841 #define SMT2TMR18 SMT2TMRUbits.SMT2TMR18 // bit 2
6842 #define SMT2TMR19 SMT2TMRUbits.SMT2TMR19 // bit 3
6843 #define SMT2TMR20 SMT2TMRUbits.SMT2TMR20 // bit 4
6844 #define SMT2TMR21 SMT2TMRUbits.SMT2TMR21 // bit 5
6845 #define SMT2TMR22 SMT2TMRUbits.SMT2TMR22 // bit 6
6846 #define SMT2TMR23 SMT2TMRUbits.SMT2TMR23 // bit 7
6848 #define C STATUSbits.C // bit 0
6849 #define DC STATUSbits.DC // bit 1
6850 #define Z STATUSbits.Z // bit 2
6851 #define NOT_PD STATUSbits.NOT_PD // bit 3
6852 #define NOT_TO STATUSbits.NOT_TO // bit 4
6854 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
6855 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
6856 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
6858 #define TMR1ON T1CONbits.TMR1ON // bit 0
6859 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
6860 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
6861 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
6862 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
6863 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
6865 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
6866 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
6867 #define T1GVAL T1GCONbits.T1GVAL // bit 2
6868 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
6869 #define T1GSPM T1GCONbits.T1GSPM // bit 4
6870 #define T1GTM T1GCONbits.T1GTM // bit 5
6871 #define T1GPOL T1GCONbits.T1GPOL // bit 6
6872 #define TMR1GE T1GCONbits.TMR1GE // bit 7
6874 #define T2CS0 T2CLKCONbits.T2CS0 // bit 0
6875 #define T2CS1 T2CLKCONbits.T2CS1 // bit 1
6876 #define T2CS2 T2CLKCONbits.T2CS2 // bit 2
6878 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 0, shadows bit in T2CONbits
6879 #define OUTPS0 T2CONbits.OUTPS0 // bit 0, shadows bit in T2CONbits
6880 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 1, shadows bit in T2CONbits
6881 #define OUTPS1 T2CONbits.OUTPS1 // bit 1, shadows bit in T2CONbits
6882 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 2, shadows bit in T2CONbits
6883 #define OUTPS2 T2CONbits.OUTPS2 // bit 2, shadows bit in T2CONbits
6884 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 3, shadows bit in T2CONbits
6885 #define OUTPS3 T2CONbits.OUTPS3 // bit 3, shadows bit in T2CONbits
6886 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 4, shadows bit in T2CONbits
6887 #define CKPS0 T2CONbits.CKPS0 // bit 4, shadows bit in T2CONbits
6888 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 5, shadows bit in T2CONbits
6889 #define CKPS1 T2CONbits.CKPS1 // bit 5, shadows bit in T2CONbits
6890 #define T2CKPS2 T2CONbits.T2CKPS2 // bit 6, shadows bit in T2CONbits
6891 #define CKPS2 T2CONbits.CKPS2 // bit 6, shadows bit in T2CONbits
6892 #define ON T2CONbits.ON // bit 7, shadows bit in T2CONbits
6893 #define T2ON T2CONbits.T2ON // bit 7, shadows bit in T2CONbits
6894 #define TMR2ON T2CONbits.TMR2ON // bit 7, shadows bit in T2CONbits
6896 #define RSEL0 T2RSTbits.RSEL0 // bit 0, shadows bit in T2RSTbits
6897 #define T2RSEL0 T2RSTbits.T2RSEL0 // bit 0, shadows bit in T2RSTbits
6898 #define RSEL1 T2RSTbits.RSEL1 // bit 1, shadows bit in T2RSTbits
6899 #define T2RSEL1 T2RSTbits.T2RSEL1 // bit 1, shadows bit in T2RSTbits
6900 #define RSEL2 T2RSTbits.RSEL2 // bit 2, shadows bit in T2RSTbits
6901 #define T2RSEL2 T2RSTbits.T2RSEL2 // bit 2, shadows bit in T2RSTbits
6902 #define RSEL3 T2RSTbits.RSEL3 // bit 3, shadows bit in T2RSTbits
6903 #define T2RSEL3 T2RSTbits.T2RSEL3 // bit 3, shadows bit in T2RSTbits
6905 #define T4CS0 T4CLKCONbits.T4CS0 // bit 0
6906 #define T4CS1 T4CLKCONbits.T4CS1 // bit 1
6907 #define T4CS2 T4CLKCONbits.T4CS2 // bit 2
6909 #define T6CS0 T6CLKCONbits.T6CS0 // bit 0
6910 #define T6CS1 T6CLKCONbits.T6CS1 // bit 1
6911 #define T6CS2 T6CLKCONbits.T6CS2 // bit 2
6913 #define TRISA0 TRISAbits.TRISA0 // bit 0
6914 #define TRISA1 TRISAbits.TRISA1 // bit 1
6915 #define TRISA2 TRISAbits.TRISA2 // bit 2
6916 #define TRISA3 TRISAbits.TRISA3 // bit 3
6917 #define TRISA4 TRISAbits.TRISA4 // bit 4
6918 #define TRISA5 TRISAbits.TRISA5 // bit 5
6920 #define VREGPM0 VREGCONbits.VREGPM0 // bit 0
6921 #define VREGPM1 VREGCONbits.VREGPM1 // bit 1
6923 #define SEN WDTCON0bits.SEN // bit 0, shadows bit in WDTCON0bits
6924 #define SWDTEN WDTCON0bits.SWDTEN // bit 0, shadows bit in WDTCON0bits
6925 #define WDTSEN WDTCON0bits.WDTSEN // bit 0, shadows bit in WDTCON0bits
6926 #define WDTPS0 WDTCON0bits.WDTPS0 // bit 1
6927 #define WDTPS1 WDTCON0bits.WDTPS1 // bit 2
6928 #define WDTPS2 WDTCON0bits.WDTPS2 // bit 3
6929 #define WDTPS3 WDTCON0bits.WDTPS3 // bit 4
6930 #define WDTPS4 WDTCON0bits.WDTPS4 // bit 5
6932 #define WINDOW0 WDTCON1bits.WINDOW0 // bit 0, shadows bit in WDTCON1bits
6933 #define WDTWINDOW0 WDTCON1bits.WDTWINDOW0 // bit 0, shadows bit in WDTCON1bits
6934 #define WINDOW1 WDTCON1bits.WINDOW1 // bit 1, shadows bit in WDTCON1bits
6935 #define WDTWINDOW1 WDTCON1bits.WDTWINDOW1 // bit 1, shadows bit in WDTCON1bits
6936 #define WINDOW2 WDTCON1bits.WINDOW2 // bit 2, shadows bit in WDTCON1bits
6937 #define WDTWINDOW2 WDTCON1bits.WDTWINDOW2 // bit 2, shadows bit in WDTCON1bits
6938 #define WDTCS0 WDTCON1bits.WDTCS0 // bit 4
6939 #define WDTCS1 WDTCON1bits.WDTCS1 // bit 5
6940 #define WDTCS2 WDTCON1bits.WDTCS2 // bit 6
6942 #define PSCNT8 WDTPSHbits.PSCNT8 // bit 0, shadows bit in WDTPSHbits
6943 #define WDTPSCNT8 WDTPSHbits.WDTPSCNT8 // bit 0, shadows bit in WDTPSHbits
6944 #define PSCNT9 WDTPSHbits.PSCNT9 // bit 1, shadows bit in WDTPSHbits
6945 #define WDTPSCNT9 WDTPSHbits.WDTPSCNT9 // bit 1, shadows bit in WDTPSHbits
6946 #define PSCNT10 WDTPSHbits.PSCNT10 // bit 2, shadows bit in WDTPSHbits
6947 #define WDTPSCNT10 WDTPSHbits.WDTPSCNT10 // bit 2, shadows bit in WDTPSHbits
6948 #define PSCNT11 WDTPSHbits.PSCNT11 // bit 3, shadows bit in WDTPSHbits
6949 #define WDTPSCNT11 WDTPSHbits.WDTPSCNT11 // bit 3, shadows bit in WDTPSHbits
6950 #define PSCNT12 WDTPSHbits.PSCNT12 // bit 4, shadows bit in WDTPSHbits
6951 #define WDTPSCNT12 WDTPSHbits.WDTPSCNT12 // bit 4, shadows bit in WDTPSHbits
6952 #define PSCNT13 WDTPSHbits.PSCNT13 // bit 5, shadows bit in WDTPSHbits
6953 #define WDTPSCNT13 WDTPSHbits.WDTPSCNT13 // bit 5, shadows bit in WDTPSHbits
6954 #define PSCNT14 WDTPSHbits.PSCNT14 // bit 6, shadows bit in WDTPSHbits
6955 #define WDTPSCNT14 WDTPSHbits.WDTPSCNT14 // bit 6, shadows bit in WDTPSHbits
6956 #define PSCNT15 WDTPSHbits.PSCNT15 // bit 7, shadows bit in WDTPSHbits
6957 #define WDTPSCNT15 WDTPSHbits.WDTPSCNT15 // bit 7, shadows bit in WDTPSHbits
6959 #define PSCNT0 WDTPSLbits.PSCNT0 // bit 0, shadows bit in WDTPSLbits
6960 #define WDTPSCNT0 WDTPSLbits.WDTPSCNT0 // bit 0, shadows bit in WDTPSLbits
6961 #define PSCNT1 WDTPSLbits.PSCNT1 // bit 1, shadows bit in WDTPSLbits
6962 #define WDTPSCNT1 WDTPSLbits.WDTPSCNT1 // bit 1, shadows bit in WDTPSLbits
6963 #define PSCNT2 WDTPSLbits.PSCNT2 // bit 2, shadows bit in WDTPSLbits
6964 #define WDTPSCNT2 WDTPSLbits.WDTPSCNT2 // bit 2, shadows bit in WDTPSLbits
6965 #define PSCNT3 WDTPSLbits.PSCNT3 // bit 3, shadows bit in WDTPSLbits
6966 #define WDTPSCNT3 WDTPSLbits.WDTPSCNT3 // bit 3, shadows bit in WDTPSLbits
6967 #define PSCNT4 WDTPSLbits.PSCNT4 // bit 4, shadows bit in WDTPSLbits
6968 #define WDTPSCNT4 WDTPSLbits.WDTPSCNT4 // bit 4, shadows bit in WDTPSLbits
6969 #define PSCNT5 WDTPSLbits.PSCNT5 // bit 5, shadows bit in WDTPSLbits
6970 #define WDTPSCNT5 WDTPSLbits.WDTPSCNT5 // bit 5, shadows bit in WDTPSLbits
6971 #define PSCNT6 WDTPSLbits.PSCNT6 // bit 6, shadows bit in WDTPSLbits
6972 #define WDTPSCNT6 WDTPSLbits.WDTPSCNT6 // bit 6, shadows bit in WDTPSLbits
6973 #define PSCNT7 WDTPSLbits.PSCNT7 // bit 7, shadows bit in WDTPSLbits
6974 #define WDTPSCNT7 WDTPSLbits.WDTPSCNT7 // bit 7, shadows bit in WDTPSLbits
6976 #define PSCNT16 WDTTMRbits.PSCNT16 // bit 0, shadows bit in WDTTMRbits
6977 #define WDTPSCNT16 WDTTMRbits.WDTPSCNT16 // bit 0, shadows bit in WDTTMRbits
6978 #define PSCNT17 WDTTMRbits.PSCNT17 // bit 1, shadows bit in WDTTMRbits
6979 #define WDTPSCNT17 WDTTMRbits.WDTPSCNT17 // bit 1, shadows bit in WDTTMRbits
6980 #define STATE WDTTMRbits.STATE // bit 2, shadows bit in WDTTMRbits
6981 #define WDTSTATE WDTTMRbits.WDTSTATE // bit 2, shadows bit in WDTTMRbits
6982 #define WDTTMR0 WDTTMRbits.WDTTMR0 // bit 3
6983 #define WDTTMR1 WDTTMRbits.WDTTMR1 // bit 4
6984 #define WDTTMR2 WDTTMRbits.WDTTMR2 // bit 5
6985 #define WDTTMR3 WDTTMRbits.WDTTMR3 // bit 6
6986 #define WDTTMR4 WDTTMRbits.WDTTMR4 // bit 7
6988 #define WPUA0 WPUAbits.WPUA0 // bit 0
6989 #define WPUA1 WPUAbits.WPUA1 // bit 1
6990 #define WPUA2 WPUAbits.WPUA2 // bit 2
6991 #define WPUA3 WPUAbits.WPUA3 // bit 3
6992 #define WPUA4 WPUAbits.WPUA4 // bit 4
6993 #define WPUA5 WPUAbits.WPUA5 // bit 5
6995 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
6996 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
6997 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
6998 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
6999 #define ZCD1OE ZCD1CONbits.ZCD1OE // bit 6
7000 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
7002 #endif // #ifndef NO_BIT_DEFINES
7004 #endif // #ifndef __PIC12F1612_H__