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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic12lf1572.h
blob2d33dedd44c9be9c397501d359d55548505fb228
1 /*
2 * This declarations of the PIC12LF1572 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC12LF1572_H__
26 #define __PIC12LF1572_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define PIE1_ADDR 0x0091
65 #define PIE2_ADDR 0x0092
66 #define PIE3_ADDR 0x0093
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCTUNE_ADDR 0x0098
71 #define OSCCON_ADDR 0x0099
72 #define OSCSTAT_ADDR 0x009A
73 #define ADRES_ADDR 0x009B
74 #define ADRESL_ADDR 0x009B
75 #define ADRESH_ADDR 0x009C
76 #define ADCON0_ADDR 0x009D
77 #define ADCON1_ADDR 0x009E
78 #define ADCON2_ADDR 0x009F
79 #define LATA_ADDR 0x010C
80 #define CM1CON0_ADDR 0x0111
81 #define CM1CON1_ADDR 0x0112
82 #define CMOUT_ADDR 0x0115
83 #define BORCON_ADDR 0x0116
84 #define FVRCON_ADDR 0x0117
85 #define DACCON0_ADDR 0x0118
86 #define DACCON1_ADDR 0x0119
87 #define APFCON_ADDR 0x011D
88 #define APFCON0_ADDR 0x011D
89 #define ANSELA_ADDR 0x018C
90 #define PMADR_ADDR 0x0191
91 #define PMADRL_ADDR 0x0191
92 #define PMADRH_ADDR 0x0192
93 #define PMDAT_ADDR 0x0193
94 #define PMDATL_ADDR 0x0193
95 #define PMDATH_ADDR 0x0194
96 #define PMCON1_ADDR 0x0195
97 #define PMCON2_ADDR 0x0196
98 #define RCREG_ADDR 0x0199
99 #define TXREG_ADDR 0x019A
100 #define SPBRG_ADDR 0x019B
101 #define SPBRGL_ADDR 0x019B
102 #define SPBRGH_ADDR 0x019C
103 #define RCSTA_ADDR 0x019D
104 #define TXSTA_ADDR 0x019E
105 #define BAUDCON_ADDR 0x019F
106 #define WPUA_ADDR 0x020C
107 #define ODCONA_ADDR 0x028C
108 #define SLRCONA_ADDR 0x030C
109 #define INLVLA_ADDR 0x038C
110 #define IOCAP_ADDR 0x0391
111 #define IOCAN_ADDR 0x0392
112 #define IOCAF_ADDR 0x0393
113 #define CWG1DBR_ADDR 0x0691
114 #define CWG1DBF_ADDR 0x0692
115 #define CWG1CON0_ADDR 0x0693
116 #define CWG1CON1_ADDR 0x0694
117 #define CWG1CON2_ADDR 0x0695
118 #define PWMEN_ADDR 0x0D8E
119 #define PWMLD_ADDR 0x0D8F
120 #define PWMOUT_ADDR 0x0D90
121 #define PWM1PH_ADDR 0x0D91
122 #define PWM1PHL_ADDR 0x0D91
123 #define PWM1PHH_ADDR 0x0D92
124 #define PWM1DC_ADDR 0x0D93
125 #define PWM1DCL_ADDR 0x0D93
126 #define PWM1DCH_ADDR 0x0D94
127 #define PWM1PR_ADDR 0x0D95
128 #define PWM1PRL_ADDR 0x0D95
129 #define PWM1PRH_ADDR 0x0D96
130 #define PWM1OF_ADDR 0x0D97
131 #define PWM1OFL_ADDR 0x0D97
132 #define PWM1OFH_ADDR 0x0D98
133 #define PWM1TMR_ADDR 0x0D99
134 #define PWM1TMRL_ADDR 0x0D99
135 #define PWM1TMRH_ADDR 0x0D9A
136 #define PWM1CON_ADDR 0x0D9B
137 #define PWM1INTCON_ADDR 0x0D9C
138 #define PWM1INTE_ADDR 0x0D9C
139 #define PWM1INTF_ADDR 0x0D9D
140 #define PWM1INTFLG_ADDR 0x0D9D
141 #define PWM1CLKCON_ADDR 0x0D9E
142 #define PWM1LDCON_ADDR 0x0D9F
143 #define PWM1OFCON_ADDR 0x0DA0
144 #define PWM2PH_ADDR 0x0DA1
145 #define PWM2PHL_ADDR 0x0DA1
146 #define PWM2PHH_ADDR 0x0DA2
147 #define PWM2DC_ADDR 0x0DA3
148 #define PWM2DCL_ADDR 0x0DA3
149 #define PWM2DCH_ADDR 0x0DA4
150 #define PWM2PR_ADDR 0x0DA5
151 #define PWM2PRL_ADDR 0x0DA5
152 #define PWM2PRH_ADDR 0x0DA6
153 #define PWM2OF_ADDR 0x0DA7
154 #define PWM2OFL_ADDR 0x0DA7
155 #define PWM2OFH_ADDR 0x0DA8
156 #define PWM2TMR_ADDR 0x0DA9
157 #define PWM2TMRL_ADDR 0x0DA9
158 #define PWM2TMRH_ADDR 0x0DAA
159 #define PWM2CON_ADDR 0x0DAB
160 #define PWM2INTCON_ADDR 0x0DAC
161 #define PWM2INTE_ADDR 0x0DAC
162 #define PWM2INTF_ADDR 0x0DAD
163 #define PWM2INTFLG_ADDR 0x0DAD
164 #define PWM2CLKCON_ADDR 0x0DAE
165 #define PWM2LDCON_ADDR 0x0DAF
166 #define PWM2OFCON_ADDR 0x0DB0
167 #define PWM3PH_ADDR 0x0DB1
168 #define PWM3PHL_ADDR 0x0DB1
169 #define PWM3PHH_ADDR 0x0DB2
170 #define PWM3DC_ADDR 0x0DB3
171 #define PWM3DCL_ADDR 0x0DB3
172 #define PWM3DCH_ADDR 0x0DB4
173 #define PWM3PR_ADDR 0x0DB5
174 #define PWM3PRL_ADDR 0x0DB5
175 #define PWM3PRH_ADDR 0x0DB6
176 #define PWM3OF_ADDR 0x0DB7
177 #define PWM3OFL_ADDR 0x0DB7
178 #define PWM3OFH_ADDR 0x0DB8
179 #define PWM3TMR_ADDR 0x0DB9
180 #define PWM3TMRL_ADDR 0x0DB9
181 #define PWM3TMRH_ADDR 0x0DBA
182 #define PWM3CON_ADDR 0x0DBB
183 #define PWM3INTCON_ADDR 0x0DBC
184 #define PWM3INTE_ADDR 0x0DBC
185 #define PWM3INTF_ADDR 0x0DBD
186 #define PWM3INTFLG_ADDR 0x0DBD
187 #define PWM3CLKCON_ADDR 0x0DBE
188 #define PWM3LDCON_ADDR 0x0DBF
189 #define PWM3OFCON_ADDR 0x0DC0
190 #define STATUS_SHAD_ADDR 0x0FE4
191 #define WREG_SHAD_ADDR 0x0FE5
192 #define BSR_SHAD_ADDR 0x0FE6
193 #define PCLATH_SHAD_ADDR 0x0FE7
194 #define FSR0L_SHAD_ADDR 0x0FE8
195 #define FSR0_SHAD_ADDR 0x0FE8
196 #define FSR0H_SHAD_ADDR 0x0FE9
197 #define FSR1L_SHAD_ADDR 0x0FEA
198 #define FSR1_SHAD_ADDR 0x0FEA
199 #define FSR1H_SHAD_ADDR 0x0FEB
200 #define STKPTR_ADDR 0x0FED
201 #define TOS_ADDR 0x0FEE
202 #define TOSL_ADDR 0x0FEE
203 #define TOSH_ADDR 0x0FEF
204
205 #endif // #ifndef NO_ADDR_DEFINES
206
207 //==============================================================================
208 //
209 // Register Definitions
210 //
211 //==============================================================================
212
213 extern __at(0x0000) __sfr INDF0;
214 extern __at(0x0001) __sfr INDF1;
215 extern __at(0x0002) __sfr PCL;
216
217 //==============================================================================
218 // STATUS Bits
219
220 extern __at(0x0003) __sfr STATUS;
221
222 typedef struct
223 {
224 unsigned C : 1;
225 unsigned DC : 1;
226 unsigned Z : 1;
227 unsigned NOT_PD : 1;
228 unsigned NOT_TO : 1;
229 unsigned : 1;
230 unsigned : 1;
231 unsigned : 1;
232 } __STATUSbits_t;
233
234 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
235
236 #define _C 0x01
237 #define _DC 0x02
238 #define _Z 0x04
239 #define _NOT_PD 0x08
240 #define _NOT_TO 0x10
241
242 //==============================================================================
243
244 extern __at(0x0004) __sfr FSR0;
245 extern __at(0x0004) __sfr FSR0L;
246 extern __at(0x0005) __sfr FSR0H;
247 extern __at(0x0006) __sfr FSR1;
248 extern __at(0x0006) __sfr FSR1L;
249 extern __at(0x0007) __sfr FSR1H;
250
251 //==============================================================================
252 // BSR Bits
253
254 extern __at(0x0008) __sfr BSR;
255
256 typedef union
257 {
258 struct
259 {
260 unsigned BSR0 : 1;
261 unsigned BSR1 : 1;
262 unsigned BSR2 : 1;
263 unsigned BSR3 : 1;
264 unsigned BSR4 : 1;
265 unsigned : 1;
266 unsigned : 1;
267 unsigned : 1;
268 };
269
270 struct
271 {
272 unsigned BSR : 5;
273 unsigned : 3;
274 };
275 } __BSRbits_t;
276
277 extern __at(0x0008) volatile __BSRbits_t BSRbits;
278
279 #define _BSR0 0x01
280 #define _BSR1 0x02
281 #define _BSR2 0x04
282 #define _BSR3 0x08
283 #define _BSR4 0x10
284
285 //==============================================================================
286
287 extern __at(0x0009) __sfr WREG;
288 extern __at(0x000A) __sfr PCLATH;
289
290 //==============================================================================
291 // INTCON Bits
292
293 extern __at(0x000B) __sfr INTCON;
294
295 typedef union
296 {
297 struct
298 {
299 unsigned IOCIF : 1;
300 unsigned INTF : 1;
301 unsigned TMR0IF : 1;
302 unsigned IOCIE : 1;
303 unsigned INTE : 1;
304 unsigned TMR0IE : 1;
305 unsigned PEIE : 1;
306 unsigned GIE : 1;
307 };
308
309 struct
310 {
311 unsigned : 1;
312 unsigned : 1;
313 unsigned T0IF : 1;
314 unsigned : 1;
315 unsigned : 1;
316 unsigned T0IE : 1;
317 unsigned : 1;
318 unsigned : 1;
319 };
320 } __INTCONbits_t;
321
322 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
323
324 #define _IOCIF 0x01
325 #define _INTF 0x02
326 #define _TMR0IF 0x04
327 #define _T0IF 0x04
328 #define _IOCIE 0x08
329 #define _INTE 0x10
330 #define _TMR0IE 0x20
331 #define _T0IE 0x20
332 #define _PEIE 0x40
333 #define _GIE 0x80
334
335 //==============================================================================
336
337
338 //==============================================================================
339 // PORTA Bits
340
341 extern __at(0x000C) __sfr PORTA;
342
343 typedef union
344 {
345 struct
346 {
347 unsigned RA0 : 1;
348 unsigned RA1 : 1;
349 unsigned RA2 : 1;
350 unsigned RA3 : 1;
351 unsigned RA4 : 1;
352 unsigned RA5 : 1;
353 unsigned : 1;
354 unsigned : 1;
355 };
356
357 struct
358 {
359 unsigned RA : 6;
360 unsigned : 2;
361 };
362 } __PORTAbits_t;
363
364 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
365
366 #define _RA0 0x01
367 #define _RA1 0x02
368 #define _RA2 0x04
369 #define _RA3 0x08
370 #define _RA4 0x10
371 #define _RA5 0x20
372
373 //==============================================================================
374
375
376 //==============================================================================
377 // PIR1 Bits
378
379 extern __at(0x0011) __sfr PIR1;
380
381 typedef struct
382 {
383 unsigned TMR1IF : 1;
384 unsigned TMR2IF : 1;
385 unsigned : 1;
386 unsigned : 1;
387 unsigned TXIF : 1;
388 unsigned RCIF : 1;
389 unsigned ADIF : 1;
390 unsigned TMR1GIF : 1;
391 } __PIR1bits_t;
392
393 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
394
395 #define _TMR1IF 0x01
396 #define _TMR2IF 0x02
397 #define _TXIF 0x10
398 #define _RCIF 0x20
399 #define _ADIF 0x40
400 #define _TMR1GIF 0x80
401
402 //==============================================================================
403
404
405 //==============================================================================
406 // PIR2 Bits
407
408 extern __at(0x0012) __sfr PIR2;
409
410 typedef struct
411 {
412 unsigned : 1;
413 unsigned : 1;
414 unsigned : 1;
415 unsigned : 1;
416 unsigned : 1;
417 unsigned C1IF : 1;
418 unsigned : 1;
419 unsigned : 1;
420 } __PIR2bits_t;
421
422 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
423
424 #define _C1IF 0x20
425
426 //==============================================================================
427
428
429 //==============================================================================
430 // PIR3 Bits
431
432 extern __at(0x0013) __sfr PIR3;
433
434 typedef struct
435 {
436 unsigned : 1;
437 unsigned : 1;
438 unsigned : 1;
439 unsigned : 1;
440 unsigned PWM1IF : 1;
441 unsigned PWM2IF : 1;
442 unsigned PWM3IF : 1;
443 unsigned : 1;
444 } __PIR3bits_t;
445
446 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
447
448 #define _PWM1IF 0x10
449 #define _PWM2IF 0x20
450 #define _PWM3IF 0x40
451
452 //==============================================================================
453
454 extern __at(0x0015) __sfr TMR0;
455 extern __at(0x0016) __sfr TMR1;
456 extern __at(0x0016) __sfr TMR1L;
457 extern __at(0x0017) __sfr TMR1H;
458
459 //==============================================================================
460 // T1CON Bits
461
462 extern __at(0x0018) __sfr T1CON;
463
464 typedef union
465 {
466 struct
467 {
468 unsigned TMR1ON : 1;
469 unsigned : 1;
470 unsigned NOT_T1SYNC : 1;
471 unsigned : 1;
472 unsigned T1CKPS0 : 1;
473 unsigned T1CKPS1 : 1;
474 unsigned TMR1CS0 : 1;
475 unsigned TMR1CS1 : 1;
476 };
477
478 struct
479 {
480 unsigned : 4;
481 unsigned T1CKPS : 2;
482 unsigned : 2;
483 };
484
485 struct
486 {
487 unsigned : 6;
488 unsigned TMR1CS : 2;
489 };
490 } __T1CONbits_t;
491
492 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
493
494 #define _TMR1ON 0x01
495 #define _NOT_T1SYNC 0x04
496 #define _T1CKPS0 0x10
497 #define _T1CKPS1 0x20
498 #define _TMR1CS0 0x40
499 #define _TMR1CS1 0x80
500
501 //==============================================================================
502
503
504 //==============================================================================
505 // T1GCON Bits
506
507 extern __at(0x0019) __sfr T1GCON;
508
509 typedef union
510 {
511 struct
512 {
513 unsigned T1GSS0 : 1;
514 unsigned T1GSS1 : 1;
515 unsigned T1GVAL : 1;
516 unsigned T1GGO_NOT_DONE : 1;
517 unsigned T1GSPM : 1;
518 unsigned T1GTM : 1;
519 unsigned T1GPOL : 1;
520 unsigned TMR1GE : 1;
521 };
522
523 struct
524 {
525 unsigned : 1;
526 unsigned : 1;
527 unsigned : 1;
528 unsigned T1GGO : 1;
529 unsigned : 1;
530 unsigned : 1;
531 unsigned : 1;
532 unsigned : 1;
533 };
534
535 struct
536 {
537 unsigned T1GSS : 2;
538 unsigned : 6;
539 };
540 } __T1GCONbits_t;
541
542 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
543
544 #define _T1GSS0 0x01
545 #define _T1GSS1 0x02
546 #define _T1GVAL 0x04
547 #define _T1GGO_NOT_DONE 0x08
548 #define _T1GGO 0x08
549 #define _T1GSPM 0x10
550 #define _T1GTM 0x20
551 #define _T1GPOL 0x40
552 #define _TMR1GE 0x80
553
554 //==============================================================================
555
556 extern __at(0x001A) __sfr TMR2;
557 extern __at(0x001B) __sfr PR2;
558
559 //==============================================================================
560 // T2CON Bits
561
562 extern __at(0x001C) __sfr T2CON;
563
564 typedef union
565 {
566 struct
567 {
568 unsigned T2CKPS0 : 1;
569 unsigned T2CKPS1 : 1;
570 unsigned TMR2ON : 1;
571 unsigned T2OUTPS0 : 1;
572 unsigned T2OUTPS1 : 1;
573 unsigned T2OUTPS2 : 1;
574 unsigned T2OUTPS3 : 1;
575 unsigned : 1;
576 };
577
578 struct
579 {
580 unsigned T2CKPS : 2;
581 unsigned : 6;
582 };
583
584 struct
585 {
586 unsigned : 3;
587 unsigned T2OUTPS : 4;
588 unsigned : 1;
589 };
590 } __T2CONbits_t;
591
592 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
593
594 #define _T2CKPS0 0x01
595 #define _T2CKPS1 0x02
596 #define _TMR2ON 0x04
597 #define _T2OUTPS0 0x08
598 #define _T2OUTPS1 0x10
599 #define _T2OUTPS2 0x20
600 #define _T2OUTPS3 0x40
601
602 //==============================================================================
603
604
605 //==============================================================================
606 // TRISA Bits
607
608 extern __at(0x008C) __sfr TRISA;
609
610 typedef union
611 {
612 struct
613 {
614 unsigned TRISA0 : 1;
615 unsigned TRISA1 : 1;
616 unsigned TRISA2 : 1;
617 unsigned TRISA3 : 1;
618 unsigned TRISA4 : 1;
619 unsigned TRISA5 : 1;
620 unsigned : 1;
621 unsigned : 1;
622 };
623
624 struct
625 {
626 unsigned TRISA : 6;
627 unsigned : 2;
628 };
629 } __TRISAbits_t;
630
631 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
632
633 #define _TRISA0 0x01
634 #define _TRISA1 0x02
635 #define _TRISA2 0x04
636 #define _TRISA3 0x08
637 #define _TRISA4 0x10
638 #define _TRISA5 0x20
639
640 //==============================================================================
641
642
643 //==============================================================================
644 // PIE1 Bits
645
646 extern __at(0x0091) __sfr PIE1;
647
648 typedef struct
649 {
650 unsigned TMR1IE : 1;
651 unsigned TMR2IE : 1;
652 unsigned : 1;
653 unsigned : 1;
654 unsigned TXIE : 1;
655 unsigned RCIE : 1;
656 unsigned ADIE : 1;
657 unsigned TMR1GIE : 1;
658 } __PIE1bits_t;
659
660 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
661
662 #define _TMR1IE 0x01
663 #define _TMR2IE 0x02
664 #define _TXIE 0x10
665 #define _RCIE 0x20
666 #define _ADIE 0x40
667 #define _TMR1GIE 0x80
668
669 //==============================================================================
670
671
672 //==============================================================================
673 // PIE2 Bits
674
675 extern __at(0x0092) __sfr PIE2;
676
677 typedef struct
678 {
679 unsigned : 1;
680 unsigned : 1;
681 unsigned : 1;
682 unsigned : 1;
683 unsigned : 1;
684 unsigned C1IE : 1;
685 unsigned : 1;
686 unsigned : 1;
687 } __PIE2bits_t;
688
689 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
690
691 #define _C1IE 0x20
692
693 //==============================================================================
694
695
696 //==============================================================================
697 // PIE3 Bits
698
699 extern __at(0x0093) __sfr PIE3;
700
701 typedef struct
702 {
703 unsigned : 1;
704 unsigned : 1;
705 unsigned : 1;
706 unsigned : 1;
707 unsigned PWM1IE : 1;
708 unsigned PWM2IE : 1;
709 unsigned PWM3IE : 1;
710 unsigned : 1;
711 } __PIE3bits_t;
712
713 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
714
715 #define _PWM1IE 0x10
716 #define _PWM2IE 0x20
717 #define _PWM3IE 0x40
718
719 //==============================================================================
720
721
722 //==============================================================================
723 // OPTION_REG Bits
724
725 extern __at(0x0095) __sfr OPTION_REG;
726
727 typedef union
728 {
729 struct
730 {
731 unsigned PS0 : 1;
732 unsigned PS1 : 1;
733 unsigned PS2 : 1;
734 unsigned PSA : 1;
735 unsigned TMR0SE : 1;
736 unsigned TMR0CS : 1;
737 unsigned INTEDG : 1;
738 unsigned NOT_WPUEN : 1;
739 };
740
741 struct
742 {
743 unsigned : 1;
744 unsigned : 1;
745 unsigned : 1;
746 unsigned : 1;
747 unsigned T0SE : 1;
748 unsigned T0CS : 1;
749 unsigned : 1;
750 unsigned : 1;
751 };
752
753 struct
754 {
755 unsigned PS : 3;
756 unsigned : 5;
757 };
758 } __OPTION_REGbits_t;
759
760 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
761
762 #define _PS0 0x01
763 #define _PS1 0x02
764 #define _PS2 0x04
765 #define _PSA 0x08
766 #define _TMR0SE 0x10
767 #define _T0SE 0x10
768 #define _TMR0CS 0x20
769 #define _T0CS 0x20
770 #define _INTEDG 0x40
771 #define _NOT_WPUEN 0x80
772
773 //==============================================================================
774
775
776 //==============================================================================
777 // PCON Bits
778
779 extern __at(0x0096) __sfr PCON;
780
781 typedef struct
782 {
783 unsigned NOT_BOR : 1;
784 unsigned NOT_POR : 1;
785 unsigned NOT_RI : 1;
786 unsigned NOT_RMCLR : 1;
787 unsigned NOT_RWDT : 1;
788 unsigned : 1;
789 unsigned STKUNF : 1;
790 unsigned STKOVF : 1;
791 } __PCONbits_t;
792
793 extern __at(0x0096) volatile __PCONbits_t PCONbits;
794
795 #define _NOT_BOR 0x01
796 #define _NOT_POR 0x02
797 #define _NOT_RI 0x04
798 #define _NOT_RMCLR 0x08
799 #define _NOT_RWDT 0x10
800 #define _STKUNF 0x40
801 #define _STKOVF 0x80
802
803 //==============================================================================
804
805
806 //==============================================================================
807 // WDTCON Bits
808
809 extern __at(0x0097) __sfr WDTCON;
810
811 typedef union
812 {
813 struct
814 {
815 unsigned SWDTEN : 1;
816 unsigned WDTPS0 : 1;
817 unsigned WDTPS1 : 1;
818 unsigned WDTPS2 : 1;
819 unsigned WDTPS3 : 1;
820 unsigned WDTPS4 : 1;
821 unsigned : 1;
822 unsigned : 1;
823 };
824
825 struct
826 {
827 unsigned : 1;
828 unsigned WDTPS : 5;
829 unsigned : 2;
830 };
831 } __WDTCONbits_t;
832
833 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
834
835 #define _SWDTEN 0x01
836 #define _WDTPS0 0x02
837 #define _WDTPS1 0x04
838 #define _WDTPS2 0x08
839 #define _WDTPS3 0x10
840 #define _WDTPS4 0x20
841
842 //==============================================================================
843
844
845 //==============================================================================
846 // OSCTUNE Bits
847
848 extern __at(0x0098) __sfr OSCTUNE;
849
850 typedef union
851 {
852 struct
853 {
854 unsigned TUN0 : 1;
855 unsigned TUN1 : 1;
856 unsigned TUN2 : 1;
857 unsigned TUN3 : 1;
858 unsigned TUN4 : 1;
859 unsigned TUN5 : 1;
860 unsigned : 1;
861 unsigned : 1;
862 };
863
864 struct
865 {
866 unsigned TUN : 6;
867 unsigned : 2;
868 };
869 } __OSCTUNEbits_t;
870
871 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
872
873 #define _TUN0 0x01
874 #define _TUN1 0x02
875 #define _TUN2 0x04
876 #define _TUN3 0x08
877 #define _TUN4 0x10
878 #define _TUN5 0x20
879
880 //==============================================================================
881
882
883 //==============================================================================
884 // OSCCON Bits
885
886 extern __at(0x0099) __sfr OSCCON;
887
888 typedef union
889 {
890 struct
891 {
892 unsigned SCS0 : 1;
893 unsigned SCS1 : 1;
894 unsigned : 1;
895 unsigned IRCF0 : 1;
896 unsigned IRCF1 : 1;
897 unsigned IRCF2 : 1;
898 unsigned IRCF3 : 1;
899 unsigned SPLLEN : 1;
900 };
901
902 struct
903 {
904 unsigned SCS : 2;
905 unsigned : 6;
906 };
907
908 struct
909 {
910 unsigned : 3;
911 unsigned IRCF : 4;
912 unsigned : 1;
913 };
914 } __OSCCONbits_t;
915
916 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
917
918 #define _SCS0 0x01
919 #define _SCS1 0x02
920 #define _IRCF0 0x08
921 #define _IRCF1 0x10
922 #define _IRCF2 0x20
923 #define _IRCF3 0x40
924 #define _SPLLEN 0x80
925
926 //==============================================================================
927
928
929 //==============================================================================
930 // OSCSTAT Bits
931
932 extern __at(0x009A) __sfr OSCSTAT;
933
934 typedef struct
935 {
936 unsigned HFIOFS : 1;
937 unsigned LFIOFR : 1;
938 unsigned MFIOFR : 1;
939 unsigned HFIOFL : 1;
940 unsigned HFIOFR : 1;
941 unsigned OSTS : 1;
942 unsigned PLLR : 1;
943 unsigned : 1;
944 } __OSCSTATbits_t;
945
946 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
947
948 #define _HFIOFS 0x01
949 #define _LFIOFR 0x02
950 #define _MFIOFR 0x04
951 #define _HFIOFL 0x08
952 #define _HFIOFR 0x10
953 #define _OSTS 0x20
954 #define _PLLR 0x40
955
956 //==============================================================================
957
958 extern __at(0x009B) __sfr ADRES;
959 extern __at(0x009B) __sfr ADRESL;
960 extern __at(0x009C) __sfr ADRESH;
961
962 //==============================================================================
963 // ADCON0 Bits
964
965 extern __at(0x009D) __sfr ADCON0;
966
967 typedef union
968 {
969 struct
970 {
971 unsigned ADON : 1;
972 unsigned GO_NOT_DONE : 1;
973 unsigned CHS0 : 1;
974 unsigned CHS1 : 1;
975 unsigned CHS2 : 1;
976 unsigned CHS3 : 1;
977 unsigned CHS4 : 1;
978 unsigned : 1;
979 };
980
981 struct
982 {
983 unsigned : 1;
984 unsigned ADGO : 1;
985 unsigned : 1;
986 unsigned : 1;
987 unsigned : 1;
988 unsigned : 1;
989 unsigned : 1;
990 unsigned : 1;
991 };
992
993 struct
994 {
995 unsigned : 1;
996 unsigned GO : 1;
997 unsigned : 1;
998 unsigned : 1;
999 unsigned : 1;
1000 unsigned : 1;
1001 unsigned : 1;
1002 unsigned : 1;
1003 };
1004
1005 struct
1006 {
1007 unsigned : 1;
1008 unsigned NOT_DONE : 1;
1009 unsigned : 1;
1010 unsigned : 1;
1011 unsigned : 1;
1012 unsigned : 1;
1013 unsigned : 1;
1014 unsigned : 1;
1015 };
1016
1017 struct
1018 {
1019 unsigned : 2;
1020 unsigned CHS : 5;
1021 unsigned : 1;
1022 };
1023 } __ADCON0bits_t;
1024
1025 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1026
1027 #define _ADON 0x01
1028 #define _GO_NOT_DONE 0x02
1029 #define _ADGO 0x02
1030 #define _GO 0x02
1031 #define _NOT_DONE 0x02
1032 #define _CHS0 0x04
1033 #define _CHS1 0x08
1034 #define _CHS2 0x10
1035 #define _CHS3 0x20
1036 #define _CHS4 0x40
1037
1038 //==============================================================================
1039
1040
1041 //==============================================================================
1042 // ADCON1 Bits
1043
1044 extern __at(0x009E) __sfr ADCON1;
1045
1046 typedef union
1047 {
1048 struct
1049 {
1050 unsigned ADPREF0 : 1;
1051 unsigned ADPREF1 : 1;
1052 unsigned : 1;
1053 unsigned : 1;
1054 unsigned ADCS0 : 1;
1055 unsigned ADCS1 : 1;
1056 unsigned ADCS2 : 1;
1057 unsigned ADFM : 1;
1058 };
1059
1060 struct
1061 {
1062 unsigned ADPREF : 2;
1063 unsigned : 6;
1064 };
1065
1066 struct
1067 {
1068 unsigned : 4;
1069 unsigned ADCS : 3;
1070 unsigned : 1;
1071 };
1072 } __ADCON1bits_t;
1073
1074 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1075
1076 #define _ADPREF0 0x01
1077 #define _ADPREF1 0x02
1078 #define _ADCS0 0x10
1079 #define _ADCS1 0x20
1080 #define _ADCS2 0x40
1081 #define _ADFM 0x80
1082
1083 //==============================================================================
1084
1085
1086 //==============================================================================
1087 // ADCON2 Bits
1088
1089 extern __at(0x009F) __sfr ADCON2;
1090
1091 typedef union
1092 {
1093 struct
1094 {
1095 unsigned : 1;
1096 unsigned : 1;
1097 unsigned : 1;
1098 unsigned : 1;
1099 unsigned TRIGSEL0 : 1;
1100 unsigned TRIGSEL1 : 1;
1101 unsigned TRIGSEL2 : 1;
1102 unsigned TRIGSEL3 : 1;
1103 };
1104
1105 struct
1106 {
1107 unsigned : 4;
1108 unsigned TRIGSEL : 4;
1109 };
1110 } __ADCON2bits_t;
1111
1112 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1113
1114 #define _TRIGSEL0 0x10
1115 #define _TRIGSEL1 0x20
1116 #define _TRIGSEL2 0x40
1117 #define _TRIGSEL3 0x80
1118
1119 //==============================================================================
1120
1121
1122 //==============================================================================
1123 // LATA Bits
1124
1125 extern __at(0x010C) __sfr LATA;
1126
1127 typedef struct
1128 {
1129 unsigned LATA0 : 1;
1130 unsigned LATA1 : 1;
1131 unsigned LATA2 : 1;
1132 unsigned : 1;
1133 unsigned LATA4 : 1;
1134 unsigned LATA5 : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 } __LATAbits_t;
1138
1139 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1140
1141 #define _LATA0 0x01
1142 #define _LATA1 0x02
1143 #define _LATA2 0x04
1144 #define _LATA4 0x10
1145 #define _LATA5 0x20
1146
1147 //==============================================================================
1148
1149
1150 //==============================================================================
1151 // CM1CON0 Bits
1152
1153 extern __at(0x0111) __sfr CM1CON0;
1154
1155 typedef struct
1156 {
1157 unsigned C1SYNC : 1;
1158 unsigned C1HYS : 1;
1159 unsigned C1SP : 1;
1160 unsigned : 1;
1161 unsigned C1POL : 1;
1162 unsigned C1OE : 1;
1163 unsigned C1OUT : 1;
1164 unsigned C1ON : 1;
1165 } __CM1CON0bits_t;
1166
1167 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1168
1169 #define _C1SYNC 0x01
1170 #define _C1HYS 0x02
1171 #define _C1SP 0x04
1172 #define _C1POL 0x10
1173 #define _C1OE 0x20
1174 #define _C1OUT 0x40
1175 #define _C1ON 0x80
1176
1177 //==============================================================================
1178
1179
1180 //==============================================================================
1181 // CM1CON1 Bits
1182
1183 extern __at(0x0112) __sfr CM1CON1;
1184
1185 typedef union
1186 {
1187 struct
1188 {
1189 unsigned C1NCH0 : 1;
1190 unsigned C1NCH1 : 1;
1191 unsigned C1NCH2 : 1;
1192 unsigned : 1;
1193 unsigned C1PCH0 : 1;
1194 unsigned C1PCH1 : 1;
1195 unsigned C1INTN : 1;
1196 unsigned C1INTP : 1;
1197 };
1198
1199 struct
1200 {
1201 unsigned C1NCH : 3;
1202 unsigned : 5;
1203 };
1204
1205 struct
1206 {
1207 unsigned : 4;
1208 unsigned C1PCH : 2;
1209 unsigned : 2;
1210 };
1211 } __CM1CON1bits_t;
1212
1213 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1214
1215 #define _C1NCH0 0x01
1216 #define _C1NCH1 0x02
1217 #define _C1NCH2 0x04
1218 #define _C1PCH0 0x10
1219 #define _C1PCH1 0x20
1220 #define _C1INTN 0x40
1221 #define _C1INTP 0x80
1222
1223 //==============================================================================
1224
1225
1226 //==============================================================================
1227 // CMOUT Bits
1228
1229 extern __at(0x0115) __sfr CMOUT;
1230
1231 typedef struct
1232 {
1233 unsigned MC1OUT : 1;
1234 unsigned : 1;
1235 unsigned : 1;
1236 unsigned : 1;
1237 unsigned : 1;
1238 unsigned : 1;
1239 unsigned : 1;
1240 unsigned : 1;
1241 } __CMOUTbits_t;
1242
1243 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1244
1245 #define _MC1OUT 0x01
1246
1247 //==============================================================================
1248
1249
1250 //==============================================================================
1251 // BORCON Bits
1252
1253 extern __at(0x0116) __sfr BORCON;
1254
1255 typedef struct
1256 {
1257 unsigned BORRDY : 1;
1258 unsigned : 1;
1259 unsigned : 1;
1260 unsigned : 1;
1261 unsigned : 1;
1262 unsigned : 1;
1263 unsigned BORFS : 1;
1264 unsigned SBOREN : 1;
1265 } __BORCONbits_t;
1266
1267 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1268
1269 #define _BORRDY 0x01
1270 #define _BORFS 0x40
1271 #define _SBOREN 0x80
1272
1273 //==============================================================================
1274
1275
1276 //==============================================================================
1277 // FVRCON Bits
1278
1279 extern __at(0x0117) __sfr FVRCON;
1280
1281 typedef union
1282 {
1283 struct
1284 {
1285 unsigned ADFVR0 : 1;
1286 unsigned ADFVR1 : 1;
1287 unsigned CDAFVR0 : 1;
1288 unsigned CDAFVR1 : 1;
1289 unsigned TSRNG : 1;
1290 unsigned TSEN : 1;
1291 unsigned FVRRDY : 1;
1292 unsigned FVREN : 1;
1293 };
1294
1295 struct
1296 {
1297 unsigned ADFVR : 2;
1298 unsigned : 6;
1299 };
1300
1301 struct
1302 {
1303 unsigned : 2;
1304 unsigned CDAFVR : 2;
1305 unsigned : 4;
1306 };
1307 } __FVRCONbits_t;
1308
1309 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1310
1311 #define _ADFVR0 0x01
1312 #define _ADFVR1 0x02
1313 #define _CDAFVR0 0x04
1314 #define _CDAFVR1 0x08
1315 #define _TSRNG 0x10
1316 #define _TSEN 0x20
1317 #define _FVRRDY 0x40
1318 #define _FVREN 0x80
1319
1320 //==============================================================================
1321
1322
1323 //==============================================================================
1324 // DACCON0 Bits
1325
1326 extern __at(0x0118) __sfr DACCON0;
1327
1328 typedef union
1329 {
1330 struct
1331 {
1332 unsigned : 1;
1333 unsigned : 1;
1334 unsigned DACPSS0 : 1;
1335 unsigned DACPSS1 : 1;
1336 unsigned : 1;
1337 unsigned DACOE : 1;
1338 unsigned DACLPS : 1;
1339 unsigned DACEN : 1;
1340 };
1341
1342 struct
1343 {
1344 unsigned : 2;
1345 unsigned DACPSS : 2;
1346 unsigned : 4;
1347 };
1348 } __DACCON0bits_t;
1349
1350 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1351
1352 #define _DACPSS0 0x04
1353 #define _DACPSS1 0x08
1354 #define _DACOE 0x20
1355 #define _DACLPS 0x40
1356 #define _DACEN 0x80
1357
1358 //==============================================================================
1359
1360
1361 //==============================================================================
1362 // DACCON1 Bits
1363
1364 extern __at(0x0119) __sfr DACCON1;
1365
1366 typedef union
1367 {
1368 struct
1369 {
1370 unsigned DACR0 : 1;
1371 unsigned DACR1 : 1;
1372 unsigned DACR2 : 1;
1373 unsigned DACR3 : 1;
1374 unsigned DACR4 : 1;
1375 unsigned : 1;
1376 unsigned : 1;
1377 unsigned : 1;
1378 };
1379
1380 struct
1381 {
1382 unsigned DACR : 5;
1383 unsigned : 3;
1384 };
1385 } __DACCON1bits_t;
1386
1387 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1388
1389 #define _DACR0 0x01
1390 #define _DACR1 0x02
1391 #define _DACR2 0x04
1392 #define _DACR3 0x08
1393 #define _DACR4 0x10
1394
1395 //==============================================================================
1396
1397
1398 //==============================================================================
1399 // APFCON Bits
1400
1401 extern __at(0x011D) __sfr APFCON;
1402
1403 typedef struct
1404 {
1405 unsigned P1SEL : 1;
1406 unsigned P2SEL : 1;
1407 unsigned TXCKSEL : 1;
1408 unsigned T1GSEL : 1;
1409 unsigned : 1;
1410 unsigned CWGBSEL : 1;
1411 unsigned CWGASEL : 1;
1412 unsigned RXDTSEL : 1;
1413 } __APFCONbits_t;
1414
1415 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1416
1417 #define _P1SEL 0x01
1418 #define _P2SEL 0x02
1419 #define _TXCKSEL 0x04
1420 #define _T1GSEL 0x08
1421 #define _CWGBSEL 0x20
1422 #define _CWGASEL 0x40
1423 #define _RXDTSEL 0x80
1424
1425 //==============================================================================
1426
1427
1428 //==============================================================================
1429 // APFCON0 Bits
1430
1431 extern __at(0x011D) __sfr APFCON0;
1432
1433 typedef struct
1434 {
1435 unsigned P1SEL : 1;
1436 unsigned P2SEL : 1;
1437 unsigned TXCKSEL : 1;
1438 unsigned T1GSEL : 1;
1439 unsigned : 1;
1440 unsigned CWGBSEL : 1;
1441 unsigned CWGASEL : 1;
1442 unsigned RXDTSEL : 1;
1443 } __APFCON0bits_t;
1444
1445 extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
1446
1447 #define _APFCON0_P1SEL 0x01
1448 #define _APFCON0_P2SEL 0x02
1449 #define _APFCON0_TXCKSEL 0x04
1450 #define _APFCON0_T1GSEL 0x08
1451 #define _APFCON0_CWGBSEL 0x20
1452 #define _APFCON0_CWGASEL 0x40
1453 #define _APFCON0_RXDTSEL 0x80
1454
1455 //==============================================================================
1456
1457
1458 //==============================================================================
1459 // ANSELA Bits
1460
1461 extern __at(0x018C) __sfr ANSELA;
1462
1463 typedef struct
1464 {
1465 unsigned ANSA0 : 1;
1466 unsigned ANSA1 : 1;
1467 unsigned ANSA2 : 1;
1468 unsigned : 1;
1469 unsigned ANSA4 : 1;
1470 unsigned : 1;
1471 unsigned : 1;
1472 unsigned : 1;
1473 } __ANSELAbits_t;
1474
1475 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1476
1477 #define _ANSA0 0x01
1478 #define _ANSA1 0x02
1479 #define _ANSA2 0x04
1480 #define _ANSA4 0x10
1481
1482 //==============================================================================
1483
1484 extern __at(0x0191) __sfr PMADR;
1485 extern __at(0x0191) __sfr PMADRL;
1486 extern __at(0x0192) __sfr PMADRH;
1487 extern __at(0x0193) __sfr PMDAT;
1488 extern __at(0x0193) __sfr PMDATL;
1489 extern __at(0x0194) __sfr PMDATH;
1490
1491 //==============================================================================
1492 // PMCON1 Bits
1493
1494 extern __at(0x0195) __sfr PMCON1;
1495
1496 typedef struct
1497 {
1498 unsigned RD : 1;
1499 unsigned WR : 1;
1500 unsigned WREN : 1;
1501 unsigned WRERR : 1;
1502 unsigned FREE : 1;
1503 unsigned LWLO : 1;
1504 unsigned CFGS : 1;
1505 unsigned : 1;
1506 } __PMCON1bits_t;
1507
1508 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1509
1510 #define _RD 0x01
1511 #define _WR 0x02
1512 #define _WREN 0x04
1513 #define _WRERR 0x08
1514 #define _FREE 0x10
1515 #define _LWLO 0x20
1516 #define _CFGS 0x40
1517
1518 //==============================================================================
1519
1520 extern __at(0x0196) __sfr PMCON2;
1521 extern __at(0x0199) __sfr RCREG;
1522 extern __at(0x019A) __sfr TXREG;
1523 extern __at(0x019B) __sfr SPBRG;
1524 extern __at(0x019B) __sfr SPBRGL;
1525 extern __at(0x019C) __sfr SPBRGH;
1526
1527 //==============================================================================
1528 // RCSTA Bits
1529
1530 extern __at(0x019D) __sfr RCSTA;
1531
1532 typedef struct
1533 {
1534 unsigned RX9D : 1;
1535 unsigned OERR : 1;
1536 unsigned FERR : 1;
1537 unsigned ADDEN : 1;
1538 unsigned CREN : 1;
1539 unsigned SREN : 1;
1540 unsigned RX9 : 1;
1541 unsigned SPEN : 1;
1542 } __RCSTAbits_t;
1543
1544 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1545
1546 #define _RX9D 0x01
1547 #define _OERR 0x02
1548 #define _FERR 0x04
1549 #define _ADDEN 0x08
1550 #define _CREN 0x10
1551 #define _SREN 0x20
1552 #define _RX9 0x40
1553 #define _SPEN 0x80
1554
1555 //==============================================================================
1556
1557
1558 //==============================================================================
1559 // TXSTA Bits
1560
1561 extern __at(0x019E) __sfr TXSTA;
1562
1563 typedef struct
1564 {
1565 unsigned TX9D : 1;
1566 unsigned TRMT : 1;
1567 unsigned BRGH : 1;
1568 unsigned SENDB : 1;
1569 unsigned SYNC : 1;
1570 unsigned TXEN : 1;
1571 unsigned TX9 : 1;
1572 unsigned CSRC : 1;
1573 } __TXSTAbits_t;
1574
1575 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1576
1577 #define _TX9D 0x01
1578 #define _TRMT 0x02
1579 #define _BRGH 0x04
1580 #define _SENDB 0x08
1581 #define _SYNC 0x10
1582 #define _TXEN 0x20
1583 #define _TX9 0x40
1584 #define _CSRC 0x80
1585
1586 //==============================================================================
1587
1588
1589 //==============================================================================
1590 // BAUDCON Bits
1591
1592 extern __at(0x019F) __sfr BAUDCON;
1593
1594 typedef struct
1595 {
1596 unsigned ABDEN : 1;
1597 unsigned WUE : 1;
1598 unsigned : 1;
1599 unsigned BRG16 : 1;
1600 unsigned SCKP : 1;
1601 unsigned : 1;
1602 unsigned RCIDL : 1;
1603 unsigned ABDOVF : 1;
1604 } __BAUDCONbits_t;
1605
1606 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1607
1608 #define _ABDEN 0x01
1609 #define _WUE 0x02
1610 #define _BRG16 0x08
1611 #define _SCKP 0x10
1612 #define _RCIDL 0x40
1613 #define _ABDOVF 0x80
1614
1615 //==============================================================================
1616
1617
1618 //==============================================================================
1619 // WPUA Bits
1620
1621 extern __at(0x020C) __sfr WPUA;
1622
1623 typedef union
1624 {
1625 struct
1626 {
1627 unsigned WPUA0 : 1;
1628 unsigned WPUA1 : 1;
1629 unsigned WPUA2 : 1;
1630 unsigned WPUA3 : 1;
1631 unsigned WPUA4 : 1;
1632 unsigned WPUA5 : 1;
1633 unsigned : 1;
1634 unsigned : 1;
1635 };
1636
1637 struct
1638 {
1639 unsigned WPUA : 6;
1640 unsigned : 2;
1641 };
1642 } __WPUAbits_t;
1643
1644 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1645
1646 #define _WPUA0 0x01
1647 #define _WPUA1 0x02
1648 #define _WPUA2 0x04
1649 #define _WPUA3 0x08
1650 #define _WPUA4 0x10
1651 #define _WPUA5 0x20
1652
1653 //==============================================================================
1654
1655
1656 //==============================================================================
1657 // ODCONA Bits
1658
1659 extern __at(0x028C) __sfr ODCONA;
1660
1661 typedef struct
1662 {
1663 unsigned ODA0 : 1;
1664 unsigned ODA1 : 1;
1665 unsigned ODA2 : 1;
1666 unsigned : 1;
1667 unsigned ODA4 : 1;
1668 unsigned ODA5 : 1;
1669 unsigned : 1;
1670 unsigned : 1;
1671 } __ODCONAbits_t;
1672
1673 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
1674
1675 #define _ODA0 0x01
1676 #define _ODA1 0x02
1677 #define _ODA2 0x04
1678 #define _ODA4 0x10
1679 #define _ODA5 0x20
1680
1681 //==============================================================================
1682
1683
1684 //==============================================================================
1685 // SLRCONA Bits
1686
1687 extern __at(0x030C) __sfr SLRCONA;
1688
1689 typedef struct
1690 {
1691 unsigned SLRA0 : 1;
1692 unsigned SLRA1 : 1;
1693 unsigned SLRA2 : 1;
1694 unsigned : 1;
1695 unsigned SLRA4 : 1;
1696 unsigned SLRA5 : 1;
1697 unsigned : 1;
1698 unsigned : 1;
1699 } __SLRCONAbits_t;
1700
1701 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
1702
1703 #define _SLRA0 0x01
1704 #define _SLRA1 0x02
1705 #define _SLRA2 0x04
1706 #define _SLRA4 0x10
1707 #define _SLRA5 0x20
1708
1709 //==============================================================================
1710
1711
1712 //==============================================================================
1713 // INLVLA Bits
1714
1715 extern __at(0x038C) __sfr INLVLA;
1716
1717 typedef union
1718 {
1719 struct
1720 {
1721 unsigned INLVLA0 : 1;
1722 unsigned INLVLA1 : 1;
1723 unsigned INLVLA2 : 1;
1724 unsigned INLVLA3 : 1;
1725 unsigned INLVLA4 : 1;
1726 unsigned INLVLA5 : 1;
1727 unsigned : 1;
1728 unsigned : 1;
1729 };
1730
1731 struct
1732 {
1733 unsigned INLVLA : 6;
1734 unsigned : 2;
1735 };
1736 } __INLVLAbits_t;
1737
1738 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
1739
1740 #define _INLVLA0 0x01
1741 #define _INLVLA1 0x02
1742 #define _INLVLA2 0x04
1743 #define _INLVLA3 0x08
1744 #define _INLVLA4 0x10
1745 #define _INLVLA5 0x20
1746
1747 //==============================================================================
1748
1749
1750 //==============================================================================
1751 // IOCAP Bits
1752
1753 extern __at(0x0391) __sfr IOCAP;
1754
1755 typedef union
1756 {
1757 struct
1758 {
1759 unsigned IOCAP0 : 1;
1760 unsigned IOCAP1 : 1;
1761 unsigned IOCAP2 : 1;
1762 unsigned IOCAP3 : 1;
1763 unsigned IOCAP4 : 1;
1764 unsigned IOCAP5 : 1;
1765 unsigned : 1;
1766 unsigned : 1;
1767 };
1768
1769 struct
1770 {
1771 unsigned IOCAP : 6;
1772 unsigned : 2;
1773 };
1774 } __IOCAPbits_t;
1775
1776 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1777
1778 #define _IOCAP0 0x01
1779 #define _IOCAP1 0x02
1780 #define _IOCAP2 0x04
1781 #define _IOCAP3 0x08
1782 #define _IOCAP4 0x10
1783 #define _IOCAP5 0x20
1784
1785 //==============================================================================
1786
1787
1788 //==============================================================================
1789 // IOCAN Bits
1790
1791 extern __at(0x0392) __sfr IOCAN;
1792
1793 typedef union
1794 {
1795 struct
1796 {
1797 unsigned IOCAN0 : 1;
1798 unsigned IOCAN1 : 1;
1799 unsigned IOCAN2 : 1;
1800 unsigned IOCAN3 : 1;
1801 unsigned IOCAN4 : 1;
1802 unsigned IOCAN5 : 1;
1803 unsigned : 1;
1804 unsigned : 1;
1805 };
1806
1807 struct
1808 {
1809 unsigned IOCAN : 6;
1810 unsigned : 2;
1811 };
1812 } __IOCANbits_t;
1813
1814 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
1815
1816 #define _IOCAN0 0x01
1817 #define _IOCAN1 0x02
1818 #define _IOCAN2 0x04
1819 #define _IOCAN3 0x08
1820 #define _IOCAN4 0x10
1821 #define _IOCAN5 0x20
1822
1823 //==============================================================================
1824
1825
1826 //==============================================================================
1827 // IOCAF Bits
1828
1829 extern __at(0x0393) __sfr IOCAF;
1830
1831 typedef union
1832 {
1833 struct
1834 {
1835 unsigned IOCAF0 : 1;
1836 unsigned IOCAF1 : 1;
1837 unsigned IOCAF2 : 1;
1838 unsigned IOCAF3 : 1;
1839 unsigned IOCAF4 : 1;
1840 unsigned IOCAF5 : 1;
1841 unsigned : 1;
1842 unsigned : 1;
1843 };
1844
1845 struct
1846 {
1847 unsigned IOCAF : 6;
1848 unsigned : 2;
1849 };
1850 } __IOCAFbits_t;
1851
1852 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
1853
1854 #define _IOCAF0 0x01
1855 #define _IOCAF1 0x02
1856 #define _IOCAF2 0x04
1857 #define _IOCAF3 0x08
1858 #define _IOCAF4 0x10
1859 #define _IOCAF5 0x20
1860
1861 //==============================================================================
1862
1863
1864 //==============================================================================
1865 // CWG1DBR Bits
1866
1867 extern __at(0x0691) __sfr CWG1DBR;
1868
1869 typedef union
1870 {
1871 struct
1872 {
1873 unsigned CWG1DBR0 : 1;
1874 unsigned CWG1DBR1 : 1;
1875 unsigned CWG1DBR2 : 1;
1876 unsigned CWG1DBR3 : 1;
1877 unsigned CWG1DBR4 : 1;
1878 unsigned CWG1DBR5 : 1;
1879 unsigned : 1;
1880 unsigned : 1;
1881 };
1882
1883 struct
1884 {
1885 unsigned CWG1DBR : 6;
1886 unsigned : 2;
1887 };
1888 } __CWG1DBRbits_t;
1889
1890 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
1891
1892 #define _CWG1DBR0 0x01
1893 #define _CWG1DBR1 0x02
1894 #define _CWG1DBR2 0x04
1895 #define _CWG1DBR3 0x08
1896 #define _CWG1DBR4 0x10
1897 #define _CWG1DBR5 0x20
1898
1899 //==============================================================================
1900
1901
1902 //==============================================================================
1903 // CWG1DBF Bits
1904
1905 extern __at(0x0692) __sfr CWG1DBF;
1906
1907 typedef union
1908 {
1909 struct
1910 {
1911 unsigned CWG1DBF0 : 1;
1912 unsigned CWG1DBF1 : 1;
1913 unsigned CWG1DBF2 : 1;
1914 unsigned CWG1DBF3 : 1;
1915 unsigned CWG1DBF4 : 1;
1916 unsigned CWG1DBF5 : 1;
1917 unsigned : 1;
1918 unsigned : 1;
1919 };
1920
1921 struct
1922 {
1923 unsigned CWG1DBF : 6;
1924 unsigned : 2;
1925 };
1926 } __CWG1DBFbits_t;
1927
1928 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
1929
1930 #define _CWG1DBF0 0x01
1931 #define _CWG1DBF1 0x02
1932 #define _CWG1DBF2 0x04
1933 #define _CWG1DBF3 0x08
1934 #define _CWG1DBF4 0x10
1935 #define _CWG1DBF5 0x20
1936
1937 //==============================================================================
1938
1939
1940 //==============================================================================
1941 // CWG1CON0 Bits
1942
1943 extern __at(0x0693) __sfr CWG1CON0;
1944
1945 typedef struct
1946 {
1947 unsigned G1CS0 : 1;
1948 unsigned : 1;
1949 unsigned : 1;
1950 unsigned G1POLA : 1;
1951 unsigned G1POLB : 1;
1952 unsigned G1OEA : 1;
1953 unsigned G1OEB : 1;
1954 unsigned G1EN : 1;
1955 } __CWG1CON0bits_t;
1956
1957 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
1958
1959 #define _G1CS0 0x01
1960 #define _G1POLA 0x08
1961 #define _G1POLB 0x10
1962 #define _G1OEA 0x20
1963 #define _G1OEB 0x40
1964 #define _G1EN 0x80
1965
1966 //==============================================================================
1967
1968
1969 //==============================================================================
1970 // CWG1CON1 Bits
1971
1972 extern __at(0x0694) __sfr CWG1CON1;
1973
1974 typedef union
1975 {
1976 struct
1977 {
1978 unsigned G1IS0 : 1;
1979 unsigned G1IS1 : 1;
1980 unsigned G1IS2 : 1;
1981 unsigned : 1;
1982 unsigned G1ASDLA0 : 1;
1983 unsigned G1ASDLA1 : 1;
1984 unsigned G1ASDLB0 : 1;
1985 unsigned G1ASDLB1 : 1;
1986 };
1987
1988 struct
1989 {
1990 unsigned G1IS : 3;
1991 unsigned : 5;
1992 };
1993
1994 struct
1995 {
1996 unsigned : 4;
1997 unsigned G1ASDLA : 2;
1998 unsigned : 2;
1999 };
2000
2001 struct
2002 {
2003 unsigned : 6;
2004 unsigned G1ASDLB : 2;
2005 };
2006 } __CWG1CON1bits_t;
2007
2008 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2009
2010 #define _G1IS0 0x01
2011 #define _G1IS1 0x02
2012 #define _G1IS2 0x04
2013 #define _G1ASDLA0 0x10
2014 #define _G1ASDLA1 0x20
2015 #define _G1ASDLB0 0x40
2016 #define _G1ASDLB1 0x80
2017
2018 //==============================================================================
2019
2020
2021 //==============================================================================
2022 // CWG1CON2 Bits
2023
2024 extern __at(0x0695) __sfr CWG1CON2;
2025
2026 typedef struct
2027 {
2028 unsigned : 1;
2029 unsigned G1ASDSFLT : 1;
2030 unsigned G1ASDSC1 : 1;
2031 unsigned : 1;
2032 unsigned : 1;
2033 unsigned : 1;
2034 unsigned G1ARSEN : 1;
2035 unsigned G1ASE : 1;
2036 } __CWG1CON2bits_t;
2037
2038 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2039
2040 #define _G1ASDSFLT 0x02
2041 #define _G1ASDSC1 0x04
2042 #define _G1ARSEN 0x40
2043 #define _G1ASE 0x80
2044
2045 //==============================================================================
2046
2047
2048 //==============================================================================
2049 // PWMEN Bits
2050
2051 extern __at(0x0D8E) __sfr PWMEN;
2052
2053 typedef union
2054 {
2055 struct
2056 {
2057 unsigned PWM1EN_A : 1;
2058 unsigned PWM2EN_A : 1;
2059 unsigned PWM3EN_A : 1;
2060 unsigned : 1;
2061 unsigned : 1;
2062 unsigned : 1;
2063 unsigned : 1;
2064 unsigned : 1;
2065 };
2066
2067 struct
2068 {
2069 unsigned MPWM1EN : 1;
2070 unsigned MPWM2EN : 1;
2071 unsigned MPWM3EN : 1;
2072 unsigned : 1;
2073 unsigned : 1;
2074 unsigned : 1;
2075 unsigned : 1;
2076 unsigned : 1;
2077 };
2078 } __PWMENbits_t;
2079
2080 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
2081
2082 #define _PWM1EN_A 0x01
2083 #define _MPWM1EN 0x01
2084 #define _PWM2EN_A 0x02
2085 #define _MPWM2EN 0x02
2086 #define _PWM3EN_A 0x04
2087 #define _MPWM3EN 0x04
2088
2089 //==============================================================================
2090
2091
2092 //==============================================================================
2093 // PWMLD Bits
2094
2095 extern __at(0x0D8F) __sfr PWMLD;
2096
2097 typedef union
2098 {
2099 struct
2100 {
2101 unsigned PWM1LDA_A : 1;
2102 unsigned PWM2LDA_A : 1;
2103 unsigned PWM3LDA_A : 1;
2104 unsigned : 1;
2105 unsigned : 1;
2106 unsigned : 1;
2107 unsigned : 1;
2108 unsigned : 1;
2109 };
2110
2111 struct
2112 {
2113 unsigned MPWM1LD : 1;
2114 unsigned MPWM2LD : 1;
2115 unsigned MPWM3LD : 1;
2116 unsigned : 1;
2117 unsigned : 1;
2118 unsigned : 1;
2119 unsigned : 1;
2120 unsigned : 1;
2121 };
2122 } __PWMLDbits_t;
2123
2124 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
2125
2126 #define _PWM1LDA_A 0x01
2127 #define _MPWM1LD 0x01
2128 #define _PWM2LDA_A 0x02
2129 #define _MPWM2LD 0x02
2130 #define _PWM3LDA_A 0x04
2131 #define _MPWM3LD 0x04
2132
2133 //==============================================================================
2134
2135
2136 //==============================================================================
2137 // PWMOUT Bits
2138
2139 extern __at(0x0D90) __sfr PWMOUT;
2140
2141 typedef union
2142 {
2143 struct
2144 {
2145 unsigned PWM1OUT_A : 1;
2146 unsigned PWM2OUT_A : 1;
2147 unsigned PWM3OUT_A : 1;
2148 unsigned : 1;
2149 unsigned : 1;
2150 unsigned : 1;
2151 unsigned : 1;
2152 unsigned : 1;
2153 };
2154
2155 struct
2156 {
2157 unsigned MPWM1OUT : 1;
2158 unsigned MPWM2OUT : 1;
2159 unsigned MPWM3OUT : 1;
2160 unsigned : 1;
2161 unsigned : 1;
2162 unsigned : 1;
2163 unsigned : 1;
2164 unsigned : 1;
2165 };
2166 } __PWMOUTbits_t;
2167
2168 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
2169
2170 #define _PWM1OUT_A 0x01
2171 #define _MPWM1OUT 0x01
2172 #define _PWM2OUT_A 0x02
2173 #define _MPWM2OUT 0x02
2174 #define _PWM3OUT_A 0x04
2175 #define _MPWM3OUT 0x04
2176
2177 //==============================================================================
2178
2179 extern __at(0x0D91) __sfr PWM1PH;
2180
2181 //==============================================================================
2182 // PWM1PHL Bits
2183
2184 extern __at(0x0D91) __sfr PWM1PHL;
2185
2186 typedef struct
2187 {
2188 unsigned PWM1PHL0 : 1;
2189 unsigned PWM1PHL1 : 1;
2190 unsigned PWM1PHL2 : 1;
2191 unsigned PWM1PHL3 : 1;
2192 unsigned PWM1PHL4 : 1;
2193 unsigned PWM1PHL5 : 1;
2194 unsigned PWM1PHL6 : 1;
2195 unsigned PWM1PHL7 : 1;
2196 } __PWM1PHLbits_t;
2197
2198 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
2199
2200 #define _PWM1PHL0 0x01
2201 #define _PWM1PHL1 0x02
2202 #define _PWM1PHL2 0x04
2203 #define _PWM1PHL3 0x08
2204 #define _PWM1PHL4 0x10
2205 #define _PWM1PHL5 0x20
2206 #define _PWM1PHL6 0x40
2207 #define _PWM1PHL7 0x80
2208
2209 //==============================================================================
2210
2211
2212 //==============================================================================
2213 // PWM1PHH Bits
2214
2215 extern __at(0x0D92) __sfr PWM1PHH;
2216
2217 typedef struct
2218 {
2219 unsigned PWM1PHH0 : 1;
2220 unsigned PWM1PHH1 : 1;
2221 unsigned PWM1PHH2 : 1;
2222 unsigned PWM1PHH3 : 1;
2223 unsigned PWM1PHH4 : 1;
2224 unsigned PWM1PHH5 : 1;
2225 unsigned PWM1PHH6 : 1;
2226 unsigned PWM1PHH7 : 1;
2227 } __PWM1PHHbits_t;
2228
2229 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
2230
2231 #define _PWM1PHH0 0x01
2232 #define _PWM1PHH1 0x02
2233 #define _PWM1PHH2 0x04
2234 #define _PWM1PHH3 0x08
2235 #define _PWM1PHH4 0x10
2236 #define _PWM1PHH5 0x20
2237 #define _PWM1PHH6 0x40
2238 #define _PWM1PHH7 0x80
2239
2240 //==============================================================================
2241
2242 extern __at(0x0D93) __sfr PWM1DC;
2243
2244 //==============================================================================
2245 // PWM1DCL Bits
2246
2247 extern __at(0x0D93) __sfr PWM1DCL;
2248
2249 typedef struct
2250 {
2251 unsigned PWM1DCL0 : 1;
2252 unsigned PWM1DCL1 : 1;
2253 unsigned PWM1DCL2 : 1;
2254 unsigned PWM1DCL3 : 1;
2255 unsigned PWM1DCL4 : 1;
2256 unsigned PWM1DCL5 : 1;
2257 unsigned PWM1DCL6 : 1;
2258 unsigned PWM1DCL7 : 1;
2259 } __PWM1DCLbits_t;
2260
2261 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
2262
2263 #define _PWM1DCL0 0x01
2264 #define _PWM1DCL1 0x02
2265 #define _PWM1DCL2 0x04
2266 #define _PWM1DCL3 0x08
2267 #define _PWM1DCL4 0x10
2268 #define _PWM1DCL5 0x20
2269 #define _PWM1DCL6 0x40
2270 #define _PWM1DCL7 0x80
2271
2272 //==============================================================================
2273
2274
2275 //==============================================================================
2276 // PWM1DCH Bits
2277
2278 extern __at(0x0D94) __sfr PWM1DCH;
2279
2280 typedef struct
2281 {
2282 unsigned PWM1DCH0 : 1;
2283 unsigned PWM1DCH1 : 1;
2284 unsigned PWM1DCH2 : 1;
2285 unsigned PWM1DCH3 : 1;
2286 unsigned PWM1DCH4 : 1;
2287 unsigned PWM1DCH5 : 1;
2288 unsigned PWM1DCH6 : 1;
2289 unsigned PWM1DCH7 : 1;
2290 } __PWM1DCHbits_t;
2291
2292 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
2293
2294 #define _PWM1DCH0 0x01
2295 #define _PWM1DCH1 0x02
2296 #define _PWM1DCH2 0x04
2297 #define _PWM1DCH3 0x08
2298 #define _PWM1DCH4 0x10
2299 #define _PWM1DCH5 0x20
2300 #define _PWM1DCH6 0x40
2301 #define _PWM1DCH7 0x80
2302
2303 //==============================================================================
2304
2305 extern __at(0x0D95) __sfr PWM1PR;
2306
2307 //==============================================================================
2308 // PWM1PRL Bits
2309
2310 extern __at(0x0D95) __sfr PWM1PRL;
2311
2312 typedef struct
2313 {
2314 unsigned PWM1PRL0 : 1;
2315 unsigned PWM1PRL1 : 1;
2316 unsigned PWM1PRL2 : 1;
2317 unsigned PWM1PRL3 : 1;
2318 unsigned PWM1PRL4 : 1;
2319 unsigned PWM1PRL5 : 1;
2320 unsigned PWM1PRL6 : 1;
2321 unsigned PWM1PRL7 : 1;
2322 } __PWM1PRLbits_t;
2323
2324 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
2325
2326 #define _PWM1PRL0 0x01
2327 #define _PWM1PRL1 0x02
2328 #define _PWM1PRL2 0x04
2329 #define _PWM1PRL3 0x08
2330 #define _PWM1PRL4 0x10
2331 #define _PWM1PRL5 0x20
2332 #define _PWM1PRL6 0x40
2333 #define _PWM1PRL7 0x80
2334
2335 //==============================================================================
2336
2337
2338 //==============================================================================
2339 // PWM1PRH Bits
2340
2341 extern __at(0x0D96) __sfr PWM1PRH;
2342
2343 typedef struct
2344 {
2345 unsigned PWM1PRH0 : 1;
2346 unsigned PWM1PRH1 : 1;
2347 unsigned PWM1PRH2 : 1;
2348 unsigned PWM1PRH3 : 1;
2349 unsigned PWM1PRH4 : 1;
2350 unsigned PWM1PRH5 : 1;
2351 unsigned PWM1PRH6 : 1;
2352 unsigned PWM1PRH7 : 1;
2353 } __PWM1PRHbits_t;
2354
2355 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
2356
2357 #define _PWM1PRH0 0x01
2358 #define _PWM1PRH1 0x02
2359 #define _PWM1PRH2 0x04
2360 #define _PWM1PRH3 0x08
2361 #define _PWM1PRH4 0x10
2362 #define _PWM1PRH5 0x20
2363 #define _PWM1PRH6 0x40
2364 #define _PWM1PRH7 0x80
2365
2366 //==============================================================================
2367
2368 extern __at(0x0D97) __sfr PWM1OF;
2369
2370 //==============================================================================
2371 // PWM1OFL Bits
2372
2373 extern __at(0x0D97) __sfr PWM1OFL;
2374
2375 typedef struct
2376 {
2377 unsigned PWM1OFL0 : 1;
2378 unsigned PWM1OFL1 : 1;
2379 unsigned PWM1OFL2 : 1;
2380 unsigned PWM1OFL3 : 1;
2381 unsigned PWM1OFL4 : 1;
2382 unsigned PWM1OFL5 : 1;
2383 unsigned PWM1OFL6 : 1;
2384 unsigned PWM1OFL7 : 1;
2385 } __PWM1OFLbits_t;
2386
2387 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
2388
2389 #define _PWM1OFL0 0x01
2390 #define _PWM1OFL1 0x02
2391 #define _PWM1OFL2 0x04
2392 #define _PWM1OFL3 0x08
2393 #define _PWM1OFL4 0x10
2394 #define _PWM1OFL5 0x20
2395 #define _PWM1OFL6 0x40
2396 #define _PWM1OFL7 0x80
2397
2398 //==============================================================================
2399
2400
2401 //==============================================================================
2402 // PWM1OFH Bits
2403
2404 extern __at(0x0D98) __sfr PWM1OFH;
2405
2406 typedef struct
2407 {
2408 unsigned PWM1OFH0 : 1;
2409 unsigned PWM1OFH1 : 1;
2410 unsigned PWM1OFH2 : 1;
2411 unsigned PWM1OFH3 : 1;
2412 unsigned PWM1OFH4 : 1;
2413 unsigned PWM1OFH5 : 1;
2414 unsigned PWM1OFH6 : 1;
2415 unsigned PWM1OFH7 : 1;
2416 } __PWM1OFHbits_t;
2417
2418 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
2419
2420 #define _PWM1OFH0 0x01
2421 #define _PWM1OFH1 0x02
2422 #define _PWM1OFH2 0x04
2423 #define _PWM1OFH3 0x08
2424 #define _PWM1OFH4 0x10
2425 #define _PWM1OFH5 0x20
2426 #define _PWM1OFH6 0x40
2427 #define _PWM1OFH7 0x80
2428
2429 //==============================================================================
2430
2431 extern __at(0x0D99) __sfr PWM1TMR;
2432
2433 //==============================================================================
2434 // PWM1TMRL Bits
2435
2436 extern __at(0x0D99) __sfr PWM1TMRL;
2437
2438 typedef struct
2439 {
2440 unsigned PWM1TMRL0 : 1;
2441 unsigned PWM1TMRL1 : 1;
2442 unsigned PWM1TMRL2 : 1;
2443 unsigned PWM1TMRL3 : 1;
2444 unsigned PWM1TMRL4 : 1;
2445 unsigned PWM1TMRL5 : 1;
2446 unsigned PWM1TMRL6 : 1;
2447 unsigned PWM1TMRL7 : 1;
2448 } __PWM1TMRLbits_t;
2449
2450 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
2451
2452 #define _PWM1TMRL0 0x01
2453 #define _PWM1TMRL1 0x02
2454 #define _PWM1TMRL2 0x04
2455 #define _PWM1TMRL3 0x08
2456 #define _PWM1TMRL4 0x10
2457 #define _PWM1TMRL5 0x20
2458 #define _PWM1TMRL6 0x40
2459 #define _PWM1TMRL7 0x80
2460
2461 //==============================================================================
2462
2463
2464 //==============================================================================
2465 // PWM1TMRH Bits
2466
2467 extern __at(0x0D9A) __sfr PWM1TMRH;
2468
2469 typedef struct
2470 {
2471 unsigned PWM1TMRH0 : 1;
2472 unsigned PWM1TMRH1 : 1;
2473 unsigned PWM1TMRH2 : 1;
2474 unsigned PWM1TMRH3 : 1;
2475 unsigned PWM1TMRH4 : 1;
2476 unsigned PWM1TMRH5 : 1;
2477 unsigned PWM1TMRH6 : 1;
2478 unsigned PWM1TMRH7 : 1;
2479 } __PWM1TMRHbits_t;
2480
2481 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
2482
2483 #define _PWM1TMRH0 0x01
2484 #define _PWM1TMRH1 0x02
2485 #define _PWM1TMRH2 0x04
2486 #define _PWM1TMRH3 0x08
2487 #define _PWM1TMRH4 0x10
2488 #define _PWM1TMRH5 0x20
2489 #define _PWM1TMRH6 0x40
2490 #define _PWM1TMRH7 0x80
2491
2492 //==============================================================================
2493
2494
2495 //==============================================================================
2496 // PWM1CON Bits
2497
2498 extern __at(0x0D9B) __sfr PWM1CON;
2499
2500 typedef union
2501 {
2502 struct
2503 {
2504 unsigned : 1;
2505 unsigned : 1;
2506 unsigned PWM1MODE0 : 1;
2507 unsigned PWM1MODE1 : 1;
2508 unsigned POL : 1;
2509 unsigned OUT : 1;
2510 unsigned OE : 1;
2511 unsigned EN : 1;
2512 };
2513
2514 struct
2515 {
2516 unsigned : 1;
2517 unsigned : 1;
2518 unsigned MODE0 : 1;
2519 unsigned MODE1 : 1;
2520 unsigned PWM1POL : 1;
2521 unsigned PWM1OUT : 1;
2522 unsigned PWM1OE : 1;
2523 unsigned PWM1EN : 1;
2524 };
2525
2526 struct
2527 {
2528 unsigned : 2;
2529 unsigned MODE : 2;
2530 unsigned : 4;
2531 };
2532
2533 struct
2534 {
2535 unsigned : 2;
2536 unsigned PWM1MODE : 2;
2537 unsigned : 4;
2538 };
2539 } __PWM1CONbits_t;
2540
2541 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
2542
2543 #define _PWM1MODE0 0x04
2544 #define _MODE0 0x04
2545 #define _PWM1MODE1 0x08
2546 #define _MODE1 0x08
2547 #define _POL 0x10
2548 #define _PWM1POL 0x10
2549 #define _OUT 0x20
2550 #define _PWM1OUT 0x20
2551 #define _OE 0x40
2552 #define _PWM1OE 0x40
2553 #define _EN 0x80
2554 #define _PWM1EN 0x80
2555
2556 //==============================================================================
2557
2558
2559 //==============================================================================
2560 // PWM1INTCON Bits
2561
2562 extern __at(0x0D9C) __sfr PWM1INTCON;
2563
2564 typedef union
2565 {
2566 struct
2567 {
2568 unsigned PRIE : 1;
2569 unsigned DCIE : 1;
2570 unsigned PHIE : 1;
2571 unsigned OFIE : 1;
2572 unsigned : 1;
2573 unsigned : 1;
2574 unsigned : 1;
2575 unsigned : 1;
2576 };
2577
2578 struct
2579 {
2580 unsigned PWM1PRIE : 1;
2581 unsigned PWM1DCIE : 1;
2582 unsigned PWM1PHIE : 1;
2583 unsigned PWM1OFIE : 1;
2584 unsigned : 1;
2585 unsigned : 1;
2586 unsigned : 1;
2587 unsigned : 1;
2588 };
2589 } __PWM1INTCONbits_t;
2590
2591 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
2592
2593 #define _PRIE 0x01
2594 #define _PWM1PRIE 0x01
2595 #define _DCIE 0x02
2596 #define _PWM1DCIE 0x02
2597 #define _PHIE 0x04
2598 #define _PWM1PHIE 0x04
2599 #define _OFIE 0x08
2600 #define _PWM1OFIE 0x08
2601
2602 //==============================================================================
2603
2604
2605 //==============================================================================
2606 // PWM1INTE Bits
2607
2608 extern __at(0x0D9C) __sfr PWM1INTE;
2609
2610 typedef union
2611 {
2612 struct
2613 {
2614 unsigned PRIE : 1;
2615 unsigned DCIE : 1;
2616 unsigned PHIE : 1;
2617 unsigned OFIE : 1;
2618 unsigned : 1;
2619 unsigned : 1;
2620 unsigned : 1;
2621 unsigned : 1;
2622 };
2623
2624 struct
2625 {
2626 unsigned PWM1PRIE : 1;
2627 unsigned PWM1DCIE : 1;
2628 unsigned PWM1PHIE : 1;
2629 unsigned PWM1OFIE : 1;
2630 unsigned : 1;
2631 unsigned : 1;
2632 unsigned : 1;
2633 unsigned : 1;
2634 };
2635 } __PWM1INTEbits_t;
2636
2637 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
2638
2639 #define _PWM1INTE_PRIE 0x01
2640 #define _PWM1INTE_PWM1PRIE 0x01
2641 #define _PWM1INTE_DCIE 0x02
2642 #define _PWM1INTE_PWM1DCIE 0x02
2643 #define _PWM1INTE_PHIE 0x04
2644 #define _PWM1INTE_PWM1PHIE 0x04
2645 #define _PWM1INTE_OFIE 0x08
2646 #define _PWM1INTE_PWM1OFIE 0x08
2647
2648 //==============================================================================
2649
2650
2651 //==============================================================================
2652 // PWM1INTF Bits
2653
2654 extern __at(0x0D9D) __sfr PWM1INTF;
2655
2656 typedef union
2657 {
2658 struct
2659 {
2660 unsigned PRIF : 1;
2661 unsigned DCIF : 1;
2662 unsigned PHIF : 1;
2663 unsigned OFIF : 1;
2664 unsigned : 1;
2665 unsigned : 1;
2666 unsigned : 1;
2667 unsigned : 1;
2668 };
2669
2670 struct
2671 {
2672 unsigned PWM1PRIF : 1;
2673 unsigned PWM1DCIF : 1;
2674 unsigned PWM1PHIF : 1;
2675 unsigned PWM1OFIF : 1;
2676 unsigned : 1;
2677 unsigned : 1;
2678 unsigned : 1;
2679 unsigned : 1;
2680 };
2681 } __PWM1INTFbits_t;
2682
2683 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
2684
2685 #define _PRIF 0x01
2686 #define _PWM1PRIF 0x01
2687 #define _DCIF 0x02
2688 #define _PWM1DCIF 0x02
2689 #define _PHIF 0x04
2690 #define _PWM1PHIF 0x04
2691 #define _OFIF 0x08
2692 #define _PWM1OFIF 0x08
2693
2694 //==============================================================================
2695
2696
2697 //==============================================================================
2698 // PWM1INTFLG Bits
2699
2700 extern __at(0x0D9D) __sfr PWM1INTFLG;
2701
2702 typedef union
2703 {
2704 struct
2705 {
2706 unsigned PRIF : 1;
2707 unsigned DCIF : 1;
2708 unsigned PHIF : 1;
2709 unsigned OFIF : 1;
2710 unsigned : 1;
2711 unsigned : 1;
2712 unsigned : 1;
2713 unsigned : 1;
2714 };
2715
2716 struct
2717 {
2718 unsigned PWM1PRIF : 1;
2719 unsigned PWM1DCIF : 1;
2720 unsigned PWM1PHIF : 1;
2721 unsigned PWM1OFIF : 1;
2722 unsigned : 1;
2723 unsigned : 1;
2724 unsigned : 1;
2725 unsigned : 1;
2726 };
2727 } __PWM1INTFLGbits_t;
2728
2729 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
2730
2731 #define _PWM1INTFLG_PRIF 0x01
2732 #define _PWM1INTFLG_PWM1PRIF 0x01
2733 #define _PWM1INTFLG_DCIF 0x02
2734 #define _PWM1INTFLG_PWM1DCIF 0x02
2735 #define _PWM1INTFLG_PHIF 0x04
2736 #define _PWM1INTFLG_PWM1PHIF 0x04
2737 #define _PWM1INTFLG_OFIF 0x08
2738 #define _PWM1INTFLG_PWM1OFIF 0x08
2739
2740 //==============================================================================
2741
2742
2743 //==============================================================================
2744 // PWM1CLKCON Bits
2745
2746 extern __at(0x0D9E) __sfr PWM1CLKCON;
2747
2748 typedef union
2749 {
2750 struct
2751 {
2752 unsigned PWM1CS0 : 1;
2753 unsigned PWM1CS1 : 1;
2754 unsigned : 1;
2755 unsigned : 1;
2756 unsigned PWM1PS0 : 1;
2757 unsigned PWM1PS1 : 1;
2758 unsigned PWM1PS2 : 1;
2759 unsigned : 1;
2760 };
2761
2762 struct
2763 {
2764 unsigned CS0 : 1;
2765 unsigned CS1 : 1;
2766 unsigned : 1;
2767 unsigned : 1;
2768 unsigned PS0 : 1;
2769 unsigned PS1 : 1;
2770 unsigned PS2 : 1;
2771 unsigned : 1;
2772 };
2773
2774 struct
2775 {
2776 unsigned PWM1CS : 2;
2777 unsigned : 6;
2778 };
2779
2780 struct
2781 {
2782 unsigned CS : 2;
2783 unsigned : 6;
2784 };
2785
2786 struct
2787 {
2788 unsigned : 4;
2789 unsigned PS : 3;
2790 unsigned : 1;
2791 };
2792
2793 struct
2794 {
2795 unsigned : 4;
2796 unsigned PWM1PS : 3;
2797 unsigned : 1;
2798 };
2799 } __PWM1CLKCONbits_t;
2800
2801 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
2802
2803 #define _PWM1CLKCON_PWM1CS0 0x01
2804 #define _PWM1CLKCON_CS0 0x01
2805 #define _PWM1CLKCON_PWM1CS1 0x02
2806 #define _PWM1CLKCON_CS1 0x02
2807 #define _PWM1CLKCON_PWM1PS0 0x10
2808 #define _PWM1CLKCON_PS0 0x10
2809 #define _PWM1CLKCON_PWM1PS1 0x20
2810 #define _PWM1CLKCON_PS1 0x20
2811 #define _PWM1CLKCON_PWM1PS2 0x40
2812 #define _PWM1CLKCON_PS2 0x40
2813
2814 //==============================================================================
2815
2816
2817 //==============================================================================
2818 // PWM1LDCON Bits
2819
2820 extern __at(0x0D9F) __sfr PWM1LDCON;
2821
2822 typedef union
2823 {
2824 struct
2825 {
2826 unsigned PWM1LDS0 : 1;
2827 unsigned PWM1LDS1 : 1;
2828 unsigned : 1;
2829 unsigned : 1;
2830 unsigned : 1;
2831 unsigned : 1;
2832 unsigned LDT : 1;
2833 unsigned LDA : 1;
2834 };
2835
2836 struct
2837 {
2838 unsigned LDS0 : 1;
2839 unsigned LDS1 : 1;
2840 unsigned : 1;
2841 unsigned : 1;
2842 unsigned : 1;
2843 unsigned : 1;
2844 unsigned PWM1LDM : 1;
2845 unsigned PWM1LD : 1;
2846 };
2847
2848 struct
2849 {
2850 unsigned PWM1LDS : 2;
2851 unsigned : 6;
2852 };
2853
2854 struct
2855 {
2856 unsigned LDS : 2;
2857 unsigned : 6;
2858 };
2859 } __PWM1LDCONbits_t;
2860
2861 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
2862
2863 #define _PWM1LDS0 0x01
2864 #define _LDS0 0x01
2865 #define _PWM1LDS1 0x02
2866 #define _LDS1 0x02
2867 #define _LDT 0x40
2868 #define _PWM1LDM 0x40
2869 #define _LDA 0x80
2870 #define _PWM1LD 0x80
2871
2872 //==============================================================================
2873
2874
2875 //==============================================================================
2876 // PWM1OFCON Bits
2877
2878 extern __at(0x0DA0) __sfr PWM1OFCON;
2879
2880 typedef union
2881 {
2882 struct
2883 {
2884 unsigned PWM1OFS0 : 1;
2885 unsigned PWM1OFS1 : 1;
2886 unsigned : 1;
2887 unsigned : 1;
2888 unsigned OFO : 1;
2889 unsigned PWM1OFM0 : 1;
2890 unsigned PWM1OFM1 : 1;
2891 unsigned : 1;
2892 };
2893
2894 struct
2895 {
2896 unsigned OFS0 : 1;
2897 unsigned OFS1 : 1;
2898 unsigned : 1;
2899 unsigned : 1;
2900 unsigned PWM1OFMC : 1;
2901 unsigned OFM0 : 1;
2902 unsigned OFM1 : 1;
2903 unsigned : 1;
2904 };
2905
2906 struct
2907 {
2908 unsigned OFS : 2;
2909 unsigned : 6;
2910 };
2911
2912 struct
2913 {
2914 unsigned PWM1OFS : 2;
2915 unsigned : 6;
2916 };
2917
2918 struct
2919 {
2920 unsigned : 5;
2921 unsigned OFM : 2;
2922 unsigned : 1;
2923 };
2924
2925 struct
2926 {
2927 unsigned : 5;
2928 unsigned PWM1OFM : 2;
2929 unsigned : 1;
2930 };
2931 } __PWM1OFCONbits_t;
2932
2933 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
2934
2935 #define _PWM1OFS0 0x01
2936 #define _OFS0 0x01
2937 #define _PWM1OFS1 0x02
2938 #define _OFS1 0x02
2939 #define _OFO 0x10
2940 #define _PWM1OFMC 0x10
2941 #define _PWM1OFM0 0x20
2942 #define _OFM0 0x20
2943 #define _PWM1OFM1 0x40
2944 #define _OFM1 0x40
2945
2946 //==============================================================================
2947
2948 extern __at(0x0DA1) __sfr PWM2PH;
2949
2950 //==============================================================================
2951 // PWM2PHL Bits
2952
2953 extern __at(0x0DA1) __sfr PWM2PHL;
2954
2955 typedef struct
2956 {
2957 unsigned PWM2PHL0 : 1;
2958 unsigned PWM2PHL1 : 1;
2959 unsigned PWM2PHL2 : 1;
2960 unsigned PWM2PHL3 : 1;
2961 unsigned PWM2PHL4 : 1;
2962 unsigned PWM2PHL5 : 1;
2963 unsigned PWM2PHL6 : 1;
2964 unsigned PWM2PHL7 : 1;
2965 } __PWM2PHLbits_t;
2966
2967 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
2968
2969 #define _PWM2PHL0 0x01
2970 #define _PWM2PHL1 0x02
2971 #define _PWM2PHL2 0x04
2972 #define _PWM2PHL3 0x08
2973 #define _PWM2PHL4 0x10
2974 #define _PWM2PHL5 0x20
2975 #define _PWM2PHL6 0x40
2976 #define _PWM2PHL7 0x80
2977
2978 //==============================================================================
2979
2980
2981 //==============================================================================
2982 // PWM2PHH Bits
2983
2984 extern __at(0x0DA2) __sfr PWM2PHH;
2985
2986 typedef struct
2987 {
2988 unsigned PWM2PHH0 : 1;
2989 unsigned PWM2PHH1 : 1;
2990 unsigned PWM2PHH2 : 1;
2991 unsigned PWM2PHH3 : 1;
2992 unsigned PWM2PHH4 : 1;
2993 unsigned PWM2PHH5 : 1;
2994 unsigned PWM2PHH6 : 1;
2995 unsigned PWM2PHH7 : 1;
2996 } __PWM2PHHbits_t;
2997
2998 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
2999
3000 #define _PWM2PHH0 0x01
3001 #define _PWM2PHH1 0x02
3002 #define _PWM2PHH2 0x04
3003 #define _PWM2PHH3 0x08
3004 #define _PWM2PHH4 0x10
3005 #define _PWM2PHH5 0x20
3006 #define _PWM2PHH6 0x40
3007 #define _PWM2PHH7 0x80
3008
3009 //==============================================================================
3010
3011 extern __at(0x0DA3) __sfr PWM2DC;
3012
3013 //==============================================================================
3014 // PWM2DCL Bits
3015
3016 extern __at(0x0DA3) __sfr PWM2DCL;
3017
3018 typedef struct
3019 {
3020 unsigned PWM2DCL0 : 1;
3021 unsigned PWM2DCL1 : 1;
3022 unsigned PWM2DCL2 : 1;
3023 unsigned PWM2DCL3 : 1;
3024 unsigned PWM2DCL4 : 1;
3025 unsigned PWM2DCL5 : 1;
3026 unsigned PWM2DCL6 : 1;
3027 unsigned PWM2DCL7 : 1;
3028 } __PWM2DCLbits_t;
3029
3030 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
3031
3032 #define _PWM2DCL0 0x01
3033 #define _PWM2DCL1 0x02
3034 #define _PWM2DCL2 0x04
3035 #define _PWM2DCL3 0x08
3036 #define _PWM2DCL4 0x10
3037 #define _PWM2DCL5 0x20
3038 #define _PWM2DCL6 0x40
3039 #define _PWM2DCL7 0x80
3040
3041 //==============================================================================
3042
3043
3044 //==============================================================================
3045 // PWM2DCH Bits
3046
3047 extern __at(0x0DA4) __sfr PWM2DCH;
3048
3049 typedef struct
3050 {
3051 unsigned PWM2DCH0 : 1;
3052 unsigned PWM2DCH1 : 1;
3053 unsigned PWM2DCH2 : 1;
3054 unsigned PWM2DCH3 : 1;
3055 unsigned PWM2DCH4 : 1;
3056 unsigned PWM2DCH5 : 1;
3057 unsigned PWM2DCH6 : 1;
3058 unsigned PWM2DCH7 : 1;
3059 } __PWM2DCHbits_t;
3060
3061 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
3062
3063 #define _PWM2DCH0 0x01
3064 #define _PWM2DCH1 0x02
3065 #define _PWM2DCH2 0x04
3066 #define _PWM2DCH3 0x08
3067 #define _PWM2DCH4 0x10
3068 #define _PWM2DCH5 0x20
3069 #define _PWM2DCH6 0x40
3070 #define _PWM2DCH7 0x80
3071
3072 //==============================================================================
3073
3074 extern __at(0x0DA5) __sfr PWM2PR;
3075
3076 //==============================================================================
3077 // PWM2PRL Bits
3078
3079 extern __at(0x0DA5) __sfr PWM2PRL;
3080
3081 typedef struct
3082 {
3083 unsigned PWM2PRL0 : 1;
3084 unsigned PWM2PRL1 : 1;
3085 unsigned PWM2PRL2 : 1;
3086 unsigned PWM2PRL3 : 1;
3087 unsigned PWM2PRL4 : 1;
3088 unsigned PWM2PRL5 : 1;
3089 unsigned PWM2PRL6 : 1;
3090 unsigned PWM2PRL7 : 1;
3091 } __PWM2PRLbits_t;
3092
3093 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
3094
3095 #define _PWM2PRL0 0x01
3096 #define _PWM2PRL1 0x02
3097 #define _PWM2PRL2 0x04
3098 #define _PWM2PRL3 0x08
3099 #define _PWM2PRL4 0x10
3100 #define _PWM2PRL5 0x20
3101 #define _PWM2PRL6 0x40
3102 #define _PWM2PRL7 0x80
3103
3104 //==============================================================================
3105
3106
3107 //==============================================================================
3108 // PWM2PRH Bits
3109
3110 extern __at(0x0DA6) __sfr PWM2PRH;
3111
3112 typedef struct
3113 {
3114 unsigned PWM2PRH0 : 1;
3115 unsigned PWM2PRH1 : 1;
3116 unsigned PWM2PRH2 : 1;
3117 unsigned PWM2PRH3 : 1;
3118 unsigned PWM2PRH4 : 1;
3119 unsigned PWM2PRH5 : 1;
3120 unsigned PWM2PRH6 : 1;
3121 unsigned PWM2PRH7 : 1;
3122 } __PWM2PRHbits_t;
3123
3124 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
3125
3126 #define _PWM2PRH0 0x01
3127 #define _PWM2PRH1 0x02
3128 #define _PWM2PRH2 0x04
3129 #define _PWM2PRH3 0x08
3130 #define _PWM2PRH4 0x10
3131 #define _PWM2PRH5 0x20
3132 #define _PWM2PRH6 0x40
3133 #define _PWM2PRH7 0x80
3134
3135 //==============================================================================
3136
3137 extern __at(0x0DA7) __sfr PWM2OF;
3138
3139 //==============================================================================
3140 // PWM2OFL Bits
3141
3142 extern __at(0x0DA7) __sfr PWM2OFL;
3143
3144 typedef struct
3145 {
3146 unsigned PWM2OFL0 : 1;
3147 unsigned PWM2OFL1 : 1;
3148 unsigned PWM2OFL2 : 1;
3149 unsigned PWM2OFL3 : 1;
3150 unsigned PWM2OFL4 : 1;
3151 unsigned PWM2OFL5 : 1;
3152 unsigned PWM2OFL6 : 1;
3153 unsigned PWM2OFL7 : 1;
3154 } __PWM2OFLbits_t;
3155
3156 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
3157
3158 #define _PWM2OFL0 0x01
3159 #define _PWM2OFL1 0x02
3160 #define _PWM2OFL2 0x04
3161 #define _PWM2OFL3 0x08
3162 #define _PWM2OFL4 0x10
3163 #define _PWM2OFL5 0x20
3164 #define _PWM2OFL6 0x40
3165 #define _PWM2OFL7 0x80
3166
3167 //==============================================================================
3168
3169
3170 //==============================================================================
3171 // PWM2OFH Bits
3172
3173 extern __at(0x0DA8) __sfr PWM2OFH;
3174
3175 typedef struct
3176 {
3177 unsigned PWM2OFH0 : 1;
3178 unsigned PWM2OFH1 : 1;
3179 unsigned PWM2OFH2 : 1;
3180 unsigned PWM2OFH3 : 1;
3181 unsigned PWM2OFH4 : 1;
3182 unsigned PWM2OFH5 : 1;
3183 unsigned PWM2OFH6 : 1;
3184 unsigned PWM2OFH7 : 1;
3185 } __PWM2OFHbits_t;
3186
3187 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
3188
3189 #define _PWM2OFH0 0x01
3190 #define _PWM2OFH1 0x02
3191 #define _PWM2OFH2 0x04
3192 #define _PWM2OFH3 0x08
3193 #define _PWM2OFH4 0x10
3194 #define _PWM2OFH5 0x20
3195 #define _PWM2OFH6 0x40
3196 #define _PWM2OFH7 0x80
3197
3198 //==============================================================================
3199
3200 extern __at(0x0DA9) __sfr PWM2TMR;
3201
3202 //==============================================================================
3203 // PWM2TMRL Bits
3204
3205 extern __at(0x0DA9) __sfr PWM2TMRL;
3206
3207 typedef struct
3208 {
3209 unsigned PWM2TMRL0 : 1;
3210 unsigned PWM2TMRL1 : 1;
3211 unsigned PWM2TMRL2 : 1;
3212 unsigned PWM2TMRL3 : 1;
3213 unsigned PWM2TMRL4 : 1;
3214 unsigned PWM2TMRL5 : 1;
3215 unsigned PWM2TMRL6 : 1;
3216 unsigned PWM2TMRL7 : 1;
3217 } __PWM2TMRLbits_t;
3218
3219 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
3220
3221 #define _PWM2TMRL0 0x01
3222 #define _PWM2TMRL1 0x02
3223 #define _PWM2TMRL2 0x04
3224 #define _PWM2TMRL3 0x08
3225 #define _PWM2TMRL4 0x10
3226 #define _PWM2TMRL5 0x20
3227 #define _PWM2TMRL6 0x40
3228 #define _PWM2TMRL7 0x80
3229
3230 //==============================================================================
3231
3232
3233 //==============================================================================
3234 // PWM2TMRH Bits
3235
3236 extern __at(0x0DAA) __sfr PWM2TMRH;
3237
3238 typedef struct
3239 {
3240 unsigned PWM2TMRH0 : 1;
3241 unsigned PWM2TMRH1 : 1;
3242 unsigned PWM2TMRH2 : 1;
3243 unsigned PWM2TMRH3 : 1;
3244 unsigned PWM2TMRH4 : 1;
3245 unsigned PWM2TMRH5 : 1;
3246 unsigned PWM2TMRH6 : 1;
3247 unsigned PWM2TMRH7 : 1;
3248 } __PWM2TMRHbits_t;
3249
3250 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
3251
3252 #define _PWM2TMRH0 0x01
3253 #define _PWM2TMRH1 0x02
3254 #define _PWM2TMRH2 0x04
3255 #define _PWM2TMRH3 0x08
3256 #define _PWM2TMRH4 0x10
3257 #define _PWM2TMRH5 0x20
3258 #define _PWM2TMRH6 0x40
3259 #define _PWM2TMRH7 0x80
3260
3261 //==============================================================================
3262
3263
3264 //==============================================================================
3265 // PWM2CON Bits
3266
3267 extern __at(0x0DAB) __sfr PWM2CON;
3268
3269 typedef union
3270 {
3271 struct
3272 {
3273 unsigned : 1;
3274 unsigned : 1;
3275 unsigned PWM2MODE0 : 1;
3276 unsigned PWM2MODE1 : 1;
3277 unsigned POL : 1;
3278 unsigned OUT : 1;
3279 unsigned OE : 1;
3280 unsigned EN : 1;
3281 };
3282
3283 struct
3284 {
3285 unsigned : 1;
3286 unsigned : 1;
3287 unsigned MODE0 : 1;
3288 unsigned MODE1 : 1;
3289 unsigned PWM2POL : 1;
3290 unsigned PWM2OUT : 1;
3291 unsigned PWM2OE : 1;
3292 unsigned PWM2EN : 1;
3293 };
3294
3295 struct
3296 {
3297 unsigned : 2;
3298 unsigned PWM2MODE : 2;
3299 unsigned : 4;
3300 };
3301
3302 struct
3303 {
3304 unsigned : 2;
3305 unsigned MODE : 2;
3306 unsigned : 4;
3307 };
3308 } __PWM2CONbits_t;
3309
3310 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
3311
3312 #define _PWM2CON_PWM2MODE0 0x04
3313 #define _PWM2CON_MODE0 0x04
3314 #define _PWM2CON_PWM2MODE1 0x08
3315 #define _PWM2CON_MODE1 0x08
3316 #define _PWM2CON_POL 0x10
3317 #define _PWM2CON_PWM2POL 0x10
3318 #define _PWM2CON_OUT 0x20
3319 #define _PWM2CON_PWM2OUT 0x20
3320 #define _PWM2CON_OE 0x40
3321 #define _PWM2CON_PWM2OE 0x40
3322 #define _PWM2CON_EN 0x80
3323 #define _PWM2CON_PWM2EN 0x80
3324
3325 //==============================================================================
3326
3327
3328 //==============================================================================
3329 // PWM2INTCON Bits
3330
3331 extern __at(0x0DAC) __sfr PWM2INTCON;
3332
3333 typedef union
3334 {
3335 struct
3336 {
3337 unsigned PRIE : 1;
3338 unsigned DCIE : 1;
3339 unsigned PHIE : 1;
3340 unsigned OFIE : 1;
3341 unsigned : 1;
3342 unsigned : 1;
3343 unsigned : 1;
3344 unsigned : 1;
3345 };
3346
3347 struct
3348 {
3349 unsigned PWM2PRIE : 1;
3350 unsigned PWM2DCIE : 1;
3351 unsigned PWM2PHIE : 1;
3352 unsigned PWM2OFIE : 1;
3353 unsigned : 1;
3354 unsigned : 1;
3355 unsigned : 1;
3356 unsigned : 1;
3357 };
3358 } __PWM2INTCONbits_t;
3359
3360 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
3361
3362 #define _PWM2INTCON_PRIE 0x01
3363 #define _PWM2INTCON_PWM2PRIE 0x01
3364 #define _PWM2INTCON_DCIE 0x02
3365 #define _PWM2INTCON_PWM2DCIE 0x02
3366 #define _PWM2INTCON_PHIE 0x04
3367 #define _PWM2INTCON_PWM2PHIE 0x04
3368 #define _PWM2INTCON_OFIE 0x08
3369 #define _PWM2INTCON_PWM2OFIE 0x08
3370
3371 //==============================================================================
3372
3373
3374 //==============================================================================
3375 // PWM2INTE Bits
3376
3377 extern __at(0x0DAC) __sfr PWM2INTE;
3378
3379 typedef union
3380 {
3381 struct
3382 {
3383 unsigned PRIE : 1;
3384 unsigned DCIE : 1;
3385 unsigned PHIE : 1;
3386 unsigned OFIE : 1;
3387 unsigned : 1;
3388 unsigned : 1;
3389 unsigned : 1;
3390 unsigned : 1;
3391 };
3392
3393 struct
3394 {
3395 unsigned PWM2PRIE : 1;
3396 unsigned PWM2DCIE : 1;
3397 unsigned PWM2PHIE : 1;
3398 unsigned PWM2OFIE : 1;
3399 unsigned : 1;
3400 unsigned : 1;
3401 unsigned : 1;
3402 unsigned : 1;
3403 };
3404 } __PWM2INTEbits_t;
3405
3406 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
3407
3408 #define _PWM2INTE_PRIE 0x01
3409 #define _PWM2INTE_PWM2PRIE 0x01
3410 #define _PWM2INTE_DCIE 0x02
3411 #define _PWM2INTE_PWM2DCIE 0x02
3412 #define _PWM2INTE_PHIE 0x04
3413 #define _PWM2INTE_PWM2PHIE 0x04
3414 #define _PWM2INTE_OFIE 0x08
3415 #define _PWM2INTE_PWM2OFIE 0x08
3416
3417 //==============================================================================
3418
3419
3420 //==============================================================================
3421 // PWM2INTF Bits
3422
3423 extern __at(0x0DAD) __sfr PWM2INTF;
3424
3425 typedef union
3426 {
3427 struct
3428 {
3429 unsigned PRIF : 1;
3430 unsigned DCIF : 1;
3431 unsigned PHIF : 1;
3432 unsigned OFIF : 1;
3433 unsigned : 1;
3434 unsigned : 1;
3435 unsigned : 1;
3436 unsigned : 1;
3437 };
3438
3439 struct
3440 {
3441 unsigned PWM2PRIF : 1;
3442 unsigned PWM2DCIF : 1;
3443 unsigned PWM2PHIF : 1;
3444 unsigned PWM2OFIF : 1;
3445 unsigned : 1;
3446 unsigned : 1;
3447 unsigned : 1;
3448 unsigned : 1;
3449 };
3450 } __PWM2INTFbits_t;
3451
3452 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
3453
3454 #define _PWM2INTF_PRIF 0x01
3455 #define _PWM2INTF_PWM2PRIF 0x01
3456 #define _PWM2INTF_DCIF 0x02
3457 #define _PWM2INTF_PWM2DCIF 0x02
3458 #define _PWM2INTF_PHIF 0x04
3459 #define _PWM2INTF_PWM2PHIF 0x04
3460 #define _PWM2INTF_OFIF 0x08
3461 #define _PWM2INTF_PWM2OFIF 0x08
3462
3463 //==============================================================================
3464
3465
3466 //==============================================================================
3467 // PWM2INTFLG Bits
3468
3469 extern __at(0x0DAD) __sfr PWM2INTFLG;
3470
3471 typedef union
3472 {
3473 struct
3474 {
3475 unsigned PRIF : 1;
3476 unsigned DCIF : 1;
3477 unsigned PHIF : 1;
3478 unsigned OFIF : 1;
3479 unsigned : 1;
3480 unsigned : 1;
3481 unsigned : 1;
3482 unsigned : 1;
3483 };
3484
3485 struct
3486 {
3487 unsigned PWM2PRIF : 1;
3488 unsigned PWM2DCIF : 1;
3489 unsigned PWM2PHIF : 1;
3490 unsigned PWM2OFIF : 1;
3491 unsigned : 1;
3492 unsigned : 1;
3493 unsigned : 1;
3494 unsigned : 1;
3495 };
3496 } __PWM2INTFLGbits_t;
3497
3498 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
3499
3500 #define _PWM2INTFLG_PRIF 0x01
3501 #define _PWM2INTFLG_PWM2PRIF 0x01
3502 #define _PWM2INTFLG_DCIF 0x02
3503 #define _PWM2INTFLG_PWM2DCIF 0x02
3504 #define _PWM2INTFLG_PHIF 0x04
3505 #define _PWM2INTFLG_PWM2PHIF 0x04
3506 #define _PWM2INTFLG_OFIF 0x08
3507 #define _PWM2INTFLG_PWM2OFIF 0x08
3508
3509 //==============================================================================
3510
3511
3512 //==============================================================================
3513 // PWM2CLKCON Bits
3514
3515 extern __at(0x0DAE) __sfr PWM2CLKCON;
3516
3517 typedef union
3518 {
3519 struct
3520 {
3521 unsigned PWM2CS0 : 1;
3522 unsigned PWM2CS1 : 1;
3523 unsigned : 1;
3524 unsigned : 1;
3525 unsigned PWM2PS0 : 1;
3526 unsigned PWM2PS1 : 1;
3527 unsigned PWM2PS2 : 1;
3528 unsigned : 1;
3529 };
3530
3531 struct
3532 {
3533 unsigned CS0 : 1;
3534 unsigned CS1 : 1;
3535 unsigned : 1;
3536 unsigned : 1;
3537 unsigned PS0 : 1;
3538 unsigned PS1 : 1;
3539 unsigned PS2 : 1;
3540 unsigned : 1;
3541 };
3542
3543 struct
3544 {
3545 unsigned CS : 2;
3546 unsigned : 6;
3547 };
3548
3549 struct
3550 {
3551 unsigned PWM2CS : 2;
3552 unsigned : 6;
3553 };
3554
3555 struct
3556 {
3557 unsigned : 4;
3558 unsigned PS : 3;
3559 unsigned : 1;
3560 };
3561
3562 struct
3563 {
3564 unsigned : 4;
3565 unsigned PWM2PS : 3;
3566 unsigned : 1;
3567 };
3568 } __PWM2CLKCONbits_t;
3569
3570 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
3571
3572 #define _PWM2CLKCON_PWM2CS0 0x01
3573 #define _PWM2CLKCON_CS0 0x01
3574 #define _PWM2CLKCON_PWM2CS1 0x02
3575 #define _PWM2CLKCON_CS1 0x02
3576 #define _PWM2CLKCON_PWM2PS0 0x10
3577 #define _PWM2CLKCON_PS0 0x10
3578 #define _PWM2CLKCON_PWM2PS1 0x20
3579 #define _PWM2CLKCON_PS1 0x20
3580 #define _PWM2CLKCON_PWM2PS2 0x40
3581 #define _PWM2CLKCON_PS2 0x40
3582
3583 //==============================================================================
3584
3585
3586 //==============================================================================
3587 // PWM2LDCON Bits
3588
3589 extern __at(0x0DAF) __sfr PWM2LDCON;
3590
3591 typedef union
3592 {
3593 struct
3594 {
3595 unsigned PWM2LDS0 : 1;
3596 unsigned PWM2LDS1 : 1;
3597 unsigned : 1;
3598 unsigned : 1;
3599 unsigned : 1;
3600 unsigned : 1;
3601 unsigned LDT : 1;
3602 unsigned LDA : 1;
3603 };
3604
3605 struct
3606 {
3607 unsigned LDS0 : 1;
3608 unsigned LDS1 : 1;
3609 unsigned : 1;
3610 unsigned : 1;
3611 unsigned : 1;
3612 unsigned : 1;
3613 unsigned PWM2LDM : 1;
3614 unsigned PWM2LD : 1;
3615 };
3616
3617 struct
3618 {
3619 unsigned LDS : 2;
3620 unsigned : 6;
3621 };
3622
3623 struct
3624 {
3625 unsigned PWM2LDS : 2;
3626 unsigned : 6;
3627 };
3628 } __PWM2LDCONbits_t;
3629
3630 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
3631
3632 #define _PWM2LDCON_PWM2LDS0 0x01
3633 #define _PWM2LDCON_LDS0 0x01
3634 #define _PWM2LDCON_PWM2LDS1 0x02
3635 #define _PWM2LDCON_LDS1 0x02
3636 #define _PWM2LDCON_LDT 0x40
3637 #define _PWM2LDCON_PWM2LDM 0x40
3638 #define _PWM2LDCON_LDA 0x80
3639 #define _PWM2LDCON_PWM2LD 0x80
3640
3641 //==============================================================================
3642
3643
3644 //==============================================================================
3645 // PWM2OFCON Bits
3646
3647 extern __at(0x0DB0) __sfr PWM2OFCON;
3648
3649 typedef union
3650 {
3651 struct
3652 {
3653 unsigned PWM2OFS0 : 1;
3654 unsigned PWM2OFS1 : 1;
3655 unsigned : 1;
3656 unsigned : 1;
3657 unsigned OFO : 1;
3658 unsigned PWM2OFM0 : 1;
3659 unsigned PWM2OFM1 : 1;
3660 unsigned : 1;
3661 };
3662
3663 struct
3664 {
3665 unsigned OFS0 : 1;
3666 unsigned OFS1 : 1;
3667 unsigned : 1;
3668 unsigned : 1;
3669 unsigned PWM2OFMC : 1;
3670 unsigned OFM0 : 1;
3671 unsigned OFM1 : 1;
3672 unsigned : 1;
3673 };
3674
3675 struct
3676 {
3677 unsigned PWM2OFS : 2;
3678 unsigned : 6;
3679 };
3680
3681 struct
3682 {
3683 unsigned OFS : 2;
3684 unsigned : 6;
3685 };
3686
3687 struct
3688 {
3689 unsigned : 5;
3690 unsigned PWM2OFM : 2;
3691 unsigned : 1;
3692 };
3693
3694 struct
3695 {
3696 unsigned : 5;
3697 unsigned OFM : 2;
3698 unsigned : 1;
3699 };
3700 } __PWM2OFCONbits_t;
3701
3702 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
3703
3704 #define _PWM2OFCON_PWM2OFS0 0x01
3705 #define _PWM2OFCON_OFS0 0x01
3706 #define _PWM2OFCON_PWM2OFS1 0x02
3707 #define _PWM2OFCON_OFS1 0x02
3708 #define _PWM2OFCON_OFO 0x10
3709 #define _PWM2OFCON_PWM2OFMC 0x10
3710 #define _PWM2OFCON_PWM2OFM0 0x20
3711 #define _PWM2OFCON_OFM0 0x20
3712 #define _PWM2OFCON_PWM2OFM1 0x40
3713 #define _PWM2OFCON_OFM1 0x40
3714
3715 //==============================================================================
3716
3717 extern __at(0x0DB1) __sfr PWM3PH;
3718
3719 //==============================================================================
3720 // PWM3PHL Bits
3721
3722 extern __at(0x0DB1) __sfr PWM3PHL;
3723
3724 typedef struct
3725 {
3726 unsigned PWM3PHL0 : 1;
3727 unsigned PWM3PHL1 : 1;
3728 unsigned PWM3PHL2 : 1;
3729 unsigned PWM3PHL3 : 1;
3730 unsigned PWM3PHL4 : 1;
3731 unsigned PWM3PHL5 : 1;
3732 unsigned PWM3PHL6 : 1;
3733 unsigned PWM3PHL7 : 1;
3734 } __PWM3PHLbits_t;
3735
3736 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
3737
3738 #define _PWM3PHL0 0x01
3739 #define _PWM3PHL1 0x02
3740 #define _PWM3PHL2 0x04
3741 #define _PWM3PHL3 0x08
3742 #define _PWM3PHL4 0x10
3743 #define _PWM3PHL5 0x20
3744 #define _PWM3PHL6 0x40
3745 #define _PWM3PHL7 0x80
3746
3747 //==============================================================================
3748
3749
3750 //==============================================================================
3751 // PWM3PHH Bits
3752
3753 extern __at(0x0DB2) __sfr PWM3PHH;
3754
3755 typedef struct
3756 {
3757 unsigned PWM3PHH0 : 1;
3758 unsigned PWM3PHH1 : 1;
3759 unsigned PWM3PHH2 : 1;
3760 unsigned PWM3PHH3 : 1;
3761 unsigned PWM3PHH4 : 1;
3762 unsigned PWM3PHH5 : 1;
3763 unsigned PWM3PHH6 : 1;
3764 unsigned PWM3PHH7 : 1;
3765 } __PWM3PHHbits_t;
3766
3767 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
3768
3769 #define _PWM3PHH0 0x01
3770 #define _PWM3PHH1 0x02
3771 #define _PWM3PHH2 0x04
3772 #define _PWM3PHH3 0x08
3773 #define _PWM3PHH4 0x10
3774 #define _PWM3PHH5 0x20
3775 #define _PWM3PHH6 0x40
3776 #define _PWM3PHH7 0x80
3777
3778 //==============================================================================
3779
3780 extern __at(0x0DB3) __sfr PWM3DC;
3781
3782 //==============================================================================
3783 // PWM3DCL Bits
3784
3785 extern __at(0x0DB3) __sfr PWM3DCL;
3786
3787 typedef struct
3788 {
3789 unsigned PWM3DCL0 : 1;
3790 unsigned PWM3DCL1 : 1;
3791 unsigned PWM3DCL2 : 1;
3792 unsigned PWM3DCL3 : 1;
3793 unsigned PWM3DCL4 : 1;
3794 unsigned PWM3DCL5 : 1;
3795 unsigned PWM3DCL6 : 1;
3796 unsigned PWM3DCL7 : 1;
3797 } __PWM3DCLbits_t;
3798
3799 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
3800
3801 #define _PWM3DCL0 0x01
3802 #define _PWM3DCL1 0x02
3803 #define _PWM3DCL2 0x04
3804 #define _PWM3DCL3 0x08
3805 #define _PWM3DCL4 0x10
3806 #define _PWM3DCL5 0x20
3807 #define _PWM3DCL6 0x40
3808 #define _PWM3DCL7 0x80
3809
3810 //==============================================================================
3811
3812
3813 //==============================================================================
3814 // PWM3DCH Bits
3815
3816 extern __at(0x0DB4) __sfr PWM3DCH;
3817
3818 typedef struct
3819 {
3820 unsigned PWM3DCH0 : 1;
3821 unsigned PWM3DCH1 : 1;
3822 unsigned PWM3DCH2 : 1;
3823 unsigned PWM3DCH3 : 1;
3824 unsigned PWM3DCH4 : 1;
3825 unsigned PWM3DCH5 : 1;
3826 unsigned PWM3DCH6 : 1;
3827 unsigned PWM3DCH7 : 1;
3828 } __PWM3DCHbits_t;
3829
3830 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
3831
3832 #define _PWM3DCH0 0x01
3833 #define _PWM3DCH1 0x02
3834 #define _PWM3DCH2 0x04
3835 #define _PWM3DCH3 0x08
3836 #define _PWM3DCH4 0x10
3837 #define _PWM3DCH5 0x20
3838 #define _PWM3DCH6 0x40
3839 #define _PWM3DCH7 0x80
3840
3841 //==============================================================================
3842
3843 extern __at(0x0DB5) __sfr PWM3PR;
3844
3845 //==============================================================================
3846 // PWM3PRL Bits
3847
3848 extern __at(0x0DB5) __sfr PWM3PRL;
3849
3850 typedef struct
3851 {
3852 unsigned PWM3PRL0 : 1;
3853 unsigned PWM3PRL1 : 1;
3854 unsigned PWM3PRL2 : 1;
3855 unsigned PWM3PRL3 : 1;
3856 unsigned PWM3PRL4 : 1;
3857 unsigned PWM3PRL5 : 1;
3858 unsigned PWM3PRL6 : 1;
3859 unsigned PWM3PRL7 : 1;
3860 } __PWM3PRLbits_t;
3861
3862 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
3863
3864 #define _PWM3PRL0 0x01
3865 #define _PWM3PRL1 0x02
3866 #define _PWM3PRL2 0x04
3867 #define _PWM3PRL3 0x08
3868 #define _PWM3PRL4 0x10
3869 #define _PWM3PRL5 0x20
3870 #define _PWM3PRL6 0x40
3871 #define _PWM3PRL7 0x80
3872
3873 //==============================================================================
3874
3875
3876 //==============================================================================
3877 // PWM3PRH Bits
3878
3879 extern __at(0x0DB6) __sfr PWM3PRH;
3880
3881 typedef struct
3882 {
3883 unsigned PWM3PRH0 : 1;
3884 unsigned PWM3PRH1 : 1;
3885 unsigned PWM3PRH2 : 1;
3886 unsigned PWM3PRH3 : 1;
3887 unsigned PWM3PRH4 : 1;
3888 unsigned PWM3PRH5 : 1;
3889 unsigned PWM3PRH6 : 1;
3890 unsigned PWM3PRH7 : 1;
3891 } __PWM3PRHbits_t;
3892
3893 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
3894
3895 #define _PWM3PRH0 0x01
3896 #define _PWM3PRH1 0x02
3897 #define _PWM3PRH2 0x04
3898 #define _PWM3PRH3 0x08
3899 #define _PWM3PRH4 0x10
3900 #define _PWM3PRH5 0x20
3901 #define _PWM3PRH6 0x40
3902 #define _PWM3PRH7 0x80
3903
3904 //==============================================================================
3905
3906 extern __at(0x0DB7) __sfr PWM3OF;
3907
3908 //==============================================================================
3909 // PWM3OFL Bits
3910
3911 extern __at(0x0DB7) __sfr PWM3OFL;
3912
3913 typedef struct
3914 {
3915 unsigned PWM3OFL0 : 1;
3916 unsigned PWM3OFL1 : 1;
3917 unsigned PWM3OFL2 : 1;
3918 unsigned PWM3OFL3 : 1;
3919 unsigned PWM3OFL4 : 1;
3920 unsigned PWM3OFL5 : 1;
3921 unsigned PWM3OFL6 : 1;
3922 unsigned PWM3OFL7 : 1;
3923 } __PWM3OFLbits_t;
3924
3925 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
3926
3927 #define _PWM3OFL0 0x01
3928 #define _PWM3OFL1 0x02
3929 #define _PWM3OFL2 0x04
3930 #define _PWM3OFL3 0x08
3931 #define _PWM3OFL4 0x10
3932 #define _PWM3OFL5 0x20
3933 #define _PWM3OFL6 0x40
3934 #define _PWM3OFL7 0x80
3935
3936 //==============================================================================
3937
3938
3939 //==============================================================================
3940 // PWM3OFH Bits
3941
3942 extern __at(0x0DB8) __sfr PWM3OFH;
3943
3944 typedef struct
3945 {
3946 unsigned PWM3OFH0 : 1;
3947 unsigned PWM3OFH1 : 1;
3948 unsigned PWM3OFH2 : 1;
3949 unsigned PWM3OFH3 : 1;
3950 unsigned PWM3OFH4 : 1;
3951 unsigned PWM3OFH5 : 1;
3952 unsigned PWM3OFH6 : 1;
3953 unsigned PWM3OFH7 : 1;
3954 } __PWM3OFHbits_t;
3955
3956 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
3957
3958 #define _PWM3OFH0 0x01
3959 #define _PWM3OFH1 0x02
3960 #define _PWM3OFH2 0x04
3961 #define _PWM3OFH3 0x08
3962 #define _PWM3OFH4 0x10
3963 #define _PWM3OFH5 0x20
3964 #define _PWM3OFH6 0x40
3965 #define _PWM3OFH7 0x80
3966
3967 //==============================================================================
3968
3969 extern __at(0x0DB9) __sfr PWM3TMR;
3970
3971 //==============================================================================
3972 // PWM3TMRL Bits
3973
3974 extern __at(0x0DB9) __sfr PWM3TMRL;
3975
3976 typedef struct
3977 {
3978 unsigned PWM3TMRL0 : 1;
3979 unsigned PWM3TMRL1 : 1;
3980 unsigned PWM3TMRL2 : 1;
3981 unsigned PWM3TMRL3 : 1;
3982 unsigned PWM3TMRL4 : 1;
3983 unsigned PWM3TMRL5 : 1;
3984 unsigned PWM3TMRL6 : 1;
3985 unsigned PWM3TMRL7 : 1;
3986 } __PWM3TMRLbits_t;
3987
3988 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
3989
3990 #define _PWM3TMRL0 0x01
3991 #define _PWM3TMRL1 0x02
3992 #define _PWM3TMRL2 0x04
3993 #define _PWM3TMRL3 0x08
3994 #define _PWM3TMRL4 0x10
3995 #define _PWM3TMRL5 0x20
3996 #define _PWM3TMRL6 0x40
3997 #define _PWM3TMRL7 0x80
3998
3999 //==============================================================================
4000
4001
4002 //==============================================================================
4003 // PWM3TMRH Bits
4004
4005 extern __at(0x0DBA) __sfr PWM3TMRH;
4006
4007 typedef struct
4008 {
4009 unsigned PWM3TMRH0 : 1;
4010 unsigned PWM3TMRH1 : 1;
4011 unsigned PWM3TMRH2 : 1;
4012 unsigned PWM3TMRH3 : 1;
4013 unsigned PWM3TMRH4 : 1;
4014 unsigned PWM3TMRH5 : 1;
4015 unsigned PWM3TMRH6 : 1;
4016 unsigned PWM3TMRH7 : 1;
4017 } __PWM3TMRHbits_t;
4018
4019 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
4020
4021 #define _PWM3TMRH0 0x01
4022 #define _PWM3TMRH1 0x02
4023 #define _PWM3TMRH2 0x04
4024 #define _PWM3TMRH3 0x08
4025 #define _PWM3TMRH4 0x10
4026 #define _PWM3TMRH5 0x20
4027 #define _PWM3TMRH6 0x40
4028 #define _PWM3TMRH7 0x80
4029
4030 //==============================================================================
4031
4032
4033 //==============================================================================
4034 // PWM3CON Bits
4035
4036 extern __at(0x0DBB) __sfr PWM3CON;
4037
4038 typedef union
4039 {
4040 struct
4041 {
4042 unsigned : 1;
4043 unsigned : 1;
4044 unsigned PWM3MODE0 : 1;
4045 unsigned PWM3MODE1 : 1;
4046 unsigned POL : 1;
4047 unsigned OUT : 1;
4048 unsigned OE : 1;
4049 unsigned EN : 1;
4050 };
4051
4052 struct
4053 {
4054 unsigned : 1;
4055 unsigned : 1;
4056 unsigned MODE0 : 1;
4057 unsigned MODE1 : 1;
4058 unsigned PWM3POL : 1;
4059 unsigned PWM3OUT : 1;
4060 unsigned PWM3OE : 1;
4061 unsigned PWM3EN : 1;
4062 };
4063
4064 struct
4065 {
4066 unsigned : 2;
4067 unsigned PWM3MODE : 2;
4068 unsigned : 4;
4069 };
4070
4071 struct
4072 {
4073 unsigned : 2;
4074 unsigned MODE : 2;
4075 unsigned : 4;
4076 };
4077 } __PWM3CONbits_t;
4078
4079 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
4080
4081 #define _PWM3CON_PWM3MODE0 0x04
4082 #define _PWM3CON_MODE0 0x04
4083 #define _PWM3CON_PWM3MODE1 0x08
4084 #define _PWM3CON_MODE1 0x08
4085 #define _PWM3CON_POL 0x10
4086 #define _PWM3CON_PWM3POL 0x10
4087 #define _PWM3CON_OUT 0x20
4088 #define _PWM3CON_PWM3OUT 0x20
4089 #define _PWM3CON_OE 0x40
4090 #define _PWM3CON_PWM3OE 0x40
4091 #define _PWM3CON_EN 0x80
4092 #define _PWM3CON_PWM3EN 0x80
4093
4094 //==============================================================================
4095
4096
4097 //==============================================================================
4098 // PWM3INTCON Bits
4099
4100 extern __at(0x0DBC) __sfr PWM3INTCON;
4101
4102 typedef union
4103 {
4104 struct
4105 {
4106 unsigned PRIE : 1;
4107 unsigned DCIE : 1;
4108 unsigned PHIE : 1;
4109 unsigned OFIE : 1;
4110 unsigned : 1;
4111 unsigned : 1;
4112 unsigned : 1;
4113 unsigned : 1;
4114 };
4115
4116 struct
4117 {
4118 unsigned PWM3PRIE : 1;
4119 unsigned PWM3DCIE : 1;
4120 unsigned PWM3PHIE : 1;
4121 unsigned PWM3OFIE : 1;
4122 unsigned : 1;
4123 unsigned : 1;
4124 unsigned : 1;
4125 unsigned : 1;
4126 };
4127 } __PWM3INTCONbits_t;
4128
4129 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
4130
4131 #define _PWM3INTCON_PRIE 0x01
4132 #define _PWM3INTCON_PWM3PRIE 0x01
4133 #define _PWM3INTCON_DCIE 0x02
4134 #define _PWM3INTCON_PWM3DCIE 0x02
4135 #define _PWM3INTCON_PHIE 0x04
4136 #define _PWM3INTCON_PWM3PHIE 0x04
4137 #define _PWM3INTCON_OFIE 0x08
4138 #define _PWM3INTCON_PWM3OFIE 0x08
4139
4140 //==============================================================================
4141
4142
4143 //==============================================================================
4144 // PWM3INTE Bits
4145
4146 extern __at(0x0DBC) __sfr PWM3INTE;
4147
4148 typedef union
4149 {
4150 struct
4151 {
4152 unsigned PRIE : 1;
4153 unsigned DCIE : 1;
4154 unsigned PHIE : 1;
4155 unsigned OFIE : 1;
4156 unsigned : 1;
4157 unsigned : 1;
4158 unsigned : 1;
4159 unsigned : 1;
4160 };
4161
4162 struct
4163 {
4164 unsigned PWM3PRIE : 1;
4165 unsigned PWM3DCIE : 1;
4166 unsigned PWM3PHIE : 1;
4167 unsigned PWM3OFIE : 1;
4168 unsigned : 1;
4169 unsigned : 1;
4170 unsigned : 1;
4171 unsigned : 1;
4172 };
4173 } __PWM3INTEbits_t;
4174
4175 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
4176
4177 #define _PWM3INTE_PRIE 0x01
4178 #define _PWM3INTE_PWM3PRIE 0x01
4179 #define _PWM3INTE_DCIE 0x02
4180 #define _PWM3INTE_PWM3DCIE 0x02
4181 #define _PWM3INTE_PHIE 0x04
4182 #define _PWM3INTE_PWM3PHIE 0x04
4183 #define _PWM3INTE_OFIE 0x08
4184 #define _PWM3INTE_PWM3OFIE 0x08
4185
4186 //==============================================================================
4187
4188
4189 //==============================================================================
4190 // PWM3INTF Bits
4191
4192 extern __at(0x0DBD) __sfr PWM3INTF;
4193
4194 typedef union
4195 {
4196 struct
4197 {
4198 unsigned PRIF : 1;
4199 unsigned DCIF : 1;
4200 unsigned PHIF : 1;
4201 unsigned OFIF : 1;
4202 unsigned : 1;
4203 unsigned : 1;
4204 unsigned : 1;
4205 unsigned : 1;
4206 };
4207
4208 struct
4209 {
4210 unsigned PWM3PRIF : 1;
4211 unsigned PWM3DCIF : 1;
4212 unsigned PWM3PHIF : 1;
4213 unsigned PWM3OFIF : 1;
4214 unsigned : 1;
4215 unsigned : 1;
4216 unsigned : 1;
4217 unsigned : 1;
4218 };
4219 } __PWM3INTFbits_t;
4220
4221 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
4222
4223 #define _PWM3INTF_PRIF 0x01
4224 #define _PWM3INTF_PWM3PRIF 0x01
4225 #define _PWM3INTF_DCIF 0x02
4226 #define _PWM3INTF_PWM3DCIF 0x02
4227 #define _PWM3INTF_PHIF 0x04
4228 #define _PWM3INTF_PWM3PHIF 0x04
4229 #define _PWM3INTF_OFIF 0x08
4230 #define _PWM3INTF_PWM3OFIF 0x08
4231
4232 //==============================================================================
4233
4234
4235 //==============================================================================
4236 // PWM3INTFLG Bits
4237
4238 extern __at(0x0DBD) __sfr PWM3INTFLG;
4239
4240 typedef union
4241 {
4242 struct
4243 {
4244 unsigned PRIF : 1;
4245 unsigned DCIF : 1;
4246 unsigned PHIF : 1;
4247 unsigned OFIF : 1;
4248 unsigned : 1;
4249 unsigned : 1;
4250 unsigned : 1;
4251 unsigned : 1;
4252 };
4253
4254 struct
4255 {
4256 unsigned PWM3PRIF : 1;
4257 unsigned PWM3DCIF : 1;
4258 unsigned PWM3PHIF : 1;
4259 unsigned PWM3OFIF : 1;
4260 unsigned : 1;
4261 unsigned : 1;
4262 unsigned : 1;
4263 unsigned : 1;
4264 };
4265 } __PWM3INTFLGbits_t;
4266
4267 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
4268
4269 #define _PWM3INTFLG_PRIF 0x01
4270 #define _PWM3INTFLG_PWM3PRIF 0x01
4271 #define _PWM3INTFLG_DCIF 0x02
4272 #define _PWM3INTFLG_PWM3DCIF 0x02
4273 #define _PWM3INTFLG_PHIF 0x04
4274 #define _PWM3INTFLG_PWM3PHIF 0x04
4275 #define _PWM3INTFLG_OFIF 0x08
4276 #define _PWM3INTFLG_PWM3OFIF 0x08
4277
4278 //==============================================================================
4279
4280
4281 //==============================================================================
4282 // PWM3CLKCON Bits
4283
4284 extern __at(0x0DBE) __sfr PWM3CLKCON;
4285
4286 typedef union
4287 {
4288 struct
4289 {
4290 unsigned PWM3CS0 : 1;
4291 unsigned PWM3CS1 : 1;
4292 unsigned : 1;
4293 unsigned : 1;
4294 unsigned PWM3PS0 : 1;
4295 unsigned PWM3PS1 : 1;
4296 unsigned PWM3PS2 : 1;
4297 unsigned : 1;
4298 };
4299
4300 struct
4301 {
4302 unsigned CS0 : 1;
4303 unsigned CS1 : 1;
4304 unsigned : 1;
4305 unsigned : 1;
4306 unsigned PS0 : 1;
4307 unsigned PS1 : 1;
4308 unsigned PS2 : 1;
4309 unsigned : 1;
4310 };
4311
4312 struct
4313 {
4314 unsigned CS : 2;
4315 unsigned : 6;
4316 };
4317
4318 struct
4319 {
4320 unsigned PWM3CS : 2;
4321 unsigned : 6;
4322 };
4323
4324 struct
4325 {
4326 unsigned : 4;
4327 unsigned PWM3PS : 3;
4328 unsigned : 1;
4329 };
4330
4331 struct
4332 {
4333 unsigned : 4;
4334 unsigned PS : 3;
4335 unsigned : 1;
4336 };
4337 } __PWM3CLKCONbits_t;
4338
4339 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
4340
4341 #define _PWM3CLKCON_PWM3CS0 0x01
4342 #define _PWM3CLKCON_CS0 0x01
4343 #define _PWM3CLKCON_PWM3CS1 0x02
4344 #define _PWM3CLKCON_CS1 0x02
4345 #define _PWM3CLKCON_PWM3PS0 0x10
4346 #define _PWM3CLKCON_PS0 0x10
4347 #define _PWM3CLKCON_PWM3PS1 0x20
4348 #define _PWM3CLKCON_PS1 0x20
4349 #define _PWM3CLKCON_PWM3PS2 0x40
4350 #define _PWM3CLKCON_PS2 0x40
4351
4352 //==============================================================================
4353
4354
4355 //==============================================================================
4356 // PWM3LDCON Bits
4357
4358 extern __at(0x0DBF) __sfr PWM3LDCON;
4359
4360 typedef union
4361 {
4362 struct
4363 {
4364 unsigned PWM3LDS0 : 1;
4365 unsigned PWM3LDS1 : 1;
4366 unsigned : 1;
4367 unsigned : 1;
4368 unsigned : 1;
4369 unsigned : 1;
4370 unsigned LDT : 1;
4371 unsigned LDA : 1;
4372 };
4373
4374 struct
4375 {
4376 unsigned LDS0 : 1;
4377 unsigned LDS1 : 1;
4378 unsigned : 1;
4379 unsigned : 1;
4380 unsigned : 1;
4381 unsigned : 1;
4382 unsigned PWM3LDM : 1;
4383 unsigned PWM3LD : 1;
4384 };
4385
4386 struct
4387 {
4388 unsigned LDS : 2;
4389 unsigned : 6;
4390 };
4391
4392 struct
4393 {
4394 unsigned PWM3LDS : 2;
4395 unsigned : 6;
4396 };
4397 } __PWM3LDCONbits_t;
4398
4399 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
4400
4401 #define _PWM3LDCON_PWM3LDS0 0x01
4402 #define _PWM3LDCON_LDS0 0x01
4403 #define _PWM3LDCON_PWM3LDS1 0x02
4404 #define _PWM3LDCON_LDS1 0x02
4405 #define _PWM3LDCON_LDT 0x40
4406 #define _PWM3LDCON_PWM3LDM 0x40
4407 #define _PWM3LDCON_LDA 0x80
4408 #define _PWM3LDCON_PWM3LD 0x80
4409
4410 //==============================================================================
4411
4412
4413 //==============================================================================
4414 // PWM3OFCON Bits
4415
4416 extern __at(0x0DC0) __sfr PWM3OFCON;
4417
4418 typedef union
4419 {
4420 struct
4421 {
4422 unsigned PWM3OFS0 : 1;
4423 unsigned PWM3OFS1 : 1;
4424 unsigned : 1;
4425 unsigned : 1;
4426 unsigned OFO : 1;
4427 unsigned PWM3OFM0 : 1;
4428 unsigned PWM3OFM1 : 1;
4429 unsigned : 1;
4430 };
4431
4432 struct
4433 {
4434 unsigned OFS0 : 1;
4435 unsigned OFS1 : 1;
4436 unsigned : 1;
4437 unsigned : 1;
4438 unsigned PWM3OFMC : 1;
4439 unsigned OFM0 : 1;
4440 unsigned OFM1 : 1;
4441 unsigned : 1;
4442 };
4443
4444 struct
4445 {
4446 unsigned OFS : 2;
4447 unsigned : 6;
4448 };
4449
4450 struct
4451 {
4452 unsigned PWM3OFS : 2;
4453 unsigned : 6;
4454 };
4455
4456 struct
4457 {
4458 unsigned : 5;
4459 unsigned OFM : 2;
4460 unsigned : 1;
4461 };
4462
4463 struct
4464 {
4465 unsigned : 5;
4466 unsigned PWM3OFM : 2;
4467 unsigned : 1;
4468 };
4469 } __PWM3OFCONbits_t;
4470
4471 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
4472
4473 #define _PWM3OFCON_PWM3OFS0 0x01
4474 #define _PWM3OFCON_OFS0 0x01
4475 #define _PWM3OFCON_PWM3OFS1 0x02
4476 #define _PWM3OFCON_OFS1 0x02
4477 #define _PWM3OFCON_OFO 0x10
4478 #define _PWM3OFCON_PWM3OFMC 0x10
4479 #define _PWM3OFCON_PWM3OFM0 0x20
4480 #define _PWM3OFCON_OFM0 0x20
4481 #define _PWM3OFCON_PWM3OFM1 0x40
4482 #define _PWM3OFCON_OFM1 0x40
4483
4484 //==============================================================================
4485
4486
4487 //==============================================================================
4488 // STATUS_SHAD Bits
4489
4490 extern __at(0x0FE4) __sfr STATUS_SHAD;
4491
4492 typedef struct
4493 {
4494 unsigned C_SHAD : 1;
4495 unsigned DC_SHAD : 1;
4496 unsigned Z_SHAD : 1;
4497 unsigned : 1;
4498 unsigned : 1;
4499 unsigned : 1;
4500 unsigned : 1;
4501 unsigned : 1;
4502 } __STATUS_SHADbits_t;
4503
4504 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
4505
4506 #define _C_SHAD 0x01
4507 #define _DC_SHAD 0x02
4508 #define _Z_SHAD 0x04
4509
4510 //==============================================================================
4511
4512 extern __at(0x0FE5) __sfr WREG_SHAD;
4513 extern __at(0x0FE6) __sfr BSR_SHAD;
4514 extern __at(0x0FE7) __sfr PCLATH_SHAD;
4515 extern __at(0x0FE8) __sfr FSR0L_SHAD;
4516 extern __at(0x0FE8) __sfr FSR0_SHAD;
4517 extern __at(0x0FE9) __sfr FSR0H_SHAD;
4518 extern __at(0x0FEA) __sfr FSR1L_SHAD;
4519 extern __at(0x0FEA) __sfr FSR1_SHAD;
4520 extern __at(0x0FEB) __sfr FSR1H_SHAD;
4521 extern __at(0x0FED) __sfr STKPTR;
4522 extern __at(0x0FEE) __sfr TOS;
4523 extern __at(0x0FEE) __sfr TOSL;
4524 extern __at(0x0FEF) __sfr TOSH;
4525
4526 //==============================================================================
4527 //
4528 // Configuration Bits
4529 //
4530 //==============================================================================
4531
4532 #define _CONFIG1 0x8007
4533 #define _CONFIG2 0x8008
4534
4535 //----------------------------- CONFIG1 Options -------------------------------
4536
4537 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin.
4538 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin.
4539 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin.
4540 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin.
4541 #define _WDTE_OFF 0x3FE7 // WDT disabled.
4542 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
4543 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
4544 #define _WDTE_ON 0x3FFF // WDT enabled.
4545 #define _PWRTE_ON 0x3FDF // PWRT enabled.
4546 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
4547 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
4548 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
4549 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
4550 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
4551 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
4552 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
4553 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
4554 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
4555 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
4556 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
4557
4558 //----------------------------- CONFIG2 Options -------------------------------
4559
4560 #define _WRT_ALL 0x3FFC // 000h to 7FFh write protected, no addresses may be modified by EECON control.
4561 #define _WRT_HALF 0x3FFD // 000h to 3FFh write protected, 400h to 7FFh may be modified by EECON control.
4562 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 7FFh may be modified by EECON control.
4563 #define _WRT_OFF 0x3FFF // Write protection off.
4564 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
4565 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
4566 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
4567 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
4568 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
4569 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4570 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4571 #define _LPBOREN_ON 0x37FF // LPBOR is enabled.
4572 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled.
4573 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
4574 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
4575 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
4576 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
4577
4578 //==============================================================================
4579
4580 #define _DEVID1 0x8006
4581
4582 #define _IDLOC0 0x8000
4583 #define _IDLOC1 0x8001
4584 #define _IDLOC2 0x8002
4585 #define _IDLOC3 0x8003
4586
4587 //==============================================================================
4588
4589 #ifndef NO_BIT_DEFINES
4590
4591 #define ADON ADCON0bits.ADON // bit 0
4592 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
4593 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
4594 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
4595 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
4596 #define CHS0 ADCON0bits.CHS0 // bit 2
4597 #define CHS1 ADCON0bits.CHS1 // bit 3
4598 #define CHS2 ADCON0bits.CHS2 // bit 4
4599 #define CHS3 ADCON0bits.CHS3 // bit 5
4600 #define CHS4 ADCON0bits.CHS4 // bit 6
4601
4602 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
4603 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
4604 #define ADCS0 ADCON1bits.ADCS0 // bit 4
4605 #define ADCS1 ADCON1bits.ADCS1 // bit 5
4606 #define ADCS2 ADCON1bits.ADCS2 // bit 6
4607 #define ADFM ADCON1bits.ADFM // bit 7
4608
4609 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
4610 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
4611 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
4612 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
4613
4614 #define ANSA0 ANSELAbits.ANSA0 // bit 0
4615 #define ANSA1 ANSELAbits.ANSA1 // bit 1
4616 #define ANSA2 ANSELAbits.ANSA2 // bit 2
4617 #define ANSA4 ANSELAbits.ANSA4 // bit 4
4618
4619 #define P1SEL APFCONbits.P1SEL // bit 0
4620 #define P2SEL APFCONbits.P2SEL // bit 1
4621 #define TXCKSEL APFCONbits.TXCKSEL // bit 2
4622 #define T1GSEL APFCONbits.T1GSEL // bit 3
4623 #define CWGBSEL APFCONbits.CWGBSEL // bit 5
4624 #define CWGASEL APFCONbits.CWGASEL // bit 6
4625 #define RXDTSEL APFCONbits.RXDTSEL // bit 7
4626
4627 #define ABDEN BAUDCONbits.ABDEN // bit 0
4628 #define WUE BAUDCONbits.WUE // bit 1
4629 #define BRG16 BAUDCONbits.BRG16 // bit 3
4630 #define SCKP BAUDCONbits.SCKP // bit 4
4631 #define RCIDL BAUDCONbits.RCIDL // bit 6
4632 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
4633
4634 #define BORRDY BORCONbits.BORRDY // bit 0
4635 #define BORFS BORCONbits.BORFS // bit 6
4636 #define SBOREN BORCONbits.SBOREN // bit 7
4637
4638 #define BSR0 BSRbits.BSR0 // bit 0
4639 #define BSR1 BSRbits.BSR1 // bit 1
4640 #define BSR2 BSRbits.BSR2 // bit 2
4641 #define BSR3 BSRbits.BSR3 // bit 3
4642 #define BSR4 BSRbits.BSR4 // bit 4
4643
4644 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
4645 #define C1HYS CM1CON0bits.C1HYS // bit 1
4646 #define C1SP CM1CON0bits.C1SP // bit 2
4647 #define C1POL CM1CON0bits.C1POL // bit 4
4648 #define C1OE CM1CON0bits.C1OE // bit 5
4649 #define C1OUT CM1CON0bits.C1OUT // bit 6
4650 #define C1ON CM1CON0bits.C1ON // bit 7
4651
4652 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
4653 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
4654 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
4655 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
4656 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
4657 #define C1INTN CM1CON1bits.C1INTN // bit 6
4658 #define C1INTP CM1CON1bits.C1INTP // bit 7
4659
4660 #define MC1OUT CMOUTbits.MC1OUT // bit 0
4661
4662 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
4663 #define G1POLA CWG1CON0bits.G1POLA // bit 3
4664 #define G1POLB CWG1CON0bits.G1POLB // bit 4
4665 #define G1OEA CWG1CON0bits.G1OEA // bit 5
4666 #define G1OEB CWG1CON0bits.G1OEB // bit 6
4667 #define G1EN CWG1CON0bits.G1EN // bit 7
4668
4669 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
4670 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
4671 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
4672 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
4673 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
4674 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
4675 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
4676
4677 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
4678 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
4679 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
4680 #define G1ASE CWG1CON2bits.G1ASE // bit 7
4681
4682 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
4683 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
4684 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
4685 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
4686 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
4687 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
4688
4689 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
4690 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
4691 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
4692 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
4693 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
4694 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
4695
4696 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
4697 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
4698 #define DACOE DACCON0bits.DACOE // bit 5
4699 #define DACLPS DACCON0bits.DACLPS // bit 6
4700 #define DACEN DACCON0bits.DACEN // bit 7
4701
4702 #define DACR0 DACCON1bits.DACR0 // bit 0
4703 #define DACR1 DACCON1bits.DACR1 // bit 1
4704 #define DACR2 DACCON1bits.DACR2 // bit 2
4705 #define DACR3 DACCON1bits.DACR3 // bit 3
4706 #define DACR4 DACCON1bits.DACR4 // bit 4
4707
4708 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
4709 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
4710 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
4711 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
4712 #define TSRNG FVRCONbits.TSRNG // bit 4
4713 #define TSEN FVRCONbits.TSEN // bit 5
4714 #define FVRRDY FVRCONbits.FVRRDY // bit 6
4715 #define FVREN FVRCONbits.FVREN // bit 7
4716
4717 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
4718 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
4719 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
4720 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
4721 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
4722 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
4723
4724 #define IOCIF INTCONbits.IOCIF // bit 0
4725 #define INTF INTCONbits.INTF // bit 1
4726 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
4727 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
4728 #define IOCIE INTCONbits.IOCIE // bit 3
4729 #define INTE INTCONbits.INTE // bit 4
4730 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
4731 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
4732 #define PEIE INTCONbits.PEIE // bit 6
4733 #define GIE INTCONbits.GIE // bit 7
4734
4735 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
4736 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
4737 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
4738 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
4739 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
4740 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
4741
4742 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
4743 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
4744 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
4745 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
4746 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
4747 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
4748
4749 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
4750 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
4751 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
4752 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
4753 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
4754 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
4755
4756 #define LATA0 LATAbits.LATA0 // bit 0
4757 #define LATA1 LATAbits.LATA1 // bit 1
4758 #define LATA2 LATAbits.LATA2 // bit 2
4759 #define LATA4 LATAbits.LATA4 // bit 4
4760 #define LATA5 LATAbits.LATA5 // bit 5
4761
4762 #define ODA0 ODCONAbits.ODA0 // bit 0
4763 #define ODA1 ODCONAbits.ODA1 // bit 1
4764 #define ODA2 ODCONAbits.ODA2 // bit 2
4765 #define ODA4 ODCONAbits.ODA4 // bit 4
4766 #define ODA5 ODCONAbits.ODA5 // bit 5
4767
4768 #define PS0 OPTION_REGbits.PS0 // bit 0
4769 #define PS1 OPTION_REGbits.PS1 // bit 1
4770 #define PS2 OPTION_REGbits.PS2 // bit 2
4771 #define PSA OPTION_REGbits.PSA // bit 3
4772 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
4773 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
4774 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
4775 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
4776 #define INTEDG OPTION_REGbits.INTEDG // bit 6
4777 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
4778
4779 #define SCS0 OSCCONbits.SCS0 // bit 0
4780 #define SCS1 OSCCONbits.SCS1 // bit 1
4781 #define IRCF0 OSCCONbits.IRCF0 // bit 3
4782 #define IRCF1 OSCCONbits.IRCF1 // bit 4
4783 #define IRCF2 OSCCONbits.IRCF2 // bit 5
4784 #define IRCF3 OSCCONbits.IRCF3 // bit 6
4785 #define SPLLEN OSCCONbits.SPLLEN // bit 7
4786
4787 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
4788 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
4789 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
4790 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
4791 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
4792 #define OSTS OSCSTATbits.OSTS // bit 5
4793 #define PLLR OSCSTATbits.PLLR // bit 6
4794
4795 #define TUN0 OSCTUNEbits.TUN0 // bit 0
4796 #define TUN1 OSCTUNEbits.TUN1 // bit 1
4797 #define TUN2 OSCTUNEbits.TUN2 // bit 2
4798 #define TUN3 OSCTUNEbits.TUN3 // bit 3
4799 #define TUN4 OSCTUNEbits.TUN4 // bit 4
4800 #define TUN5 OSCTUNEbits.TUN5 // bit 5
4801
4802 #define NOT_BOR PCONbits.NOT_BOR // bit 0
4803 #define NOT_POR PCONbits.NOT_POR // bit 1
4804 #define NOT_RI PCONbits.NOT_RI // bit 2
4805 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
4806 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
4807 #define STKUNF PCONbits.STKUNF // bit 6
4808 #define STKOVF PCONbits.STKOVF // bit 7
4809
4810 #define TMR1IE PIE1bits.TMR1IE // bit 0
4811 #define TMR2IE PIE1bits.TMR2IE // bit 1
4812 #define TXIE PIE1bits.TXIE // bit 4
4813 #define RCIE PIE1bits.RCIE // bit 5
4814 #define ADIE PIE1bits.ADIE // bit 6
4815 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
4816
4817 #define C1IE PIE2bits.C1IE // bit 5
4818
4819 #define PWM1IE PIE3bits.PWM1IE // bit 4
4820 #define PWM2IE PIE3bits.PWM2IE // bit 5
4821 #define PWM3IE PIE3bits.PWM3IE // bit 6
4822
4823 #define TMR1IF PIR1bits.TMR1IF // bit 0
4824 #define TMR2IF PIR1bits.TMR2IF // bit 1
4825 #define TXIF PIR1bits.TXIF // bit 4
4826 #define RCIF PIR1bits.RCIF // bit 5
4827 #define ADIF PIR1bits.ADIF // bit 6
4828 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
4829
4830 #define C1IF PIR2bits.C1IF // bit 5
4831
4832 #define PWM1IF PIR3bits.PWM1IF // bit 4
4833 #define PWM2IF PIR3bits.PWM2IF // bit 5
4834 #define PWM3IF PIR3bits.PWM3IF // bit 6
4835
4836 #define RD PMCON1bits.RD // bit 0
4837 #define WR PMCON1bits.WR // bit 1
4838 #define WREN PMCON1bits.WREN // bit 2
4839 #define WRERR PMCON1bits.WRERR // bit 3
4840 #define FREE PMCON1bits.FREE // bit 4
4841 #define LWLO PMCON1bits.LWLO // bit 5
4842 #define CFGS PMCON1bits.CFGS // bit 6
4843
4844 #define RA0 PORTAbits.RA0 // bit 0
4845 #define RA1 PORTAbits.RA1 // bit 1
4846 #define RA2 PORTAbits.RA2 // bit 2
4847 #define RA3 PORTAbits.RA3 // bit 3
4848 #define RA4 PORTAbits.RA4 // bit 4
4849 #define RA5 PORTAbits.RA5 // bit 5
4850
4851 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits
4852 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits
4853 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits
4854 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits
4855 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits
4856 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits
4857 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits
4858 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits
4859 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits
4860 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits
4861 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits
4862 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits
4863
4864 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
4865 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
4866 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
4867 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
4868 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
4869 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
4870 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
4871 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
4872
4873 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0
4874 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1
4875 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2
4876 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3
4877 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4
4878 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5
4879 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6
4880 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7
4881
4882 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits
4883 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits
4884 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits
4885 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits
4886 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits
4887 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits
4888 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits
4889 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits
4890
4891 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits
4892 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits
4893 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits
4894 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits
4895 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits
4896 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits
4897 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits
4898 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits
4899
4900 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits
4901 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits
4902 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits
4903 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits
4904 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits
4905 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits
4906 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits
4907 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits
4908
4909 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits
4910 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits
4911 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits
4912 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits
4913 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits
4914 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits
4915 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits
4916 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits
4917 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits
4918 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits
4919
4920 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0
4921 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1
4922 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2
4923 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3
4924 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4
4925 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5
4926 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6
4927 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7
4928
4929 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0
4930 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1
4931 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2
4932 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3
4933 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4
4934 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5
4935 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6
4936 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7
4937
4938 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0
4939 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1
4940 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2
4941 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3
4942 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4
4943 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5
4944 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6
4945 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7
4946
4947 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0
4948 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1
4949 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2
4950 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3
4951 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4
4952 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5
4953 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6
4954 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7
4955
4956 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0
4957 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1
4958 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2
4959 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3
4960 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4
4961 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5
4962 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6
4963 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7
4964
4965 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0
4966 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1
4967 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2
4968 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3
4969 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4
4970 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5
4971 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6
4972 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7
4973
4974 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0
4975 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1
4976 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2
4977 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3
4978 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4
4979 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5
4980 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6
4981 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7
4982
4983 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0
4984 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1
4985 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2
4986 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3
4987 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4
4988 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5
4989 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6
4990 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7
4991
4992 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
4993 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
4994 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
4995 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
4996 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
4997 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
4998 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
4999 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
5000
5001 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0
5002 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1
5003 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2
5004 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3
5005 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4
5006 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5
5007 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6
5008 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7
5009
5010 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0
5011 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1
5012 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2
5013 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3
5014 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4
5015 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5
5016 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6
5017 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7
5018
5019 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0
5020 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1
5021 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2
5022 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3
5023 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4
5024 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5
5025 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6
5026 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7
5027
5028 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0
5029 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1
5030 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2
5031 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3
5032 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4
5033 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5
5034 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6
5035 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7
5036
5037 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0
5038 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1
5039 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2
5040 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3
5041 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4
5042 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5
5043 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6
5044 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7
5045
5046 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0
5047 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1
5048 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2
5049 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3
5050 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4
5051 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5
5052 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6
5053 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7
5054
5055 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0
5056 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1
5057 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2
5058 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3
5059 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4
5060 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5
5061 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6
5062 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7
5063
5064 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0
5065 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1
5066 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2
5067 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3
5068 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4
5069 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5
5070 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6
5071 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7
5072
5073 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0
5074 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1
5075 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2
5076 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3
5077 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4
5078 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5
5079 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6
5080 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7
5081
5082 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
5083 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
5084 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
5085 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
5086 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
5087 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
5088 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
5089 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
5090
5091 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0
5092 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1
5093 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2
5094 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3
5095 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4
5096 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5
5097 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6
5098 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7
5099
5100 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0
5101 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1
5102 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2
5103 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3
5104 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4
5105 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5
5106 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6
5107 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7
5108
5109 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0
5110 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1
5111 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2
5112 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3
5113 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4
5114 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5
5115 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6
5116 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7
5117
5118 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0
5119 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1
5120 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2
5121 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3
5122 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4
5123 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5
5124 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6
5125 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7
5126
5127 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0
5128 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1
5129 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2
5130 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3
5131 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4
5132 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5
5133 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6
5134 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7
5135
5136 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0
5137 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1
5138 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2
5139 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3
5140 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4
5141 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5
5142 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6
5143 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7
5144
5145 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0
5146 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1
5147 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2
5148 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3
5149 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4
5150 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5
5151 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6
5152 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7
5153
5154 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0
5155 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1
5156 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2
5157 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3
5158 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4
5159 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5
5160 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6
5161 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7
5162
5163 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0
5164 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1
5165 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2
5166 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3
5167 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4
5168 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5
5169 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6
5170 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7
5171
5172 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits
5173 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits
5174 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits
5175 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits
5176 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits
5177 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits
5178
5179 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits
5180 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits
5181 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits
5182 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits
5183 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits
5184 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits
5185
5186 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits
5187 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits
5188 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits
5189 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits
5190 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits
5191 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits
5192
5193 #define RX9D RCSTAbits.RX9D // bit 0
5194 #define OERR RCSTAbits.OERR // bit 1
5195 #define FERR RCSTAbits.FERR // bit 2
5196 #define ADDEN RCSTAbits.ADDEN // bit 3
5197 #define CREN RCSTAbits.CREN // bit 4
5198 #define SREN RCSTAbits.SREN // bit 5
5199 #define RX9 RCSTAbits.RX9 // bit 6
5200 #define SPEN RCSTAbits.SPEN // bit 7
5201
5202 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
5203 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
5204 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
5205 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
5206 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
5207
5208 #define C STATUSbits.C // bit 0
5209 #define DC STATUSbits.DC // bit 1
5210 #define Z STATUSbits.Z // bit 2
5211 #define NOT_PD STATUSbits.NOT_PD // bit 3
5212 #define NOT_TO STATUSbits.NOT_TO // bit 4
5213
5214 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
5215 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
5216 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
5217
5218 #define TMR1ON T1CONbits.TMR1ON // bit 0
5219 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
5220 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
5221 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
5222 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
5223 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
5224
5225 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
5226 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
5227 #define T1GVAL T1GCONbits.T1GVAL // bit 2
5228 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
5229 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
5230 #define T1GSPM T1GCONbits.T1GSPM // bit 4
5231 #define T1GTM T1GCONbits.T1GTM // bit 5
5232 #define T1GPOL T1GCONbits.T1GPOL // bit 6
5233 #define TMR1GE T1GCONbits.TMR1GE // bit 7
5234
5235 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
5236 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
5237 #define TMR2ON T2CONbits.TMR2ON // bit 2
5238 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
5239 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
5240 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
5241 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
5242
5243 #define TRISA0 TRISAbits.TRISA0 // bit 0
5244 #define TRISA1 TRISAbits.TRISA1 // bit 1
5245 #define TRISA2 TRISAbits.TRISA2 // bit 2
5246 #define TRISA3 TRISAbits.TRISA3 // bit 3
5247 #define TRISA4 TRISAbits.TRISA4 // bit 4
5248 #define TRISA5 TRISAbits.TRISA5 // bit 5
5249
5250 #define TX9D TXSTAbits.TX9D // bit 0
5251 #define TRMT TXSTAbits.TRMT // bit 1
5252 #define BRGH TXSTAbits.BRGH // bit 2
5253 #define SENDB TXSTAbits.SENDB // bit 3
5254 #define SYNC TXSTAbits.SYNC // bit 4
5255 #define TXEN TXSTAbits.TXEN // bit 5
5256 #define TX9 TXSTAbits.TX9 // bit 6
5257 #define CSRC TXSTAbits.CSRC // bit 7
5258
5259 #define SWDTEN WDTCONbits.SWDTEN // bit 0
5260 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
5261 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
5262 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
5263 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
5264 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
5265
5266 #define WPUA0 WPUAbits.WPUA0 // bit 0
5267 #define WPUA1 WPUAbits.WPUA1 // bit 1
5268 #define WPUA2 WPUAbits.WPUA2 // bit 2
5269 #define WPUA3 WPUAbits.WPUA3 // bit 3
5270 #define WPUA4 WPUAbits.WPUA4 // bit 4
5271 #define WPUA5 WPUAbits.WPUA5 // bit 5
5272
5273 #endif // #ifndef NO_BIT_DEFINES
5274
5275 #endif // #ifndef __PIC12LF1572_H__
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