2 * This declarations of the PIC12LF1612 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC12LF1612_H__
26 #define __PIC12LF1612_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PIR1_ADDR 0x0011
52 #define PIR2_ADDR 0x0012
53 #define PIR3_ADDR 0x0013
54 #define PIR4_ADDR 0x0014
55 #define TMR0_ADDR 0x0015
56 #define TMR1_ADDR 0x0016
57 #define TMR1L_ADDR 0x0016
58 #define TMR1H_ADDR 0x0017
59 #define T1CON_ADDR 0x0018
60 #define T1GCON_ADDR 0x0019
61 #define T2TMR_ADDR 0x001A
62 #define TMR2_ADDR 0x001A
63 #define PR2_ADDR 0x001B
64 #define T2PR_ADDR 0x001B
65 #define T2CON_ADDR 0x001C
66 #define T2HLT_ADDR 0x001D
67 #define T2CLKCON_ADDR 0x001E
68 #define T2RST_ADDR 0x001F
69 #define TRISA_ADDR 0x008C
70 #define PIE1_ADDR 0x0091
71 #define PIE2_ADDR 0x0092
72 #define PIE3_ADDR 0x0093
73 #define PIE4_ADDR 0x0094
74 #define OPTION_REG_ADDR 0x0095
75 #define PCON_ADDR 0x0096
76 #define OSCTUNE_ADDR 0x0098
77 #define OSCCON_ADDR 0x0099
78 #define OSCSTAT_ADDR 0x009A
79 #define ADRES_ADDR 0x009B
80 #define ADRESL_ADDR 0x009B
81 #define ADRESH_ADDR 0x009C
82 #define ADCON0_ADDR 0x009D
83 #define ADCON1_ADDR 0x009E
84 #define ADCON2_ADDR 0x009F
85 #define LATA_ADDR 0x010C
86 #define CM1CON0_ADDR 0x0111
87 #define CM1CON1_ADDR 0x0112
88 #define CMOUT_ADDR 0x0115
89 #define BORCON_ADDR 0x0116
90 #define FVRCON_ADDR 0x0117
91 #define DAC1CON0_ADDR 0x0118
92 #define DAC1CON1_ADDR 0x0119
93 #define ZCD1CON_ADDR 0x011C
94 #define APFCON_ADDR 0x011D
95 #define ANSELA_ADDR 0x018C
96 #define PMADR_ADDR 0x0191
97 #define PMADRL_ADDR 0x0191
98 #define PMADRH_ADDR 0x0192
99 #define PMDAT_ADDR 0x0193
100 #define PMDATL_ADDR 0x0193
101 #define PMDATH_ADDR 0x0194
102 #define PMCON1_ADDR 0x0195
103 #define PMCON2_ADDR 0x0196
104 #define WPUA_ADDR 0x020C
105 #define ODCONA_ADDR 0x028C
106 #define CCPR1_ADDR 0x0291
107 #define CCPR1L_ADDR 0x0291
108 #define CCPR1H_ADDR 0x0292
109 #define CCP1CON_ADDR 0x0293
110 #define CCP1CAP_ADDR 0x0294
111 #define CCPR2_ADDR 0x0298
112 #define CCPR2L_ADDR 0x0298
113 #define CCPR2H_ADDR 0x0299
114 #define CCP2CON_ADDR 0x029A
115 #define CCP2CAP_ADDR 0x029B
116 #define CCPTMRS_ADDR 0x029E
117 #define SLRCONA_ADDR 0x030C
118 #define INLVLA_ADDR 0x038C
119 #define IOCAP_ADDR 0x0391
120 #define IOCAN_ADDR 0x0392
121 #define IOCAF_ADDR 0x0393
122 #define T4TMR_ADDR 0x0413
123 #define TMR4_ADDR 0x0413
124 #define PR4_ADDR 0x0414
125 #define T4PR_ADDR 0x0414
126 #define T4CON_ADDR 0x0415
127 #define T4HLT_ADDR 0x0416
128 #define T4CLKCON_ADDR 0x0417
129 #define T4RST_ADDR 0x0418
130 #define T6TMR_ADDR 0x041A
131 #define TMR6_ADDR 0x041A
132 #define PR6_ADDR 0x041B
133 #define T6PR_ADDR 0x041B
134 #define T6CON_ADDR 0x041C
135 #define T6HLT_ADDR 0x041D
136 #define T6CLKCON_ADDR 0x041E
137 #define T6RST_ADDR 0x041F
138 #define CWG1DBR_ADDR 0x0691
139 #define CWG1DBF_ADDR 0x0692
140 #define CWG1AS0_ADDR 0x0693
141 #define CWG1AS1_ADDR 0x0694
142 #define CWG1OCON0_ADDR 0x0695
143 #define CWG1CON0_ADDR 0x0696
144 #define CWG1CON1_ADDR 0x0697
145 #define CWG1OCON1_ADDR 0x0698
146 #define CWG1CLKCON_ADDR 0x0699
147 #define CWG1ISM_ADDR 0x069A
148 #define WDTCON0_ADDR 0x0711
149 #define WDTCON1_ADDR 0x0712
150 #define WDTPSL_ADDR 0x0713
151 #define WDTPSH_ADDR 0x0714
152 #define WDTTMR_ADDR 0x0715
153 #define SCANLADR_ADDR 0x0718
154 #define SCANLADRL_ADDR 0x0718
155 #define SCANLADRH_ADDR 0x0719
156 #define SCANHADR_ADDR 0x071A
157 #define SCANHADRL_ADDR 0x071A
158 #define SCANHADRH_ADDR 0x071B
159 #define SCANCON0_ADDR 0x071C
160 #define SCANTRIG_ADDR 0x071D
161 #define CRCDAT_ADDR 0x0791
162 #define CRCDATL_ADDR 0x0791
163 #define CRCDATH_ADDR 0x0792
164 #define CRCACC_ADDR 0x0793
165 #define CRCACCL_ADDR 0x0793
166 #define CRCACCH_ADDR 0x0794
167 #define CRCSHIFT_ADDR 0x0795
168 #define CRCSHIFTL_ADDR 0x0795
169 #define CRCSHIFTH_ADDR 0x0796
170 #define CRCXOR_ADDR 0x0797
171 #define CRCXORL_ADDR 0x0797
172 #define CRCXORH_ADDR 0x0798
173 #define CRCCON0_ADDR 0x0799
174 #define CRCCON1_ADDR 0x079A
175 #define SMT1TMR_ADDR 0x0D8C
176 #define SMT1TMRL_ADDR 0x0D8C
177 #define SMT1TMRH_ADDR 0x0D8D
178 #define SMT1TMRU_ADDR 0x0D8E
179 #define SMT1CPR_ADDR 0x0D8F
180 #define SMT1CPRL_ADDR 0x0D8F
181 #define SMT1CPRH_ADDR 0x0D90
182 #define SMT1CPRU_ADDR 0x0D91
183 #define SMT1CPW_ADDR 0x0D92
184 #define SMT1CPWL_ADDR 0x0D92
185 #define SMT1CPWH_ADDR 0x0D93
186 #define SMT1CPWU_ADDR 0x0D94
187 #define SMT1PR_ADDR 0x0D95
188 #define SMT1PRL_ADDR 0x0D95
189 #define SMT1PRH_ADDR 0x0D96
190 #define SMT1PRU_ADDR 0x0D97
191 #define SMT1CON0_ADDR 0x0D98
192 #define SMT1CON1_ADDR 0x0D99
193 #define SMT1STAT_ADDR 0x0D9A
194 #define SMT1CLK_ADDR 0x0D9B
195 #define SMT1SIG_ADDR 0x0D9C
196 #define SMT1WIN_ADDR 0x0D9D
197 #define SMT2TMR_ADDR 0x0D9E
198 #define SMT2TMRL_ADDR 0x0D9E
199 #define SMT2TMRH_ADDR 0x0D9F
200 #define SMT2TMRU_ADDR 0x0DA0
201 #define SMT2CPR_ADDR 0x0DA1
202 #define SMT2CPRL_ADDR 0x0DA1
203 #define SMT2CPRH_ADDR 0x0DA2
204 #define SMT2CPRU_ADDR 0x0DA3
205 #define SMT2CPW_ADDR 0x0DA4
206 #define SMT2CPWL_ADDR 0x0DA4
207 #define SMT2CPWH_ADDR 0x0DA5
208 #define SMT2CPWU_ADDR 0x0DA6
209 #define SMT2PR_ADDR 0x0DA7
210 #define SMT2PRL_ADDR 0x0DA7
211 #define SMT2PRH_ADDR 0x0DA8
212 #define SMT2PRU_ADDR 0x0DA9
213 #define SMT2CON0_ADDR 0x0DAA
214 #define SMT2CON1_ADDR 0x0DAB
215 #define SMT2STAT_ADDR 0x0DAC
216 #define SMT2CLK_ADDR 0x0DAD
217 #define SMT2SIG_ADDR 0x0DAE
218 #define SMT2WIN_ADDR 0x0DAF
219 #define STATUS_SHAD_ADDR 0x0FE4
220 #define WREG_SHAD_ADDR 0x0FE5
221 #define BSR_SHAD_ADDR 0x0FE6
222 #define PCLATH_SHAD_ADDR 0x0FE7
223 #define FSR0L_SHAD_ADDR 0x0FE8
224 #define FSR0H_SHAD_ADDR 0x0FE9
225 #define FSR1L_SHAD_ADDR 0x0FEA
226 #define FSR1H_SHAD_ADDR 0x0FEB
227 #define STKPTR_ADDR 0x0FED
228 #define TOSL_ADDR 0x0FEE
229 #define TOSH_ADDR 0x0FEF
231 #endif // #ifndef NO_ADDR_DEFINES
233 //==============================================================================
235 // Register Definitions
237 //==============================================================================
239 extern __at(0x0000) __sfr INDF0
;
240 extern __at(0x0001) __sfr INDF1
;
241 extern __at(0x0002) __sfr PCL
;
243 //==============================================================================
246 extern __at(0x0003) __sfr STATUS
;
260 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
268 //==============================================================================
270 extern __at(0x0004) __sfr FSR0
;
271 extern __at(0x0004) __sfr FSR0L
;
272 extern __at(0x0005) __sfr FSR0H
;
273 extern __at(0x0006) __sfr FSR1
;
274 extern __at(0x0006) __sfr FSR1L
;
275 extern __at(0x0007) __sfr FSR1H
;
277 //==============================================================================
280 extern __at(0x0008) __sfr BSR
;
303 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
311 //==============================================================================
313 extern __at(0x0009) __sfr WREG
;
314 extern __at(0x000A) __sfr PCLATH
;
316 //==============================================================================
319 extern __at(0x000B) __sfr INTCON
;
348 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
361 //==============================================================================
364 //==============================================================================
367 extern __at(0x000C) __sfr PORTA
;
390 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
399 //==============================================================================
402 //==============================================================================
405 extern __at(0x0011) __sfr PIR1
;
416 unsigned TMR1GIF
: 1;
419 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
425 #define _TMR1GIF 0x80
427 //==============================================================================
430 //==============================================================================
433 extern __at(0x0012) __sfr PIR2
;
447 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
455 //==============================================================================
458 //==============================================================================
461 extern __at(0x0013) __sfr PIR3
;
475 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
480 //==============================================================================
483 //==============================================================================
486 extern __at(0x0014) __sfr PIR4
;
491 unsigned SMT1PRAIF
: 1;
492 unsigned SMT1PWAIF
: 1;
494 unsigned SMT2PRAIF
: 1;
495 unsigned SMT2PWAIF
: 1;
500 extern __at(0x0014) volatile __PIR4bits_t PIR4bits
;
503 #define _SMT1PRAIF 0x02
504 #define _SMT1PWAIF 0x04
506 #define _SMT2PRAIF 0x10
507 #define _SMT2PWAIF 0x20
511 //==============================================================================
513 extern __at(0x0015) __sfr TMR0
;
514 extern __at(0x0016) __sfr TMR1
;
515 extern __at(0x0016) __sfr TMR1L
;
516 extern __at(0x0017) __sfr TMR1H
;
518 //==============================================================================
521 extern __at(0x0018) __sfr T1CON
;
529 unsigned NOT_T1SYNC
: 1;
531 unsigned T1CKPS0
: 1;
532 unsigned T1CKPS1
: 1;
533 unsigned TMR1CS0
: 1;
534 unsigned TMR1CS1
: 1;
551 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
554 #define _NOT_T1SYNC 0x04
555 #define _T1CKPS0 0x10
556 #define _T1CKPS1 0x20
557 #define _TMR1CS0 0x40
558 #define _TMR1CS1 0x80
560 //==============================================================================
563 //==============================================================================
566 extern __at(0x0019) __sfr T1GCON
;
575 unsigned T1GGO_NOT_DONE
: 1;
589 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
594 #define _T1GGO_NOT_DONE 0x08
600 //==============================================================================
602 extern __at(0x001A) __sfr T2TMR
;
603 extern __at(0x001A) __sfr TMR2
;
604 extern __at(0x001B) __sfr PR2
;
605 extern __at(0x001B) __sfr T2PR
;
607 //==============================================================================
610 extern __at(0x001C) __sfr T2CON
;
616 unsigned T2OUTPS0
: 1;
617 unsigned T2OUTPS1
: 1;
618 unsigned T2OUTPS2
: 1;
619 unsigned T2OUTPS3
: 1;
620 unsigned T2CKPS0
: 1;
621 unsigned T2CKPS1
: 1;
622 unsigned T2CKPS2
: 1;
658 unsigned T2OUTPS
: 4;
677 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
679 #define _T2OUTPS0 0x01
681 #define _T2OUTPS1 0x02
683 #define _T2OUTPS2 0x04
685 #define _T2OUTPS3 0x08
687 #define _T2CKPS0 0x10
689 #define _T2CKPS1 0x20
691 #define _T2CKPS2 0x40
697 //==============================================================================
700 //==============================================================================
703 extern __at(0x001D) __sfr T2HLT
;
721 unsigned T2MODE0
: 1;
722 unsigned T2MODE1
: 1;
723 unsigned T2MODE2
: 1;
724 unsigned T2MODE3
: 1;
726 unsigned T2CKSYNC
: 1;
727 unsigned T2CKPOL
: 1;
728 unsigned T2PSYNC
: 1;
744 extern __at(0x001D) volatile __T2HLTbits_t T2HLTbits
;
746 #define _T2HLT_MODE0 0x01
747 #define _T2HLT_T2MODE0 0x01
748 #define _T2HLT_MODE1 0x02
749 #define _T2HLT_T2MODE1 0x02
750 #define _T2HLT_MODE2 0x04
751 #define _T2HLT_T2MODE2 0x04
752 #define _T2HLT_MODE3 0x08
753 #define _T2HLT_T2MODE3 0x08
754 #define _T2HLT_CKSYNC 0x20
755 #define _T2HLT_T2CKSYNC 0x20
756 #define _T2HLT_CKPOL 0x40
757 #define _T2HLT_T2CKPOL 0x40
758 #define _T2HLT_PSYNC 0x80
759 #define _T2HLT_T2PSYNC 0x80
761 //==============================================================================
764 //==============================================================================
767 extern __at(0x001E) __sfr T2CLKCON
;
790 extern __at(0x001E) volatile __T2CLKCONbits_t T2CLKCONbits
;
796 //==============================================================================
799 //==============================================================================
802 extern __at(0x001F) __sfr T2RST
;
820 unsigned T2RSEL0
: 1;
821 unsigned T2RSEL1
: 1;
822 unsigned T2RSEL2
: 1;
823 unsigned T2RSEL3
: 1;
843 extern __at(0x001F) volatile __T2RSTbits_t T2RSTbits
;
846 #define _T2RSEL0 0x01
848 #define _T2RSEL1 0x02
850 #define _T2RSEL2 0x04
852 #define _T2RSEL3 0x08
854 //==============================================================================
857 //==============================================================================
860 extern __at(0x008C) __sfr TRISA
;
883 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
892 //==============================================================================
895 //==============================================================================
898 extern __at(0x0091) __sfr PIE1
;
909 unsigned TMR1GIE
: 1;
912 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
918 #define _TMR1GIE 0x80
920 //==============================================================================
923 //==============================================================================
926 extern __at(0x0092) __sfr PIE2
;
940 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
948 //==============================================================================
951 //==============================================================================
954 extern __at(0x0093) __sfr PIE3
;
968 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
973 //==============================================================================
976 //==============================================================================
979 extern __at(0x0094) __sfr PIE4
;
984 unsigned SMT1PRAIE
: 1;
985 unsigned SMT1PWAIE
: 1;
987 unsigned SMT2PRAIE
: 1;
988 unsigned SMT2PWAIE
: 1;
993 extern __at(0x0094) volatile __PIE4bits_t PIE4bits
;
996 #define _SMT1PRAIE 0x02
997 #define _SMT1PWAIE 0x04
999 #define _SMT2PRAIE 0x10
1000 #define _SMT2PWAIE 0x20
1002 #define _SCANIE 0x80
1004 //==============================================================================
1007 //==============================================================================
1010 extern __at(0x0095) __sfr OPTION_REG
;
1020 unsigned TMR0SE
: 1;
1021 unsigned TMR0CS
: 1;
1022 unsigned INTEDG
: 1;
1023 unsigned NOT_WPUEN
: 1;
1043 } __OPTION_REGbits_t
;
1045 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1051 #define _TMR0SE 0x10
1053 #define _TMR0CS 0x20
1055 #define _INTEDG 0x40
1056 #define _NOT_WPUEN 0x80
1058 //==============================================================================
1061 //==============================================================================
1064 extern __at(0x0096) __sfr PCON
;
1068 unsigned NOT_BOR
: 1;
1069 unsigned NOT_POR
: 1;
1070 unsigned NOT_RI
: 1;
1071 unsigned NOT_RMCLR
: 1;
1072 unsigned NOT_RWDT
: 1;
1073 unsigned NOT_WDTWV
: 1;
1074 unsigned STKUNF
: 1;
1075 unsigned STKOVF
: 1;
1078 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1080 #define _NOT_BOR 0x01
1081 #define _NOT_POR 0x02
1082 #define _NOT_RI 0x04
1083 #define _NOT_RMCLR 0x08
1084 #define _NOT_RWDT 0x10
1085 #define _NOT_WDTWV 0x20
1086 #define _STKUNF 0x40
1087 #define _STKOVF 0x80
1089 //==============================================================================
1092 //==============================================================================
1095 extern __at(0x0098) __sfr OSCTUNE
;
1118 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1127 //==============================================================================
1130 //==============================================================================
1133 extern __at(0x0099) __sfr OSCCON
;
1146 unsigned SPLLEN
: 1;
1163 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1171 #define _SPLLEN 0x80
1173 //==============================================================================
1176 //==============================================================================
1179 extern __at(0x009A) __sfr OSCSTAT
;
1183 unsigned HFIOFS
: 1;
1184 unsigned LFIOFR
: 1;
1185 unsigned MFIOFR
: 1;
1186 unsigned HFIOFL
: 1;
1187 unsigned HFIOFR
: 1;
1193 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1195 #define _HFIOFS 0x01
1196 #define _LFIOFR 0x02
1197 #define _MFIOFR 0x04
1198 #define _HFIOFL 0x08
1199 #define _HFIOFR 0x10
1202 //==============================================================================
1204 extern __at(0x009B) __sfr ADRES
;
1205 extern __at(0x009B) __sfr ADRESL
;
1206 extern __at(0x009C) __sfr ADRESH
;
1208 //==============================================================================
1211 extern __at(0x009D) __sfr ADCON0
;
1218 unsigned GO_NOT_DONE
: 1;
1259 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1262 #define _GO_NOT_DONE 0x02
1271 //==============================================================================
1274 //==============================================================================
1277 extern __at(0x009E) __sfr ADCON1
;
1283 unsigned ADPREF0
: 1;
1284 unsigned ADPREF1
: 1;
1295 unsigned ADPREF
: 2;
1307 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1309 #define _ADPREF0 0x01
1310 #define _ADPREF1 0x02
1316 //==============================================================================
1319 //==============================================================================
1322 extern __at(0x009F) __sfr ADCON2
;
1332 unsigned TRIGSEL0
: 1;
1333 unsigned TRIGSEL1
: 1;
1334 unsigned TRIGSEL2
: 1;
1335 unsigned TRIGSEL3
: 1;
1341 unsigned TRIGSEL
: 4;
1345 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1347 #define _TRIGSEL0 0x10
1348 #define _TRIGSEL1 0x20
1349 #define _TRIGSEL2 0x40
1350 #define _TRIGSEL3 0x80
1352 //==============================================================================
1355 //==============================================================================
1358 extern __at(0x010C) __sfr LATA
;
1381 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1390 //==============================================================================
1393 //==============================================================================
1396 extern __at(0x0111) __sfr CM1CON0
;
1400 unsigned C1SYNC
: 1;
1410 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1412 #define _C1SYNC 0x01
1420 //==============================================================================
1423 //==============================================================================
1426 extern __at(0x0112) __sfr CM1CON1
;
1432 unsigned C1NCH0
: 1;
1433 unsigned C1NCH1
: 1;
1434 unsigned C1NCH2
: 1;
1436 unsigned C1PCH0
: 1;
1437 unsigned C1PCH1
: 1;
1438 unsigned C1INTN
: 1;
1439 unsigned C1INTP
: 1;
1456 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1458 #define _C1NCH0 0x01
1459 #define _C1NCH1 0x02
1460 #define _C1NCH2 0x04
1461 #define _C1PCH0 0x10
1462 #define _C1PCH1 0x20
1463 #define _C1INTN 0x40
1464 #define _C1INTP 0x80
1466 //==============================================================================
1469 //==============================================================================
1472 extern __at(0x0115) __sfr CMOUT
;
1476 unsigned MC1OUT
: 1;
1486 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1488 #define _MC1OUT 0x01
1490 //==============================================================================
1493 //==============================================================================
1496 extern __at(0x0116) __sfr BORCON
;
1500 unsigned BORRDY
: 1;
1507 unsigned SBOREN
: 1;
1510 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1512 #define _BORRDY 0x01
1514 #define _SBOREN 0x80
1516 //==============================================================================
1519 //==============================================================================
1522 extern __at(0x0117) __sfr FVRCON
;
1528 unsigned ADFVR0
: 1;
1529 unsigned ADFVR1
: 1;
1530 unsigned CDAFVR0
: 1;
1531 unsigned CDAFVR1
: 1;
1534 unsigned FVRRDY
: 1;
1547 unsigned CDAFVR
: 2;
1552 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1554 #define _ADFVR0 0x01
1555 #define _ADFVR1 0x02
1556 #define _CDAFVR0 0x04
1557 #define _CDAFVR1 0x08
1560 #define _FVRRDY 0x40
1563 //==============================================================================
1566 //==============================================================================
1569 extern __at(0x0118) __sfr DAC1CON0
;
1577 unsigned D1PSS0
: 1;
1578 unsigned D1PSS1
: 1;
1580 unsigned DAC1OE
: 1;
1582 unsigned DAC1EN
: 1;
1593 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1595 #define _D1PSS0 0x04
1596 #define _D1PSS1 0x08
1597 #define _DAC1OE 0x20
1598 #define _DAC1EN 0x80
1600 //==============================================================================
1603 //==============================================================================
1606 extern __at(0x0119) __sfr DAC1CON1
;
1610 unsigned DAC1R0
: 1;
1611 unsigned DAC1R1
: 1;
1612 unsigned DAC1R2
: 1;
1613 unsigned DAC1R3
: 1;
1614 unsigned DAC1R4
: 1;
1615 unsigned DAC1R5
: 1;
1616 unsigned DAC1R6
: 1;
1617 unsigned DAC1R7
: 1;
1620 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
1622 #define _DAC1R0 0x01
1623 #define _DAC1R1 0x02
1624 #define _DAC1R2 0x04
1625 #define _DAC1R3 0x08
1626 #define _DAC1R4 0x10
1627 #define _DAC1R5 0x20
1628 #define _DAC1R6 0x40
1629 #define _DAC1R7 0x80
1631 //==============================================================================
1634 //==============================================================================
1637 extern __at(0x011C) __sfr ZCD1CON
;
1641 unsigned ZCD1INTN
: 1;
1642 unsigned ZCD1INTP
: 1;
1645 unsigned ZCD1POL
: 1;
1646 unsigned ZCD1OUT
: 1;
1647 unsigned ZCD1OE
: 1;
1648 unsigned ZCD1EN
: 1;
1651 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
1653 #define _ZCD1INTN 0x01
1654 #define _ZCD1INTP 0x02
1655 #define _ZCD1POL 0x10
1656 #define _ZCD1OUT 0x20
1657 #define _ZCD1OE 0x40
1658 #define _ZCD1EN 0x80
1660 //==============================================================================
1663 //==============================================================================
1666 extern __at(0x011D) __sfr APFCON
;
1670 unsigned CCP1SEL
: 1;
1673 unsigned T1GSEL
: 1;
1675 unsigned CWGBSEL
: 1;
1676 unsigned CWGASEL
: 1;
1680 extern __at(0x011D) volatile __APFCONbits_t APFCONbits
;
1682 #define _CCP1SEL 0x01
1683 #define _T1GSEL 0x08
1684 #define _CWGBSEL 0x20
1685 #define _CWGASEL 0x40
1687 //==============================================================================
1690 //==============================================================================
1693 extern __at(0x018C) __sfr ANSELA
;
1707 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
1714 //==============================================================================
1716 extern __at(0x0191) __sfr PMADR
;
1717 extern __at(0x0191) __sfr PMADRL
;
1718 extern __at(0x0192) __sfr PMADRH
;
1719 extern __at(0x0193) __sfr PMDAT
;
1720 extern __at(0x0193) __sfr PMDATL
;
1721 extern __at(0x0194) __sfr PMDATH
;
1723 //==============================================================================
1726 extern __at(0x0195) __sfr PMCON1
;
1740 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
1750 //==============================================================================
1752 extern __at(0x0196) __sfr PMCON2
;
1754 //==============================================================================
1757 extern __at(0x020C) __sfr WPUA
;
1780 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
1789 //==============================================================================
1792 //==============================================================================
1795 extern __at(0x028C) __sfr ODCONA
;
1809 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
1817 //==============================================================================
1819 extern __at(0x0291) __sfr CCPR1
;
1820 extern __at(0x0291) __sfr CCPR1L
;
1821 extern __at(0x0292) __sfr CCPR1H
;
1823 //==============================================================================
1826 extern __at(0x0293) __sfr CCP1CON
;
1844 unsigned CCP1MODE0
: 1;
1845 unsigned CCP1MODE1
: 1;
1846 unsigned CCP1MODE2
: 1;
1847 unsigned CCP1MODE3
: 1;
1848 unsigned CCP1FMT
: 1;
1849 unsigned CCP1OUT
: 1;
1850 unsigned CCP1OE
: 1;
1851 unsigned CCP1EN
: 1;
1856 unsigned CCP1MODE
: 4;
1867 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
1870 #define _CCP1MODE0 0x01
1872 #define _CCP1MODE1 0x02
1874 #define _CCP1MODE2 0x04
1876 #define _CCP1MODE3 0x08
1878 #define _CCP1FMT 0x10
1880 #define _CCP1OUT 0x20
1882 #define _CCP1OE 0x40
1884 #define _CCP1EN 0x80
1886 //==============================================================================
1889 //==============================================================================
1892 extern __at(0x0294) __sfr CCP1CAP
;
1910 unsigned CCP1CTS0
: 1;
1911 unsigned CCP1CTS1
: 1;
1922 unsigned CCP1CTS
: 2;
1933 extern __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits
;
1936 #define _CCP1CTS0 0x01
1938 #define _CCP1CTS1 0x02
1940 //==============================================================================
1942 extern __at(0x0298) __sfr CCPR2
;
1943 extern __at(0x0298) __sfr CCPR2L
;
1944 extern __at(0x0299) __sfr CCPR2H
;
1946 //==============================================================================
1949 extern __at(0x029A) __sfr CCP2CON
;
1967 unsigned CCP2MODE0
: 1;
1968 unsigned CCP2MODE1
: 1;
1969 unsigned CCP2MODE2
: 1;
1970 unsigned CCP2MODE3
: 1;
1971 unsigned CCP2FMT
: 1;
1972 unsigned CCP2OUT
: 1;
1973 unsigned CCP2OE
: 1;
1974 unsigned CCP2EN
: 1;
1979 unsigned CCP2MODE
: 4;
1990 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
1992 #define _CCP2CON_MODE0 0x01
1993 #define _CCP2CON_CCP2MODE0 0x01
1994 #define _CCP2CON_MODE1 0x02
1995 #define _CCP2CON_CCP2MODE1 0x02
1996 #define _CCP2CON_MODE2 0x04
1997 #define _CCP2CON_CCP2MODE2 0x04
1998 #define _CCP2CON_MODE3 0x08
1999 #define _CCP2CON_CCP2MODE3 0x08
2000 #define _CCP2CON_FMT 0x10
2001 #define _CCP2CON_CCP2FMT 0x10
2002 #define _CCP2CON_OUT 0x20
2003 #define _CCP2CON_CCP2OUT 0x20
2004 #define _CCP2CON_OE 0x40
2005 #define _CCP2CON_CCP2OE 0x40
2006 #define _CCP2CON_EN 0x80
2007 #define _CCP2CON_CCP2EN 0x80
2009 //==============================================================================
2012 //==============================================================================
2015 extern __at(0x029B) __sfr CCP2CAP
;
2033 unsigned CCP2CTS0
: 1;
2034 unsigned CCP2CTS1
: 1;
2051 unsigned CCP2CTS
: 2;
2056 extern __at(0x029B) volatile __CCP2CAPbits_t CCP2CAPbits
;
2058 #define _CCP2CAP_CTS0 0x01
2059 #define _CCP2CAP_CCP2CTS0 0x01
2060 #define _CCP2CAP_CTS1 0x02
2061 #define _CCP2CAP_CCP2CTS1 0x02
2063 //==============================================================================
2066 //==============================================================================
2069 extern __at(0x029E) __sfr CCPTMRS
;
2075 unsigned CCP1TSEL0
: 1;
2076 unsigned CCP1TSEL1
: 1;
2077 unsigned CCP2TSEL0
: 1;
2078 unsigned CCP2TSEL1
: 1;
2087 unsigned CCP1TSEL
: 2;
2094 unsigned CCP2TSEL
: 2;
2099 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
2101 #define _CCP1TSEL0 0x01
2102 #define _CCP1TSEL1 0x02
2103 #define _CCP2TSEL0 0x04
2104 #define _CCP2TSEL1 0x08
2106 //==============================================================================
2109 //==============================================================================
2112 extern __at(0x030C) __sfr SLRCONA
;
2126 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
2134 //==============================================================================
2137 //==============================================================================
2140 extern __at(0x038C) __sfr INLVLA
;
2146 unsigned INLVLA0
: 1;
2147 unsigned INLVLA1
: 1;
2148 unsigned INLVLA2
: 1;
2149 unsigned INLVLA3
: 1;
2150 unsigned INLVLA4
: 1;
2151 unsigned INLVLA5
: 1;
2158 unsigned INLVLA
: 6;
2163 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
2165 #define _INLVLA0 0x01
2166 #define _INLVLA1 0x02
2167 #define _INLVLA2 0x04
2168 #define _INLVLA3 0x08
2169 #define _INLVLA4 0x10
2170 #define _INLVLA5 0x20
2172 //==============================================================================
2174 extern __at(0x0391) __sfr IOCAP
;
2175 extern __at(0x0392) __sfr IOCAN
;
2176 extern __at(0x0393) __sfr IOCAF
;
2177 extern __at(0x0413) __sfr T4TMR
;
2178 extern __at(0x0413) __sfr TMR4
;
2179 extern __at(0x0414) __sfr PR4
;
2180 extern __at(0x0414) __sfr T4PR
;
2182 //==============================================================================
2185 extern __at(0x0415) __sfr T4CON
;
2191 unsigned T4OUTPS0
: 1;
2192 unsigned T4OUTPS1
: 1;
2193 unsigned T4OUTPS2
: 1;
2194 unsigned T4OUTPS3
: 1;
2195 unsigned T4CKPS0
: 1;
2196 unsigned T4CKPS1
: 1;
2197 unsigned T4CKPS2
: 1;
2203 unsigned OUTPS0
: 1;
2204 unsigned OUTPS1
: 1;
2205 unsigned OUTPS2
: 1;
2206 unsigned OUTPS3
: 1;
2222 unsigned TMR4ON
: 1;
2227 unsigned T4OUTPS
: 4;
2240 unsigned T4CKPS
: 3;
2252 extern __at(0x0415) volatile __T4CONbits_t T4CONbits
;
2254 #define _T4CON_T4OUTPS0 0x01
2255 #define _T4CON_OUTPS0 0x01
2256 #define _T4CON_T4OUTPS1 0x02
2257 #define _T4CON_OUTPS1 0x02
2258 #define _T4CON_T4OUTPS2 0x04
2259 #define _T4CON_OUTPS2 0x04
2260 #define _T4CON_T4OUTPS3 0x08
2261 #define _T4CON_OUTPS3 0x08
2262 #define _T4CON_T4CKPS0 0x10
2263 #define _T4CON_CKPS0 0x10
2264 #define _T4CON_T4CKPS1 0x20
2265 #define _T4CON_CKPS1 0x20
2266 #define _T4CON_T4CKPS2 0x40
2267 #define _T4CON_CKPS2 0x40
2268 #define _T4CON_ON 0x80
2269 #define _T4CON_T4ON 0x80
2270 #define _T4CON_TMR4ON 0x80
2272 //==============================================================================
2275 //==============================================================================
2278 extern __at(0x0416) __sfr T4HLT
;
2289 unsigned CKSYNC
: 1;
2296 unsigned T4MODE0
: 1;
2297 unsigned T4MODE1
: 1;
2298 unsigned T4MODE2
: 1;
2299 unsigned T4MODE3
: 1;
2301 unsigned T4CKSYNC
: 1;
2302 unsigned T4CKPOL
: 1;
2303 unsigned T4PSYNC
: 1;
2314 unsigned T4MODE
: 4;
2319 extern __at(0x0416) volatile __T4HLTbits_t T4HLTbits
;
2321 #define _T4HLT_MODE0 0x01
2322 #define _T4HLT_T4MODE0 0x01
2323 #define _T4HLT_MODE1 0x02
2324 #define _T4HLT_T4MODE1 0x02
2325 #define _T4HLT_MODE2 0x04
2326 #define _T4HLT_T4MODE2 0x04
2327 #define _T4HLT_MODE3 0x08
2328 #define _T4HLT_T4MODE3 0x08
2329 #define _T4HLT_CKSYNC 0x20
2330 #define _T4HLT_T4CKSYNC 0x20
2331 #define _T4HLT_CKPOL 0x40
2332 #define _T4HLT_T4CKPOL 0x40
2333 #define _T4HLT_PSYNC 0x80
2334 #define _T4HLT_T4PSYNC 0x80
2336 //==============================================================================
2339 //==============================================================================
2342 extern __at(0x0417) __sfr T4CLKCON
;
2365 extern __at(0x0417) volatile __T4CLKCONbits_t T4CLKCONbits
;
2371 //==============================================================================
2374 //==============================================================================
2377 extern __at(0x0418) __sfr T4RST
;
2395 unsigned T4RSEL0
: 1;
2396 unsigned T4RSEL1
: 1;
2397 unsigned T4RSEL2
: 1;
2398 unsigned T4RSEL3
: 1;
2413 unsigned T4RSEL
: 4;
2418 extern __at(0x0418) volatile __T4RSTbits_t T4RSTbits
;
2420 #define _T4RST_RSEL0 0x01
2421 #define _T4RST_T4RSEL0 0x01
2422 #define _T4RST_RSEL1 0x02
2423 #define _T4RST_T4RSEL1 0x02
2424 #define _T4RST_RSEL2 0x04
2425 #define _T4RST_T4RSEL2 0x04
2426 #define _T4RST_RSEL3 0x08
2427 #define _T4RST_T4RSEL3 0x08
2429 //==============================================================================
2431 extern __at(0x041A) __sfr T6TMR
;
2432 extern __at(0x041A) __sfr TMR6
;
2433 extern __at(0x041B) __sfr PR6
;
2434 extern __at(0x041B) __sfr T6PR
;
2436 //==============================================================================
2439 extern __at(0x041C) __sfr T6CON
;
2445 unsigned T6OUTPS0
: 1;
2446 unsigned T6OUTPS1
: 1;
2447 unsigned T6OUTPS2
: 1;
2448 unsigned T6OUTPS3
: 1;
2449 unsigned T6CKPS0
: 1;
2450 unsigned T6CKPS1
: 1;
2451 unsigned T6CKPS2
: 1;
2457 unsigned OUTPS0
: 1;
2458 unsigned OUTPS1
: 1;
2459 unsigned OUTPS2
: 1;
2460 unsigned OUTPS3
: 1;
2476 unsigned TMR6ON
: 1;
2487 unsigned T6OUTPS
: 4;
2501 unsigned T6CKPS
: 3;
2506 extern __at(0x041C) volatile __T6CONbits_t T6CONbits
;
2508 #define _T6CON_T6OUTPS0 0x01
2509 #define _T6CON_OUTPS0 0x01
2510 #define _T6CON_T6OUTPS1 0x02
2511 #define _T6CON_OUTPS1 0x02
2512 #define _T6CON_T6OUTPS2 0x04
2513 #define _T6CON_OUTPS2 0x04
2514 #define _T6CON_T6OUTPS3 0x08
2515 #define _T6CON_OUTPS3 0x08
2516 #define _T6CON_T6CKPS0 0x10
2517 #define _T6CON_CKPS0 0x10
2518 #define _T6CON_T6CKPS1 0x20
2519 #define _T6CON_CKPS1 0x20
2520 #define _T6CON_T6CKPS2 0x40
2521 #define _T6CON_CKPS2 0x40
2522 #define _T6CON_ON 0x80
2523 #define _T6CON_T6ON 0x80
2524 #define _T6CON_TMR6ON 0x80
2526 //==============================================================================
2529 //==============================================================================
2532 extern __at(0x041D) __sfr T6HLT
;
2543 unsigned CKSYNC
: 1;
2550 unsigned T6MODE0
: 1;
2551 unsigned T6MODE1
: 1;
2552 unsigned T6MODE2
: 1;
2553 unsigned T6MODE3
: 1;
2555 unsigned T6CKSYNC
: 1;
2556 unsigned T6CKPOL
: 1;
2557 unsigned T6PSYNC
: 1;
2568 unsigned T6MODE
: 4;
2573 extern __at(0x041D) volatile __T6HLTbits_t T6HLTbits
;
2575 #define _T6HLT_MODE0 0x01
2576 #define _T6HLT_T6MODE0 0x01
2577 #define _T6HLT_MODE1 0x02
2578 #define _T6HLT_T6MODE1 0x02
2579 #define _T6HLT_MODE2 0x04
2580 #define _T6HLT_T6MODE2 0x04
2581 #define _T6HLT_MODE3 0x08
2582 #define _T6HLT_T6MODE3 0x08
2583 #define _T6HLT_CKSYNC 0x20
2584 #define _T6HLT_T6CKSYNC 0x20
2585 #define _T6HLT_CKPOL 0x40
2586 #define _T6HLT_T6CKPOL 0x40
2587 #define _T6HLT_PSYNC 0x80
2588 #define _T6HLT_T6PSYNC 0x80
2590 //==============================================================================
2593 //==============================================================================
2596 extern __at(0x041E) __sfr T6CLKCON
;
2619 extern __at(0x041E) volatile __T6CLKCONbits_t T6CLKCONbits
;
2625 //==============================================================================
2628 //==============================================================================
2631 extern __at(0x041F) __sfr T6RST
;
2649 unsigned T6RSEL0
: 1;
2650 unsigned T6RSEL1
: 1;
2651 unsigned T6RSEL2
: 1;
2652 unsigned T6RSEL3
: 1;
2661 unsigned T6RSEL
: 4;
2672 extern __at(0x041F) volatile __T6RSTbits_t T6RSTbits
;
2674 #define _T6RST_RSEL0 0x01
2675 #define _T6RST_T6RSEL0 0x01
2676 #define _T6RST_RSEL1 0x02
2677 #define _T6RST_T6RSEL1 0x02
2678 #define _T6RST_RSEL2 0x04
2679 #define _T6RST_T6RSEL2 0x04
2680 #define _T6RST_RSEL3 0x08
2681 #define _T6RST_T6RSEL3 0x08
2683 //==============================================================================
2686 //==============================================================================
2689 extern __at(0x0691) __sfr CWG1DBR
;
2707 unsigned CWG1DBR0
: 1;
2708 unsigned CWG1DBR1
: 1;
2709 unsigned CWG1DBR2
: 1;
2710 unsigned CWG1DBR3
: 1;
2711 unsigned CWG1DBR4
: 1;
2712 unsigned CWG1DBR5
: 1;
2725 unsigned CWG1DBR
: 6;
2730 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits
;
2733 #define _CWG1DBR0 0x01
2735 #define _CWG1DBR1 0x02
2737 #define _CWG1DBR2 0x04
2739 #define _CWG1DBR3 0x08
2741 #define _CWG1DBR4 0x10
2743 #define _CWG1DBR5 0x20
2745 //==============================================================================
2748 //==============================================================================
2751 extern __at(0x0692) __sfr CWG1DBF
;
2769 unsigned CWG1DBF0
: 1;
2770 unsigned CWG1DBF1
: 1;
2771 unsigned CWG1DBF2
: 1;
2772 unsigned CWG1DBF3
: 1;
2773 unsigned CWG1DBF4
: 1;
2774 unsigned CWG1DBF5
: 1;
2787 unsigned CWG1DBF
: 6;
2792 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits
;
2795 #define _CWG1DBF0 0x01
2797 #define _CWG1DBF1 0x02
2799 #define _CWG1DBF2 0x04
2801 #define _CWG1DBF3 0x08
2803 #define _CWG1DBF4 0x10
2805 #define _CWG1DBF5 0x20
2807 //==============================================================================
2810 //==============================================================================
2813 extern __at(0x0693) __sfr CWG1AS0
;
2826 unsigned SHUTDOWN
: 1;
2833 unsigned CWG1LSAC0
: 1;
2834 unsigned CWG1LSAC1
: 1;
2835 unsigned CWG1LSBD0
: 1;
2836 unsigned CWG1LSBD1
: 1;
2837 unsigned CWG1REN
: 1;
2838 unsigned CWG1SHUTDOWN
: 1;
2851 unsigned CWG1LSAC
: 2;
2865 unsigned CWG1LSBD
: 2;
2870 extern __at(0x0693) volatile __CWG1AS0bits_t CWG1AS0bits
;
2873 #define _CWG1LSAC0 0x04
2875 #define _CWG1LSAC1 0x08
2877 #define _CWG1LSBD0 0x10
2879 #define _CWG1LSBD1 0x20
2881 #define _CWG1REN 0x40
2882 #define _SHUTDOWN 0x80
2883 #define _CWG1SHUTDOWN 0x80
2885 //==============================================================================
2888 //==============================================================================
2891 extern __at(0x0694) __sfr CWG1AS1
;
2901 unsigned TMR2AS
: 1;
2902 unsigned TMR4AS
: 1;
2903 unsigned TMR6AS
: 1;
2909 unsigned CWG1INAS
: 1;
2910 unsigned CWG1C1AS
: 1;
2911 unsigned CWG1C2AS
: 1;
2913 unsigned CWG1TMR2AS
: 1;
2914 unsigned CWG1TMR4AS
: 1;
2915 unsigned CWG1TMR6AS
: 1;
2920 extern __at(0x0694) volatile __CWG1AS1bits_t CWG1AS1bits
;
2923 #define _CWG1INAS 0x01
2925 #define _CWG1C1AS 0x02
2927 #define _CWG1C2AS 0x04
2928 #define _TMR2AS 0x10
2929 #define _CWG1TMR2AS 0x10
2930 #define _TMR4AS 0x20
2931 #define _CWG1TMR4AS 0x20
2932 #define _TMR6AS 0x40
2933 #define _CWG1TMR6AS 0x40
2935 //==============================================================================
2938 //==============================================================================
2941 extern __at(0x0695) __sfr CWG1OCON0
;
2959 unsigned CWG1STRA
: 1;
2960 unsigned CWG1STRB
: 1;
2961 unsigned CWG1STRC
: 1;
2962 unsigned CWG1STRD
: 1;
2963 unsigned CWG1OVRA
: 1;
2964 unsigned CWG1OVRB
: 1;
2965 unsigned CWG1OVRC
: 1;
2966 unsigned CWG1OVRD
: 1;
2968 } __CWG1OCON0bits_t
;
2970 extern __at(0x0695) volatile __CWG1OCON0bits_t CWG1OCON0bits
;
2973 #define _CWG1STRA 0x01
2975 #define _CWG1STRB 0x02
2977 #define _CWG1STRC 0x04
2979 #define _CWG1STRD 0x08
2981 #define _CWG1OVRA 0x10
2983 #define _CWG1OVRB 0x20
2985 #define _CWG1OVRC 0x40
2987 #define _CWG1OVRD 0x80
2989 //==============================================================================
2992 //==============================================================================
2995 extern __at(0x0696) __sfr CWG1CON0
;
3013 unsigned CWG1MODE0
: 1;
3014 unsigned CWG1MODE1
: 1;
3015 unsigned CWG1MODE2
: 1;
3019 unsigned CWG1LD
: 1;
3032 unsigned CWG1EN
: 1;
3037 unsigned CWG1MODE
: 3;
3048 extern __at(0x0696) volatile __CWG1CON0bits_t CWG1CON0bits
;
3050 #define _CWG1CON0_MODE0 0x01
3051 #define _CWG1CON0_CWG1MODE0 0x01
3052 #define _CWG1CON0_MODE1 0x02
3053 #define _CWG1CON0_CWG1MODE1 0x02
3054 #define _CWG1CON0_MODE2 0x04
3055 #define _CWG1CON0_CWG1MODE2 0x04
3056 #define _CWG1CON0_LD 0x40
3057 #define _CWG1CON0_CWG1LD 0x40
3058 #define _CWG1CON0_EN 0x80
3059 #define _CWG1CON0_G1EN 0x80
3060 #define _CWG1CON0_CWG1EN 0x80
3062 //==============================================================================
3065 //==============================================================================
3068 extern __at(0x0697) __sfr CWG1CON1
;
3086 unsigned CWG1POLA
: 1;
3087 unsigned CWG1POLB
: 1;
3088 unsigned CWG1POLC
: 1;
3089 unsigned CWG1POLD
: 1;
3091 unsigned CWG1IN
: 1;
3097 extern __at(0x0697) volatile __CWG1CON1bits_t CWG1CON1bits
;
3100 #define _CWG1POLA 0x01
3102 #define _CWG1POLB 0x02
3104 #define _CWG1POLC 0x04
3106 #define _CWG1POLD 0x08
3108 #define _CWG1IN 0x20
3110 //==============================================================================
3113 //==============================================================================
3116 extern __at(0x0698) __sfr CWG1OCON1
;
3134 unsigned CWG1OEA
: 1;
3135 unsigned CWG1OEB
: 1;
3136 unsigned CWG1OEC
: 1;
3137 unsigned CWG1OED
: 1;
3143 } __CWG1OCON1bits_t
;
3145 extern __at(0x0698) volatile __CWG1OCON1bits_t CWG1OCON1bits
;
3148 #define _CWG1OEA 0x01
3150 #define _CWG1OEB 0x02
3152 #define _CWG1OEC 0x04
3154 #define _CWG1OED 0x08
3156 //==============================================================================
3159 //==============================================================================
3162 extern __at(0x0699) __sfr CWG1CLKCON
;
3180 unsigned CWG1CS
: 1;
3189 } __CWG1CLKCONbits_t
;
3191 extern __at(0x0699) volatile __CWG1CLKCONbits_t CWG1CLKCONbits
;
3194 #define _CWG1CS 0x01
3196 //==============================================================================
3199 //==============================================================================
3202 extern __at(0x069A) __sfr CWG1ISM
;
3220 unsigned CWG1IS0
: 1;
3221 unsigned CWG1IS1
: 1;
3222 unsigned CWG1IS2
: 1;
3238 unsigned CWG1IS
: 3;
3243 extern __at(0x069A) volatile __CWG1ISMbits_t CWG1ISMbits
;
3246 #define _CWG1IS0 0x01
3248 #define _CWG1IS1 0x02
3250 #define _CWG1IS2 0x04
3252 //==============================================================================
3255 //==============================================================================
3258 extern __at(0x0711) __sfr WDTCON0
;
3265 unsigned WDTPS0
: 1;
3266 unsigned WDTPS1
: 1;
3267 unsigned WDTPS2
: 1;
3268 unsigned WDTPS3
: 1;
3269 unsigned WDTPS4
: 1;
3276 unsigned SWDTEN
: 1;
3288 unsigned WDTSEN
: 1;
3306 extern __at(0x0711) volatile __WDTCON0bits_t WDTCON0bits
;
3309 #define _SWDTEN 0x01
3310 #define _WDTSEN 0x01
3311 #define _WDTPS0 0x02
3312 #define _WDTPS1 0x04
3313 #define _WDTPS2 0x08
3314 #define _WDTPS3 0x10
3315 #define _WDTPS4 0x20
3317 //==============================================================================
3320 //==============================================================================
3323 extern __at(0x0712) __sfr WDTCON1
;
3329 unsigned WINDOW0
: 1;
3330 unsigned WINDOW1
: 1;
3331 unsigned WINDOW2
: 1;
3333 unsigned WDTCS0
: 1;
3334 unsigned WDTCS1
: 1;
3335 unsigned WDTCS2
: 1;
3341 unsigned WDTWINDOW0
: 1;
3342 unsigned WDTWINDOW1
: 1;
3343 unsigned WDTWINDOW2
: 1;
3353 unsigned WDTWINDOW
: 3;
3359 unsigned WINDOW
: 3;
3371 extern __at(0x0712) volatile __WDTCON1bits_t WDTCON1bits
;
3373 #define _WINDOW0 0x01
3374 #define _WDTWINDOW0 0x01
3375 #define _WINDOW1 0x02
3376 #define _WDTWINDOW1 0x02
3377 #define _WINDOW2 0x04
3378 #define _WDTWINDOW2 0x04
3379 #define _WDTCS0 0x10
3380 #define _WDTCS1 0x20
3381 #define _WDTCS2 0x40
3383 //==============================================================================
3386 //==============================================================================
3389 extern __at(0x0713) __sfr WDTPSL
;
3395 unsigned PSCNT0
: 1;
3396 unsigned PSCNT1
: 1;
3397 unsigned PSCNT2
: 1;
3398 unsigned PSCNT3
: 1;
3399 unsigned PSCNT4
: 1;
3400 unsigned PSCNT5
: 1;
3401 unsigned PSCNT6
: 1;
3402 unsigned PSCNT7
: 1;
3407 unsigned WDTPSCNT0
: 1;
3408 unsigned WDTPSCNT1
: 1;
3409 unsigned WDTPSCNT2
: 1;
3410 unsigned WDTPSCNT3
: 1;
3411 unsigned WDTPSCNT4
: 1;
3412 unsigned WDTPSCNT5
: 1;
3413 unsigned WDTPSCNT6
: 1;
3414 unsigned WDTPSCNT7
: 1;
3418 extern __at(0x0713) volatile __WDTPSLbits_t WDTPSLbits
;
3420 #define _PSCNT0 0x01
3421 #define _WDTPSCNT0 0x01
3422 #define _PSCNT1 0x02
3423 #define _WDTPSCNT1 0x02
3424 #define _PSCNT2 0x04
3425 #define _WDTPSCNT2 0x04
3426 #define _PSCNT3 0x08
3427 #define _WDTPSCNT3 0x08
3428 #define _PSCNT4 0x10
3429 #define _WDTPSCNT4 0x10
3430 #define _PSCNT5 0x20
3431 #define _WDTPSCNT5 0x20
3432 #define _PSCNT6 0x40
3433 #define _WDTPSCNT6 0x40
3434 #define _PSCNT7 0x80
3435 #define _WDTPSCNT7 0x80
3437 //==============================================================================
3440 //==============================================================================
3443 extern __at(0x0714) __sfr WDTPSH
;
3449 unsigned PSCNT8
: 1;
3450 unsigned PSCNT9
: 1;
3451 unsigned PSCNT10
: 1;
3452 unsigned PSCNT11
: 1;
3453 unsigned PSCNT12
: 1;
3454 unsigned PSCNT13
: 1;
3455 unsigned PSCNT14
: 1;
3456 unsigned PSCNT15
: 1;
3461 unsigned WDTPSCNT8
: 1;
3462 unsigned WDTPSCNT9
: 1;
3463 unsigned WDTPSCNT10
: 1;
3464 unsigned WDTPSCNT11
: 1;
3465 unsigned WDTPSCNT12
: 1;
3466 unsigned WDTPSCNT13
: 1;
3467 unsigned WDTPSCNT14
: 1;
3468 unsigned WDTPSCNT15
: 1;
3472 extern __at(0x0714) volatile __WDTPSHbits_t WDTPSHbits
;
3474 #define _PSCNT8 0x01
3475 #define _WDTPSCNT8 0x01
3476 #define _PSCNT9 0x02
3477 #define _WDTPSCNT9 0x02
3478 #define _PSCNT10 0x04
3479 #define _WDTPSCNT10 0x04
3480 #define _PSCNT11 0x08
3481 #define _WDTPSCNT11 0x08
3482 #define _PSCNT12 0x10
3483 #define _WDTPSCNT12 0x10
3484 #define _PSCNT13 0x20
3485 #define _WDTPSCNT13 0x20
3486 #define _PSCNT14 0x40
3487 #define _WDTPSCNT14 0x40
3488 #define _PSCNT15 0x80
3489 #define _WDTPSCNT15 0x80
3491 //==============================================================================
3494 //==============================================================================
3497 extern __at(0x0715) __sfr WDTTMR
;
3503 unsigned PSCNT16
: 1;
3504 unsigned PSCNT17
: 1;
3506 unsigned WDTTMR0
: 1;
3507 unsigned WDTTMR1
: 1;
3508 unsigned WDTTMR2
: 1;
3509 unsigned WDTTMR3
: 1;
3510 unsigned WDTTMR4
: 1;
3515 unsigned WDTPSCNT16
: 1;
3516 unsigned WDTPSCNT17
: 1;
3517 unsigned WDTSTATE
: 1;
3528 unsigned WDTTMR
: 5;
3532 extern __at(0x0715) volatile __WDTTMRbits_t WDTTMRbits
;
3534 #define _PSCNT16 0x01
3535 #define _WDTPSCNT16 0x01
3536 #define _PSCNT17 0x02
3537 #define _WDTPSCNT17 0x02
3539 #define _WDTSTATE 0x04
3540 #define _WDTTMR0 0x08
3541 #define _WDTTMR1 0x10
3542 #define _WDTTMR2 0x20
3543 #define _WDTTMR3 0x40
3544 #define _WDTTMR4 0x80
3546 //==============================================================================
3548 extern __at(0x0718) __sfr SCANLADR
;
3550 //==============================================================================
3553 extern __at(0x0718) __sfr SCANLADRL
;
3571 unsigned SCANLADR0
: 1;
3572 unsigned SCANLADR1
: 1;
3573 unsigned SCANLADR2
: 1;
3574 unsigned SCANLADR3
: 1;
3575 unsigned SCANLADR4
: 1;
3576 unsigned SCANLADR5
: 1;
3577 unsigned SCANLADR6
: 1;
3578 unsigned SCANLADR7
: 1;
3586 } __SCANLADRLbits_t
;
3588 extern __at(0x0718) volatile __SCANLADRLbits_t SCANLADRLbits
;
3591 #define _SCANLADR0 0x01
3593 #define _SCANLADR1 0x02
3595 #define _SCANLADR2 0x04
3597 #define _SCANLADR3 0x08
3599 #define _SCANLADR4 0x10
3601 #define _SCANLADR5 0x20
3603 #define _SCANLADR6 0x40
3605 #define _SCANLADR7 0x80
3607 //==============================================================================
3610 //==============================================================================
3613 extern __at(0x0719) __sfr SCANLADRH
;
3621 unsigned LADR10
: 1;
3622 unsigned LADR11
: 1;
3623 unsigned LADR12
: 1;
3624 unsigned LADR13
: 1;
3625 unsigned LADR14
: 1;
3626 unsigned LADR15
: 1;
3631 unsigned SCANLADR8
: 1;
3632 unsigned SCANLADR9
: 1;
3633 unsigned SCANLADR10
: 1;
3634 unsigned SCANLADR11
: 1;
3635 unsigned SCANLADR12
: 1;
3636 unsigned SCANLADR13
: 1;
3637 unsigned SCANLADR14
: 1;
3638 unsigned SCANLADR15
: 1;
3640 } __SCANLADRHbits_t
;
3642 extern __at(0x0719) volatile __SCANLADRHbits_t SCANLADRHbits
;
3645 #define _SCANLADR8 0x01
3647 #define _SCANLADR9 0x02
3648 #define _LADR10 0x04
3649 #define _SCANLADR10 0x04
3650 #define _LADR11 0x08
3651 #define _SCANLADR11 0x08
3652 #define _LADR12 0x10
3653 #define _SCANLADR12 0x10
3654 #define _LADR13 0x20
3655 #define _SCANLADR13 0x20
3656 #define _LADR14 0x40
3657 #define _SCANLADR14 0x40
3658 #define _LADR15 0x80
3659 #define _SCANLADR15 0x80
3661 //==============================================================================
3663 extern __at(0x071A) __sfr SCANHADR
;
3665 //==============================================================================
3668 extern __at(0x071A) __sfr SCANHADRL
;
3686 unsigned SCANHADR0
: 1;
3687 unsigned SCANHADR1
: 1;
3688 unsigned SCANHADR2
: 1;
3689 unsigned SCANHADR3
: 1;
3690 unsigned SCANHADR4
: 1;
3691 unsigned SCANHADR5
: 1;
3692 unsigned SCANHADR6
: 1;
3693 unsigned SCANHADR7
: 1;
3695 } __SCANHADRLbits_t
;
3697 extern __at(0x071A) volatile __SCANHADRLbits_t SCANHADRLbits
;
3700 #define _SCANHADR0 0x01
3702 #define _SCANHADR1 0x02
3704 #define _SCANHADR2 0x04
3706 #define _SCANHADR3 0x08
3708 #define _SCANHADR4 0x10
3710 #define _SCANHADR5 0x20
3712 #define _SCANHADR6 0x40
3714 #define _SCANHADR7 0x80
3716 //==============================================================================
3719 //==============================================================================
3722 extern __at(0x071B) __sfr SCANHADRH
;
3730 unsigned HADR10
: 1;
3731 unsigned HADR11
: 1;
3732 unsigned HADR12
: 1;
3733 unsigned HADR13
: 1;
3734 unsigned HADR14
: 1;
3735 unsigned HADR15
: 1;
3740 unsigned SCANHADR8
: 1;
3741 unsigned SCANHADR9
: 1;
3742 unsigned SCANHADR10
: 1;
3743 unsigned SCANHADR11
: 1;
3744 unsigned SCANHADR12
: 1;
3745 unsigned SCANHADR13
: 1;
3746 unsigned SCANHADR14
: 1;
3747 unsigned SCANHADR15
: 1;
3749 } __SCANHADRHbits_t
;
3751 extern __at(0x071B) volatile __SCANHADRHbits_t SCANHADRHbits
;
3754 #define _SCANHADR8 0x01
3756 #define _SCANHADR9 0x02
3757 #define _HADR10 0x04
3758 #define _SCANHADR10 0x04
3759 #define _HADR11 0x08
3760 #define _SCANHADR11 0x08
3761 #define _HADR12 0x10
3762 #define _SCANHADR12 0x10
3763 #define _HADR13 0x20
3764 #define _SCANHADR13 0x20
3765 #define _HADR14 0x40
3766 #define _SCANHADR14 0x40
3767 #define _HADR15 0x80
3768 #define _SCANHADR15 0x80
3770 //==============================================================================
3773 //==============================================================================
3776 extern __at(0x071C) __sfr SCANCON0
;
3786 unsigned INVALID
: 1;
3788 unsigned SCANGO
: 1;
3794 unsigned SCANMODE0
: 1;
3795 unsigned SCANMODE1
: 1;
3797 unsigned SCANINTM
: 1;
3798 unsigned SCANINVALID
: 1;
3799 unsigned SCANBUSY
: 1;
3801 unsigned SCANEN
: 1;
3812 unsigned SCANMODE
: 2;
3817 extern __at(0x071C) volatile __SCANCON0bits_t SCANCON0bits
;
3819 #define _SCANCON0_MODE0 0x01
3820 #define _SCANCON0_SCANMODE0 0x01
3821 #define _SCANCON0_MODE1 0x02
3822 #define _SCANCON0_SCANMODE1 0x02
3823 #define _SCANCON0_INTM 0x08
3824 #define _SCANCON0_SCANINTM 0x08
3825 #define _SCANCON0_INVALID 0x10
3826 #define _SCANCON0_SCANINVALID 0x10
3827 #define _SCANCON0_BUSY 0x20
3828 #define _SCANCON0_SCANBUSY 0x20
3829 #define _SCANCON0_SCANGO 0x40
3830 #define _SCANCON0_EN 0x80
3831 #define _SCANCON0_SCANEN 0x80
3833 //==============================================================================
3836 //==============================================================================
3839 extern __at(0x071D) __sfr SCANTRIG
;
3857 unsigned SCANTSEL0
: 1;
3858 unsigned SCANTSEL1
: 1;
3869 unsigned SCANTSEL
: 2;
3880 extern __at(0x071D) volatile __SCANTRIGbits_t SCANTRIGbits
;
3883 #define _SCANTSEL0 0x01
3885 #define _SCANTSEL1 0x02
3887 //==============================================================================
3889 extern __at(0x0791) __sfr CRCDAT
;
3891 //==============================================================================
3894 extern __at(0x0791) __sfr CRCDATL
;
3912 unsigned CRCDAT0
: 1;
3913 unsigned CRCDAT1
: 1;
3914 unsigned CRCDAT2
: 1;
3915 unsigned CRCDAT3
: 1;
3916 unsigned CRCDAT4
: 1;
3917 unsigned CRCDAT5
: 1;
3918 unsigned CRCDAT6
: 1;
3919 unsigned CRDCDAT7
: 1;
3924 unsigned CRCDAT
: 7;
3929 extern __at(0x0791) volatile __CRCDATLbits_t CRCDATLbits
;
3932 #define _CRCDAT0 0x01
3934 #define _CRCDAT1 0x02
3936 #define _CRCDAT2 0x04
3938 #define _CRCDAT3 0x08
3940 #define _CRCDAT4 0x10
3942 #define _CRCDAT5 0x20
3944 #define _CRCDAT6 0x40
3946 #define _CRDCDAT7 0x80
3948 //==============================================================================
3951 //==============================================================================
3954 extern __at(0x0792) __sfr CRCDATH
;
3972 unsigned CRCDAT8
: 1;
3973 unsigned CRCDAT9
: 1;
3974 unsigned CRCDAT10
: 1;
3975 unsigned CRCDAT11
: 1;
3976 unsigned CRCDAT12
: 1;
3977 unsigned CRCDAT13
: 1;
3978 unsigned CRCDAT14
: 1;
3979 unsigned CRCDAT15
: 1;
3983 extern __at(0x0792) volatile __CRCDATHbits_t CRCDATHbits
;
3986 #define _CRCDAT8 0x01
3988 #define _CRCDAT9 0x02
3990 #define _CRCDAT10 0x04
3992 #define _CRCDAT11 0x08
3994 #define _CRCDAT12 0x10
3996 #define _CRCDAT13 0x20
3998 #define _CRCDAT14 0x40
4000 #define _CRCDAT15 0x80
4002 //==============================================================================
4004 extern __at(0x0793) __sfr CRCACC
;
4006 //==============================================================================
4009 extern __at(0x0793) __sfr CRCACCL
;
4027 unsigned CRCACC0
: 1;
4028 unsigned CRCACC1
: 1;
4029 unsigned CRCACC2
: 1;
4030 unsigned CRCACC3
: 1;
4031 unsigned CRCACC4
: 1;
4032 unsigned CRCACC5
: 1;
4033 unsigned CRCACC6
: 1;
4034 unsigned CRCACC7
: 1;
4038 extern __at(0x0793) volatile __CRCACCLbits_t CRCACCLbits
;
4041 #define _CRCACC0 0x01
4043 #define _CRCACC1 0x02
4045 #define _CRCACC2 0x04
4047 #define _CRCACC3 0x08
4049 #define _CRCACC4 0x10
4051 #define _CRCACC5 0x20
4053 #define _CRCACC6 0x40
4055 #define _CRCACC7 0x80
4057 //==============================================================================
4060 //==============================================================================
4063 extern __at(0x0794) __sfr CRCACCH
;
4081 unsigned CRCACC8
: 1;
4082 unsigned CRCACC9
: 1;
4083 unsigned CRCACC10
: 1;
4084 unsigned CRCACC11
: 1;
4085 unsigned CRCACC12
: 1;
4086 unsigned CRCACC13
: 1;
4087 unsigned CRCACC14
: 1;
4088 unsigned CRCACC15
: 1;
4092 extern __at(0x0794) volatile __CRCACCHbits_t CRCACCHbits
;
4095 #define _CRCACC8 0x01
4097 #define _CRCACC9 0x02
4099 #define _CRCACC10 0x04
4101 #define _CRCACC11 0x08
4103 #define _CRCACC12 0x10
4105 #define _CRCACC13 0x20
4107 #define _CRCACC14 0x40
4109 #define _CRCACC15 0x80
4111 //==============================================================================
4113 extern __at(0x0795) __sfr CRCSHIFT
;
4115 //==============================================================================
4118 extern __at(0x0795) __sfr CRCSHIFTL
;
4124 unsigned SHIFT0
: 1;
4125 unsigned SHIFT1
: 1;
4126 unsigned SHIFT2
: 1;
4127 unsigned SHIFT3
: 1;
4128 unsigned SHIFT4
: 1;
4129 unsigned SHIFT5
: 1;
4130 unsigned SHIFT6
: 1;
4131 unsigned SHIFT7
: 1;
4136 unsigned CRCSHIFT0
: 1;
4137 unsigned CRCSHIFT1
: 1;
4138 unsigned CRCSHIFT2
: 1;
4139 unsigned CRCSHIFT3
: 1;
4140 unsigned CRCSHIFT4
: 1;
4141 unsigned CRCSHIFT5
: 1;
4142 unsigned CRCSHIFT6
: 1;
4143 unsigned CRCSHIFT7
: 1;
4145 } __CRCSHIFTLbits_t
;
4147 extern __at(0x0795) volatile __CRCSHIFTLbits_t CRCSHIFTLbits
;
4149 #define _SHIFT0 0x01
4150 #define _CRCSHIFT0 0x01
4151 #define _SHIFT1 0x02
4152 #define _CRCSHIFT1 0x02
4153 #define _SHIFT2 0x04
4154 #define _CRCSHIFT2 0x04
4155 #define _SHIFT3 0x08
4156 #define _CRCSHIFT3 0x08
4157 #define _SHIFT4 0x10
4158 #define _CRCSHIFT4 0x10
4159 #define _SHIFT5 0x20
4160 #define _CRCSHIFT5 0x20
4161 #define _SHIFT6 0x40
4162 #define _CRCSHIFT6 0x40
4163 #define _SHIFT7 0x80
4164 #define _CRCSHIFT7 0x80
4166 //==============================================================================
4169 //==============================================================================
4172 extern __at(0x0796) __sfr CRCSHIFTH
;
4178 unsigned SHIFT8
: 1;
4179 unsigned SHIFT9
: 1;
4180 unsigned SHIFT10
: 1;
4181 unsigned SHIFT11
: 1;
4182 unsigned SHIFT12
: 1;
4183 unsigned SHIFT13
: 1;
4184 unsigned SHIFT14
: 1;
4185 unsigned SHIFT15
: 1;
4190 unsigned CRCSHIFT8
: 1;
4191 unsigned CRCSHIFT9
: 1;
4192 unsigned CRCSHIFT10
: 1;
4193 unsigned CRCSHIFT11
: 1;
4194 unsigned CRCSHIFT12
: 1;
4195 unsigned CRCSHIFT13
: 1;
4196 unsigned CRCSHIFT14
: 1;
4197 unsigned CRCSHIFT15
: 1;
4199 } __CRCSHIFTHbits_t
;
4201 extern __at(0x0796) volatile __CRCSHIFTHbits_t CRCSHIFTHbits
;
4203 #define _SHIFT8 0x01
4204 #define _CRCSHIFT8 0x01
4205 #define _SHIFT9 0x02
4206 #define _CRCSHIFT9 0x02
4207 #define _SHIFT10 0x04
4208 #define _CRCSHIFT10 0x04
4209 #define _SHIFT11 0x08
4210 #define _CRCSHIFT11 0x08
4211 #define _SHIFT12 0x10
4212 #define _CRCSHIFT12 0x10
4213 #define _SHIFT13 0x20
4214 #define _CRCSHIFT13 0x20
4215 #define _SHIFT14 0x40
4216 #define _CRCSHIFT14 0x40
4217 #define _SHIFT15 0x80
4218 #define _CRCSHIFT15 0x80
4220 //==============================================================================
4222 extern __at(0x0797) __sfr CRCXOR
;
4224 //==============================================================================
4227 extern __at(0x0797) __sfr CRCXORL
;
4246 unsigned CRCXOR1
: 1;
4247 unsigned CRCXOR2
: 1;
4248 unsigned CRCXOR3
: 1;
4249 unsigned CRCXOR4
: 1;
4250 unsigned CRCXOR5
: 1;
4251 unsigned CRCXOR6
: 1;
4252 unsigned CRCXOR7
: 1;
4256 extern __at(0x0797) volatile __CRCXORLbits_t CRCXORLbits
;
4259 #define _CRCXOR1 0x02
4261 #define _CRCXOR2 0x04
4263 #define _CRCXOR3 0x08
4265 #define _CRCXOR4 0x10
4267 #define _CRCXOR5 0x20
4269 #define _CRCXOR6 0x40
4271 #define _CRCXOR7 0x80
4273 //==============================================================================
4276 //==============================================================================
4279 extern __at(0x0798) __sfr CRCXORH
;
4297 unsigned CRCXOR8
: 1;
4298 unsigned CRCXOR9
: 1;
4299 unsigned CRCXOR10
: 1;
4300 unsigned CRCXOR11
: 1;
4301 unsigned CRCXOR12
: 1;
4302 unsigned CRCXOR13
: 1;
4303 unsigned CRCXOR14
: 1;
4304 unsigned CRCXOR15
: 1;
4308 extern __at(0x0798) volatile __CRCXORHbits_t CRCXORHbits
;
4311 #define _CRCXOR8 0x01
4313 #define _CRCXOR9 0x02
4315 #define _CRCXOR10 0x04
4317 #define _CRCXOR11 0x08
4319 #define _CRCXOR12 0x10
4321 #define _CRCXOR13 0x20
4323 #define _CRCXOR14 0x40
4325 #define _CRCXOR15 0x80
4327 //==============================================================================
4330 //==============================================================================
4333 extern __at(0x0799) __sfr CRCCON0
;
4340 unsigned SHIFTM
: 1;
4351 unsigned CRCFULL
: 1;
4352 unsigned CRCSHIFTM
: 1;
4355 unsigned CRCACCM
: 1;
4356 unsigned CRCBUSY
: 1;
4362 extern __at(0x0799) volatile __CRCCON0bits_t CRCCON0bits
;
4364 #define _CRCCON0_FULL 0x01
4365 #define _CRCCON0_CRCFULL 0x01
4366 #define _CRCCON0_SHIFTM 0x02
4367 #define _CRCCON0_CRCSHIFTM 0x02
4368 #define _CRCCON0_ACCM 0x10
4369 #define _CRCCON0_CRCACCM 0x10
4370 #define _CRCCON0_BUSY 0x20
4371 #define _CRCCON0_CRCBUSY 0x20
4372 #define _CRCCON0_CRCGO 0x40
4373 #define _CRCCON0_EN 0x80
4374 #define _CRCCON0_CRCEN 0x80
4376 //==============================================================================
4379 //==============================================================================
4382 extern __at(0x079A) __sfr CRCCON1
;
4400 unsigned CRCPLEN0
: 1;
4401 unsigned CRCPLEN1
: 1;
4402 unsigned CRCPLEN2
: 1;
4403 unsigned CRCPLEN3
: 1;
4404 unsigned CRCDLEN0
: 1;
4405 unsigned CRCDLEN1
: 1;
4406 unsigned CRCDLEN2
: 1;
4407 unsigned CRCDLEN3
: 1;
4418 unsigned CRCPLEN
: 4;
4431 unsigned CRCDLEN
: 4;
4435 extern __at(0x079A) volatile __CRCCON1bits_t CRCCON1bits
;
4438 #define _CRCPLEN0 0x01
4440 #define _CRCPLEN1 0x02
4442 #define _CRCPLEN2 0x04
4444 #define _CRCPLEN3 0x08
4446 #define _CRCDLEN0 0x10
4448 #define _CRCDLEN1 0x20
4450 #define _CRCDLEN2 0x40
4452 #define _CRCDLEN3 0x80
4454 //==============================================================================
4456 extern __at(0x0D8C) __sfr SMT1TMR
;
4458 //==============================================================================
4461 extern __at(0x0D8C) __sfr SMT1TMRL
;
4465 unsigned SMT1TMR0
: 1;
4466 unsigned SMT1TMR1
: 1;
4467 unsigned SMT1TMR2
: 1;
4468 unsigned SMT1TMR3
: 1;
4469 unsigned SMT1TMR4
: 1;
4470 unsigned SMT1TMR5
: 1;
4471 unsigned SMT1TMR6
: 1;
4472 unsigned SMT1TMR7
: 1;
4475 extern __at(0x0D8C) volatile __SMT1TMRLbits_t SMT1TMRLbits
;
4477 #define _SMT1TMR0 0x01
4478 #define _SMT1TMR1 0x02
4479 #define _SMT1TMR2 0x04
4480 #define _SMT1TMR3 0x08
4481 #define _SMT1TMR4 0x10
4482 #define _SMT1TMR5 0x20
4483 #define _SMT1TMR6 0x40
4484 #define _SMT1TMR7 0x80
4486 //==============================================================================
4489 //==============================================================================
4492 extern __at(0x0D8D) __sfr SMT1TMRH
;
4496 unsigned SMT1TMR8
: 1;
4497 unsigned SMT1TMR9
: 1;
4498 unsigned SMT1TMR10
: 1;
4499 unsigned SMT1TMR11
: 1;
4500 unsigned SMT1TMR12
: 1;
4501 unsigned SMT1TMR13
: 1;
4502 unsigned SMT1TMR14
: 1;
4503 unsigned SMT1TMR15
: 1;
4506 extern __at(0x0D8D) volatile __SMT1TMRHbits_t SMT1TMRHbits
;
4508 #define _SMT1TMR8 0x01
4509 #define _SMT1TMR9 0x02
4510 #define _SMT1TMR10 0x04
4511 #define _SMT1TMR11 0x08
4512 #define _SMT1TMR12 0x10
4513 #define _SMT1TMR13 0x20
4514 #define _SMT1TMR14 0x40
4515 #define _SMT1TMR15 0x80
4517 //==============================================================================
4520 //==============================================================================
4523 extern __at(0x0D8E) __sfr SMT1TMRU
;
4527 unsigned SMT1TMR16
: 1;
4528 unsigned SMT1TMR17
: 1;
4529 unsigned SMT1TMR18
: 1;
4530 unsigned SMT1TMR19
: 1;
4531 unsigned SMT1TMR20
: 1;
4532 unsigned SMT1TMR21
: 1;
4533 unsigned SMT1TMR22
: 1;
4534 unsigned SMT1TMR23
: 1;
4537 extern __at(0x0D8E) volatile __SMT1TMRUbits_t SMT1TMRUbits
;
4539 #define _SMT1TMR16 0x01
4540 #define _SMT1TMR17 0x02
4541 #define _SMT1TMR18 0x04
4542 #define _SMT1TMR19 0x08
4543 #define _SMT1TMR20 0x10
4544 #define _SMT1TMR21 0x20
4545 #define _SMT1TMR22 0x40
4546 #define _SMT1TMR23 0x80
4548 //==============================================================================
4550 extern __at(0x0D8F) __sfr SMT1CPR
;
4552 //==============================================================================
4555 extern __at(0x0D8F) __sfr SMT1CPRL
;
4559 unsigned SMT1CPR0
: 1;
4560 unsigned SMT1CPR1
: 1;
4561 unsigned SMT1CPR2
: 1;
4562 unsigned SMT1CPR3
: 1;
4563 unsigned SMT1CPR4
: 1;
4564 unsigned SMT1CPR5
: 1;
4565 unsigned SMT1CPR6
: 1;
4566 unsigned SMT1CPR7
: 1;
4569 extern __at(0x0D8F) volatile __SMT1CPRLbits_t SMT1CPRLbits
;
4571 #define _SMT1CPR0 0x01
4572 #define _SMT1CPR1 0x02
4573 #define _SMT1CPR2 0x04
4574 #define _SMT1CPR3 0x08
4575 #define _SMT1CPR4 0x10
4576 #define _SMT1CPR5 0x20
4577 #define _SMT1CPR6 0x40
4578 #define _SMT1CPR7 0x80
4580 //==============================================================================
4583 //==============================================================================
4586 extern __at(0x0D90) __sfr SMT1CPRH
;
4590 unsigned SMT1CPR8
: 1;
4591 unsigned SMT1CPR9
: 1;
4592 unsigned SMT1CPR10
: 1;
4593 unsigned SMT1CPR11
: 1;
4594 unsigned SMT1CPR12
: 1;
4595 unsigned SMT1CPR13
: 1;
4596 unsigned SMT1CPR14
: 1;
4597 unsigned SMT1CPR15
: 1;
4600 extern __at(0x0D90) volatile __SMT1CPRHbits_t SMT1CPRHbits
;
4602 #define _SMT1CPR8 0x01
4603 #define _SMT1CPR9 0x02
4604 #define _SMT1CPR10 0x04
4605 #define _SMT1CPR11 0x08
4606 #define _SMT1CPR12 0x10
4607 #define _SMT1CPR13 0x20
4608 #define _SMT1CPR14 0x40
4609 #define _SMT1CPR15 0x80
4611 //==============================================================================
4614 //==============================================================================
4617 extern __at(0x0D91) __sfr SMT1CPRU
;
4621 unsigned SMT1CPR16
: 1;
4622 unsigned SMT1CPR17
: 1;
4623 unsigned SMT1CPR18
: 1;
4624 unsigned SMT1CPR19
: 1;
4625 unsigned SMT1CPR20
: 1;
4626 unsigned SMT1CPR21
: 1;
4627 unsigned SMT1CPR22
: 1;
4628 unsigned SMT1CPR23
: 1;
4631 extern __at(0x0D91) volatile __SMT1CPRUbits_t SMT1CPRUbits
;
4633 #define _SMT1CPR16 0x01
4634 #define _SMT1CPR17 0x02
4635 #define _SMT1CPR18 0x04
4636 #define _SMT1CPR19 0x08
4637 #define _SMT1CPR20 0x10
4638 #define _SMT1CPR21 0x20
4639 #define _SMT1CPR22 0x40
4640 #define _SMT1CPR23 0x80
4642 //==============================================================================
4644 extern __at(0x0D92) __sfr SMT1CPW
;
4646 //==============================================================================
4649 extern __at(0x0D92) __sfr SMT1CPWL
;
4653 unsigned SMT1CPW0
: 1;
4654 unsigned SMT1CPW1
: 1;
4655 unsigned SMT1CPW2
: 1;
4656 unsigned SMT1CPW3
: 1;
4657 unsigned SMT1CPW4
: 1;
4658 unsigned SMT1CPW5
: 1;
4659 unsigned SMT1CPW6
: 1;
4660 unsigned SMT1CPW7
: 1;
4663 extern __at(0x0D92) volatile __SMT1CPWLbits_t SMT1CPWLbits
;
4665 #define _SMT1CPW0 0x01
4666 #define _SMT1CPW1 0x02
4667 #define _SMT1CPW2 0x04
4668 #define _SMT1CPW3 0x08
4669 #define _SMT1CPW4 0x10
4670 #define _SMT1CPW5 0x20
4671 #define _SMT1CPW6 0x40
4672 #define _SMT1CPW7 0x80
4674 //==============================================================================
4677 //==============================================================================
4680 extern __at(0x0D93) __sfr SMT1CPWH
;
4684 unsigned SMT1CPW8
: 1;
4685 unsigned SMT1CPW9
: 1;
4686 unsigned SMT1CPW10
: 1;
4687 unsigned SMT1CPW11
: 1;
4688 unsigned SMT1CPW12
: 1;
4689 unsigned SMT1CPW13
: 1;
4690 unsigned SMT1CPW14
: 1;
4691 unsigned SMT1CPW15
: 1;
4694 extern __at(0x0D93) volatile __SMT1CPWHbits_t SMT1CPWHbits
;
4696 #define _SMT1CPW8 0x01
4697 #define _SMT1CPW9 0x02
4698 #define _SMT1CPW10 0x04
4699 #define _SMT1CPW11 0x08
4700 #define _SMT1CPW12 0x10
4701 #define _SMT1CPW13 0x20
4702 #define _SMT1CPW14 0x40
4703 #define _SMT1CPW15 0x80
4705 //==============================================================================
4708 //==============================================================================
4711 extern __at(0x0D94) __sfr SMT1CPWU
;
4715 unsigned SMT1CPW16
: 1;
4716 unsigned SMT1CPW17
: 1;
4717 unsigned SMT1CPW18
: 1;
4718 unsigned SMT1CPW19
: 1;
4719 unsigned SMT1CPW20
: 1;
4720 unsigned SMT1CPW21
: 1;
4721 unsigned SMT1CPW22
: 1;
4722 unsigned SMT1CPW23
: 1;
4725 extern __at(0x0D94) volatile __SMT1CPWUbits_t SMT1CPWUbits
;
4727 #define _SMT1CPW16 0x01
4728 #define _SMT1CPW17 0x02
4729 #define _SMT1CPW18 0x04
4730 #define _SMT1CPW19 0x08
4731 #define _SMT1CPW20 0x10
4732 #define _SMT1CPW21 0x20
4733 #define _SMT1CPW22 0x40
4734 #define _SMT1CPW23 0x80
4736 //==============================================================================
4738 extern __at(0x0D95) __sfr SMT1PR
;
4740 //==============================================================================
4743 extern __at(0x0D95) __sfr SMT1PRL
;
4747 unsigned SMT1PR0
: 1;
4748 unsigned SMT1PR1
: 1;
4749 unsigned SMT1PR2
: 1;
4750 unsigned SMT1PR3
: 1;
4751 unsigned SMT1PR4
: 1;
4752 unsigned SMT1PR5
: 1;
4753 unsigned SMT1PR6
: 1;
4754 unsigned SMT1PR7
: 1;
4757 extern __at(0x0D95) volatile __SMT1PRLbits_t SMT1PRLbits
;
4759 #define _SMT1PR0 0x01
4760 #define _SMT1PR1 0x02
4761 #define _SMT1PR2 0x04
4762 #define _SMT1PR3 0x08
4763 #define _SMT1PR4 0x10
4764 #define _SMT1PR5 0x20
4765 #define _SMT1PR6 0x40
4766 #define _SMT1PR7 0x80
4768 //==============================================================================
4771 //==============================================================================
4774 extern __at(0x0D96) __sfr SMT1PRH
;
4778 unsigned SMT1PR8
: 1;
4779 unsigned SMT1PR9
: 1;
4780 unsigned SMT1PR10
: 1;
4781 unsigned SMT1PR11
: 1;
4782 unsigned SMT1PR12
: 1;
4783 unsigned SMT1PR13
: 1;
4784 unsigned SMT1PR14
: 1;
4785 unsigned SMT1PR15
: 1;
4788 extern __at(0x0D96) volatile __SMT1PRHbits_t SMT1PRHbits
;
4790 #define _SMT1PR8 0x01
4791 #define _SMT1PR9 0x02
4792 #define _SMT1PR10 0x04
4793 #define _SMT1PR11 0x08
4794 #define _SMT1PR12 0x10
4795 #define _SMT1PR13 0x20
4796 #define _SMT1PR14 0x40
4797 #define _SMT1PR15 0x80
4799 //==============================================================================
4802 //==============================================================================
4805 extern __at(0x0D97) __sfr SMT1PRU
;
4809 unsigned SMT1PR16
: 1;
4810 unsigned SMT1PR17
: 1;
4811 unsigned SMT1PR18
: 1;
4812 unsigned SMT1PR19
: 1;
4813 unsigned SMT1PR20
: 1;
4814 unsigned SMT1PR21
: 1;
4815 unsigned SMT1PR22
: 1;
4816 unsigned SMT1PR23
: 1;
4819 extern __at(0x0D97) volatile __SMT1PRUbits_t SMT1PRUbits
;
4821 #define _SMT1PR16 0x01
4822 #define _SMT1PR17 0x02
4823 #define _SMT1PR18 0x04
4824 #define _SMT1PR19 0x08
4825 #define _SMT1PR20 0x10
4826 #define _SMT1PR21 0x20
4827 #define _SMT1PR22 0x40
4828 #define _SMT1PR23 0x80
4830 //==============================================================================
4833 //==============================================================================
4836 extern __at(0x0D98) __sfr SMT1CON0
;
4842 unsigned SMT1PS0
: 1;
4843 unsigned SMT1PS1
: 1;
4854 unsigned SMT1PS
: 2;
4859 extern __at(0x0D98) volatile __SMT1CON0bits_t SMT1CON0bits
;
4861 #define _SMT1CON0_SMT1PS0 0x01
4862 #define _SMT1CON0_SMT1PS1 0x02
4863 #define _SMT1CON0_CPOL 0x04
4864 #define _SMT1CON0_SPOL 0x08
4865 #define _SMT1CON0_WPOL 0x10
4866 #define _SMT1CON0_STP 0x20
4867 #define _SMT1CON0_EN 0x80
4869 //==============================================================================
4872 //==============================================================================
4875 extern __at(0x0D99) __sfr SMT1CON1
;
4887 unsigned REPEAT
: 1;
4888 unsigned SMT1GO
: 1;
4893 unsigned SMT1MODE0
: 1;
4894 unsigned SMT1MODE1
: 1;
4895 unsigned SMT1MODE2
: 1;
4896 unsigned SMT1MODE3
: 1;
4899 unsigned SMT1REPEAT
: 1;
4905 unsigned SMT1MODE
: 4;
4916 extern __at(0x0D99) volatile __SMT1CON1bits_t SMT1CON1bits
;
4918 #define _SMT1CON1_MODE0 0x01
4919 #define _SMT1CON1_SMT1MODE0 0x01
4920 #define _SMT1CON1_MODE1 0x02
4921 #define _SMT1CON1_SMT1MODE1 0x02
4922 #define _SMT1CON1_MODE2 0x04
4923 #define _SMT1CON1_SMT1MODE2 0x04
4924 #define _SMT1CON1_MODE3 0x08
4925 #define _SMT1CON1_SMT1MODE3 0x08
4926 #define _SMT1CON1_REPEAT 0x40
4927 #define _SMT1CON1_SMT1REPEAT 0x40
4928 #define _SMT1CON1_SMT1GO 0x80
4930 //==============================================================================
4933 //==============================================================================
4936 extern __at(0x0D9A) __sfr SMT1STAT
;
4954 unsigned SMT1AS
: 1;
4955 unsigned SMT1WS
: 1;
4956 unsigned SMT1TS
: 1;
4959 unsigned SMT1RESET
: 1;
4960 unsigned SMT1CPWUP
: 1;
4961 unsigned SMT1CPRUP
: 1;
4965 extern __at(0x0D9A) volatile __SMT1STATbits_t SMT1STATbits
;
4968 #define _SMT1AS 0x01
4970 #define _SMT1WS 0x02
4972 #define _SMT1TS 0x04
4974 #define _SMT1RESET 0x20
4976 #define _SMT1CPWUP 0x40
4978 #define _SMT1CPRUP 0x80
4980 //==============================================================================
4983 //==============================================================================
4986 extern __at(0x0D9B) __sfr SMT1CLK
;
5004 unsigned SMT1CSEL0
: 1;
5005 unsigned SMT1CSEL1
: 1;
5006 unsigned SMT1CSEL2
: 1;
5022 unsigned SMT1CSEL
: 3;
5027 extern __at(0x0D9B) volatile __SMT1CLKbits_t SMT1CLKbits
;
5030 #define _SMT1CSEL0 0x01
5032 #define _SMT1CSEL1 0x02
5034 #define _SMT1CSEL2 0x04
5036 //==============================================================================
5039 //==============================================================================
5042 extern __at(0x0D9C) __sfr SMT1SIG
;
5060 unsigned SMT1SSEL0
: 1;
5061 unsigned SMT1SSEL1
: 1;
5062 unsigned SMT1SSEL2
: 1;
5072 unsigned SMT1SSEL
: 3;
5083 extern __at(0x0D9C) volatile __SMT1SIGbits_t SMT1SIGbits
;
5086 #define _SMT1SSEL0 0x01
5088 #define _SMT1SSEL1 0x02
5090 #define _SMT1SSEL2 0x04
5092 //==============================================================================
5095 //==============================================================================
5098 extern __at(0x0D9D) __sfr SMT1WIN
;
5116 unsigned SMT1WSEL0
: 1;
5117 unsigned SMT1WSEL1
: 1;
5118 unsigned SMT1WSEL2
: 1;
5119 unsigned SMT1WSEL3
: 1;
5128 unsigned SMT1WSEL
: 4;
5139 extern __at(0x0D9D) volatile __SMT1WINbits_t SMT1WINbits
;
5142 #define _SMT1WSEL0 0x01
5144 #define _SMT1WSEL1 0x02
5146 #define _SMT1WSEL2 0x04
5148 #define _SMT1WSEL3 0x08
5150 //==============================================================================
5152 extern __at(0x0D9E) __sfr SMT2TMR
;
5154 //==============================================================================
5157 extern __at(0x0D9E) __sfr SMT2TMRL
;
5161 unsigned SMT2TMR0
: 1;
5162 unsigned SMT2TMR1
: 1;
5163 unsigned SMT2TMR2
: 1;
5164 unsigned SMT2TMR3
: 1;
5165 unsigned SMT2TMR4
: 1;
5166 unsigned SMT2TMR5
: 1;
5167 unsigned SMT2TMR6
: 1;
5168 unsigned SMT2TMR7
: 1;
5171 extern __at(0x0D9E) volatile __SMT2TMRLbits_t SMT2TMRLbits
;
5173 #define _SMT2TMR0 0x01
5174 #define _SMT2TMR1 0x02
5175 #define _SMT2TMR2 0x04
5176 #define _SMT2TMR3 0x08
5177 #define _SMT2TMR4 0x10
5178 #define _SMT2TMR5 0x20
5179 #define _SMT2TMR6 0x40
5180 #define _SMT2TMR7 0x80
5182 //==============================================================================
5185 //==============================================================================
5188 extern __at(0x0D9F) __sfr SMT2TMRH
;
5192 unsigned SMT2TMR8
: 1;
5193 unsigned SMT2TMR9
: 1;
5194 unsigned SMT2TMR10
: 1;
5195 unsigned SMT2TMR11
: 1;
5196 unsigned SMT2TMR12
: 1;
5197 unsigned SMT2TMR13
: 1;
5198 unsigned SMT2TMR14
: 1;
5199 unsigned SMT2TMR15
: 1;
5202 extern __at(0x0D9F) volatile __SMT2TMRHbits_t SMT2TMRHbits
;
5204 #define _SMT2TMR8 0x01
5205 #define _SMT2TMR9 0x02
5206 #define _SMT2TMR10 0x04
5207 #define _SMT2TMR11 0x08
5208 #define _SMT2TMR12 0x10
5209 #define _SMT2TMR13 0x20
5210 #define _SMT2TMR14 0x40
5211 #define _SMT2TMR15 0x80
5213 //==============================================================================
5216 //==============================================================================
5219 extern __at(0x0DA0) __sfr SMT2TMRU
;
5223 unsigned SMT2TMR16
: 1;
5224 unsigned SMT2TMR17
: 1;
5225 unsigned SMT2TMR18
: 1;
5226 unsigned SMT2TMR19
: 1;
5227 unsigned SMT2TMR20
: 1;
5228 unsigned SMT2TMR21
: 1;
5229 unsigned SMT2TMR22
: 1;
5230 unsigned SMT2TMR23
: 1;
5233 extern __at(0x0DA0) volatile __SMT2TMRUbits_t SMT2TMRUbits
;
5235 #define _SMT2TMR16 0x01
5236 #define _SMT2TMR17 0x02
5237 #define _SMT2TMR18 0x04
5238 #define _SMT2TMR19 0x08
5239 #define _SMT2TMR20 0x10
5240 #define _SMT2TMR21 0x20
5241 #define _SMT2TMR22 0x40
5242 #define _SMT2TMR23 0x80
5244 //==============================================================================
5246 extern __at(0x0DA1) __sfr SMT2CPR
;
5248 //==============================================================================
5251 extern __at(0x0DA1) __sfr SMT2CPRL
;
5255 unsigned SMT2CPR0
: 1;
5256 unsigned SMT2CPR1
: 1;
5257 unsigned SMT2CPR2
: 1;
5258 unsigned SMT2CPR3
: 1;
5259 unsigned SMT2CPR4
: 1;
5260 unsigned SMT2CPR5
: 1;
5261 unsigned SMT2CPR6
: 1;
5262 unsigned SMT2CPR7
: 1;
5265 extern __at(0x0DA1) volatile __SMT2CPRLbits_t SMT2CPRLbits
;
5267 #define _SMT2CPR0 0x01
5268 #define _SMT2CPR1 0x02
5269 #define _SMT2CPR2 0x04
5270 #define _SMT2CPR3 0x08
5271 #define _SMT2CPR4 0x10
5272 #define _SMT2CPR5 0x20
5273 #define _SMT2CPR6 0x40
5274 #define _SMT2CPR7 0x80
5276 //==============================================================================
5279 //==============================================================================
5282 extern __at(0x0DA2) __sfr SMT2CPRH
;
5286 unsigned SMT2CPR8
: 1;
5287 unsigned SMT2CPR9
: 1;
5288 unsigned SMT2CPR10
: 1;
5289 unsigned SMT2CPR11
: 1;
5290 unsigned SMT2CPR12
: 1;
5291 unsigned SMT2CPR13
: 1;
5292 unsigned SMT2CPR14
: 1;
5293 unsigned SMT2CPR15
: 1;
5296 extern __at(0x0DA2) volatile __SMT2CPRHbits_t SMT2CPRHbits
;
5298 #define _SMT2CPR8 0x01
5299 #define _SMT2CPR9 0x02
5300 #define _SMT2CPR10 0x04
5301 #define _SMT2CPR11 0x08
5302 #define _SMT2CPR12 0x10
5303 #define _SMT2CPR13 0x20
5304 #define _SMT2CPR14 0x40
5305 #define _SMT2CPR15 0x80
5307 //==============================================================================
5310 //==============================================================================
5313 extern __at(0x0DA3) __sfr SMT2CPRU
;
5317 unsigned SMT2CPR16
: 1;
5318 unsigned SMT2CPR17
: 1;
5319 unsigned SMT2CPR18
: 1;
5320 unsigned SMT2CPR19
: 1;
5321 unsigned SMT2CPR20
: 1;
5322 unsigned SMT2CPR21
: 1;
5323 unsigned SMT2CPR22
: 1;
5324 unsigned SMT2CPR23
: 1;
5327 extern __at(0x0DA3) volatile __SMT2CPRUbits_t SMT2CPRUbits
;
5329 #define _SMT2CPR16 0x01
5330 #define _SMT2CPR17 0x02
5331 #define _SMT2CPR18 0x04
5332 #define _SMT2CPR19 0x08
5333 #define _SMT2CPR20 0x10
5334 #define _SMT2CPR21 0x20
5335 #define _SMT2CPR22 0x40
5336 #define _SMT2CPR23 0x80
5338 //==============================================================================
5340 extern __at(0x0DA4) __sfr SMT2CPW
;
5342 //==============================================================================
5345 extern __at(0x0DA4) __sfr SMT2CPWL
;
5349 unsigned SMT2CPW0
: 1;
5350 unsigned SMT2CPW1
: 1;
5351 unsigned SMT2CPW2
: 1;
5352 unsigned SMT2CPW3
: 1;
5353 unsigned SMT2CPW4
: 1;
5354 unsigned SMT2CPW5
: 1;
5355 unsigned SMT2CPW6
: 1;
5356 unsigned SMT2CPW7
: 1;
5359 extern __at(0x0DA4) volatile __SMT2CPWLbits_t SMT2CPWLbits
;
5361 #define _SMT2CPW0 0x01
5362 #define _SMT2CPW1 0x02
5363 #define _SMT2CPW2 0x04
5364 #define _SMT2CPW3 0x08
5365 #define _SMT2CPW4 0x10
5366 #define _SMT2CPW5 0x20
5367 #define _SMT2CPW6 0x40
5368 #define _SMT2CPW7 0x80
5370 //==============================================================================
5373 //==============================================================================
5376 extern __at(0x0DA5) __sfr SMT2CPWH
;
5380 unsigned SMT2CPW8
: 1;
5381 unsigned SMT2CPW9
: 1;
5382 unsigned SMT2CPW10
: 1;
5383 unsigned SMT2CPW11
: 1;
5384 unsigned SMT2CPW12
: 1;
5385 unsigned SMT2CPW13
: 1;
5386 unsigned SMT2CPW14
: 1;
5387 unsigned SMT2CPW15
: 1;
5390 extern __at(0x0DA5) volatile __SMT2CPWHbits_t SMT2CPWHbits
;
5392 #define _SMT2CPW8 0x01
5393 #define _SMT2CPW9 0x02
5394 #define _SMT2CPW10 0x04
5395 #define _SMT2CPW11 0x08
5396 #define _SMT2CPW12 0x10
5397 #define _SMT2CPW13 0x20
5398 #define _SMT2CPW14 0x40
5399 #define _SMT2CPW15 0x80
5401 //==============================================================================
5404 //==============================================================================
5407 extern __at(0x0DA6) __sfr SMT2CPWU
;
5411 unsigned SMT2CPW16
: 1;
5412 unsigned SMT2CPW17
: 1;
5413 unsigned SMT2CPW18
: 1;
5414 unsigned SMT2CPW19
: 1;
5415 unsigned SMT2CPW20
: 1;
5416 unsigned SMT2CPW21
: 1;
5417 unsigned SMT2CPW22
: 1;
5418 unsigned SMT2CPW23
: 1;
5421 extern __at(0x0DA6) volatile __SMT2CPWUbits_t SMT2CPWUbits
;
5423 #define _SMT2CPW16 0x01
5424 #define _SMT2CPW17 0x02
5425 #define _SMT2CPW18 0x04
5426 #define _SMT2CPW19 0x08
5427 #define _SMT2CPW20 0x10
5428 #define _SMT2CPW21 0x20
5429 #define _SMT2CPW22 0x40
5430 #define _SMT2CPW23 0x80
5432 //==============================================================================
5434 extern __at(0x0DA7) __sfr SMT2PR
;
5436 //==============================================================================
5439 extern __at(0x0DA7) __sfr SMT2PRL
;
5443 unsigned SMT2PR0
: 1;
5444 unsigned SMT2PR1
: 1;
5445 unsigned SMT2PR2
: 1;
5446 unsigned SMT2PR3
: 1;
5447 unsigned SMT2PR4
: 1;
5448 unsigned SMT2PR5
: 1;
5449 unsigned SMT2PR6
: 1;
5450 unsigned SMT2PR7
: 1;
5453 extern __at(0x0DA7) volatile __SMT2PRLbits_t SMT2PRLbits
;
5455 #define _SMT2PR0 0x01
5456 #define _SMT2PR1 0x02
5457 #define _SMT2PR2 0x04
5458 #define _SMT2PR3 0x08
5459 #define _SMT2PR4 0x10
5460 #define _SMT2PR5 0x20
5461 #define _SMT2PR6 0x40
5462 #define _SMT2PR7 0x80
5464 //==============================================================================
5467 //==============================================================================
5470 extern __at(0x0DA8) __sfr SMT2PRH
;
5474 unsigned SMT2PR8
: 1;
5475 unsigned SMT2PR9
: 1;
5476 unsigned SMT2PR10
: 1;
5477 unsigned SMT2PR11
: 1;
5478 unsigned SMT2PR12
: 1;
5479 unsigned SMT2PR13
: 1;
5480 unsigned SMT2PR14
: 1;
5481 unsigned SMT2PR15
: 1;
5484 extern __at(0x0DA8) volatile __SMT2PRHbits_t SMT2PRHbits
;
5486 #define _SMT2PR8 0x01
5487 #define _SMT2PR9 0x02
5488 #define _SMT2PR10 0x04
5489 #define _SMT2PR11 0x08
5490 #define _SMT2PR12 0x10
5491 #define _SMT2PR13 0x20
5492 #define _SMT2PR14 0x40
5493 #define _SMT2PR15 0x80
5495 //==============================================================================
5498 //==============================================================================
5501 extern __at(0x0DA9) __sfr SMT2PRU
;
5505 unsigned SMT2PR16
: 1;
5506 unsigned SMT2PR17
: 1;
5507 unsigned SMT2PR18
: 1;
5508 unsigned SMT2PR19
: 1;
5509 unsigned SMT2PR20
: 1;
5510 unsigned SMT2PR21
: 1;
5511 unsigned SMT2PR22
: 1;
5512 unsigned SMT2PR23
: 1;
5515 extern __at(0x0DA9) volatile __SMT2PRUbits_t SMT2PRUbits
;
5517 #define _SMT2PR16 0x01
5518 #define _SMT2PR17 0x02
5519 #define _SMT2PR18 0x04
5520 #define _SMT2PR19 0x08
5521 #define _SMT2PR20 0x10
5522 #define _SMT2PR21 0x20
5523 #define _SMT2PR22 0x40
5524 #define _SMT2PR23 0x80
5526 //==============================================================================
5529 //==============================================================================
5532 extern __at(0x0DAA) __sfr SMT2CON0
;
5538 unsigned SMT2PS0
: 1;
5539 unsigned SMT2PS1
: 1;
5550 unsigned SMT2PS
: 2;
5555 extern __at(0x0DAA) volatile __SMT2CON0bits_t SMT2CON0bits
;
5557 #define _SMT2CON0_SMT2PS0 0x01
5558 #define _SMT2CON0_SMT2PS1 0x02
5559 #define _SMT2CON0_CPOL 0x04
5560 #define _SMT2CON0_SPOL 0x08
5561 #define _SMT2CON0_WPOL 0x10
5562 #define _SMT2CON0_STP 0x20
5563 #define _SMT2CON0_EN 0x80
5565 //==============================================================================
5568 //==============================================================================
5571 extern __at(0x0DAB) __sfr SMT2CON1
;
5583 unsigned REPEAT
: 1;
5584 unsigned SMT2GO
: 1;
5589 unsigned SMT2MODE0
: 1;
5590 unsigned SMT2MODE1
: 1;
5591 unsigned SMT2MODE2
: 1;
5592 unsigned SMT2MODE3
: 1;
5595 unsigned SMT2REPEAT
: 1;
5607 unsigned SMT2MODE
: 4;
5612 extern __at(0x0DAB) volatile __SMT2CON1bits_t SMT2CON1bits
;
5614 #define _SMT2CON1_MODE0 0x01
5615 #define _SMT2CON1_SMT2MODE0 0x01
5616 #define _SMT2CON1_MODE1 0x02
5617 #define _SMT2CON1_SMT2MODE1 0x02
5618 #define _SMT2CON1_MODE2 0x04
5619 #define _SMT2CON1_SMT2MODE2 0x04
5620 #define _SMT2CON1_MODE3 0x08
5621 #define _SMT2CON1_SMT2MODE3 0x08
5622 #define _SMT2CON1_REPEAT 0x40
5623 #define _SMT2CON1_SMT2REPEAT 0x40
5624 #define _SMT2CON1_SMT2GO 0x80
5626 //==============================================================================
5629 //==============================================================================
5632 extern __at(0x0DAC) __sfr SMT2STAT
;
5650 unsigned SMT2AS
: 1;
5651 unsigned SMT2WS
: 1;
5652 unsigned SMT2TS
: 1;
5655 unsigned SMT2RESET
: 1;
5656 unsigned SMT2CPWUP
: 1;
5657 unsigned SMT2CPRUP
: 1;
5661 extern __at(0x0DAC) volatile __SMT2STATbits_t SMT2STATbits
;
5663 #define _SMT2STAT_AS 0x01
5664 #define _SMT2STAT_SMT2AS 0x01
5665 #define _SMT2STAT_WS 0x02
5666 #define _SMT2STAT_SMT2WS 0x02
5667 #define _SMT2STAT_TS 0x04
5668 #define _SMT2STAT_SMT2TS 0x04
5669 #define _SMT2STAT_RST 0x20
5670 #define _SMT2STAT_SMT2RESET 0x20
5671 #define _SMT2STAT_CPWUP 0x40
5672 #define _SMT2STAT_SMT2CPWUP 0x40
5673 #define _SMT2STAT_CPRUP 0x80
5674 #define _SMT2STAT_SMT2CPRUP 0x80
5676 //==============================================================================
5679 //==============================================================================
5682 extern __at(0x0DAD) __sfr SMT2CLK
;
5700 unsigned SMT2CSEL0
: 1;
5701 unsigned SMT2CSEL1
: 1;
5702 unsigned SMT2CSEL2
: 1;
5703 unsigned SMT2CSEL3
: 1;
5704 unsigned SMT2CSEL4
: 1;
5705 unsigned SMT2CSEL5
: 1;
5706 unsigned SMT2CSEL6
: 1;
5707 unsigned SMT2CSEL7
: 1;
5711 extern __at(0x0DAD) volatile __SMT2CLKbits_t SMT2CLKbits
;
5713 #define _SMT2CLK_CSEL0 0x01
5714 #define _SMT2CLK_SMT2CSEL0 0x01
5715 #define _SMT2CLK_CSEL1 0x02
5716 #define _SMT2CLK_SMT2CSEL1 0x02
5717 #define _SMT2CLK_CSEL2 0x04
5718 #define _SMT2CLK_SMT2CSEL2 0x04
5719 #define _SMT2CLK_CSEL3 0x08
5720 #define _SMT2CLK_SMT2CSEL3 0x08
5721 #define _SMT2CLK_CSEL4 0x10
5722 #define _SMT2CLK_SMT2CSEL4 0x10
5723 #define _SMT2CLK_CSEL5 0x20
5724 #define _SMT2CLK_SMT2CSEL5 0x20
5725 #define _SMT2CLK_CSEL6 0x40
5726 #define _SMT2CLK_SMT2CSEL6 0x40
5727 #define _SMT2CLK_CSEL7 0x80
5728 #define _SMT2CLK_SMT2CSEL7 0x80
5730 //==============================================================================
5733 //==============================================================================
5736 extern __at(0x0DAE) __sfr SMT2SIG
;
5754 unsigned SMT2SSEL0
: 1;
5755 unsigned SMT2SSEL1
: 1;
5756 unsigned SMT2SSEL2
: 1;
5757 unsigned SMT2SSEL3
: 1;
5758 unsigned SMT2SSEL4
: 1;
5759 unsigned SMT2SSEL5
: 1;
5760 unsigned SMT2SSEL6
: 1;
5761 unsigned SMT2SSEL7
: 1;
5765 extern __at(0x0DAE) volatile __SMT2SIGbits_t SMT2SIGbits
;
5767 #define _SMT2SIG_SSEL0 0x01
5768 #define _SMT2SIG_SMT2SSEL0 0x01
5769 #define _SMT2SIG_SSEL1 0x02
5770 #define _SMT2SIG_SMT2SSEL1 0x02
5771 #define _SMT2SIG_SSEL2 0x04
5772 #define _SMT2SIG_SMT2SSEL2 0x04
5773 #define _SMT2SIG_SSEL3 0x08
5774 #define _SMT2SIG_SMT2SSEL3 0x08
5775 #define _SMT2SIG_SSEL4 0x10
5776 #define _SMT2SIG_SMT2SSEL4 0x10
5777 #define _SMT2SIG_SSEL5 0x20
5778 #define _SMT2SIG_SMT2SSEL5 0x20
5779 #define _SMT2SIG_SSEL6 0x40
5780 #define _SMT2SIG_SMT2SSEL6 0x40
5781 #define _SMT2SIG_SSEL7 0x80
5782 #define _SMT2SIG_SMT2SSEL7 0x80
5784 //==============================================================================
5787 //==============================================================================
5790 extern __at(0x0DAF) __sfr SMT2WIN
;
5808 unsigned SMT2WSEL0
: 1;
5809 unsigned SMT2WSEL1
: 1;
5810 unsigned SMT2WSEL2
: 1;
5811 unsigned SMT2WSEL3
: 1;
5812 unsigned SMT2WSEL4
: 1;
5813 unsigned SMT2WSEL5
: 1;
5814 unsigned SMT2WSEL6
: 1;
5815 unsigned SMT2WSEL7
: 1;
5819 extern __at(0x0DAF) volatile __SMT2WINbits_t SMT2WINbits
;
5821 #define _SMT2WIN_WSEL0 0x01
5822 #define _SMT2WIN_SMT2WSEL0 0x01
5823 #define _SMT2WIN_WSEL1 0x02
5824 #define _SMT2WIN_SMT2WSEL1 0x02
5825 #define _SMT2WIN_WSEL2 0x04
5826 #define _SMT2WIN_SMT2WSEL2 0x04
5827 #define _SMT2WIN_WSEL3 0x08
5828 #define _SMT2WIN_SMT2WSEL3 0x08
5829 #define _SMT2WIN_WSEL4 0x10
5830 #define _SMT2WIN_SMT2WSEL4 0x10
5831 #define _SMT2WIN_WSEL5 0x20
5832 #define _SMT2WIN_SMT2WSEL5 0x20
5833 #define _SMT2WIN_WSEL6 0x40
5834 #define _SMT2WIN_SMT2WSEL6 0x40
5835 #define _SMT2WIN_WSEL7 0x80
5836 #define _SMT2WIN_SMT2WSEL7 0x80
5838 //==============================================================================
5841 //==============================================================================
5844 extern __at(0x0FE4) __sfr STATUS_SHAD
;
5848 unsigned C_SHAD
: 1;
5849 unsigned DC_SHAD
: 1;
5850 unsigned Z_SHAD
: 1;
5856 } __STATUS_SHADbits_t
;
5858 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
5860 #define _C_SHAD 0x01
5861 #define _DC_SHAD 0x02
5862 #define _Z_SHAD 0x04
5864 //==============================================================================
5866 extern __at(0x0FE5) __sfr WREG_SHAD
;
5867 extern __at(0x0FE6) __sfr BSR_SHAD
;
5868 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
5869 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
5870 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
5871 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
5872 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
5873 extern __at(0x0FED) __sfr STKPTR
;
5874 extern __at(0x0FEE) __sfr TOSL
;
5875 extern __at(0x0FEF) __sfr TOSH
;
5877 //==============================================================================
5879 // Configuration Bits
5881 //==============================================================================
5883 #define _CONFIG1 0x8007
5884 #define _CONFIG2 0x8008
5885 #define _CONFIG3 0x8009
5887 //----------------------------- CONFIG1 Options -------------------------------
5889 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
5890 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
5891 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
5892 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
5893 #define _PWRTE_ON 0x3FDF // PWRT enabled.
5894 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
5895 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
5896 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
5897 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
5898 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
5899 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
5900 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
5901 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
5902 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
5903 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
5904 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
5906 //----------------------------- CONFIG2 Options -------------------------------
5908 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
5909 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
5910 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
5911 #define _WRT_OFF 0x3FFF // Write protection off.
5912 #define _ZCD_ON 0x3F7F // ZCD always enabled.
5913 #define _ZCD_OFF 0x3FFF // ZCD disable. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON.
5914 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
5915 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
5916 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
5917 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
5918 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
5919 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
5920 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
5921 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
5922 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
5923 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
5924 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
5925 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
5927 //----------------------------- CONFIG3 Options -------------------------------
5929 #define _WDTCPS_WDTCPS0 0x3FE0 // 1:32 (1 ms period).
5930 #define _WDTCPS_WDTCPS1 0x3FE1 // 1:64 (2 ms period).
5931 #define _WDTCPS_WDTCPS2 0x3FE2 // 1:128 (4 ms period).
5932 #define _WDTCPS_WDTCPS3 0x3FE3 // 1:256 (8 ms period).
5933 #define _WDTCPS_WDTCPS4 0x3FE4 // 1:512 (16 ms period).
5934 #define _WDTCPS_WDTCPS5 0x3FE5 // 1:1024 (32 ms period).
5935 #define _WDTCPS_WDTCPS6 0x3FE6 // 1:2048 (64 ms period).
5936 #define _WDTCPS_WDTCPS7 0x3FE7 // 1:4096 (128 ms period).
5937 #define _WDTCPS_WDTCPS8 0x3FE8 // 1:8192 (256 ms period).
5938 #define _WDTCPS_WDTCPS9 0x3FE9 // 1:16384 (512 ms period).
5939 #define _WDTCPS_WDTCPSA 0x3FEA // 1:32768 (1 s period).
5940 #define _WDTCPS_WDTCPSB 0x3FEB // 1:65536 (2 s period).
5941 #define _WDTCPS_WDTCPSC 0x3FEC // 1:131072 (4 s period).
5942 #define _WDTCPS_WDTCPSD 0x3FED // 1:262144 (8 s period).
5943 #define _WDTCPS_WDTCPSE 0x3FEE // 1:524299 (16 s period).
5944 #define _WDTCPS_WDTCPSF 0x3FEF // 1:1048576 (32 s period).
5945 #define _WDTCPS_WDTCPS10 0x3FF0 // 1:2097152 (64 s period).
5946 #define _WDTCPS_WDTCPS11 0x3FF1 // 1:4194304 (128 s period).
5947 #define _WDTCPS_WDTCPS12 0x3FF2 // 1:8388608 (256 s period).
5948 #define _WDTCPS_WDTCPS1F 0x3FFF // Software Control (WDTPS).
5949 #define _WDTE_OFF 0x3F9F // WDT disabled.
5950 #define _WDTE_SWDTEN 0x3FBF // WDT controlled by the SWDTEN bit in the WDTCON register.
5951 #define _WDTE_NSLEEP 0x3FDF // WDT enabled while running and disabled in Sleep.
5952 #define _WDTE_ON 0x3FFF // WDT enabled.
5953 #define _WDTCWS_WDTCWS125 0x38FF // 12.5 percent window open time.
5954 #define _WDTCWS_WDTCWS25 0x39FF // 25 percent window open time.
5955 #define _WDTCWS_WDTCWS375 0x3AFF // 37.5 percent window open time.
5956 #define _WDTCWS_WDTCWS50 0x3BFF // 50 percent window open time.
5957 #define _WDTCWS_WDTCWS625 0x3CFF // 62.5 percent window open time.
5958 #define _WDTCWS_WDTCWS75 0x3DFF // 75 percent window open time.
5959 #define _WDTCWS_WDTCWS100 0x3EFF // 100 percent window open time (Legacy WDT).
5960 #define _WDTCWS_WDTCWSSW 0x3FFF // Software WDT window size control (WDTWS bits).
5961 #define _WDTCCS_LFINTOSC 0x07FF // 31.0 kHz LFINTOSC.
5962 #define _WDTCCS_MFINTOSC 0x0FFF // 31.0 kHz LFINTOSC.
5963 #define _WDTCCS_SWC 0x3FFF // Software control, controlled by WDTCS bits.
5965 //==============================================================================
5967 #define _DEVID1 0x8006
5969 #define _IDLOC0 0x8000
5970 #define _IDLOC1 0x8001
5971 #define _IDLOC2 0x8002
5972 #define _IDLOC3 0x8003
5974 //==============================================================================
5976 #ifndef NO_BIT_DEFINES
5978 #define ADON ADCON0bits.ADON // bit 0
5979 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
5980 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
5981 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
5982 #define CHS0 ADCON0bits.CHS0 // bit 2
5983 #define CHS1 ADCON0bits.CHS1 // bit 3
5984 #define CHS2 ADCON0bits.CHS2 // bit 4
5985 #define CHS3 ADCON0bits.CHS3 // bit 5
5986 #define CHS4 ADCON0bits.CHS4 // bit 6
5988 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
5989 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
5990 #define ADCS0 ADCON1bits.ADCS0 // bit 4
5991 #define ADCS1 ADCON1bits.ADCS1 // bit 5
5992 #define ADCS2 ADCON1bits.ADCS2 // bit 6
5993 #define ADFM ADCON1bits.ADFM // bit 7
5995 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
5996 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
5997 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
5998 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
6000 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6001 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6002 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6003 #define ANSA4 ANSELAbits.ANSA4 // bit 4
6005 #define CCP1SEL APFCONbits.CCP1SEL // bit 0
6006 #define T1GSEL APFCONbits.T1GSEL // bit 3
6007 #define CWGBSEL APFCONbits.CWGBSEL // bit 5
6008 #define CWGASEL APFCONbits.CWGASEL // bit 6
6010 #define BORRDY BORCONbits.BORRDY // bit 0
6011 #define BORFS BORCONbits.BORFS // bit 6
6012 #define SBOREN BORCONbits.SBOREN // bit 7
6014 #define BSR0 BSRbits.BSR0 // bit 0
6015 #define BSR1 BSRbits.BSR1 // bit 1
6016 #define BSR2 BSRbits.BSR2 // bit 2
6017 #define BSR3 BSRbits.BSR3 // bit 3
6018 #define BSR4 BSRbits.BSR4 // bit 4
6020 #define CTS0 CCP1CAPbits.CTS0 // bit 0, shadows bit in CCP1CAPbits
6021 #define CCP1CTS0 CCP1CAPbits.CCP1CTS0 // bit 0, shadows bit in CCP1CAPbits
6022 #define CTS1 CCP1CAPbits.CTS1 // bit 1, shadows bit in CCP1CAPbits
6023 #define CCP1CTS1 CCP1CAPbits.CCP1CTS1 // bit 1, shadows bit in CCP1CAPbits
6025 #define MODE0 CCP1CONbits.MODE0 // bit 0, shadows bit in CCP1CONbits
6026 #define CCP1MODE0 CCP1CONbits.CCP1MODE0 // bit 0, shadows bit in CCP1CONbits
6027 #define MODE1 CCP1CONbits.MODE1 // bit 1, shadows bit in CCP1CONbits
6028 #define CCP1MODE1 CCP1CONbits.CCP1MODE1 // bit 1, shadows bit in CCP1CONbits
6029 #define MODE2 CCP1CONbits.MODE2 // bit 2, shadows bit in CCP1CONbits
6030 #define CCP1MODE2 CCP1CONbits.CCP1MODE2 // bit 2, shadows bit in CCP1CONbits
6031 #define MODE3 CCP1CONbits.MODE3 // bit 3, shadows bit in CCP1CONbits
6032 #define CCP1MODE3 CCP1CONbits.CCP1MODE3 // bit 3, shadows bit in CCP1CONbits
6033 #define FMT CCP1CONbits.FMT // bit 4, shadows bit in CCP1CONbits
6034 #define CCP1FMT CCP1CONbits.CCP1FMT // bit 4, shadows bit in CCP1CONbits
6035 #define OUT CCP1CONbits.OUT // bit 5, shadows bit in CCP1CONbits
6036 #define CCP1OUT CCP1CONbits.CCP1OUT // bit 5, shadows bit in CCP1CONbits
6037 #define OE CCP1CONbits.OE // bit 6, shadows bit in CCP1CONbits
6038 #define CCP1OE CCP1CONbits.CCP1OE // bit 6, shadows bit in CCP1CONbits
6039 #define EN CCP1CONbits.EN // bit 7, shadows bit in CCP1CONbits
6040 #define CCP1EN CCP1CONbits.CCP1EN // bit 7, shadows bit in CCP1CONbits
6042 #define CCP1TSEL0 CCPTMRSbits.CCP1TSEL0 // bit 0
6043 #define CCP1TSEL1 CCPTMRSbits.CCP1TSEL1 // bit 1
6044 #define CCP2TSEL0 CCPTMRSbits.CCP2TSEL0 // bit 2
6045 #define CCP2TSEL1 CCPTMRSbits.CCP2TSEL1 // bit 3
6047 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6048 #define C1HYS CM1CON0bits.C1HYS // bit 1
6049 #define C1SP CM1CON0bits.C1SP // bit 2
6050 #define C1POL CM1CON0bits.C1POL // bit 4
6051 #define C1OE CM1CON0bits.C1OE // bit 5
6052 #define C1OUT CM1CON0bits.C1OUT // bit 6
6053 #define C1ON CM1CON0bits.C1ON // bit 7
6055 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6056 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6057 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
6058 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
6059 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
6060 #define C1INTN CM1CON1bits.C1INTN // bit 6
6061 #define C1INTP CM1CON1bits.C1INTP // bit 7
6063 #define MC1OUT CMOUTbits.MC1OUT // bit 0
6065 #define ACC8 CRCACCHbits.ACC8 // bit 0, shadows bit in CRCACCHbits
6066 #define CRCACC8 CRCACCHbits.CRCACC8 // bit 0, shadows bit in CRCACCHbits
6067 #define ACC9 CRCACCHbits.ACC9 // bit 1, shadows bit in CRCACCHbits
6068 #define CRCACC9 CRCACCHbits.CRCACC9 // bit 1, shadows bit in CRCACCHbits
6069 #define ACC10 CRCACCHbits.ACC10 // bit 2, shadows bit in CRCACCHbits
6070 #define CRCACC10 CRCACCHbits.CRCACC10 // bit 2, shadows bit in CRCACCHbits
6071 #define ACC11 CRCACCHbits.ACC11 // bit 3, shadows bit in CRCACCHbits
6072 #define CRCACC11 CRCACCHbits.CRCACC11 // bit 3, shadows bit in CRCACCHbits
6073 #define ACC12 CRCACCHbits.ACC12 // bit 4, shadows bit in CRCACCHbits
6074 #define CRCACC12 CRCACCHbits.CRCACC12 // bit 4, shadows bit in CRCACCHbits
6075 #define ACC13 CRCACCHbits.ACC13 // bit 5, shadows bit in CRCACCHbits
6076 #define CRCACC13 CRCACCHbits.CRCACC13 // bit 5, shadows bit in CRCACCHbits
6077 #define ACC14 CRCACCHbits.ACC14 // bit 6, shadows bit in CRCACCHbits
6078 #define CRCACC14 CRCACCHbits.CRCACC14 // bit 6, shadows bit in CRCACCHbits
6079 #define ACC15 CRCACCHbits.ACC15 // bit 7, shadows bit in CRCACCHbits
6080 #define CRCACC15 CRCACCHbits.CRCACC15 // bit 7, shadows bit in CRCACCHbits
6082 #define ACC0 CRCACCLbits.ACC0 // bit 0, shadows bit in CRCACCLbits
6083 #define CRCACC0 CRCACCLbits.CRCACC0 // bit 0, shadows bit in CRCACCLbits
6084 #define ACC1 CRCACCLbits.ACC1 // bit 1, shadows bit in CRCACCLbits
6085 #define CRCACC1 CRCACCLbits.CRCACC1 // bit 1, shadows bit in CRCACCLbits
6086 #define ACC2 CRCACCLbits.ACC2 // bit 2, shadows bit in CRCACCLbits
6087 #define CRCACC2 CRCACCLbits.CRCACC2 // bit 2, shadows bit in CRCACCLbits
6088 #define ACC3 CRCACCLbits.ACC3 // bit 3, shadows bit in CRCACCLbits
6089 #define CRCACC3 CRCACCLbits.CRCACC3 // bit 3, shadows bit in CRCACCLbits
6090 #define ACC4 CRCACCLbits.ACC4 // bit 4, shadows bit in CRCACCLbits
6091 #define CRCACC4 CRCACCLbits.CRCACC4 // bit 4, shadows bit in CRCACCLbits
6092 #define ACC5 CRCACCLbits.ACC5 // bit 5, shadows bit in CRCACCLbits
6093 #define CRCACC5 CRCACCLbits.CRCACC5 // bit 5, shadows bit in CRCACCLbits
6094 #define ACC6 CRCACCLbits.ACC6 // bit 6, shadows bit in CRCACCLbits
6095 #define CRCACC6 CRCACCLbits.CRCACC6 // bit 6, shadows bit in CRCACCLbits
6096 #define ACC7 CRCACCLbits.ACC7 // bit 7, shadows bit in CRCACCLbits
6097 #define CRCACC7 CRCACCLbits.CRCACC7 // bit 7, shadows bit in CRCACCLbits
6099 #define PLEN0 CRCCON1bits.PLEN0 // bit 0, shadows bit in CRCCON1bits
6100 #define CRCPLEN0 CRCCON1bits.CRCPLEN0 // bit 0, shadows bit in CRCCON1bits
6101 #define PLEN1 CRCCON1bits.PLEN1 // bit 1, shadows bit in CRCCON1bits
6102 #define CRCPLEN1 CRCCON1bits.CRCPLEN1 // bit 1, shadows bit in CRCCON1bits
6103 #define PLEN2 CRCCON1bits.PLEN2 // bit 2, shadows bit in CRCCON1bits
6104 #define CRCPLEN2 CRCCON1bits.CRCPLEN2 // bit 2, shadows bit in CRCCON1bits
6105 #define PLEN3 CRCCON1bits.PLEN3 // bit 3, shadows bit in CRCCON1bits
6106 #define CRCPLEN3 CRCCON1bits.CRCPLEN3 // bit 3, shadows bit in CRCCON1bits
6107 #define DLEN0 CRCCON1bits.DLEN0 // bit 4, shadows bit in CRCCON1bits
6108 #define CRCDLEN0 CRCCON1bits.CRCDLEN0 // bit 4, shadows bit in CRCCON1bits
6109 #define DLEN1 CRCCON1bits.DLEN1 // bit 5, shadows bit in CRCCON1bits
6110 #define CRCDLEN1 CRCCON1bits.CRCDLEN1 // bit 5, shadows bit in CRCCON1bits
6111 #define DLEN2 CRCCON1bits.DLEN2 // bit 6, shadows bit in CRCCON1bits
6112 #define CRCDLEN2 CRCCON1bits.CRCDLEN2 // bit 6, shadows bit in CRCCON1bits
6113 #define DLEN3 CRCCON1bits.DLEN3 // bit 7, shadows bit in CRCCON1bits
6114 #define CRCDLEN3 CRCCON1bits.CRCDLEN3 // bit 7, shadows bit in CRCCON1bits
6116 #define DAT8 CRCDATHbits.DAT8 // bit 0, shadows bit in CRCDATHbits
6117 #define CRCDAT8 CRCDATHbits.CRCDAT8 // bit 0, shadows bit in CRCDATHbits
6118 #define DAT9 CRCDATHbits.DAT9 // bit 1, shadows bit in CRCDATHbits
6119 #define CRCDAT9 CRCDATHbits.CRCDAT9 // bit 1, shadows bit in CRCDATHbits
6120 #define DAT10 CRCDATHbits.DAT10 // bit 2, shadows bit in CRCDATHbits
6121 #define CRCDAT10 CRCDATHbits.CRCDAT10 // bit 2, shadows bit in CRCDATHbits
6122 #define DAT11 CRCDATHbits.DAT11 // bit 3, shadows bit in CRCDATHbits
6123 #define CRCDAT11 CRCDATHbits.CRCDAT11 // bit 3, shadows bit in CRCDATHbits
6124 #define DAT12 CRCDATHbits.DAT12 // bit 4, shadows bit in CRCDATHbits
6125 #define CRCDAT12 CRCDATHbits.CRCDAT12 // bit 4, shadows bit in CRCDATHbits
6126 #define DAT13 CRCDATHbits.DAT13 // bit 5, shadows bit in CRCDATHbits
6127 #define CRCDAT13 CRCDATHbits.CRCDAT13 // bit 5, shadows bit in CRCDATHbits
6128 #define DAT14 CRCDATHbits.DAT14 // bit 6, shadows bit in CRCDATHbits
6129 #define CRCDAT14 CRCDATHbits.CRCDAT14 // bit 6, shadows bit in CRCDATHbits
6130 #define DAT15 CRCDATHbits.DAT15 // bit 7, shadows bit in CRCDATHbits
6131 #define CRCDAT15 CRCDATHbits.CRCDAT15 // bit 7, shadows bit in CRCDATHbits
6133 #define DAT0 CRCDATLbits.DAT0 // bit 0, shadows bit in CRCDATLbits
6134 #define CRCDAT0 CRCDATLbits.CRCDAT0 // bit 0, shadows bit in CRCDATLbits
6135 #define DAT1 CRCDATLbits.DAT1 // bit 1, shadows bit in CRCDATLbits
6136 #define CRCDAT1 CRCDATLbits.CRCDAT1 // bit 1, shadows bit in CRCDATLbits
6137 #define DAT2 CRCDATLbits.DAT2 // bit 2, shadows bit in CRCDATLbits
6138 #define CRCDAT2 CRCDATLbits.CRCDAT2 // bit 2, shadows bit in CRCDATLbits
6139 #define DAT3 CRCDATLbits.DAT3 // bit 3, shadows bit in CRCDATLbits
6140 #define CRCDAT3 CRCDATLbits.CRCDAT3 // bit 3, shadows bit in CRCDATLbits
6141 #define DAT4 CRCDATLbits.DAT4 // bit 4, shadows bit in CRCDATLbits
6142 #define CRCDAT4 CRCDATLbits.CRCDAT4 // bit 4, shadows bit in CRCDATLbits
6143 #define DAT5 CRCDATLbits.DAT5 // bit 5, shadows bit in CRCDATLbits
6144 #define CRCDAT5 CRCDATLbits.CRCDAT5 // bit 5, shadows bit in CRCDATLbits
6145 #define DAT6 CRCDATLbits.DAT6 // bit 6, shadows bit in CRCDATLbits
6146 #define CRCDAT6 CRCDATLbits.CRCDAT6 // bit 6, shadows bit in CRCDATLbits
6147 #define DAT7 CRCDATLbits.DAT7 // bit 7, shadows bit in CRCDATLbits
6148 #define CRDCDAT7 CRCDATLbits.CRDCDAT7 // bit 7, shadows bit in CRCDATLbits
6150 #define SHIFT8 CRCSHIFTHbits.SHIFT8 // bit 0, shadows bit in CRCSHIFTHbits
6151 #define CRCSHIFT8 CRCSHIFTHbits.CRCSHIFT8 // bit 0, shadows bit in CRCSHIFTHbits
6152 #define SHIFT9 CRCSHIFTHbits.SHIFT9 // bit 1, shadows bit in CRCSHIFTHbits
6153 #define CRCSHIFT9 CRCSHIFTHbits.CRCSHIFT9 // bit 1, shadows bit in CRCSHIFTHbits
6154 #define SHIFT10 CRCSHIFTHbits.SHIFT10 // bit 2, shadows bit in CRCSHIFTHbits
6155 #define CRCSHIFT10 CRCSHIFTHbits.CRCSHIFT10 // bit 2, shadows bit in CRCSHIFTHbits
6156 #define SHIFT11 CRCSHIFTHbits.SHIFT11 // bit 3, shadows bit in CRCSHIFTHbits
6157 #define CRCSHIFT11 CRCSHIFTHbits.CRCSHIFT11 // bit 3, shadows bit in CRCSHIFTHbits
6158 #define SHIFT12 CRCSHIFTHbits.SHIFT12 // bit 4, shadows bit in CRCSHIFTHbits
6159 #define CRCSHIFT12 CRCSHIFTHbits.CRCSHIFT12 // bit 4, shadows bit in CRCSHIFTHbits
6160 #define SHIFT13 CRCSHIFTHbits.SHIFT13 // bit 5, shadows bit in CRCSHIFTHbits
6161 #define CRCSHIFT13 CRCSHIFTHbits.CRCSHIFT13 // bit 5, shadows bit in CRCSHIFTHbits
6162 #define SHIFT14 CRCSHIFTHbits.SHIFT14 // bit 6, shadows bit in CRCSHIFTHbits
6163 #define CRCSHIFT14 CRCSHIFTHbits.CRCSHIFT14 // bit 6, shadows bit in CRCSHIFTHbits
6164 #define SHIFT15 CRCSHIFTHbits.SHIFT15 // bit 7, shadows bit in CRCSHIFTHbits
6165 #define CRCSHIFT15 CRCSHIFTHbits.CRCSHIFT15 // bit 7, shadows bit in CRCSHIFTHbits
6167 #define SHIFT0 CRCSHIFTLbits.SHIFT0 // bit 0, shadows bit in CRCSHIFTLbits
6168 #define CRCSHIFT0 CRCSHIFTLbits.CRCSHIFT0 // bit 0, shadows bit in CRCSHIFTLbits
6169 #define SHIFT1 CRCSHIFTLbits.SHIFT1 // bit 1, shadows bit in CRCSHIFTLbits
6170 #define CRCSHIFT1 CRCSHIFTLbits.CRCSHIFT1 // bit 1, shadows bit in CRCSHIFTLbits
6171 #define SHIFT2 CRCSHIFTLbits.SHIFT2 // bit 2, shadows bit in CRCSHIFTLbits
6172 #define CRCSHIFT2 CRCSHIFTLbits.CRCSHIFT2 // bit 2, shadows bit in CRCSHIFTLbits
6173 #define SHIFT3 CRCSHIFTLbits.SHIFT3 // bit 3, shadows bit in CRCSHIFTLbits
6174 #define CRCSHIFT3 CRCSHIFTLbits.CRCSHIFT3 // bit 3, shadows bit in CRCSHIFTLbits
6175 #define SHIFT4 CRCSHIFTLbits.SHIFT4 // bit 4, shadows bit in CRCSHIFTLbits
6176 #define CRCSHIFT4 CRCSHIFTLbits.CRCSHIFT4 // bit 4, shadows bit in CRCSHIFTLbits
6177 #define SHIFT5 CRCSHIFTLbits.SHIFT5 // bit 5, shadows bit in CRCSHIFTLbits
6178 #define CRCSHIFT5 CRCSHIFTLbits.CRCSHIFT5 // bit 5, shadows bit in CRCSHIFTLbits
6179 #define SHIFT6 CRCSHIFTLbits.SHIFT6 // bit 6, shadows bit in CRCSHIFTLbits
6180 #define CRCSHIFT6 CRCSHIFTLbits.CRCSHIFT6 // bit 6, shadows bit in CRCSHIFTLbits
6181 #define SHIFT7 CRCSHIFTLbits.SHIFT7 // bit 7, shadows bit in CRCSHIFTLbits
6182 #define CRCSHIFT7 CRCSHIFTLbits.CRCSHIFT7 // bit 7, shadows bit in CRCSHIFTLbits
6184 #define XOR8 CRCXORHbits.XOR8 // bit 0, shadows bit in CRCXORHbits
6185 #define CRCXOR8 CRCXORHbits.CRCXOR8 // bit 0, shadows bit in CRCXORHbits
6186 #define XOR9 CRCXORHbits.XOR9 // bit 1, shadows bit in CRCXORHbits
6187 #define CRCXOR9 CRCXORHbits.CRCXOR9 // bit 1, shadows bit in CRCXORHbits
6188 #define XOR10 CRCXORHbits.XOR10 // bit 2, shadows bit in CRCXORHbits
6189 #define CRCXOR10 CRCXORHbits.CRCXOR10 // bit 2, shadows bit in CRCXORHbits
6190 #define XOR11 CRCXORHbits.XOR11 // bit 3, shadows bit in CRCXORHbits
6191 #define CRCXOR11 CRCXORHbits.CRCXOR11 // bit 3, shadows bit in CRCXORHbits
6192 #define XOR12 CRCXORHbits.XOR12 // bit 4, shadows bit in CRCXORHbits
6193 #define CRCXOR12 CRCXORHbits.CRCXOR12 // bit 4, shadows bit in CRCXORHbits
6194 #define XOR13 CRCXORHbits.XOR13 // bit 5, shadows bit in CRCXORHbits
6195 #define CRCXOR13 CRCXORHbits.CRCXOR13 // bit 5, shadows bit in CRCXORHbits
6196 #define XOR14 CRCXORHbits.XOR14 // bit 6, shadows bit in CRCXORHbits
6197 #define CRCXOR14 CRCXORHbits.CRCXOR14 // bit 6, shadows bit in CRCXORHbits
6198 #define XOR15 CRCXORHbits.XOR15 // bit 7, shadows bit in CRCXORHbits
6199 #define CRCXOR15 CRCXORHbits.CRCXOR15 // bit 7, shadows bit in CRCXORHbits
6201 #define XOR1 CRCXORLbits.XOR1 // bit 1, shadows bit in CRCXORLbits
6202 #define CRCXOR1 CRCXORLbits.CRCXOR1 // bit 1, shadows bit in CRCXORLbits
6203 #define XOR2 CRCXORLbits.XOR2 // bit 2, shadows bit in CRCXORLbits
6204 #define CRCXOR2 CRCXORLbits.CRCXOR2 // bit 2, shadows bit in CRCXORLbits
6205 #define XOR3 CRCXORLbits.XOR3 // bit 3, shadows bit in CRCXORLbits
6206 #define CRCXOR3 CRCXORLbits.CRCXOR3 // bit 3, shadows bit in CRCXORLbits
6207 #define XOR4 CRCXORLbits.XOR4 // bit 4, shadows bit in CRCXORLbits
6208 #define CRCXOR4 CRCXORLbits.CRCXOR4 // bit 4, shadows bit in CRCXORLbits
6209 #define XOR5 CRCXORLbits.XOR5 // bit 5, shadows bit in CRCXORLbits
6210 #define CRCXOR5 CRCXORLbits.CRCXOR5 // bit 5, shadows bit in CRCXORLbits
6211 #define XOR6 CRCXORLbits.XOR6 // bit 6, shadows bit in CRCXORLbits
6212 #define CRCXOR6 CRCXORLbits.CRCXOR6 // bit 6, shadows bit in CRCXORLbits
6213 #define XOR7 CRCXORLbits.XOR7 // bit 7, shadows bit in CRCXORLbits
6214 #define CRCXOR7 CRCXORLbits.CRCXOR7 // bit 7, shadows bit in CRCXORLbits
6216 #define LSAC0 CWG1AS0bits.LSAC0 // bit 2, shadows bit in CWG1AS0bits
6217 #define CWG1LSAC0 CWG1AS0bits.CWG1LSAC0 // bit 2, shadows bit in CWG1AS0bits
6218 #define LSAC1 CWG1AS0bits.LSAC1 // bit 3, shadows bit in CWG1AS0bits
6219 #define CWG1LSAC1 CWG1AS0bits.CWG1LSAC1 // bit 3, shadows bit in CWG1AS0bits
6220 #define LSBD0 CWG1AS0bits.LSBD0 // bit 4, shadows bit in CWG1AS0bits
6221 #define CWG1LSBD0 CWG1AS0bits.CWG1LSBD0 // bit 4, shadows bit in CWG1AS0bits
6222 #define LSBD1 CWG1AS0bits.LSBD1 // bit 5, shadows bit in CWG1AS0bits
6223 #define CWG1LSBD1 CWG1AS0bits.CWG1LSBD1 // bit 5, shadows bit in CWG1AS0bits
6224 #define REN CWG1AS0bits.REN // bit 6, shadows bit in CWG1AS0bits
6225 #define CWG1REN CWG1AS0bits.CWG1REN // bit 6, shadows bit in CWG1AS0bits
6226 #define SHUTDOWN CWG1AS0bits.SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
6227 #define CWG1SHUTDOWN CWG1AS0bits.CWG1SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
6229 #define INAS CWG1AS1bits.INAS // bit 0, shadows bit in CWG1AS1bits
6230 #define CWG1INAS CWG1AS1bits.CWG1INAS // bit 0, shadows bit in CWG1AS1bits
6231 #define C1AS CWG1AS1bits.C1AS // bit 1, shadows bit in CWG1AS1bits
6232 #define CWG1C1AS CWG1AS1bits.CWG1C1AS // bit 1, shadows bit in CWG1AS1bits
6233 #define C2AS CWG1AS1bits.C2AS // bit 2, shadows bit in CWG1AS1bits
6234 #define CWG1C2AS CWG1AS1bits.CWG1C2AS // bit 2, shadows bit in CWG1AS1bits
6235 #define TMR2AS CWG1AS1bits.TMR2AS // bit 4, shadows bit in CWG1AS1bits
6236 #define CWG1TMR2AS CWG1AS1bits.CWG1TMR2AS // bit 4, shadows bit in CWG1AS1bits
6237 #define TMR4AS CWG1AS1bits.TMR4AS // bit 5, shadows bit in CWG1AS1bits
6238 #define CWG1TMR4AS CWG1AS1bits.CWG1TMR4AS // bit 5, shadows bit in CWG1AS1bits
6239 #define TMR6AS CWG1AS1bits.TMR6AS // bit 6, shadows bit in CWG1AS1bits
6240 #define CWG1TMR6AS CWG1AS1bits.CWG1TMR6AS // bit 6, shadows bit in CWG1AS1bits
6242 #define CS CWG1CLKCONbits.CS // bit 0, shadows bit in CWG1CLKCONbits
6243 #define CWG1CS CWG1CLKCONbits.CWG1CS // bit 0, shadows bit in CWG1CLKCONbits
6245 #define POLA CWG1CON1bits.POLA // bit 0, shadows bit in CWG1CON1bits
6246 #define CWG1POLA CWG1CON1bits.CWG1POLA // bit 0, shadows bit in CWG1CON1bits
6247 #define POLB CWG1CON1bits.POLB // bit 1, shadows bit in CWG1CON1bits
6248 #define CWG1POLB CWG1CON1bits.CWG1POLB // bit 1, shadows bit in CWG1CON1bits
6249 #define POLC CWG1CON1bits.POLC // bit 2, shadows bit in CWG1CON1bits
6250 #define CWG1POLC CWG1CON1bits.CWG1POLC // bit 2, shadows bit in CWG1CON1bits
6251 #define POLD CWG1CON1bits.POLD // bit 3, shadows bit in CWG1CON1bits
6252 #define CWG1POLD CWG1CON1bits.CWG1POLD // bit 3, shadows bit in CWG1CON1bits
6253 #define IN CWG1CON1bits.IN // bit 5, shadows bit in CWG1CON1bits
6254 #define CWG1IN CWG1CON1bits.CWG1IN // bit 5, shadows bit in CWG1CON1bits
6256 #define DBF0 CWG1DBFbits.DBF0 // bit 0, shadows bit in CWG1DBFbits
6257 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0, shadows bit in CWG1DBFbits
6258 #define DBF1 CWG1DBFbits.DBF1 // bit 1, shadows bit in CWG1DBFbits
6259 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1, shadows bit in CWG1DBFbits
6260 #define DBF2 CWG1DBFbits.DBF2 // bit 2, shadows bit in CWG1DBFbits
6261 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2, shadows bit in CWG1DBFbits
6262 #define DBF3 CWG1DBFbits.DBF3 // bit 3, shadows bit in CWG1DBFbits
6263 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3, shadows bit in CWG1DBFbits
6264 #define DBF4 CWG1DBFbits.DBF4 // bit 4, shadows bit in CWG1DBFbits
6265 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4, shadows bit in CWG1DBFbits
6266 #define DBF5 CWG1DBFbits.DBF5 // bit 5, shadows bit in CWG1DBFbits
6267 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5, shadows bit in CWG1DBFbits
6269 #define DBR0 CWG1DBRbits.DBR0 // bit 0, shadows bit in CWG1DBRbits
6270 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0, shadows bit in CWG1DBRbits
6271 #define DBR1 CWG1DBRbits.DBR1 // bit 1, shadows bit in CWG1DBRbits
6272 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1, shadows bit in CWG1DBRbits
6273 #define DBR2 CWG1DBRbits.DBR2 // bit 2, shadows bit in CWG1DBRbits
6274 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2, shadows bit in CWG1DBRbits
6275 #define DBR3 CWG1DBRbits.DBR3 // bit 3, shadows bit in CWG1DBRbits
6276 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3, shadows bit in CWG1DBRbits
6277 #define DBR4 CWG1DBRbits.DBR4 // bit 4, shadows bit in CWG1DBRbits
6278 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4, shadows bit in CWG1DBRbits
6279 #define DBR5 CWG1DBRbits.DBR5 // bit 5, shadows bit in CWG1DBRbits
6280 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5, shadows bit in CWG1DBRbits
6282 #define IS0 CWG1ISMbits.IS0 // bit 0, shadows bit in CWG1ISMbits
6283 #define CWG1IS0 CWG1ISMbits.CWG1IS0 // bit 0, shadows bit in CWG1ISMbits
6284 #define IS1 CWG1ISMbits.IS1 // bit 1, shadows bit in CWG1ISMbits
6285 #define CWG1IS1 CWG1ISMbits.CWG1IS1 // bit 1, shadows bit in CWG1ISMbits
6286 #define IS2 CWG1ISMbits.IS2 // bit 2, shadows bit in CWG1ISMbits
6287 #define CWG1IS2 CWG1ISMbits.CWG1IS2 // bit 2, shadows bit in CWG1ISMbits
6289 #define STRA CWG1OCON0bits.STRA // bit 0, shadows bit in CWG1OCON0bits
6290 #define CWG1STRA CWG1OCON0bits.CWG1STRA // bit 0, shadows bit in CWG1OCON0bits
6291 #define STRB CWG1OCON0bits.STRB // bit 1, shadows bit in CWG1OCON0bits
6292 #define CWG1STRB CWG1OCON0bits.CWG1STRB // bit 1, shadows bit in CWG1OCON0bits
6293 #define STRC CWG1OCON0bits.STRC // bit 2, shadows bit in CWG1OCON0bits
6294 #define CWG1STRC CWG1OCON0bits.CWG1STRC // bit 2, shadows bit in CWG1OCON0bits
6295 #define STRD CWG1OCON0bits.STRD // bit 3, shadows bit in CWG1OCON0bits
6296 #define CWG1STRD CWG1OCON0bits.CWG1STRD // bit 3, shadows bit in CWG1OCON0bits
6297 #define OVRA CWG1OCON0bits.OVRA // bit 4, shadows bit in CWG1OCON0bits
6298 #define CWG1OVRA CWG1OCON0bits.CWG1OVRA // bit 4, shadows bit in CWG1OCON0bits
6299 #define OVRB CWG1OCON0bits.OVRB // bit 5, shadows bit in CWG1OCON0bits
6300 #define CWG1OVRB CWG1OCON0bits.CWG1OVRB // bit 5, shadows bit in CWG1OCON0bits
6301 #define OVRC CWG1OCON0bits.OVRC // bit 6, shadows bit in CWG1OCON0bits
6302 #define CWG1OVRC CWG1OCON0bits.CWG1OVRC // bit 6, shadows bit in CWG1OCON0bits
6303 #define OVRD CWG1OCON0bits.OVRD // bit 7, shadows bit in CWG1OCON0bits
6304 #define CWG1OVRD CWG1OCON0bits.CWG1OVRD // bit 7, shadows bit in CWG1OCON0bits
6306 #define OEA CWG1OCON1bits.OEA // bit 0, shadows bit in CWG1OCON1bits
6307 #define CWG1OEA CWG1OCON1bits.CWG1OEA // bit 0, shadows bit in CWG1OCON1bits
6308 #define OEB CWG1OCON1bits.OEB // bit 1, shadows bit in CWG1OCON1bits
6309 #define CWG1OEB CWG1OCON1bits.CWG1OEB // bit 1, shadows bit in CWG1OCON1bits
6310 #define OEC CWG1OCON1bits.OEC // bit 2, shadows bit in CWG1OCON1bits
6311 #define CWG1OEC CWG1OCON1bits.CWG1OEC // bit 2, shadows bit in CWG1OCON1bits
6312 #define OED CWG1OCON1bits.OED // bit 3, shadows bit in CWG1OCON1bits
6313 #define CWG1OED CWG1OCON1bits.CWG1OED // bit 3, shadows bit in CWG1OCON1bits
6315 #define D1PSS0 DAC1CON0bits.D1PSS0 // bit 2
6316 #define D1PSS1 DAC1CON0bits.D1PSS1 // bit 3
6317 #define DAC1OE DAC1CON0bits.DAC1OE // bit 5
6318 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7
6320 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0
6321 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1
6322 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2
6323 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3
6324 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4
6325 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5
6326 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6
6327 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7
6329 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
6330 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
6331 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
6332 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
6333 #define TSRNG FVRCONbits.TSRNG // bit 4
6334 #define TSEN FVRCONbits.TSEN // bit 5
6335 #define FVRRDY FVRCONbits.FVRRDY // bit 6
6336 #define FVREN FVRCONbits.FVREN // bit 7
6338 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
6339 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
6340 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
6341 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
6342 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
6343 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
6345 #define IOCIF INTCONbits.IOCIF // bit 0
6346 #define INTF INTCONbits.INTF // bit 1
6347 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
6348 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
6349 #define IOCIE INTCONbits.IOCIE // bit 3
6350 #define INTE INTCONbits.INTE // bit 4
6351 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
6352 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
6353 #define PEIE INTCONbits.PEIE // bit 6
6354 #define GIE INTCONbits.GIE // bit 7
6356 #define LATA0 LATAbits.LATA0 // bit 0
6357 #define LATA1 LATAbits.LATA1 // bit 1
6358 #define LATA2 LATAbits.LATA2 // bit 2
6359 #define LATA3 LATAbits.LATA3 // bit 3
6360 #define LATA4 LATAbits.LATA4 // bit 4
6361 #define LATA5 LATAbits.LATA5 // bit 5
6363 #define ODA0 ODCONAbits.ODA0 // bit 0
6364 #define ODA1 ODCONAbits.ODA1 // bit 1
6365 #define ODA2 ODCONAbits.ODA2 // bit 2
6366 #define ODA4 ODCONAbits.ODA4 // bit 4
6367 #define ODA5 ODCONAbits.ODA5 // bit 5
6369 #define PS0 OPTION_REGbits.PS0 // bit 0
6370 #define PS1 OPTION_REGbits.PS1 // bit 1
6371 #define PS2 OPTION_REGbits.PS2 // bit 2
6372 #define PSA OPTION_REGbits.PSA // bit 3
6373 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6374 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6375 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6376 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6377 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6378 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6380 #define SCS0 OSCCONbits.SCS0 // bit 0
6381 #define SCS1 OSCCONbits.SCS1 // bit 1
6382 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6383 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6384 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6385 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6386 #define SPLLEN OSCCONbits.SPLLEN // bit 7
6388 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6389 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6390 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
6391 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
6392 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6393 #define PLLR OSCSTATbits.PLLR // bit 6
6395 #define TUN0 OSCTUNEbits.TUN0 // bit 0
6396 #define TUN1 OSCTUNEbits.TUN1 // bit 1
6397 #define TUN2 OSCTUNEbits.TUN2 // bit 2
6398 #define TUN3 OSCTUNEbits.TUN3 // bit 3
6399 #define TUN4 OSCTUNEbits.TUN4 // bit 4
6400 #define TUN5 OSCTUNEbits.TUN5 // bit 5
6402 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6403 #define NOT_POR PCONbits.NOT_POR // bit 1
6404 #define NOT_RI PCONbits.NOT_RI // bit 2
6405 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6406 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
6407 #define NOT_WDTWV PCONbits.NOT_WDTWV // bit 5
6408 #define STKUNF PCONbits.STKUNF // bit 6
6409 #define STKOVF PCONbits.STKOVF // bit 7
6411 #define TMR1IE PIE1bits.TMR1IE // bit 0
6412 #define TMR2IE PIE1bits.TMR2IE // bit 1
6413 #define CCP1IE PIE1bits.CCP1IE // bit 2
6414 #define ADIE PIE1bits.ADIE // bit 6
6415 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6417 #define CCP2IE PIE2bits.CCP2IE // bit 0
6418 #define TMR4IE PIE2bits.TMR4IE // bit 1
6419 #define TMR6IE PIE2bits.TMR6IE // bit 2
6420 #define C1IE PIE2bits.C1IE // bit 5
6421 #define C2IE PIE2bits.C2IE // bit 6
6423 #define ZCDIE PIE3bits.ZCDIE // bit 4
6424 #define CWGIE PIE3bits.CWGIE // bit 5
6426 #define SMT1IE PIE4bits.SMT1IE // bit 0
6427 #define SMT1PRAIE PIE4bits.SMT1PRAIE // bit 1
6428 #define SMT1PWAIE PIE4bits.SMT1PWAIE // bit 2
6429 #define SMT2IE PIE4bits.SMT2IE // bit 3
6430 #define SMT2PRAIE PIE4bits.SMT2PRAIE // bit 4
6431 #define SMT2PWAIE PIE4bits.SMT2PWAIE // bit 5
6432 #define CRCIE PIE4bits.CRCIE // bit 6
6433 #define SCANIE PIE4bits.SCANIE // bit 7
6435 #define TMR1IF PIR1bits.TMR1IF // bit 0
6436 #define TMR2IF PIR1bits.TMR2IF // bit 1
6437 #define CCP1IF PIR1bits.CCP1IF // bit 2
6438 #define ADIF PIR1bits.ADIF // bit 6
6439 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6441 #define CCP2IF PIR2bits.CCP2IF // bit 0
6442 #define TMR4IF PIR2bits.TMR4IF // bit 1
6443 #define TMR6IF PIR2bits.TMR6IF // bit 2
6444 #define C1IF PIR2bits.C1IF // bit 5
6445 #define C2IF PIR2bits.C2IF // bit 6
6447 #define ZCDIF PIR3bits.ZCDIF // bit 4
6448 #define CWGIF PIR3bits.CWGIF // bit 5
6450 #define SMT1IF PIR4bits.SMT1IF // bit 0
6451 #define SMT1PRAIF PIR4bits.SMT1PRAIF // bit 1
6452 #define SMT1PWAIF PIR4bits.SMT1PWAIF // bit 2
6453 #define SMT2IF PIR4bits.SMT2IF // bit 3
6454 #define SMT2PRAIF PIR4bits.SMT2PRAIF // bit 4
6455 #define SMT2PWAIF PIR4bits.SMT2PWAIF // bit 5
6456 #define CRCIF PIR4bits.CRCIF // bit 6
6457 #define SCANIF PIR4bits.SCANIF // bit 7
6459 #define RD PMCON1bits.RD // bit 0
6460 #define WR PMCON1bits.WR // bit 1
6461 #define WREN PMCON1bits.WREN // bit 2
6462 #define WRERR PMCON1bits.WRERR // bit 3
6463 #define FREE PMCON1bits.FREE // bit 4
6464 #define LWLO PMCON1bits.LWLO // bit 5
6465 #define CFGS PMCON1bits.CFGS // bit 6
6467 #define RA0 PORTAbits.RA0 // bit 0
6468 #define RA1 PORTAbits.RA1 // bit 1
6469 #define RA2 PORTAbits.RA2 // bit 2
6470 #define RA3 PORTAbits.RA3 // bit 3
6471 #define RA4 PORTAbits.RA4 // bit 4
6472 #define RA5 PORTAbits.RA5 // bit 5
6474 #define HADR8 SCANHADRHbits.HADR8 // bit 0, shadows bit in SCANHADRHbits
6475 #define SCANHADR8 SCANHADRHbits.SCANHADR8 // bit 0, shadows bit in SCANHADRHbits
6476 #define HADR9 SCANHADRHbits.HADR9 // bit 1, shadows bit in SCANHADRHbits
6477 #define SCANHADR9 SCANHADRHbits.SCANHADR9 // bit 1, shadows bit in SCANHADRHbits
6478 #define HADR10 SCANHADRHbits.HADR10 // bit 2, shadows bit in SCANHADRHbits
6479 #define SCANHADR10 SCANHADRHbits.SCANHADR10 // bit 2, shadows bit in SCANHADRHbits
6480 #define HADR11 SCANHADRHbits.HADR11 // bit 3, shadows bit in SCANHADRHbits
6481 #define SCANHADR11 SCANHADRHbits.SCANHADR11 // bit 3, shadows bit in SCANHADRHbits
6482 #define HADR12 SCANHADRHbits.HADR12 // bit 4, shadows bit in SCANHADRHbits
6483 #define SCANHADR12 SCANHADRHbits.SCANHADR12 // bit 4, shadows bit in SCANHADRHbits
6484 #define HADR13 SCANHADRHbits.HADR13 // bit 5, shadows bit in SCANHADRHbits
6485 #define SCANHADR13 SCANHADRHbits.SCANHADR13 // bit 5, shadows bit in SCANHADRHbits
6486 #define HADR14 SCANHADRHbits.HADR14 // bit 6, shadows bit in SCANHADRHbits
6487 #define SCANHADR14 SCANHADRHbits.SCANHADR14 // bit 6, shadows bit in SCANHADRHbits
6488 #define HADR15 SCANHADRHbits.HADR15 // bit 7, shadows bit in SCANHADRHbits
6489 #define SCANHADR15 SCANHADRHbits.SCANHADR15 // bit 7, shadows bit in SCANHADRHbits
6491 #define HADR0 SCANHADRLbits.HADR0 // bit 0, shadows bit in SCANHADRLbits
6492 #define SCANHADR0 SCANHADRLbits.SCANHADR0 // bit 0, shadows bit in SCANHADRLbits
6493 #define HADR1 SCANHADRLbits.HADR1 // bit 1, shadows bit in SCANHADRLbits
6494 #define SCANHADR1 SCANHADRLbits.SCANHADR1 // bit 1, shadows bit in SCANHADRLbits
6495 #define HARD2 SCANHADRLbits.HARD2 // bit 2, shadows bit in SCANHADRLbits
6496 #define SCANHADR2 SCANHADRLbits.SCANHADR2 // bit 2, shadows bit in SCANHADRLbits
6497 #define HADR3 SCANHADRLbits.HADR3 // bit 3, shadows bit in SCANHADRLbits
6498 #define SCANHADR3 SCANHADRLbits.SCANHADR3 // bit 3, shadows bit in SCANHADRLbits
6499 #define HADR4 SCANHADRLbits.HADR4 // bit 4, shadows bit in SCANHADRLbits
6500 #define SCANHADR4 SCANHADRLbits.SCANHADR4 // bit 4, shadows bit in SCANHADRLbits
6501 #define HADR5 SCANHADRLbits.HADR5 // bit 5, shadows bit in SCANHADRLbits
6502 #define SCANHADR5 SCANHADRLbits.SCANHADR5 // bit 5, shadows bit in SCANHADRLbits
6503 #define HADR6 SCANHADRLbits.HADR6 // bit 6, shadows bit in SCANHADRLbits
6504 #define SCANHADR6 SCANHADRLbits.SCANHADR6 // bit 6, shadows bit in SCANHADRLbits
6505 #define HADR7 SCANHADRLbits.HADR7 // bit 7, shadows bit in SCANHADRLbits
6506 #define SCANHADR7 SCANHADRLbits.SCANHADR7 // bit 7, shadows bit in SCANHADRLbits
6508 #define LADR8 SCANLADRHbits.LADR8 // bit 0, shadows bit in SCANLADRHbits
6509 #define SCANLADR8 SCANLADRHbits.SCANLADR8 // bit 0, shadows bit in SCANLADRHbits
6510 #define LADR9 SCANLADRHbits.LADR9 // bit 1, shadows bit in SCANLADRHbits
6511 #define SCANLADR9 SCANLADRHbits.SCANLADR9 // bit 1, shadows bit in SCANLADRHbits
6512 #define LADR10 SCANLADRHbits.LADR10 // bit 2, shadows bit in SCANLADRHbits
6513 #define SCANLADR10 SCANLADRHbits.SCANLADR10 // bit 2, shadows bit in SCANLADRHbits
6514 #define LADR11 SCANLADRHbits.LADR11 // bit 3, shadows bit in SCANLADRHbits
6515 #define SCANLADR11 SCANLADRHbits.SCANLADR11 // bit 3, shadows bit in SCANLADRHbits
6516 #define LADR12 SCANLADRHbits.LADR12 // bit 4, shadows bit in SCANLADRHbits
6517 #define SCANLADR12 SCANLADRHbits.SCANLADR12 // bit 4, shadows bit in SCANLADRHbits
6518 #define LADR13 SCANLADRHbits.LADR13 // bit 5, shadows bit in SCANLADRHbits
6519 #define SCANLADR13 SCANLADRHbits.SCANLADR13 // bit 5, shadows bit in SCANLADRHbits
6520 #define LADR14 SCANLADRHbits.LADR14 // bit 6, shadows bit in SCANLADRHbits
6521 #define SCANLADR14 SCANLADRHbits.SCANLADR14 // bit 6, shadows bit in SCANLADRHbits
6522 #define LADR15 SCANLADRHbits.LADR15 // bit 7, shadows bit in SCANLADRHbits
6523 #define SCANLADR15 SCANLADRHbits.SCANLADR15 // bit 7, shadows bit in SCANLADRHbits
6525 #define LDAR0 SCANLADRLbits.LDAR0 // bit 0, shadows bit in SCANLADRLbits
6526 #define SCANLADR0 SCANLADRLbits.SCANLADR0 // bit 0, shadows bit in SCANLADRLbits
6527 #define LDAR1 SCANLADRLbits.LDAR1 // bit 1, shadows bit in SCANLADRLbits
6528 #define SCANLADR1 SCANLADRLbits.SCANLADR1 // bit 1, shadows bit in SCANLADRLbits
6529 #define LADR2 SCANLADRLbits.LADR2 // bit 2, shadows bit in SCANLADRLbits
6530 #define SCANLADR2 SCANLADRLbits.SCANLADR2 // bit 2, shadows bit in SCANLADRLbits
6531 #define LADR3 SCANLADRLbits.LADR3 // bit 3, shadows bit in SCANLADRLbits
6532 #define SCANLADR3 SCANLADRLbits.SCANLADR3 // bit 3, shadows bit in SCANLADRLbits
6533 #define LADR4 SCANLADRLbits.LADR4 // bit 4, shadows bit in SCANLADRLbits
6534 #define SCANLADR4 SCANLADRLbits.SCANLADR4 // bit 4, shadows bit in SCANLADRLbits
6535 #define LADR5 SCANLADRLbits.LADR5 // bit 5, shadows bit in SCANLADRLbits
6536 #define SCANLADR5 SCANLADRLbits.SCANLADR5 // bit 5, shadows bit in SCANLADRLbits
6537 #define LADR6 SCANLADRLbits.LADR6 // bit 6, shadows bit in SCANLADRLbits
6538 #define SCANLADR6 SCANLADRLbits.SCANLADR6 // bit 6, shadows bit in SCANLADRLbits
6539 #define LADR7 SCANLADRLbits.LADR7 // bit 7, shadows bit in SCANLADRLbits
6540 #define SCANLADR7 SCANLADRLbits.SCANLADR7 // bit 7, shadows bit in SCANLADRLbits
6542 #define TSEL0 SCANTRIGbits.TSEL0 // bit 0, shadows bit in SCANTRIGbits
6543 #define SCANTSEL0 SCANTRIGbits.SCANTSEL0 // bit 0, shadows bit in SCANTRIGbits
6544 #define TSEL1 SCANTRIGbits.TSEL1 // bit 1, shadows bit in SCANTRIGbits
6545 #define SCANTSEL1 SCANTRIGbits.SCANTSEL1 // bit 1, shadows bit in SCANTRIGbits
6547 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
6548 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
6549 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
6550 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
6551 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
6553 #define CSEL0 SMT1CLKbits.CSEL0 // bit 0, shadows bit in SMT1CLKbits
6554 #define SMT1CSEL0 SMT1CLKbits.SMT1CSEL0 // bit 0, shadows bit in SMT1CLKbits
6555 #define CSEL1 SMT1CLKbits.CSEL1 // bit 1, shadows bit in SMT1CLKbits
6556 #define SMT1CSEL1 SMT1CLKbits.SMT1CSEL1 // bit 1, shadows bit in SMT1CLKbits
6557 #define CSEL2 SMT1CLKbits.CSEL2 // bit 2, shadows bit in SMT1CLKbits
6558 #define SMT1CSEL2 SMT1CLKbits.SMT1CSEL2 // bit 2, shadows bit in SMT1CLKbits
6560 #define SMT1CPR8 SMT1CPRHbits.SMT1CPR8 // bit 0
6561 #define SMT1CPR9 SMT1CPRHbits.SMT1CPR9 // bit 1
6562 #define SMT1CPR10 SMT1CPRHbits.SMT1CPR10 // bit 2
6563 #define SMT1CPR11 SMT1CPRHbits.SMT1CPR11 // bit 3
6564 #define SMT1CPR12 SMT1CPRHbits.SMT1CPR12 // bit 4
6565 #define SMT1CPR13 SMT1CPRHbits.SMT1CPR13 // bit 5
6566 #define SMT1CPR14 SMT1CPRHbits.SMT1CPR14 // bit 6
6567 #define SMT1CPR15 SMT1CPRHbits.SMT1CPR15 // bit 7
6569 #define SMT1CPR0 SMT1CPRLbits.SMT1CPR0 // bit 0
6570 #define SMT1CPR1 SMT1CPRLbits.SMT1CPR1 // bit 1
6571 #define SMT1CPR2 SMT1CPRLbits.SMT1CPR2 // bit 2
6572 #define SMT1CPR3 SMT1CPRLbits.SMT1CPR3 // bit 3
6573 #define SMT1CPR4 SMT1CPRLbits.SMT1CPR4 // bit 4
6574 #define SMT1CPR5 SMT1CPRLbits.SMT1CPR5 // bit 5
6575 #define SMT1CPR6 SMT1CPRLbits.SMT1CPR6 // bit 6
6576 #define SMT1CPR7 SMT1CPRLbits.SMT1CPR7 // bit 7
6578 #define SMT1CPR16 SMT1CPRUbits.SMT1CPR16 // bit 0
6579 #define SMT1CPR17 SMT1CPRUbits.SMT1CPR17 // bit 1
6580 #define SMT1CPR18 SMT1CPRUbits.SMT1CPR18 // bit 2
6581 #define SMT1CPR19 SMT1CPRUbits.SMT1CPR19 // bit 3
6582 #define SMT1CPR20 SMT1CPRUbits.SMT1CPR20 // bit 4
6583 #define SMT1CPR21 SMT1CPRUbits.SMT1CPR21 // bit 5
6584 #define SMT1CPR22 SMT1CPRUbits.SMT1CPR22 // bit 6
6585 #define SMT1CPR23 SMT1CPRUbits.SMT1CPR23 // bit 7
6587 #define SMT1CPW8 SMT1CPWHbits.SMT1CPW8 // bit 0
6588 #define SMT1CPW9 SMT1CPWHbits.SMT1CPW9 // bit 1
6589 #define SMT1CPW10 SMT1CPWHbits.SMT1CPW10 // bit 2
6590 #define SMT1CPW11 SMT1CPWHbits.SMT1CPW11 // bit 3
6591 #define SMT1CPW12 SMT1CPWHbits.SMT1CPW12 // bit 4
6592 #define SMT1CPW13 SMT1CPWHbits.SMT1CPW13 // bit 5
6593 #define SMT1CPW14 SMT1CPWHbits.SMT1CPW14 // bit 6
6594 #define SMT1CPW15 SMT1CPWHbits.SMT1CPW15 // bit 7
6596 #define SMT1CPW0 SMT1CPWLbits.SMT1CPW0 // bit 0
6597 #define SMT1CPW1 SMT1CPWLbits.SMT1CPW1 // bit 1
6598 #define SMT1CPW2 SMT1CPWLbits.SMT1CPW2 // bit 2
6599 #define SMT1CPW3 SMT1CPWLbits.SMT1CPW3 // bit 3
6600 #define SMT1CPW4 SMT1CPWLbits.SMT1CPW4 // bit 4
6601 #define SMT1CPW5 SMT1CPWLbits.SMT1CPW5 // bit 5
6602 #define SMT1CPW6 SMT1CPWLbits.SMT1CPW6 // bit 6
6603 #define SMT1CPW7 SMT1CPWLbits.SMT1CPW7 // bit 7
6605 #define SMT1CPW16 SMT1CPWUbits.SMT1CPW16 // bit 0
6606 #define SMT1CPW17 SMT1CPWUbits.SMT1CPW17 // bit 1
6607 #define SMT1CPW18 SMT1CPWUbits.SMT1CPW18 // bit 2
6608 #define SMT1CPW19 SMT1CPWUbits.SMT1CPW19 // bit 3
6609 #define SMT1CPW20 SMT1CPWUbits.SMT1CPW20 // bit 4
6610 #define SMT1CPW21 SMT1CPWUbits.SMT1CPW21 // bit 5
6611 #define SMT1CPW22 SMT1CPWUbits.SMT1CPW22 // bit 6
6612 #define SMT1CPW23 SMT1CPWUbits.SMT1CPW23 // bit 7
6614 #define SMT1PR8 SMT1PRHbits.SMT1PR8 // bit 0
6615 #define SMT1PR9 SMT1PRHbits.SMT1PR9 // bit 1
6616 #define SMT1PR10 SMT1PRHbits.SMT1PR10 // bit 2
6617 #define SMT1PR11 SMT1PRHbits.SMT1PR11 // bit 3
6618 #define SMT1PR12 SMT1PRHbits.SMT1PR12 // bit 4
6619 #define SMT1PR13 SMT1PRHbits.SMT1PR13 // bit 5
6620 #define SMT1PR14 SMT1PRHbits.SMT1PR14 // bit 6
6621 #define SMT1PR15 SMT1PRHbits.SMT1PR15 // bit 7
6623 #define SMT1PR0 SMT1PRLbits.SMT1PR0 // bit 0
6624 #define SMT1PR1 SMT1PRLbits.SMT1PR1 // bit 1
6625 #define SMT1PR2 SMT1PRLbits.SMT1PR2 // bit 2
6626 #define SMT1PR3 SMT1PRLbits.SMT1PR3 // bit 3
6627 #define SMT1PR4 SMT1PRLbits.SMT1PR4 // bit 4
6628 #define SMT1PR5 SMT1PRLbits.SMT1PR5 // bit 5
6629 #define SMT1PR6 SMT1PRLbits.SMT1PR6 // bit 6
6630 #define SMT1PR7 SMT1PRLbits.SMT1PR7 // bit 7
6632 #define SMT1PR16 SMT1PRUbits.SMT1PR16 // bit 0
6633 #define SMT1PR17 SMT1PRUbits.SMT1PR17 // bit 1
6634 #define SMT1PR18 SMT1PRUbits.SMT1PR18 // bit 2
6635 #define SMT1PR19 SMT1PRUbits.SMT1PR19 // bit 3
6636 #define SMT1PR20 SMT1PRUbits.SMT1PR20 // bit 4
6637 #define SMT1PR21 SMT1PRUbits.SMT1PR21 // bit 5
6638 #define SMT1PR22 SMT1PRUbits.SMT1PR22 // bit 6
6639 #define SMT1PR23 SMT1PRUbits.SMT1PR23 // bit 7
6641 #define SSEL0 SMT1SIGbits.SSEL0 // bit 0, shadows bit in SMT1SIGbits
6642 #define SMT1SSEL0 SMT1SIGbits.SMT1SSEL0 // bit 0, shadows bit in SMT1SIGbits
6643 #define SSEL1 SMT1SIGbits.SSEL1 // bit 1, shadows bit in SMT1SIGbits
6644 #define SMT1SSEL1 SMT1SIGbits.SMT1SSEL1 // bit 1, shadows bit in SMT1SIGbits
6645 #define SSEL2 SMT1SIGbits.SSEL2 // bit 2, shadows bit in SMT1SIGbits
6646 #define SMT1SSEL2 SMT1SIGbits.SMT1SSEL2 // bit 2, shadows bit in SMT1SIGbits
6648 #define AS SMT1STATbits.AS // bit 0, shadows bit in SMT1STATbits
6649 #define SMT1AS SMT1STATbits.SMT1AS // bit 0, shadows bit in SMT1STATbits
6650 #define WS SMT1STATbits.WS // bit 1, shadows bit in SMT1STATbits
6651 #define SMT1WS SMT1STATbits.SMT1WS // bit 1, shadows bit in SMT1STATbits
6652 #define TS SMT1STATbits.TS // bit 2, shadows bit in SMT1STATbits
6653 #define SMT1TS SMT1STATbits.SMT1TS // bit 2, shadows bit in SMT1STATbits
6654 #define RST SMT1STATbits.RST // bit 5, shadows bit in SMT1STATbits
6655 #define SMT1RESET SMT1STATbits.SMT1RESET // bit 5, shadows bit in SMT1STATbits
6656 #define CPWUP SMT1STATbits.CPWUP // bit 6, shadows bit in SMT1STATbits
6657 #define SMT1CPWUP SMT1STATbits.SMT1CPWUP // bit 6, shadows bit in SMT1STATbits
6658 #define CPRUP SMT1STATbits.CPRUP // bit 7, shadows bit in SMT1STATbits
6659 #define SMT1CPRUP SMT1STATbits.SMT1CPRUP // bit 7, shadows bit in SMT1STATbits
6661 #define SMT1TMR8 SMT1TMRHbits.SMT1TMR8 // bit 0
6662 #define SMT1TMR9 SMT1TMRHbits.SMT1TMR9 // bit 1
6663 #define SMT1TMR10 SMT1TMRHbits.SMT1TMR10 // bit 2
6664 #define SMT1TMR11 SMT1TMRHbits.SMT1TMR11 // bit 3
6665 #define SMT1TMR12 SMT1TMRHbits.SMT1TMR12 // bit 4
6666 #define SMT1TMR13 SMT1TMRHbits.SMT1TMR13 // bit 5
6667 #define SMT1TMR14 SMT1TMRHbits.SMT1TMR14 // bit 6
6668 #define SMT1TMR15 SMT1TMRHbits.SMT1TMR15 // bit 7
6670 #define SMT1TMR0 SMT1TMRLbits.SMT1TMR0 // bit 0
6671 #define SMT1TMR1 SMT1TMRLbits.SMT1TMR1 // bit 1
6672 #define SMT1TMR2 SMT1TMRLbits.SMT1TMR2 // bit 2
6673 #define SMT1TMR3 SMT1TMRLbits.SMT1TMR3 // bit 3
6674 #define SMT1TMR4 SMT1TMRLbits.SMT1TMR4 // bit 4
6675 #define SMT1TMR5 SMT1TMRLbits.SMT1TMR5 // bit 5
6676 #define SMT1TMR6 SMT1TMRLbits.SMT1TMR6 // bit 6
6677 #define SMT1TMR7 SMT1TMRLbits.SMT1TMR7 // bit 7
6679 #define SMT1TMR16 SMT1TMRUbits.SMT1TMR16 // bit 0
6680 #define SMT1TMR17 SMT1TMRUbits.SMT1TMR17 // bit 1
6681 #define SMT1TMR18 SMT1TMRUbits.SMT1TMR18 // bit 2
6682 #define SMT1TMR19 SMT1TMRUbits.SMT1TMR19 // bit 3
6683 #define SMT1TMR20 SMT1TMRUbits.SMT1TMR20 // bit 4
6684 #define SMT1TMR21 SMT1TMRUbits.SMT1TMR21 // bit 5
6685 #define SMT1TMR22 SMT1TMRUbits.SMT1TMR22 // bit 6
6686 #define SMT1TMR23 SMT1TMRUbits.SMT1TMR23 // bit 7
6688 #define WSEL0 SMT1WINbits.WSEL0 // bit 0, shadows bit in SMT1WINbits
6689 #define SMT1WSEL0 SMT1WINbits.SMT1WSEL0 // bit 0, shadows bit in SMT1WINbits
6690 #define WSEL1 SMT1WINbits.WSEL1 // bit 1, shadows bit in SMT1WINbits
6691 #define SMT1WSEL1 SMT1WINbits.SMT1WSEL1 // bit 1, shadows bit in SMT1WINbits
6692 #define WSEL2 SMT1WINbits.WSEL2 // bit 2, shadows bit in SMT1WINbits
6693 #define SMT1WSEL2 SMT1WINbits.SMT1WSEL2 // bit 2, shadows bit in SMT1WINbits
6694 #define WSEL3 SMT1WINbits.WSEL3 // bit 3, shadows bit in SMT1WINbits
6695 #define SMT1WSEL3 SMT1WINbits.SMT1WSEL3 // bit 3, shadows bit in SMT1WINbits
6697 #define SMT2CPR8 SMT2CPRHbits.SMT2CPR8 // bit 0
6698 #define SMT2CPR9 SMT2CPRHbits.SMT2CPR9 // bit 1
6699 #define SMT2CPR10 SMT2CPRHbits.SMT2CPR10 // bit 2
6700 #define SMT2CPR11 SMT2CPRHbits.SMT2CPR11 // bit 3
6701 #define SMT2CPR12 SMT2CPRHbits.SMT2CPR12 // bit 4
6702 #define SMT2CPR13 SMT2CPRHbits.SMT2CPR13 // bit 5
6703 #define SMT2CPR14 SMT2CPRHbits.SMT2CPR14 // bit 6
6704 #define SMT2CPR15 SMT2CPRHbits.SMT2CPR15 // bit 7
6706 #define SMT2CPR0 SMT2CPRLbits.SMT2CPR0 // bit 0
6707 #define SMT2CPR1 SMT2CPRLbits.SMT2CPR1 // bit 1
6708 #define SMT2CPR2 SMT2CPRLbits.SMT2CPR2 // bit 2
6709 #define SMT2CPR3 SMT2CPRLbits.SMT2CPR3 // bit 3
6710 #define SMT2CPR4 SMT2CPRLbits.SMT2CPR4 // bit 4
6711 #define SMT2CPR5 SMT2CPRLbits.SMT2CPR5 // bit 5
6712 #define SMT2CPR6 SMT2CPRLbits.SMT2CPR6 // bit 6
6713 #define SMT2CPR7 SMT2CPRLbits.SMT2CPR7 // bit 7
6715 #define SMT2CPR16 SMT2CPRUbits.SMT2CPR16 // bit 0
6716 #define SMT2CPR17 SMT2CPRUbits.SMT2CPR17 // bit 1
6717 #define SMT2CPR18 SMT2CPRUbits.SMT2CPR18 // bit 2
6718 #define SMT2CPR19 SMT2CPRUbits.SMT2CPR19 // bit 3
6719 #define SMT2CPR20 SMT2CPRUbits.SMT2CPR20 // bit 4
6720 #define SMT2CPR21 SMT2CPRUbits.SMT2CPR21 // bit 5
6721 #define SMT2CPR22 SMT2CPRUbits.SMT2CPR22 // bit 6
6722 #define SMT2CPR23 SMT2CPRUbits.SMT2CPR23 // bit 7
6724 #define SMT2CPW8 SMT2CPWHbits.SMT2CPW8 // bit 0
6725 #define SMT2CPW9 SMT2CPWHbits.SMT2CPW9 // bit 1
6726 #define SMT2CPW10 SMT2CPWHbits.SMT2CPW10 // bit 2
6727 #define SMT2CPW11 SMT2CPWHbits.SMT2CPW11 // bit 3
6728 #define SMT2CPW12 SMT2CPWHbits.SMT2CPW12 // bit 4
6729 #define SMT2CPW13 SMT2CPWHbits.SMT2CPW13 // bit 5
6730 #define SMT2CPW14 SMT2CPWHbits.SMT2CPW14 // bit 6
6731 #define SMT2CPW15 SMT2CPWHbits.SMT2CPW15 // bit 7
6733 #define SMT2CPW0 SMT2CPWLbits.SMT2CPW0 // bit 0
6734 #define SMT2CPW1 SMT2CPWLbits.SMT2CPW1 // bit 1
6735 #define SMT2CPW2 SMT2CPWLbits.SMT2CPW2 // bit 2
6736 #define SMT2CPW3 SMT2CPWLbits.SMT2CPW3 // bit 3
6737 #define SMT2CPW4 SMT2CPWLbits.SMT2CPW4 // bit 4
6738 #define SMT2CPW5 SMT2CPWLbits.SMT2CPW5 // bit 5
6739 #define SMT2CPW6 SMT2CPWLbits.SMT2CPW6 // bit 6
6740 #define SMT2CPW7 SMT2CPWLbits.SMT2CPW7 // bit 7
6742 #define SMT2CPW16 SMT2CPWUbits.SMT2CPW16 // bit 0
6743 #define SMT2CPW17 SMT2CPWUbits.SMT2CPW17 // bit 1
6744 #define SMT2CPW18 SMT2CPWUbits.SMT2CPW18 // bit 2
6745 #define SMT2CPW19 SMT2CPWUbits.SMT2CPW19 // bit 3
6746 #define SMT2CPW20 SMT2CPWUbits.SMT2CPW20 // bit 4
6747 #define SMT2CPW21 SMT2CPWUbits.SMT2CPW21 // bit 5
6748 #define SMT2CPW22 SMT2CPWUbits.SMT2CPW22 // bit 6
6749 #define SMT2CPW23 SMT2CPWUbits.SMT2CPW23 // bit 7
6751 #define SMT2PR8 SMT2PRHbits.SMT2PR8 // bit 0
6752 #define SMT2PR9 SMT2PRHbits.SMT2PR9 // bit 1
6753 #define SMT2PR10 SMT2PRHbits.SMT2PR10 // bit 2
6754 #define SMT2PR11 SMT2PRHbits.SMT2PR11 // bit 3
6755 #define SMT2PR12 SMT2PRHbits.SMT2PR12 // bit 4
6756 #define SMT2PR13 SMT2PRHbits.SMT2PR13 // bit 5
6757 #define SMT2PR14 SMT2PRHbits.SMT2PR14 // bit 6
6758 #define SMT2PR15 SMT2PRHbits.SMT2PR15 // bit 7
6760 #define SMT2PR0 SMT2PRLbits.SMT2PR0 // bit 0
6761 #define SMT2PR1 SMT2PRLbits.SMT2PR1 // bit 1
6762 #define SMT2PR2 SMT2PRLbits.SMT2PR2 // bit 2
6763 #define SMT2PR3 SMT2PRLbits.SMT2PR3 // bit 3
6764 #define SMT2PR4 SMT2PRLbits.SMT2PR4 // bit 4
6765 #define SMT2PR5 SMT2PRLbits.SMT2PR5 // bit 5
6766 #define SMT2PR6 SMT2PRLbits.SMT2PR6 // bit 6
6767 #define SMT2PR7 SMT2PRLbits.SMT2PR7 // bit 7
6769 #define SMT2PR16 SMT2PRUbits.SMT2PR16 // bit 0
6770 #define SMT2PR17 SMT2PRUbits.SMT2PR17 // bit 1
6771 #define SMT2PR18 SMT2PRUbits.SMT2PR18 // bit 2
6772 #define SMT2PR19 SMT2PRUbits.SMT2PR19 // bit 3
6773 #define SMT2PR20 SMT2PRUbits.SMT2PR20 // bit 4
6774 #define SMT2PR21 SMT2PRUbits.SMT2PR21 // bit 5
6775 #define SMT2PR22 SMT2PRUbits.SMT2PR22 // bit 6
6776 #define SMT2PR23 SMT2PRUbits.SMT2PR23 // bit 7
6778 #define SMT2TMR8 SMT2TMRHbits.SMT2TMR8 // bit 0
6779 #define SMT2TMR9 SMT2TMRHbits.SMT2TMR9 // bit 1
6780 #define SMT2TMR10 SMT2TMRHbits.SMT2TMR10 // bit 2
6781 #define SMT2TMR11 SMT2TMRHbits.SMT2TMR11 // bit 3
6782 #define SMT2TMR12 SMT2TMRHbits.SMT2TMR12 // bit 4
6783 #define SMT2TMR13 SMT2TMRHbits.SMT2TMR13 // bit 5
6784 #define SMT2TMR14 SMT2TMRHbits.SMT2TMR14 // bit 6
6785 #define SMT2TMR15 SMT2TMRHbits.SMT2TMR15 // bit 7
6787 #define SMT2TMR0 SMT2TMRLbits.SMT2TMR0 // bit 0
6788 #define SMT2TMR1 SMT2TMRLbits.SMT2TMR1 // bit 1
6789 #define SMT2TMR2 SMT2TMRLbits.SMT2TMR2 // bit 2
6790 #define SMT2TMR3 SMT2TMRLbits.SMT2TMR3 // bit 3
6791 #define SMT2TMR4 SMT2TMRLbits.SMT2TMR4 // bit 4
6792 #define SMT2TMR5 SMT2TMRLbits.SMT2TMR5 // bit 5
6793 #define SMT2TMR6 SMT2TMRLbits.SMT2TMR6 // bit 6
6794 #define SMT2TMR7 SMT2TMRLbits.SMT2TMR7 // bit 7
6796 #define SMT2TMR16 SMT2TMRUbits.SMT2TMR16 // bit 0
6797 #define SMT2TMR17 SMT2TMRUbits.SMT2TMR17 // bit 1
6798 #define SMT2TMR18 SMT2TMRUbits.SMT2TMR18 // bit 2
6799 #define SMT2TMR19 SMT2TMRUbits.SMT2TMR19 // bit 3
6800 #define SMT2TMR20 SMT2TMRUbits.SMT2TMR20 // bit 4
6801 #define SMT2TMR21 SMT2TMRUbits.SMT2TMR21 // bit 5
6802 #define SMT2TMR22 SMT2TMRUbits.SMT2TMR22 // bit 6
6803 #define SMT2TMR23 SMT2TMRUbits.SMT2TMR23 // bit 7
6805 #define C STATUSbits.C // bit 0
6806 #define DC STATUSbits.DC // bit 1
6807 #define Z STATUSbits.Z // bit 2
6808 #define NOT_PD STATUSbits.NOT_PD // bit 3
6809 #define NOT_TO STATUSbits.NOT_TO // bit 4
6811 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
6812 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
6813 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
6815 #define TMR1ON T1CONbits.TMR1ON // bit 0
6816 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
6817 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
6818 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
6819 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
6820 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
6822 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
6823 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
6824 #define T1GVAL T1GCONbits.T1GVAL // bit 2
6825 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
6826 #define T1GSPM T1GCONbits.T1GSPM // bit 4
6827 #define T1GTM T1GCONbits.T1GTM // bit 5
6828 #define T1GPOL T1GCONbits.T1GPOL // bit 6
6829 #define TMR1GE T1GCONbits.TMR1GE // bit 7
6831 #define T2CS0 T2CLKCONbits.T2CS0 // bit 0
6832 #define T2CS1 T2CLKCONbits.T2CS1 // bit 1
6833 #define T2CS2 T2CLKCONbits.T2CS2 // bit 2
6835 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 0, shadows bit in T2CONbits
6836 #define OUTPS0 T2CONbits.OUTPS0 // bit 0, shadows bit in T2CONbits
6837 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 1, shadows bit in T2CONbits
6838 #define OUTPS1 T2CONbits.OUTPS1 // bit 1, shadows bit in T2CONbits
6839 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 2, shadows bit in T2CONbits
6840 #define OUTPS2 T2CONbits.OUTPS2 // bit 2, shadows bit in T2CONbits
6841 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 3, shadows bit in T2CONbits
6842 #define OUTPS3 T2CONbits.OUTPS3 // bit 3, shadows bit in T2CONbits
6843 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 4, shadows bit in T2CONbits
6844 #define CKPS0 T2CONbits.CKPS0 // bit 4, shadows bit in T2CONbits
6845 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 5, shadows bit in T2CONbits
6846 #define CKPS1 T2CONbits.CKPS1 // bit 5, shadows bit in T2CONbits
6847 #define T2CKPS2 T2CONbits.T2CKPS2 // bit 6, shadows bit in T2CONbits
6848 #define CKPS2 T2CONbits.CKPS2 // bit 6, shadows bit in T2CONbits
6849 #define ON T2CONbits.ON // bit 7, shadows bit in T2CONbits
6850 #define T2ON T2CONbits.T2ON // bit 7, shadows bit in T2CONbits
6851 #define TMR2ON T2CONbits.TMR2ON // bit 7, shadows bit in T2CONbits
6853 #define RSEL0 T2RSTbits.RSEL0 // bit 0, shadows bit in T2RSTbits
6854 #define T2RSEL0 T2RSTbits.T2RSEL0 // bit 0, shadows bit in T2RSTbits
6855 #define RSEL1 T2RSTbits.RSEL1 // bit 1, shadows bit in T2RSTbits
6856 #define T2RSEL1 T2RSTbits.T2RSEL1 // bit 1, shadows bit in T2RSTbits
6857 #define RSEL2 T2RSTbits.RSEL2 // bit 2, shadows bit in T2RSTbits
6858 #define T2RSEL2 T2RSTbits.T2RSEL2 // bit 2, shadows bit in T2RSTbits
6859 #define RSEL3 T2RSTbits.RSEL3 // bit 3, shadows bit in T2RSTbits
6860 #define T2RSEL3 T2RSTbits.T2RSEL3 // bit 3, shadows bit in T2RSTbits
6862 #define T4CS0 T4CLKCONbits.T4CS0 // bit 0
6863 #define T4CS1 T4CLKCONbits.T4CS1 // bit 1
6864 #define T4CS2 T4CLKCONbits.T4CS2 // bit 2
6866 #define T6CS0 T6CLKCONbits.T6CS0 // bit 0
6867 #define T6CS1 T6CLKCONbits.T6CS1 // bit 1
6868 #define T6CS2 T6CLKCONbits.T6CS2 // bit 2
6870 #define TRISA0 TRISAbits.TRISA0 // bit 0
6871 #define TRISA1 TRISAbits.TRISA1 // bit 1
6872 #define TRISA2 TRISAbits.TRISA2 // bit 2
6873 #define TRISA3 TRISAbits.TRISA3 // bit 3
6874 #define TRISA4 TRISAbits.TRISA4 // bit 4
6875 #define TRISA5 TRISAbits.TRISA5 // bit 5
6877 #define SEN WDTCON0bits.SEN // bit 0, shadows bit in WDTCON0bits
6878 #define SWDTEN WDTCON0bits.SWDTEN // bit 0, shadows bit in WDTCON0bits
6879 #define WDTSEN WDTCON0bits.WDTSEN // bit 0, shadows bit in WDTCON0bits
6880 #define WDTPS0 WDTCON0bits.WDTPS0 // bit 1
6881 #define WDTPS1 WDTCON0bits.WDTPS1 // bit 2
6882 #define WDTPS2 WDTCON0bits.WDTPS2 // bit 3
6883 #define WDTPS3 WDTCON0bits.WDTPS3 // bit 4
6884 #define WDTPS4 WDTCON0bits.WDTPS4 // bit 5
6886 #define WINDOW0 WDTCON1bits.WINDOW0 // bit 0, shadows bit in WDTCON1bits
6887 #define WDTWINDOW0 WDTCON1bits.WDTWINDOW0 // bit 0, shadows bit in WDTCON1bits
6888 #define WINDOW1 WDTCON1bits.WINDOW1 // bit 1, shadows bit in WDTCON1bits
6889 #define WDTWINDOW1 WDTCON1bits.WDTWINDOW1 // bit 1, shadows bit in WDTCON1bits
6890 #define WINDOW2 WDTCON1bits.WINDOW2 // bit 2, shadows bit in WDTCON1bits
6891 #define WDTWINDOW2 WDTCON1bits.WDTWINDOW2 // bit 2, shadows bit in WDTCON1bits
6892 #define WDTCS0 WDTCON1bits.WDTCS0 // bit 4
6893 #define WDTCS1 WDTCON1bits.WDTCS1 // bit 5
6894 #define WDTCS2 WDTCON1bits.WDTCS2 // bit 6
6896 #define PSCNT8 WDTPSHbits.PSCNT8 // bit 0, shadows bit in WDTPSHbits
6897 #define WDTPSCNT8 WDTPSHbits.WDTPSCNT8 // bit 0, shadows bit in WDTPSHbits
6898 #define PSCNT9 WDTPSHbits.PSCNT9 // bit 1, shadows bit in WDTPSHbits
6899 #define WDTPSCNT9 WDTPSHbits.WDTPSCNT9 // bit 1, shadows bit in WDTPSHbits
6900 #define PSCNT10 WDTPSHbits.PSCNT10 // bit 2, shadows bit in WDTPSHbits
6901 #define WDTPSCNT10 WDTPSHbits.WDTPSCNT10 // bit 2, shadows bit in WDTPSHbits
6902 #define PSCNT11 WDTPSHbits.PSCNT11 // bit 3, shadows bit in WDTPSHbits
6903 #define WDTPSCNT11 WDTPSHbits.WDTPSCNT11 // bit 3, shadows bit in WDTPSHbits
6904 #define PSCNT12 WDTPSHbits.PSCNT12 // bit 4, shadows bit in WDTPSHbits
6905 #define WDTPSCNT12 WDTPSHbits.WDTPSCNT12 // bit 4, shadows bit in WDTPSHbits
6906 #define PSCNT13 WDTPSHbits.PSCNT13 // bit 5, shadows bit in WDTPSHbits
6907 #define WDTPSCNT13 WDTPSHbits.WDTPSCNT13 // bit 5, shadows bit in WDTPSHbits
6908 #define PSCNT14 WDTPSHbits.PSCNT14 // bit 6, shadows bit in WDTPSHbits
6909 #define WDTPSCNT14 WDTPSHbits.WDTPSCNT14 // bit 6, shadows bit in WDTPSHbits
6910 #define PSCNT15 WDTPSHbits.PSCNT15 // bit 7, shadows bit in WDTPSHbits
6911 #define WDTPSCNT15 WDTPSHbits.WDTPSCNT15 // bit 7, shadows bit in WDTPSHbits
6913 #define PSCNT0 WDTPSLbits.PSCNT0 // bit 0, shadows bit in WDTPSLbits
6914 #define WDTPSCNT0 WDTPSLbits.WDTPSCNT0 // bit 0, shadows bit in WDTPSLbits
6915 #define PSCNT1 WDTPSLbits.PSCNT1 // bit 1, shadows bit in WDTPSLbits
6916 #define WDTPSCNT1 WDTPSLbits.WDTPSCNT1 // bit 1, shadows bit in WDTPSLbits
6917 #define PSCNT2 WDTPSLbits.PSCNT2 // bit 2, shadows bit in WDTPSLbits
6918 #define WDTPSCNT2 WDTPSLbits.WDTPSCNT2 // bit 2, shadows bit in WDTPSLbits
6919 #define PSCNT3 WDTPSLbits.PSCNT3 // bit 3, shadows bit in WDTPSLbits
6920 #define WDTPSCNT3 WDTPSLbits.WDTPSCNT3 // bit 3, shadows bit in WDTPSLbits
6921 #define PSCNT4 WDTPSLbits.PSCNT4 // bit 4, shadows bit in WDTPSLbits
6922 #define WDTPSCNT4 WDTPSLbits.WDTPSCNT4 // bit 4, shadows bit in WDTPSLbits
6923 #define PSCNT5 WDTPSLbits.PSCNT5 // bit 5, shadows bit in WDTPSLbits
6924 #define WDTPSCNT5 WDTPSLbits.WDTPSCNT5 // bit 5, shadows bit in WDTPSLbits
6925 #define PSCNT6 WDTPSLbits.PSCNT6 // bit 6, shadows bit in WDTPSLbits
6926 #define WDTPSCNT6 WDTPSLbits.WDTPSCNT6 // bit 6, shadows bit in WDTPSLbits
6927 #define PSCNT7 WDTPSLbits.PSCNT7 // bit 7, shadows bit in WDTPSLbits
6928 #define WDTPSCNT7 WDTPSLbits.WDTPSCNT7 // bit 7, shadows bit in WDTPSLbits
6930 #define PSCNT16 WDTTMRbits.PSCNT16 // bit 0, shadows bit in WDTTMRbits
6931 #define WDTPSCNT16 WDTTMRbits.WDTPSCNT16 // bit 0, shadows bit in WDTTMRbits
6932 #define PSCNT17 WDTTMRbits.PSCNT17 // bit 1, shadows bit in WDTTMRbits
6933 #define WDTPSCNT17 WDTTMRbits.WDTPSCNT17 // bit 1, shadows bit in WDTTMRbits
6934 #define STATE WDTTMRbits.STATE // bit 2, shadows bit in WDTTMRbits
6935 #define WDTSTATE WDTTMRbits.WDTSTATE // bit 2, shadows bit in WDTTMRbits
6936 #define WDTTMR0 WDTTMRbits.WDTTMR0 // bit 3
6937 #define WDTTMR1 WDTTMRbits.WDTTMR1 // bit 4
6938 #define WDTTMR2 WDTTMRbits.WDTTMR2 // bit 5
6939 #define WDTTMR3 WDTTMRbits.WDTTMR3 // bit 6
6940 #define WDTTMR4 WDTTMRbits.WDTTMR4 // bit 7
6942 #define WPUA0 WPUAbits.WPUA0 // bit 0
6943 #define WPUA1 WPUAbits.WPUA1 // bit 1
6944 #define WPUA2 WPUAbits.WPUA2 // bit 2
6945 #define WPUA3 WPUAbits.WPUA3 // bit 3
6946 #define WPUA4 WPUAbits.WPUA4 // bit 4
6947 #define WPUA5 WPUAbits.WPUA5 // bit 5
6949 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
6950 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
6951 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
6952 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
6953 #define ZCD1OE ZCD1CONbits.ZCD1OE // bit 6
6954 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
6956 #endif // #ifndef NO_BIT_DEFINES
6958 #endif // #ifndef __PIC12LF1612_H__