?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16c432.h
blobf377fcc5ddfc9c6857ea8c8e0a2a2aefaa583607
1 /*
2 * This declarations of the PIC16C432 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:02 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16C432_H__
26 #define __PIC16C432_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define CMCON_ADDR 0x001F
47 #define OPTION_REG_ADDR 0x0081
48 #define TRISA_ADDR 0x0085
49 #define TRISB_ADDR 0x0086
50 #define PIE1_ADDR 0x008C
51 #define PCON_ADDR 0x008E
52 #define LININTF_ADDR 0x0090
53 #define VRCON_ADDR 0x009F
54
55 #endif // #ifndef NO_ADDR_DEFINES
56
57 //==============================================================================
58 //
59 // Register Definitions
60 //
61 //==============================================================================
62
63 extern __at(0x0000) __sfr INDF;
64 extern __at(0x0001) __sfr TMR0;
65 extern __at(0x0002) __sfr PCL;
66
67 //==============================================================================
68 // STATUS Bits
69
70 extern __at(0x0003) __sfr STATUS;
71
72 typedef union
73 {
74 struct
75 {
76 unsigned C : 1;
77 unsigned DC : 1;
78 unsigned Z : 1;
79 unsigned NOT_PD : 1;
80 unsigned NOT_TO : 1;
81 unsigned RP0 : 1;
82 unsigned RP1 : 1;
83 unsigned IRP : 1;
84 };
85
86 struct
87 {
88 unsigned : 5;
89 unsigned RP : 2;
90 unsigned : 1;
91 };
92 } __STATUSbits_t;
93
94 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
95
96 #define _C 0x01
97 #define _DC 0x02
98 #define _Z 0x04
99 #define _NOT_PD 0x08
100 #define _NOT_TO 0x10
101 #define _RP0 0x20
102 #define _RP1 0x40
103 #define _IRP 0x80
104
105 //==============================================================================
106
107 extern __at(0x0004) __sfr FSR;
108
109 //==============================================================================
110 // PORTA Bits
111
112 extern __at(0x0005) __sfr PORTA;
113
114 typedef struct
115 {
116 unsigned RA0 : 1;
117 unsigned LINRX : 1;
118 unsigned RA2 : 1;
119 unsigned RA3 : 1;
120 unsigned RA4 : 1;
121 unsigned : 1;
122 unsigned : 1;
123 unsigned : 1;
124 } __PORTAbits_t;
125
126 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
127
128 #define _RA0 0x01
129 #define _LINRX 0x02
130 #define _RA2 0x04
131 #define _RA3 0x08
132 #define _RA4 0x10
133
134 //==============================================================================
135
136
137 //==============================================================================
138 // PORTB Bits
139
140 extern __at(0x0006) __sfr PORTB;
141
142 typedef struct
143 {
144 unsigned RB0 : 1;
145 unsigned RB1 : 1;
146 unsigned RB2 : 1;
147 unsigned RB3 : 1;
148 unsigned RB4 : 1;
149 unsigned RB5 : 1;
150 unsigned RB6 : 1;
151 unsigned RB7 : 1;
152 } __PORTBbits_t;
153
154 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
155
156 #define _RB0 0x01
157 #define _RB1 0x02
158 #define _RB2 0x04
159 #define _RB3 0x08
160 #define _RB4 0x10
161 #define _RB5 0x20
162 #define _RB6 0x40
163 #define _RB7 0x80
164
165 //==============================================================================
166
167 extern __at(0x000A) __sfr PCLATH;
168
169 //==============================================================================
170 // INTCON Bits
171
172 extern __at(0x000B) __sfr INTCON;
173
174 typedef union
175 {
176 struct
177 {
178 unsigned RBIF : 1;
179 unsigned INTF : 1;
180 unsigned T0IF : 1;
181 unsigned RBIE : 1;
182 unsigned INTE : 1;
183 unsigned T0IE : 1;
184 unsigned PEIE : 1;
185 unsigned GIE : 1;
186 };
187
188 struct
189 {
190 unsigned : 1;
191 unsigned : 1;
192 unsigned TMR0IF : 1;
193 unsigned : 1;
194 unsigned : 1;
195 unsigned TMR0IE : 1;
196 unsigned : 1;
197 unsigned : 1;
198 };
199 } __INTCONbits_t;
200
201 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
202
203 #define _RBIF 0x01
204 #define _INTF 0x02
205 #define _T0IF 0x04
206 #define _TMR0IF 0x04
207 #define _RBIE 0x08
208 #define _INTE 0x10
209 #define _T0IE 0x20
210 #define _TMR0IE 0x20
211 #define _PEIE 0x40
212 #define _GIE 0x80
213
214 //==============================================================================
215
216
217 //==============================================================================
218 // PIR1 Bits
219
220 extern __at(0x000C) __sfr PIR1;
221
222 typedef struct
223 {
224 unsigned : 1;
225 unsigned : 1;
226 unsigned : 1;
227 unsigned : 1;
228 unsigned : 1;
229 unsigned : 1;
230 unsigned CMIF : 1;
231 unsigned : 1;
232 } __PIR1bits_t;
233
234 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
235
236 #define _CMIF 0x40
237
238 //==============================================================================
239
240
241 //==============================================================================
242 // CMCON Bits
243
244 extern __at(0x001F) __sfr CMCON;
245
246 typedef union
247 {
248 struct
249 {
250 unsigned CM0 : 1;
251 unsigned CM1 : 1;
252 unsigned CM2 : 1;
253 unsigned CIS : 1;
254 unsigned : 1;
255 unsigned : 1;
256 unsigned C1OUT : 1;
257 unsigned C2OUT : 1;
258 };
259
260 struct
261 {
262 unsigned CM : 3;
263 unsigned : 5;
264 };
265 } __CMCONbits_t;
266
267 extern __at(0x001F) volatile __CMCONbits_t CMCONbits;
268
269 #define _CM0 0x01
270 #define _CM1 0x02
271 #define _CM2 0x04
272 #define _CIS 0x08
273 #define _C1OUT 0x40
274 #define _C2OUT 0x80
275
276 //==============================================================================
277
278
279 //==============================================================================
280 // OPTION_REG Bits
281
282 extern __at(0x0081) __sfr OPTION_REG;
283
284 typedef union
285 {
286 struct
287 {
288 unsigned PS0 : 1;
289 unsigned PS1 : 1;
290 unsigned PS2 : 1;
291 unsigned PSA : 1;
292 unsigned T0SE : 1;
293 unsigned T0CS : 1;
294 unsigned INTEDG : 1;
295 unsigned NOT_RBPU : 1;
296 };
297
298 struct
299 {
300 unsigned PS : 3;
301 unsigned : 5;
302 };
303 } __OPTION_REGbits_t;
304
305 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
306
307 #define _PS0 0x01
308 #define _PS1 0x02
309 #define _PS2 0x04
310 #define _PSA 0x08
311 #define _T0SE 0x10
312 #define _T0CS 0x20
313 #define _INTEDG 0x40
314 #define _NOT_RBPU 0x80
315
316 //==============================================================================
317
318
319 //==============================================================================
320 // TRISA Bits
321
322 extern __at(0x0085) __sfr TRISA;
323
324 typedef struct
325 {
326 unsigned TRISA0 : 1;
327 unsigned TLINRX : 1;
328 unsigned TRISA2 : 1;
329 unsigned TRISA3 : 1;
330 unsigned TRISA4 : 1;
331 unsigned : 1;
332 unsigned : 1;
333 unsigned : 1;
334 } __TRISAbits_t;
335
336 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
337
338 #define _TRISA0 0x01
339 #define _TLINRX 0x02
340 #define _TRISA2 0x04
341 #define _TRISA3 0x08
342 #define _TRISA4 0x10
343
344 //==============================================================================
345
346
347 //==============================================================================
348 // TRISB Bits
349
350 extern __at(0x0086) __sfr TRISB;
351
352 typedef struct
353 {
354 unsigned TRISB0 : 1;
355 unsigned TRISB1 : 1;
356 unsigned TRISB2 : 1;
357 unsigned TRISB3 : 1;
358 unsigned TRISB4 : 1;
359 unsigned TRISB5 : 1;
360 unsigned TRISB6 : 1;
361 unsigned TRISB7 : 1;
362 } __TRISBbits_t;
363
364 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
365
366 #define _TRISB0 0x01
367 #define _TRISB1 0x02
368 #define _TRISB2 0x04
369 #define _TRISB3 0x08
370 #define _TRISB4 0x10
371 #define _TRISB5 0x20
372 #define _TRISB6 0x40
373 #define _TRISB7 0x80
374
375 //==============================================================================
376
377
378 //==============================================================================
379 // PIE1 Bits
380
381 extern __at(0x008C) __sfr PIE1;
382
383 typedef struct
384 {
385 unsigned : 1;
386 unsigned : 1;
387 unsigned : 1;
388 unsigned : 1;
389 unsigned : 1;
390 unsigned : 1;
391 unsigned CMIE : 1;
392 unsigned : 1;
393 } __PIE1bits_t;
394
395 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
396
397 #define _CMIE 0x40
398
399 //==============================================================================
400
401
402 //==============================================================================
403 // PCON Bits
404
405 extern __at(0x008E) __sfr PCON;
406
407 typedef union
408 {
409 struct
410 {
411 unsigned NOT_BOR : 1;
412 unsigned NOT_POR : 1;
413 unsigned : 1;
414 unsigned : 1;
415 unsigned : 1;
416 unsigned : 1;
417 unsigned : 1;
418 unsigned : 1;
419 };
420
421 struct
422 {
423 unsigned NOT_BO : 1;
424 unsigned : 1;
425 unsigned : 1;
426 unsigned : 1;
427 unsigned : 1;
428 unsigned : 1;
429 unsigned : 1;
430 unsigned : 1;
431 };
432 } __PCONbits_t;
433
434 extern __at(0x008E) volatile __PCONbits_t PCONbits;
435
436 #define _NOT_BOR 0x01
437 #define _NOT_BO 0x01
438 #define _NOT_POR 0x02
439
440 //==============================================================================
441
442
443 //==============================================================================
444 // LININTF Bits
445
446 extern __at(0x0090) __sfr LININTF;
447
448 typedef struct
449 {
450 unsigned LINVDD : 1;
451 unsigned : 1;
452 unsigned LINTX : 1;
453 unsigned : 1;
454 unsigned : 1;
455 unsigned : 1;
456 unsigned : 1;
457 unsigned : 1;
458 } __LININTFbits_t;
459
460 extern __at(0x0090) volatile __LININTFbits_t LININTFbits;
461
462 #define _LINVDD 0x01
463 #define _LINTX 0x04
464
465 //==============================================================================
466
467
468 //==============================================================================
469 // VRCON Bits
470
471 extern __at(0x009F) __sfr VRCON;
472
473 typedef union
474 {
475 struct
476 {
477 unsigned VR0 : 1;
478 unsigned VR1 : 1;
479 unsigned VR2 : 1;
480 unsigned VR3 : 1;
481 unsigned : 1;
482 unsigned VRR : 1;
483 unsigned VROE : 1;
484 unsigned VREN : 1;
485 };
486
487 struct
488 {
489 unsigned VR : 4;
490 unsigned : 4;
491 };
492 } __VRCONbits_t;
493
494 extern __at(0x009F) volatile __VRCONbits_t VRCONbits;
495
496 #define _VR0 0x01
497 #define _VR1 0x02
498 #define _VR2 0x04
499 #define _VR3 0x08
500 #define _VRR 0x20
501 #define _VROE 0x40
502 #define _VREN 0x80
503
504 //==============================================================================
505
506
507 //==============================================================================
508 //
509 // Configuration Bits
510 //
511 //==============================================================================
512
513 #define _CONFIG1 0x2007
514
515 //----------------------------- CONFIG1 Options -------------------------------
516
517 #define _FOSC_LP 0x3FFC // LP oscillator.
518 #define _LP_OSC 0x3FFC // LP oscillator.
519 #define _FOSC_XT 0x3FFD // XT oscillator.
520 #define _XT_OSC 0x3FFD // XT oscillator.
521 #define _FOSC_HS 0x3FFE // HS oscillator.
522 #define _HS_OSC 0x3FFE // HS oscillator.
523 #define _FOSC_RC 0x3FFF // RC oscillator.
524 #define _RC_OSC 0x3FFF // RC oscillator.
525 #define _WDTE_OFF 0x3FFB // WDT disabled.
526 #define _WDT_OFF 0x3FFB // WDT disabled.
527 #define _WDTE_ON 0x3FFF // WDT enabled.
528 #define _WDT_ON 0x3FFF // WDT enabled.
529 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
530 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
531 #define _CP_ALL 0x00CF // All memory is code protected.
532 #define _CP_75 0x15DF // 0200h-07FFh code protected.
533 #define _CP_50 0x2AEF // 0400h-07FFh code protected.
534 #define _CP_OFF 0x3FFF // Code protection off.
535 #define _BOREN_OFF 0x3FBF // BOR disabled.
536 #define _BODEN_OFF 0x3FBF // BOR disabled.
537 #define _BOREN_ON 0x3FFF // BOR enabled.
538 #define _BODEN_ON 0x3FFF // BOR enabled.
539
540 //==============================================================================
541
542 #define _IDLOC0 0x2000
543 #define _IDLOC1 0x2001
544 #define _IDLOC2 0x2002
545 #define _IDLOC3 0x2003
546
547 //==============================================================================
548
549 #ifndef NO_BIT_DEFINES
550
551 #define CM0 CMCONbits.CM0 // bit 0
552 #define CM1 CMCONbits.CM1 // bit 1
553 #define CM2 CMCONbits.CM2 // bit 2
554 #define CIS CMCONbits.CIS // bit 3
555 #define C1OUT CMCONbits.C1OUT // bit 6
556 #define C2OUT CMCONbits.C2OUT // bit 7
557
558 #define RBIF INTCONbits.RBIF // bit 0
559 #define INTF INTCONbits.INTF // bit 1
560 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
561 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
562 #define RBIE INTCONbits.RBIE // bit 3
563 #define INTE INTCONbits.INTE // bit 4
564 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
565 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
566 #define PEIE INTCONbits.PEIE // bit 6
567 #define GIE INTCONbits.GIE // bit 7
568
569 #define LINVDD LININTFbits.LINVDD // bit 0
570 #define LINTX LININTFbits.LINTX // bit 2
571
572 #define PS0 OPTION_REGbits.PS0 // bit 0
573 #define PS1 OPTION_REGbits.PS1 // bit 1
574 #define PS2 OPTION_REGbits.PS2 // bit 2
575 #define PSA OPTION_REGbits.PSA // bit 3
576 #define T0SE OPTION_REGbits.T0SE // bit 4
577 #define T0CS OPTION_REGbits.T0CS // bit 5
578 #define INTEDG OPTION_REGbits.INTEDG // bit 6
579 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
580
581 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
582 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
583 #define NOT_POR PCONbits.NOT_POR // bit 1
584
585 #define CMIE PIE1bits.CMIE // bit 6
586
587 #define CMIF PIR1bits.CMIF // bit 6
588
589 #define RA0 PORTAbits.RA0 // bit 0
590 #define LINRX PORTAbits.LINRX // bit 1
591 #define RA2 PORTAbits.RA2 // bit 2
592 #define RA3 PORTAbits.RA3 // bit 3
593 #define RA4 PORTAbits.RA4 // bit 4
594
595 #define RB0 PORTBbits.RB0 // bit 0
596 #define RB1 PORTBbits.RB1 // bit 1
597 #define RB2 PORTBbits.RB2 // bit 2
598 #define RB3 PORTBbits.RB3 // bit 3
599 #define RB4 PORTBbits.RB4 // bit 4
600 #define RB5 PORTBbits.RB5 // bit 5
601 #define RB6 PORTBbits.RB6 // bit 6
602 #define RB7 PORTBbits.RB7 // bit 7
603
604 #define C STATUSbits.C // bit 0
605 #define DC STATUSbits.DC // bit 1
606 #define Z STATUSbits.Z // bit 2
607 #define NOT_PD STATUSbits.NOT_PD // bit 3
608 #define NOT_TO STATUSbits.NOT_TO // bit 4
609 #define RP0 STATUSbits.RP0 // bit 5
610 #define RP1 STATUSbits.RP1 // bit 6
611 #define IRP STATUSbits.IRP // bit 7
612
613 #define TRISA0 TRISAbits.TRISA0 // bit 0
614 #define TLINRX TRISAbits.TLINRX // bit 1
615 #define TRISA2 TRISAbits.TRISA2 // bit 2
616 #define TRISA3 TRISAbits.TRISA3 // bit 3
617 #define TRISA4 TRISAbits.TRISA4 // bit 4
618
619 #define TRISB0 TRISBbits.TRISB0 // bit 0
620 #define TRISB1 TRISBbits.TRISB1 // bit 1
621 #define TRISB2 TRISBbits.TRISB2 // bit 2
622 #define TRISB3 TRISBbits.TRISB3 // bit 3
623 #define TRISB4 TRISBbits.TRISB4 // bit 4
624 #define TRISB5 TRISBbits.TRISB5 // bit 5
625 #define TRISB6 TRISBbits.TRISB6 // bit 6
626 #define TRISB7 TRISBbits.TRISB7 // bit 7
627
628 #define VR0 VRCONbits.VR0 // bit 0
629 #define VR1 VRCONbits.VR1 // bit 1
630 #define VR2 VRCONbits.VR2 // bit 2
631 #define VR3 VRCONbits.VR3 // bit 3
632 #define VRR VRCONbits.VRR // bit 5
633 #define VROE VRCONbits.VROE // bit 6
634 #define VREN VRCONbits.VREN // bit 7
635
636 #endif // #ifndef NO_BIT_DEFINES
637
638 #endif // #ifndef __PIC16C432_H__
SDCC git mirror