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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16c433.h
blob7e60d71105db2a39dc29752ff57711a2f59d136b
1 /*
2 * This declarations of the PIC16C433 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:02 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16C433_H__
26 #define __PIC16C433_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define GPIO_ADDR 0x0005
42 #define PCLATH_ADDR 0x000A
43 #define INTCON_ADDR 0x000B
44 #define PIR1_ADDR 0x000C
45 #define ADRES_ADDR 0x001E
46 #define ADCON0_ADDR 0x001F
47 #define OPTION_REG_ADDR 0x0081
48 #define TRISIO_ADDR 0x0085
49 #define PIE1_ADDR 0x008C
50 #define PCON_ADDR 0x008E
51 #define OSCCAL_ADDR 0x008F
52 #define ADCON1_ADDR 0x009F
53
54 #endif // #ifndef NO_ADDR_DEFINES
55
56 //==============================================================================
57 //
58 // Register Definitions
59 //
60 //==============================================================================
61
62
63 //==============================================================================
64 // TRIS Bits
65
66 #define _TRIS0 0x01
67 #define _TRIS1 0x02
68 #define _TRIS2 0x04
69 #define _TRIS3 0x08
70 #define _TRIS4 0x10
71 #define _TRIS5 0x20
72
73 //==============================================================================
74
75 extern __at(0x0000) __sfr INDF;
76 extern __at(0x0001) __sfr TMR0;
77 extern __at(0x0002) __sfr PCL;
78
79 //==============================================================================
80 // STATUS Bits
81
82 extern __at(0x0003) __sfr STATUS;
83
84 typedef union
85 {
86 struct
87 {
88 unsigned C : 1;
89 unsigned DC : 1;
90 unsigned Z : 1;
91 unsigned NOT_PD : 1;
92 unsigned NOT_TO : 1;
93 unsigned RP0 : 1;
94 unsigned RP1 : 1;
95 unsigned IRP : 1;
96 };
97
98 struct
99 {
100 unsigned : 1;
101 unsigned : 1;
102 unsigned : 1;
103 unsigned : 1;
104 unsigned : 1;
105 unsigned : 1;
106 unsigned LINRX : 1;
107 unsigned LINTX : 1;
108 };
109
110 struct
111 {
112 unsigned : 5;
113 unsigned RP : 2;
114 unsigned : 1;
115 };
116 } __STATUSbits_t;
117
118 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
119
120 #define _STATUS_C 0x01
121 #define _STATUS_DC 0x02
122 #define _STATUS_Z 0x04
123 #define _STATUS_NOT_PD 0x08
124 #define _STATUS_NOT_TO 0x10
125 #define _STATUS_RP0 0x20
126 #define _STATUS_RP1 0x40
127 #define _STATUS_LINRX 0x40
128 #define _STATUS_IRP 0x80
129 #define _STATUS_LINTX 0x80
130
131 //==============================================================================
132
133 extern __at(0x0004) __sfr FSR;
134
135 //==============================================================================
136 // GPIO Bits
137
138 extern __at(0x0005) __sfr GPIO;
139
140 typedef union
141 {
142 struct
143 {
144 unsigned GP0 : 1;
145 unsigned GP1 : 1;
146 unsigned GP2 : 1;
147 unsigned GP3 : 1;
148 unsigned GP4 : 1;
149 unsigned GP5 : 1;
150 unsigned LINRX : 1;
151 unsigned LINTX : 1;
152 };
153
154 struct
155 {
156 unsigned GP : 6;
157 unsigned : 2;
158 };
159 } __GPIObits_t;
160
161 extern __at(0x0005) volatile __GPIObits_t GPIObits;
162
163 #define _GP0 0x01
164 #define _GP1 0x02
165 #define _GP2 0x04
166 #define _GP3 0x08
167 #define _GP4 0x10
168 #define _GP5 0x20
169 #define _LINRX 0x40
170 #define _LINTX 0x80
171
172 //==============================================================================
173
174 extern __at(0x000A) __sfr PCLATH;
175
176 //==============================================================================
177 // INTCON Bits
178
179 extern __at(0x000B) __sfr INTCON;
180
181 typedef union
182 {
183 struct
184 {
185 unsigned GPIF : 1;
186 unsigned INTF : 1;
187 unsigned T0IF : 1;
188 unsigned GPIE : 1;
189 unsigned INTE : 1;
190 unsigned T0IE : 1;
191 unsigned PEIE : 1;
192 unsigned GIE : 1;
193 };
194
195 struct
196 {
197 unsigned : 1;
198 unsigned : 1;
199 unsigned TMR0IF : 1;
200 unsigned : 1;
201 unsigned : 1;
202 unsigned TMR0IE : 1;
203 unsigned : 1;
204 unsigned : 1;
205 };
206 } __INTCONbits_t;
207
208 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
209
210 #define _GPIF 0x01
211 #define _INTF 0x02
212 #define _T0IF 0x04
213 #define _TMR0IF 0x04
214 #define _GPIE 0x08
215 #define _INTE 0x10
216 #define _T0IE 0x20
217 #define _TMR0IE 0x20
218 #define _PEIE 0x40
219 #define _GIE 0x80
220
221 //==============================================================================
222
223
224 //==============================================================================
225 // PIR1 Bits
226
227 extern __at(0x000C) __sfr PIR1;
228
229 typedef struct
230 {
231 unsigned : 1;
232 unsigned : 1;
233 unsigned : 1;
234 unsigned : 1;
235 unsigned : 1;
236 unsigned : 1;
237 unsigned ADIF : 1;
238 unsigned : 1;
239 } __PIR1bits_t;
240
241 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
242
243 #define _ADIF 0x40
244
245 //==============================================================================
246
247 extern __at(0x001E) __sfr ADRES;
248
249 //==============================================================================
250 // ADCON0 Bits
251
252 extern __at(0x001F) __sfr ADCON0;
253
254 typedef union
255 {
256 struct
257 {
258 unsigned ADON : 1;
259 unsigned : 1;
260 unsigned GO_NOT_DONE : 1;
261 unsigned CHS0 : 1;
262 unsigned CHS1 : 1;
263 unsigned : 1;
264 unsigned ADCS0 : 1;
265 unsigned ADCS1 : 1;
266 };
267
268 struct
269 {
270 unsigned : 1;
271 unsigned : 1;
272 unsigned GO : 1;
273 unsigned : 1;
274 unsigned : 1;
275 unsigned : 1;
276 unsigned : 1;
277 unsigned : 1;
278 };
279
280 struct
281 {
282 unsigned : 1;
283 unsigned : 1;
284 unsigned NOT_DONE : 1;
285 unsigned : 1;
286 unsigned : 1;
287 unsigned : 1;
288 unsigned : 1;
289 unsigned : 1;
290 };
291
292 struct
293 {
294 unsigned : 1;
295 unsigned : 1;
296 unsigned GO_DONE : 1;
297 unsigned : 1;
298 unsigned : 1;
299 unsigned : 1;
300 unsigned : 1;
301 unsigned : 1;
302 };
303
304 struct
305 {
306 unsigned : 3;
307 unsigned CHS : 2;
308 unsigned : 3;
309 };
310
311 struct
312 {
313 unsigned : 6;
314 unsigned ADCS : 2;
315 };
316 } __ADCON0bits_t;
317
318 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
319
320 #define _ADON 0x01
321 #define _GO_NOT_DONE 0x04
322 #define _GO 0x04
323 #define _NOT_DONE 0x04
324 #define _GO_DONE 0x04
325 #define _CHS0 0x08
326 #define _CHS1 0x10
327 #define _ADCS0 0x40
328 #define _ADCS1 0x80
329
330 //==============================================================================
331
332
333 //==============================================================================
334 // OPTION_REG Bits
335
336 extern __at(0x0081) __sfr OPTION_REG;
337
338 typedef union
339 {
340 struct
341 {
342 unsigned PS0 : 1;
343 unsigned PS1 : 1;
344 unsigned PS2 : 1;
345 unsigned PSA : 1;
346 unsigned T0SE : 1;
347 unsigned T0CS : 1;
348 unsigned INTEDG : 1;
349 unsigned NOT_GPPU : 1;
350 };
351
352 struct
353 {
354 unsigned PS : 3;
355 unsigned : 5;
356 };
357 } __OPTION_REGbits_t;
358
359 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
360
361 #define _PS0 0x01
362 #define _PS1 0x02
363 #define _PS2 0x04
364 #define _PSA 0x08
365 #define _T0SE 0x10
366 #define _T0CS 0x20
367 #define _INTEDG 0x40
368 #define _NOT_GPPU 0x80
369
370 //==============================================================================
371
372
373 //==============================================================================
374 // TRISIO Bits
375
376 extern __at(0x0085) __sfr TRISIO;
377
378 typedef union
379 {
380 struct
381 {
382 unsigned TRIS0 : 1;
383 unsigned TRIS1 : 1;
384 unsigned TRIS2 : 1;
385 unsigned TRIS3 : 1;
386 unsigned TRIS4 : 1;
387 unsigned TRIS5 : 1;
388 unsigned : 1;
389 unsigned : 1;
390 };
391
392 struct
393 {
394 unsigned TRIS : 6;
395 unsigned : 2;
396 };
397 } __TRISIObits_t;
398
399 extern __at(0x0085) volatile __TRISIObits_t TRISIObits;
400
401 #define _TRISIO_TRIS0 0x01
402 #define _TRISIO_TRIS1 0x02
403 #define _TRISIO_TRIS2 0x04
404 #define _TRISIO_TRIS3 0x08
405 #define _TRISIO_TRIS4 0x10
406 #define _TRISIO_TRIS5 0x20
407
408 //==============================================================================
409
410
411 //==============================================================================
412 // PIE1 Bits
413
414 extern __at(0x008C) __sfr PIE1;
415
416 typedef struct
417 {
418 unsigned : 1;
419 unsigned : 1;
420 unsigned : 1;
421 unsigned : 1;
422 unsigned : 1;
423 unsigned : 1;
424 unsigned ADIE : 1;
425 unsigned : 1;
426 } __PIE1bits_t;
427
428 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
429
430 #define _ADIE 0x40
431
432 //==============================================================================
433
434
435 //==============================================================================
436 // PCON Bits
437
438 extern __at(0x008E) __sfr PCON;
439
440 typedef struct
441 {
442 unsigned : 1;
443 unsigned NOT_POR : 1;
444 unsigned : 1;
445 unsigned : 1;
446 unsigned : 1;
447 unsigned : 1;
448 unsigned : 1;
449 unsigned : 1;
450 } __PCONbits_t;
451
452 extern __at(0x008E) volatile __PCONbits_t PCONbits;
453
454 #define _NOT_POR 0x02
455
456 //==============================================================================
457
458
459 //==============================================================================
460 // OSCCAL Bits
461
462 extern __at(0x008F) __sfr OSCCAL;
463
464 typedef union
465 {
466 struct
467 {
468 unsigned : 1;
469 unsigned : 1;
470 unsigned CALSLW : 1;
471 unsigned CALFST : 1;
472 unsigned CAL0 : 1;
473 unsigned CAL1 : 1;
474 unsigned CAL2 : 1;
475 unsigned CAL3 : 1;
476 };
477
478 struct
479 {
480 unsigned : 4;
481 unsigned CAL : 4;
482 };
483 } __OSCCALbits_t;
484
485 extern __at(0x008F) volatile __OSCCALbits_t OSCCALbits;
486
487 #define _CALSLW 0x04
488 #define _CALFST 0x08
489 #define _CAL0 0x10
490 #define _CAL1 0x20
491 #define _CAL2 0x40
492 #define _CAL3 0x80
493
494 //==============================================================================
495
496
497 //==============================================================================
498 // ADCON1 Bits
499
500 extern __at(0x009F) __sfr ADCON1;
501
502 typedef union
503 {
504 struct
505 {
506 unsigned PCFG0 : 1;
507 unsigned PCFG1 : 1;
508 unsigned PCFG2 : 1;
509 unsigned : 1;
510 unsigned : 1;
511 unsigned : 1;
512 unsigned : 1;
513 unsigned : 1;
514 };
515
516 struct
517 {
518 unsigned PCFG : 3;
519 unsigned : 5;
520 };
521 } __ADCON1bits_t;
522
523 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
524
525 #define _PCFG0 0x01
526 #define _PCFG1 0x02
527 #define _PCFG2 0x04
528
529 //==============================================================================
530
531
532 //==============================================================================
533 //
534 // Configuration Bits
535 //
536 //==============================================================================
537
538 #define _CONFIG1 0x2007
539
540 //----------------------------- CONFIG1 Options -------------------------------
541
542 #define _FOSC_LP 0x3FF8 // LP oscillator.
543 #define _LP_OSC 0x3FF8 // LP oscillator.
544 #define _FOSC_XT 0x3FF9 // XT oscillator.
545 #define _XT_OSC 0x3FF9 // XT oscillator.
546 #define _FOSC_HS 0x3FFA // HS oscillator.
547 #define _HS_OSC 0x3FFA // HS oscillator.
548 #define _FOSC_EXTCLK 0x3FFB // EC I/O.
549 #define _EXTCLK_OSC 0x3FFB // EC I/O.
550 #define _FOSC_INTRCIO 0x3FFC // INTRC, OSC2 is I/O.
551 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTRC, OSC2 is I/O.
552 #define _INTRC_OSC 0x3FFC // INTRC, OSC2 is I/O.
553 #define _FOSC_INTRCCLK 0x3FFD // INTRC, clockout on OSC2.
554 #define _INTRC_OSC_CLKOUT 0x3FFD // INTRC, clockout on OSC2.
555 #define _FOSC_EXTRCIO 0x3FFE // EXTRC, OSC2 is I/O.
556 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // EXTRC, OSC2 is I/O.
557 #define _EXTRC_OSC 0x3FFE // EXTRC, OSC2 is I/O.
558 #define _FOSC_EXTRCCLK 0x3FFF // EXTRC, clockout on OSC2.
559 #define _EXTRC_OSC_CLKOUT 0x3FFF // EXTRC, clockout on OSC2.
560 #define _WDTE_OFF 0x3FF7 // WDT disabled.
561 #define _WDT_OFF 0x3FF7 // WDT disabled.
562 #define _WDTE_ON 0x3FFF // WDT enabled.
563 #define _WDT_ON 0x3FFF // WDT enabled.
564 #define _PWRTE_ON 0x3FEF // PWRT enabled.
565 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
566 #define _CP_ALL 0x009F // All memory is code protected.
567 #define _CP_75 0x15BF // 0200h-07FEh code protected.
568 #define _CP_50 0x2ADF // 0400h-07FEh code protected.
569 #define _CP_OFF 0x3FFF // Code protection off.
570 #define _MCLRE_OFF 0x3F7F // Internal.
571 #define _MCLRE_ON 0x3FFF // External.
572
573 //==============================================================================
574
575 #define _IDLOC0 0x2000
576 #define _IDLOC1 0x2001
577 #define _IDLOC2 0x2002
578 #define _IDLOC3 0x2003
579
580 //==============================================================================
581
582 #ifndef NO_BIT_DEFINES
583
584 #define ADON ADCON0bits.ADON // bit 0
585 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
586 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
587 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
588 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
589 #define CHS0 ADCON0bits.CHS0 // bit 3
590 #define CHS1 ADCON0bits.CHS1 // bit 4
591 #define ADCS0 ADCON0bits.ADCS0 // bit 6
592 #define ADCS1 ADCON0bits.ADCS1 // bit 7
593
594 #define PCFG0 ADCON1bits.PCFG0 // bit 0
595 #define PCFG1 ADCON1bits.PCFG1 // bit 1
596 #define PCFG2 ADCON1bits.PCFG2 // bit 2
597
598 #define GP0 GPIObits.GP0 // bit 0
599 #define GP1 GPIObits.GP1 // bit 1
600 #define GP2 GPIObits.GP2 // bit 2
601 #define GP3 GPIObits.GP3 // bit 3
602 #define GP4 GPIObits.GP4 // bit 4
603 #define GP5 GPIObits.GP5 // bit 5
604 #define LINRX GPIObits.LINRX // bit 6
605 #define LINTX GPIObits.LINTX // bit 7
606
607 #define GPIF INTCONbits.GPIF // bit 0
608 #define INTF INTCONbits.INTF // bit 1
609 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
610 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
611 #define GPIE INTCONbits.GPIE // bit 3
612 #define INTE INTCONbits.INTE // bit 4
613 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
614 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
615 #define PEIE INTCONbits.PEIE // bit 6
616 #define GIE INTCONbits.GIE // bit 7
617
618 #define PS0 OPTION_REGbits.PS0 // bit 0
619 #define PS1 OPTION_REGbits.PS1 // bit 1
620 #define PS2 OPTION_REGbits.PS2 // bit 2
621 #define PSA OPTION_REGbits.PSA // bit 3
622 #define T0SE OPTION_REGbits.T0SE // bit 4
623 #define T0CS OPTION_REGbits.T0CS // bit 5
624 #define INTEDG OPTION_REGbits.INTEDG // bit 6
625 #define NOT_GPPU OPTION_REGbits.NOT_GPPU // bit 7
626
627 #define CALSLW OSCCALbits.CALSLW // bit 2
628 #define CALFST OSCCALbits.CALFST // bit 3
629 #define CAL0 OSCCALbits.CAL0 // bit 4
630 #define CAL1 OSCCALbits.CAL1 // bit 5
631 #define CAL2 OSCCALbits.CAL2 // bit 6
632 #define CAL3 OSCCALbits.CAL3 // bit 7
633
634 #define NOT_POR PCONbits.NOT_POR // bit 1
635
636 #define ADIE PIE1bits.ADIE // bit 6
637
638 #define ADIF PIR1bits.ADIF // bit 6
639
640 #define TRIS0 TRISbits.TRIS0 // bit 0
641 #define TRIS1 TRISbits.TRIS1 // bit 1
642 #define TRIS2 TRISbits.TRIS2 // bit 2
643 #define TRIS3 TRISbits.TRIS3 // bit 3
644 #define TRIS4 TRISbits.TRIS4 // bit 4
645 #define TRIS5 TRISbits.TRIS5 // bit 5
646
647 #endif // #ifndef NO_BIT_DEFINES
648
649 #endif // #ifndef __PIC16C433_H__
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