2 * This declarations of the PIC16C745 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:03 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16C745_H__
26 #define __PIC16C745_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define PIR2_ADDR 0x000D
48 #define TMR1_ADDR 0x000E
49 #define TMR1L_ADDR 0x000E
50 #define TMR1H_ADDR 0x000F
51 #define T1CON_ADDR 0x0010
52 #define TMR2_ADDR 0x0011
53 #define T2CON_ADDR 0x0012
54 #define CCPR1_ADDR 0x0015
55 #define CCPR1L_ADDR 0x0015
56 #define CCPR1H_ADDR 0x0016
57 #define CCP1CON_ADDR 0x0017
58 #define RCSTA_ADDR 0x0018
59 #define TXREG_ADDR 0x0019
60 #define RCREG_ADDR 0x001A
61 #define CCPR2_ADDR 0x001B
62 #define CCPR2L_ADDR 0x001B
63 #define CCPR2H_ADDR 0x001C
64 #define CCP2CON_ADDR 0x001D
65 #define ADRES_ADDR 0x001E
66 #define ADCON0_ADDR 0x001F
67 #define OPTION_REG_ADDR 0x0081
68 #define TRISA_ADDR 0x0085
69 #define TRISB_ADDR 0x0086
70 #define TRISC_ADDR 0x0087
71 #define PIE1_ADDR 0x008C
72 #define PIE2_ADDR 0x008D
73 #define PCON_ADDR 0x008E
74 #define PR2_ADDR 0x0092
75 #define TXSTA_ADDR 0x0098
76 #define SPBRG_ADDR 0x0099
77 #define ADCON1_ADDR 0x009F
78 #define UIR_ADDR 0x0190
79 #define UIE_ADDR 0x0191
80 #define UEIR_ADDR 0x0192
81 #define UEIE_ADDR 0x0193
82 #define USTAT_ADDR 0x0194
83 #define UCTRL_ADDR 0x0195
84 #define UADDR_ADDR 0x0196
85 #define USWSTAT_ADDR 0x0197
86 #define UEP0_ADDR 0x0198
87 #define UEP1_ADDR 0x0199
88 #define UEP2_ADDR 0x019A
89 #define BD0OST_ADDR 0x01A0
90 #define BD0OBC_ADDR 0x01A1
91 #define BD0OAL_ADDR 0x01A2
92 #define BD0IST_ADDR 0x01A4
93 #define BD0IBC_ADDR 0x01A5
94 #define BD0IAL_ADDR 0x01A6
95 #define BD1OST_ADDR 0x01A8
96 #define BD1OBC_ADDR 0x01A9
97 #define BD1OAL_ADDR 0x01AA
98 #define BD1IST_ADDR 0x01AC
99 #define BD1IBC_ADDR 0x01AD
100 #define BD1IAL_ADDR 0x01AE
101 #define BD2OST_ADDR 0x01B0
102 #define BD2OBC_ADDR 0x01B1
103 #define BD2OAL_ADDR 0x01B2
104 #define BD2IST_ADDR 0x01B4
105 #define BD2IBC_ADDR 0x01B5
106 #define BD2IAL_ADDR 0x01B6
108 #endif // #ifndef NO_ADDR_DEFINES
110 //==============================================================================
112 // Register Definitions
114 //==============================================================================
116 extern __at(0x0000) __sfr INDF
;
117 extern __at(0x0001) __sfr TMR0
;
118 extern __at(0x0002) __sfr PCL
;
120 //==============================================================================
123 extern __at(0x0003) __sfr STATUS
;
147 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
158 //==============================================================================
160 extern __at(0x0004) __sfr FSR
;
162 //==============================================================================
165 extern __at(0x0005) __sfr PORTA
;
188 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
197 //==============================================================================
200 //==============================================================================
203 extern __at(0x0006) __sfr PORTB
;
217 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
228 //==============================================================================
231 //==============================================================================
234 extern __at(0x0007) __sfr PORTC
;
248 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
256 //==============================================================================
258 extern __at(0x000A) __sfr PCLATH
;
260 //==============================================================================
263 extern __at(0x000B) __sfr INTCON
;
292 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
305 //==============================================================================
308 //==============================================================================
311 extern __at(0x000C) __sfr PIR1
;
325 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
335 //==============================================================================
338 //==============================================================================
341 extern __at(0x000D) __sfr PIR2
;
355 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
359 //==============================================================================
361 extern __at(0x000E) __sfr TMR1
;
362 extern __at(0x000E) __sfr TMR1L
;
363 extern __at(0x000F) __sfr TMR1H
;
365 //==============================================================================
368 extern __at(0x0010) __sfr T1CON
;
376 unsigned NOT_T1SYNC
: 1;
377 unsigned T1OSCEN
: 1;
378 unsigned T1CKPS0
: 1;
379 unsigned T1CKPS1
: 1;
388 unsigned T1INSYNC
: 1;
404 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
408 #define _NOT_T1SYNC 0x04
409 #define _T1INSYNC 0x04
410 #define _T1OSCEN 0x08
411 #define _T1CKPS0 0x10
412 #define _T1CKPS1 0x20
414 //==============================================================================
416 extern __at(0x0011) __sfr TMR2
;
418 //==============================================================================
421 extern __at(0x0012) __sfr T2CON
;
427 unsigned T2CKPS0
: 1;
428 unsigned T2CKPS1
: 1;
430 unsigned TOUTPS0
: 1;
431 unsigned TOUTPS1
: 1;
432 unsigned TOUTPS2
: 1;
433 unsigned TOUTPS3
: 1;
451 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
453 #define _T2CKPS0 0x01
454 #define _T2CKPS1 0x02
456 #define _TOUTPS0 0x08
457 #define _TOUTPS1 0x10
458 #define _TOUTPS2 0x20
459 #define _TOUTPS3 0x40
461 //==============================================================================
463 extern __at(0x0015) __sfr CCPR1
;
464 extern __at(0x0015) __sfr CCPR1L
;
465 extern __at(0x0016) __sfr CCPR1H
;
467 //==============================================================================
470 extern __at(0x0017) __sfr CCP1CON
;
500 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
509 //==============================================================================
512 //==============================================================================
515 extern __at(0x0018) __sfr RCSTA
;
551 unsigned NOT_RC8
: 1;
568 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
578 #define _NOT_RC8 0x40
582 //==============================================================================
584 extern __at(0x0019) __sfr TXREG
;
585 extern __at(0x001A) __sfr RCREG
;
586 extern __at(0x001B) __sfr CCPR2
;
587 extern __at(0x001B) __sfr CCPR2L
;
588 extern __at(0x001C) __sfr CCPR2H
;
590 //==============================================================================
593 extern __at(0x001D) __sfr CCP2CON
;
623 extern __at(0x001D) volatile __CCP2CONbits_t CCP2CONbits
;
632 //==============================================================================
634 extern __at(0x001E) __sfr ADRES
;
636 //==============================================================================
639 extern __at(0x001F) __sfr ADCON0
;
647 unsigned GO_NOT_DONE
: 1;
671 unsigned NOT_DONE
: 1;
683 unsigned GO_DONE
: 1;
705 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
708 #define _GO_NOT_DONE 0x04
710 #define _NOT_DONE 0x04
711 #define _GO_DONE 0x04
718 //==============================================================================
721 //==============================================================================
724 extern __at(0x0081) __sfr OPTION_REG
;
737 unsigned NOT_RBPU
: 1;
745 } __OPTION_REGbits_t
;
747 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
756 #define _NOT_RBPU 0x80
758 //==============================================================================
761 //==============================================================================
764 extern __at(0x0085) __sfr TRISA
;
787 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
796 //==============================================================================
799 //==============================================================================
802 extern __at(0x0086) __sfr TRISB
;
816 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
827 //==============================================================================
830 //==============================================================================
833 extern __at(0x0087) __sfr TRISC
;
847 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
855 //==============================================================================
858 //==============================================================================
861 extern __at(0x008C) __sfr PIE1
;
875 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
885 //==============================================================================
888 //==============================================================================
891 extern __at(0x008D) __sfr PIE2
;
905 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
909 //==============================================================================
912 //==============================================================================
915 extern __at(0x008E) __sfr PCON
;
921 unsigned NOT_BOR
: 1;
922 unsigned NOT_POR
: 1;
944 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
946 #define _NOT_BOR 0x01
948 #define _NOT_POR 0x02
950 //==============================================================================
952 extern __at(0x0092) __sfr PR2
;
954 //==============================================================================
957 extern __at(0x0098) __sfr TXSTA
;
981 unsigned NOT_TX8
: 1;
998 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
1007 #define _NOT_TX8 0x40
1011 //==============================================================================
1013 extern __at(0x0099) __sfr SPBRG
;
1015 //==============================================================================
1018 extern __at(0x009F) __sfr ADCON1
;
1041 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1047 //==============================================================================
1050 //==============================================================================
1053 extern __at(0x0190) __sfr UIR
;
1057 unsigned USB_RST
: 1;
1059 unsigned ACTIVITY
: 1;
1060 unsigned TOK_DNE
: 1;
1067 extern __at(0x0190) volatile __UIRbits_t UIRbits
;
1069 #define _UIR_USB_RST 0x01
1070 #define _UIR_UERR 0x02
1071 #define _UIR_ACTIVITY 0x04
1072 #define _UIR_TOK_DNE 0x08
1073 #define _UIR_UIDLE 0x10
1074 #define _UIR_STALL 0x20
1076 //==============================================================================
1079 //==============================================================================
1082 extern __at(0x0191) __sfr UIE
;
1086 unsigned USB_RST
: 1;
1088 unsigned ACTIVITY
: 1;
1089 unsigned TOK_DNE
: 1;
1096 extern __at(0x0191) volatile __UIEbits_t UIEbits
;
1098 #define _USB_RST 0x01
1100 #define _ACTIVITY 0x04
1101 #define _TOK_DNE 0x08
1105 //==============================================================================
1108 //==============================================================================
1111 extern __at(0x0192) __sfr UEIR
;
1115 unsigned PID_ERR
: 1;
1119 unsigned BTO_ERR
: 1;
1120 unsigned WRT_ERR
: 1;
1121 unsigned OWN_ERR
: 1;
1122 unsigned BTS_ERR
: 1;
1125 extern __at(0x0192) volatile __UEIRbits_t UEIRbits
;
1127 #define _UEIR_PID_ERR 0x01
1128 #define _UEIR_CRC5 0x02
1129 #define _UEIR_CRC16 0x04
1130 #define _UEIR_DFN8 0x08
1131 #define _UEIR_BTO_ERR 0x10
1132 #define _UEIR_WRT_ERR 0x20
1133 #define _UEIR_OWN_ERR 0x40
1134 #define _UEIR_BTS_ERR 0x80
1136 //==============================================================================
1139 //==============================================================================
1142 extern __at(0x0193) __sfr UEIE
;
1146 unsigned PID_ERR
: 1;
1150 unsigned BTO_ERR
: 1;
1151 unsigned WRT_ERR
: 1;
1152 unsigned OWN_ERR
: 1;
1153 unsigned BTS_ERR
: 1;
1156 extern __at(0x0193) volatile __UEIEbits_t UEIEbits
;
1158 #define _PID_ERR 0x01
1162 #define _BTO_ERR 0x10
1163 #define _WRT_ERR 0x20
1164 #define _OWN_ERR 0x40
1165 #define _BTS_ERR 0x80
1167 //==============================================================================
1170 //==============================================================================
1173 extern __at(0x0194) __sfr USTAT
;
1197 extern __at(0x0194) volatile __USTATbits_t USTATbits
;
1203 //==============================================================================
1206 //==============================================================================
1209 extern __at(0x0195) __sfr UCTRL
;
1214 unsigned SUSPND
: 1;
1215 unsigned RESUME
: 1;
1216 unsigned DEV_ATT
: 1;
1217 unsigned PKT_DIS
: 1;
1223 extern __at(0x0195) volatile __UCTRLbits_t UCTRLbits
;
1225 #define _SUSPND 0x02
1226 #define _RESUME 0x04
1227 #define _DEV_ATT 0x08
1228 #define _PKT_DIS 0x10
1231 //==============================================================================
1233 extern __at(0x0196) __sfr UADDR
;
1234 extern __at(0x0197) __sfr USWSTAT
;
1236 //==============================================================================
1239 extern __at(0x0198) __sfr UEP0
;
1243 unsigned EP_STALL
: 1;
1244 unsigned EP_IN_EN
: 1;
1245 unsigned EP_OUT_EN
: 1;
1246 unsigned EP_CTL_DIS
: 1;
1253 extern __at(0x0198) volatile __UEP0bits_t UEP0bits
;
1255 #define _EP_STALL 0x01
1256 #define _EP_IN_EN 0x02
1257 #define _EP_OUT_EN 0x04
1258 #define _EP_CTL_DIS 0x08
1260 //==============================================================================
1263 //==============================================================================
1266 extern __at(0x0199) __sfr UEP1
;
1270 unsigned EP_STALL
: 1;
1271 unsigned EP_IN_EN
: 1;
1272 unsigned EP_OUT_EN
: 1;
1273 unsigned EP_CTL_DIS
: 1;
1280 extern __at(0x0199) volatile __UEP1bits_t UEP1bits
;
1282 #define _UEP1_EP_STALL 0x01
1283 #define _UEP1_EP_IN_EN 0x02
1284 #define _UEP1_EP_OUT_EN 0x04
1285 #define _UEP1_EP_CTL_DIS 0x08
1287 //==============================================================================
1290 //==============================================================================
1293 extern __at(0x019A) __sfr UEP2
;
1297 unsigned EP_STALL
: 1;
1298 unsigned EP_IN_EN
: 1;
1299 unsigned EP_OUT_EN
: 1;
1300 unsigned EP_CTL_DIS
: 1;
1307 extern __at(0x019A) volatile __UEP2bits_t UEP2bits
;
1309 #define _UEP2_EP_STALL 0x01
1310 #define _UEP2_EP_IN_EN 0x02
1311 #define _UEP2_EP_OUT_EN 0x04
1312 #define _UEP2_EP_CTL_DIS 0x08
1314 //==============================================================================
1317 //==============================================================================
1320 extern __at(0x01A0) __sfr BD0OST
;
1328 unsigned PID0_BSTALL
: 1;
1329 unsigned PID1_DTS
: 1;
1332 unsigned DATA0_1
: 1;
1344 unsigned DATA01
: 1;
1352 unsigned BSTALL
: 1;
1368 extern __at(0x01A0) volatile __BD0OSTbits_t BD0OSTbits
;
1370 #define _BD0OST_PID0_BSTALL 0x04
1371 #define _BD0OST_PID0 0x04
1372 #define _BD0OST_BSTALL 0x04
1373 #define _BD0OST_PID1_DTS 0x08
1374 #define _BD0OST_PID1 0x08
1375 #define _BD0OST_DTS 0x08
1376 #define _BD0OST_PID2 0x10
1377 #define _BD0OST_PID3 0x20
1378 #define _BD0OST_DATA0_1 0x40
1379 #define _BD0OST_DATA01 0x40
1380 #define _BD0OST_UOWN 0x80
1381 #define _BD0OST_OWN 0x80
1383 //==============================================================================
1385 extern __at(0x01A1) __sfr BD0OBC
;
1386 extern __at(0x01A2) __sfr BD0OAL
;
1388 //==============================================================================
1391 extern __at(0x01A4) __sfr BD0IST
;
1399 unsigned PID0_BSTALL
: 1;
1400 unsigned PID1_DTS
: 1;
1403 unsigned DATA0_1
: 1;
1415 unsigned DATA01
: 1;
1423 unsigned BSTALL
: 1;
1439 extern __at(0x01A4) volatile __BD0ISTbits_t BD0ISTbits
;
1441 #define _PID0_BSTALL 0x04
1443 #define _BSTALL 0x04
1444 #define _PID1_DTS 0x08
1449 #define _DATA0_1 0x40
1450 #define _DATA01 0x40
1454 //==============================================================================
1457 //==============================================================================
1460 extern __at(0x01A5) __sfr BD0IBC
;
1483 extern __at(0x01A5) volatile __BD0IBCbits_t BD0IBCbits
;
1490 //==============================================================================
1492 extern __at(0x01A6) __sfr BD0IAL
;
1494 //==============================================================================
1497 extern __at(0x01A8) __sfr BD1OST
;
1505 unsigned PID0_BSTALL
: 1;
1506 unsigned PID1_DTS
: 1;
1509 unsigned DATA0_1
: 1;
1521 unsigned DATA01
: 1;
1529 unsigned BSTALL
: 1;
1545 extern __at(0x01A8) volatile __BD1OSTbits_t BD1OSTbits
;
1547 #define _BD1OST_PID0_BSTALL 0x04
1548 #define _BD1OST_PID0 0x04
1549 #define _BD1OST_BSTALL 0x04
1550 #define _BD1OST_PID1_DTS 0x08
1551 #define _BD1OST_PID1 0x08
1552 #define _BD1OST_DTS 0x08
1553 #define _BD1OST_PID2 0x10
1554 #define _BD1OST_PID3 0x20
1555 #define _BD1OST_DATA0_1 0x40
1556 #define _BD1OST_DATA01 0x40
1557 #define _BD1OST_UOWN 0x80
1558 #define _BD1OST_OWN 0x80
1560 //==============================================================================
1563 //==============================================================================
1566 extern __at(0x01A9) __sfr BD1OBC
;
1589 extern __at(0x01A9) volatile __BD1OBCbits_t BD1OBCbits
;
1591 #define _BD1OBC_BC0 0x01
1592 #define _BD1OBC_BC1 0x02
1593 #define _BD1OBC_BC2 0x04
1594 #define _BD1OBC_BC3 0x08
1596 //==============================================================================
1598 extern __at(0x01AA) __sfr BD1OAL
;
1600 //==============================================================================
1603 extern __at(0x01AC) __sfr BD1IST
;
1611 unsigned PID0_BSTALL
: 1;
1612 unsigned PID1_DTS
: 1;
1615 unsigned DATA0_1
: 1;
1627 unsigned DATA01
: 1;
1635 unsigned BSTALL
: 1;
1651 extern __at(0x01AC) volatile __BD1ISTbits_t BD1ISTbits
;
1653 #define _BD1IST_PID0_BSTALL 0x04
1654 #define _BD1IST_PID0 0x04
1655 #define _BD1IST_BSTALL 0x04
1656 #define _BD1IST_PID1_DTS 0x08
1657 #define _BD1IST_PID1 0x08
1658 #define _BD1IST_DTS 0x08
1659 #define _BD1IST_PID2 0x10
1660 #define _BD1IST_PID3 0x20
1661 #define _BD1IST_DATA0_1 0x40
1662 #define _BD1IST_DATA01 0x40
1663 #define _BD1IST_UOWN 0x80
1664 #define _BD1IST_OWN 0x80
1666 //==============================================================================
1669 //==============================================================================
1672 extern __at(0x01AD) __sfr BD1IBC
;
1695 extern __at(0x01AD) volatile __BD1IBCbits_t BD1IBCbits
;
1697 #define _BD1IBC_BC0 0x01
1698 #define _BD1IBC_BC1 0x02
1699 #define _BD1IBC_BC2 0x04
1700 #define _BD1IBC_BC3 0x08
1702 //==============================================================================
1704 extern __at(0x01AE) __sfr BD1IAL
;
1706 //==============================================================================
1709 extern __at(0x01B0) __sfr BD2OST
;
1717 unsigned PID0_BSTALL
: 1;
1718 unsigned PID1_DTS
: 1;
1721 unsigned DATA0_1
: 1;
1733 unsigned DATA01
: 1;
1741 unsigned BSTALL
: 1;
1757 extern __at(0x01B0) volatile __BD2OSTbits_t BD2OSTbits
;
1759 #define _BD2OST_PID0_BSTALL 0x04
1760 #define _BD2OST_PID0 0x04
1761 #define _BD2OST_BSTALL 0x04
1762 #define _BD2OST_PID1_DTS 0x08
1763 #define _BD2OST_PID1 0x08
1764 #define _BD2OST_DTS 0x08
1765 #define _BD2OST_PID2 0x10
1766 #define _BD2OST_PID3 0x20
1767 #define _BD2OST_DATA0_1 0x40
1768 #define _BD2OST_DATA01 0x40
1769 #define _BD2OST_UOWN 0x80
1770 #define _BD2OST_OWN 0x80
1772 //==============================================================================
1775 //==============================================================================
1778 extern __at(0x01B1) __sfr BD2OBC
;
1801 extern __at(0x01B1) volatile __BD2OBCbits_t BD2OBCbits
;
1803 #define _BD2OBC_BC0 0x01
1804 #define _BD2OBC_BC1 0x02
1805 #define _BD2OBC_BC2 0x04
1806 #define _BD2OBC_BC3 0x08
1808 //==============================================================================
1810 extern __at(0x01B2) __sfr BD2OAL
;
1812 //==============================================================================
1815 extern __at(0x01B4) __sfr BD2IST
;
1823 unsigned PID0_BSTALL
: 1;
1824 unsigned PID1_DTS
: 1;
1827 unsigned DATA0_1
: 1;
1839 unsigned DATA01
: 1;
1847 unsigned BSTALL
: 1;
1863 extern __at(0x01B4) volatile __BD2ISTbits_t BD2ISTbits
;
1865 #define _BD2IST_PID0_BSTALL 0x04
1866 #define _BD2IST_PID0 0x04
1867 #define _BD2IST_BSTALL 0x04
1868 #define _BD2IST_PID1_DTS 0x08
1869 #define _BD2IST_PID1 0x08
1870 #define _BD2IST_DTS 0x08
1871 #define _BD2IST_PID2 0x10
1872 #define _BD2IST_PID3 0x20
1873 #define _BD2IST_DATA0_1 0x40
1874 #define _BD2IST_DATA01 0x40
1875 #define _BD2IST_UOWN 0x80
1876 #define _BD2IST_OWN 0x80
1878 //==============================================================================
1881 //==============================================================================
1884 extern __at(0x01B5) __sfr BD2IBC
;
1907 extern __at(0x01B5) volatile __BD2IBCbits_t BD2IBCbits
;
1909 #define _BD2IBC_BC0 0x01
1910 #define _BD2IBC_BC1 0x02
1911 #define _BD2IBC_BC2 0x04
1912 #define _BD2IBC_BC3 0x08
1914 //==============================================================================
1916 extern __at(0x01B6) __sfr BD2IAL
;
1918 //==============================================================================
1920 // Configuration Bits
1922 //==============================================================================
1924 #define _CONFIG1 0x2007
1926 //----------------------------- CONFIG1 Options -------------------------------
1928 #define _FOSC_HS 0x3FFC // HS oscillator.
1929 #define _HS_OSC 0x3FFC // HS oscillator.
1930 #define _FOSC_EC 0x3FFD // External clock. CLKOUT on OSC2 pin.
1931 #define _EC_OSC 0x3FFD // External clock. CLKOUT on OSC2 pin.
1932 #define _FOSC_H4 0x3FFE // HS osc with 4x PLL enabled.
1933 #define _H4_OSC 0x3FFE // HS osc with 4x PLL enabled.
1934 #define _FOSC_E4 0x3FFF // External clock with 4x PLL enabled. CLKOUT on OSC2 pin.
1935 #define _E4_OSC 0x3FFF // External clock with 4x PLL enabled. CLKOUT on OSC2 pin.
1936 #define _WDTE_OFF 0x3FFB // WDT disabled.
1937 #define _WDT_OFF 0x3FFB // WDT disabled.
1938 #define _WDTE_ON 0x3FFF // WDT enabled.
1939 #define _WDT_ON 0x3FFF // WDT enabled.
1940 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1941 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1942 #define _CP_ALL 0x00CF // All memory is code protected.
1943 #define _CP_75 0x15DF // 0800h-1FFFh code protected.
1944 #define _CP_50 0x2AEF // 1000h-1FFFh code protected.
1945 #define _CP_OFF 0x3FFF // Code protection off.
1947 //==============================================================================
1949 #define _DEVID1 0x2006
1951 #define _IDLOC0 0x2000
1952 #define _IDLOC1 0x2001
1953 #define _IDLOC2 0x2002
1954 #define _IDLOC3 0x2003
1956 //==============================================================================
1958 #ifndef NO_BIT_DEFINES
1960 #define ADON ADCON0bits.ADON // bit 0
1961 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
1962 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
1963 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
1964 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
1965 #define CHS0 ADCON0bits.CHS0 // bit 3
1966 #define CHS1 ADCON0bits.CHS1 // bit 4
1967 #define CHS2 ADCON0bits.CHS2 // bit 5
1968 #define ADCS0 ADCON0bits.ADCS0 // bit 6
1969 #define ADCS1 ADCON0bits.ADCS1 // bit 7
1971 #define PCFG0 ADCON1bits.PCFG0 // bit 0
1972 #define PCFG1 ADCON1bits.PCFG1 // bit 1
1973 #define PCFG2 ADCON1bits.PCFG2 // bit 2
1975 #define BC0 BD0IBCbits.BC0 // bit 0
1976 #define BC1 BD0IBCbits.BC1 // bit 1
1977 #define BC2 BD0IBCbits.BC2 // bit 2
1978 #define BC3 BD0IBCbits.BC3 // bit 3
1980 #define PID0_BSTALL BD0ISTbits.PID0_BSTALL // bit 2, shadows bit in BD0ISTbits
1981 #define PID0 BD0ISTbits.PID0 // bit 2, shadows bit in BD0ISTbits
1982 #define BSTALL BD0ISTbits.BSTALL // bit 2, shadows bit in BD0ISTbits
1983 #define PID1_DTS BD0ISTbits.PID1_DTS // bit 3, shadows bit in BD0ISTbits
1984 #define PID1 BD0ISTbits.PID1 // bit 3, shadows bit in BD0ISTbits
1985 #define DTS BD0ISTbits.DTS // bit 3, shadows bit in BD0ISTbits
1986 #define PID2 BD0ISTbits.PID2 // bit 4
1987 #define PID3 BD0ISTbits.PID3 // bit 5
1988 #define DATA0_1 BD0ISTbits.DATA0_1 // bit 6, shadows bit in BD0ISTbits
1989 #define DATA01 BD0ISTbits.DATA01 // bit 6, shadows bit in BD0ISTbits
1990 #define UOWN BD0ISTbits.UOWN // bit 7, shadows bit in BD0ISTbits
1991 #define OWN BD0ISTbits.OWN // bit 7, shadows bit in BD0ISTbits
1993 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1994 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1995 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1996 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1997 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
1998 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
2000 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
2001 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
2002 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
2003 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
2004 #define DC2B0 CCP2CONbits.DC2B0 // bit 4
2005 #define DC2B1 CCP2CONbits.DC2B1 // bit 5
2007 #define RBIF INTCONbits.RBIF // bit 0
2008 #define INTF INTCONbits.INTF // bit 1
2009 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
2010 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
2011 #define RBIE INTCONbits.RBIE // bit 3
2012 #define INTE INTCONbits.INTE // bit 4
2013 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
2014 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
2015 #define PEIE INTCONbits.PEIE // bit 6
2016 #define GIE INTCONbits.GIE // bit 7
2018 #define PS0 OPTION_REGbits.PS0 // bit 0
2019 #define PS1 OPTION_REGbits.PS1 // bit 1
2020 #define PS2 OPTION_REGbits.PS2 // bit 2
2021 #define PSA OPTION_REGbits.PSA // bit 3
2022 #define T0SE OPTION_REGbits.T0SE // bit 4
2023 #define T0CS OPTION_REGbits.T0CS // bit 5
2024 #define INTEDG OPTION_REGbits.INTEDG // bit 6
2025 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
2027 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
2028 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
2029 #define NOT_POR PCONbits.NOT_POR // bit 1
2031 #define TMR1IE PIE1bits.TMR1IE // bit 0
2032 #define TMR2IE PIE1bits.TMR2IE // bit 1
2033 #define CCP1IE PIE1bits.CCP1IE // bit 2
2034 #define USBIE PIE1bits.USBIE // bit 3
2035 #define TXIE PIE1bits.TXIE // bit 4
2036 #define RCIE PIE1bits.RCIE // bit 5
2037 #define ADIE PIE1bits.ADIE // bit 6
2039 #define CCP2IE PIE2bits.CCP2IE // bit 0
2041 #define TMR1IF PIR1bits.TMR1IF // bit 0
2042 #define TMR2IF PIR1bits.TMR2IF // bit 1
2043 #define CCP1IF PIR1bits.CCP1IF // bit 2
2044 #define USBIF PIR1bits.USBIF // bit 3
2045 #define TXIF PIR1bits.TXIF // bit 4
2046 #define RCIF PIR1bits.RCIF // bit 5
2047 #define ADIF PIR1bits.ADIF // bit 6
2049 #define CCP2IF PIR2bits.CCP2IF // bit 0
2051 #define RA0 PORTAbits.RA0 // bit 0
2052 #define RA1 PORTAbits.RA1 // bit 1
2053 #define RA2 PORTAbits.RA2 // bit 2
2054 #define RA3 PORTAbits.RA3 // bit 3
2055 #define RA4 PORTAbits.RA4 // bit 4
2056 #define RA5 PORTAbits.RA5 // bit 5
2058 #define RB0 PORTBbits.RB0 // bit 0
2059 #define RB1 PORTBbits.RB1 // bit 1
2060 #define RB2 PORTBbits.RB2 // bit 2
2061 #define RB3 PORTBbits.RB3 // bit 3
2062 #define RB4 PORTBbits.RB4 // bit 4
2063 #define RB5 PORTBbits.RB5 // bit 5
2064 #define RB6 PORTBbits.RB6 // bit 6
2065 #define RB7 PORTBbits.RB7 // bit 7
2067 #define RC0 PORTCbits.RC0 // bit 0
2068 #define RC1 PORTCbits.RC1 // bit 1
2069 #define RC2 PORTCbits.RC2 // bit 2
2070 #define RC6 PORTCbits.RC6 // bit 6
2071 #define RC7 PORTCbits.RC7 // bit 7
2073 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
2074 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
2075 #define OERR RCSTAbits.OERR // bit 1
2076 #define FERR RCSTAbits.FERR // bit 2
2077 #define CREN RCSTAbits.CREN // bit 4
2078 #define SREN RCSTAbits.SREN // bit 5
2079 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
2080 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
2081 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
2082 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
2083 #define SPEN RCSTAbits.SPEN // bit 7
2085 #define C STATUSbits.C // bit 0
2086 #define DC STATUSbits.DC // bit 1
2087 #define Z STATUSbits.Z // bit 2
2088 #define NOT_PD STATUSbits.NOT_PD // bit 3
2089 #define NOT_TO STATUSbits.NOT_TO // bit 4
2090 #define RP0 STATUSbits.RP0 // bit 5
2091 #define RP1 STATUSbits.RP1 // bit 6
2092 #define IRP STATUSbits.IRP // bit 7
2094 #define TMR1ON T1CONbits.TMR1ON // bit 0
2095 #define TMR1CS T1CONbits.TMR1CS // bit 1
2096 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
2097 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
2098 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
2099 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
2100 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
2102 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
2103 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
2104 #define TMR2ON T2CONbits.TMR2ON // bit 2
2105 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
2106 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
2107 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
2108 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
2110 #define TRISA0 TRISAbits.TRISA0 // bit 0
2111 #define TRISA1 TRISAbits.TRISA1 // bit 1
2112 #define TRISA2 TRISAbits.TRISA2 // bit 2
2113 #define TRISA3 TRISAbits.TRISA3 // bit 3
2114 #define TRISA4 TRISAbits.TRISA4 // bit 4
2115 #define TRISA5 TRISAbits.TRISA5 // bit 5
2117 #define TRISB0 TRISBbits.TRISB0 // bit 0
2118 #define TRISB1 TRISBbits.TRISB1 // bit 1
2119 #define TRISB2 TRISBbits.TRISB2 // bit 2
2120 #define TRISB3 TRISBbits.TRISB3 // bit 3
2121 #define TRISB4 TRISBbits.TRISB4 // bit 4
2122 #define TRISB5 TRISBbits.TRISB5 // bit 5
2123 #define TRISB6 TRISBbits.TRISB6 // bit 6
2124 #define TRISB7 TRISBbits.TRISB7 // bit 7
2126 #define TRISC0 TRISCbits.TRISC0 // bit 0
2127 #define TRISC1 TRISCbits.TRISC1 // bit 1
2128 #define TRISC2 TRISCbits.TRISC2 // bit 2
2129 #define TRISC6 TRISCbits.TRISC6 // bit 6
2130 #define TRISC7 TRISCbits.TRISC7 // bit 7
2132 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
2133 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
2134 #define TRMT TXSTAbits.TRMT // bit 1
2135 #define BRGH TXSTAbits.BRGH // bit 2
2136 #define SYNC TXSTAbits.SYNC // bit 4
2137 #define TXEN TXSTAbits.TXEN // bit 5
2138 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
2139 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
2140 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
2141 #define CSRC TXSTAbits.CSRC // bit 7
2143 #define SUSPND UCTRLbits.SUSPND // bit 1
2144 #define RESUME UCTRLbits.RESUME // bit 2
2145 #define DEV_ATT UCTRLbits.DEV_ATT // bit 3
2146 #define PKT_DIS UCTRLbits.PKT_DIS // bit 4
2147 #define SE0 UCTRLbits.SE0 // bit 5
2149 #define PID_ERR UEIEbits.PID_ERR // bit 0
2150 #define CRC5 UEIEbits.CRC5 // bit 1
2151 #define CRC16 UEIEbits.CRC16 // bit 2
2152 #define DFN8 UEIEbits.DFN8 // bit 3
2153 #define BTO_ERR UEIEbits.BTO_ERR // bit 4
2154 #define WRT_ERR UEIEbits.WRT_ERR // bit 5
2155 #define OWN_ERR UEIEbits.OWN_ERR // bit 6
2156 #define BTS_ERR UEIEbits.BTS_ERR // bit 7
2158 #define EP_STALL UEP0bits.EP_STALL // bit 0
2159 #define EP_IN_EN UEP0bits.EP_IN_EN // bit 1
2160 #define EP_OUT_EN UEP0bits.EP_OUT_EN // bit 2
2161 #define EP_CTL_DIS UEP0bits.EP_CTL_DIS // bit 3
2163 #define USB_RST UIEbits.USB_RST // bit 0
2164 #define UERR UIEbits.UERR // bit 1
2165 #define ACTIVITY UIEbits.ACTIVITY // bit 2
2166 #define TOK_DNE UIEbits.TOK_DNE // bit 3
2167 #define UIDLE UIEbits.UIDLE // bit 4
2168 #define STALL UIEbits.STALL // bit 5
2170 #define IN USTATbits.IN // bit 2
2171 #define ENDP0 USTATbits.ENDP0 // bit 3
2172 #define ENDP1 USTATbits.ENDP1 // bit 4
2174 #endif // #ifndef NO_BIT_DEFINES
2176 #endif // #ifndef __PIC16C745_H__