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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f1455.h
blobdd4a8fc0686cd78cbb4b0d46593d628390490d36
1 /*
2 * This declarations of the PIC16F1455 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:04 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F1455_H__
26 #define __PIC16F1455_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTC_ADDR 0x000E
52 #define PIR1_ADDR 0x0011
53 #define PIR2_ADDR 0x0012
54 #define TMR0_ADDR 0x0015
55 #define TMR1_ADDR 0x0016
56 #define TMR1L_ADDR 0x0016
57 #define TMR1H_ADDR 0x0017
58 #define T1CON_ADDR 0x0018
59 #define T1GCON_ADDR 0x0019
60 #define TMR2_ADDR 0x001A
61 #define PR2_ADDR 0x001B
62 #define T2CON_ADDR 0x001C
63 #define TRISA_ADDR 0x008C
64 #define TRISC_ADDR 0x008E
65 #define PIE1_ADDR 0x0091
66 #define PIE2_ADDR 0x0092
67 #define OPTION_REG_ADDR 0x0095
68 #define PCON_ADDR 0x0096
69 #define WDTCON_ADDR 0x0097
70 #define OSCTUNE_ADDR 0x0098
71 #define OSCCON_ADDR 0x0099
72 #define OSCSTAT_ADDR 0x009A
73 #define ADRES_ADDR 0x009B
74 #define ADRESL_ADDR 0x009B
75 #define ADRESH_ADDR 0x009C
76 #define ADCON0_ADDR 0x009D
77 #define ADCON1_ADDR 0x009E
78 #define ADCON2_ADDR 0x009F
79 #define LATA_ADDR 0x010C
80 #define LATC_ADDR 0x010E
81 #define CM1CON0_ADDR 0x0111
82 #define CM1CON1_ADDR 0x0112
83 #define CM2CON0_ADDR 0x0113
84 #define CM2CON1_ADDR 0x0114
85 #define CMOUT_ADDR 0x0115
86 #define BORCON_ADDR 0x0116
87 #define FVRCON_ADDR 0x0117
88 #define DACCON0_ADDR 0x0118
89 #define DACCON1_ADDR 0x0119
90 #define APFCON_ADDR 0x011D
91 #define ANSELA_ADDR 0x018C
92 #define ANSELC_ADDR 0x018E
93 #define PMADR_ADDR 0x0191
94 #define PMADRL_ADDR 0x0191
95 #define PMADRH_ADDR 0x0192
96 #define PMDAT_ADDR 0x0193
97 #define PMDATL_ADDR 0x0193
98 #define PMDATH_ADDR 0x0194
99 #define PMCON1_ADDR 0x0195
100 #define PMCON2_ADDR 0x0196
101 #define VREGCON_ADDR 0x0197
102 #define RCREG_ADDR 0x0199
103 #define TXREG_ADDR 0x019A
104 #define SPBRG_ADDR 0x019B
105 #define SPBRGL_ADDR 0x019B
106 #define SPBRGH_ADDR 0x019C
107 #define RCSTA_ADDR 0x019D
108 #define TXSTA_ADDR 0x019E
109 #define BAUDCON_ADDR 0x019F
110 #define WPUA_ADDR 0x020C
111 #define SSP1BUF_ADDR 0x0211
112 #define SSPBUF_ADDR 0x0211
113 #define SSP1ADD_ADDR 0x0212
114 #define SSPADD_ADDR 0x0212
115 #define SSP1MSK_ADDR 0x0213
116 #define SSPMSK_ADDR 0x0213
117 #define SSP1STAT_ADDR 0x0214
118 #define SSPSTAT_ADDR 0x0214
119 #define SSP1CON1_ADDR 0x0215
120 #define SSPCON_ADDR 0x0215
121 #define SSPCON1_ADDR 0x0215
122 #define SSP1CON2_ADDR 0x0216
123 #define SSPCON2_ADDR 0x0216
124 #define SSP1CON3_ADDR 0x0217
125 #define SSPCON3_ADDR 0x0217
126 #define IOCAP_ADDR 0x0391
127 #define IOCAN_ADDR 0x0392
128 #define IOCAF_ADDR 0x0393
129 #define CLKRCON_ADDR 0x039A
130 #define ACTCON_ADDR 0x039B
131 #define PWM1DCL_ADDR 0x0611
132 #define PWM1DCH_ADDR 0x0612
133 #define PWM1CON_ADDR 0x0613
134 #define PWM1CON0_ADDR 0x0613
135 #define PWM2DCL_ADDR 0x0614
136 #define PWM2DCH_ADDR 0x0615
137 #define PWM2CON_ADDR 0x0616
138 #define PWM2CON0_ADDR 0x0616
139 #define CWG1DBR_ADDR 0x0691
140 #define CWG1DBF_ADDR 0x0692
141 #define CWG1CON0_ADDR 0x0693
142 #define CWG1CON1_ADDR 0x0694
143 #define CWG1CON2_ADDR 0x0695
144 #define UCON_ADDR 0x0E8E
145 #define USTAT_ADDR 0x0E8F
146 #define UIR_ADDR 0x0E90
147 #define UCFG_ADDR 0x0E91
148 #define UIE_ADDR 0x0E92
149 #define UEIR_ADDR 0x0E93
150 #define UFRM_ADDR 0x0E94
151 #define UFRMH_ADDR 0x0E94
152 #define UFRML_ADDR 0x0E95
153 #define UADDR_ADDR 0x0E96
154 #define UEIE_ADDR 0x0E97
155 #define UEP0_ADDR 0x0E98
156 #define UEP1_ADDR 0x0E99
157 #define UEP2_ADDR 0x0E9A
158 #define UEP3_ADDR 0x0E9B
159 #define UEP4_ADDR 0x0E9C
160 #define UEP5_ADDR 0x0E9D
161 #define UEP6_ADDR 0x0E9E
162 #define UEP7_ADDR 0x0E9F
163 #define STATUS_SHAD_ADDR 0x0FE4
164 #define WREG_SHAD_ADDR 0x0FE5
165 #define BSR_SHAD_ADDR 0x0FE6
166 #define PCLATH_SHAD_ADDR 0x0FE7
167 #define FSR0L_SHAD_ADDR 0x0FE8
168 #define FSR0H_SHAD_ADDR 0x0FE9
169 #define FSR1L_SHAD_ADDR 0x0FEA
170 #define FSR1H_SHAD_ADDR 0x0FEB
171 #define STKPTR_ADDR 0x0FED
172 #define TOSL_ADDR 0x0FEE
173 #define TOSH_ADDR 0x0FEF
174
175 #endif // #ifndef NO_ADDR_DEFINES
176
177 //==============================================================================
178 //
179 // Register Definitions
180 //
181 //==============================================================================
182
183 extern __at(0x0000) __sfr INDF0;
184 extern __at(0x0001) __sfr INDF1;
185 extern __at(0x0002) __sfr PCL;
186
187 //==============================================================================
188 // STATUS Bits
189
190 extern __at(0x0003) __sfr STATUS;
191
192 typedef struct
193 {
194 unsigned C : 1;
195 unsigned DC : 1;
196 unsigned Z : 1;
197 unsigned NOT_PD : 1;
198 unsigned NOT_TO : 1;
199 unsigned : 1;
200 unsigned : 1;
201 unsigned : 1;
202 } __STATUSbits_t;
203
204 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
205
206 #define _C 0x01
207 #define _DC 0x02
208 #define _Z 0x04
209 #define _NOT_PD 0x08
210 #define _NOT_TO 0x10
211
212 //==============================================================================
213
214 extern __at(0x0004) __sfr FSR0;
215 extern __at(0x0004) __sfr FSR0L;
216 extern __at(0x0005) __sfr FSR0H;
217 extern __at(0x0006) __sfr FSR1;
218 extern __at(0x0006) __sfr FSR1L;
219 extern __at(0x0007) __sfr FSR1H;
220
221 //==============================================================================
222 // BSR Bits
223
224 extern __at(0x0008) __sfr BSR;
225
226 typedef union
227 {
228 struct
229 {
230 unsigned BSR0 : 1;
231 unsigned BSR1 : 1;
232 unsigned BSR2 : 1;
233 unsigned BSR3 : 1;
234 unsigned BSR4 : 1;
235 unsigned : 1;
236 unsigned : 1;
237 unsigned : 1;
238 };
239
240 struct
241 {
242 unsigned BSR : 5;
243 unsigned : 3;
244 };
245 } __BSRbits_t;
246
247 extern __at(0x0008) volatile __BSRbits_t BSRbits;
248
249 #define _BSR0 0x01
250 #define _BSR1 0x02
251 #define _BSR2 0x04
252 #define _BSR3 0x08
253 #define _BSR4 0x10
254
255 //==============================================================================
256
257 extern __at(0x0009) __sfr WREG;
258 extern __at(0x000A) __sfr PCLATH;
259
260 //==============================================================================
261 // INTCON Bits
262
263 extern __at(0x000B) __sfr INTCON;
264
265 typedef union
266 {
267 struct
268 {
269 unsigned IOCIF : 1;
270 unsigned INTF : 1;
271 unsigned TMR0IF : 1;
272 unsigned IOCIE : 1;
273 unsigned INTE : 1;
274 unsigned TMR0IE : 1;
275 unsigned PEIE : 1;
276 unsigned GIE : 1;
277 };
278
279 struct
280 {
281 unsigned : 1;
282 unsigned : 1;
283 unsigned T0IF : 1;
284 unsigned : 1;
285 unsigned : 1;
286 unsigned T0IE : 1;
287 unsigned : 1;
288 unsigned : 1;
289 };
290 } __INTCONbits_t;
291
292 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
293
294 #define _IOCIF 0x01
295 #define _INTF 0x02
296 #define _TMR0IF 0x04
297 #define _T0IF 0x04
298 #define _IOCIE 0x08
299 #define _INTE 0x10
300 #define _TMR0IE 0x20
301 #define _T0IE 0x20
302 #define _PEIE 0x40
303 #define _GIE 0x80
304
305 //==============================================================================
306
307
308 //==============================================================================
309 // PORTA Bits
310
311 extern __at(0x000C) __sfr PORTA;
312
313 typedef struct
314 {
315 unsigned RA0 : 1;
316 unsigned RA1 : 1;
317 unsigned : 1;
318 unsigned RA3 : 1;
319 unsigned RA4 : 1;
320 unsigned RA5 : 1;
321 unsigned : 1;
322 unsigned : 1;
323 } __PORTAbits_t;
324
325 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
326
327 #define _RA0 0x01
328 #define _RA1 0x02
329 #define _RA3 0x08
330 #define _RA4 0x10
331 #define _RA5 0x20
332
333 //==============================================================================
334
335
336 //==============================================================================
337 // PORTC Bits
338
339 extern __at(0x000E) __sfr PORTC;
340
341 typedef union
342 {
343 struct
344 {
345 unsigned RC0 : 1;
346 unsigned RC1 : 1;
347 unsigned RC2 : 1;
348 unsigned RC3 : 1;
349 unsigned RC4 : 1;
350 unsigned RC5 : 1;
351 unsigned : 1;
352 unsigned : 1;
353 };
354
355 struct
356 {
357 unsigned RC : 6;
358 unsigned : 2;
359 };
360 } __PORTCbits_t;
361
362 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
363
364 #define _RC0 0x01
365 #define _RC1 0x02
366 #define _RC2 0x04
367 #define _RC3 0x08
368 #define _RC4 0x10
369 #define _RC5 0x20
370
371 //==============================================================================
372
373
374 //==============================================================================
375 // PIR1 Bits
376
377 extern __at(0x0011) __sfr PIR1;
378
379 typedef struct
380 {
381 unsigned TMR1IF : 1;
382 unsigned TMR2IF : 1;
383 unsigned : 1;
384 unsigned SSP1IF : 1;
385 unsigned TXIF : 1;
386 unsigned RCIF : 1;
387 unsigned ADIF : 1;
388 unsigned TMR1GIF : 1;
389 } __PIR1bits_t;
390
391 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
392
393 #define _TMR1IF 0x01
394 #define _TMR2IF 0x02
395 #define _SSP1IF 0x08
396 #define _TXIF 0x10
397 #define _RCIF 0x20
398 #define _ADIF 0x40
399 #define _TMR1GIF 0x80
400
401 //==============================================================================
402
403
404 //==============================================================================
405 // PIR2 Bits
406
407 extern __at(0x0012) __sfr PIR2;
408
409 typedef struct
410 {
411 unsigned : 1;
412 unsigned ACTIF : 1;
413 unsigned USBIF : 1;
414 unsigned BCL1IF : 1;
415 unsigned : 1;
416 unsigned C1IF : 1;
417 unsigned C2IF : 1;
418 unsigned OSFIF : 1;
419 } __PIR2bits_t;
420
421 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
422
423 #define _ACTIF 0x02
424 #define _USBIF 0x04
425 #define _BCL1IF 0x08
426 #define _C1IF 0x20
427 #define _C2IF 0x40
428 #define _OSFIF 0x80
429
430 //==============================================================================
431
432 extern __at(0x0015) __sfr TMR0;
433 extern __at(0x0016) __sfr TMR1;
434 extern __at(0x0016) __sfr TMR1L;
435 extern __at(0x0017) __sfr TMR1H;
436
437 //==============================================================================
438 // T1CON Bits
439
440 extern __at(0x0018) __sfr T1CON;
441
442 typedef union
443 {
444 struct
445 {
446 unsigned TMR1ON : 1;
447 unsigned : 1;
448 unsigned NOT_T1SYNC : 1;
449 unsigned T1OSCEN : 1;
450 unsigned T1CKPS0 : 1;
451 unsigned T1CKPS1 : 1;
452 unsigned TMR1CS0 : 1;
453 unsigned TMR1CS1 : 1;
454 };
455
456 struct
457 {
458 unsigned : 4;
459 unsigned T1CKPS : 2;
460 unsigned : 2;
461 };
462
463 struct
464 {
465 unsigned : 6;
466 unsigned TMR1CS : 2;
467 };
468 } __T1CONbits_t;
469
470 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
471
472 #define _TMR1ON 0x01
473 #define _NOT_T1SYNC 0x04
474 #define _T1OSCEN 0x08
475 #define _T1CKPS0 0x10
476 #define _T1CKPS1 0x20
477 #define _TMR1CS0 0x40
478 #define _TMR1CS1 0x80
479
480 //==============================================================================
481
482
483 //==============================================================================
484 // T1GCON Bits
485
486 extern __at(0x0019) __sfr T1GCON;
487
488 typedef union
489 {
490 struct
491 {
492 unsigned T1GSS0 : 1;
493 unsigned T1GSS1 : 1;
494 unsigned T1GVAL : 1;
495 unsigned T1GGO_NOT_DONE : 1;
496 unsigned T1GSPM : 1;
497 unsigned T1GTM : 1;
498 unsigned T1GPOL : 1;
499 unsigned TMR1GE : 1;
500 };
501
502 struct
503 {
504 unsigned T1GSS : 2;
505 unsigned : 6;
506 };
507 } __T1GCONbits_t;
508
509 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
510
511 #define _T1GSS0 0x01
512 #define _T1GSS1 0x02
513 #define _T1GVAL 0x04
514 #define _T1GGO_NOT_DONE 0x08
515 #define _T1GSPM 0x10
516 #define _T1GTM 0x20
517 #define _T1GPOL 0x40
518 #define _TMR1GE 0x80
519
520 //==============================================================================
521
522 extern __at(0x001A) __sfr TMR2;
523 extern __at(0x001B) __sfr PR2;
524
525 //==============================================================================
526 // T2CON Bits
527
528 extern __at(0x001C) __sfr T2CON;
529
530 typedef union
531 {
532 struct
533 {
534 unsigned T2CKPS0 : 1;
535 unsigned T2CKPS1 : 1;
536 unsigned TMR2ON : 1;
537 unsigned T2OUTPS0 : 1;
538 unsigned T2OUTPS1 : 1;
539 unsigned T2OUTPS2 : 1;
540 unsigned T2OUTPS3 : 1;
541 unsigned : 1;
542 };
543
544 struct
545 {
546 unsigned T2CKPS : 2;
547 unsigned : 6;
548 };
549
550 struct
551 {
552 unsigned : 3;
553 unsigned T2OUTPS : 4;
554 unsigned : 1;
555 };
556 } __T2CONbits_t;
557
558 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
559
560 #define _T2CKPS0 0x01
561 #define _T2CKPS1 0x02
562 #define _TMR2ON 0x04
563 #define _T2OUTPS0 0x08
564 #define _T2OUTPS1 0x10
565 #define _T2OUTPS2 0x20
566 #define _T2OUTPS3 0x40
567
568 //==============================================================================
569
570
571 //==============================================================================
572 // TRISA Bits
573
574 extern __at(0x008C) __sfr TRISA;
575
576 typedef struct
577 {
578 unsigned : 1;
579 unsigned : 1;
580 unsigned : 1;
581 unsigned : 1;
582 unsigned TRISA4 : 1;
583 unsigned TRISA5 : 1;
584 unsigned : 1;
585 unsigned : 1;
586 } __TRISAbits_t;
587
588 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
589
590 #define _TRISA4 0x10
591 #define _TRISA5 0x20
592
593 //==============================================================================
594
595
596 //==============================================================================
597 // TRISC Bits
598
599 extern __at(0x008E) __sfr TRISC;
600
601 typedef union
602 {
603 struct
604 {
605 unsigned TRISC0 : 1;
606 unsigned TRISC1 : 1;
607 unsigned TRISC2 : 1;
608 unsigned TRISC3 : 1;
609 unsigned TRISC4 : 1;
610 unsigned TRISC5 : 1;
611 unsigned : 1;
612 unsigned : 1;
613 };
614
615 struct
616 {
617 unsigned TRISC : 6;
618 unsigned : 2;
619 };
620 } __TRISCbits_t;
621
622 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
623
624 #define _TRISC0 0x01
625 #define _TRISC1 0x02
626 #define _TRISC2 0x04
627 #define _TRISC3 0x08
628 #define _TRISC4 0x10
629 #define _TRISC5 0x20
630
631 //==============================================================================
632
633
634 //==============================================================================
635 // PIE1 Bits
636
637 extern __at(0x0091) __sfr PIE1;
638
639 typedef struct
640 {
641 unsigned TMR1IE : 1;
642 unsigned TMR2IE : 1;
643 unsigned : 1;
644 unsigned SSP1IE : 1;
645 unsigned TXIE : 1;
646 unsigned RCIE : 1;
647 unsigned ADIE : 1;
648 unsigned TMR1GIE : 1;
649 } __PIE1bits_t;
650
651 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
652
653 #define _TMR1IE 0x01
654 #define _TMR2IE 0x02
655 #define _SSP1IE 0x08
656 #define _TXIE 0x10
657 #define _RCIE 0x20
658 #define _ADIE 0x40
659 #define _TMR1GIE 0x80
660
661 //==============================================================================
662
663
664 //==============================================================================
665 // PIE2 Bits
666
667 extern __at(0x0092) __sfr PIE2;
668
669 typedef struct
670 {
671 unsigned : 1;
672 unsigned ACTIE : 1;
673 unsigned USBIE : 1;
674 unsigned BCL1IE : 1;
675 unsigned : 1;
676 unsigned C1IE : 1;
677 unsigned C2IE : 1;
678 unsigned OSFIE : 1;
679 } __PIE2bits_t;
680
681 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
682
683 #define _ACTIE 0x02
684 #define _USBIE 0x04
685 #define _BCL1IE 0x08
686 #define _C1IE 0x20
687 #define _C2IE 0x40
688 #define _OSFIE 0x80
689
690 //==============================================================================
691
692
693 //==============================================================================
694 // OPTION_REG Bits
695
696 extern __at(0x0095) __sfr OPTION_REG;
697
698 typedef union
699 {
700 struct
701 {
702 unsigned PS0 : 1;
703 unsigned PS1 : 1;
704 unsigned PS2 : 1;
705 unsigned PSA : 1;
706 unsigned TMR0SE : 1;
707 unsigned TMR0CS : 1;
708 unsigned INTEDG : 1;
709 unsigned NOT_WPUEN : 1;
710 };
711
712 struct
713 {
714 unsigned : 1;
715 unsigned : 1;
716 unsigned : 1;
717 unsigned : 1;
718 unsigned T0SE : 1;
719 unsigned T0CS : 1;
720 unsigned : 1;
721 unsigned : 1;
722 };
723
724 struct
725 {
726 unsigned PS : 3;
727 unsigned : 5;
728 };
729 } __OPTION_REGbits_t;
730
731 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
732
733 #define _PS0 0x01
734 #define _PS1 0x02
735 #define _PS2 0x04
736 #define _PSA 0x08
737 #define _TMR0SE 0x10
738 #define _T0SE 0x10
739 #define _TMR0CS 0x20
740 #define _T0CS 0x20
741 #define _INTEDG 0x40
742 #define _NOT_WPUEN 0x80
743
744 //==============================================================================
745
746
747 //==============================================================================
748 // PCON Bits
749
750 extern __at(0x0096) __sfr PCON;
751
752 typedef struct
753 {
754 unsigned NOT_BOR : 1;
755 unsigned NOT_POR : 1;
756 unsigned NOT_RI : 1;
757 unsigned NOT_RMCLR : 1;
758 unsigned NOT_RWDT : 1;
759 unsigned : 1;
760 unsigned STKUNF : 1;
761 unsigned STKOVF : 1;
762 } __PCONbits_t;
763
764 extern __at(0x0096) volatile __PCONbits_t PCONbits;
765
766 #define _NOT_BOR 0x01
767 #define _NOT_POR 0x02
768 #define _NOT_RI 0x04
769 #define _NOT_RMCLR 0x08
770 #define _NOT_RWDT 0x10
771 #define _STKUNF 0x40
772 #define _STKOVF 0x80
773
774 //==============================================================================
775
776
777 //==============================================================================
778 // WDTCON Bits
779
780 extern __at(0x0097) __sfr WDTCON;
781
782 typedef union
783 {
784 struct
785 {
786 unsigned SWDTEN : 1;
787 unsigned WDTPS0 : 1;
788 unsigned WDTPS1 : 1;
789 unsigned WDTPS2 : 1;
790 unsigned WDTPS3 : 1;
791 unsigned WDTPS4 : 1;
792 unsigned : 1;
793 unsigned : 1;
794 };
795
796 struct
797 {
798 unsigned : 1;
799 unsigned WDTPS : 5;
800 unsigned : 2;
801 };
802 } __WDTCONbits_t;
803
804 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
805
806 #define _SWDTEN 0x01
807 #define _WDTPS0 0x02
808 #define _WDTPS1 0x04
809 #define _WDTPS2 0x08
810 #define _WDTPS3 0x10
811 #define _WDTPS4 0x20
812
813 //==============================================================================
814
815
816 //==============================================================================
817 // OSCTUNE Bits
818
819 extern __at(0x0098) __sfr OSCTUNE;
820
821 typedef union
822 {
823 struct
824 {
825 unsigned TUN0 : 1;
826 unsigned TUN1 : 1;
827 unsigned TUN2 : 1;
828 unsigned TUN3 : 1;
829 unsigned TUN4 : 1;
830 unsigned TUN5 : 1;
831 unsigned TUN6 : 1;
832 unsigned : 1;
833 };
834
835 struct
836 {
837 unsigned TUN : 7;
838 unsigned : 1;
839 };
840 } __OSCTUNEbits_t;
841
842 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
843
844 #define _TUN0 0x01
845 #define _TUN1 0x02
846 #define _TUN2 0x04
847 #define _TUN3 0x08
848 #define _TUN4 0x10
849 #define _TUN5 0x20
850 #define _TUN6 0x40
851
852 //==============================================================================
853
854
855 //==============================================================================
856 // OSCCON Bits
857
858 extern __at(0x0099) __sfr OSCCON;
859
860 typedef union
861 {
862 struct
863 {
864 unsigned SCS0 : 1;
865 unsigned SCS1 : 1;
866 unsigned IRCF0 : 1;
867 unsigned IRCF1 : 1;
868 unsigned IRCF2 : 1;
869 unsigned IRCF3 : 1;
870 unsigned SPLLMULT : 1;
871 unsigned SPLLEN : 1;
872 };
873
874 struct
875 {
876 unsigned SCS : 2;
877 unsigned : 6;
878 };
879
880 struct
881 {
882 unsigned : 2;
883 unsigned IRCF : 4;
884 unsigned : 2;
885 };
886 } __OSCCONbits_t;
887
888 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
889
890 #define _SCS0 0x01
891 #define _SCS1 0x02
892 #define _IRCF0 0x04
893 #define _IRCF1 0x08
894 #define _IRCF2 0x10
895 #define _IRCF3 0x20
896 #define _SPLLMULT 0x40
897 #define _SPLLEN 0x80
898
899 //==============================================================================
900
901
902 //==============================================================================
903 // OSCSTAT Bits
904
905 extern __at(0x009A) __sfr OSCSTAT;
906
907 typedef struct
908 {
909 unsigned HFIOFS : 1;
910 unsigned LFIOFR : 1;
911 unsigned : 1;
912 unsigned : 1;
913 unsigned HFIOFR : 1;
914 unsigned OSTS : 1;
915 unsigned PLLRDY : 1;
916 unsigned SOSCR : 1;
917 } __OSCSTATbits_t;
918
919 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
920
921 #define _HFIOFS 0x01
922 #define _LFIOFR 0x02
923 #define _HFIOFR 0x10
924 #define _OSTS 0x20
925 #define _PLLRDY 0x40
926 #define _SOSCR 0x80
927
928 //==============================================================================
929
930 extern __at(0x009B) __sfr ADRES;
931 extern __at(0x009B) __sfr ADRESL;
932 extern __at(0x009C) __sfr ADRESH;
933
934 //==============================================================================
935 // ADCON0 Bits
936
937 extern __at(0x009D) __sfr ADCON0;
938
939 typedef union
940 {
941 struct
942 {
943 unsigned ADON : 1;
944 unsigned GO_NOT_DONE : 1;
945 unsigned CHS0 : 1;
946 unsigned CHS1 : 1;
947 unsigned CHS2 : 1;
948 unsigned CHS3 : 1;
949 unsigned CHS4 : 1;
950 unsigned : 1;
951 };
952
953 struct
954 {
955 unsigned : 1;
956 unsigned ADGO : 1;
957 unsigned : 1;
958 unsigned : 1;
959 unsigned : 1;
960 unsigned : 1;
961 unsigned : 1;
962 unsigned : 1;
963 };
964
965 struct
966 {
967 unsigned : 1;
968 unsigned GO : 1;
969 unsigned : 1;
970 unsigned : 1;
971 unsigned : 1;
972 unsigned : 1;
973 unsigned : 1;
974 unsigned : 1;
975 };
976
977 struct
978 {
979 unsigned : 2;
980 unsigned CHS : 5;
981 unsigned : 1;
982 };
983 } __ADCON0bits_t;
984
985 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
986
987 #define _ADON 0x01
988 #define _GO_NOT_DONE 0x02
989 #define _ADGO 0x02
990 #define _GO 0x02
991 #define _CHS0 0x04
992 #define _CHS1 0x08
993 #define _CHS2 0x10
994 #define _CHS3 0x20
995 #define _CHS4 0x40
996
997 //==============================================================================
998
999
1000 //==============================================================================
1001 // ADCON1 Bits
1002
1003 extern __at(0x009E) __sfr ADCON1;
1004
1005 typedef union
1006 {
1007 struct
1008 {
1009 unsigned ADPREF0 : 1;
1010 unsigned ADPREF1 : 1;
1011 unsigned : 1;
1012 unsigned : 1;
1013 unsigned ADCS0 : 1;
1014 unsigned ADCS1 : 1;
1015 unsigned ADCS2 : 1;
1016 unsigned ADFM : 1;
1017 };
1018
1019 struct
1020 {
1021 unsigned ADPREF : 2;
1022 unsigned : 6;
1023 };
1024
1025 struct
1026 {
1027 unsigned : 4;
1028 unsigned ADCS : 3;
1029 unsigned : 1;
1030 };
1031 } __ADCON1bits_t;
1032
1033 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1034
1035 #define _ADPREF0 0x01
1036 #define _ADPREF1 0x02
1037 #define _ADCS0 0x10
1038 #define _ADCS1 0x20
1039 #define _ADCS2 0x40
1040 #define _ADFM 0x80
1041
1042 //==============================================================================
1043
1044
1045 //==============================================================================
1046 // ADCON2 Bits
1047
1048 extern __at(0x009F) __sfr ADCON2;
1049
1050 typedef union
1051 {
1052 struct
1053 {
1054 unsigned : 1;
1055 unsigned : 1;
1056 unsigned : 1;
1057 unsigned : 1;
1058 unsigned TRIGSEL0 : 1;
1059 unsigned TRIGSEL1 : 1;
1060 unsigned TRIGSEL2 : 1;
1061 unsigned : 1;
1062 };
1063
1064 struct
1065 {
1066 unsigned : 4;
1067 unsigned TRIGSEL : 3;
1068 unsigned : 1;
1069 };
1070 } __ADCON2bits_t;
1071
1072 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1073
1074 #define _TRIGSEL0 0x10
1075 #define _TRIGSEL1 0x20
1076 #define _TRIGSEL2 0x40
1077
1078 //==============================================================================
1079
1080
1081 //==============================================================================
1082 // LATA Bits
1083
1084 extern __at(0x010C) __sfr LATA;
1085
1086 typedef struct
1087 {
1088 unsigned : 1;
1089 unsigned : 1;
1090 unsigned : 1;
1091 unsigned : 1;
1092 unsigned LATA4 : 1;
1093 unsigned LATA5 : 1;
1094 unsigned : 1;
1095 unsigned : 1;
1096 } __LATAbits_t;
1097
1098 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1099
1100 #define _LATA4 0x10
1101 #define _LATA5 0x20
1102
1103 //==============================================================================
1104
1105
1106 //==============================================================================
1107 // LATC Bits
1108
1109 extern __at(0x010E) __sfr LATC;
1110
1111 typedef union
1112 {
1113 struct
1114 {
1115 unsigned LATC0 : 1;
1116 unsigned LATC1 : 1;
1117 unsigned LATC2 : 1;
1118 unsigned LATC3 : 1;
1119 unsigned LATC4 : 1;
1120 unsigned LATC5 : 1;
1121 unsigned : 1;
1122 unsigned : 1;
1123 };
1124
1125 struct
1126 {
1127 unsigned LATC : 6;
1128 unsigned : 2;
1129 };
1130 } __LATCbits_t;
1131
1132 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1133
1134 #define _LATC0 0x01
1135 #define _LATC1 0x02
1136 #define _LATC2 0x04
1137 #define _LATC3 0x08
1138 #define _LATC4 0x10
1139 #define _LATC5 0x20
1140
1141 //==============================================================================
1142
1143
1144 //==============================================================================
1145 // CM1CON0 Bits
1146
1147 extern __at(0x0111) __sfr CM1CON0;
1148
1149 typedef struct
1150 {
1151 unsigned C1SYNC : 1;
1152 unsigned C1HYS : 1;
1153 unsigned C1SP : 1;
1154 unsigned : 1;
1155 unsigned C1POL : 1;
1156 unsigned C1OE : 1;
1157 unsigned C1OUT : 1;
1158 unsigned C1ON : 1;
1159 } __CM1CON0bits_t;
1160
1161 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1162
1163 #define _C1SYNC 0x01
1164 #define _C1HYS 0x02
1165 #define _C1SP 0x04
1166 #define _C1POL 0x10
1167 #define _C1OE 0x20
1168 #define _C1OUT 0x40
1169 #define _C1ON 0x80
1170
1171 //==============================================================================
1172
1173
1174 //==============================================================================
1175 // CM1CON1 Bits
1176
1177 extern __at(0x0112) __sfr CM1CON1;
1178
1179 typedef union
1180 {
1181 struct
1182 {
1183 unsigned C1NCH0 : 1;
1184 unsigned C1NCH1 : 1;
1185 unsigned C1NCH2 : 1;
1186 unsigned : 1;
1187 unsigned C1PCH0 : 1;
1188 unsigned C1PCH1 : 1;
1189 unsigned C1INTN : 1;
1190 unsigned C1INTP : 1;
1191 };
1192
1193 struct
1194 {
1195 unsigned C1NCH : 3;
1196 unsigned : 5;
1197 };
1198
1199 struct
1200 {
1201 unsigned : 4;
1202 unsigned C1PCH : 2;
1203 unsigned : 2;
1204 };
1205 } __CM1CON1bits_t;
1206
1207 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1208
1209 #define _C1NCH0 0x01
1210 #define _C1NCH1 0x02
1211 #define _C1NCH2 0x04
1212 #define _C1PCH0 0x10
1213 #define _C1PCH1 0x20
1214 #define _C1INTN 0x40
1215 #define _C1INTP 0x80
1216
1217 //==============================================================================
1218
1219
1220 //==============================================================================
1221 // CM2CON0 Bits
1222
1223 extern __at(0x0113) __sfr CM2CON0;
1224
1225 typedef struct
1226 {
1227 unsigned C2SYNC : 1;
1228 unsigned C2HYS : 1;
1229 unsigned C2SP : 1;
1230 unsigned : 1;
1231 unsigned C2POL : 1;
1232 unsigned C2OE : 1;
1233 unsigned C2OUT : 1;
1234 unsigned C2ON : 1;
1235 } __CM2CON0bits_t;
1236
1237 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1238
1239 #define _C2SYNC 0x01
1240 #define _C2HYS 0x02
1241 #define _C2SP 0x04
1242 #define _C2POL 0x10
1243 #define _C2OE 0x20
1244 #define _C2OUT 0x40
1245 #define _C2ON 0x80
1246
1247 //==============================================================================
1248
1249
1250 //==============================================================================
1251 // CM2CON1 Bits
1252
1253 extern __at(0x0114) __sfr CM2CON1;
1254
1255 typedef union
1256 {
1257 struct
1258 {
1259 unsigned C2NCH0 : 1;
1260 unsigned C2NCH1 : 1;
1261 unsigned C2NCH2 : 1;
1262 unsigned : 1;
1263 unsigned C2PCH0 : 1;
1264 unsigned C2PCH1 : 1;
1265 unsigned C2INTN : 1;
1266 unsigned C2INTP : 1;
1267 };
1268
1269 struct
1270 {
1271 unsigned C2NCH : 3;
1272 unsigned : 5;
1273 };
1274
1275 struct
1276 {
1277 unsigned : 4;
1278 unsigned C2PCH : 2;
1279 unsigned : 2;
1280 };
1281 } __CM2CON1bits_t;
1282
1283 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1284
1285 #define _C2NCH0 0x01
1286 #define _C2NCH1 0x02
1287 #define _C2NCH2 0x04
1288 #define _C2PCH0 0x10
1289 #define _C2PCH1 0x20
1290 #define _C2INTN 0x40
1291 #define _C2INTP 0x80
1292
1293 //==============================================================================
1294
1295
1296 //==============================================================================
1297 // CMOUT Bits
1298
1299 extern __at(0x0115) __sfr CMOUT;
1300
1301 typedef struct
1302 {
1303 unsigned MC1OUT : 1;
1304 unsigned MC2OUT : 1;
1305 unsigned : 1;
1306 unsigned : 1;
1307 unsigned : 1;
1308 unsigned : 1;
1309 unsigned : 1;
1310 unsigned : 1;
1311 } __CMOUTbits_t;
1312
1313 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1314
1315 #define _MC1OUT 0x01
1316 #define _MC2OUT 0x02
1317
1318 //==============================================================================
1319
1320
1321 //==============================================================================
1322 // BORCON Bits
1323
1324 extern __at(0x0116) __sfr BORCON;
1325
1326 typedef struct
1327 {
1328 unsigned BORRDY : 1;
1329 unsigned : 1;
1330 unsigned : 1;
1331 unsigned : 1;
1332 unsigned : 1;
1333 unsigned : 1;
1334 unsigned BORFS : 1;
1335 unsigned SBOREN : 1;
1336 } __BORCONbits_t;
1337
1338 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1339
1340 #define _BORRDY 0x01
1341 #define _BORFS 0x40
1342 #define _SBOREN 0x80
1343
1344 //==============================================================================
1345
1346
1347 //==============================================================================
1348 // FVRCON Bits
1349
1350 extern __at(0x0117) __sfr FVRCON;
1351
1352 typedef union
1353 {
1354 struct
1355 {
1356 unsigned ADFVR0 : 1;
1357 unsigned ADFVR1 : 1;
1358 unsigned CDAFVR0 : 1;
1359 unsigned CDAFVR1 : 1;
1360 unsigned TSRNG : 1;
1361 unsigned TSEN : 1;
1362 unsigned FVRRDY : 1;
1363 unsigned FVREN : 1;
1364 };
1365
1366 struct
1367 {
1368 unsigned ADFVR : 2;
1369 unsigned : 6;
1370 };
1371
1372 struct
1373 {
1374 unsigned : 2;
1375 unsigned CDAFVR : 2;
1376 unsigned : 4;
1377 };
1378 } __FVRCONbits_t;
1379
1380 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1381
1382 #define _ADFVR0 0x01
1383 #define _ADFVR1 0x02
1384 #define _CDAFVR0 0x04
1385 #define _CDAFVR1 0x08
1386 #define _TSRNG 0x10
1387 #define _TSEN 0x20
1388 #define _FVRRDY 0x40
1389 #define _FVREN 0x80
1390
1391 //==============================================================================
1392
1393
1394 //==============================================================================
1395 // DACCON0 Bits
1396
1397 extern __at(0x0118) __sfr DACCON0;
1398
1399 typedef union
1400 {
1401 struct
1402 {
1403 unsigned : 1;
1404 unsigned : 1;
1405 unsigned D1PSS0 : 1;
1406 unsigned D1PSS1 : 1;
1407 unsigned DACOE2 : 1;
1408 unsigned DACOE1 : 1;
1409 unsigned : 1;
1410 unsigned DACEN : 1;
1411 };
1412
1413 struct
1414 {
1415 unsigned : 2;
1416 unsigned D1PSS : 2;
1417 unsigned : 4;
1418 };
1419 } __DACCON0bits_t;
1420
1421 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1422
1423 #define _D1PSS0 0x04
1424 #define _D1PSS1 0x08
1425 #define _DACOE2 0x10
1426 #define _DACOE1 0x20
1427 #define _DACEN 0x80
1428
1429 //==============================================================================
1430
1431
1432 //==============================================================================
1433 // DACCON1 Bits
1434
1435 extern __at(0x0119) __sfr DACCON1;
1436
1437 typedef union
1438 {
1439 struct
1440 {
1441 unsigned DACR0 : 1;
1442 unsigned DACR1 : 1;
1443 unsigned DACR2 : 1;
1444 unsigned DACR3 : 1;
1445 unsigned DACR4 : 1;
1446 unsigned : 1;
1447 unsigned : 1;
1448 unsigned : 1;
1449 };
1450
1451 struct
1452 {
1453 unsigned DACR : 5;
1454 unsigned : 3;
1455 };
1456 } __DACCON1bits_t;
1457
1458 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1459
1460 #define _DACR0 0x01
1461 #define _DACR1 0x02
1462 #define _DACR2 0x04
1463 #define _DACR3 0x08
1464 #define _DACR4 0x10
1465
1466 //==============================================================================
1467
1468
1469 //==============================================================================
1470 // APFCON Bits
1471
1472 extern __at(0x011D) __sfr APFCON;
1473
1474 typedef struct
1475 {
1476 unsigned : 1;
1477 unsigned : 1;
1478 unsigned P2SEL : 1;
1479 unsigned T1GSEL : 1;
1480 unsigned : 1;
1481 unsigned SSSEL : 1;
1482 unsigned SDOSEL : 1;
1483 unsigned CLKRSEL : 1;
1484 } __APFCONbits_t;
1485
1486 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1487
1488 #define _P2SEL 0x04
1489 #define _T1GSEL 0x08
1490 #define _SSSEL 0x20
1491 #define _SDOSEL 0x40
1492 #define _CLKRSEL 0x80
1493
1494 //==============================================================================
1495
1496
1497 //==============================================================================
1498 // ANSELA Bits
1499
1500 extern __at(0x018C) __sfr ANSELA;
1501
1502 typedef struct
1503 {
1504 unsigned : 1;
1505 unsigned : 1;
1506 unsigned : 1;
1507 unsigned : 1;
1508 unsigned ANSA4 : 1;
1509 unsigned : 1;
1510 unsigned : 1;
1511 unsigned : 1;
1512 } __ANSELAbits_t;
1513
1514 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1515
1516 #define _ANSA4 0x10
1517
1518 //==============================================================================
1519
1520
1521 //==============================================================================
1522 // ANSELC Bits
1523
1524 extern __at(0x018E) __sfr ANSELC;
1525
1526 typedef union
1527 {
1528 struct
1529 {
1530 unsigned ANSC0 : 1;
1531 unsigned ANSC1 : 1;
1532 unsigned ANSC2 : 1;
1533 unsigned ANSC3 : 1;
1534 unsigned : 1;
1535 unsigned : 1;
1536 unsigned : 1;
1537 unsigned : 1;
1538 };
1539
1540 struct
1541 {
1542 unsigned ANSC : 4;
1543 unsigned : 4;
1544 };
1545 } __ANSELCbits_t;
1546
1547 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1548
1549 #define _ANSC0 0x01
1550 #define _ANSC1 0x02
1551 #define _ANSC2 0x04
1552 #define _ANSC3 0x08
1553
1554 //==============================================================================
1555
1556 extern __at(0x0191) __sfr PMADR;
1557 extern __at(0x0191) __sfr PMADRL;
1558 extern __at(0x0192) __sfr PMADRH;
1559 extern __at(0x0193) __sfr PMDAT;
1560 extern __at(0x0193) __sfr PMDATL;
1561 extern __at(0x0194) __sfr PMDATH;
1562
1563 //==============================================================================
1564 // PMCON1 Bits
1565
1566 extern __at(0x0195) __sfr PMCON1;
1567
1568 typedef struct
1569 {
1570 unsigned RD : 1;
1571 unsigned WR : 1;
1572 unsigned WREN : 1;
1573 unsigned WRERR : 1;
1574 unsigned FREE : 1;
1575 unsigned LWLO : 1;
1576 unsigned CFGS : 1;
1577 unsigned : 1;
1578 } __PMCON1bits_t;
1579
1580 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1581
1582 #define _RD 0x01
1583 #define _WR 0x02
1584 #define _WREN 0x04
1585 #define _WRERR 0x08
1586 #define _FREE 0x10
1587 #define _LWLO 0x20
1588 #define _CFGS 0x40
1589
1590 //==============================================================================
1591
1592 extern __at(0x0196) __sfr PMCON2;
1593
1594 //==============================================================================
1595 // VREGCON Bits
1596
1597 extern __at(0x0197) __sfr VREGCON;
1598
1599 typedef union
1600 {
1601 struct
1602 {
1603 unsigned VREGPM0 : 1;
1604 unsigned VREGPM1 : 1;
1605 unsigned : 1;
1606 unsigned : 1;
1607 unsigned : 1;
1608 unsigned : 1;
1609 unsigned : 1;
1610 unsigned : 1;
1611 };
1612
1613 struct
1614 {
1615 unsigned VREGPM : 2;
1616 unsigned : 6;
1617 };
1618 } __VREGCONbits_t;
1619
1620 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1621
1622 #define _VREGPM0 0x01
1623 #define _VREGPM1 0x02
1624
1625 //==============================================================================
1626
1627 extern __at(0x0199) __sfr RCREG;
1628 extern __at(0x019A) __sfr TXREG;
1629 extern __at(0x019B) __sfr SPBRG;
1630 extern __at(0x019B) __sfr SPBRGL;
1631 extern __at(0x019C) __sfr SPBRGH;
1632
1633 //==============================================================================
1634 // RCSTA Bits
1635
1636 extern __at(0x019D) __sfr RCSTA;
1637
1638 typedef struct
1639 {
1640 unsigned RX9D : 1;
1641 unsigned OERR : 1;
1642 unsigned FERR : 1;
1643 unsigned ADDEN : 1;
1644 unsigned CREN : 1;
1645 unsigned SREN : 1;
1646 unsigned RX9 : 1;
1647 unsigned SPEN : 1;
1648 } __RCSTAbits_t;
1649
1650 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1651
1652 #define _RX9D 0x01
1653 #define _OERR 0x02
1654 #define _FERR 0x04
1655 #define _ADDEN 0x08
1656 #define _CREN 0x10
1657 #define _SREN 0x20
1658 #define _RX9 0x40
1659 #define _SPEN 0x80
1660
1661 //==============================================================================
1662
1663
1664 //==============================================================================
1665 // TXSTA Bits
1666
1667 extern __at(0x019E) __sfr TXSTA;
1668
1669 typedef struct
1670 {
1671 unsigned TX9D : 1;
1672 unsigned TRMT : 1;
1673 unsigned BRGH : 1;
1674 unsigned SENDB : 1;
1675 unsigned SYNC : 1;
1676 unsigned TXEN : 1;
1677 unsigned TX9 : 1;
1678 unsigned CSRC : 1;
1679 } __TXSTAbits_t;
1680
1681 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1682
1683 #define _TX9D 0x01
1684 #define _TRMT 0x02
1685 #define _BRGH 0x04
1686 #define _SENDB 0x08
1687 #define _SYNC 0x10
1688 #define _TXEN 0x20
1689 #define _TX9 0x40
1690 #define _CSRC 0x80
1691
1692 //==============================================================================
1693
1694
1695 //==============================================================================
1696 // BAUDCON Bits
1697
1698 extern __at(0x019F) __sfr BAUDCON;
1699
1700 typedef struct
1701 {
1702 unsigned ABDEN : 1;
1703 unsigned WUE : 1;
1704 unsigned : 1;
1705 unsigned BRG16 : 1;
1706 unsigned SCKP : 1;
1707 unsigned : 1;
1708 unsigned RCIDL : 1;
1709 unsigned ABDOVF : 1;
1710 } __BAUDCONbits_t;
1711
1712 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1713
1714 #define _ABDEN 0x01
1715 #define _WUE 0x02
1716 #define _BRG16 0x08
1717 #define _SCKP 0x10
1718 #define _RCIDL 0x40
1719 #define _ABDOVF 0x80
1720
1721 //==============================================================================
1722
1723
1724 //==============================================================================
1725 // WPUA Bits
1726
1727 extern __at(0x020C) __sfr WPUA;
1728
1729 typedef struct
1730 {
1731 unsigned : 1;
1732 unsigned : 1;
1733 unsigned : 1;
1734 unsigned WPUA3 : 1;
1735 unsigned WPUA4 : 1;
1736 unsigned WPUA5 : 1;
1737 unsigned : 1;
1738 unsigned : 1;
1739 } __WPUAbits_t;
1740
1741 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1742
1743 #define _WPUA3 0x08
1744 #define _WPUA4 0x10
1745 #define _WPUA5 0x20
1746
1747 //==============================================================================
1748
1749 extern __at(0x0211) __sfr SSP1BUF;
1750 extern __at(0x0211) __sfr SSPBUF;
1751 extern __at(0x0212) __sfr SSP1ADD;
1752 extern __at(0x0212) __sfr SSPADD;
1753 extern __at(0x0213) __sfr SSP1MSK;
1754 extern __at(0x0213) __sfr SSPMSK;
1755
1756 //==============================================================================
1757 // SSP1STAT Bits
1758
1759 extern __at(0x0214) __sfr SSP1STAT;
1760
1761 typedef struct
1762 {
1763 unsigned BF : 1;
1764 unsigned UA : 1;
1765 unsigned R_NOT_W : 1;
1766 unsigned S : 1;
1767 unsigned P : 1;
1768 unsigned D_NOT_A : 1;
1769 unsigned CKE : 1;
1770 unsigned SMP : 1;
1771 } __SSP1STATbits_t;
1772
1773 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
1774
1775 #define _BF 0x01
1776 #define _UA 0x02
1777 #define _R_NOT_W 0x04
1778 #define _S 0x08
1779 #define _P 0x10
1780 #define _D_NOT_A 0x20
1781 #define _CKE 0x40
1782 #define _SMP 0x80
1783
1784 //==============================================================================
1785
1786
1787 //==============================================================================
1788 // SSPSTAT Bits
1789
1790 extern __at(0x0214) __sfr SSPSTAT;
1791
1792 typedef struct
1793 {
1794 unsigned BF : 1;
1795 unsigned UA : 1;
1796 unsigned R_NOT_W : 1;
1797 unsigned S : 1;
1798 unsigned P : 1;
1799 unsigned D_NOT_A : 1;
1800 unsigned CKE : 1;
1801 unsigned SMP : 1;
1802 } __SSPSTATbits_t;
1803
1804 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
1805
1806 #define _SSPSTAT_BF 0x01
1807 #define _SSPSTAT_UA 0x02
1808 #define _SSPSTAT_R_NOT_W 0x04
1809 #define _SSPSTAT_S 0x08
1810 #define _SSPSTAT_P 0x10
1811 #define _SSPSTAT_D_NOT_A 0x20
1812 #define _SSPSTAT_CKE 0x40
1813 #define _SSPSTAT_SMP 0x80
1814
1815 //==============================================================================
1816
1817
1818 //==============================================================================
1819 // SSP1CON1 Bits
1820
1821 extern __at(0x0215) __sfr SSP1CON1;
1822
1823 typedef union
1824 {
1825 struct
1826 {
1827 unsigned SSP1M0 : 1;
1828 unsigned SSP1M1 : 1;
1829 unsigned SSP1M2 : 1;
1830 unsigned SSP1M3 : 1;
1831 unsigned CKP : 1;
1832 unsigned SSPEN : 1;
1833 unsigned SSPOV : 1;
1834 unsigned WCOL : 1;
1835 };
1836
1837 struct
1838 {
1839 unsigned : 1;
1840 unsigned : 1;
1841 unsigned : 1;
1842 unsigned : 1;
1843 unsigned : 1;
1844 unsigned SSP1EN : 1;
1845 unsigned SSP1OV : 1;
1846 unsigned : 1;
1847 };
1848
1849 struct
1850 {
1851 unsigned SSP1M : 4;
1852 unsigned : 4;
1853 };
1854 } __SSP1CON1bits_t;
1855
1856 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
1857
1858 #define _SSP1M0 0x01
1859 #define _SSP1M1 0x02
1860 #define _SSP1M2 0x04
1861 #define _SSP1M3 0x08
1862 #define _CKP 0x10
1863 #define _SSPEN 0x20
1864 #define _SSP1EN 0x20
1865 #define _SSPOV 0x40
1866 #define _SSP1OV 0x40
1867 #define _WCOL 0x80
1868
1869 //==============================================================================
1870
1871
1872 //==============================================================================
1873 // SSPCON Bits
1874
1875 extern __at(0x0215) __sfr SSPCON;
1876
1877 typedef union
1878 {
1879 struct
1880 {
1881 unsigned SSP1M0 : 1;
1882 unsigned SSP1M1 : 1;
1883 unsigned SSP1M2 : 1;
1884 unsigned SSP1M3 : 1;
1885 unsigned CKP : 1;
1886 unsigned SSPEN : 1;
1887 unsigned SSPOV : 1;
1888 unsigned WCOL : 1;
1889 };
1890
1891 struct
1892 {
1893 unsigned : 1;
1894 unsigned : 1;
1895 unsigned : 1;
1896 unsigned : 1;
1897 unsigned : 1;
1898 unsigned SSP1EN : 1;
1899 unsigned SSP1OV : 1;
1900 unsigned : 1;
1901 };
1902
1903 struct
1904 {
1905 unsigned SSP1M : 4;
1906 unsigned : 4;
1907 };
1908 } __SSPCONbits_t;
1909
1910 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
1911
1912 #define _SSPCON_SSP1M0 0x01
1913 #define _SSPCON_SSP1M1 0x02
1914 #define _SSPCON_SSP1M2 0x04
1915 #define _SSPCON_SSP1M3 0x08
1916 #define _SSPCON_CKP 0x10
1917 #define _SSPCON_SSPEN 0x20
1918 #define _SSPCON_SSP1EN 0x20
1919 #define _SSPCON_SSPOV 0x40
1920 #define _SSPCON_SSP1OV 0x40
1921 #define _SSPCON_WCOL 0x80
1922
1923 //==============================================================================
1924
1925
1926 //==============================================================================
1927 // SSPCON1 Bits
1928
1929 extern __at(0x0215) __sfr SSPCON1;
1930
1931 typedef union
1932 {
1933 struct
1934 {
1935 unsigned SSP1M0 : 1;
1936 unsigned SSP1M1 : 1;
1937 unsigned SSP1M2 : 1;
1938 unsigned SSP1M3 : 1;
1939 unsigned CKP : 1;
1940 unsigned SSPEN : 1;
1941 unsigned SSPOV : 1;
1942 unsigned WCOL : 1;
1943 };
1944
1945 struct
1946 {
1947 unsigned : 1;
1948 unsigned : 1;
1949 unsigned : 1;
1950 unsigned : 1;
1951 unsigned : 1;
1952 unsigned SSP1EN : 1;
1953 unsigned SSP1OV : 1;
1954 unsigned : 1;
1955 };
1956
1957 struct
1958 {
1959 unsigned SSP1M : 4;
1960 unsigned : 4;
1961 };
1962 } __SSPCON1bits_t;
1963
1964 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
1965
1966 #define _SSPCON1_SSP1M0 0x01
1967 #define _SSPCON1_SSP1M1 0x02
1968 #define _SSPCON1_SSP1M2 0x04
1969 #define _SSPCON1_SSP1M3 0x08
1970 #define _SSPCON1_CKP 0x10
1971 #define _SSPCON1_SSPEN 0x20
1972 #define _SSPCON1_SSP1EN 0x20
1973 #define _SSPCON1_SSPOV 0x40
1974 #define _SSPCON1_SSP1OV 0x40
1975 #define _SSPCON1_WCOL 0x80
1976
1977 //==============================================================================
1978
1979
1980 //==============================================================================
1981 // SSP1CON2 Bits
1982
1983 extern __at(0x0216) __sfr SSP1CON2;
1984
1985 typedef struct
1986 {
1987 unsigned SEN : 1;
1988 unsigned RSEN : 1;
1989 unsigned PEN : 1;
1990 unsigned RCEN : 1;
1991 unsigned ACKEN : 1;
1992 unsigned ACKDT : 1;
1993 unsigned ACKSTAT : 1;
1994 unsigned GCEN : 1;
1995 } __SSP1CON2bits_t;
1996
1997 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
1998
1999 #define _SEN 0x01
2000 #define _RSEN 0x02
2001 #define _PEN 0x04
2002 #define _RCEN 0x08
2003 #define _ACKEN 0x10
2004 #define _ACKDT 0x20
2005 #define _ACKSTAT 0x40
2006 #define _GCEN 0x80
2007
2008 //==============================================================================
2009
2010
2011 //==============================================================================
2012 // SSPCON2 Bits
2013
2014 extern __at(0x0216) __sfr SSPCON2;
2015
2016 typedef struct
2017 {
2018 unsigned SEN : 1;
2019 unsigned RSEN : 1;
2020 unsigned PEN : 1;
2021 unsigned RCEN : 1;
2022 unsigned ACKEN : 1;
2023 unsigned ACKDT : 1;
2024 unsigned ACKSTAT : 1;
2025 unsigned GCEN : 1;
2026 } __SSPCON2bits_t;
2027
2028 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
2029
2030 #define _SSPCON2_SEN 0x01
2031 #define _SSPCON2_RSEN 0x02
2032 #define _SSPCON2_PEN 0x04
2033 #define _SSPCON2_RCEN 0x08
2034 #define _SSPCON2_ACKEN 0x10
2035 #define _SSPCON2_ACKDT 0x20
2036 #define _SSPCON2_ACKSTAT 0x40
2037 #define _SSPCON2_GCEN 0x80
2038
2039 //==============================================================================
2040
2041
2042 //==============================================================================
2043 // SSP1CON3 Bits
2044
2045 extern __at(0x0217) __sfr SSP1CON3;
2046
2047 typedef struct
2048 {
2049 unsigned DHEN : 1;
2050 unsigned AHEN : 1;
2051 unsigned SBCDE : 1;
2052 unsigned SDAHT : 1;
2053 unsigned BOEN : 1;
2054 unsigned SCIE : 1;
2055 unsigned PCIE : 1;
2056 unsigned ACKTIM : 1;
2057 } __SSP1CON3bits_t;
2058
2059 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
2060
2061 #define _DHEN 0x01
2062 #define _AHEN 0x02
2063 #define _SBCDE 0x04
2064 #define _SDAHT 0x08
2065 #define _BOEN 0x10
2066 #define _SCIE 0x20
2067 #define _PCIE 0x40
2068 #define _ACKTIM 0x80
2069
2070 //==============================================================================
2071
2072
2073 //==============================================================================
2074 // SSPCON3 Bits
2075
2076 extern __at(0x0217) __sfr SSPCON3;
2077
2078 typedef struct
2079 {
2080 unsigned DHEN : 1;
2081 unsigned AHEN : 1;
2082 unsigned SBCDE : 1;
2083 unsigned SDAHT : 1;
2084 unsigned BOEN : 1;
2085 unsigned SCIE : 1;
2086 unsigned PCIE : 1;
2087 unsigned ACKTIM : 1;
2088 } __SSPCON3bits_t;
2089
2090 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
2091
2092 #define _SSPCON3_DHEN 0x01
2093 #define _SSPCON3_AHEN 0x02
2094 #define _SSPCON3_SBCDE 0x04
2095 #define _SSPCON3_SDAHT 0x08
2096 #define _SSPCON3_BOEN 0x10
2097 #define _SSPCON3_SCIE 0x20
2098 #define _SSPCON3_PCIE 0x40
2099 #define _SSPCON3_ACKTIM 0x80
2100
2101 //==============================================================================
2102
2103
2104 //==============================================================================
2105 // IOCAP Bits
2106
2107 extern __at(0x0391) __sfr IOCAP;
2108
2109 typedef struct
2110 {
2111 unsigned IOCAP0 : 1;
2112 unsigned IOCAP1 : 1;
2113 unsigned : 1;
2114 unsigned IOCAP3 : 1;
2115 unsigned IOCAP4 : 1;
2116 unsigned IOCAP5 : 1;
2117 unsigned : 1;
2118 unsigned : 1;
2119 } __IOCAPbits_t;
2120
2121 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2122
2123 #define _IOCAP0 0x01
2124 #define _IOCAP1 0x02
2125 #define _IOCAP3 0x08
2126 #define _IOCAP4 0x10
2127 #define _IOCAP5 0x20
2128
2129 //==============================================================================
2130
2131
2132 //==============================================================================
2133 // IOCAN Bits
2134
2135 extern __at(0x0392) __sfr IOCAN;
2136
2137 typedef struct
2138 {
2139 unsigned IOCAN0 : 1;
2140 unsigned IOCAN1 : 1;
2141 unsigned : 1;
2142 unsigned IOCAN3 : 1;
2143 unsigned IOCAN4 : 1;
2144 unsigned IOCAN5 : 1;
2145 unsigned : 1;
2146 unsigned : 1;
2147 } __IOCANbits_t;
2148
2149 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2150
2151 #define _IOCAN0 0x01
2152 #define _IOCAN1 0x02
2153 #define _IOCAN3 0x08
2154 #define _IOCAN4 0x10
2155 #define _IOCAN5 0x20
2156
2157 //==============================================================================
2158
2159
2160 //==============================================================================
2161 // IOCAF Bits
2162
2163 extern __at(0x0393) __sfr IOCAF;
2164
2165 typedef struct
2166 {
2167 unsigned IOCAF0 : 1;
2168 unsigned IOCAF1 : 1;
2169 unsigned : 1;
2170 unsigned IOCAF3 : 1;
2171 unsigned IOCAF4 : 1;
2172 unsigned IOCAF5 : 1;
2173 unsigned : 1;
2174 unsigned : 1;
2175 } __IOCAFbits_t;
2176
2177 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2178
2179 #define _IOCAF0 0x01
2180 #define _IOCAF1 0x02
2181 #define _IOCAF3 0x08
2182 #define _IOCAF4 0x10
2183 #define _IOCAF5 0x20
2184
2185 //==============================================================================
2186
2187
2188 //==============================================================================
2189 // CLKRCON Bits
2190
2191 extern __at(0x039A) __sfr CLKRCON;
2192
2193 typedef union
2194 {
2195 struct
2196 {
2197 unsigned CLKRDIV0 : 1;
2198 unsigned CLKRDIV1 : 1;
2199 unsigned CLKRDIV2 : 1;
2200 unsigned CLKRCD0 : 1;
2201 unsigned CLKRCD1 : 1;
2202 unsigned CLKRSLR : 1;
2203 unsigned CLKROE : 1;
2204 unsigned CLKREN : 1;
2205 };
2206
2207 struct
2208 {
2209 unsigned CLKRDIV : 3;
2210 unsigned : 5;
2211 };
2212
2213 struct
2214 {
2215 unsigned : 3;
2216 unsigned CLKRCD : 2;
2217 unsigned : 3;
2218 };
2219 } __CLKRCONbits_t;
2220
2221 extern __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits;
2222
2223 #define _CLKRDIV0 0x01
2224 #define _CLKRDIV1 0x02
2225 #define _CLKRDIV2 0x04
2226 #define _CLKRCD0 0x08
2227 #define _CLKRCD1 0x10
2228 #define _CLKRSLR 0x20
2229 #define _CLKROE 0x40
2230 #define _CLKREN 0x80
2231
2232 //==============================================================================
2233
2234
2235 //==============================================================================
2236 // ACTCON Bits
2237
2238 extern __at(0x039B) __sfr ACTCON;
2239
2240 typedef struct
2241 {
2242 unsigned : 1;
2243 unsigned ACTORS : 1;
2244 unsigned : 1;
2245 unsigned ACTLOCK : 1;
2246 unsigned ACTSRC : 1;
2247 unsigned : 1;
2248 unsigned ACTUD : 1;
2249 unsigned ACTEN : 1;
2250 } __ACTCONbits_t;
2251
2252 extern __at(0x039B) volatile __ACTCONbits_t ACTCONbits;
2253
2254 #define _ACTORS 0x02
2255 #define _ACTLOCK 0x08
2256 #define _ACTSRC 0x10
2257 #define _ACTUD 0x40
2258 #define _ACTEN 0x80
2259
2260 //==============================================================================
2261
2262
2263 //==============================================================================
2264 // PWM1DCL Bits
2265
2266 extern __at(0x0611) __sfr PWM1DCL;
2267
2268 typedef union
2269 {
2270 struct
2271 {
2272 unsigned : 1;
2273 unsigned : 1;
2274 unsigned : 1;
2275 unsigned : 1;
2276 unsigned : 1;
2277 unsigned : 1;
2278 unsigned PWM1DCL0 : 1;
2279 unsigned PWM1DCL1 : 1;
2280 };
2281
2282 struct
2283 {
2284 unsigned : 6;
2285 unsigned PWM1DCL : 2;
2286 };
2287 } __PWM1DCLbits_t;
2288
2289 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
2290
2291 #define _PWM1DCL0 0x40
2292 #define _PWM1DCL1 0x80
2293
2294 //==============================================================================
2295
2296
2297 //==============================================================================
2298 // PWM1DCH Bits
2299
2300 extern __at(0x0612) __sfr PWM1DCH;
2301
2302 typedef struct
2303 {
2304 unsigned PWM1DCH0 : 1;
2305 unsigned PWM1DCH1 : 1;
2306 unsigned PWM1DCH2 : 1;
2307 unsigned PWM1DCH3 : 1;
2308 unsigned PWM1DCH4 : 1;
2309 unsigned PWM1DCH5 : 1;
2310 unsigned PWM1DCH6 : 1;
2311 unsigned PWM1DCH7 : 1;
2312 } __PWM1DCHbits_t;
2313
2314 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
2315
2316 #define _PWM1DCH0 0x01
2317 #define _PWM1DCH1 0x02
2318 #define _PWM1DCH2 0x04
2319 #define _PWM1DCH3 0x08
2320 #define _PWM1DCH4 0x10
2321 #define _PWM1DCH5 0x20
2322 #define _PWM1DCH6 0x40
2323 #define _PWM1DCH7 0x80
2324
2325 //==============================================================================
2326
2327
2328 //==============================================================================
2329 // PWM1CON Bits
2330
2331 extern __at(0x0613) __sfr PWM1CON;
2332
2333 typedef struct
2334 {
2335 unsigned : 1;
2336 unsigned : 1;
2337 unsigned : 1;
2338 unsigned : 1;
2339 unsigned PWM1POL : 1;
2340 unsigned PWM1OUT : 1;
2341 unsigned PWM1OE : 1;
2342 unsigned PWM1EN : 1;
2343 } __PWM1CONbits_t;
2344
2345 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
2346
2347 #define _PWM1POL 0x10
2348 #define _PWM1OUT 0x20
2349 #define _PWM1OE 0x40
2350 #define _PWM1EN 0x80
2351
2352 //==============================================================================
2353
2354
2355 //==============================================================================
2356 // PWM1CON0 Bits
2357
2358 extern __at(0x0613) __sfr PWM1CON0;
2359
2360 typedef struct
2361 {
2362 unsigned : 1;
2363 unsigned : 1;
2364 unsigned : 1;
2365 unsigned : 1;
2366 unsigned PWM1POL : 1;
2367 unsigned PWM1OUT : 1;
2368 unsigned PWM1OE : 1;
2369 unsigned PWM1EN : 1;
2370 } __PWM1CON0bits_t;
2371
2372 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
2373
2374 #define _PWM1CON0_PWM1POL 0x10
2375 #define _PWM1CON0_PWM1OUT 0x20
2376 #define _PWM1CON0_PWM1OE 0x40
2377 #define _PWM1CON0_PWM1EN 0x80
2378
2379 //==============================================================================
2380
2381
2382 //==============================================================================
2383 // PWM2DCL Bits
2384
2385 extern __at(0x0614) __sfr PWM2DCL;
2386
2387 typedef union
2388 {
2389 struct
2390 {
2391 unsigned : 1;
2392 unsigned : 1;
2393 unsigned : 1;
2394 unsigned : 1;
2395 unsigned : 1;
2396 unsigned : 1;
2397 unsigned PWM2DCL0 : 1;
2398 unsigned PWM2DCL1 : 1;
2399 };
2400
2401 struct
2402 {
2403 unsigned : 6;
2404 unsigned PWM2DCL : 2;
2405 };
2406 } __PWM2DCLbits_t;
2407
2408 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
2409
2410 #define _PWM2DCL0 0x40
2411 #define _PWM2DCL1 0x80
2412
2413 //==============================================================================
2414
2415
2416 //==============================================================================
2417 // PWM2DCH Bits
2418
2419 extern __at(0x0615) __sfr PWM2DCH;
2420
2421 typedef struct
2422 {
2423 unsigned PWM2DCH0 : 1;
2424 unsigned PWM2DCH1 : 1;
2425 unsigned PWM2DCH2 : 1;
2426 unsigned PWM2DCH3 : 1;
2427 unsigned PWM2DCH4 : 1;
2428 unsigned PWM2DCH5 : 1;
2429 unsigned PWM2DCH6 : 1;
2430 unsigned PWM2DCH7 : 1;
2431 } __PWM2DCHbits_t;
2432
2433 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
2434
2435 #define _PWM2DCH0 0x01
2436 #define _PWM2DCH1 0x02
2437 #define _PWM2DCH2 0x04
2438 #define _PWM2DCH3 0x08
2439 #define _PWM2DCH4 0x10
2440 #define _PWM2DCH5 0x20
2441 #define _PWM2DCH6 0x40
2442 #define _PWM2DCH7 0x80
2443
2444 //==============================================================================
2445
2446
2447 //==============================================================================
2448 // PWM2CON Bits
2449
2450 extern __at(0x0616) __sfr PWM2CON;
2451
2452 typedef struct
2453 {
2454 unsigned : 1;
2455 unsigned : 1;
2456 unsigned : 1;
2457 unsigned : 1;
2458 unsigned PWM2POL : 1;
2459 unsigned PWM2OUT : 1;
2460 unsigned PWM2OE : 1;
2461 unsigned PWM2EN : 1;
2462 } __PWM2CONbits_t;
2463
2464 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
2465
2466 #define _PWM2POL 0x10
2467 #define _PWM2OUT 0x20
2468 #define _PWM2OE 0x40
2469 #define _PWM2EN 0x80
2470
2471 //==============================================================================
2472
2473
2474 //==============================================================================
2475 // PWM2CON0 Bits
2476
2477 extern __at(0x0616) __sfr PWM2CON0;
2478
2479 typedef struct
2480 {
2481 unsigned : 1;
2482 unsigned : 1;
2483 unsigned : 1;
2484 unsigned : 1;
2485 unsigned PWM2POL : 1;
2486 unsigned PWM2OUT : 1;
2487 unsigned PWM2OE : 1;
2488 unsigned PWM2EN : 1;
2489 } __PWM2CON0bits_t;
2490
2491 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
2492
2493 #define _PWM2CON0_PWM2POL 0x10
2494 #define _PWM2CON0_PWM2OUT 0x20
2495 #define _PWM2CON0_PWM2OE 0x40
2496 #define _PWM2CON0_PWM2EN 0x80
2497
2498 //==============================================================================
2499
2500
2501 //==============================================================================
2502 // CWG1DBR Bits
2503
2504 extern __at(0x0691) __sfr CWG1DBR;
2505
2506 typedef union
2507 {
2508 struct
2509 {
2510 unsigned CWG1DBR0 : 1;
2511 unsigned CWG1DBR1 : 1;
2512 unsigned CWG1DBR2 : 1;
2513 unsigned CWG1DBR3 : 1;
2514 unsigned CWG1DBR4 : 1;
2515 unsigned CWG1DBR5 : 1;
2516 unsigned : 1;
2517 unsigned : 1;
2518 };
2519
2520 struct
2521 {
2522 unsigned CWG1DBR : 6;
2523 unsigned : 2;
2524 };
2525 } __CWG1DBRbits_t;
2526
2527 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2528
2529 #define _CWG1DBR0 0x01
2530 #define _CWG1DBR1 0x02
2531 #define _CWG1DBR2 0x04
2532 #define _CWG1DBR3 0x08
2533 #define _CWG1DBR4 0x10
2534 #define _CWG1DBR5 0x20
2535
2536 //==============================================================================
2537
2538
2539 //==============================================================================
2540 // CWG1DBF Bits
2541
2542 extern __at(0x0692) __sfr CWG1DBF;
2543
2544 typedef union
2545 {
2546 struct
2547 {
2548 unsigned CWG1DBF0 : 1;
2549 unsigned CWG1DBF1 : 1;
2550 unsigned CWG1DBF2 : 1;
2551 unsigned CWG1DBF3 : 1;
2552 unsigned CWG1DBF4 : 1;
2553 unsigned CWG1DBF5 : 1;
2554 unsigned : 1;
2555 unsigned : 1;
2556 };
2557
2558 struct
2559 {
2560 unsigned CWG1DBF : 6;
2561 unsigned : 2;
2562 };
2563 } __CWG1DBFbits_t;
2564
2565 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2566
2567 #define _CWG1DBF0 0x01
2568 #define _CWG1DBF1 0x02
2569 #define _CWG1DBF2 0x04
2570 #define _CWG1DBF3 0x08
2571 #define _CWG1DBF4 0x10
2572 #define _CWG1DBF5 0x20
2573
2574 //==============================================================================
2575
2576
2577 //==============================================================================
2578 // CWG1CON0 Bits
2579
2580 extern __at(0x0693) __sfr CWG1CON0;
2581
2582 typedef struct
2583 {
2584 unsigned G1CS0 : 1;
2585 unsigned : 1;
2586 unsigned : 1;
2587 unsigned G1POLA : 1;
2588 unsigned G1POLB : 1;
2589 unsigned G1OEA : 1;
2590 unsigned G1OEB : 1;
2591 unsigned G1EN : 1;
2592 } __CWG1CON0bits_t;
2593
2594 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2595
2596 #define _G1CS0 0x01
2597 #define _G1POLA 0x08
2598 #define _G1POLB 0x10
2599 #define _G1OEA 0x20
2600 #define _G1OEB 0x40
2601 #define _G1EN 0x80
2602
2603 //==============================================================================
2604
2605
2606 //==============================================================================
2607 // CWG1CON1 Bits
2608
2609 extern __at(0x0694) __sfr CWG1CON1;
2610
2611 typedef union
2612 {
2613 struct
2614 {
2615 unsigned G1IS0 : 1;
2616 unsigned G1IS1 : 1;
2617 unsigned : 1;
2618 unsigned : 1;
2619 unsigned G1ASDLA0 : 1;
2620 unsigned G1ASDLA1 : 1;
2621 unsigned G1ASDLB0 : 1;
2622 unsigned G1ASDLB1 : 1;
2623 };
2624
2625 struct
2626 {
2627 unsigned G1IS : 2;
2628 unsigned : 6;
2629 };
2630
2631 struct
2632 {
2633 unsigned : 4;
2634 unsigned G1ASDLA : 2;
2635 unsigned : 2;
2636 };
2637
2638 struct
2639 {
2640 unsigned : 6;
2641 unsigned G1ASDLB : 2;
2642 };
2643 } __CWG1CON1bits_t;
2644
2645 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2646
2647 #define _G1IS0 0x01
2648 #define _G1IS1 0x02
2649 #define _G1ASDLA0 0x10
2650 #define _G1ASDLA1 0x20
2651 #define _G1ASDLB0 0x40
2652 #define _G1ASDLB1 0x80
2653
2654 //==============================================================================
2655
2656
2657 //==============================================================================
2658 // CWG1CON2 Bits
2659
2660 extern __at(0x0695) __sfr CWG1CON2;
2661
2662 typedef struct
2663 {
2664 unsigned : 1;
2665 unsigned G1ASDSFLT : 1;
2666 unsigned G1ASDSC1 : 1;
2667 unsigned G1ASDSC2 : 1;
2668 unsigned : 1;
2669 unsigned : 1;
2670 unsigned G1ARSEN : 1;
2671 unsigned G1ASE : 1;
2672 } __CWG1CON2bits_t;
2673
2674 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2675
2676 #define _G1ASDSFLT 0x02
2677 #define _G1ASDSC1 0x04
2678 #define _G1ASDSC2 0x08
2679 #define _G1ARSEN 0x40
2680 #define _G1ASE 0x80
2681
2682 //==============================================================================
2683
2684
2685 //==============================================================================
2686 // UCON Bits
2687
2688 extern __at(0x0E8E) __sfr UCON;
2689
2690 typedef struct
2691 {
2692 unsigned : 1;
2693 unsigned SUSPND : 1;
2694 unsigned RESUME : 1;
2695 unsigned USBEN : 1;
2696 unsigned PKTDIS : 1;
2697 unsigned SE0 : 1;
2698 unsigned PPBRST : 1;
2699 unsigned : 1;
2700 } __UCONbits_t;
2701
2702 extern __at(0x0E8E) volatile __UCONbits_t UCONbits;
2703
2704 #define _SUSPND 0x02
2705 #define _RESUME 0x04
2706 #define _USBEN 0x08
2707 #define _PKTDIS 0x10
2708 #define _SE0 0x20
2709 #define _PPBRST 0x40
2710
2711 //==============================================================================
2712
2713
2714 //==============================================================================
2715 // USTAT Bits
2716
2717 extern __at(0x0E8F) __sfr USTAT;
2718
2719 typedef union
2720 {
2721 struct
2722 {
2723 unsigned : 1;
2724 unsigned PPBI : 1;
2725 unsigned DIR : 1;
2726 unsigned ENDP0 : 1;
2727 unsigned ENDP1 : 1;
2728 unsigned ENDP2 : 1;
2729 unsigned ENDP3 : 1;
2730 unsigned : 1;
2731 };
2732
2733 struct
2734 {
2735 unsigned : 3;
2736 unsigned ENDP : 4;
2737 unsigned : 1;
2738 };
2739 } __USTATbits_t;
2740
2741 extern __at(0x0E8F) volatile __USTATbits_t USTATbits;
2742
2743 #define _PPBI 0x02
2744 #define _DIR 0x04
2745 #define _ENDP0 0x08
2746 #define _ENDP1 0x10
2747 #define _ENDP2 0x20
2748 #define _ENDP3 0x40
2749
2750 //==============================================================================
2751
2752
2753 //==============================================================================
2754 // UIR Bits
2755
2756 extern __at(0x0E90) __sfr UIR;
2757
2758 typedef struct
2759 {
2760 unsigned URSTIF : 1;
2761 unsigned UERRIF : 1;
2762 unsigned ACTVIF : 1;
2763 unsigned TRNIF : 1;
2764 unsigned IDLEIF : 1;
2765 unsigned STALLIF : 1;
2766 unsigned SOFIF : 1;
2767 unsigned : 1;
2768 } __UIRbits_t;
2769
2770 extern __at(0x0E90) volatile __UIRbits_t UIRbits;
2771
2772 #define _URSTIF 0x01
2773 #define _UERRIF 0x02
2774 #define _ACTVIF 0x04
2775 #define _TRNIF 0x08
2776 #define _IDLEIF 0x10
2777 #define _STALLIF 0x20
2778 #define _SOFIF 0x40
2779
2780 //==============================================================================
2781
2782
2783 //==============================================================================
2784 // UCFG Bits
2785
2786 extern __at(0x0E91) __sfr UCFG;
2787
2788 typedef union
2789 {
2790 struct
2791 {
2792 unsigned PPB0 : 1;
2793 unsigned PPB1 : 1;
2794 unsigned FSEN : 1;
2795 unsigned : 1;
2796 unsigned UPUEN : 1;
2797 unsigned : 1;
2798 unsigned : 1;
2799 unsigned UTEYE : 1;
2800 };
2801
2802 struct
2803 {
2804 unsigned PPB : 2;
2805 unsigned : 6;
2806 };
2807 } __UCFGbits_t;
2808
2809 extern __at(0x0E91) volatile __UCFGbits_t UCFGbits;
2810
2811 #define _PPB0 0x01
2812 #define _PPB1 0x02
2813 #define _FSEN 0x04
2814 #define _UPUEN 0x10
2815 #define _UTEYE 0x80
2816
2817 //==============================================================================
2818
2819
2820 //==============================================================================
2821 // UIE Bits
2822
2823 extern __at(0x0E92) __sfr UIE;
2824
2825 typedef struct
2826 {
2827 unsigned URSTIE : 1;
2828 unsigned UERRIE : 1;
2829 unsigned ACTVIE : 1;
2830 unsigned TRNIE : 1;
2831 unsigned IDLEIE : 1;
2832 unsigned STALLIE : 1;
2833 unsigned SOFIE : 1;
2834 unsigned : 1;
2835 } __UIEbits_t;
2836
2837 extern __at(0x0E92) volatile __UIEbits_t UIEbits;
2838
2839 #define _URSTIE 0x01
2840 #define _UERRIE 0x02
2841 #define _ACTVIE 0x04
2842 #define _TRNIE 0x08
2843 #define _IDLEIE 0x10
2844 #define _STALLIE 0x20
2845 #define _SOFIE 0x40
2846
2847 //==============================================================================
2848
2849
2850 //==============================================================================
2851 // UEIR Bits
2852
2853 extern __at(0x0E93) __sfr UEIR;
2854
2855 typedef struct
2856 {
2857 unsigned PIDEF : 1;
2858 unsigned CRC5EF : 1;
2859 unsigned CRC16EF : 1;
2860 unsigned DFN8EF : 1;
2861 unsigned BTOEF : 1;
2862 unsigned : 1;
2863 unsigned : 1;
2864 unsigned BTSEF : 1;
2865 } __UEIRbits_t;
2866
2867 extern __at(0x0E93) volatile __UEIRbits_t UEIRbits;
2868
2869 #define _PIDEF 0x01
2870 #define _CRC5EF 0x02
2871 #define _CRC16EF 0x04
2872 #define _DFN8EF 0x08
2873 #define _BTOEF 0x10
2874 #define _BTSEF 0x80
2875
2876 //==============================================================================
2877
2878 extern __at(0x0E94) __sfr UFRM;
2879
2880 //==============================================================================
2881 // UFRMH Bits
2882
2883 extern __at(0x0E94) __sfr UFRMH;
2884
2885 typedef struct
2886 {
2887 unsigned FRM8 : 1;
2888 unsigned FRM9 : 1;
2889 unsigned FRM10 : 1;
2890 unsigned : 1;
2891 unsigned : 1;
2892 unsigned : 1;
2893 unsigned : 1;
2894 unsigned : 1;
2895 } __UFRMHbits_t;
2896
2897 extern __at(0x0E94) volatile __UFRMHbits_t UFRMHbits;
2898
2899 #define _FRM8 0x01
2900 #define _FRM9 0x02
2901 #define _FRM10 0x04
2902
2903 //==============================================================================
2904
2905
2906 //==============================================================================
2907 // UFRML Bits
2908
2909 extern __at(0x0E95) __sfr UFRML;
2910
2911 typedef struct
2912 {
2913 unsigned FRM0 : 1;
2914 unsigned FRM1 : 1;
2915 unsigned FRM2 : 1;
2916 unsigned FRM3 : 1;
2917 unsigned FRM4 : 1;
2918 unsigned FRM5 : 1;
2919 unsigned FRM6 : 1;
2920 unsigned FRM7 : 1;
2921 } __UFRMLbits_t;
2922
2923 extern __at(0x0E95) volatile __UFRMLbits_t UFRMLbits;
2924
2925 #define _FRM0 0x01
2926 #define _FRM1 0x02
2927 #define _FRM2 0x04
2928 #define _FRM3 0x08
2929 #define _FRM4 0x10
2930 #define _FRM5 0x20
2931 #define _FRM6 0x40
2932 #define _FRM7 0x80
2933
2934 //==============================================================================
2935
2936
2937 //==============================================================================
2938 // UADDR Bits
2939
2940 extern __at(0x0E96) __sfr UADDR;
2941
2942 typedef union
2943 {
2944 struct
2945 {
2946 unsigned ADDR0 : 1;
2947 unsigned ADDR1 : 1;
2948 unsigned ADDR2 : 1;
2949 unsigned ADDR3 : 1;
2950 unsigned ADDR4 : 1;
2951 unsigned ADDR5 : 1;
2952 unsigned ADDR6 : 1;
2953 unsigned : 1;
2954 };
2955
2956 struct
2957 {
2958 unsigned ADDR : 7;
2959 unsigned : 1;
2960 };
2961 } __UADDRbits_t;
2962
2963 extern __at(0x0E96) volatile __UADDRbits_t UADDRbits;
2964
2965 #define _ADDR0 0x01
2966 #define _ADDR1 0x02
2967 #define _ADDR2 0x04
2968 #define _ADDR3 0x08
2969 #define _ADDR4 0x10
2970 #define _ADDR5 0x20
2971 #define _ADDR6 0x40
2972
2973 //==============================================================================
2974
2975
2976 //==============================================================================
2977 // UEIE Bits
2978
2979 extern __at(0x0E97) __sfr UEIE;
2980
2981 typedef struct
2982 {
2983 unsigned PIDEE : 1;
2984 unsigned CRC5EE : 1;
2985 unsigned CRC16EE : 1;
2986 unsigned DFN8EE : 1;
2987 unsigned BTOEE : 1;
2988 unsigned : 1;
2989 unsigned : 1;
2990 unsigned BTSEE : 1;
2991 } __UEIEbits_t;
2992
2993 extern __at(0x0E97) volatile __UEIEbits_t UEIEbits;
2994
2995 #define _PIDEE 0x01
2996 #define _CRC5EE 0x02
2997 #define _CRC16EE 0x04
2998 #define _DFN8EE 0x08
2999 #define _BTOEE 0x10
3000 #define _BTSEE 0x80
3001
3002 //==============================================================================
3003
3004
3005 //==============================================================================
3006 // UEP0 Bits
3007
3008 extern __at(0x0E98) __sfr UEP0;
3009
3010 typedef struct
3011 {
3012 unsigned EPSTALL : 1;
3013 unsigned EPINEN : 1;
3014 unsigned EPOUTEN : 1;
3015 unsigned EPCONDIS : 1;
3016 unsigned EPHSHK : 1;
3017 unsigned : 1;
3018 unsigned : 1;
3019 unsigned : 1;
3020 } __UEP0bits_t;
3021
3022 extern __at(0x0E98) volatile __UEP0bits_t UEP0bits;
3023
3024 #define _EPSTALL 0x01
3025 #define _EPINEN 0x02
3026 #define _EPOUTEN 0x04
3027 #define _EPCONDIS 0x08
3028 #define _EPHSHK 0x10
3029
3030 //==============================================================================
3031
3032
3033 //==============================================================================
3034 // UEP1 Bits
3035
3036 extern __at(0x0E99) __sfr UEP1;
3037
3038 typedef struct
3039 {
3040 unsigned EPSTALL : 1;
3041 unsigned EPINEN : 1;
3042 unsigned EPOUTEN : 1;
3043 unsigned EPCONDIS : 1;
3044 unsigned EPHSHK : 1;
3045 unsigned : 1;
3046 unsigned : 1;
3047 unsigned : 1;
3048 } __UEP1bits_t;
3049
3050 extern __at(0x0E99) volatile __UEP1bits_t UEP1bits;
3051
3052 #define _UEP1_EPSTALL 0x01
3053 #define _UEP1_EPINEN 0x02
3054 #define _UEP1_EPOUTEN 0x04
3055 #define _UEP1_EPCONDIS 0x08
3056 #define _UEP1_EPHSHK 0x10
3057
3058 //==============================================================================
3059
3060
3061 //==============================================================================
3062 // UEP2 Bits
3063
3064 extern __at(0x0E9A) __sfr UEP2;
3065
3066 typedef struct
3067 {
3068 unsigned EPSTALL : 1;
3069 unsigned EPINEN : 1;
3070 unsigned EPOUTEN : 1;
3071 unsigned EPCONDIS : 1;
3072 unsigned EPHSHK : 1;
3073 unsigned : 1;
3074 unsigned : 1;
3075 unsigned : 1;
3076 } __UEP2bits_t;
3077
3078 extern __at(0x0E9A) volatile __UEP2bits_t UEP2bits;
3079
3080 #define _UEP2_EPSTALL 0x01
3081 #define _UEP2_EPINEN 0x02
3082 #define _UEP2_EPOUTEN 0x04
3083 #define _UEP2_EPCONDIS 0x08
3084 #define _UEP2_EPHSHK 0x10
3085
3086 //==============================================================================
3087
3088
3089 //==============================================================================
3090 // UEP3 Bits
3091
3092 extern __at(0x0E9B) __sfr UEP3;
3093
3094 typedef struct
3095 {
3096 unsigned EPSTALL : 1;
3097 unsigned EPINEN : 1;
3098 unsigned EPOUTEN : 1;
3099 unsigned EPCONDIS : 1;
3100 unsigned EPHSHK : 1;
3101 unsigned : 1;
3102 unsigned : 1;
3103 unsigned : 1;
3104 } __UEP3bits_t;
3105
3106 extern __at(0x0E9B) volatile __UEP3bits_t UEP3bits;
3107
3108 #define _UEP3_EPSTALL 0x01
3109 #define _UEP3_EPINEN 0x02
3110 #define _UEP3_EPOUTEN 0x04
3111 #define _UEP3_EPCONDIS 0x08
3112 #define _UEP3_EPHSHK 0x10
3113
3114 //==============================================================================
3115
3116
3117 //==============================================================================
3118 // UEP4 Bits
3119
3120 extern __at(0x0E9C) __sfr UEP4;
3121
3122 typedef struct
3123 {
3124 unsigned EPSTALL : 1;
3125 unsigned EPINEN : 1;
3126 unsigned EPOUTEN : 1;
3127 unsigned EPCONDIS : 1;
3128 unsigned EPHSHK : 1;
3129 unsigned : 1;
3130 unsigned : 1;
3131 unsigned : 1;
3132 } __UEP4bits_t;
3133
3134 extern __at(0x0E9C) volatile __UEP4bits_t UEP4bits;
3135
3136 #define _UEP4_EPSTALL 0x01
3137 #define _UEP4_EPINEN 0x02
3138 #define _UEP4_EPOUTEN 0x04
3139 #define _UEP4_EPCONDIS 0x08
3140 #define _UEP4_EPHSHK 0x10
3141
3142 //==============================================================================
3143
3144
3145 //==============================================================================
3146 // UEP5 Bits
3147
3148 extern __at(0x0E9D) __sfr UEP5;
3149
3150 typedef struct
3151 {
3152 unsigned EPSTALL : 1;
3153 unsigned EPINEN : 1;
3154 unsigned EPOUTEN : 1;
3155 unsigned EPCONDIS : 1;
3156 unsigned EPHSHK : 1;
3157 unsigned : 1;
3158 unsigned : 1;
3159 unsigned : 1;
3160 } __UEP5bits_t;
3161
3162 extern __at(0x0E9D) volatile __UEP5bits_t UEP5bits;
3163
3164 #define _UEP5_EPSTALL 0x01
3165 #define _UEP5_EPINEN 0x02
3166 #define _UEP5_EPOUTEN 0x04
3167 #define _UEP5_EPCONDIS 0x08
3168 #define _UEP5_EPHSHK 0x10
3169
3170 //==============================================================================
3171
3172
3173 //==============================================================================
3174 // UEP6 Bits
3175
3176 extern __at(0x0E9E) __sfr UEP6;
3177
3178 typedef struct
3179 {
3180 unsigned EPSTALL : 1;
3181 unsigned EPINEN : 1;
3182 unsigned EPOUTEN : 1;
3183 unsigned EPCONDIS : 1;
3184 unsigned EPHSHK : 1;
3185 unsigned : 1;
3186 unsigned : 1;
3187 unsigned : 1;
3188 } __UEP6bits_t;
3189
3190 extern __at(0x0E9E) volatile __UEP6bits_t UEP6bits;
3191
3192 #define _UEP6_EPSTALL 0x01
3193 #define _UEP6_EPINEN 0x02
3194 #define _UEP6_EPOUTEN 0x04
3195 #define _UEP6_EPCONDIS 0x08
3196 #define _UEP6_EPHSHK 0x10
3197
3198 //==============================================================================
3199
3200
3201 //==============================================================================
3202 // UEP7 Bits
3203
3204 extern __at(0x0E9F) __sfr UEP7;
3205
3206 typedef struct
3207 {
3208 unsigned EPSTALL : 1;
3209 unsigned EPINEN : 1;
3210 unsigned EPOUTEN : 1;
3211 unsigned EPCONDIS : 1;
3212 unsigned EPHSHK : 1;
3213 unsigned : 1;
3214 unsigned : 1;
3215 unsigned : 1;
3216 } __UEP7bits_t;
3217
3218 extern __at(0x0E9F) volatile __UEP7bits_t UEP7bits;
3219
3220 #define _UEP7_EPSTALL 0x01
3221 #define _UEP7_EPINEN 0x02
3222 #define _UEP7_EPOUTEN 0x04
3223 #define _UEP7_EPCONDIS 0x08
3224 #define _UEP7_EPHSHK 0x10
3225
3226 //==============================================================================
3227
3228
3229 //==============================================================================
3230 // STATUS_SHAD Bits
3231
3232 extern __at(0x0FE4) __sfr STATUS_SHAD;
3233
3234 typedef struct
3235 {
3236 unsigned C : 1;
3237 unsigned DC : 1;
3238 unsigned Z : 1;
3239 unsigned : 1;
3240 unsigned : 1;
3241 unsigned : 1;
3242 unsigned : 1;
3243 unsigned : 1;
3244 } __STATUS_SHADbits_t;
3245
3246 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
3247
3248 #define _STATUS_SHAD_C 0x01
3249 #define _STATUS_SHAD_DC 0x02
3250 #define _STATUS_SHAD_Z 0x04
3251
3252 //==============================================================================
3253
3254 extern __at(0x0FE5) __sfr WREG_SHAD;
3255 extern __at(0x0FE6) __sfr BSR_SHAD;
3256 extern __at(0x0FE7) __sfr PCLATH_SHAD;
3257 extern __at(0x0FE8) __sfr FSR0L_SHAD;
3258 extern __at(0x0FE9) __sfr FSR0H_SHAD;
3259 extern __at(0x0FEA) __sfr FSR1L_SHAD;
3260 extern __at(0x0FEB) __sfr FSR1H_SHAD;
3261 extern __at(0x0FED) __sfr STKPTR;
3262 extern __at(0x0FEE) __sfr TOSL;
3263 extern __at(0x0FEF) __sfr TOSH;
3264
3265 //==============================================================================
3266 //
3267 // Configuration Bits
3268 //
3269 //==============================================================================
3270
3271 #define _CONFIG1 0x8007
3272 #define _CONFIG2 0x8008
3273
3274 //----------------------------- CONFIG1 Options -------------------------------
3275
3276 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
3277 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
3278 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
3279 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
3280 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
3281 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
3282 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
3283 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
3284 #define _WDTE_OFF 0x3FE7 // WDT disabled.
3285 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
3286 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
3287 #define _WDTE_ON 0x3FFF // WDT enabled.
3288 #define _PWRTE_ON 0x3FDF // PWRT enabled.
3289 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
3290 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
3291 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
3292 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
3293 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
3294 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
3295 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
3296 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
3297 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
3298 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
3299 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
3300 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
3301 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
3302 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
3303 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
3304
3305 //----------------------------- CONFIG2 Options -------------------------------
3306
3307 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by PMCON control.
3308 #define _WRT_HALF 0x3FFD // 000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control.
3309 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control.
3310 #define _WRT_OFF 0x3FFF // Write protection off.
3311 #define _CPUDIV_NOCLKDIV 0x3FCF // NO CPU system divide.
3312 #define _CPUDIV_CLKDIV2 0x3FDF // CPU system clock divided by 2.
3313 #define _CPUDIV_CLKDIV3 0x3FEF // CPU system clock divided by 3.
3314 #define _CPUDIV_CLKDIV6 0x3FFF // CPU system clock divided by 6.
3315 #define _USBLSCLK_24MHz 0x3FBF // System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4.
3316 #define _USBLSCLK_48MHz 0x3FFF // System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8.
3317 #define _PLLMULT_4x 0x3F7F // 4x Output Frequency Selected.
3318 #define _PLLMULT_3x 0x3FFF // 3x Output Frequency Selected.
3319 #define _PLLEN_DISABLED 0x3EFF // 3x or 4x PLL Disabled.
3320 #define _PLLEN_ENABLED 0x3FFF // 3x or 4x PLL Enabled.
3321 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
3322 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
3323 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
3324 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
3325 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
3326 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
3327 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
3328 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
3329 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
3330 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
3331
3332 //==============================================================================
3333
3334 #define _DEVID1 0x8006
3335
3336 #define _IDLOC0 0x8000
3337 #define _IDLOC1 0x8001
3338 #define _IDLOC2 0x8002
3339 #define _IDLOC3 0x8003
3340
3341 //==============================================================================
3342
3343 #ifndef NO_BIT_DEFINES
3344
3345 #define ACTORS ACTCONbits.ACTORS // bit 1
3346 #define ACTLOCK ACTCONbits.ACTLOCK // bit 3
3347 #define ACTSRC ACTCONbits.ACTSRC // bit 4
3348 #define ACTUD ACTCONbits.ACTUD // bit 6
3349 #define ACTEN ACTCONbits.ACTEN // bit 7
3350
3351 #define ADON ADCON0bits.ADON // bit 0
3352 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
3353 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
3354 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
3355 #define CHS0 ADCON0bits.CHS0 // bit 2
3356 #define CHS1 ADCON0bits.CHS1 // bit 3
3357 #define CHS2 ADCON0bits.CHS2 // bit 4
3358 #define CHS3 ADCON0bits.CHS3 // bit 5
3359 #define CHS4 ADCON0bits.CHS4 // bit 6
3360
3361 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
3362 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
3363 #define ADCS0 ADCON1bits.ADCS0 // bit 4
3364 #define ADCS1 ADCON1bits.ADCS1 // bit 5
3365 #define ADCS2 ADCON1bits.ADCS2 // bit 6
3366 #define ADFM ADCON1bits.ADFM // bit 7
3367
3368 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
3369 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
3370 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
3371
3372 #define ANSA4 ANSELAbits.ANSA4 // bit 4
3373
3374 #define ANSC0 ANSELCbits.ANSC0 // bit 0
3375 #define ANSC1 ANSELCbits.ANSC1 // bit 1
3376 #define ANSC2 ANSELCbits.ANSC2 // bit 2
3377 #define ANSC3 ANSELCbits.ANSC3 // bit 3
3378
3379 #define P2SEL APFCONbits.P2SEL // bit 2
3380 #define T1GSEL APFCONbits.T1GSEL // bit 3
3381 #define SSSEL APFCONbits.SSSEL // bit 5
3382 #define SDOSEL APFCONbits.SDOSEL // bit 6
3383 #define CLKRSEL APFCONbits.CLKRSEL // bit 7
3384
3385 #define ABDEN BAUDCONbits.ABDEN // bit 0
3386 #define WUE BAUDCONbits.WUE // bit 1
3387 #define BRG16 BAUDCONbits.BRG16 // bit 3
3388 #define SCKP BAUDCONbits.SCKP // bit 4
3389 #define RCIDL BAUDCONbits.RCIDL // bit 6
3390 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
3391
3392 #define BORRDY BORCONbits.BORRDY // bit 0
3393 #define BORFS BORCONbits.BORFS // bit 6
3394 #define SBOREN BORCONbits.SBOREN // bit 7
3395
3396 #define BSR0 BSRbits.BSR0 // bit 0
3397 #define BSR1 BSRbits.BSR1 // bit 1
3398 #define BSR2 BSRbits.BSR2 // bit 2
3399 #define BSR3 BSRbits.BSR3 // bit 3
3400 #define BSR4 BSRbits.BSR4 // bit 4
3401
3402 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0
3403 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1
3404 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2
3405 #define CLKRCD0 CLKRCONbits.CLKRCD0 // bit 3
3406 #define CLKRCD1 CLKRCONbits.CLKRCD1 // bit 4
3407 #define CLKRSLR CLKRCONbits.CLKRSLR // bit 5
3408 #define CLKROE CLKRCONbits.CLKROE // bit 6
3409 #define CLKREN CLKRCONbits.CLKREN // bit 7
3410
3411 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
3412 #define C1HYS CM1CON0bits.C1HYS // bit 1
3413 #define C1SP CM1CON0bits.C1SP // bit 2
3414 #define C1POL CM1CON0bits.C1POL // bit 4
3415 #define C1OE CM1CON0bits.C1OE // bit 5
3416 #define C1OUT CM1CON0bits.C1OUT // bit 6
3417 #define C1ON CM1CON0bits.C1ON // bit 7
3418
3419 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
3420 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
3421 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
3422 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
3423 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
3424 #define C1INTN CM1CON1bits.C1INTN // bit 6
3425 #define C1INTP CM1CON1bits.C1INTP // bit 7
3426
3427 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
3428 #define C2HYS CM2CON0bits.C2HYS // bit 1
3429 #define C2SP CM2CON0bits.C2SP // bit 2
3430 #define C2POL CM2CON0bits.C2POL // bit 4
3431 #define C2OE CM2CON0bits.C2OE // bit 5
3432 #define C2OUT CM2CON0bits.C2OUT // bit 6
3433 #define C2ON CM2CON0bits.C2ON // bit 7
3434
3435 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
3436 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
3437 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
3438 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
3439 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
3440 #define C2INTN CM2CON1bits.C2INTN // bit 6
3441 #define C2INTP CM2CON1bits.C2INTP // bit 7
3442
3443 #define MC1OUT CMOUTbits.MC1OUT // bit 0
3444 #define MC2OUT CMOUTbits.MC2OUT // bit 1
3445
3446 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
3447 #define G1POLA CWG1CON0bits.G1POLA // bit 3
3448 #define G1POLB CWG1CON0bits.G1POLB // bit 4
3449 #define G1OEA CWG1CON0bits.G1OEA // bit 5
3450 #define G1OEB CWG1CON0bits.G1OEB // bit 6
3451 #define G1EN CWG1CON0bits.G1EN // bit 7
3452
3453 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
3454 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
3455 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
3456 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
3457 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
3458 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
3459
3460 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
3461 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
3462 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
3463 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
3464 #define G1ASE CWG1CON2bits.G1ASE // bit 7
3465
3466 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
3467 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
3468 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
3469 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
3470 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
3471 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
3472
3473 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
3474 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
3475 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
3476 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
3477 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
3478 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
3479
3480 #define D1PSS0 DACCON0bits.D1PSS0 // bit 2
3481 #define D1PSS1 DACCON0bits.D1PSS1 // bit 3
3482 #define DACOE2 DACCON0bits.DACOE2 // bit 4
3483 #define DACOE1 DACCON0bits.DACOE1 // bit 5
3484 #define DACEN DACCON0bits.DACEN // bit 7
3485
3486 #define DACR0 DACCON1bits.DACR0 // bit 0
3487 #define DACR1 DACCON1bits.DACR1 // bit 1
3488 #define DACR2 DACCON1bits.DACR2 // bit 2
3489 #define DACR3 DACCON1bits.DACR3 // bit 3
3490 #define DACR4 DACCON1bits.DACR4 // bit 4
3491
3492 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
3493 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
3494 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
3495 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
3496 #define TSRNG FVRCONbits.TSRNG // bit 4
3497 #define TSEN FVRCONbits.TSEN // bit 5
3498 #define FVRRDY FVRCONbits.FVRRDY // bit 6
3499 #define FVREN FVRCONbits.FVREN // bit 7
3500
3501 #define IOCIF INTCONbits.IOCIF // bit 0
3502 #define INTF INTCONbits.INTF // bit 1
3503 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
3504 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
3505 #define IOCIE INTCONbits.IOCIE // bit 3
3506 #define INTE INTCONbits.INTE // bit 4
3507 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
3508 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
3509 #define PEIE INTCONbits.PEIE // bit 6
3510 #define GIE INTCONbits.GIE // bit 7
3511
3512 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
3513 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
3514 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
3515 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
3516 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
3517
3518 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
3519 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
3520 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
3521 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
3522 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
3523
3524 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
3525 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
3526 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
3527 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
3528 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
3529
3530 #define LATA4 LATAbits.LATA4 // bit 4
3531 #define LATA5 LATAbits.LATA5 // bit 5
3532
3533 #define LATC0 LATCbits.LATC0 // bit 0
3534 #define LATC1 LATCbits.LATC1 // bit 1
3535 #define LATC2 LATCbits.LATC2 // bit 2
3536 #define LATC3 LATCbits.LATC3 // bit 3
3537 #define LATC4 LATCbits.LATC4 // bit 4
3538 #define LATC5 LATCbits.LATC5 // bit 5
3539
3540 #define PS0 OPTION_REGbits.PS0 // bit 0
3541 #define PS1 OPTION_REGbits.PS1 // bit 1
3542 #define PS2 OPTION_REGbits.PS2 // bit 2
3543 #define PSA OPTION_REGbits.PSA // bit 3
3544 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
3545 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
3546 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
3547 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
3548 #define INTEDG OPTION_REGbits.INTEDG // bit 6
3549 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
3550
3551 #define SCS0 OSCCONbits.SCS0 // bit 0
3552 #define SCS1 OSCCONbits.SCS1 // bit 1
3553 #define IRCF0 OSCCONbits.IRCF0 // bit 2
3554 #define IRCF1 OSCCONbits.IRCF1 // bit 3
3555 #define IRCF2 OSCCONbits.IRCF2 // bit 4
3556 #define IRCF3 OSCCONbits.IRCF3 // bit 5
3557 #define SPLLMULT OSCCONbits.SPLLMULT // bit 6
3558 #define SPLLEN OSCCONbits.SPLLEN // bit 7
3559
3560 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
3561 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
3562 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
3563 #define OSTS OSCSTATbits.OSTS // bit 5
3564 #define PLLRDY OSCSTATbits.PLLRDY // bit 6
3565 #define SOSCR OSCSTATbits.SOSCR // bit 7
3566
3567 #define TUN0 OSCTUNEbits.TUN0 // bit 0
3568 #define TUN1 OSCTUNEbits.TUN1 // bit 1
3569 #define TUN2 OSCTUNEbits.TUN2 // bit 2
3570 #define TUN3 OSCTUNEbits.TUN3 // bit 3
3571 #define TUN4 OSCTUNEbits.TUN4 // bit 4
3572 #define TUN5 OSCTUNEbits.TUN5 // bit 5
3573 #define TUN6 OSCTUNEbits.TUN6 // bit 6
3574
3575 #define NOT_BOR PCONbits.NOT_BOR // bit 0
3576 #define NOT_POR PCONbits.NOT_POR // bit 1
3577 #define NOT_RI PCONbits.NOT_RI // bit 2
3578 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
3579 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
3580 #define STKUNF PCONbits.STKUNF // bit 6
3581 #define STKOVF PCONbits.STKOVF // bit 7
3582
3583 #define TMR1IE PIE1bits.TMR1IE // bit 0
3584 #define TMR2IE PIE1bits.TMR2IE // bit 1
3585 #define SSP1IE PIE1bits.SSP1IE // bit 3
3586 #define TXIE PIE1bits.TXIE // bit 4
3587 #define RCIE PIE1bits.RCIE // bit 5
3588 #define ADIE PIE1bits.ADIE // bit 6
3589 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
3590
3591 #define ACTIE PIE2bits.ACTIE // bit 1
3592 #define USBIE PIE2bits.USBIE // bit 2
3593 #define BCL1IE PIE2bits.BCL1IE // bit 3
3594 #define C1IE PIE2bits.C1IE // bit 5
3595 #define C2IE PIE2bits.C2IE // bit 6
3596 #define OSFIE PIE2bits.OSFIE // bit 7
3597
3598 #define TMR1IF PIR1bits.TMR1IF // bit 0
3599 #define TMR2IF PIR1bits.TMR2IF // bit 1
3600 #define SSP1IF PIR1bits.SSP1IF // bit 3
3601 #define TXIF PIR1bits.TXIF // bit 4
3602 #define RCIF PIR1bits.RCIF // bit 5
3603 #define ADIF PIR1bits.ADIF // bit 6
3604 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
3605
3606 #define ACTIF PIR2bits.ACTIF // bit 1
3607 #define USBIF PIR2bits.USBIF // bit 2
3608 #define BCL1IF PIR2bits.BCL1IF // bit 3
3609 #define C1IF PIR2bits.C1IF // bit 5
3610 #define C2IF PIR2bits.C2IF // bit 6
3611 #define OSFIF PIR2bits.OSFIF // bit 7
3612
3613 #define RD PMCON1bits.RD // bit 0
3614 #define WR PMCON1bits.WR // bit 1
3615 #define WREN PMCON1bits.WREN // bit 2
3616 #define WRERR PMCON1bits.WRERR // bit 3
3617 #define FREE PMCON1bits.FREE // bit 4
3618 #define LWLO PMCON1bits.LWLO // bit 5
3619 #define CFGS PMCON1bits.CFGS // bit 6
3620
3621 #define RA0 PORTAbits.RA0 // bit 0
3622 #define RA1 PORTAbits.RA1 // bit 1
3623 #define RA3 PORTAbits.RA3 // bit 3
3624 #define RA4 PORTAbits.RA4 // bit 4
3625 #define RA5 PORTAbits.RA5 // bit 5
3626
3627 #define RC0 PORTCbits.RC0 // bit 0
3628 #define RC1 PORTCbits.RC1 // bit 1
3629 #define RC2 PORTCbits.RC2 // bit 2
3630 #define RC3 PORTCbits.RC3 // bit 3
3631 #define RC4 PORTCbits.RC4 // bit 4
3632 #define RC5 PORTCbits.RC5 // bit 5
3633
3634 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
3635 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
3636 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
3637 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
3638
3639 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
3640 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
3641 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
3642 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
3643 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
3644 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
3645 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
3646 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
3647
3648 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
3649 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
3650
3651 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
3652 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
3653 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
3654 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
3655
3656 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
3657 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
3658 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
3659 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
3660 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
3661 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
3662 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
3663 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
3664
3665 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
3666 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
3667
3668 #define RX9D RCSTAbits.RX9D // bit 0
3669 #define OERR RCSTAbits.OERR // bit 1
3670 #define FERR RCSTAbits.FERR // bit 2
3671 #define ADDEN RCSTAbits.ADDEN // bit 3
3672 #define CREN RCSTAbits.CREN // bit 4
3673 #define SREN RCSTAbits.SREN // bit 5
3674 #define RX9 RCSTAbits.RX9 // bit 6
3675 #define SPEN RCSTAbits.SPEN // bit 7
3676
3677 #define SSP1M0 SSP1CON1bits.SSP1M0 // bit 0
3678 #define SSP1M1 SSP1CON1bits.SSP1M1 // bit 1
3679 #define SSP1M2 SSP1CON1bits.SSP1M2 // bit 2
3680 #define SSP1M3 SSP1CON1bits.SSP1M3 // bit 3
3681 #define CKP SSP1CON1bits.CKP // bit 4
3682 #define SSPEN SSP1CON1bits.SSPEN // bit 5, shadows bit in SSP1CON1bits
3683 #define SSP1EN SSP1CON1bits.SSP1EN // bit 5, shadows bit in SSP1CON1bits
3684 #define SSPOV SSP1CON1bits.SSPOV // bit 6, shadows bit in SSP1CON1bits
3685 #define SSP1OV SSP1CON1bits.SSP1OV // bit 6, shadows bit in SSP1CON1bits
3686 #define WCOL SSP1CON1bits.WCOL // bit 7
3687
3688 #define SEN SSP1CON2bits.SEN // bit 0
3689 #define RSEN SSP1CON2bits.RSEN // bit 1
3690 #define PEN SSP1CON2bits.PEN // bit 2
3691 #define RCEN SSP1CON2bits.RCEN // bit 3
3692 #define ACKEN SSP1CON2bits.ACKEN // bit 4
3693 #define ACKDT SSP1CON2bits.ACKDT // bit 5
3694 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
3695 #define GCEN SSP1CON2bits.GCEN // bit 7
3696
3697 #define DHEN SSP1CON3bits.DHEN // bit 0
3698 #define AHEN SSP1CON3bits.AHEN // bit 1
3699 #define SBCDE SSP1CON3bits.SBCDE // bit 2
3700 #define SDAHT SSP1CON3bits.SDAHT // bit 3
3701 #define BOEN SSP1CON3bits.BOEN // bit 4
3702 #define SCIE SSP1CON3bits.SCIE // bit 5
3703 #define PCIE SSP1CON3bits.PCIE // bit 6
3704 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
3705
3706 #define BF SSP1STATbits.BF // bit 0
3707 #define UA SSP1STATbits.UA // bit 1
3708 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
3709 #define S SSP1STATbits.S // bit 3
3710 #define P SSP1STATbits.P // bit 4
3711 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
3712 #define CKE SSP1STATbits.CKE // bit 6
3713 #define SMP SSP1STATbits.SMP // bit 7
3714
3715 #define C STATUSbits.C // bit 0
3716 #define DC STATUSbits.DC // bit 1
3717 #define Z STATUSbits.Z // bit 2
3718 #define NOT_PD STATUSbits.NOT_PD // bit 3
3719 #define NOT_TO STATUSbits.NOT_TO // bit 4
3720
3721 #define TMR1ON T1CONbits.TMR1ON // bit 0
3722 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
3723 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
3724 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
3725 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
3726 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
3727 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
3728
3729 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
3730 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
3731 #define T1GVAL T1GCONbits.T1GVAL // bit 2
3732 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
3733 #define T1GSPM T1GCONbits.T1GSPM // bit 4
3734 #define T1GTM T1GCONbits.T1GTM // bit 5
3735 #define T1GPOL T1GCONbits.T1GPOL // bit 6
3736 #define TMR1GE T1GCONbits.TMR1GE // bit 7
3737
3738 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
3739 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
3740 #define TMR2ON T2CONbits.TMR2ON // bit 2
3741 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
3742 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
3743 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
3744 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
3745
3746 #define TRISA4 TRISAbits.TRISA4 // bit 4
3747 #define TRISA5 TRISAbits.TRISA5 // bit 5
3748
3749 #define TRISC0 TRISCbits.TRISC0 // bit 0
3750 #define TRISC1 TRISCbits.TRISC1 // bit 1
3751 #define TRISC2 TRISCbits.TRISC2 // bit 2
3752 #define TRISC3 TRISCbits.TRISC3 // bit 3
3753 #define TRISC4 TRISCbits.TRISC4 // bit 4
3754 #define TRISC5 TRISCbits.TRISC5 // bit 5
3755
3756 #define TX9D TXSTAbits.TX9D // bit 0
3757 #define TRMT TXSTAbits.TRMT // bit 1
3758 #define BRGH TXSTAbits.BRGH // bit 2
3759 #define SENDB TXSTAbits.SENDB // bit 3
3760 #define SYNC TXSTAbits.SYNC // bit 4
3761 #define TXEN TXSTAbits.TXEN // bit 5
3762 #define TX9 TXSTAbits.TX9 // bit 6
3763 #define CSRC TXSTAbits.CSRC // bit 7
3764
3765 #define ADDR0 UADDRbits.ADDR0 // bit 0
3766 #define ADDR1 UADDRbits.ADDR1 // bit 1
3767 #define ADDR2 UADDRbits.ADDR2 // bit 2
3768 #define ADDR3 UADDRbits.ADDR3 // bit 3
3769 #define ADDR4 UADDRbits.ADDR4 // bit 4
3770 #define ADDR5 UADDRbits.ADDR5 // bit 5
3771 #define ADDR6 UADDRbits.ADDR6 // bit 6
3772
3773 #define PPB0 UCFGbits.PPB0 // bit 0
3774 #define PPB1 UCFGbits.PPB1 // bit 1
3775 #define FSEN UCFGbits.FSEN // bit 2
3776 #define UPUEN UCFGbits.UPUEN // bit 4
3777 #define UTEYE UCFGbits.UTEYE // bit 7
3778
3779 #define SUSPND UCONbits.SUSPND // bit 1
3780 #define RESUME UCONbits.RESUME // bit 2
3781 #define USBEN UCONbits.USBEN // bit 3
3782 #define PKTDIS UCONbits.PKTDIS // bit 4
3783 #define SE0 UCONbits.SE0 // bit 5
3784 #define PPBRST UCONbits.PPBRST // bit 6
3785
3786 #define PIDEE UEIEbits.PIDEE // bit 0
3787 #define CRC5EE UEIEbits.CRC5EE // bit 1
3788 #define CRC16EE UEIEbits.CRC16EE // bit 2
3789 #define DFN8EE UEIEbits.DFN8EE // bit 3
3790 #define BTOEE UEIEbits.BTOEE // bit 4
3791 #define BTSEE UEIEbits.BTSEE // bit 7
3792
3793 #define PIDEF UEIRbits.PIDEF // bit 0
3794 #define CRC5EF UEIRbits.CRC5EF // bit 1
3795 #define CRC16EF UEIRbits.CRC16EF // bit 2
3796 #define DFN8EF UEIRbits.DFN8EF // bit 3
3797 #define BTOEF UEIRbits.BTOEF // bit 4
3798 #define BTSEF UEIRbits.BTSEF // bit 7
3799
3800 #define EPSTALL UEP0bits.EPSTALL // bit 0
3801 #define EPINEN UEP0bits.EPINEN // bit 1
3802 #define EPOUTEN UEP0bits.EPOUTEN // bit 2
3803 #define EPCONDIS UEP0bits.EPCONDIS // bit 3
3804 #define EPHSHK UEP0bits.EPHSHK // bit 4
3805
3806 #define FRM8 UFRMHbits.FRM8 // bit 0
3807 #define FRM9 UFRMHbits.FRM9 // bit 1
3808 #define FRM10 UFRMHbits.FRM10 // bit 2
3809
3810 #define FRM0 UFRMLbits.FRM0 // bit 0
3811 #define FRM1 UFRMLbits.FRM1 // bit 1
3812 #define FRM2 UFRMLbits.FRM2 // bit 2
3813 #define FRM3 UFRMLbits.FRM3 // bit 3
3814 #define FRM4 UFRMLbits.FRM4 // bit 4
3815 #define FRM5 UFRMLbits.FRM5 // bit 5
3816 #define FRM6 UFRMLbits.FRM6 // bit 6
3817 #define FRM7 UFRMLbits.FRM7 // bit 7
3818
3819 #define URSTIE UIEbits.URSTIE // bit 0
3820 #define UERRIE UIEbits.UERRIE // bit 1
3821 #define ACTVIE UIEbits.ACTVIE // bit 2
3822 #define TRNIE UIEbits.TRNIE // bit 3
3823 #define IDLEIE UIEbits.IDLEIE // bit 4
3824 #define STALLIE UIEbits.STALLIE // bit 5
3825 #define SOFIE UIEbits.SOFIE // bit 6
3826
3827 #define URSTIF UIRbits.URSTIF // bit 0
3828 #define UERRIF UIRbits.UERRIF // bit 1
3829 #define ACTVIF UIRbits.ACTVIF // bit 2
3830 #define TRNIF UIRbits.TRNIF // bit 3
3831 #define IDLEIF UIRbits.IDLEIF // bit 4
3832 #define STALLIF UIRbits.STALLIF // bit 5
3833 #define SOFIF UIRbits.SOFIF // bit 6
3834
3835 #define PPBI USTATbits.PPBI // bit 1
3836 #define DIR USTATbits.DIR // bit 2
3837 #define ENDP0 USTATbits.ENDP0 // bit 3
3838 #define ENDP1 USTATbits.ENDP1 // bit 4
3839 #define ENDP2 USTATbits.ENDP2 // bit 5
3840 #define ENDP3 USTATbits.ENDP3 // bit 6
3841
3842 #define VREGPM0 VREGCONbits.VREGPM0 // bit 0
3843 #define VREGPM1 VREGCONbits.VREGPM1 // bit 1
3844
3845 #define SWDTEN WDTCONbits.SWDTEN // bit 0
3846 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
3847 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
3848 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
3849 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
3850 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
3851
3852 #define WPUA3 WPUAbits.WPUA3 // bit 3
3853 #define WPUA4 WPUAbits.WPUA4 // bit 4
3854 #define WPUA5 WPUAbits.WPUA5 // bit 5
3855
3856 #endif // #ifndef NO_BIT_DEFINES
3857
3858 #endif // #ifndef __PIC16F1455_H__
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