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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f1507.h
blob5819810c29a82e8319195560c0c37f3101f07380
1 /*
2 * This declarations of the PIC16F1507 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:06 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F1507_H__
26 #define __PIC16F1507_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PIR1_ADDR 0x0011
54 #define PIR2_ADDR 0x0012
55 #define PIR3_ADDR 0x0013
56 #define TMR0_ADDR 0x0015
57 #define TMR1_ADDR 0x0016
58 #define TMR1L_ADDR 0x0016
59 #define TMR1H_ADDR 0x0017
60 #define T1CON_ADDR 0x0018
61 #define T1GCON_ADDR 0x0019
62 #define TMR2_ADDR 0x001A
63 #define PR2_ADDR 0x001B
64 #define T2CON_ADDR 0x001C
65 #define TRISA_ADDR 0x008C
66 #define TRISB_ADDR 0x008D
67 #define TRISC_ADDR 0x008E
68 #define PIE1_ADDR 0x0091
69 #define PIE2_ADDR 0x0092
70 #define PIE3_ADDR 0x0093
71 #define OPTION_REG_ADDR 0x0095
72 #define PCON_ADDR 0x0096
73 #define WDTCON_ADDR 0x0097
74 #define OSCCON_ADDR 0x0099
75 #define OSCSTAT_ADDR 0x009A
76 #define ADRES_ADDR 0x009B
77 #define ADRESL_ADDR 0x009B
78 #define ADRESH_ADDR 0x009C
79 #define ADCON0_ADDR 0x009D
80 #define ADCON1_ADDR 0x009E
81 #define ADCON2_ADDR 0x009F
82 #define LATA_ADDR 0x010C
83 #define LATB_ADDR 0x010D
84 #define LATC_ADDR 0x010E
85 #define BORCON_ADDR 0x0116
86 #define FVRCON_ADDR 0x0117
87 #define APFCON_ADDR 0x011D
88 #define ANSELA_ADDR 0x018C
89 #define ANSELB_ADDR 0x018D
90 #define ANSELC_ADDR 0x018E
91 #define PMADR_ADDR 0x0191
92 #define PMADRL_ADDR 0x0191
93 #define PMADRH_ADDR 0x0192
94 #define PMDAT_ADDR 0x0193
95 #define PMDATL_ADDR 0x0193
96 #define PMDATH_ADDR 0x0194
97 #define PMCON1_ADDR 0x0195
98 #define PMCON2_ADDR 0x0196
99 #define VREGCON_ADDR 0x0197
100 #define WPUA_ADDR 0x020C
101 #define WPUB_ADDR 0x020D
102 #define IOCAP_ADDR 0x0391
103 #define IOCAN_ADDR 0x0392
104 #define IOCAF_ADDR 0x0393
105 #define IOCBP_ADDR 0x0394
106 #define IOCBN_ADDR 0x0395
107 #define IOCBF_ADDR 0x0396
108 #define NCO1ACC_ADDR 0x0498
109 #define NCO1ACCL_ADDR 0x0498
110 #define NCO1ACCH_ADDR 0x0499
111 #define NCO1ACCU_ADDR 0x049A
112 #define NCO1INC_ADDR 0x049B
113 #define NCO1INCL_ADDR 0x049B
114 #define NCO1INCH_ADDR 0x049C
115 #define NCO1INCU_ADDR 0x049D
116 #define NCO1CON_ADDR 0x049E
117 #define NCO1CLK_ADDR 0x049F
118 #define PWM1DCL_ADDR 0x0611
119 #define PWM1DCH_ADDR 0x0612
120 #define PWM1CON_ADDR 0x0613
121 #define PWM1CON0_ADDR 0x0613
122 #define PWM2DCL_ADDR 0x0614
123 #define PWM2DCH_ADDR 0x0615
124 #define PWM2CON_ADDR 0x0616
125 #define PWM2CON0_ADDR 0x0616
126 #define PWM3DCL_ADDR 0x0617
127 #define PWM3DCH_ADDR 0x0618
128 #define PWM3CON_ADDR 0x0619
129 #define PWM3CON0_ADDR 0x0619
130 #define PWM4DCL_ADDR 0x061A
131 #define PWM4DCH_ADDR 0x061B
132 #define PWM4CON_ADDR 0x061C
133 #define PWM4CON0_ADDR 0x061C
134 #define CWG1DBR_ADDR 0x0691
135 #define CWG1DBF_ADDR 0x0692
136 #define CWG1CON0_ADDR 0x0693
137 #define CWG1CON1_ADDR 0x0694
138 #define CWG1CON2_ADDR 0x0695
139 #define CLCDATA_ADDR 0x0F0F
140 #define CLC1CON_ADDR 0x0F10
141 #define CLC1POL_ADDR 0x0F11
142 #define CLC1SEL0_ADDR 0x0F12
143 #define CLC1SEL1_ADDR 0x0F13
144 #define CLC1GLS0_ADDR 0x0F14
145 #define CLC1GLS1_ADDR 0x0F15
146 #define CLC1GLS2_ADDR 0x0F16
147 #define CLC1GLS3_ADDR 0x0F17
148 #define CLC2CON_ADDR 0x0F18
149 #define CLC2POL_ADDR 0x0F19
150 #define CLC2SEL0_ADDR 0x0F1A
151 #define CLC2SEL1_ADDR 0x0F1B
152 #define CLC2GLS0_ADDR 0x0F1C
153 #define CLC2GLS1_ADDR 0x0F1D
154 #define CLC2GLS2_ADDR 0x0F1E
155 #define CLC2GLS3_ADDR 0x0F1F
156 #define BSR_ICDSHAD_ADDR 0x0FE3
157 #define STATUS_SHAD_ADDR 0x0FE4
158 #define WREG_SHAD_ADDR 0x0FE5
159 #define BSR_SHAD_ADDR 0x0FE6
160 #define PCLATH_SHAD_ADDR 0x0FE7
161 #define FSR0L_SHAD_ADDR 0x0FE8
162 #define FSR0H_SHAD_ADDR 0x0FE9
163 #define FSR1L_SHAD_ADDR 0x0FEA
164 #define FSR1H_SHAD_ADDR 0x0FEB
165 #define STKPTR_ADDR 0x0FED
166 #define TOSL_ADDR 0x0FEE
167 #define TOSH_ADDR 0x0FEF
168
169 #endif // #ifndef NO_ADDR_DEFINES
170
171 //==============================================================================
172 //
173 // Register Definitions
174 //
175 //==============================================================================
176
177 extern __at(0x0000) __sfr INDF0;
178 extern __at(0x0001) __sfr INDF1;
179 extern __at(0x0002) __sfr PCL;
180
181 //==============================================================================
182 // STATUS Bits
183
184 extern __at(0x0003) __sfr STATUS;
185
186 typedef struct
187 {
188 unsigned C : 1;
189 unsigned DC : 1;
190 unsigned Z : 1;
191 unsigned NOT_PD : 1;
192 unsigned NOT_TO : 1;
193 unsigned : 1;
194 unsigned : 1;
195 unsigned : 1;
196 } __STATUSbits_t;
197
198 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
199
200 #define _C 0x01
201 #define _DC 0x02
202 #define _Z 0x04
203 #define _NOT_PD 0x08
204 #define _NOT_TO 0x10
205
206 //==============================================================================
207
208 extern __at(0x0004) __sfr FSR0;
209 extern __at(0x0004) __sfr FSR0L;
210 extern __at(0x0005) __sfr FSR0H;
211 extern __at(0x0006) __sfr FSR1;
212 extern __at(0x0006) __sfr FSR1L;
213 extern __at(0x0007) __sfr FSR1H;
214
215 //==============================================================================
216 // BSR Bits
217
218 extern __at(0x0008) __sfr BSR;
219
220 typedef union
221 {
222 struct
223 {
224 unsigned BSR0 : 1;
225 unsigned BSR1 : 1;
226 unsigned BSR2 : 1;
227 unsigned BSR3 : 1;
228 unsigned BSR4 : 1;
229 unsigned : 1;
230 unsigned : 1;
231 unsigned : 1;
232 };
233
234 struct
235 {
236 unsigned BSR : 5;
237 unsigned : 3;
238 };
239 } __BSRbits_t;
240
241 extern __at(0x0008) volatile __BSRbits_t BSRbits;
242
243 #define _BSR0 0x01
244 #define _BSR1 0x02
245 #define _BSR2 0x04
246 #define _BSR3 0x08
247 #define _BSR4 0x10
248
249 //==============================================================================
250
251 extern __at(0x0009) __sfr WREG;
252 extern __at(0x000A) __sfr PCLATH;
253
254 //==============================================================================
255 // INTCON Bits
256
257 extern __at(0x000B) __sfr INTCON;
258
259 typedef union
260 {
261 struct
262 {
263 unsigned IOCIF : 1;
264 unsigned INTF : 1;
265 unsigned TMR0IF : 1;
266 unsigned IOCIE : 1;
267 unsigned INTE : 1;
268 unsigned TMR0IE : 1;
269 unsigned PEIE : 1;
270 unsigned GIE : 1;
271 };
272
273 struct
274 {
275 unsigned : 1;
276 unsigned : 1;
277 unsigned T0IF : 1;
278 unsigned : 1;
279 unsigned : 1;
280 unsigned T0IE : 1;
281 unsigned : 1;
282 unsigned : 1;
283 };
284 } __INTCONbits_t;
285
286 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
287
288 #define _IOCIF 0x01
289 #define _INTF 0x02
290 #define _TMR0IF 0x04
291 #define _T0IF 0x04
292 #define _IOCIE 0x08
293 #define _INTE 0x10
294 #define _TMR0IE 0x20
295 #define _T0IE 0x20
296 #define _PEIE 0x40
297 #define _GIE 0x80
298
299 //==============================================================================
300
301
302 //==============================================================================
303 // PORTA Bits
304
305 extern __at(0x000C) __sfr PORTA;
306
307 typedef union
308 {
309 struct
310 {
311 unsigned RA0 : 1;
312 unsigned RA1 : 1;
313 unsigned RA2 : 1;
314 unsigned RA3 : 1;
315 unsigned RA4 : 1;
316 unsigned RA5 : 1;
317 unsigned : 1;
318 unsigned : 1;
319 };
320
321 struct
322 {
323 unsigned RA : 6;
324 unsigned : 2;
325 };
326 } __PORTAbits_t;
327
328 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
329
330 #define _RA0 0x01
331 #define _RA1 0x02
332 #define _RA2 0x04
333 #define _RA3 0x08
334 #define _RA4 0x10
335 #define _RA5 0x20
336
337 //==============================================================================
338
339
340 //==============================================================================
341 // PORTB Bits
342
343 extern __at(0x000D) __sfr PORTB;
344
345 typedef struct
346 {
347 unsigned : 1;
348 unsigned : 1;
349 unsigned : 1;
350 unsigned : 1;
351 unsigned RB4 : 1;
352 unsigned RB5 : 1;
353 unsigned RB6 : 1;
354 unsigned RB7 : 1;
355 } __PORTBbits_t;
356
357 extern __at(0x000D) volatile __PORTBbits_t PORTBbits;
358
359 #define _RB4 0x10
360 #define _RB5 0x20
361 #define _RB6 0x40
362 #define _RB7 0x80
363
364 //==============================================================================
365
366
367 //==============================================================================
368 // PORTC Bits
369
370 extern __at(0x000E) __sfr PORTC;
371
372 typedef struct
373 {
374 unsigned RC0 : 1;
375 unsigned RC1 : 1;
376 unsigned RC2 : 1;
377 unsigned RC3 : 1;
378 unsigned RC4 : 1;
379 unsigned RC5 : 1;
380 unsigned RC6 : 1;
381 unsigned RC7 : 1;
382 } __PORTCbits_t;
383
384 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
385
386 #define _RC0 0x01
387 #define _RC1 0x02
388 #define _RC2 0x04
389 #define _RC3 0x08
390 #define _RC4 0x10
391 #define _RC5 0x20
392 #define _RC6 0x40
393 #define _RC7 0x80
394
395 //==============================================================================
396
397
398 //==============================================================================
399 // PIR1 Bits
400
401 extern __at(0x0011) __sfr PIR1;
402
403 typedef struct
404 {
405 unsigned TMR1IF : 1;
406 unsigned TMR2IF : 1;
407 unsigned : 1;
408 unsigned : 1;
409 unsigned : 1;
410 unsigned : 1;
411 unsigned ADIF : 1;
412 unsigned TMR1GIF : 1;
413 } __PIR1bits_t;
414
415 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
416
417 #define _TMR1IF 0x01
418 #define _TMR2IF 0x02
419 #define _ADIF 0x40
420 #define _TMR1GIF 0x80
421
422 //==============================================================================
423
424
425 //==============================================================================
426 // PIR2 Bits
427
428 extern __at(0x0012) __sfr PIR2;
429
430 typedef struct
431 {
432 unsigned : 1;
433 unsigned : 1;
434 unsigned NCO1IF : 1;
435 unsigned : 1;
436 unsigned : 1;
437 unsigned : 1;
438 unsigned : 1;
439 unsigned : 1;
440 } __PIR2bits_t;
441
442 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
443
444 #define _NCO1IF 0x04
445
446 //==============================================================================
447
448
449 //==============================================================================
450 // PIR3 Bits
451
452 extern __at(0x0013) __sfr PIR3;
453
454 typedef struct
455 {
456 unsigned CLC1IF : 1;
457 unsigned CLC2IF : 1;
458 unsigned : 1;
459 unsigned : 1;
460 unsigned : 1;
461 unsigned : 1;
462 unsigned : 1;
463 unsigned : 1;
464 } __PIR3bits_t;
465
466 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
467
468 #define _CLC1IF 0x01
469 #define _CLC2IF 0x02
470
471 //==============================================================================
472
473 extern __at(0x0015) __sfr TMR0;
474 extern __at(0x0016) __sfr TMR1;
475 extern __at(0x0016) __sfr TMR1L;
476 extern __at(0x0017) __sfr TMR1H;
477
478 //==============================================================================
479 // T1CON Bits
480
481 extern __at(0x0018) __sfr T1CON;
482
483 typedef union
484 {
485 struct
486 {
487 unsigned TMR1ON : 1;
488 unsigned : 1;
489 unsigned NOT_T1SYNC : 1;
490 unsigned T1OSCEN : 1;
491 unsigned T1CKPS0 : 1;
492 unsigned T1CKPS1 : 1;
493 unsigned TMR1CS0 : 1;
494 unsigned TMR1CS1 : 1;
495 };
496
497 struct
498 {
499 unsigned : 4;
500 unsigned T1CKPS : 2;
501 unsigned : 2;
502 };
503
504 struct
505 {
506 unsigned : 6;
507 unsigned TMR1CS : 2;
508 };
509 } __T1CONbits_t;
510
511 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
512
513 #define _TMR1ON 0x01
514 #define _NOT_T1SYNC 0x04
515 #define _T1OSCEN 0x08
516 #define _T1CKPS0 0x10
517 #define _T1CKPS1 0x20
518 #define _TMR1CS0 0x40
519 #define _TMR1CS1 0x80
520
521 //==============================================================================
522
523
524 //==============================================================================
525 // T1GCON Bits
526
527 extern __at(0x0019) __sfr T1GCON;
528
529 typedef union
530 {
531 struct
532 {
533 unsigned T1GSS0 : 1;
534 unsigned T1GSS1 : 1;
535 unsigned T1GVAL : 1;
536 unsigned T1GGO_NOT_DONE : 1;
537 unsigned T1GSPM : 1;
538 unsigned T1GTM : 1;
539 unsigned T1GPOL : 1;
540 unsigned TMR1GE : 1;
541 };
542
543 struct
544 {
545 unsigned T1GSS : 2;
546 unsigned : 6;
547 };
548 } __T1GCONbits_t;
549
550 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
551
552 #define _T1GSS0 0x01
553 #define _T1GSS1 0x02
554 #define _T1GVAL 0x04
555 #define _T1GGO_NOT_DONE 0x08
556 #define _T1GSPM 0x10
557 #define _T1GTM 0x20
558 #define _T1GPOL 0x40
559 #define _TMR1GE 0x80
560
561 //==============================================================================
562
563 extern __at(0x001A) __sfr TMR2;
564 extern __at(0x001B) __sfr PR2;
565
566 //==============================================================================
567 // T2CON Bits
568
569 extern __at(0x001C) __sfr T2CON;
570
571 typedef union
572 {
573 struct
574 {
575 unsigned T2CKPS0 : 1;
576 unsigned T2CKPS1 : 1;
577 unsigned TMR2ON : 1;
578 unsigned TOUTPS0 : 1;
579 unsigned TOUTPS1 : 1;
580 unsigned TOUTPS2 : 1;
581 unsigned TOUTPS3 : 1;
582 unsigned : 1;
583 };
584
585 struct
586 {
587 unsigned T2CKPS : 2;
588 unsigned : 6;
589 };
590
591 struct
592 {
593 unsigned : 3;
594 unsigned TOUTPS : 4;
595 unsigned : 1;
596 };
597 } __T2CONbits_t;
598
599 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
600
601 #define _T2CKPS0 0x01
602 #define _T2CKPS1 0x02
603 #define _TMR2ON 0x04
604 #define _TOUTPS0 0x08
605 #define _TOUTPS1 0x10
606 #define _TOUTPS2 0x20
607 #define _TOUTPS3 0x40
608
609 //==============================================================================
610
611
612 //==============================================================================
613 // TRISA Bits
614
615 extern __at(0x008C) __sfr TRISA;
616
617 typedef union
618 {
619 struct
620 {
621 unsigned TRISA0 : 1;
622 unsigned TRISA1 : 1;
623 unsigned TRISA2 : 1;
624 unsigned TRISA3 : 1;
625 unsigned TRISA4 : 1;
626 unsigned TRISA5 : 1;
627 unsigned : 1;
628 unsigned : 1;
629 };
630
631 struct
632 {
633 unsigned TRISA : 6;
634 unsigned : 2;
635 };
636 } __TRISAbits_t;
637
638 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
639
640 #define _TRISA0 0x01
641 #define _TRISA1 0x02
642 #define _TRISA2 0x04
643 #define _TRISA3 0x08
644 #define _TRISA4 0x10
645 #define _TRISA5 0x20
646
647 //==============================================================================
648
649
650 //==============================================================================
651 // TRISB Bits
652
653 extern __at(0x008D) __sfr TRISB;
654
655 typedef struct
656 {
657 unsigned : 1;
658 unsigned : 1;
659 unsigned : 1;
660 unsigned : 1;
661 unsigned TRISB4 : 1;
662 unsigned TRISB5 : 1;
663 unsigned TRISB6 : 1;
664 unsigned TRISB7 : 1;
665 } __TRISBbits_t;
666
667 extern __at(0x008D) volatile __TRISBbits_t TRISBbits;
668
669 #define _TRISB4 0x10
670 #define _TRISB5 0x20
671 #define _TRISB6 0x40
672 #define _TRISB7 0x80
673
674 //==============================================================================
675
676
677 //==============================================================================
678 // TRISC Bits
679
680 extern __at(0x008E) __sfr TRISC;
681
682 typedef struct
683 {
684 unsigned TRISC0 : 1;
685 unsigned TRISC1 : 1;
686 unsigned TRISC2 : 1;
687 unsigned TRISC3 : 1;
688 unsigned TRISC4 : 1;
689 unsigned TRISC5 : 1;
690 unsigned TRISC6 : 1;
691 unsigned TRISC7 : 1;
692 } __TRISCbits_t;
693
694 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
695
696 #define _TRISC0 0x01
697 #define _TRISC1 0x02
698 #define _TRISC2 0x04
699 #define _TRISC3 0x08
700 #define _TRISC4 0x10
701 #define _TRISC5 0x20
702 #define _TRISC6 0x40
703 #define _TRISC7 0x80
704
705 //==============================================================================
706
707
708 //==============================================================================
709 // PIE1 Bits
710
711 extern __at(0x0091) __sfr PIE1;
712
713 typedef struct
714 {
715 unsigned TMR1IE : 1;
716 unsigned TMR2IE : 1;
717 unsigned : 1;
718 unsigned : 1;
719 unsigned : 1;
720 unsigned : 1;
721 unsigned ADIE : 1;
722 unsigned TMR1GIE : 1;
723 } __PIE1bits_t;
724
725 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
726
727 #define _TMR1IE 0x01
728 #define _TMR2IE 0x02
729 #define _ADIE 0x40
730 #define _TMR1GIE 0x80
731
732 //==============================================================================
733
734
735 //==============================================================================
736 // PIE2 Bits
737
738 extern __at(0x0092) __sfr PIE2;
739
740 typedef struct
741 {
742 unsigned : 1;
743 unsigned : 1;
744 unsigned NCO1IE : 1;
745 unsigned : 1;
746 unsigned : 1;
747 unsigned : 1;
748 unsigned : 1;
749 unsigned : 1;
750 } __PIE2bits_t;
751
752 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
753
754 #define _NCO1IE 0x04
755
756 //==============================================================================
757
758
759 //==============================================================================
760 // PIE3 Bits
761
762 extern __at(0x0093) __sfr PIE3;
763
764 typedef struct
765 {
766 unsigned CLC1IE : 1;
767 unsigned CLC2IE : 1;
768 unsigned : 1;
769 unsigned : 1;
770 unsigned : 1;
771 unsigned : 1;
772 unsigned : 1;
773 unsigned : 1;
774 } __PIE3bits_t;
775
776 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
777
778 #define _CLC1IE 0x01
779 #define _CLC2IE 0x02
780
781 //==============================================================================
782
783
784 //==============================================================================
785 // OPTION_REG Bits
786
787 extern __at(0x0095) __sfr OPTION_REG;
788
789 typedef union
790 {
791 struct
792 {
793 unsigned PS0 : 1;
794 unsigned PS1 : 1;
795 unsigned PS2 : 1;
796 unsigned PSA : 1;
797 unsigned TMR0SE : 1;
798 unsigned TMR0CS : 1;
799 unsigned INTEDG : 1;
800 unsigned NOT_WPUEN : 1;
801 };
802
803 struct
804 {
805 unsigned : 1;
806 unsigned : 1;
807 unsigned : 1;
808 unsigned : 1;
809 unsigned T0SE : 1;
810 unsigned T0CS : 1;
811 unsigned : 1;
812 unsigned : 1;
813 };
814
815 struct
816 {
817 unsigned PS : 3;
818 unsigned : 5;
819 };
820 } __OPTION_REGbits_t;
821
822 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
823
824 #define _PS0 0x01
825 #define _PS1 0x02
826 #define _PS2 0x04
827 #define _PSA 0x08
828 #define _TMR0SE 0x10
829 #define _T0SE 0x10
830 #define _TMR0CS 0x20
831 #define _T0CS 0x20
832 #define _INTEDG 0x40
833 #define _NOT_WPUEN 0x80
834
835 //==============================================================================
836
837
838 //==============================================================================
839 // PCON Bits
840
841 extern __at(0x0096) __sfr PCON;
842
843 typedef struct
844 {
845 unsigned NOT_BOR : 1;
846 unsigned NOT_POR : 1;
847 unsigned NOT_RI : 1;
848 unsigned NOT_RMCLR : 1;
849 unsigned NOT_RWDT : 1;
850 unsigned : 1;
851 unsigned STKUNF : 1;
852 unsigned STKOVF : 1;
853 } __PCONbits_t;
854
855 extern __at(0x0096) volatile __PCONbits_t PCONbits;
856
857 #define _NOT_BOR 0x01
858 #define _NOT_POR 0x02
859 #define _NOT_RI 0x04
860 #define _NOT_RMCLR 0x08
861 #define _NOT_RWDT 0x10
862 #define _STKUNF 0x40
863 #define _STKOVF 0x80
864
865 //==============================================================================
866
867
868 //==============================================================================
869 // WDTCON Bits
870
871 extern __at(0x0097) __sfr WDTCON;
872
873 typedef union
874 {
875 struct
876 {
877 unsigned SWDTEN : 1;
878 unsigned WDTPS0 : 1;
879 unsigned WDTPS1 : 1;
880 unsigned WDTPS2 : 1;
881 unsigned WDTPS3 : 1;
882 unsigned WDTPS4 : 1;
883 unsigned : 1;
884 unsigned : 1;
885 };
886
887 struct
888 {
889 unsigned : 1;
890 unsigned WDTPS : 5;
891 unsigned : 2;
892 };
893 } __WDTCONbits_t;
894
895 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
896
897 #define _SWDTEN 0x01
898 #define _WDTPS0 0x02
899 #define _WDTPS1 0x04
900 #define _WDTPS2 0x08
901 #define _WDTPS3 0x10
902 #define _WDTPS4 0x20
903
904 //==============================================================================
905
906
907 //==============================================================================
908 // OSCCON Bits
909
910 extern __at(0x0099) __sfr OSCCON;
911
912 typedef union
913 {
914 struct
915 {
916 unsigned SCS0 : 1;
917 unsigned SCS1 : 1;
918 unsigned : 1;
919 unsigned IRCF0 : 1;
920 unsigned IRCF1 : 1;
921 unsigned IRCF2 : 1;
922 unsigned IRCF3 : 1;
923 unsigned : 1;
924 };
925
926 struct
927 {
928 unsigned SCS : 2;
929 unsigned : 6;
930 };
931
932 struct
933 {
934 unsigned : 3;
935 unsigned IRCF : 4;
936 unsigned : 1;
937 };
938 } __OSCCONbits_t;
939
940 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
941
942 #define _SCS0 0x01
943 #define _SCS1 0x02
944 #define _IRCF0 0x08
945 #define _IRCF1 0x10
946 #define _IRCF2 0x20
947 #define _IRCF3 0x40
948
949 //==============================================================================
950
951
952 //==============================================================================
953 // OSCSTAT Bits
954
955 extern __at(0x009A) __sfr OSCSTAT;
956
957 typedef struct
958 {
959 unsigned HFIOFS : 1;
960 unsigned LFIOFR : 1;
961 unsigned : 1;
962 unsigned : 1;
963 unsigned HFIOFR : 1;
964 unsigned OSTS : 1;
965 unsigned : 1;
966 unsigned SOSCR : 1;
967 } __OSCSTATbits_t;
968
969 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
970
971 #define _HFIOFS 0x01
972 #define _LFIOFR 0x02
973 #define _HFIOFR 0x10
974 #define _OSTS 0x20
975 #define _SOSCR 0x80
976
977 //==============================================================================
978
979 extern __at(0x009B) __sfr ADRES;
980 extern __at(0x009B) __sfr ADRESL;
981 extern __at(0x009C) __sfr ADRESH;
982
983 //==============================================================================
984 // ADCON0 Bits
985
986 extern __at(0x009D) __sfr ADCON0;
987
988 typedef union
989 {
990 struct
991 {
992 unsigned ADON : 1;
993 unsigned GO_NOT_DONE : 1;
994 unsigned CHS0 : 1;
995 unsigned CHS1 : 1;
996 unsigned CHS2 : 1;
997 unsigned CHS3 : 1;
998 unsigned CHS4 : 1;
999 unsigned : 1;
1000 };
1001
1002 struct
1003 {
1004 unsigned : 1;
1005 unsigned ADGO : 1;
1006 unsigned : 1;
1007 unsigned : 1;
1008 unsigned : 1;
1009 unsigned : 1;
1010 unsigned : 1;
1011 unsigned : 1;
1012 };
1013
1014 struct
1015 {
1016 unsigned : 1;
1017 unsigned GO : 1;
1018 unsigned : 1;
1019 unsigned : 1;
1020 unsigned : 1;
1021 unsigned : 1;
1022 unsigned : 1;
1023 unsigned : 1;
1024 };
1025
1026 struct
1027 {
1028 unsigned : 2;
1029 unsigned CHS : 5;
1030 unsigned : 1;
1031 };
1032 } __ADCON0bits_t;
1033
1034 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1035
1036 #define _ADON 0x01
1037 #define _GO_NOT_DONE 0x02
1038 #define _ADGO 0x02
1039 #define _GO 0x02
1040 #define _CHS0 0x04
1041 #define _CHS1 0x08
1042 #define _CHS2 0x10
1043 #define _CHS3 0x20
1044 #define _CHS4 0x40
1045
1046 //==============================================================================
1047
1048
1049 //==============================================================================
1050 // ADCON1 Bits
1051
1052 extern __at(0x009E) __sfr ADCON1;
1053
1054 typedef union
1055 {
1056 struct
1057 {
1058 unsigned ADPREF0 : 1;
1059 unsigned ADPREF1 : 1;
1060 unsigned : 1;
1061 unsigned : 1;
1062 unsigned ADCS0 : 1;
1063 unsigned ADCS1 : 1;
1064 unsigned ADCS2 : 1;
1065 unsigned ADFM : 1;
1066 };
1067
1068 struct
1069 {
1070 unsigned ADPREF : 2;
1071 unsigned : 6;
1072 };
1073
1074 struct
1075 {
1076 unsigned : 4;
1077 unsigned ADCS : 3;
1078 unsigned : 1;
1079 };
1080 } __ADCON1bits_t;
1081
1082 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1083
1084 #define _ADPREF0 0x01
1085 #define _ADPREF1 0x02
1086 #define _ADCS0 0x10
1087 #define _ADCS1 0x20
1088 #define _ADCS2 0x40
1089 #define _ADFM 0x80
1090
1091 //==============================================================================
1092
1093
1094 //==============================================================================
1095 // ADCON2 Bits
1096
1097 extern __at(0x009F) __sfr ADCON2;
1098
1099 typedef union
1100 {
1101 struct
1102 {
1103 unsigned : 1;
1104 unsigned : 1;
1105 unsigned : 1;
1106 unsigned : 1;
1107 unsigned TRIGSEL0 : 1;
1108 unsigned TRIGSEL1 : 1;
1109 unsigned TRIGSEL2 : 1;
1110 unsigned TRIGSEL3 : 1;
1111 };
1112
1113 struct
1114 {
1115 unsigned : 4;
1116 unsigned TRIGSEL : 4;
1117 };
1118 } __ADCON2bits_t;
1119
1120 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1121
1122 #define _TRIGSEL0 0x10
1123 #define _TRIGSEL1 0x20
1124 #define _TRIGSEL2 0x40
1125 #define _TRIGSEL3 0x80
1126
1127 //==============================================================================
1128
1129
1130 //==============================================================================
1131 // LATA Bits
1132
1133 extern __at(0x010C) __sfr LATA;
1134
1135 typedef struct
1136 {
1137 unsigned LATA0 : 1;
1138 unsigned LATA1 : 1;
1139 unsigned LATA2 : 1;
1140 unsigned : 1;
1141 unsigned LATA4 : 1;
1142 unsigned LATA5 : 1;
1143 unsigned : 1;
1144 unsigned : 1;
1145 } __LATAbits_t;
1146
1147 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1148
1149 #define _LATA0 0x01
1150 #define _LATA1 0x02
1151 #define _LATA2 0x04
1152 #define _LATA4 0x10
1153 #define _LATA5 0x20
1154
1155 //==============================================================================
1156
1157
1158 //==============================================================================
1159 // LATB Bits
1160
1161 extern __at(0x010D) __sfr LATB;
1162
1163 typedef struct
1164 {
1165 unsigned : 1;
1166 unsigned : 1;
1167 unsigned : 1;
1168 unsigned : 1;
1169 unsigned LATB4 : 1;
1170 unsigned LATB5 : 1;
1171 unsigned LATB6 : 1;
1172 unsigned LATB7 : 1;
1173 } __LATBbits_t;
1174
1175 extern __at(0x010D) volatile __LATBbits_t LATBbits;
1176
1177 #define _LATB4 0x10
1178 #define _LATB5 0x20
1179 #define _LATB6 0x40
1180 #define _LATB7 0x80
1181
1182 //==============================================================================
1183
1184
1185 //==============================================================================
1186 // LATC Bits
1187
1188 extern __at(0x010E) __sfr LATC;
1189
1190 typedef struct
1191 {
1192 unsigned LATC0 : 1;
1193 unsigned LATC1 : 1;
1194 unsigned LATC2 : 1;
1195 unsigned LATC3 : 1;
1196 unsigned LATC4 : 1;
1197 unsigned LATC5 : 1;
1198 unsigned LATC6 : 1;
1199 unsigned LATC7 : 1;
1200 } __LATCbits_t;
1201
1202 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1203
1204 #define _LATC0 0x01
1205 #define _LATC1 0x02
1206 #define _LATC2 0x04
1207 #define _LATC3 0x08
1208 #define _LATC4 0x10
1209 #define _LATC5 0x20
1210 #define _LATC6 0x40
1211 #define _LATC7 0x80
1212
1213 //==============================================================================
1214
1215
1216 //==============================================================================
1217 // BORCON Bits
1218
1219 extern __at(0x0116) __sfr BORCON;
1220
1221 typedef struct
1222 {
1223 unsigned BORRDY : 1;
1224 unsigned : 1;
1225 unsigned : 1;
1226 unsigned : 1;
1227 unsigned : 1;
1228 unsigned : 1;
1229 unsigned BORFS : 1;
1230 unsigned SBOREN : 1;
1231 } __BORCONbits_t;
1232
1233 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1234
1235 #define _BORRDY 0x01
1236 #define _BORFS 0x40
1237 #define _SBOREN 0x80
1238
1239 //==============================================================================
1240
1241
1242 //==============================================================================
1243 // FVRCON Bits
1244
1245 extern __at(0x0117) __sfr FVRCON;
1246
1247 typedef union
1248 {
1249 struct
1250 {
1251 unsigned ADFVR0 : 1;
1252 unsigned ADFVR1 : 1;
1253 unsigned : 1;
1254 unsigned : 1;
1255 unsigned TSRNG : 1;
1256 unsigned TSEN : 1;
1257 unsigned FVRRDY : 1;
1258 unsigned FVREN : 1;
1259 };
1260
1261 struct
1262 {
1263 unsigned ADFVR : 2;
1264 unsigned : 6;
1265 };
1266 } __FVRCONbits_t;
1267
1268 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1269
1270 #define _ADFVR0 0x01
1271 #define _ADFVR1 0x02
1272 #define _TSRNG 0x10
1273 #define _TSEN 0x20
1274 #define _FVRRDY 0x40
1275 #define _FVREN 0x80
1276
1277 //==============================================================================
1278
1279
1280 //==============================================================================
1281 // APFCON Bits
1282
1283 extern __at(0x011D) __sfr APFCON;
1284
1285 typedef struct
1286 {
1287 unsigned NCO1SEL : 1;
1288 unsigned CLC1SEL : 1;
1289 unsigned : 1;
1290 unsigned : 1;
1291 unsigned : 1;
1292 unsigned : 1;
1293 unsigned : 1;
1294 unsigned : 1;
1295 } __APFCONbits_t;
1296
1297 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1298
1299 #define _NCO1SEL 0x01
1300 #define _CLC1SEL 0x02
1301
1302 //==============================================================================
1303
1304
1305 //==============================================================================
1306 // ANSELA Bits
1307
1308 extern __at(0x018C) __sfr ANSELA;
1309
1310 typedef struct
1311 {
1312 unsigned ANSA0 : 1;
1313 unsigned ANSA1 : 1;
1314 unsigned ANSA2 : 1;
1315 unsigned : 1;
1316 unsigned ANSA4 : 1;
1317 unsigned : 1;
1318 unsigned : 1;
1319 unsigned : 1;
1320 } __ANSELAbits_t;
1321
1322 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1323
1324 #define _ANSA0 0x01
1325 #define _ANSA1 0x02
1326 #define _ANSA2 0x04
1327 #define _ANSA4 0x10
1328
1329 //==============================================================================
1330
1331
1332 //==============================================================================
1333 // ANSELB Bits
1334
1335 extern __at(0x018D) __sfr ANSELB;
1336
1337 typedef struct
1338 {
1339 unsigned : 1;
1340 unsigned : 1;
1341 unsigned : 1;
1342 unsigned : 1;
1343 unsigned ANSB4 : 1;
1344 unsigned ANSB5 : 1;
1345 unsigned : 1;
1346 unsigned : 1;
1347 } __ANSELBbits_t;
1348
1349 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
1350
1351 #define _ANSB4 0x10
1352 #define _ANSB5 0x20
1353
1354 //==============================================================================
1355
1356
1357 //==============================================================================
1358 // ANSELC Bits
1359
1360 extern __at(0x018E) __sfr ANSELC;
1361
1362 typedef struct
1363 {
1364 unsigned ANSC0 : 1;
1365 unsigned ANSC1 : 1;
1366 unsigned ANSC2 : 1;
1367 unsigned ANSC3 : 1;
1368 unsigned : 1;
1369 unsigned : 1;
1370 unsigned ANSC6 : 1;
1371 unsigned ANSC7 : 1;
1372 } __ANSELCbits_t;
1373
1374 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1375
1376 #define _ANSC0 0x01
1377 #define _ANSC1 0x02
1378 #define _ANSC2 0x04
1379 #define _ANSC3 0x08
1380 #define _ANSC6 0x40
1381 #define _ANSC7 0x80
1382
1383 //==============================================================================
1384
1385 extern __at(0x0191) __sfr PMADR;
1386 extern __at(0x0191) __sfr PMADRL;
1387 extern __at(0x0192) __sfr PMADRH;
1388 extern __at(0x0193) __sfr PMDAT;
1389 extern __at(0x0193) __sfr PMDATL;
1390 extern __at(0x0194) __sfr PMDATH;
1391
1392 //==============================================================================
1393 // PMCON1 Bits
1394
1395 extern __at(0x0195) __sfr PMCON1;
1396
1397 typedef struct
1398 {
1399 unsigned RD : 1;
1400 unsigned WR : 1;
1401 unsigned WREN : 1;
1402 unsigned WRERR : 1;
1403 unsigned FREE : 1;
1404 unsigned LWLO : 1;
1405 unsigned CFGS : 1;
1406 unsigned : 1;
1407 } __PMCON1bits_t;
1408
1409 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1410
1411 #define _RD 0x01
1412 #define _WR 0x02
1413 #define _WREN 0x04
1414 #define _WRERR 0x08
1415 #define _FREE 0x10
1416 #define _LWLO 0x20
1417 #define _CFGS 0x40
1418
1419 //==============================================================================
1420
1421 extern __at(0x0196) __sfr PMCON2;
1422
1423 //==============================================================================
1424 // VREGCON Bits
1425
1426 extern __at(0x0197) __sfr VREGCON;
1427
1428 typedef union
1429 {
1430 struct
1431 {
1432 unsigned VREGPM0 : 1;
1433 unsigned VREGPM1 : 1;
1434 unsigned : 1;
1435 unsigned : 1;
1436 unsigned : 1;
1437 unsigned : 1;
1438 unsigned : 1;
1439 unsigned : 1;
1440 };
1441
1442 struct
1443 {
1444 unsigned VREGPM : 2;
1445 unsigned : 6;
1446 };
1447 } __VREGCONbits_t;
1448
1449 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1450
1451 #define _VREGPM0 0x01
1452 #define _VREGPM1 0x02
1453
1454 //==============================================================================
1455
1456
1457 //==============================================================================
1458 // WPUA Bits
1459
1460 extern __at(0x020C) __sfr WPUA;
1461
1462 typedef union
1463 {
1464 struct
1465 {
1466 unsigned WPUA0 : 1;
1467 unsigned WPUA1 : 1;
1468 unsigned WPUA2 : 1;
1469 unsigned WPUA3 : 1;
1470 unsigned WPUA4 : 1;
1471 unsigned WPUA5 : 1;
1472 unsigned : 1;
1473 unsigned : 1;
1474 };
1475
1476 struct
1477 {
1478 unsigned WPUA : 6;
1479 unsigned : 2;
1480 };
1481 } __WPUAbits_t;
1482
1483 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1484
1485 #define _WPUA0 0x01
1486 #define _WPUA1 0x02
1487 #define _WPUA2 0x04
1488 #define _WPUA3 0x08
1489 #define _WPUA4 0x10
1490 #define _WPUA5 0x20
1491
1492 //==============================================================================
1493
1494
1495 //==============================================================================
1496 // WPUB Bits
1497
1498 extern __at(0x020D) __sfr WPUB;
1499
1500 typedef struct
1501 {
1502 unsigned : 1;
1503 unsigned : 1;
1504 unsigned : 1;
1505 unsigned : 1;
1506 unsigned WPUB4 : 1;
1507 unsigned WPUB5 : 1;
1508 unsigned WPUB6 : 1;
1509 unsigned WPUB7 : 1;
1510 } __WPUBbits_t;
1511
1512 extern __at(0x020D) volatile __WPUBbits_t WPUBbits;
1513
1514 #define _WPUB4 0x10
1515 #define _WPUB5 0x20
1516 #define _WPUB6 0x40
1517 #define _WPUB7 0x80
1518
1519 //==============================================================================
1520
1521
1522 //==============================================================================
1523 // IOCAP Bits
1524
1525 extern __at(0x0391) __sfr IOCAP;
1526
1527 typedef union
1528 {
1529 struct
1530 {
1531 unsigned IOCAP0 : 1;
1532 unsigned IOCAP1 : 1;
1533 unsigned IOCAP2 : 1;
1534 unsigned IOCAP3 : 1;
1535 unsigned IOCAP4 : 1;
1536 unsigned IOCAP5 : 1;
1537 unsigned : 1;
1538 unsigned : 1;
1539 };
1540
1541 struct
1542 {
1543 unsigned IOCAP : 6;
1544 unsigned : 2;
1545 };
1546 } __IOCAPbits_t;
1547
1548 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1549
1550 #define _IOCAP0 0x01
1551 #define _IOCAP1 0x02
1552 #define _IOCAP2 0x04
1553 #define _IOCAP3 0x08
1554 #define _IOCAP4 0x10
1555 #define _IOCAP5 0x20
1556
1557 //==============================================================================
1558
1559
1560 //==============================================================================
1561 // IOCAN Bits
1562
1563 extern __at(0x0392) __sfr IOCAN;
1564
1565 typedef union
1566 {
1567 struct
1568 {
1569 unsigned IOCAN0 : 1;
1570 unsigned IOCAN1 : 1;
1571 unsigned IOCAN2 : 1;
1572 unsigned IOCAN3 : 1;
1573 unsigned IOCAN4 : 1;
1574 unsigned IOCAN5 : 1;
1575 unsigned : 1;
1576 unsigned : 1;
1577 };
1578
1579 struct
1580 {
1581 unsigned IOCAN : 6;
1582 unsigned : 2;
1583 };
1584 } __IOCANbits_t;
1585
1586 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
1587
1588 #define _IOCAN0 0x01
1589 #define _IOCAN1 0x02
1590 #define _IOCAN2 0x04
1591 #define _IOCAN3 0x08
1592 #define _IOCAN4 0x10
1593 #define _IOCAN5 0x20
1594
1595 //==============================================================================
1596
1597
1598 //==============================================================================
1599 // IOCAF Bits
1600
1601 extern __at(0x0393) __sfr IOCAF;
1602
1603 typedef union
1604 {
1605 struct
1606 {
1607 unsigned IOCAF0 : 1;
1608 unsigned IOCAF1 : 1;
1609 unsigned IOCAF2 : 1;
1610 unsigned IOCAF3 : 1;
1611 unsigned IOCAF4 : 1;
1612 unsigned IOCAF5 : 1;
1613 unsigned : 1;
1614 unsigned : 1;
1615 };
1616
1617 struct
1618 {
1619 unsigned IOCAF : 6;
1620 unsigned : 2;
1621 };
1622 } __IOCAFbits_t;
1623
1624 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
1625
1626 #define _IOCAF0 0x01
1627 #define _IOCAF1 0x02
1628 #define _IOCAF2 0x04
1629 #define _IOCAF3 0x08
1630 #define _IOCAF4 0x10
1631 #define _IOCAF5 0x20
1632
1633 //==============================================================================
1634
1635
1636 //==============================================================================
1637 // IOCBP Bits
1638
1639 extern __at(0x0394) __sfr IOCBP;
1640
1641 typedef struct
1642 {
1643 unsigned : 1;
1644 unsigned : 1;
1645 unsigned : 1;
1646 unsigned : 1;
1647 unsigned IOCBP4 : 1;
1648 unsigned IOCBP5 : 1;
1649 unsigned IOCBP6 : 1;
1650 unsigned IOCBP7 : 1;
1651 } __IOCBPbits_t;
1652
1653 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
1654
1655 #define _IOCBP4 0x10
1656 #define _IOCBP5 0x20
1657 #define _IOCBP6 0x40
1658 #define _IOCBP7 0x80
1659
1660 //==============================================================================
1661
1662
1663 //==============================================================================
1664 // IOCBN Bits
1665
1666 extern __at(0x0395) __sfr IOCBN;
1667
1668 typedef struct
1669 {
1670 unsigned : 1;
1671 unsigned : 1;
1672 unsigned : 1;
1673 unsigned : 1;
1674 unsigned IOCBN4 : 1;
1675 unsigned IOCBN5 : 1;
1676 unsigned IOCBN6 : 1;
1677 unsigned IOCBN7 : 1;
1678 } __IOCBNbits_t;
1679
1680 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
1681
1682 #define _IOCBN4 0x10
1683 #define _IOCBN5 0x20
1684 #define _IOCBN6 0x40
1685 #define _IOCBN7 0x80
1686
1687 //==============================================================================
1688
1689
1690 //==============================================================================
1691 // IOCBF Bits
1692
1693 extern __at(0x0396) __sfr IOCBF;
1694
1695 typedef struct
1696 {
1697 unsigned : 1;
1698 unsigned : 1;
1699 unsigned : 1;
1700 unsigned : 1;
1701 unsigned IOCBF4 : 1;
1702 unsigned IOCBF5 : 1;
1703 unsigned IOCBF6 : 1;
1704 unsigned IOCBF7 : 1;
1705 } __IOCBFbits_t;
1706
1707 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
1708
1709 #define _IOCBF4 0x10
1710 #define _IOCBF5 0x20
1711 #define _IOCBF6 0x40
1712 #define _IOCBF7 0x80
1713
1714 //==============================================================================
1715
1716 extern __at(0x0498) __sfr NCO1ACC;
1717
1718 //==============================================================================
1719 // NCO1ACCL Bits
1720
1721 extern __at(0x0498) __sfr NCO1ACCL;
1722
1723 typedef struct
1724 {
1725 unsigned NCO1ACC0 : 1;
1726 unsigned NCO1ACC1 : 1;
1727 unsigned NCO1ACC2 : 1;
1728 unsigned NCO1ACC3 : 1;
1729 unsigned NCO1ACC4 : 1;
1730 unsigned NCO1ACC5 : 1;
1731 unsigned NCO1ACC6 : 1;
1732 unsigned NCO1ACC7 : 1;
1733 } __NCO1ACCLbits_t;
1734
1735 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits;
1736
1737 #define _NCO1ACC0 0x01
1738 #define _NCO1ACC1 0x02
1739 #define _NCO1ACC2 0x04
1740 #define _NCO1ACC3 0x08
1741 #define _NCO1ACC4 0x10
1742 #define _NCO1ACC5 0x20
1743 #define _NCO1ACC6 0x40
1744 #define _NCO1ACC7 0x80
1745
1746 //==============================================================================
1747
1748
1749 //==============================================================================
1750 // NCO1ACCH Bits
1751
1752 extern __at(0x0499) __sfr NCO1ACCH;
1753
1754 typedef struct
1755 {
1756 unsigned NCO1ACC8 : 1;
1757 unsigned NCO1ACC9 : 1;
1758 unsigned NCO1ACC10 : 1;
1759 unsigned NCO1ACC11 : 1;
1760 unsigned NCO1ACC12 : 1;
1761 unsigned NCO1ACC13 : 1;
1762 unsigned NCO1ACC14 : 1;
1763 unsigned NCO1ACC15 : 1;
1764 } __NCO1ACCHbits_t;
1765
1766 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits;
1767
1768 #define _NCO1ACC8 0x01
1769 #define _NCO1ACC9 0x02
1770 #define _NCO1ACC10 0x04
1771 #define _NCO1ACC11 0x08
1772 #define _NCO1ACC12 0x10
1773 #define _NCO1ACC13 0x20
1774 #define _NCO1ACC14 0x40
1775 #define _NCO1ACC15 0x80
1776
1777 //==============================================================================
1778
1779
1780 //==============================================================================
1781 // NCO1ACCU Bits
1782
1783 extern __at(0x049A) __sfr NCO1ACCU;
1784
1785 typedef struct
1786 {
1787 unsigned NCO1ACC16 : 1;
1788 unsigned NCO1ACC17 : 1;
1789 unsigned NCO1ACC18 : 1;
1790 unsigned NCO1ACC19 : 1;
1791 unsigned : 1;
1792 unsigned : 1;
1793 unsigned : 1;
1794 unsigned : 1;
1795 } __NCO1ACCUbits_t;
1796
1797 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits;
1798
1799 #define _NCO1ACC16 0x01
1800 #define _NCO1ACC17 0x02
1801 #define _NCO1ACC18 0x04
1802 #define _NCO1ACC19 0x08
1803
1804 //==============================================================================
1805
1806 extern __at(0x049B) __sfr NCO1INC;
1807
1808 //==============================================================================
1809 // NCO1INCL Bits
1810
1811 extern __at(0x049B) __sfr NCO1INCL;
1812
1813 typedef struct
1814 {
1815 unsigned NCO1INC0 : 1;
1816 unsigned NCO1INC1 : 1;
1817 unsigned NCO1INC2 : 1;
1818 unsigned NCO1INC3 : 1;
1819 unsigned NCO1INC4 : 1;
1820 unsigned NCO1INC5 : 1;
1821 unsigned NCO1INC6 : 1;
1822 unsigned NCO1INC7 : 1;
1823 } __NCO1INCLbits_t;
1824
1825 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits;
1826
1827 #define _NCO1INC0 0x01
1828 #define _NCO1INC1 0x02
1829 #define _NCO1INC2 0x04
1830 #define _NCO1INC3 0x08
1831 #define _NCO1INC4 0x10
1832 #define _NCO1INC5 0x20
1833 #define _NCO1INC6 0x40
1834 #define _NCO1INC7 0x80
1835
1836 //==============================================================================
1837
1838
1839 //==============================================================================
1840 // NCO1INCH Bits
1841
1842 extern __at(0x049C) __sfr NCO1INCH;
1843
1844 typedef struct
1845 {
1846 unsigned NCO1INC8 : 1;
1847 unsigned NCO1INC9 : 1;
1848 unsigned NCO1INC10 : 1;
1849 unsigned NCO1INC11 : 1;
1850 unsigned NCO1INC12 : 1;
1851 unsigned NCO1INC13 : 1;
1852 unsigned NCO1INC14 : 1;
1853 unsigned NCO1INC15 : 1;
1854 } __NCO1INCHbits_t;
1855
1856 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits;
1857
1858 #define _NCO1INC8 0x01
1859 #define _NCO1INC9 0x02
1860 #define _NCO1INC10 0x04
1861 #define _NCO1INC11 0x08
1862 #define _NCO1INC12 0x10
1863 #define _NCO1INC13 0x20
1864 #define _NCO1INC14 0x40
1865 #define _NCO1INC15 0x80
1866
1867 //==============================================================================
1868
1869 extern __at(0x049D) __sfr NCO1INCU;
1870
1871 //==============================================================================
1872 // NCO1CON Bits
1873
1874 extern __at(0x049E) __sfr NCO1CON;
1875
1876 typedef struct
1877 {
1878 unsigned N1PFM : 1;
1879 unsigned : 1;
1880 unsigned : 1;
1881 unsigned : 1;
1882 unsigned N1POL : 1;
1883 unsigned N1OUT : 1;
1884 unsigned N1OE : 1;
1885 unsigned N1EN : 1;
1886 } __NCO1CONbits_t;
1887
1888 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits;
1889
1890 #define _N1PFM 0x01
1891 #define _N1POL 0x10
1892 #define _N1OUT 0x20
1893 #define _N1OE 0x40
1894 #define _N1EN 0x80
1895
1896 //==============================================================================
1897
1898
1899 //==============================================================================
1900 // NCO1CLK Bits
1901
1902 extern __at(0x049F) __sfr NCO1CLK;
1903
1904 typedef union
1905 {
1906 struct
1907 {
1908 unsigned N1CKS0 : 1;
1909 unsigned N1CKS1 : 1;
1910 unsigned : 1;
1911 unsigned : 1;
1912 unsigned : 1;
1913 unsigned N1PWS0 : 1;
1914 unsigned N1PWS1 : 1;
1915 unsigned N1PWS2 : 1;
1916 };
1917
1918 struct
1919 {
1920 unsigned N1CKS : 2;
1921 unsigned : 6;
1922 };
1923
1924 struct
1925 {
1926 unsigned : 5;
1927 unsigned N1PWS : 3;
1928 };
1929 } __NCO1CLKbits_t;
1930
1931 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits;
1932
1933 #define _N1CKS0 0x01
1934 #define _N1CKS1 0x02
1935 #define _N1PWS0 0x20
1936 #define _N1PWS1 0x40
1937 #define _N1PWS2 0x80
1938
1939 //==============================================================================
1940
1941
1942 //==============================================================================
1943 // PWM1DCL Bits
1944
1945 extern __at(0x0611) __sfr PWM1DCL;
1946
1947 typedef union
1948 {
1949 struct
1950 {
1951 unsigned : 1;
1952 unsigned : 1;
1953 unsigned : 1;
1954 unsigned : 1;
1955 unsigned : 1;
1956 unsigned : 1;
1957 unsigned PWM1DCL0 : 1;
1958 unsigned PWM1DCL1 : 1;
1959 };
1960
1961 struct
1962 {
1963 unsigned : 6;
1964 unsigned PWM1DCL : 2;
1965 };
1966 } __PWM1DCLbits_t;
1967
1968 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
1969
1970 #define _PWM1DCL0 0x40
1971 #define _PWM1DCL1 0x80
1972
1973 //==============================================================================
1974
1975
1976 //==============================================================================
1977 // PWM1DCH Bits
1978
1979 extern __at(0x0612) __sfr PWM1DCH;
1980
1981 typedef struct
1982 {
1983 unsigned PWM1DCH0 : 1;
1984 unsigned PWM1DCH1 : 1;
1985 unsigned PWM1DCH2 : 1;
1986 unsigned PWM1DCH3 : 1;
1987 unsigned PWM1DCH4 : 1;
1988 unsigned PWM1DCH5 : 1;
1989 unsigned PWM1DCH6 : 1;
1990 unsigned PWM1DCH7 : 1;
1991 } __PWM1DCHbits_t;
1992
1993 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
1994
1995 #define _PWM1DCH0 0x01
1996 #define _PWM1DCH1 0x02
1997 #define _PWM1DCH2 0x04
1998 #define _PWM1DCH3 0x08
1999 #define _PWM1DCH4 0x10
2000 #define _PWM1DCH5 0x20
2001 #define _PWM1DCH6 0x40
2002 #define _PWM1DCH7 0x80
2003
2004 //==============================================================================
2005
2006
2007 //==============================================================================
2008 // PWM1CON Bits
2009
2010 extern __at(0x0613) __sfr PWM1CON;
2011
2012 typedef struct
2013 {
2014 unsigned : 1;
2015 unsigned : 1;
2016 unsigned : 1;
2017 unsigned : 1;
2018 unsigned PWM1POL : 1;
2019 unsigned PWM1OUT : 1;
2020 unsigned PWM1OE : 1;
2021 unsigned PWM1EN : 1;
2022 } __PWM1CONbits_t;
2023
2024 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
2025
2026 #define _PWM1POL 0x10
2027 #define _PWM1OUT 0x20
2028 #define _PWM1OE 0x40
2029 #define _PWM1EN 0x80
2030
2031 //==============================================================================
2032
2033
2034 //==============================================================================
2035 // PWM1CON0 Bits
2036
2037 extern __at(0x0613) __sfr PWM1CON0;
2038
2039 typedef struct
2040 {
2041 unsigned : 1;
2042 unsigned : 1;
2043 unsigned : 1;
2044 unsigned : 1;
2045 unsigned PWM1POL : 1;
2046 unsigned PWM1OUT : 1;
2047 unsigned PWM1OE : 1;
2048 unsigned PWM1EN : 1;
2049 } __PWM1CON0bits_t;
2050
2051 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
2052
2053 #define _PWM1CON0_PWM1POL 0x10
2054 #define _PWM1CON0_PWM1OUT 0x20
2055 #define _PWM1CON0_PWM1OE 0x40
2056 #define _PWM1CON0_PWM1EN 0x80
2057
2058 //==============================================================================
2059
2060
2061 //==============================================================================
2062 // PWM2DCL Bits
2063
2064 extern __at(0x0614) __sfr PWM2DCL;
2065
2066 typedef union
2067 {
2068 struct
2069 {
2070 unsigned : 1;
2071 unsigned : 1;
2072 unsigned : 1;
2073 unsigned : 1;
2074 unsigned : 1;
2075 unsigned : 1;
2076 unsigned PWM2DCL0 : 1;
2077 unsigned PWM2DCL1 : 1;
2078 };
2079
2080 struct
2081 {
2082 unsigned : 6;
2083 unsigned PWM2DCL : 2;
2084 };
2085 } __PWM2DCLbits_t;
2086
2087 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
2088
2089 #define _PWM2DCL0 0x40
2090 #define _PWM2DCL1 0x80
2091
2092 //==============================================================================
2093
2094
2095 //==============================================================================
2096 // PWM2DCH Bits
2097
2098 extern __at(0x0615) __sfr PWM2DCH;
2099
2100 typedef struct
2101 {
2102 unsigned PWM2DCH0 : 1;
2103 unsigned PWM2DCH1 : 1;
2104 unsigned PWM2DCH2 : 1;
2105 unsigned PWM2DCH3 : 1;
2106 unsigned PWM2DCH4 : 1;
2107 unsigned PWM2DCH5 : 1;
2108 unsigned PWM2DCH6 : 1;
2109 unsigned PWM2DCH7 : 1;
2110 } __PWM2DCHbits_t;
2111
2112 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
2113
2114 #define _PWM2DCH0 0x01
2115 #define _PWM2DCH1 0x02
2116 #define _PWM2DCH2 0x04
2117 #define _PWM2DCH3 0x08
2118 #define _PWM2DCH4 0x10
2119 #define _PWM2DCH5 0x20
2120 #define _PWM2DCH6 0x40
2121 #define _PWM2DCH7 0x80
2122
2123 //==============================================================================
2124
2125
2126 //==============================================================================
2127 // PWM2CON Bits
2128
2129 extern __at(0x0616) __sfr PWM2CON;
2130
2131 typedef struct
2132 {
2133 unsigned : 1;
2134 unsigned : 1;
2135 unsigned : 1;
2136 unsigned : 1;
2137 unsigned PWM2POL : 1;
2138 unsigned PWM2OUT : 1;
2139 unsigned PWM2OE : 1;
2140 unsigned PWM2EN : 1;
2141 } __PWM2CONbits_t;
2142
2143 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
2144
2145 #define _PWM2POL 0x10
2146 #define _PWM2OUT 0x20
2147 #define _PWM2OE 0x40
2148 #define _PWM2EN 0x80
2149
2150 //==============================================================================
2151
2152
2153 //==============================================================================
2154 // PWM2CON0 Bits
2155
2156 extern __at(0x0616) __sfr PWM2CON0;
2157
2158 typedef struct
2159 {
2160 unsigned : 1;
2161 unsigned : 1;
2162 unsigned : 1;
2163 unsigned : 1;
2164 unsigned PWM2POL : 1;
2165 unsigned PWM2OUT : 1;
2166 unsigned PWM2OE : 1;
2167 unsigned PWM2EN : 1;
2168 } __PWM2CON0bits_t;
2169
2170 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
2171
2172 #define _PWM2CON0_PWM2POL 0x10
2173 #define _PWM2CON0_PWM2OUT 0x20
2174 #define _PWM2CON0_PWM2OE 0x40
2175 #define _PWM2CON0_PWM2EN 0x80
2176
2177 //==============================================================================
2178
2179
2180 //==============================================================================
2181 // PWM3DCL Bits
2182
2183 extern __at(0x0617) __sfr PWM3DCL;
2184
2185 typedef union
2186 {
2187 struct
2188 {
2189 unsigned : 1;
2190 unsigned : 1;
2191 unsigned : 1;
2192 unsigned : 1;
2193 unsigned : 1;
2194 unsigned : 1;
2195 unsigned PWM3DCL0 : 1;
2196 unsigned PWM3DCL1 : 1;
2197 };
2198
2199 struct
2200 {
2201 unsigned : 6;
2202 unsigned PWM3DCL : 2;
2203 };
2204 } __PWM3DCLbits_t;
2205
2206 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
2207
2208 #define _PWM3DCL0 0x40
2209 #define _PWM3DCL1 0x80
2210
2211 //==============================================================================
2212
2213
2214 //==============================================================================
2215 // PWM3DCH Bits
2216
2217 extern __at(0x0618) __sfr PWM3DCH;
2218
2219 typedef struct
2220 {
2221 unsigned PWM3DCH0 : 1;
2222 unsigned PWM3DCH1 : 1;
2223 unsigned PWM3DCH2 : 1;
2224 unsigned PWM3DCH3 : 1;
2225 unsigned PWM3DCH4 : 1;
2226 unsigned PWM3DCH5 : 1;
2227 unsigned PWM3DCH6 : 1;
2228 unsigned PWM3DCH7 : 1;
2229 } __PWM3DCHbits_t;
2230
2231 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
2232
2233 #define _PWM3DCH0 0x01
2234 #define _PWM3DCH1 0x02
2235 #define _PWM3DCH2 0x04
2236 #define _PWM3DCH3 0x08
2237 #define _PWM3DCH4 0x10
2238 #define _PWM3DCH5 0x20
2239 #define _PWM3DCH6 0x40
2240 #define _PWM3DCH7 0x80
2241
2242 //==============================================================================
2243
2244
2245 //==============================================================================
2246 // PWM3CON Bits
2247
2248 extern __at(0x0619) __sfr PWM3CON;
2249
2250 typedef struct
2251 {
2252 unsigned : 1;
2253 unsigned : 1;
2254 unsigned : 1;
2255 unsigned : 1;
2256 unsigned PWM3POL : 1;
2257 unsigned PWM3OUT : 1;
2258 unsigned PWM3OE : 1;
2259 unsigned PWM3EN : 1;
2260 } __PWM3CONbits_t;
2261
2262 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
2263
2264 #define _PWM3POL 0x10
2265 #define _PWM3OUT 0x20
2266 #define _PWM3OE 0x40
2267 #define _PWM3EN 0x80
2268
2269 //==============================================================================
2270
2271
2272 //==============================================================================
2273 // PWM3CON0 Bits
2274
2275 extern __at(0x0619) __sfr PWM3CON0;
2276
2277 typedef struct
2278 {
2279 unsigned : 1;
2280 unsigned : 1;
2281 unsigned : 1;
2282 unsigned : 1;
2283 unsigned PWM3POL : 1;
2284 unsigned PWM3OUT : 1;
2285 unsigned PWM3OE : 1;
2286 unsigned PWM3EN : 1;
2287 } __PWM3CON0bits_t;
2288
2289 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
2290
2291 #define _PWM3CON0_PWM3POL 0x10
2292 #define _PWM3CON0_PWM3OUT 0x20
2293 #define _PWM3CON0_PWM3OE 0x40
2294 #define _PWM3CON0_PWM3EN 0x80
2295
2296 //==============================================================================
2297
2298
2299 //==============================================================================
2300 // PWM4DCL Bits
2301
2302 extern __at(0x061A) __sfr PWM4DCL;
2303
2304 typedef union
2305 {
2306 struct
2307 {
2308 unsigned : 1;
2309 unsigned : 1;
2310 unsigned : 1;
2311 unsigned : 1;
2312 unsigned : 1;
2313 unsigned : 1;
2314 unsigned PWM4DCL0 : 1;
2315 unsigned PWM4DCL1 : 1;
2316 };
2317
2318 struct
2319 {
2320 unsigned : 6;
2321 unsigned PWM4DCL : 2;
2322 };
2323 } __PWM4DCLbits_t;
2324
2325 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
2326
2327 #define _PWM4DCL0 0x40
2328 #define _PWM4DCL1 0x80
2329
2330 //==============================================================================
2331
2332
2333 //==============================================================================
2334 // PWM4DCH Bits
2335
2336 extern __at(0x061B) __sfr PWM4DCH;
2337
2338 typedef struct
2339 {
2340 unsigned PWM4DCH0 : 1;
2341 unsigned PWM4DCH1 : 1;
2342 unsigned PWM4DCH2 : 1;
2343 unsigned PWM4DCH3 : 1;
2344 unsigned PWM4DCH4 : 1;
2345 unsigned PWM4DCH5 : 1;
2346 unsigned PWM4DCH6 : 1;
2347 unsigned PWM4DCH7 : 1;
2348 } __PWM4DCHbits_t;
2349
2350 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
2351
2352 #define _PWM4DCH0 0x01
2353 #define _PWM4DCH1 0x02
2354 #define _PWM4DCH2 0x04
2355 #define _PWM4DCH3 0x08
2356 #define _PWM4DCH4 0x10
2357 #define _PWM4DCH5 0x20
2358 #define _PWM4DCH6 0x40
2359 #define _PWM4DCH7 0x80
2360
2361 //==============================================================================
2362
2363
2364 //==============================================================================
2365 // PWM4CON Bits
2366
2367 extern __at(0x061C) __sfr PWM4CON;
2368
2369 typedef struct
2370 {
2371 unsigned : 1;
2372 unsigned : 1;
2373 unsigned : 1;
2374 unsigned : 1;
2375 unsigned PWM4POL : 1;
2376 unsigned PWM4OUT : 1;
2377 unsigned PWM4OE : 1;
2378 unsigned PWM4EN : 1;
2379 } __PWM4CONbits_t;
2380
2381 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
2382
2383 #define _PWM4POL 0x10
2384 #define _PWM4OUT 0x20
2385 #define _PWM4OE 0x40
2386 #define _PWM4EN 0x80
2387
2388 //==============================================================================
2389
2390
2391 //==============================================================================
2392 // PWM4CON0 Bits
2393
2394 extern __at(0x061C) __sfr PWM4CON0;
2395
2396 typedef struct
2397 {
2398 unsigned : 1;
2399 unsigned : 1;
2400 unsigned : 1;
2401 unsigned : 1;
2402 unsigned PWM4POL : 1;
2403 unsigned PWM4OUT : 1;
2404 unsigned PWM4OE : 1;
2405 unsigned PWM4EN : 1;
2406 } __PWM4CON0bits_t;
2407
2408 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
2409
2410 #define _PWM4CON0_PWM4POL 0x10
2411 #define _PWM4CON0_PWM4OUT 0x20
2412 #define _PWM4CON0_PWM4OE 0x40
2413 #define _PWM4CON0_PWM4EN 0x80
2414
2415 //==============================================================================
2416
2417
2418 //==============================================================================
2419 // CWG1DBR Bits
2420
2421 extern __at(0x0691) __sfr CWG1DBR;
2422
2423 typedef union
2424 {
2425 struct
2426 {
2427 unsigned CWG1DBR0 : 1;
2428 unsigned CWG1DBR1 : 1;
2429 unsigned CWG1DBR2 : 1;
2430 unsigned CWG1DBR3 : 1;
2431 unsigned CWG1DBR4 : 1;
2432 unsigned CWG1DBR5 : 1;
2433 unsigned : 1;
2434 unsigned : 1;
2435 };
2436
2437 struct
2438 {
2439 unsigned CWG1DBR : 6;
2440 unsigned : 2;
2441 };
2442 } __CWG1DBRbits_t;
2443
2444 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2445
2446 #define _CWG1DBR0 0x01
2447 #define _CWG1DBR1 0x02
2448 #define _CWG1DBR2 0x04
2449 #define _CWG1DBR3 0x08
2450 #define _CWG1DBR4 0x10
2451 #define _CWG1DBR5 0x20
2452
2453 //==============================================================================
2454
2455
2456 //==============================================================================
2457 // CWG1DBF Bits
2458
2459 extern __at(0x0692) __sfr CWG1DBF;
2460
2461 typedef union
2462 {
2463 struct
2464 {
2465 unsigned CWG1DBF0 : 1;
2466 unsigned CWG1DBF1 : 1;
2467 unsigned CWG1DBF2 : 1;
2468 unsigned CWG1DBF3 : 1;
2469 unsigned CWG1DBF4 : 1;
2470 unsigned CWG1DBF5 : 1;
2471 unsigned : 1;
2472 unsigned : 1;
2473 };
2474
2475 struct
2476 {
2477 unsigned CWG1DBF : 6;
2478 unsigned : 2;
2479 };
2480 } __CWG1DBFbits_t;
2481
2482 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2483
2484 #define _CWG1DBF0 0x01
2485 #define _CWG1DBF1 0x02
2486 #define _CWG1DBF2 0x04
2487 #define _CWG1DBF3 0x08
2488 #define _CWG1DBF4 0x10
2489 #define _CWG1DBF5 0x20
2490
2491 //==============================================================================
2492
2493
2494 //==============================================================================
2495 // CWG1CON0 Bits
2496
2497 extern __at(0x0693) __sfr CWG1CON0;
2498
2499 typedef struct
2500 {
2501 unsigned G1CS0 : 1;
2502 unsigned : 1;
2503 unsigned : 1;
2504 unsigned G1POLA : 1;
2505 unsigned G1POLB : 1;
2506 unsigned G1OEA : 1;
2507 unsigned G1OEB : 1;
2508 unsigned G1EN : 1;
2509 } __CWG1CON0bits_t;
2510
2511 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2512
2513 #define _G1CS0 0x01
2514 #define _G1POLA 0x08
2515 #define _G1POLB 0x10
2516 #define _G1OEA 0x20
2517 #define _G1OEB 0x40
2518 #define _G1EN 0x80
2519
2520 //==============================================================================
2521
2522
2523 //==============================================================================
2524 // CWG1CON1 Bits
2525
2526 extern __at(0x0694) __sfr CWG1CON1;
2527
2528 typedef union
2529 {
2530 struct
2531 {
2532 unsigned G1IS0 : 1;
2533 unsigned G1IS1 : 1;
2534 unsigned G1IS2 : 1;
2535 unsigned : 1;
2536 unsigned G1ASDLA0 : 1;
2537 unsigned G1ASDLA1 : 1;
2538 unsigned G1ASDLB0 : 1;
2539 unsigned G1ASDLB1 : 1;
2540 };
2541
2542 struct
2543 {
2544 unsigned G1IS : 3;
2545 unsigned : 5;
2546 };
2547
2548 struct
2549 {
2550 unsigned : 4;
2551 unsigned G1ASDLA : 2;
2552 unsigned : 2;
2553 };
2554
2555 struct
2556 {
2557 unsigned : 6;
2558 unsigned G1ASDLB : 2;
2559 };
2560 } __CWG1CON1bits_t;
2561
2562 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2563
2564 #define _G1IS0 0x01
2565 #define _G1IS1 0x02
2566 #define _G1IS2 0x04
2567 #define _G1ASDLA0 0x10
2568 #define _G1ASDLA1 0x20
2569 #define _G1ASDLB0 0x40
2570 #define _G1ASDLB1 0x80
2571
2572 //==============================================================================
2573
2574
2575 //==============================================================================
2576 // CWG1CON2 Bits
2577
2578 extern __at(0x0695) __sfr CWG1CON2;
2579
2580 typedef struct
2581 {
2582 unsigned G1ASDSCLC2 : 1;
2583 unsigned G1ASDSFLT : 1;
2584 unsigned : 1;
2585 unsigned : 1;
2586 unsigned : 1;
2587 unsigned : 1;
2588 unsigned G1ARSEN : 1;
2589 unsigned G1ASE : 1;
2590 } __CWG1CON2bits_t;
2591
2592 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2593
2594 #define _G1ASDSCLC2 0x01
2595 #define _G1ASDSFLT 0x02
2596 #define _G1ARSEN 0x40
2597 #define _G1ASE 0x80
2598
2599 //==============================================================================
2600
2601
2602 //==============================================================================
2603 // CLCDATA Bits
2604
2605 extern __at(0x0F0F) __sfr CLCDATA;
2606
2607 typedef struct
2608 {
2609 unsigned MCLC1OUT : 1;
2610 unsigned MCLC2OUT : 1;
2611 unsigned : 1;
2612 unsigned : 1;
2613 unsigned : 1;
2614 unsigned : 1;
2615 unsigned : 1;
2616 unsigned : 1;
2617 } __CLCDATAbits_t;
2618
2619 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
2620
2621 #define _MCLC1OUT 0x01
2622 #define _MCLC2OUT 0x02
2623
2624 //==============================================================================
2625
2626
2627 //==============================================================================
2628 // CLC1CON Bits
2629
2630 extern __at(0x0F10) __sfr CLC1CON;
2631
2632 typedef union
2633 {
2634 struct
2635 {
2636 unsigned LC1MODE0 : 1;
2637 unsigned LC1MODE1 : 1;
2638 unsigned LC1MODE2 : 1;
2639 unsigned LC1INTN : 1;
2640 unsigned LC1INTP : 1;
2641 unsigned LC1OUT : 1;
2642 unsigned LC1OE : 1;
2643 unsigned LC1EN : 1;
2644 };
2645
2646 struct
2647 {
2648 unsigned LCMODE0 : 1;
2649 unsigned LCMODE1 : 1;
2650 unsigned LCMODE2 : 1;
2651 unsigned LCINTN : 1;
2652 unsigned LCINTP : 1;
2653 unsigned LCOUT : 1;
2654 unsigned LCOE : 1;
2655 unsigned LCEN : 1;
2656 };
2657
2658 struct
2659 {
2660 unsigned LC1MODE : 3;
2661 unsigned : 5;
2662 };
2663
2664 struct
2665 {
2666 unsigned LCMODE : 3;
2667 unsigned : 5;
2668 };
2669 } __CLC1CONbits_t;
2670
2671 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
2672
2673 #define _LC1MODE0 0x01
2674 #define _LCMODE0 0x01
2675 #define _LC1MODE1 0x02
2676 #define _LCMODE1 0x02
2677 #define _LC1MODE2 0x04
2678 #define _LCMODE2 0x04
2679 #define _LC1INTN 0x08
2680 #define _LCINTN 0x08
2681 #define _LC1INTP 0x10
2682 #define _LCINTP 0x10
2683 #define _LC1OUT 0x20
2684 #define _LCOUT 0x20
2685 #define _LC1OE 0x40
2686 #define _LCOE 0x40
2687 #define _LC1EN 0x80
2688 #define _LCEN 0x80
2689
2690 //==============================================================================
2691
2692
2693 //==============================================================================
2694 // CLC1POL Bits
2695
2696 extern __at(0x0F11) __sfr CLC1POL;
2697
2698 typedef union
2699 {
2700 struct
2701 {
2702 unsigned LC1G1POL : 1;
2703 unsigned LC1G2POL : 1;
2704 unsigned LC1G3POL : 1;
2705 unsigned LC1G4POL : 1;
2706 unsigned : 1;
2707 unsigned : 1;
2708 unsigned : 1;
2709 unsigned LC1POL : 1;
2710 };
2711
2712 struct
2713 {
2714 unsigned G1POL : 1;
2715 unsigned G2POL : 1;
2716 unsigned G3POL : 1;
2717 unsigned G4POL : 1;
2718 unsigned : 1;
2719 unsigned : 1;
2720 unsigned : 1;
2721 unsigned POL : 1;
2722 };
2723 } __CLC1POLbits_t;
2724
2725 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
2726
2727 #define _LC1G1POL 0x01
2728 #define _G1POL 0x01
2729 #define _LC1G2POL 0x02
2730 #define _G2POL 0x02
2731 #define _LC1G3POL 0x04
2732 #define _G3POL 0x04
2733 #define _LC1G4POL 0x08
2734 #define _G4POL 0x08
2735 #define _LC1POL 0x80
2736 #define _POL 0x80
2737
2738 //==============================================================================
2739
2740
2741 //==============================================================================
2742 // CLC1SEL0 Bits
2743
2744 extern __at(0x0F12) __sfr CLC1SEL0;
2745
2746 typedef union
2747 {
2748 struct
2749 {
2750 unsigned LC1D1S0 : 1;
2751 unsigned LC1D1S1 : 1;
2752 unsigned LC1D1S2 : 1;
2753 unsigned : 1;
2754 unsigned LC1D2S0 : 1;
2755 unsigned LC1D2S1 : 1;
2756 unsigned LC1D2S2 : 1;
2757 unsigned : 1;
2758 };
2759
2760 struct
2761 {
2762 unsigned D1S0 : 1;
2763 unsigned D1S1 : 1;
2764 unsigned D1S2 : 1;
2765 unsigned : 1;
2766 unsigned D2S0 : 1;
2767 unsigned D2S1 : 1;
2768 unsigned D2S2 : 1;
2769 unsigned : 1;
2770 };
2771
2772 struct
2773 {
2774 unsigned LC1D1S : 3;
2775 unsigned : 5;
2776 };
2777
2778 struct
2779 {
2780 unsigned D1S : 3;
2781 unsigned : 5;
2782 };
2783
2784 struct
2785 {
2786 unsigned : 4;
2787 unsigned LC1D2S : 3;
2788 unsigned : 1;
2789 };
2790
2791 struct
2792 {
2793 unsigned : 4;
2794 unsigned D2S : 3;
2795 unsigned : 1;
2796 };
2797 } __CLC1SEL0bits_t;
2798
2799 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
2800
2801 #define _LC1D1S0 0x01
2802 #define _D1S0 0x01
2803 #define _LC1D1S1 0x02
2804 #define _D1S1 0x02
2805 #define _LC1D1S2 0x04
2806 #define _D1S2 0x04
2807 #define _LC1D2S0 0x10
2808 #define _D2S0 0x10
2809 #define _LC1D2S1 0x20
2810 #define _D2S1 0x20
2811 #define _LC1D2S2 0x40
2812 #define _D2S2 0x40
2813
2814 //==============================================================================
2815
2816
2817 //==============================================================================
2818 // CLC1SEL1 Bits
2819
2820 extern __at(0x0F13) __sfr CLC1SEL1;
2821
2822 typedef union
2823 {
2824 struct
2825 {
2826 unsigned LC1D3S0 : 1;
2827 unsigned LC1D3S1 : 1;
2828 unsigned LC1D3S2 : 1;
2829 unsigned : 1;
2830 unsigned LC1D4S0 : 1;
2831 unsigned LC1D4S1 : 1;
2832 unsigned LC1D4S2 : 1;
2833 unsigned : 1;
2834 };
2835
2836 struct
2837 {
2838 unsigned D3S0 : 1;
2839 unsigned D3S1 : 1;
2840 unsigned D3S2 : 1;
2841 unsigned : 1;
2842 unsigned D4S0 : 1;
2843 unsigned D4S1 : 1;
2844 unsigned D4S2 : 1;
2845 unsigned : 1;
2846 };
2847
2848 struct
2849 {
2850 unsigned D3S : 3;
2851 unsigned : 5;
2852 };
2853
2854 struct
2855 {
2856 unsigned LC1D3S : 3;
2857 unsigned : 5;
2858 };
2859
2860 struct
2861 {
2862 unsigned : 4;
2863 unsigned LC1D4S : 3;
2864 unsigned : 1;
2865 };
2866
2867 struct
2868 {
2869 unsigned : 4;
2870 unsigned D4S : 3;
2871 unsigned : 1;
2872 };
2873 } __CLC1SEL1bits_t;
2874
2875 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
2876
2877 #define _LC1D3S0 0x01
2878 #define _D3S0 0x01
2879 #define _LC1D3S1 0x02
2880 #define _D3S1 0x02
2881 #define _LC1D3S2 0x04
2882 #define _D3S2 0x04
2883 #define _LC1D4S0 0x10
2884 #define _D4S0 0x10
2885 #define _LC1D4S1 0x20
2886 #define _D4S1 0x20
2887 #define _LC1D4S2 0x40
2888 #define _D4S2 0x40
2889
2890 //==============================================================================
2891
2892
2893 //==============================================================================
2894 // CLC1GLS0 Bits
2895
2896 extern __at(0x0F14) __sfr CLC1GLS0;
2897
2898 typedef union
2899 {
2900 struct
2901 {
2902 unsigned LC1G1D1N : 1;
2903 unsigned LC1G1D1T : 1;
2904 unsigned LC1G1D2N : 1;
2905 unsigned LC1G1D2T : 1;
2906 unsigned LC1G1D3N : 1;
2907 unsigned LC1G1D3T : 1;
2908 unsigned LC1G1D4N : 1;
2909 unsigned LC1G1D4T : 1;
2910 };
2911
2912 struct
2913 {
2914 unsigned D1N : 1;
2915 unsigned D1T : 1;
2916 unsigned D2N : 1;
2917 unsigned D2T : 1;
2918 unsigned D3N : 1;
2919 unsigned D3T : 1;
2920 unsigned D4N : 1;
2921 unsigned D4T : 1;
2922 };
2923 } __CLC1GLS0bits_t;
2924
2925 extern __at(0x0F14) volatile __CLC1GLS0bits_t CLC1GLS0bits;
2926
2927 #define _LC1G1D1N 0x01
2928 #define _D1N 0x01
2929 #define _LC1G1D1T 0x02
2930 #define _D1T 0x02
2931 #define _LC1G1D2N 0x04
2932 #define _D2N 0x04
2933 #define _LC1G1D2T 0x08
2934 #define _D2T 0x08
2935 #define _LC1G1D3N 0x10
2936 #define _D3N 0x10
2937 #define _LC1G1D3T 0x20
2938 #define _D3T 0x20
2939 #define _LC1G1D4N 0x40
2940 #define _D4N 0x40
2941 #define _LC1G1D4T 0x80
2942 #define _D4T 0x80
2943
2944 //==============================================================================
2945
2946
2947 //==============================================================================
2948 // CLC1GLS1 Bits
2949
2950 extern __at(0x0F15) __sfr CLC1GLS1;
2951
2952 typedef union
2953 {
2954 struct
2955 {
2956 unsigned LC1G2D1N : 1;
2957 unsigned LC1G2D1T : 1;
2958 unsigned LC1G2D2N : 1;
2959 unsigned LC1G2D2T : 1;
2960 unsigned LC1G2D3N : 1;
2961 unsigned LC1G2D3T : 1;
2962 unsigned LC1G2D4N : 1;
2963 unsigned LC1G2D4T : 1;
2964 };
2965
2966 struct
2967 {
2968 unsigned D1N : 1;
2969 unsigned D1T : 1;
2970 unsigned D2N : 1;
2971 unsigned D2T : 1;
2972 unsigned D3N : 1;
2973 unsigned D3T : 1;
2974 unsigned D4N : 1;
2975 unsigned D4T : 1;
2976 };
2977 } __CLC1GLS1bits_t;
2978
2979 extern __at(0x0F15) volatile __CLC1GLS1bits_t CLC1GLS1bits;
2980
2981 #define _CLC1GLS1_LC1G2D1N 0x01
2982 #define _CLC1GLS1_D1N 0x01
2983 #define _CLC1GLS1_LC1G2D1T 0x02
2984 #define _CLC1GLS1_D1T 0x02
2985 #define _CLC1GLS1_LC1G2D2N 0x04
2986 #define _CLC1GLS1_D2N 0x04
2987 #define _CLC1GLS1_LC1G2D2T 0x08
2988 #define _CLC1GLS1_D2T 0x08
2989 #define _CLC1GLS1_LC1G2D3N 0x10
2990 #define _CLC1GLS1_D3N 0x10
2991 #define _CLC1GLS1_LC1G2D3T 0x20
2992 #define _CLC1GLS1_D3T 0x20
2993 #define _CLC1GLS1_LC1G2D4N 0x40
2994 #define _CLC1GLS1_D4N 0x40
2995 #define _CLC1GLS1_LC1G2D4T 0x80
2996 #define _CLC1GLS1_D4T 0x80
2997
2998 //==============================================================================
2999
3000
3001 //==============================================================================
3002 // CLC1GLS2 Bits
3003
3004 extern __at(0x0F16) __sfr CLC1GLS2;
3005
3006 typedef union
3007 {
3008 struct
3009 {
3010 unsigned LC1G3D1N : 1;
3011 unsigned LC1G3D1T : 1;
3012 unsigned LC1G3D2N : 1;
3013 unsigned LC1G3D2T : 1;
3014 unsigned LC1G3D3N : 1;
3015 unsigned LC1G3D3T : 1;
3016 unsigned LC1G3D4N : 1;
3017 unsigned LC1G3D4T : 1;
3018 };
3019
3020 struct
3021 {
3022 unsigned D1N : 1;
3023 unsigned D1T : 1;
3024 unsigned D2N : 1;
3025 unsigned D2T : 1;
3026 unsigned D3N : 1;
3027 unsigned D3T : 1;
3028 unsigned D4N : 1;
3029 unsigned D4T : 1;
3030 };
3031 } __CLC1GLS2bits_t;
3032
3033 extern __at(0x0F16) volatile __CLC1GLS2bits_t CLC1GLS2bits;
3034
3035 #define _CLC1GLS2_LC1G3D1N 0x01
3036 #define _CLC1GLS2_D1N 0x01
3037 #define _CLC1GLS2_LC1G3D1T 0x02
3038 #define _CLC1GLS2_D1T 0x02
3039 #define _CLC1GLS2_LC1G3D2N 0x04
3040 #define _CLC1GLS2_D2N 0x04
3041 #define _CLC1GLS2_LC1G3D2T 0x08
3042 #define _CLC1GLS2_D2T 0x08
3043 #define _CLC1GLS2_LC1G3D3N 0x10
3044 #define _CLC1GLS2_D3N 0x10
3045 #define _CLC1GLS2_LC1G3D3T 0x20
3046 #define _CLC1GLS2_D3T 0x20
3047 #define _CLC1GLS2_LC1G3D4N 0x40
3048 #define _CLC1GLS2_D4N 0x40
3049 #define _CLC1GLS2_LC1G3D4T 0x80
3050 #define _CLC1GLS2_D4T 0x80
3051
3052 //==============================================================================
3053
3054
3055 //==============================================================================
3056 // CLC1GLS3 Bits
3057
3058 extern __at(0x0F17) __sfr CLC1GLS3;
3059
3060 typedef union
3061 {
3062 struct
3063 {
3064 unsigned LC1G4D1N : 1;
3065 unsigned LC1G4D1T : 1;
3066 unsigned LC1G4D2N : 1;
3067 unsigned LC1G4D2T : 1;
3068 unsigned LC1G4D3N : 1;
3069 unsigned LC1G4D3T : 1;
3070 unsigned LC1G4D4N : 1;
3071 unsigned LC1G4D4T : 1;
3072 };
3073
3074 struct
3075 {
3076 unsigned G4D1N : 1;
3077 unsigned G4D1T : 1;
3078 unsigned G4D2N : 1;
3079 unsigned G4D2T : 1;
3080 unsigned G4D3N : 1;
3081 unsigned G4D3T : 1;
3082 unsigned G4D4N : 1;
3083 unsigned G4D4T : 1;
3084 };
3085 } __CLC1GLS3bits_t;
3086
3087 extern __at(0x0F17) volatile __CLC1GLS3bits_t CLC1GLS3bits;
3088
3089 #define _LC1G4D1N 0x01
3090 #define _G4D1N 0x01
3091 #define _LC1G4D1T 0x02
3092 #define _G4D1T 0x02
3093 #define _LC1G4D2N 0x04
3094 #define _G4D2N 0x04
3095 #define _LC1G4D2T 0x08
3096 #define _G4D2T 0x08
3097 #define _LC1G4D3N 0x10
3098 #define _G4D3N 0x10
3099 #define _LC1G4D3T 0x20
3100 #define _G4D3T 0x20
3101 #define _LC1G4D4N 0x40
3102 #define _G4D4N 0x40
3103 #define _LC1G4D4T 0x80
3104 #define _G4D4T 0x80
3105
3106 //==============================================================================
3107
3108
3109 //==============================================================================
3110 // CLC2CON Bits
3111
3112 extern __at(0x0F18) __sfr CLC2CON;
3113
3114 typedef union
3115 {
3116 struct
3117 {
3118 unsigned LC2MODE0 : 1;
3119 unsigned LC2MODE1 : 1;
3120 unsigned LC2MODE2 : 1;
3121 unsigned LC2INTN : 1;
3122 unsigned LC2INTP : 1;
3123 unsigned LC2OUT : 1;
3124 unsigned LC2OE : 1;
3125 unsigned LC2EN : 1;
3126 };
3127
3128 struct
3129 {
3130 unsigned LCMODE0 : 1;
3131 unsigned LCMODE1 : 1;
3132 unsigned LCMODE2 : 1;
3133 unsigned LCINTN : 1;
3134 unsigned LCINTP : 1;
3135 unsigned LCOUT : 1;
3136 unsigned LCOE : 1;
3137 unsigned LCEN : 1;
3138 };
3139
3140 struct
3141 {
3142 unsigned LCMODE : 3;
3143 unsigned : 5;
3144 };
3145
3146 struct
3147 {
3148 unsigned LC2MODE : 3;
3149 unsigned : 5;
3150 };
3151 } __CLC2CONbits_t;
3152
3153 extern __at(0x0F18) volatile __CLC2CONbits_t CLC2CONbits;
3154
3155 #define _CLC2CON_LC2MODE0 0x01
3156 #define _CLC2CON_LCMODE0 0x01
3157 #define _CLC2CON_LC2MODE1 0x02
3158 #define _CLC2CON_LCMODE1 0x02
3159 #define _CLC2CON_LC2MODE2 0x04
3160 #define _CLC2CON_LCMODE2 0x04
3161 #define _CLC2CON_LC2INTN 0x08
3162 #define _CLC2CON_LCINTN 0x08
3163 #define _CLC2CON_LC2INTP 0x10
3164 #define _CLC2CON_LCINTP 0x10
3165 #define _CLC2CON_LC2OUT 0x20
3166 #define _CLC2CON_LCOUT 0x20
3167 #define _CLC2CON_LC2OE 0x40
3168 #define _CLC2CON_LCOE 0x40
3169 #define _CLC2CON_LC2EN 0x80
3170 #define _CLC2CON_LCEN 0x80
3171
3172 //==============================================================================
3173
3174
3175 //==============================================================================
3176 // CLC2POL Bits
3177
3178 extern __at(0x0F19) __sfr CLC2POL;
3179
3180 typedef union
3181 {
3182 struct
3183 {
3184 unsigned LC2G1POL : 1;
3185 unsigned LC2G2POL : 1;
3186 unsigned LC2G3POL : 1;
3187 unsigned LC2G4POL : 1;
3188 unsigned : 1;
3189 unsigned : 1;
3190 unsigned : 1;
3191 unsigned LC2POL : 1;
3192 };
3193
3194 struct
3195 {
3196 unsigned G1POL : 1;
3197 unsigned G2POL : 1;
3198 unsigned G3POL : 1;
3199 unsigned G4POL : 1;
3200 unsigned : 1;
3201 unsigned : 1;
3202 unsigned : 1;
3203 unsigned POL : 1;
3204 };
3205 } __CLC2POLbits_t;
3206
3207 extern __at(0x0F19) volatile __CLC2POLbits_t CLC2POLbits;
3208
3209 #define _CLC2POL_LC2G1POL 0x01
3210 #define _CLC2POL_G1POL 0x01
3211 #define _CLC2POL_LC2G2POL 0x02
3212 #define _CLC2POL_G2POL 0x02
3213 #define _CLC2POL_LC2G3POL 0x04
3214 #define _CLC2POL_G3POL 0x04
3215 #define _CLC2POL_LC2G4POL 0x08
3216 #define _CLC2POL_G4POL 0x08
3217 #define _CLC2POL_LC2POL 0x80
3218 #define _CLC2POL_POL 0x80
3219
3220 //==============================================================================
3221
3222
3223 //==============================================================================
3224 // CLC2SEL0 Bits
3225
3226 extern __at(0x0F1A) __sfr CLC2SEL0;
3227
3228 typedef union
3229 {
3230 struct
3231 {
3232 unsigned LC2D1S0 : 1;
3233 unsigned LC2D1S1 : 1;
3234 unsigned LC2D1S2 : 1;
3235 unsigned : 1;
3236 unsigned LC2D2S0 : 1;
3237 unsigned LC2D2S1 : 1;
3238 unsigned LC2D2S2 : 1;
3239 unsigned : 1;
3240 };
3241
3242 struct
3243 {
3244 unsigned D1S0 : 1;
3245 unsigned D1S1 : 1;
3246 unsigned D1S2 : 1;
3247 unsigned : 1;
3248 unsigned D2S0 : 1;
3249 unsigned D2S1 : 1;
3250 unsigned D2S2 : 1;
3251 unsigned : 1;
3252 };
3253
3254 struct
3255 {
3256 unsigned LC2D1S : 3;
3257 unsigned : 5;
3258 };
3259
3260 struct
3261 {
3262 unsigned D1S : 3;
3263 unsigned : 5;
3264 };
3265
3266 struct
3267 {
3268 unsigned : 4;
3269 unsigned LC2D2S : 3;
3270 unsigned : 1;
3271 };
3272
3273 struct
3274 {
3275 unsigned : 4;
3276 unsigned D2S : 3;
3277 unsigned : 1;
3278 };
3279 } __CLC2SEL0bits_t;
3280
3281 extern __at(0x0F1A) volatile __CLC2SEL0bits_t CLC2SEL0bits;
3282
3283 #define _CLC2SEL0_LC2D1S0 0x01
3284 #define _CLC2SEL0_D1S0 0x01
3285 #define _CLC2SEL0_LC2D1S1 0x02
3286 #define _CLC2SEL0_D1S1 0x02
3287 #define _CLC2SEL0_LC2D1S2 0x04
3288 #define _CLC2SEL0_D1S2 0x04
3289 #define _CLC2SEL0_LC2D2S0 0x10
3290 #define _CLC2SEL0_D2S0 0x10
3291 #define _CLC2SEL0_LC2D2S1 0x20
3292 #define _CLC2SEL0_D2S1 0x20
3293 #define _CLC2SEL0_LC2D2S2 0x40
3294 #define _CLC2SEL0_D2S2 0x40
3295
3296 //==============================================================================
3297
3298
3299 //==============================================================================
3300 // CLC2SEL1 Bits
3301
3302 extern __at(0x0F1B) __sfr CLC2SEL1;
3303
3304 typedef union
3305 {
3306 struct
3307 {
3308 unsigned LC2D3S0 : 1;
3309 unsigned LC2D3S1 : 1;
3310 unsigned LC2D3S2 : 1;
3311 unsigned : 1;
3312 unsigned LC2D4S0 : 1;
3313 unsigned LC2D4S1 : 1;
3314 unsigned LC2D4S2 : 1;
3315 unsigned : 1;
3316 };
3317
3318 struct
3319 {
3320 unsigned D3S0 : 1;
3321 unsigned D3S1 : 1;
3322 unsigned D3S2 : 1;
3323 unsigned : 1;
3324 unsigned D4S0 : 1;
3325 unsigned D4S1 : 1;
3326 unsigned D4S2 : 1;
3327 unsigned : 1;
3328 };
3329
3330 struct
3331 {
3332 unsigned LC2D3S : 3;
3333 unsigned : 5;
3334 };
3335
3336 struct
3337 {
3338 unsigned D3S : 3;
3339 unsigned : 5;
3340 };
3341
3342 struct
3343 {
3344 unsigned : 4;
3345 unsigned LC2D4S : 3;
3346 unsigned : 1;
3347 };
3348
3349 struct
3350 {
3351 unsigned : 4;
3352 unsigned D4S : 3;
3353 unsigned : 1;
3354 };
3355 } __CLC2SEL1bits_t;
3356
3357 extern __at(0x0F1B) volatile __CLC2SEL1bits_t CLC2SEL1bits;
3358
3359 #define _CLC2SEL1_LC2D3S0 0x01
3360 #define _CLC2SEL1_D3S0 0x01
3361 #define _CLC2SEL1_LC2D3S1 0x02
3362 #define _CLC2SEL1_D3S1 0x02
3363 #define _CLC2SEL1_LC2D3S2 0x04
3364 #define _CLC2SEL1_D3S2 0x04
3365 #define _CLC2SEL1_LC2D4S0 0x10
3366 #define _CLC2SEL1_D4S0 0x10
3367 #define _CLC2SEL1_LC2D4S1 0x20
3368 #define _CLC2SEL1_D4S1 0x20
3369 #define _CLC2SEL1_LC2D4S2 0x40
3370 #define _CLC2SEL1_D4S2 0x40
3371
3372 //==============================================================================
3373
3374
3375 //==============================================================================
3376 // CLC2GLS0 Bits
3377
3378 extern __at(0x0F1C) __sfr CLC2GLS0;
3379
3380 typedef union
3381 {
3382 struct
3383 {
3384 unsigned LC2G1D1N : 1;
3385 unsigned LC2G1D1T : 1;
3386 unsigned LC2G1D2N : 1;
3387 unsigned LC2G1D2T : 1;
3388 unsigned LC2G1D3N : 1;
3389 unsigned LC2G1D3T : 1;
3390 unsigned LC2G1D4N : 1;
3391 unsigned LC2G1D4T : 1;
3392 };
3393
3394 struct
3395 {
3396 unsigned D1N : 1;
3397 unsigned D1T : 1;
3398 unsigned D2N : 1;
3399 unsigned D2T : 1;
3400 unsigned D3N : 1;
3401 unsigned D3T : 1;
3402 unsigned D4N : 1;
3403 unsigned D4T : 1;
3404 };
3405 } __CLC2GLS0bits_t;
3406
3407 extern __at(0x0F1C) volatile __CLC2GLS0bits_t CLC2GLS0bits;
3408
3409 #define _CLC2GLS0_LC2G1D1N 0x01
3410 #define _CLC2GLS0_D1N 0x01
3411 #define _CLC2GLS0_LC2G1D1T 0x02
3412 #define _CLC2GLS0_D1T 0x02
3413 #define _CLC2GLS0_LC2G1D2N 0x04
3414 #define _CLC2GLS0_D2N 0x04
3415 #define _CLC2GLS0_LC2G1D2T 0x08
3416 #define _CLC2GLS0_D2T 0x08
3417 #define _CLC2GLS0_LC2G1D3N 0x10
3418 #define _CLC2GLS0_D3N 0x10
3419 #define _CLC2GLS0_LC2G1D3T 0x20
3420 #define _CLC2GLS0_D3T 0x20
3421 #define _CLC2GLS0_LC2G1D4N 0x40
3422 #define _CLC2GLS0_D4N 0x40
3423 #define _CLC2GLS0_LC2G1D4T 0x80
3424 #define _CLC2GLS0_D4T 0x80
3425
3426 //==============================================================================
3427
3428
3429 //==============================================================================
3430 // CLC2GLS1 Bits
3431
3432 extern __at(0x0F1D) __sfr CLC2GLS1;
3433
3434 typedef union
3435 {
3436 struct
3437 {
3438 unsigned LC2G2D1N : 1;
3439 unsigned LC2G2D1T : 1;
3440 unsigned LC2G2D2N : 1;
3441 unsigned LC2G2D2T : 1;
3442 unsigned LC2G2D3N : 1;
3443 unsigned LC2G2D3T : 1;
3444 unsigned LC2G2D4N : 1;
3445 unsigned LC2G2D4T : 1;
3446 };
3447
3448 struct
3449 {
3450 unsigned D1N : 1;
3451 unsigned D1T : 1;
3452 unsigned D2N : 1;
3453 unsigned D2T : 1;
3454 unsigned D3N : 1;
3455 unsigned D3T : 1;
3456 unsigned D4N : 1;
3457 unsigned D4T : 1;
3458 };
3459 } __CLC2GLS1bits_t;
3460
3461 extern __at(0x0F1D) volatile __CLC2GLS1bits_t CLC2GLS1bits;
3462
3463 #define _CLC2GLS1_LC2G2D1N 0x01
3464 #define _CLC2GLS1_D1N 0x01
3465 #define _CLC2GLS1_LC2G2D1T 0x02
3466 #define _CLC2GLS1_D1T 0x02
3467 #define _CLC2GLS1_LC2G2D2N 0x04
3468 #define _CLC2GLS1_D2N 0x04
3469 #define _CLC2GLS1_LC2G2D2T 0x08
3470 #define _CLC2GLS1_D2T 0x08
3471 #define _CLC2GLS1_LC2G2D3N 0x10
3472 #define _CLC2GLS1_D3N 0x10
3473 #define _CLC2GLS1_LC2G2D3T 0x20
3474 #define _CLC2GLS1_D3T 0x20
3475 #define _CLC2GLS1_LC2G2D4N 0x40
3476 #define _CLC2GLS1_D4N 0x40
3477 #define _CLC2GLS1_LC2G2D4T 0x80
3478 #define _CLC2GLS1_D4T 0x80
3479
3480 //==============================================================================
3481
3482
3483 //==============================================================================
3484 // CLC2GLS2 Bits
3485
3486 extern __at(0x0F1E) __sfr CLC2GLS2;
3487
3488 typedef union
3489 {
3490 struct
3491 {
3492 unsigned LC2G3D1N : 1;
3493 unsigned LC2G3D1T : 1;
3494 unsigned LC2G3D2N : 1;
3495 unsigned LC2G3D2T : 1;
3496 unsigned LC2G3D3N : 1;
3497 unsigned LC2G3D3T : 1;
3498 unsigned LC2G3D4N : 1;
3499 unsigned LC2G3D4T : 1;
3500 };
3501
3502 struct
3503 {
3504 unsigned D1N : 1;
3505 unsigned D1T : 1;
3506 unsigned D2N : 1;
3507 unsigned D2T : 1;
3508 unsigned D3N : 1;
3509 unsigned D3T : 1;
3510 unsigned D4N : 1;
3511 unsigned D4T : 1;
3512 };
3513 } __CLC2GLS2bits_t;
3514
3515 extern __at(0x0F1E) volatile __CLC2GLS2bits_t CLC2GLS2bits;
3516
3517 #define _CLC2GLS2_LC2G3D1N 0x01
3518 #define _CLC2GLS2_D1N 0x01
3519 #define _CLC2GLS2_LC2G3D1T 0x02
3520 #define _CLC2GLS2_D1T 0x02
3521 #define _CLC2GLS2_LC2G3D2N 0x04
3522 #define _CLC2GLS2_D2N 0x04
3523 #define _CLC2GLS2_LC2G3D2T 0x08
3524 #define _CLC2GLS2_D2T 0x08
3525 #define _CLC2GLS2_LC2G3D3N 0x10
3526 #define _CLC2GLS2_D3N 0x10
3527 #define _CLC2GLS2_LC2G3D3T 0x20
3528 #define _CLC2GLS2_D3T 0x20
3529 #define _CLC2GLS2_LC2G3D4N 0x40
3530 #define _CLC2GLS2_D4N 0x40
3531 #define _CLC2GLS2_LC2G3D4T 0x80
3532 #define _CLC2GLS2_D4T 0x80
3533
3534 //==============================================================================
3535
3536
3537 //==============================================================================
3538 // CLC2GLS3 Bits
3539
3540 extern __at(0x0F1F) __sfr CLC2GLS3;
3541
3542 typedef union
3543 {
3544 struct
3545 {
3546 unsigned LC2G4D1N : 1;
3547 unsigned LC2G4D1T : 1;
3548 unsigned LC2G4D2N : 1;
3549 unsigned LC2G4D2T : 1;
3550 unsigned LC2G4D3N : 1;
3551 unsigned LC2G4D3T : 1;
3552 unsigned LC2G4D4N : 1;
3553 unsigned LC2G4D4T : 1;
3554 };
3555
3556 struct
3557 {
3558 unsigned G4D1N : 1;
3559 unsigned G4D1T : 1;
3560 unsigned G4D2N : 1;
3561 unsigned G4D2T : 1;
3562 unsigned G4D3N : 1;
3563 unsigned G4D3T : 1;
3564 unsigned G4D4N : 1;
3565 unsigned G4D4T : 1;
3566 };
3567 } __CLC2GLS3bits_t;
3568
3569 extern __at(0x0F1F) volatile __CLC2GLS3bits_t CLC2GLS3bits;
3570
3571 #define _CLC2GLS3_LC2G4D1N 0x01
3572 #define _CLC2GLS3_G4D1N 0x01
3573 #define _CLC2GLS3_LC2G4D1T 0x02
3574 #define _CLC2GLS3_G4D1T 0x02
3575 #define _CLC2GLS3_LC2G4D2N 0x04
3576 #define _CLC2GLS3_G4D2N 0x04
3577 #define _CLC2GLS3_LC2G4D2T 0x08
3578 #define _CLC2GLS3_G4D2T 0x08
3579 #define _CLC2GLS3_LC2G4D3N 0x10
3580 #define _CLC2GLS3_G4D3N 0x10
3581 #define _CLC2GLS3_LC2G4D3T 0x20
3582 #define _CLC2GLS3_G4D3T 0x20
3583 #define _CLC2GLS3_LC2G4D4N 0x40
3584 #define _CLC2GLS3_G4D4N 0x40
3585 #define _CLC2GLS3_LC2G4D4T 0x80
3586 #define _CLC2GLS3_G4D4T 0x80
3587
3588 //==============================================================================
3589
3590 extern __at(0x0FE3) __sfr BSR_ICDSHAD;
3591
3592 //==============================================================================
3593 // STATUS_SHAD Bits
3594
3595 extern __at(0x0FE4) __sfr STATUS_SHAD;
3596
3597 typedef struct
3598 {
3599 unsigned C_SHAD : 1;
3600 unsigned DC_SHAD : 1;
3601 unsigned Z_SHAD : 1;
3602 unsigned : 1;
3603 unsigned : 1;
3604 unsigned : 1;
3605 unsigned : 1;
3606 unsigned : 1;
3607 } __STATUS_SHADbits_t;
3608
3609 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
3610
3611 #define _C_SHAD 0x01
3612 #define _DC_SHAD 0x02
3613 #define _Z_SHAD 0x04
3614
3615 //==============================================================================
3616
3617 extern __at(0x0FE5) __sfr WREG_SHAD;
3618 extern __at(0x0FE6) __sfr BSR_SHAD;
3619 extern __at(0x0FE7) __sfr PCLATH_SHAD;
3620 extern __at(0x0FE8) __sfr FSR0L_SHAD;
3621 extern __at(0x0FE9) __sfr FSR0H_SHAD;
3622 extern __at(0x0FEA) __sfr FSR1L_SHAD;
3623 extern __at(0x0FEB) __sfr FSR1H_SHAD;
3624 extern __at(0x0FED) __sfr STKPTR;
3625 extern __at(0x0FEE) __sfr TOSL;
3626 extern __at(0x0FEF) __sfr TOSH;
3627
3628 //==============================================================================
3629 //
3630 // Configuration Bits
3631 //
3632 //==============================================================================
3633
3634 #define _CONFIG1 0x8007
3635 #define _CONFIG2 0x8008
3636
3637 //----------------------------- CONFIG1 Options -------------------------------
3638
3639 #define _FOSC_INTOSC 0x3FFC // Internal Oscillator, I/O Function on OSC1.
3640 #define _FOSC_ECL 0x3FFD // External Clock, Low Power Mode.
3641 #define _FOSC_ECM 0x3FFE // External Clock, Medium Power Mode.
3642 #define _FOSC_ECH 0x3FFF // External Clock, High Power Mode.
3643 #define _WDTE_OFF 0x3FE7 // WDT disabled.
3644 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
3645 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
3646 #define _WDTE_ON 0x3FFF // WDT enabled.
3647 #define _PWRTE_ON 0x3FDF // PWRT enabled.
3648 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
3649 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
3650 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
3651 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
3652 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
3653 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
3654 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
3655 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
3656 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
3657 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
3658 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
3659
3660 //----------------------------- CONFIG2 Options -------------------------------
3661
3662 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
3663 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
3664 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
3665 #define _WRT_OFF 0x3FFF // Write protection off.
3666 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
3667 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
3668 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
3669 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
3670 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
3671 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
3672 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
3673 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
3674
3675 //==============================================================================
3676
3677 #define _DEVID1 0x8006
3678
3679 #define _IDLOC0 0x8000
3680 #define _IDLOC1 0x8001
3681 #define _IDLOC2 0x8002
3682 #define _IDLOC3 0x8003
3683
3684 //==============================================================================
3685
3686 #ifndef NO_BIT_DEFINES
3687
3688 #define ADON ADCON0bits.ADON // bit 0
3689 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
3690 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
3691 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
3692 #define CHS0 ADCON0bits.CHS0 // bit 2
3693 #define CHS1 ADCON0bits.CHS1 // bit 3
3694 #define CHS2 ADCON0bits.CHS2 // bit 4
3695 #define CHS3 ADCON0bits.CHS3 // bit 5
3696 #define CHS4 ADCON0bits.CHS4 // bit 6
3697
3698 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
3699 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
3700 #define ADCS0 ADCON1bits.ADCS0 // bit 4
3701 #define ADCS1 ADCON1bits.ADCS1 // bit 5
3702 #define ADCS2 ADCON1bits.ADCS2 // bit 6
3703 #define ADFM ADCON1bits.ADFM // bit 7
3704
3705 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
3706 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
3707 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
3708 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
3709
3710 #define ANSA0 ANSELAbits.ANSA0 // bit 0
3711 #define ANSA1 ANSELAbits.ANSA1 // bit 1
3712 #define ANSA2 ANSELAbits.ANSA2 // bit 2
3713 #define ANSA4 ANSELAbits.ANSA4 // bit 4
3714
3715 #define ANSB4 ANSELBbits.ANSB4 // bit 4
3716 #define ANSB5 ANSELBbits.ANSB5 // bit 5
3717
3718 #define ANSC0 ANSELCbits.ANSC0 // bit 0
3719 #define ANSC1 ANSELCbits.ANSC1 // bit 1
3720 #define ANSC2 ANSELCbits.ANSC2 // bit 2
3721 #define ANSC3 ANSELCbits.ANSC3 // bit 3
3722 #define ANSC6 ANSELCbits.ANSC6 // bit 6
3723 #define ANSC7 ANSELCbits.ANSC7 // bit 7
3724
3725 #define NCO1SEL APFCONbits.NCO1SEL // bit 0
3726 #define CLC1SEL APFCONbits.CLC1SEL // bit 1
3727
3728 #define BORRDY BORCONbits.BORRDY // bit 0
3729 #define BORFS BORCONbits.BORFS // bit 6
3730 #define SBOREN BORCONbits.SBOREN // bit 7
3731
3732 #define BSR0 BSRbits.BSR0 // bit 0
3733 #define BSR1 BSRbits.BSR1 // bit 1
3734 #define BSR2 BSRbits.BSR2 // bit 2
3735 #define BSR3 BSRbits.BSR3 // bit 3
3736 #define BSR4 BSRbits.BSR4 // bit 4
3737
3738 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
3739 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits
3740 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
3741 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits
3742 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
3743 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits
3744 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
3745 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits
3746 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
3747 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits
3748 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
3749 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits
3750 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits
3751 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits
3752 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
3753 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits
3754
3755 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
3756 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
3757 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
3758 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
3759 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
3760 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
3761 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
3762 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
3763 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
3764 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
3765 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
3766 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
3767 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
3768 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
3769 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
3770 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
3771
3772 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
3773 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
3774 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
3775 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
3776 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
3777 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
3778 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
3779 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
3780 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
3781 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
3782 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
3783 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
3784 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
3785 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
3786 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
3787 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
3788
3789 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
3790 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
3791 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
3792 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
3793 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
3794 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
3795 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
3796 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
3797 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
3798 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
3799
3800 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
3801 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
3802 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
3803 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
3804 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
3805 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
3806 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits
3807 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits
3808 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits
3809 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits
3810 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits
3811 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits
3812
3813 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits
3814 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits
3815 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits
3816 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits
3817 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits
3818 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits
3819 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits
3820 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits
3821 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits
3822 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits
3823 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits
3824 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits
3825
3826 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
3827 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
3828
3829 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
3830 #define G1POLA CWG1CON0bits.G1POLA // bit 3
3831 #define G1POLB CWG1CON0bits.G1POLB // bit 4
3832 #define G1OEA CWG1CON0bits.G1OEA // bit 5
3833 #define G1OEB CWG1CON0bits.G1OEB // bit 6
3834 #define G1EN CWG1CON0bits.G1EN // bit 7
3835
3836 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
3837 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
3838 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
3839 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
3840 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
3841 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
3842 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
3843
3844 #define G1ASDSCLC2 CWG1CON2bits.G1ASDSCLC2 // bit 0
3845 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
3846 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
3847 #define G1ASE CWG1CON2bits.G1ASE // bit 7
3848
3849 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
3850 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
3851 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
3852 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
3853 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
3854 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
3855
3856 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
3857 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
3858 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
3859 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
3860 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
3861 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
3862
3863 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
3864 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
3865 #define TSRNG FVRCONbits.TSRNG // bit 4
3866 #define TSEN FVRCONbits.TSEN // bit 5
3867 #define FVRRDY FVRCONbits.FVRRDY // bit 6
3868 #define FVREN FVRCONbits.FVREN // bit 7
3869
3870 #define IOCIF INTCONbits.IOCIF // bit 0
3871 #define INTF INTCONbits.INTF // bit 1
3872 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
3873 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
3874 #define IOCIE INTCONbits.IOCIE // bit 3
3875 #define INTE INTCONbits.INTE // bit 4
3876 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
3877 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
3878 #define PEIE INTCONbits.PEIE // bit 6
3879 #define GIE INTCONbits.GIE // bit 7
3880
3881 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
3882 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
3883 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
3884 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
3885 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
3886 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
3887
3888 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
3889 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
3890 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
3891 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
3892 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
3893 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
3894
3895 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
3896 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
3897 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
3898 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
3899 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
3900 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
3901
3902 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
3903 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
3904 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
3905 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
3906
3907 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
3908 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
3909 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
3910 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
3911
3912 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
3913 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
3914 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
3915 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
3916
3917 #define LATA0 LATAbits.LATA0 // bit 0
3918 #define LATA1 LATAbits.LATA1 // bit 1
3919 #define LATA2 LATAbits.LATA2 // bit 2
3920 #define LATA4 LATAbits.LATA4 // bit 4
3921 #define LATA5 LATAbits.LATA5 // bit 5
3922
3923 #define LATB4 LATBbits.LATB4 // bit 4
3924 #define LATB5 LATBbits.LATB5 // bit 5
3925 #define LATB6 LATBbits.LATB6 // bit 6
3926 #define LATB7 LATBbits.LATB7 // bit 7
3927
3928 #define LATC0 LATCbits.LATC0 // bit 0
3929 #define LATC1 LATCbits.LATC1 // bit 1
3930 #define LATC2 LATCbits.LATC2 // bit 2
3931 #define LATC3 LATCbits.LATC3 // bit 3
3932 #define LATC4 LATCbits.LATC4 // bit 4
3933 #define LATC5 LATCbits.LATC5 // bit 5
3934 #define LATC6 LATCbits.LATC6 // bit 6
3935 #define LATC7 LATCbits.LATC7 // bit 7
3936
3937 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
3938 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
3939 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
3940 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
3941 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
3942 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
3943 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
3944 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
3945
3946 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
3947 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
3948 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
3949 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
3950 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
3951 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
3952 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
3953 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
3954
3955 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
3956 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
3957 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
3958 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
3959
3960 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
3961 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
3962 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
3963 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
3964 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
3965
3966 #define N1PFM NCO1CONbits.N1PFM // bit 0
3967 #define N1POL NCO1CONbits.N1POL // bit 4
3968 #define N1OUT NCO1CONbits.N1OUT // bit 5
3969 #define N1OE NCO1CONbits.N1OE // bit 6
3970 #define N1EN NCO1CONbits.N1EN // bit 7
3971
3972 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
3973 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
3974 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
3975 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
3976 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
3977 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
3978 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
3979 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
3980
3981 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
3982 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
3983 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
3984 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
3985 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
3986 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
3987 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
3988 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
3989
3990 #define PS0 OPTION_REGbits.PS0 // bit 0
3991 #define PS1 OPTION_REGbits.PS1 // bit 1
3992 #define PS2 OPTION_REGbits.PS2 // bit 2
3993 #define PSA OPTION_REGbits.PSA // bit 3
3994 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
3995 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
3996 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
3997 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
3998 #define INTEDG OPTION_REGbits.INTEDG // bit 6
3999 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
4000
4001 #define SCS0 OSCCONbits.SCS0 // bit 0
4002 #define SCS1 OSCCONbits.SCS1 // bit 1
4003 #define IRCF0 OSCCONbits.IRCF0 // bit 3
4004 #define IRCF1 OSCCONbits.IRCF1 // bit 4
4005 #define IRCF2 OSCCONbits.IRCF2 // bit 5
4006 #define IRCF3 OSCCONbits.IRCF3 // bit 6
4007
4008 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
4009 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
4010 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
4011 #define OSTS OSCSTATbits.OSTS // bit 5
4012 #define SOSCR OSCSTATbits.SOSCR // bit 7
4013
4014 #define NOT_BOR PCONbits.NOT_BOR // bit 0
4015 #define NOT_POR PCONbits.NOT_POR // bit 1
4016 #define NOT_RI PCONbits.NOT_RI // bit 2
4017 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
4018 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
4019 #define STKUNF PCONbits.STKUNF // bit 6
4020 #define STKOVF PCONbits.STKOVF // bit 7
4021
4022 #define TMR1IE PIE1bits.TMR1IE // bit 0
4023 #define TMR2IE PIE1bits.TMR2IE // bit 1
4024 #define ADIE PIE1bits.ADIE // bit 6
4025 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
4026
4027 #define NCO1IE PIE2bits.NCO1IE // bit 2
4028
4029 #define CLC1IE PIE3bits.CLC1IE // bit 0
4030 #define CLC2IE PIE3bits.CLC2IE // bit 1
4031
4032 #define TMR1IF PIR1bits.TMR1IF // bit 0
4033 #define TMR2IF PIR1bits.TMR2IF // bit 1
4034 #define ADIF PIR1bits.ADIF // bit 6
4035 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
4036
4037 #define NCO1IF PIR2bits.NCO1IF // bit 2
4038
4039 #define CLC1IF PIR3bits.CLC1IF // bit 0
4040 #define CLC2IF PIR3bits.CLC2IF // bit 1
4041
4042 #define RD PMCON1bits.RD // bit 0
4043 #define WR PMCON1bits.WR // bit 1
4044 #define WREN PMCON1bits.WREN // bit 2
4045 #define WRERR PMCON1bits.WRERR // bit 3
4046 #define FREE PMCON1bits.FREE // bit 4
4047 #define LWLO PMCON1bits.LWLO // bit 5
4048 #define CFGS PMCON1bits.CFGS // bit 6
4049
4050 #define RA0 PORTAbits.RA0 // bit 0
4051 #define RA1 PORTAbits.RA1 // bit 1
4052 #define RA2 PORTAbits.RA2 // bit 2
4053 #define RA3 PORTAbits.RA3 // bit 3
4054 #define RA4 PORTAbits.RA4 // bit 4
4055 #define RA5 PORTAbits.RA5 // bit 5
4056
4057 #define RB4 PORTBbits.RB4 // bit 4
4058 #define RB5 PORTBbits.RB5 // bit 5
4059 #define RB6 PORTBbits.RB6 // bit 6
4060 #define RB7 PORTBbits.RB7 // bit 7
4061
4062 #define RC0 PORTCbits.RC0 // bit 0
4063 #define RC1 PORTCbits.RC1 // bit 1
4064 #define RC2 PORTCbits.RC2 // bit 2
4065 #define RC3 PORTCbits.RC3 // bit 3
4066 #define RC4 PORTCbits.RC4 // bit 4
4067 #define RC5 PORTCbits.RC5 // bit 5
4068 #define RC6 PORTCbits.RC6 // bit 6
4069 #define RC7 PORTCbits.RC7 // bit 7
4070
4071 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
4072 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
4073 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
4074 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
4075
4076 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
4077 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
4078 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
4079 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
4080 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
4081 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
4082 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
4083 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
4084
4085 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
4086 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
4087
4088 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
4089 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
4090 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
4091 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
4092
4093 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
4094 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
4095 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
4096 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
4097 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
4098 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
4099 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
4100 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
4101
4102 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
4103 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
4104
4105 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
4106 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
4107 #define PWM3OE PWM3CONbits.PWM3OE // bit 6
4108 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
4109
4110 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
4111 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
4112 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
4113 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
4114 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
4115 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
4116 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
4117 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
4118
4119 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
4120 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
4121
4122 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
4123 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
4124 #define PWM4OE PWM4CONbits.PWM4OE // bit 6
4125 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
4126
4127 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
4128 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
4129 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
4130 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
4131 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
4132 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
4133 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
4134 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
4135
4136 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
4137 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
4138
4139 #define C STATUSbits.C // bit 0
4140 #define DC STATUSbits.DC // bit 1
4141 #define Z STATUSbits.Z // bit 2
4142 #define NOT_PD STATUSbits.NOT_PD // bit 3
4143 #define NOT_TO STATUSbits.NOT_TO // bit 4
4144
4145 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
4146 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
4147 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
4148
4149 #define TMR1ON T1CONbits.TMR1ON // bit 0
4150 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
4151 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
4152 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
4153 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
4154 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
4155 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
4156
4157 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
4158 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
4159 #define T1GVAL T1GCONbits.T1GVAL // bit 2
4160 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
4161 #define T1GSPM T1GCONbits.T1GSPM // bit 4
4162 #define T1GTM T1GCONbits.T1GTM // bit 5
4163 #define T1GPOL T1GCONbits.T1GPOL // bit 6
4164 #define TMR1GE T1GCONbits.TMR1GE // bit 7
4165
4166 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
4167 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
4168 #define TMR2ON T2CONbits.TMR2ON // bit 2
4169 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
4170 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
4171 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
4172 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
4173
4174 #define TRISA0 TRISAbits.TRISA0 // bit 0
4175 #define TRISA1 TRISAbits.TRISA1 // bit 1
4176 #define TRISA2 TRISAbits.TRISA2 // bit 2
4177 #define TRISA3 TRISAbits.TRISA3 // bit 3
4178 #define TRISA4 TRISAbits.TRISA4 // bit 4
4179 #define TRISA5 TRISAbits.TRISA5 // bit 5
4180
4181 #define TRISB4 TRISBbits.TRISB4 // bit 4
4182 #define TRISB5 TRISBbits.TRISB5 // bit 5
4183 #define TRISB6 TRISBbits.TRISB6 // bit 6
4184 #define TRISB7 TRISBbits.TRISB7 // bit 7
4185
4186 #define TRISC0 TRISCbits.TRISC0 // bit 0
4187 #define TRISC1 TRISCbits.TRISC1 // bit 1
4188 #define TRISC2 TRISCbits.TRISC2 // bit 2
4189 #define TRISC3 TRISCbits.TRISC3 // bit 3
4190 #define TRISC4 TRISCbits.TRISC4 // bit 4
4191 #define TRISC5 TRISCbits.TRISC5 // bit 5
4192 #define TRISC6 TRISCbits.TRISC6 // bit 6
4193 #define TRISC7 TRISCbits.TRISC7 // bit 7
4194
4195 #define VREGPM0 VREGCONbits.VREGPM0 // bit 0
4196 #define VREGPM1 VREGCONbits.VREGPM1 // bit 1
4197
4198 #define SWDTEN WDTCONbits.SWDTEN // bit 0
4199 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
4200 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
4201 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
4202 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
4203 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
4204
4205 #define WPUA0 WPUAbits.WPUA0 // bit 0
4206 #define WPUA1 WPUAbits.WPUA1 // bit 1
4207 #define WPUA2 WPUAbits.WPUA2 // bit 2
4208 #define WPUA3 WPUAbits.WPUA3 // bit 3
4209 #define WPUA4 WPUAbits.WPUA4 // bit 4
4210 #define WPUA5 WPUAbits.WPUA5 // bit 5
4211
4212 #define WPUB4 WPUBbits.WPUB4 // bit 4
4213 #define WPUB5 WPUBbits.WPUB5 // bit 5
4214 #define WPUB6 WPUBbits.WPUB6 // bit 6
4215 #define WPUB7 WPUBbits.WPUB7 // bit 7
4216
4217 #endif // #ifndef NO_BIT_DEFINES
4218
4219 #endif // #ifndef __PIC16F1507_H__
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