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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f1578.h
blob9f1b55e972b5817c2779d93abd3fb668db643584
1 /*
2 * This declarations of the PIC16F1578 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:08 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F1578_H__
26 #define __PIC16F1578_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PIR1_ADDR 0x0011
54 #define PIR2_ADDR 0x0012
55 #define PIR3_ADDR 0x0013
56 #define TMR0_ADDR 0x0015
57 #define TMR1_ADDR 0x0016
58 #define TMR1L_ADDR 0x0016
59 #define TMR1H_ADDR 0x0017
60 #define T1CON_ADDR 0x0018
61 #define T1GCON_ADDR 0x0019
62 #define TMR2_ADDR 0x001A
63 #define PR2_ADDR 0x001B
64 #define T2CON_ADDR 0x001C
65 #define TRISA_ADDR 0x008C
66 #define TRISB_ADDR 0x008D
67 #define TRISC_ADDR 0x008E
68 #define PIE1_ADDR 0x0091
69 #define PIE2_ADDR 0x0092
70 #define PIE3_ADDR 0x0093
71 #define OPTION_REG_ADDR 0x0095
72 #define PCON_ADDR 0x0096
73 #define WDTCON_ADDR 0x0097
74 #define OSCTUNE_ADDR 0x0098
75 #define OSCCON_ADDR 0x0099
76 #define OSCSTAT_ADDR 0x009A
77 #define ADRES_ADDR 0x009B
78 #define ADRESL_ADDR 0x009B
79 #define ADRESH_ADDR 0x009C
80 #define ADCON0_ADDR 0x009D
81 #define ADCON1_ADDR 0x009E
82 #define ADCON2_ADDR 0x009F
83 #define LATA_ADDR 0x010C
84 #define LATB_ADDR 0x010D
85 #define LATC_ADDR 0x010E
86 #define CM1CON0_ADDR 0x0111
87 #define CM1CON1_ADDR 0x0112
88 #define CM2CON0_ADDR 0x0113
89 #define CM2CON1_ADDR 0x0114
90 #define CMOUT_ADDR 0x0115
91 #define BORCON_ADDR 0x0116
92 #define FVRCON_ADDR 0x0117
93 #define DACCON0_ADDR 0x0118
94 #define DACCON1_ADDR 0x0119
95 #define ANSELA_ADDR 0x018C
96 #define ANSELB_ADDR 0x018D
97 #define ANSELC_ADDR 0x018E
98 #define PMADR_ADDR 0x0191
99 #define PMADRL_ADDR 0x0191
100 #define PMADRH_ADDR 0x0192
101 #define PMDAT_ADDR 0x0193
102 #define PMDATL_ADDR 0x0193
103 #define PMDATH_ADDR 0x0194
104 #define PMCON1_ADDR 0x0195
105 #define PMCON2_ADDR 0x0196
106 #define VREGCON_ADDR 0x0197
107 #define RCREG_ADDR 0x0199
108 #define TXREG_ADDR 0x019A
109 #define SPBRG_ADDR 0x019B
110 #define SPBRGL_ADDR 0x019B
111 #define SPBRGH_ADDR 0x019C
112 #define RCSTA_ADDR 0x019D
113 #define TXSTA_ADDR 0x019E
114 #define BAUDCON_ADDR 0x019F
115 #define WPUA_ADDR 0x020C
116 #define WPUB_ADDR 0x020D
117 #define WPUC_ADDR 0x020E
118 #define ODCONA_ADDR 0x028C
119 #define ODCONB_ADDR 0x028D
120 #define ODCONC_ADDR 0x028E
121 #define SLRCONA_ADDR 0x030C
122 #define SLRCONB_ADDR 0x030D
123 #define SLRCONC_ADDR 0x030E
124 #define INLVLA_ADDR 0x038C
125 #define INLVLB_ADDR 0x038D
126 #define INLVLC_ADDR 0x038E
127 #define IOCAP_ADDR 0x0391
128 #define IOCAN_ADDR 0x0392
129 #define IOCAF_ADDR 0x0393
130 #define IOCBP_ADDR 0x0394
131 #define IOCBN_ADDR 0x0395
132 #define IOCBF_ADDR 0x0396
133 #define IOCCP_ADDR 0x0397
134 #define IOCCN_ADDR 0x0398
135 #define IOCCF_ADDR 0x0399
136 #define CWG1DBR_ADDR 0x0691
137 #define CWG1DBF_ADDR 0x0692
138 #define CWG1CON0_ADDR 0x0693
139 #define CWG1CON1_ADDR 0x0694
140 #define CWG1CON2_ADDR 0x0695
141 #define PWMEN_ADDR 0x0D8E
142 #define PWMLD_ADDR 0x0D8F
143 #define PWMOUT_ADDR 0x0D90
144 #define PWM1PH_ADDR 0x0D91
145 #define PWM1PHL_ADDR 0x0D91
146 #define PWM1PHH_ADDR 0x0D92
147 #define PWM1DC_ADDR 0x0D93
148 #define PWM1DCL_ADDR 0x0D93
149 #define PWM1DCH_ADDR 0x0D94
150 #define PWM1PR_ADDR 0x0D95
151 #define PWM1PRL_ADDR 0x0D95
152 #define PWM1PRH_ADDR 0x0D96
153 #define PWM1OF_ADDR 0x0D97
154 #define PWM1OFL_ADDR 0x0D97
155 #define PWM1OFH_ADDR 0x0D98
156 #define PWM1TMR_ADDR 0x0D99
157 #define PWM1TMRL_ADDR 0x0D99
158 #define PWM1TMRH_ADDR 0x0D9A
159 #define PWM1CON_ADDR 0x0D9B
160 #define PWM1INTCON_ADDR 0x0D9C
161 #define PWM1INTE_ADDR 0x0D9C
162 #define PWM1INTF_ADDR 0x0D9D
163 #define PWM1INTFLG_ADDR 0x0D9D
164 #define PWM1CLKCON_ADDR 0x0D9E
165 #define PWM1LDCON_ADDR 0x0D9F
166 #define PWM1OFCON_ADDR 0x0DA0
167 #define PWM2PH_ADDR 0x0DA1
168 #define PWM2PHL_ADDR 0x0DA1
169 #define PWM2PHH_ADDR 0x0DA2
170 #define PWM2DC_ADDR 0x0DA3
171 #define PWM2DCL_ADDR 0x0DA3
172 #define PWM2DCH_ADDR 0x0DA4
173 #define PWM2PR_ADDR 0x0DA5
174 #define PWM2PRL_ADDR 0x0DA5
175 #define PWM2PRH_ADDR 0x0DA6
176 #define PWM2OF_ADDR 0x0DA7
177 #define PWM2OFL_ADDR 0x0DA7
178 #define PWM2OFH_ADDR 0x0DA8
179 #define PWM2TMR_ADDR 0x0DA9
180 #define PWM2TMRL_ADDR 0x0DA9
181 #define PWM2TMRH_ADDR 0x0DAA
182 #define PWM2CON_ADDR 0x0DAB
183 #define PWM2INTCON_ADDR 0x0DAC
184 #define PWM2INTE_ADDR 0x0DAC
185 #define PWM2INTF_ADDR 0x0DAD
186 #define PWM2INTFLG_ADDR 0x0DAD
187 #define PWM2CLKCON_ADDR 0x0DAE
188 #define PWM2LDCON_ADDR 0x0DAF
189 #define PWM2OFCON_ADDR 0x0DB0
190 #define PWM3PH_ADDR 0x0DB1
191 #define PWM3PHL_ADDR 0x0DB1
192 #define PWM3PHH_ADDR 0x0DB2
193 #define PWM3DC_ADDR 0x0DB3
194 #define PWM3DCL_ADDR 0x0DB3
195 #define PWM3DCH_ADDR 0x0DB4
196 #define PWM3PR_ADDR 0x0DB5
197 #define PWM3PRL_ADDR 0x0DB5
198 #define PWM3PRH_ADDR 0x0DB6
199 #define PWM3OF_ADDR 0x0DB7
200 #define PWM3OFL_ADDR 0x0DB7
201 #define PWM3OFH_ADDR 0x0DB8
202 #define PWM3TMR_ADDR 0x0DB9
203 #define PWM3TMRL_ADDR 0x0DB9
204 #define PWM3TMRH_ADDR 0x0DBA
205 #define PWM3CON_ADDR 0x0DBB
206 #define PWM3INTCON_ADDR 0x0DBC
207 #define PWM3INTE_ADDR 0x0DBC
208 #define PWM3INTF_ADDR 0x0DBD
209 #define PWM3INTFLG_ADDR 0x0DBD
210 #define PWM3CLKCON_ADDR 0x0DBE
211 #define PWM3LDCON_ADDR 0x0DBF
212 #define PWM3OFCON_ADDR 0x0DC0
213 #define PWM4PH_ADDR 0x0DC1
214 #define PWM4PHL_ADDR 0x0DC1
215 #define PWM4PHH_ADDR 0x0DC2
216 #define PWM4DC_ADDR 0x0DC3
217 #define PWM4DCL_ADDR 0x0DC3
218 #define PWM4DCH_ADDR 0x0DC4
219 #define PWM4PR_ADDR 0x0DC5
220 #define PWM4PRL_ADDR 0x0DC5
221 #define PWM4PRH_ADDR 0x0DC6
222 #define PWM4OF_ADDR 0x0DC7
223 #define PWM4OFL_ADDR 0x0DC7
224 #define PWM4OFH_ADDR 0x0DC8
225 #define PWM4TMR_ADDR 0x0DC9
226 #define PWM4TMRL_ADDR 0x0DC9
227 #define PWM4TMRH_ADDR 0x0DCA
228 #define PWM4CON_ADDR 0x0DCB
229 #define PWM4INTCON_ADDR 0x0DCC
230 #define PWM4INTE_ADDR 0x0DCC
231 #define PWM4INTF_ADDR 0x0DCD
232 #define PWM4INTFLG_ADDR 0x0DCD
233 #define PWM4CLKCON_ADDR 0x0DCE
234 #define PWM4LDCON_ADDR 0x0DCF
235 #define PWM4OFCON_ADDR 0x0DD0
236 #define PPSLOCK_ADDR 0x0E0F
237 #define INTPPS_ADDR 0x0E10
238 #define T0CKIPPS_ADDR 0x0E11
239 #define T1CKIPPS_ADDR 0x0E12
240 #define T1GPPS_ADDR 0x0E13
241 #define CWG1INPPS_ADDR 0x0E14
242 #define RXPPS_ADDR 0x0E15
243 #define CKPPS_ADDR 0x0E16
244 #define ADCACTPPS_ADDR 0x0E17
245 #define RA0PPS_ADDR 0x0E90
246 #define RA1PPS_ADDR 0x0E91
247 #define RA2PPS_ADDR 0x0E92
248 #define RA4PPS_ADDR 0x0E94
249 #define RA5PPS_ADDR 0x0E95
250 #define RB4PPS_ADDR 0x0E9C
251 #define RB5PPS_ADDR 0x0E9D
252 #define RB6PPS_ADDR 0x0E9E
253 #define RB7PPS_ADDR 0x0E9F
254 #define RC0PPS_ADDR 0x0EA0
255 #define RC1PPS_ADDR 0x0EA1
256 #define RC2PPS_ADDR 0x0EA2
257 #define RC3PPS_ADDR 0x0EA3
258 #define RC4PPS_ADDR 0x0EA4
259 #define RC5PPS_ADDR 0x0EA5
260 #define RC6PPS_ADDR 0x0EA6
261 #define RC7PPS_ADDR 0x0EA7
262 #define STATUS_SHAD_ADDR 0x0FE4
263 #define WREG_SHAD_ADDR 0x0FE5
264 #define BSR_SHAD_ADDR 0x0FE6
265 #define PCLATH_SHAD_ADDR 0x0FE7
266 #define FSR0L_SHAD_ADDR 0x0FE8
267 #define FSR0_SHAD_ADDR 0x0FE8
268 #define FSR0H_SHAD_ADDR 0x0FE9
269 #define FSR1L_SHAD_ADDR 0x0FEA
270 #define FSR1_SHAD_ADDR 0x0FEA
271 #define FSR1H_SHAD_ADDR 0x0FEB
272 #define STKPTR_ADDR 0x0FED
273 #define TOS_ADDR 0x0FEE
274 #define TOSL_ADDR 0x0FEE
275 #define TOSH_ADDR 0x0FEF
276
277 #endif // #ifndef NO_ADDR_DEFINES
278
279 //==============================================================================
280 //
281 // Register Definitions
282 //
283 //==============================================================================
284
285 extern __at(0x0000) __sfr INDF0;
286 extern __at(0x0001) __sfr INDF1;
287 extern __at(0x0002) __sfr PCL;
288
289 //==============================================================================
290 // STATUS Bits
291
292 extern __at(0x0003) __sfr STATUS;
293
294 typedef struct
295 {
296 unsigned C : 1;
297 unsigned DC : 1;
298 unsigned Z : 1;
299 unsigned NOT_PD : 1;
300 unsigned NOT_TO : 1;
301 unsigned : 1;
302 unsigned : 1;
303 unsigned : 1;
304 } __STATUSbits_t;
305
306 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
307
308 #define _C 0x01
309 #define _DC 0x02
310 #define _Z 0x04
311 #define _NOT_PD 0x08
312 #define _NOT_TO 0x10
313
314 //==============================================================================
315
316 extern __at(0x0004) __sfr FSR0;
317 extern __at(0x0004) __sfr FSR0L;
318 extern __at(0x0005) __sfr FSR0H;
319 extern __at(0x0006) __sfr FSR1;
320 extern __at(0x0006) __sfr FSR1L;
321 extern __at(0x0007) __sfr FSR1H;
322
323 //==============================================================================
324 // BSR Bits
325
326 extern __at(0x0008) __sfr BSR;
327
328 typedef union
329 {
330 struct
331 {
332 unsigned BSR0 : 1;
333 unsigned BSR1 : 1;
334 unsigned BSR2 : 1;
335 unsigned BSR3 : 1;
336 unsigned BSR4 : 1;
337 unsigned : 1;
338 unsigned : 1;
339 unsigned : 1;
340 };
341
342 struct
343 {
344 unsigned BSR : 5;
345 unsigned : 3;
346 };
347 } __BSRbits_t;
348
349 extern __at(0x0008) volatile __BSRbits_t BSRbits;
350
351 #define _BSR0 0x01
352 #define _BSR1 0x02
353 #define _BSR2 0x04
354 #define _BSR3 0x08
355 #define _BSR4 0x10
356
357 //==============================================================================
358
359 extern __at(0x0009) __sfr WREG;
360 extern __at(0x000A) __sfr PCLATH;
361
362 //==============================================================================
363 // INTCON Bits
364
365 extern __at(0x000B) __sfr INTCON;
366
367 typedef union
368 {
369 struct
370 {
371 unsigned IOCIF : 1;
372 unsigned INTF : 1;
373 unsigned TMR0IF : 1;
374 unsigned IOCIE : 1;
375 unsigned INTE : 1;
376 unsigned TMR0IE : 1;
377 unsigned PEIE : 1;
378 unsigned GIE : 1;
379 };
380
381 struct
382 {
383 unsigned : 1;
384 unsigned : 1;
385 unsigned T0IF : 1;
386 unsigned : 1;
387 unsigned : 1;
388 unsigned T0IE : 1;
389 unsigned : 1;
390 unsigned : 1;
391 };
392 } __INTCONbits_t;
393
394 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
395
396 #define _IOCIF 0x01
397 #define _INTF 0x02
398 #define _TMR0IF 0x04
399 #define _T0IF 0x04
400 #define _IOCIE 0x08
401 #define _INTE 0x10
402 #define _TMR0IE 0x20
403 #define _T0IE 0x20
404 #define _PEIE 0x40
405 #define _GIE 0x80
406
407 //==============================================================================
408
409
410 //==============================================================================
411 // PORTA Bits
412
413 extern __at(0x000C) __sfr PORTA;
414
415 typedef union
416 {
417 struct
418 {
419 unsigned RA0 : 1;
420 unsigned RA1 : 1;
421 unsigned RA2 : 1;
422 unsigned RA3 : 1;
423 unsigned RA4 : 1;
424 unsigned RA5 : 1;
425 unsigned : 1;
426 unsigned : 1;
427 };
428
429 struct
430 {
431 unsigned RA : 6;
432 unsigned : 2;
433 };
434 } __PORTAbits_t;
435
436 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
437
438 #define _RA0 0x01
439 #define _RA1 0x02
440 #define _RA2 0x04
441 #define _RA3 0x08
442 #define _RA4 0x10
443 #define _RA5 0x20
444
445 //==============================================================================
446
447
448 //==============================================================================
449 // PORTB Bits
450
451 extern __at(0x000D) __sfr PORTB;
452
453 typedef struct
454 {
455 unsigned : 1;
456 unsigned : 1;
457 unsigned : 1;
458 unsigned : 1;
459 unsigned RB4 : 1;
460 unsigned RB5 : 1;
461 unsigned RB6 : 1;
462 unsigned RB7 : 1;
463 } __PORTBbits_t;
464
465 extern __at(0x000D) volatile __PORTBbits_t PORTBbits;
466
467 #define _RB4 0x10
468 #define _RB5 0x20
469 #define _RB6 0x40
470 #define _RB7 0x80
471
472 //==============================================================================
473
474
475 //==============================================================================
476 // PORTC Bits
477
478 extern __at(0x000E) __sfr PORTC;
479
480 typedef struct
481 {
482 unsigned RC0 : 1;
483 unsigned RC1 : 1;
484 unsigned RC2 : 1;
485 unsigned RC3 : 1;
486 unsigned RC4 : 1;
487 unsigned RC5 : 1;
488 unsigned RC6 : 1;
489 unsigned RC7 : 1;
490 } __PORTCbits_t;
491
492 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
493
494 #define _RC0 0x01
495 #define _RC1 0x02
496 #define _RC2 0x04
497 #define _RC3 0x08
498 #define _RC4 0x10
499 #define _RC5 0x20
500 #define _RC6 0x40
501 #define _RC7 0x80
502
503 //==============================================================================
504
505
506 //==============================================================================
507 // PIR1 Bits
508
509 extern __at(0x0011) __sfr PIR1;
510
511 typedef struct
512 {
513 unsigned TMR1IF : 1;
514 unsigned TMR2IF : 1;
515 unsigned : 1;
516 unsigned : 1;
517 unsigned TXIF : 1;
518 unsigned RCIF : 1;
519 unsigned ADIF : 1;
520 unsigned TMR1GIF : 1;
521 } __PIR1bits_t;
522
523 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
524
525 #define _TMR1IF 0x01
526 #define _TMR2IF 0x02
527 #define _TXIF 0x10
528 #define _RCIF 0x20
529 #define _ADIF 0x40
530 #define _TMR1GIF 0x80
531
532 //==============================================================================
533
534
535 //==============================================================================
536 // PIR2 Bits
537
538 extern __at(0x0012) __sfr PIR2;
539
540 typedef struct
541 {
542 unsigned : 1;
543 unsigned : 1;
544 unsigned : 1;
545 unsigned : 1;
546 unsigned : 1;
547 unsigned C1IF : 1;
548 unsigned C2IF : 1;
549 unsigned : 1;
550 } __PIR2bits_t;
551
552 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
553
554 #define _C1IF 0x20
555 #define _C2IF 0x40
556
557 //==============================================================================
558
559
560 //==============================================================================
561 // PIR3 Bits
562
563 extern __at(0x0013) __sfr PIR3;
564
565 typedef struct
566 {
567 unsigned : 1;
568 unsigned : 1;
569 unsigned : 1;
570 unsigned : 1;
571 unsigned PWM1IF : 1;
572 unsigned PWM2IF : 1;
573 unsigned PWM3IF : 1;
574 unsigned PWM4IF : 1;
575 } __PIR3bits_t;
576
577 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
578
579 #define _PWM1IF 0x10
580 #define _PWM2IF 0x20
581 #define _PWM3IF 0x40
582 #define _PWM4IF 0x80
583
584 //==============================================================================
585
586 extern __at(0x0015) __sfr TMR0;
587 extern __at(0x0016) __sfr TMR1;
588 extern __at(0x0016) __sfr TMR1L;
589 extern __at(0x0017) __sfr TMR1H;
590
591 //==============================================================================
592 // T1CON Bits
593
594 extern __at(0x0018) __sfr T1CON;
595
596 typedef union
597 {
598 struct
599 {
600 unsigned TMR1ON : 1;
601 unsigned : 1;
602 unsigned NOT_T1SYNC : 1;
603 unsigned T1OSCEN : 1;
604 unsigned T1CKPS0 : 1;
605 unsigned T1CKPS1 : 1;
606 unsigned TMR1CS0 : 1;
607 unsigned TMR1CS1 : 1;
608 };
609
610 struct
611 {
612 unsigned : 4;
613 unsigned T1CKPS : 2;
614 unsigned : 2;
615 };
616
617 struct
618 {
619 unsigned : 6;
620 unsigned TMR1CS : 2;
621 };
622 } __T1CONbits_t;
623
624 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
625
626 #define _TMR1ON 0x01
627 #define _NOT_T1SYNC 0x04
628 #define _T1OSCEN 0x08
629 #define _T1CKPS0 0x10
630 #define _T1CKPS1 0x20
631 #define _TMR1CS0 0x40
632 #define _TMR1CS1 0x80
633
634 //==============================================================================
635
636
637 //==============================================================================
638 // T1GCON Bits
639
640 extern __at(0x0019) __sfr T1GCON;
641
642 typedef union
643 {
644 struct
645 {
646 unsigned T1GSS0 : 1;
647 unsigned T1GSS1 : 1;
648 unsigned T1GVAL : 1;
649 unsigned T1GGO_NOT_DONE : 1;
650 unsigned T1GSPM : 1;
651 unsigned T1GTM : 1;
652 unsigned T1GPOL : 1;
653 unsigned TMR1GE : 1;
654 };
655
656 struct
657 {
658 unsigned : 1;
659 unsigned : 1;
660 unsigned : 1;
661 unsigned T1GGO : 1;
662 unsigned : 1;
663 unsigned : 1;
664 unsigned : 1;
665 unsigned : 1;
666 };
667
668 struct
669 {
670 unsigned T1GSS : 2;
671 unsigned : 6;
672 };
673 } __T1GCONbits_t;
674
675 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
676
677 #define _T1GSS0 0x01
678 #define _T1GSS1 0x02
679 #define _T1GVAL 0x04
680 #define _T1GGO_NOT_DONE 0x08
681 #define _T1GGO 0x08
682 #define _T1GSPM 0x10
683 #define _T1GTM 0x20
684 #define _T1GPOL 0x40
685 #define _TMR1GE 0x80
686
687 //==============================================================================
688
689 extern __at(0x001A) __sfr TMR2;
690 extern __at(0x001B) __sfr PR2;
691
692 //==============================================================================
693 // T2CON Bits
694
695 extern __at(0x001C) __sfr T2CON;
696
697 typedef union
698 {
699 struct
700 {
701 unsigned T2CKPS0 : 1;
702 unsigned T2CKPS1 : 1;
703 unsigned TMR2ON : 1;
704 unsigned T2OUTPS0 : 1;
705 unsigned T2OUTPS1 : 1;
706 unsigned T2OUTPS2 : 1;
707 unsigned T2OUTPS3 : 1;
708 unsigned : 1;
709 };
710
711 struct
712 {
713 unsigned T2CKPS : 2;
714 unsigned : 6;
715 };
716
717 struct
718 {
719 unsigned : 3;
720 unsigned T2OUTPS : 4;
721 unsigned : 1;
722 };
723 } __T2CONbits_t;
724
725 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
726
727 #define _T2CKPS0 0x01
728 #define _T2CKPS1 0x02
729 #define _TMR2ON 0x04
730 #define _T2OUTPS0 0x08
731 #define _T2OUTPS1 0x10
732 #define _T2OUTPS2 0x20
733 #define _T2OUTPS3 0x40
734
735 //==============================================================================
736
737
738 //==============================================================================
739 // TRISA Bits
740
741 extern __at(0x008C) __sfr TRISA;
742
743 typedef union
744 {
745 struct
746 {
747 unsigned TRISA0 : 1;
748 unsigned TRISA1 : 1;
749 unsigned TRISA2 : 1;
750 unsigned TRISA3 : 1;
751 unsigned TRISA4 : 1;
752 unsigned TRISA5 : 1;
753 unsigned : 1;
754 unsigned : 1;
755 };
756
757 struct
758 {
759 unsigned TRISA : 6;
760 unsigned : 2;
761 };
762 } __TRISAbits_t;
763
764 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
765
766 #define _TRISA0 0x01
767 #define _TRISA1 0x02
768 #define _TRISA2 0x04
769 #define _TRISA3 0x08
770 #define _TRISA4 0x10
771 #define _TRISA5 0x20
772
773 //==============================================================================
774
775
776 //==============================================================================
777 // TRISB Bits
778
779 extern __at(0x008D) __sfr TRISB;
780
781 typedef struct
782 {
783 unsigned : 1;
784 unsigned : 1;
785 unsigned : 1;
786 unsigned : 1;
787 unsigned TRISB3 : 1;
788 unsigned TRISB5 : 1;
789 unsigned TRISB6 : 1;
790 unsigned TRISB7 : 1;
791 } __TRISBbits_t;
792
793 extern __at(0x008D) volatile __TRISBbits_t TRISBbits;
794
795 #define _TRISB3 0x10
796 #define _TRISB5 0x20
797 #define _TRISB6 0x40
798 #define _TRISB7 0x80
799
800 //==============================================================================
801
802
803 //==============================================================================
804 // TRISC Bits
805
806 extern __at(0x008E) __sfr TRISC;
807
808 typedef struct
809 {
810 unsigned TRISC0 : 1;
811 unsigned TRISC1 : 1;
812 unsigned TRISC2 : 1;
813 unsigned TRISC3 : 1;
814 unsigned TRISC4 : 1;
815 unsigned TRISC5 : 1;
816 unsigned TRISC6 : 1;
817 unsigned TRISC7 : 1;
818 } __TRISCbits_t;
819
820 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
821
822 #define _TRISC0 0x01
823 #define _TRISC1 0x02
824 #define _TRISC2 0x04
825 #define _TRISC3 0x08
826 #define _TRISC4 0x10
827 #define _TRISC5 0x20
828 #define _TRISC6 0x40
829 #define _TRISC7 0x80
830
831 //==============================================================================
832
833
834 //==============================================================================
835 // PIE1 Bits
836
837 extern __at(0x0091) __sfr PIE1;
838
839 typedef struct
840 {
841 unsigned TMR1IE : 1;
842 unsigned TMR2IE : 1;
843 unsigned : 1;
844 unsigned : 1;
845 unsigned TXIE : 1;
846 unsigned RCIE : 1;
847 unsigned ADIE : 1;
848 unsigned TMR1GIE : 1;
849 } __PIE1bits_t;
850
851 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
852
853 #define _TMR1IE 0x01
854 #define _TMR2IE 0x02
855 #define _TXIE 0x10
856 #define _RCIE 0x20
857 #define _ADIE 0x40
858 #define _TMR1GIE 0x80
859
860 //==============================================================================
861
862
863 //==============================================================================
864 // PIE2 Bits
865
866 extern __at(0x0092) __sfr PIE2;
867
868 typedef struct
869 {
870 unsigned : 1;
871 unsigned : 1;
872 unsigned : 1;
873 unsigned : 1;
874 unsigned : 1;
875 unsigned C1IE : 1;
876 unsigned C2IE : 1;
877 unsigned : 1;
878 } __PIE2bits_t;
879
880 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
881
882 #define _C1IE 0x20
883 #define _C2IE 0x40
884
885 //==============================================================================
886
887
888 //==============================================================================
889 // PIE3 Bits
890
891 extern __at(0x0093) __sfr PIE3;
892
893 typedef struct
894 {
895 unsigned : 1;
896 unsigned : 1;
897 unsigned : 1;
898 unsigned : 1;
899 unsigned PWM1IE : 1;
900 unsigned PWM2IE : 1;
901 unsigned PWM3IE : 1;
902 unsigned PWM4IE : 1;
903 } __PIE3bits_t;
904
905 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
906
907 #define _PWM1IE 0x10
908 #define _PWM2IE 0x20
909 #define _PWM3IE 0x40
910 #define _PWM4IE 0x80
911
912 //==============================================================================
913
914
915 //==============================================================================
916 // OPTION_REG Bits
917
918 extern __at(0x0095) __sfr OPTION_REG;
919
920 typedef union
921 {
922 struct
923 {
924 unsigned PS0 : 1;
925 unsigned PS1 : 1;
926 unsigned PS2 : 1;
927 unsigned PSA : 1;
928 unsigned TMR0SE : 1;
929 unsigned TMR0CS : 1;
930 unsigned INTEDG : 1;
931 unsigned NOT_WPUEN : 1;
932 };
933
934 struct
935 {
936 unsigned : 1;
937 unsigned : 1;
938 unsigned : 1;
939 unsigned : 1;
940 unsigned T0SE : 1;
941 unsigned T0CS : 1;
942 unsigned : 1;
943 unsigned : 1;
944 };
945
946 struct
947 {
948 unsigned PS : 3;
949 unsigned : 5;
950 };
951 } __OPTION_REGbits_t;
952
953 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
954
955 #define _PS0 0x01
956 #define _PS1 0x02
957 #define _PS2 0x04
958 #define _PSA 0x08
959 #define _TMR0SE 0x10
960 #define _T0SE 0x10
961 #define _TMR0CS 0x20
962 #define _T0CS 0x20
963 #define _INTEDG 0x40
964 #define _NOT_WPUEN 0x80
965
966 //==============================================================================
967
968
969 //==============================================================================
970 // PCON Bits
971
972 extern __at(0x0096) __sfr PCON;
973
974 typedef struct
975 {
976 unsigned NOT_BOR : 1;
977 unsigned NOT_POR : 1;
978 unsigned NOT_RI : 1;
979 unsigned NOT_RMCLR : 1;
980 unsigned NOT_RWDT : 1;
981 unsigned : 1;
982 unsigned STKUNF : 1;
983 unsigned STKOVF : 1;
984 } __PCONbits_t;
985
986 extern __at(0x0096) volatile __PCONbits_t PCONbits;
987
988 #define _NOT_BOR 0x01
989 #define _NOT_POR 0x02
990 #define _NOT_RI 0x04
991 #define _NOT_RMCLR 0x08
992 #define _NOT_RWDT 0x10
993 #define _STKUNF 0x40
994 #define _STKOVF 0x80
995
996 //==============================================================================
997
998
999 //==============================================================================
1000 // WDTCON Bits
1001
1002 extern __at(0x0097) __sfr WDTCON;
1003
1004 typedef union
1005 {
1006 struct
1007 {
1008 unsigned SWDTEN : 1;
1009 unsigned WDTPS0 : 1;
1010 unsigned WDTPS1 : 1;
1011 unsigned WDTPS2 : 1;
1012 unsigned WDTPS3 : 1;
1013 unsigned WDTPS4 : 1;
1014 unsigned : 1;
1015 unsigned : 1;
1016 };
1017
1018 struct
1019 {
1020 unsigned : 1;
1021 unsigned WDTPS : 5;
1022 unsigned : 2;
1023 };
1024 } __WDTCONbits_t;
1025
1026 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
1027
1028 #define _SWDTEN 0x01
1029 #define _WDTPS0 0x02
1030 #define _WDTPS1 0x04
1031 #define _WDTPS2 0x08
1032 #define _WDTPS3 0x10
1033 #define _WDTPS4 0x20
1034
1035 //==============================================================================
1036
1037
1038 //==============================================================================
1039 // OSCTUNE Bits
1040
1041 extern __at(0x0098) __sfr OSCTUNE;
1042
1043 typedef union
1044 {
1045 struct
1046 {
1047 unsigned TUN0 : 1;
1048 unsigned TUN1 : 1;
1049 unsigned TUN2 : 1;
1050 unsigned TUN3 : 1;
1051 unsigned TUN4 : 1;
1052 unsigned TUN5 : 1;
1053 unsigned : 1;
1054 unsigned : 1;
1055 };
1056
1057 struct
1058 {
1059 unsigned TUN : 6;
1060 unsigned : 2;
1061 };
1062 } __OSCTUNEbits_t;
1063
1064 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
1065
1066 #define _TUN0 0x01
1067 #define _TUN1 0x02
1068 #define _TUN2 0x04
1069 #define _TUN3 0x08
1070 #define _TUN4 0x10
1071 #define _TUN5 0x20
1072
1073 //==============================================================================
1074
1075
1076 //==============================================================================
1077 // OSCCON Bits
1078
1079 extern __at(0x0099) __sfr OSCCON;
1080
1081 typedef union
1082 {
1083 struct
1084 {
1085 unsigned SCS0 : 1;
1086 unsigned SCS1 : 1;
1087 unsigned : 1;
1088 unsigned IRCF0 : 1;
1089 unsigned IRCF1 : 1;
1090 unsigned IRCF2 : 1;
1091 unsigned IRCF3 : 1;
1092 unsigned SPLLEN : 1;
1093 };
1094
1095 struct
1096 {
1097 unsigned SCS : 2;
1098 unsigned : 6;
1099 };
1100
1101 struct
1102 {
1103 unsigned : 3;
1104 unsigned IRCF : 4;
1105 unsigned : 1;
1106 };
1107 } __OSCCONbits_t;
1108
1109 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
1110
1111 #define _SCS0 0x01
1112 #define _SCS1 0x02
1113 #define _IRCF0 0x08
1114 #define _IRCF1 0x10
1115 #define _IRCF2 0x20
1116 #define _IRCF3 0x40
1117 #define _SPLLEN 0x80
1118
1119 //==============================================================================
1120
1121
1122 //==============================================================================
1123 // OSCSTAT Bits
1124
1125 extern __at(0x009A) __sfr OSCSTAT;
1126
1127 typedef struct
1128 {
1129 unsigned HFIOFS : 1;
1130 unsigned LFIOFR : 1;
1131 unsigned MFIOFR : 1;
1132 unsigned HFIOFL : 1;
1133 unsigned HFIOFR : 1;
1134 unsigned OSTS : 1;
1135 unsigned PLLR : 1;
1136 unsigned : 1;
1137 } __OSCSTATbits_t;
1138
1139 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
1140
1141 #define _HFIOFS 0x01
1142 #define _LFIOFR 0x02
1143 #define _MFIOFR 0x04
1144 #define _HFIOFL 0x08
1145 #define _HFIOFR 0x10
1146 #define _OSTS 0x20
1147 #define _PLLR 0x40
1148
1149 //==============================================================================
1150
1151 extern __at(0x009B) __sfr ADRES;
1152 extern __at(0x009B) __sfr ADRESL;
1153 extern __at(0x009C) __sfr ADRESH;
1154
1155 //==============================================================================
1156 // ADCON0 Bits
1157
1158 extern __at(0x009D) __sfr ADCON0;
1159
1160 typedef union
1161 {
1162 struct
1163 {
1164 unsigned ADON : 1;
1165 unsigned GO_NOT_DONE : 1;
1166 unsigned CHS0 : 1;
1167 unsigned CHS1 : 1;
1168 unsigned CHS2 : 1;
1169 unsigned CHS3 : 1;
1170 unsigned CHS4 : 1;
1171 unsigned : 1;
1172 };
1173
1174 struct
1175 {
1176 unsigned : 1;
1177 unsigned ADGO : 1;
1178 unsigned : 1;
1179 unsigned : 1;
1180 unsigned : 1;
1181 unsigned : 1;
1182 unsigned : 1;
1183 unsigned : 1;
1184 };
1185
1186 struct
1187 {
1188 unsigned : 1;
1189 unsigned GO : 1;
1190 unsigned : 1;
1191 unsigned : 1;
1192 unsigned : 1;
1193 unsigned : 1;
1194 unsigned : 1;
1195 unsigned : 1;
1196 };
1197
1198 struct
1199 {
1200 unsigned : 1;
1201 unsigned NOT_DONE : 1;
1202 unsigned : 1;
1203 unsigned : 1;
1204 unsigned : 1;
1205 unsigned : 1;
1206 unsigned : 1;
1207 unsigned : 1;
1208 };
1209
1210 struct
1211 {
1212 unsigned : 2;
1213 unsigned CHS : 5;
1214 unsigned : 1;
1215 };
1216 } __ADCON0bits_t;
1217
1218 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1219
1220 #define _ADON 0x01
1221 #define _GO_NOT_DONE 0x02
1222 #define _ADGO 0x02
1223 #define _GO 0x02
1224 #define _NOT_DONE 0x02
1225 #define _CHS0 0x04
1226 #define _CHS1 0x08
1227 #define _CHS2 0x10
1228 #define _CHS3 0x20
1229 #define _CHS4 0x40
1230
1231 //==============================================================================
1232
1233
1234 //==============================================================================
1235 // ADCON1 Bits
1236
1237 extern __at(0x009E) __sfr ADCON1;
1238
1239 typedef union
1240 {
1241 struct
1242 {
1243 unsigned ADPREF0 : 1;
1244 unsigned ADPREF1 : 1;
1245 unsigned : 1;
1246 unsigned : 1;
1247 unsigned ADCS0 : 1;
1248 unsigned ADCS1 : 1;
1249 unsigned ADCS2 : 1;
1250 unsigned ADFM : 1;
1251 };
1252
1253 struct
1254 {
1255 unsigned ADPREF : 2;
1256 unsigned : 6;
1257 };
1258
1259 struct
1260 {
1261 unsigned : 4;
1262 unsigned ADCS : 3;
1263 unsigned : 1;
1264 };
1265 } __ADCON1bits_t;
1266
1267 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1268
1269 #define _ADPREF0 0x01
1270 #define _ADPREF1 0x02
1271 #define _ADCS0 0x10
1272 #define _ADCS1 0x20
1273 #define _ADCS2 0x40
1274 #define _ADFM 0x80
1275
1276 //==============================================================================
1277
1278
1279 //==============================================================================
1280 // ADCON2 Bits
1281
1282 extern __at(0x009F) __sfr ADCON2;
1283
1284 typedef union
1285 {
1286 struct
1287 {
1288 unsigned : 1;
1289 unsigned : 1;
1290 unsigned : 1;
1291 unsigned : 1;
1292 unsigned TRIGSEL0 : 1;
1293 unsigned TRIGSEL1 : 1;
1294 unsigned TRIGSEL2 : 1;
1295 unsigned TRIGSEL3 : 1;
1296 };
1297
1298 struct
1299 {
1300 unsigned : 4;
1301 unsigned TRIGSEL : 4;
1302 };
1303 } __ADCON2bits_t;
1304
1305 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1306
1307 #define _TRIGSEL0 0x10
1308 #define _TRIGSEL1 0x20
1309 #define _TRIGSEL2 0x40
1310 #define _TRIGSEL3 0x80
1311
1312 //==============================================================================
1313
1314
1315 //==============================================================================
1316 // LATA Bits
1317
1318 extern __at(0x010C) __sfr LATA;
1319
1320 typedef struct
1321 {
1322 unsigned LATA0 : 1;
1323 unsigned LATA1 : 1;
1324 unsigned LATA2 : 1;
1325 unsigned : 1;
1326 unsigned LATA4 : 1;
1327 unsigned LATA5 : 1;
1328 unsigned : 1;
1329 unsigned : 1;
1330 } __LATAbits_t;
1331
1332 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1333
1334 #define _LATA0 0x01
1335 #define _LATA1 0x02
1336 #define _LATA2 0x04
1337 #define _LATA4 0x10
1338 #define _LATA5 0x20
1339
1340 //==============================================================================
1341
1342
1343 //==============================================================================
1344 // LATB Bits
1345
1346 extern __at(0x010D) __sfr LATB;
1347
1348 typedef struct
1349 {
1350 unsigned : 1;
1351 unsigned : 1;
1352 unsigned : 1;
1353 unsigned : 1;
1354 unsigned LATB4 : 1;
1355 unsigned LATB5 : 1;
1356 unsigned LATB6 : 1;
1357 unsigned LATB7 : 1;
1358 } __LATBbits_t;
1359
1360 extern __at(0x010D) volatile __LATBbits_t LATBbits;
1361
1362 #define _LATB4 0x10
1363 #define _LATB5 0x20
1364 #define _LATB6 0x40
1365 #define _LATB7 0x80
1366
1367 //==============================================================================
1368
1369
1370 //==============================================================================
1371 // LATC Bits
1372
1373 extern __at(0x010E) __sfr LATC;
1374
1375 typedef struct
1376 {
1377 unsigned LATC0 : 1;
1378 unsigned LATC1 : 1;
1379 unsigned LATC2 : 1;
1380 unsigned LATC3 : 1;
1381 unsigned LATC4 : 1;
1382 unsigned LATC5 : 1;
1383 unsigned LATC6 : 1;
1384 unsigned LATC7 : 1;
1385 } __LATCbits_t;
1386
1387 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1388
1389 #define _LATC0 0x01
1390 #define _LATC1 0x02
1391 #define _LATC2 0x04
1392 #define _LATC3 0x08
1393 #define _LATC4 0x10
1394 #define _LATC5 0x20
1395 #define _LATC6 0x40
1396 #define _LATC7 0x80
1397
1398 //==============================================================================
1399
1400
1401 //==============================================================================
1402 // CM1CON0 Bits
1403
1404 extern __at(0x0111) __sfr CM1CON0;
1405
1406 typedef struct
1407 {
1408 unsigned C1SYNC : 1;
1409 unsigned C1HYS : 1;
1410 unsigned C1SP : 1;
1411 unsigned : 1;
1412 unsigned C1POL : 1;
1413 unsigned C1OE : 1;
1414 unsigned C1OUT : 1;
1415 unsigned C1ON : 1;
1416 } __CM1CON0bits_t;
1417
1418 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1419
1420 #define _C1SYNC 0x01
1421 #define _C1HYS 0x02
1422 #define _C1SP 0x04
1423 #define _C1POL 0x10
1424 #define _C1OE 0x20
1425 #define _C1OUT 0x40
1426 #define _C1ON 0x80
1427
1428 //==============================================================================
1429
1430
1431 //==============================================================================
1432 // CM1CON1 Bits
1433
1434 extern __at(0x0112) __sfr CM1CON1;
1435
1436 typedef union
1437 {
1438 struct
1439 {
1440 unsigned C1NCH0 : 1;
1441 unsigned C1NCH1 : 1;
1442 unsigned C1NCH2 : 1;
1443 unsigned : 1;
1444 unsigned C1PCH0 : 1;
1445 unsigned C1PCH1 : 1;
1446 unsigned C1INTN : 1;
1447 unsigned C1INTP : 1;
1448 };
1449
1450 struct
1451 {
1452 unsigned C1NCH : 3;
1453 unsigned : 5;
1454 };
1455
1456 struct
1457 {
1458 unsigned : 4;
1459 unsigned C1PCH : 2;
1460 unsigned : 2;
1461 };
1462 } __CM1CON1bits_t;
1463
1464 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1465
1466 #define _C1NCH0 0x01
1467 #define _C1NCH1 0x02
1468 #define _C1NCH2 0x04
1469 #define _C1PCH0 0x10
1470 #define _C1PCH1 0x20
1471 #define _C1INTN 0x40
1472 #define _C1INTP 0x80
1473
1474 //==============================================================================
1475
1476
1477 //==============================================================================
1478 // CM2CON0 Bits
1479
1480 extern __at(0x0113) __sfr CM2CON0;
1481
1482 typedef struct
1483 {
1484 unsigned C2SYNC : 1;
1485 unsigned C2HYS : 1;
1486 unsigned C2SP : 1;
1487 unsigned : 1;
1488 unsigned C2POL : 1;
1489 unsigned C2OE : 1;
1490 unsigned C2OUT : 1;
1491 unsigned C2ON : 1;
1492 } __CM2CON0bits_t;
1493
1494 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1495
1496 #define _C2SYNC 0x01
1497 #define _C2HYS 0x02
1498 #define _C2SP 0x04
1499 #define _C2POL 0x10
1500 #define _C2OE 0x20
1501 #define _C2OUT 0x40
1502 #define _C2ON 0x80
1503
1504 //==============================================================================
1505
1506
1507 //==============================================================================
1508 // CM2CON1 Bits
1509
1510 extern __at(0x0114) __sfr CM2CON1;
1511
1512 typedef union
1513 {
1514 struct
1515 {
1516 unsigned C2NCH0 : 1;
1517 unsigned C2NCH1 : 1;
1518 unsigned C2NCH2 : 1;
1519 unsigned : 1;
1520 unsigned C2PCH0 : 1;
1521 unsigned C2PCH1 : 1;
1522 unsigned C2INTN : 1;
1523 unsigned C2INTP : 1;
1524 };
1525
1526 struct
1527 {
1528 unsigned C2NCH : 3;
1529 unsigned : 5;
1530 };
1531
1532 struct
1533 {
1534 unsigned : 4;
1535 unsigned C2PCH : 2;
1536 unsigned : 2;
1537 };
1538 } __CM2CON1bits_t;
1539
1540 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1541
1542 #define _C2NCH0 0x01
1543 #define _C2NCH1 0x02
1544 #define _C2NCH2 0x04
1545 #define _C2PCH0 0x10
1546 #define _C2PCH1 0x20
1547 #define _C2INTN 0x40
1548 #define _C2INTP 0x80
1549
1550 //==============================================================================
1551
1552
1553 //==============================================================================
1554 // CMOUT Bits
1555
1556 extern __at(0x0115) __sfr CMOUT;
1557
1558 typedef struct
1559 {
1560 unsigned MC1OUT : 1;
1561 unsigned MC2OUT : 1;
1562 unsigned : 1;
1563 unsigned : 1;
1564 unsigned : 1;
1565 unsigned : 1;
1566 unsigned : 1;
1567 unsigned : 1;
1568 } __CMOUTbits_t;
1569
1570 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1571
1572 #define _MC1OUT 0x01
1573 #define _MC2OUT 0x02
1574
1575 //==============================================================================
1576
1577
1578 //==============================================================================
1579 // BORCON Bits
1580
1581 extern __at(0x0116) __sfr BORCON;
1582
1583 typedef struct
1584 {
1585 unsigned BORRDY : 1;
1586 unsigned : 1;
1587 unsigned : 1;
1588 unsigned : 1;
1589 unsigned : 1;
1590 unsigned : 1;
1591 unsigned BORFS : 1;
1592 unsigned SBOREN : 1;
1593 } __BORCONbits_t;
1594
1595 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1596
1597 #define _BORRDY 0x01
1598 #define _BORFS 0x40
1599 #define _SBOREN 0x80
1600
1601 //==============================================================================
1602
1603
1604 //==============================================================================
1605 // FVRCON Bits
1606
1607 extern __at(0x0117) __sfr FVRCON;
1608
1609 typedef union
1610 {
1611 struct
1612 {
1613 unsigned ADFVR0 : 1;
1614 unsigned ADFVR1 : 1;
1615 unsigned CDAFVR0 : 1;
1616 unsigned CDAFVR1 : 1;
1617 unsigned TSRNG : 1;
1618 unsigned TSEN : 1;
1619 unsigned FVRRDY : 1;
1620 unsigned FVREN : 1;
1621 };
1622
1623 struct
1624 {
1625 unsigned ADFVR : 2;
1626 unsigned : 6;
1627 };
1628
1629 struct
1630 {
1631 unsigned : 2;
1632 unsigned CDAFVR : 2;
1633 unsigned : 4;
1634 };
1635 } __FVRCONbits_t;
1636
1637 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1638
1639 #define _ADFVR0 0x01
1640 #define _ADFVR1 0x02
1641 #define _CDAFVR0 0x04
1642 #define _CDAFVR1 0x08
1643 #define _TSRNG 0x10
1644 #define _TSEN 0x20
1645 #define _FVRRDY 0x40
1646 #define _FVREN 0x80
1647
1648 //==============================================================================
1649
1650
1651 //==============================================================================
1652 // DACCON0 Bits
1653
1654 extern __at(0x0118) __sfr DACCON0;
1655
1656 typedef union
1657 {
1658 struct
1659 {
1660 unsigned : 1;
1661 unsigned : 1;
1662 unsigned DACPSS0 : 1;
1663 unsigned DACPSS1 : 1;
1664 unsigned : 1;
1665 unsigned DACOE : 1;
1666 unsigned DACLPS : 1;
1667 unsigned DACEN : 1;
1668 };
1669
1670 struct
1671 {
1672 unsigned : 2;
1673 unsigned DACPSS : 2;
1674 unsigned : 4;
1675 };
1676 } __DACCON0bits_t;
1677
1678 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1679
1680 #define _DACPSS0 0x04
1681 #define _DACPSS1 0x08
1682 #define _DACOE 0x20
1683 #define _DACLPS 0x40
1684 #define _DACEN 0x80
1685
1686 //==============================================================================
1687
1688
1689 //==============================================================================
1690 // DACCON1 Bits
1691
1692 extern __at(0x0119) __sfr DACCON1;
1693
1694 typedef union
1695 {
1696 struct
1697 {
1698 unsigned DACR0 : 1;
1699 unsigned DACR1 : 1;
1700 unsigned DACR2 : 1;
1701 unsigned DACR3 : 1;
1702 unsigned DACR4 : 1;
1703 unsigned : 1;
1704 unsigned : 1;
1705 unsigned : 1;
1706 };
1707
1708 struct
1709 {
1710 unsigned DACR : 5;
1711 unsigned : 3;
1712 };
1713 } __DACCON1bits_t;
1714
1715 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1716
1717 #define _DACR0 0x01
1718 #define _DACR1 0x02
1719 #define _DACR2 0x04
1720 #define _DACR3 0x08
1721 #define _DACR4 0x10
1722
1723 //==============================================================================
1724
1725
1726 //==============================================================================
1727 // ANSELA Bits
1728
1729 extern __at(0x018C) __sfr ANSELA;
1730
1731 typedef struct
1732 {
1733 unsigned ANSA0 : 1;
1734 unsigned ANSA1 : 1;
1735 unsigned ANSA2 : 1;
1736 unsigned : 1;
1737 unsigned ANSA4 : 1;
1738 unsigned : 1;
1739 unsigned : 1;
1740 unsigned : 1;
1741 } __ANSELAbits_t;
1742
1743 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1744
1745 #define _ANSA0 0x01
1746 #define _ANSA1 0x02
1747 #define _ANSA2 0x04
1748 #define _ANSA4 0x10
1749
1750 //==============================================================================
1751
1752
1753 //==============================================================================
1754 // ANSELB Bits
1755
1756 extern __at(0x018D) __sfr ANSELB;
1757
1758 typedef struct
1759 {
1760 unsigned : 1;
1761 unsigned : 1;
1762 unsigned : 1;
1763 unsigned : 1;
1764 unsigned ANSB4 : 1;
1765 unsigned ANSB5 : 1;
1766 unsigned : 1;
1767 unsigned : 1;
1768 } __ANSELBbits_t;
1769
1770 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
1771
1772 #define _ANSB4 0x10
1773 #define _ANSB5 0x20
1774
1775 //==============================================================================
1776
1777
1778 //==============================================================================
1779 // ANSELC Bits
1780
1781 extern __at(0x018E) __sfr ANSELC;
1782
1783 typedef struct
1784 {
1785 unsigned ANSC0 : 1;
1786 unsigned ANSC1 : 1;
1787 unsigned ANSC2 : 1;
1788 unsigned ANSC3 : 1;
1789 unsigned : 1;
1790 unsigned : 1;
1791 unsigned ANSC6 : 1;
1792 unsigned ANSC7 : 1;
1793 } __ANSELCbits_t;
1794
1795 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1796
1797 #define _ANSC0 0x01
1798 #define _ANSC1 0x02
1799 #define _ANSC2 0x04
1800 #define _ANSC3 0x08
1801 #define _ANSC6 0x40
1802 #define _ANSC7 0x80
1803
1804 //==============================================================================
1805
1806 extern __at(0x0191) __sfr PMADR;
1807 extern __at(0x0191) __sfr PMADRL;
1808 extern __at(0x0192) __sfr PMADRH;
1809 extern __at(0x0193) __sfr PMDAT;
1810 extern __at(0x0193) __sfr PMDATL;
1811 extern __at(0x0194) __sfr PMDATH;
1812
1813 //==============================================================================
1814 // PMCON1 Bits
1815
1816 extern __at(0x0195) __sfr PMCON1;
1817
1818 typedef struct
1819 {
1820 unsigned RD : 1;
1821 unsigned WR : 1;
1822 unsigned WREN : 1;
1823 unsigned WRERR : 1;
1824 unsigned FREE : 1;
1825 unsigned LWLO : 1;
1826 unsigned CFGS : 1;
1827 unsigned : 1;
1828 } __PMCON1bits_t;
1829
1830 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1831
1832 #define _RD 0x01
1833 #define _WR 0x02
1834 #define _WREN 0x04
1835 #define _WRERR 0x08
1836 #define _FREE 0x10
1837 #define _LWLO 0x20
1838 #define _CFGS 0x40
1839
1840 //==============================================================================
1841
1842 extern __at(0x0196) __sfr PMCON2;
1843
1844 //==============================================================================
1845 // VREGCON Bits
1846
1847 extern __at(0x0197) __sfr VREGCON;
1848
1849 typedef struct
1850 {
1851 unsigned Reserved : 1;
1852 unsigned VREGPM : 1;
1853 unsigned : 1;
1854 unsigned : 1;
1855 unsigned : 1;
1856 unsigned : 1;
1857 unsigned : 1;
1858 unsigned : 1;
1859 } __VREGCONbits_t;
1860
1861 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
1862
1863 #define _Reserved 0x01
1864 #define _VREGPM 0x02
1865
1866 //==============================================================================
1867
1868 extern __at(0x0199) __sfr RCREG;
1869 extern __at(0x019A) __sfr TXREG;
1870 extern __at(0x019B) __sfr SPBRG;
1871 extern __at(0x019B) __sfr SPBRGL;
1872 extern __at(0x019C) __sfr SPBRGH;
1873
1874 //==============================================================================
1875 // RCSTA Bits
1876
1877 extern __at(0x019D) __sfr RCSTA;
1878
1879 typedef struct
1880 {
1881 unsigned RX9D : 1;
1882 unsigned OERR : 1;
1883 unsigned FERR : 1;
1884 unsigned ADDEN : 1;
1885 unsigned CREN : 1;
1886 unsigned SREN : 1;
1887 unsigned RX9 : 1;
1888 unsigned SPEN : 1;
1889 } __RCSTAbits_t;
1890
1891 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1892
1893 #define _RX9D 0x01
1894 #define _OERR 0x02
1895 #define _FERR 0x04
1896 #define _ADDEN 0x08
1897 #define _CREN 0x10
1898 #define _SREN 0x20
1899 #define _RX9 0x40
1900 #define _SPEN 0x80
1901
1902 //==============================================================================
1903
1904
1905 //==============================================================================
1906 // TXSTA Bits
1907
1908 extern __at(0x019E) __sfr TXSTA;
1909
1910 typedef struct
1911 {
1912 unsigned TX9D : 1;
1913 unsigned TRMT : 1;
1914 unsigned BRGH : 1;
1915 unsigned SENDB : 1;
1916 unsigned SYNC : 1;
1917 unsigned TXEN : 1;
1918 unsigned TX9 : 1;
1919 unsigned CSRC : 1;
1920 } __TXSTAbits_t;
1921
1922 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1923
1924 #define _TX9D 0x01
1925 #define _TRMT 0x02
1926 #define _BRGH 0x04
1927 #define _SENDB 0x08
1928 #define _SYNC 0x10
1929 #define _TXEN 0x20
1930 #define _TX9 0x40
1931 #define _CSRC 0x80
1932
1933 //==============================================================================
1934
1935
1936 //==============================================================================
1937 // BAUDCON Bits
1938
1939 extern __at(0x019F) __sfr BAUDCON;
1940
1941 typedef struct
1942 {
1943 unsigned ABDEN : 1;
1944 unsigned WUE : 1;
1945 unsigned : 1;
1946 unsigned BRG16 : 1;
1947 unsigned SCKP : 1;
1948 unsigned : 1;
1949 unsigned RCIDL : 1;
1950 unsigned ABDOVF : 1;
1951 } __BAUDCONbits_t;
1952
1953 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1954
1955 #define _ABDEN 0x01
1956 #define _WUE 0x02
1957 #define _BRG16 0x08
1958 #define _SCKP 0x10
1959 #define _RCIDL 0x40
1960 #define _ABDOVF 0x80
1961
1962 //==============================================================================
1963
1964
1965 //==============================================================================
1966 // WPUA Bits
1967
1968 extern __at(0x020C) __sfr WPUA;
1969
1970 typedef union
1971 {
1972 struct
1973 {
1974 unsigned WPUA0 : 1;
1975 unsigned WPUA1 : 1;
1976 unsigned WPUA2 : 1;
1977 unsigned WPUA3 : 1;
1978 unsigned WPUA4 : 1;
1979 unsigned WPUA5 : 1;
1980 unsigned : 1;
1981 unsigned : 1;
1982 };
1983
1984 struct
1985 {
1986 unsigned WPUA : 6;
1987 unsigned : 2;
1988 };
1989 } __WPUAbits_t;
1990
1991 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1992
1993 #define _WPUA0 0x01
1994 #define _WPUA1 0x02
1995 #define _WPUA2 0x04
1996 #define _WPUA3 0x08
1997 #define _WPUA4 0x10
1998 #define _WPUA5 0x20
1999
2000 //==============================================================================
2001
2002
2003 //==============================================================================
2004 // WPUB Bits
2005
2006 extern __at(0x020D) __sfr WPUB;
2007
2008 typedef struct
2009 {
2010 unsigned : 1;
2011 unsigned : 1;
2012 unsigned : 1;
2013 unsigned : 1;
2014 unsigned WPUB4 : 1;
2015 unsigned WPUB5 : 1;
2016 unsigned WPUB6 : 1;
2017 unsigned WPUB7 : 1;
2018 } __WPUBbits_t;
2019
2020 extern __at(0x020D) volatile __WPUBbits_t WPUBbits;
2021
2022 #define _WPUB4 0x10
2023 #define _WPUB5 0x20
2024 #define _WPUB6 0x40
2025 #define _WPUB7 0x80
2026
2027 //==============================================================================
2028
2029
2030 //==============================================================================
2031 // WPUC Bits
2032
2033 extern __at(0x020E) __sfr WPUC;
2034
2035 typedef struct
2036 {
2037 unsigned WPUC0 : 1;
2038 unsigned WPUC1 : 1;
2039 unsigned WPUC2 : 1;
2040 unsigned WPUC3 : 1;
2041 unsigned WPUC4 : 1;
2042 unsigned WPUC5 : 1;
2043 unsigned WPUC6 : 1;
2044 unsigned WPUC7 : 1;
2045 } __WPUCbits_t;
2046
2047 extern __at(0x020E) volatile __WPUCbits_t WPUCbits;
2048
2049 #define _WPUC0 0x01
2050 #define _WPUC1 0x02
2051 #define _WPUC2 0x04
2052 #define _WPUC3 0x08
2053 #define _WPUC4 0x10
2054 #define _WPUC5 0x20
2055 #define _WPUC6 0x40
2056 #define _WPUC7 0x80
2057
2058 //==============================================================================
2059
2060
2061 //==============================================================================
2062 // ODCONA Bits
2063
2064 extern __at(0x028C) __sfr ODCONA;
2065
2066 typedef struct
2067 {
2068 unsigned ODA0 : 1;
2069 unsigned ODA1 : 1;
2070 unsigned ODA2 : 1;
2071 unsigned : 1;
2072 unsigned ODA4 : 1;
2073 unsigned ODA5 : 1;
2074 unsigned : 1;
2075 unsigned : 1;
2076 } __ODCONAbits_t;
2077
2078 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
2079
2080 #define _ODA0 0x01
2081 #define _ODA1 0x02
2082 #define _ODA2 0x04
2083 #define _ODA4 0x10
2084 #define _ODA5 0x20
2085
2086 //==============================================================================
2087
2088
2089 //==============================================================================
2090 // ODCONB Bits
2091
2092 extern __at(0x028D) __sfr ODCONB;
2093
2094 typedef struct
2095 {
2096 unsigned : 1;
2097 unsigned : 1;
2098 unsigned : 1;
2099 unsigned : 1;
2100 unsigned ODB4 : 1;
2101 unsigned ODB5 : 1;
2102 unsigned ODB6 : 1;
2103 unsigned ODB7 : 1;
2104 } __ODCONBbits_t;
2105
2106 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits;
2107
2108 #define _ODB4 0x10
2109 #define _ODB5 0x20
2110 #define _ODB6 0x40
2111 #define _ODB7 0x80
2112
2113 //==============================================================================
2114
2115
2116 //==============================================================================
2117 // ODCONC Bits
2118
2119 extern __at(0x028E) __sfr ODCONC;
2120
2121 typedef struct
2122 {
2123 unsigned ODC0 : 1;
2124 unsigned ODC1 : 1;
2125 unsigned ODC2 : 1;
2126 unsigned ODC3 : 1;
2127 unsigned ODC4 : 1;
2128 unsigned ODC5 : 1;
2129 unsigned ODC6 : 1;
2130 unsigned ODC7 : 1;
2131 } __ODCONCbits_t;
2132
2133 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits;
2134
2135 #define _ODC0 0x01
2136 #define _ODC1 0x02
2137 #define _ODC2 0x04
2138 #define _ODC3 0x08
2139 #define _ODC4 0x10
2140 #define _ODC5 0x20
2141 #define _ODC6 0x40
2142 #define _ODC7 0x80
2143
2144 //==============================================================================
2145
2146
2147 //==============================================================================
2148 // SLRCONA Bits
2149
2150 extern __at(0x030C) __sfr SLRCONA;
2151
2152 typedef struct
2153 {
2154 unsigned SLRA0 : 1;
2155 unsigned SLRA1 : 1;
2156 unsigned SLRA2 : 1;
2157 unsigned : 1;
2158 unsigned SLRA4 : 1;
2159 unsigned SLRA5 : 1;
2160 unsigned : 1;
2161 unsigned : 1;
2162 } __SLRCONAbits_t;
2163
2164 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
2165
2166 #define _SLRA0 0x01
2167 #define _SLRA1 0x02
2168 #define _SLRA2 0x04
2169 #define _SLRA4 0x10
2170 #define _SLRA5 0x20
2171
2172 //==============================================================================
2173
2174
2175 //==============================================================================
2176 // SLRCONB Bits
2177
2178 extern __at(0x030D) __sfr SLRCONB;
2179
2180 typedef struct
2181 {
2182 unsigned : 1;
2183 unsigned : 1;
2184 unsigned : 1;
2185 unsigned : 1;
2186 unsigned SLRB4 : 1;
2187 unsigned SLRB5 : 1;
2188 unsigned SLRB6 : 1;
2189 unsigned SLRB7 : 1;
2190 } __SLRCONBbits_t;
2191
2192 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits;
2193
2194 #define _SLRB4 0x10
2195 #define _SLRB5 0x20
2196 #define _SLRB6 0x40
2197 #define _SLRB7 0x80
2198
2199 //==============================================================================
2200
2201
2202 //==============================================================================
2203 // SLRCONC Bits
2204
2205 extern __at(0x030E) __sfr SLRCONC;
2206
2207 typedef struct
2208 {
2209 unsigned SLRC0 : 1;
2210 unsigned SLRC1 : 1;
2211 unsigned SLRC2 : 1;
2212 unsigned SLRC3 : 1;
2213 unsigned SLRC4 : 1;
2214 unsigned SLRC5 : 1;
2215 unsigned SLRC6 : 1;
2216 unsigned SLRC7 : 1;
2217 } __SLRCONCbits_t;
2218
2219 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits;
2220
2221 #define _SLRC0 0x01
2222 #define _SLRC1 0x02
2223 #define _SLRC2 0x04
2224 #define _SLRC3 0x08
2225 #define _SLRC4 0x10
2226 #define _SLRC5 0x20
2227 #define _SLRC6 0x40
2228 #define _SLRC7 0x80
2229
2230 //==============================================================================
2231
2232
2233 //==============================================================================
2234 // INLVLA Bits
2235
2236 extern __at(0x038C) __sfr INLVLA;
2237
2238 typedef union
2239 {
2240 struct
2241 {
2242 unsigned INLVLA0 : 1;
2243 unsigned INLVLA1 : 1;
2244 unsigned INLVLA2 : 1;
2245 unsigned INLVLA3 : 1;
2246 unsigned INLVLA4 : 1;
2247 unsigned INLVLA5 : 1;
2248 unsigned : 1;
2249 unsigned : 1;
2250 };
2251
2252 struct
2253 {
2254 unsigned INLVLA : 6;
2255 unsigned : 2;
2256 };
2257 } __INLVLAbits_t;
2258
2259 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
2260
2261 #define _INLVLA0 0x01
2262 #define _INLVLA1 0x02
2263 #define _INLVLA2 0x04
2264 #define _INLVLA3 0x08
2265 #define _INLVLA4 0x10
2266 #define _INLVLA5 0x20
2267
2268 //==============================================================================
2269
2270
2271 //==============================================================================
2272 // INLVLB Bits
2273
2274 extern __at(0x038D) __sfr INLVLB;
2275
2276 typedef struct
2277 {
2278 unsigned : 1;
2279 unsigned : 1;
2280 unsigned : 1;
2281 unsigned : 1;
2282 unsigned INLVLB4 : 1;
2283 unsigned INLVLB5 : 1;
2284 unsigned INLVLB6 : 1;
2285 unsigned INLVLB7 : 1;
2286 } __INLVLBbits_t;
2287
2288 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits;
2289
2290 #define _INLVLB4 0x10
2291 #define _INLVLB5 0x20
2292 #define _INLVLB6 0x40
2293 #define _INLVLB7 0x80
2294
2295 //==============================================================================
2296
2297
2298 //==============================================================================
2299 // INLVLC Bits
2300
2301 extern __at(0x038E) __sfr INLVLC;
2302
2303 typedef struct
2304 {
2305 unsigned INLVLC0 : 1;
2306 unsigned INLVLC1 : 1;
2307 unsigned INLVLC2 : 1;
2308 unsigned INLVLC3 : 1;
2309 unsigned INLVLC4 : 1;
2310 unsigned INLVLC5 : 1;
2311 unsigned INLVLC6 : 1;
2312 unsigned INLVLC7 : 1;
2313 } __INLVLCbits_t;
2314
2315 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits;
2316
2317 #define _INLVLC0 0x01
2318 #define _INLVLC1 0x02
2319 #define _INLVLC2 0x04
2320 #define _INLVLC3 0x08
2321 #define _INLVLC4 0x10
2322 #define _INLVLC5 0x20
2323 #define _INLVLC6 0x40
2324 #define _INLVLC7 0x80
2325
2326 //==============================================================================
2327
2328
2329 //==============================================================================
2330 // IOCAP Bits
2331
2332 extern __at(0x0391) __sfr IOCAP;
2333
2334 typedef union
2335 {
2336 struct
2337 {
2338 unsigned IOCAP0 : 1;
2339 unsigned IOCAP1 : 1;
2340 unsigned IOCAP2 : 1;
2341 unsigned IOCAP3 : 1;
2342 unsigned IOCAP4 : 1;
2343 unsigned IOCAP5 : 1;
2344 unsigned : 1;
2345 unsigned : 1;
2346 };
2347
2348 struct
2349 {
2350 unsigned IOCAP : 6;
2351 unsigned : 2;
2352 };
2353 } __IOCAPbits_t;
2354
2355 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2356
2357 #define _IOCAP0 0x01
2358 #define _IOCAP1 0x02
2359 #define _IOCAP2 0x04
2360 #define _IOCAP3 0x08
2361 #define _IOCAP4 0x10
2362 #define _IOCAP5 0x20
2363
2364 //==============================================================================
2365
2366
2367 //==============================================================================
2368 // IOCAN Bits
2369
2370 extern __at(0x0392) __sfr IOCAN;
2371
2372 typedef union
2373 {
2374 struct
2375 {
2376 unsigned IOCAN0 : 1;
2377 unsigned IOCAN1 : 1;
2378 unsigned IOCAN2 : 1;
2379 unsigned IOCAN3 : 1;
2380 unsigned IOCAN4 : 1;
2381 unsigned IOCAN5 : 1;
2382 unsigned : 1;
2383 unsigned : 1;
2384 };
2385
2386 struct
2387 {
2388 unsigned IOCAN : 6;
2389 unsigned : 2;
2390 };
2391 } __IOCANbits_t;
2392
2393 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2394
2395 #define _IOCAN0 0x01
2396 #define _IOCAN1 0x02
2397 #define _IOCAN2 0x04
2398 #define _IOCAN3 0x08
2399 #define _IOCAN4 0x10
2400 #define _IOCAN5 0x20
2401
2402 //==============================================================================
2403
2404
2405 //==============================================================================
2406 // IOCAF Bits
2407
2408 extern __at(0x0393) __sfr IOCAF;
2409
2410 typedef union
2411 {
2412 struct
2413 {
2414 unsigned IOCAF0 : 1;
2415 unsigned IOCAF1 : 1;
2416 unsigned IOCAF2 : 1;
2417 unsigned IOCAF3 : 1;
2418 unsigned IOCAF4 : 1;
2419 unsigned IOCAF5 : 1;
2420 unsigned : 1;
2421 unsigned : 1;
2422 };
2423
2424 struct
2425 {
2426 unsigned IOCAF : 6;
2427 unsigned : 2;
2428 };
2429 } __IOCAFbits_t;
2430
2431 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2432
2433 #define _IOCAF0 0x01
2434 #define _IOCAF1 0x02
2435 #define _IOCAF2 0x04
2436 #define _IOCAF3 0x08
2437 #define _IOCAF4 0x10
2438 #define _IOCAF5 0x20
2439
2440 //==============================================================================
2441
2442
2443 //==============================================================================
2444 // IOCBP Bits
2445
2446 extern __at(0x0394) __sfr IOCBP;
2447
2448 typedef struct
2449 {
2450 unsigned : 1;
2451 unsigned : 1;
2452 unsigned : 1;
2453 unsigned : 1;
2454 unsigned IOCBP4 : 1;
2455 unsigned IOCBP5 : 1;
2456 unsigned IOCBP6 : 1;
2457 unsigned IOCBP7 : 1;
2458 } __IOCBPbits_t;
2459
2460 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
2461
2462 #define _IOCBP4 0x10
2463 #define _IOCBP5 0x20
2464 #define _IOCBP6 0x40
2465 #define _IOCBP7 0x80
2466
2467 //==============================================================================
2468
2469
2470 //==============================================================================
2471 // IOCBN Bits
2472
2473 extern __at(0x0395) __sfr IOCBN;
2474
2475 typedef struct
2476 {
2477 unsigned : 1;
2478 unsigned : 1;
2479 unsigned : 1;
2480 unsigned : 1;
2481 unsigned IOCBN4 : 1;
2482 unsigned IOCBN5 : 1;
2483 unsigned IOCBN6 : 1;
2484 unsigned IOCBN7 : 1;
2485 } __IOCBNbits_t;
2486
2487 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
2488
2489 #define _IOCBN4 0x10
2490 #define _IOCBN5 0x20
2491 #define _IOCBN6 0x40
2492 #define _IOCBN7 0x80
2493
2494 //==============================================================================
2495
2496
2497 //==============================================================================
2498 // IOCBF Bits
2499
2500 extern __at(0x0396) __sfr IOCBF;
2501
2502 typedef struct
2503 {
2504 unsigned : 1;
2505 unsigned : 1;
2506 unsigned : 1;
2507 unsigned : 1;
2508 unsigned IOCBF4 : 1;
2509 unsigned IOCBF5 : 1;
2510 unsigned IOCBF6 : 1;
2511 unsigned IOCBF7 : 1;
2512 } __IOCBFbits_t;
2513
2514 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
2515
2516 #define _IOCBF4 0x10
2517 #define _IOCBF5 0x20
2518 #define _IOCBF6 0x40
2519 #define _IOCBF7 0x80
2520
2521 //==============================================================================
2522
2523
2524 //==============================================================================
2525 // IOCCP Bits
2526
2527 extern __at(0x0397) __sfr IOCCP;
2528
2529 typedef struct
2530 {
2531 unsigned IOCCP0 : 1;
2532 unsigned IOCCP1 : 1;
2533 unsigned IOCCP2 : 1;
2534 unsigned IOCCP3 : 1;
2535 unsigned IOCCP4 : 1;
2536 unsigned IOCCP5 : 1;
2537 unsigned IOCCP6 : 1;
2538 unsigned IOCCP7 : 1;
2539 } __IOCCPbits_t;
2540
2541 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits;
2542
2543 #define _IOCCP0 0x01
2544 #define _IOCCP1 0x02
2545 #define _IOCCP2 0x04
2546 #define _IOCCP3 0x08
2547 #define _IOCCP4 0x10
2548 #define _IOCCP5 0x20
2549 #define _IOCCP6 0x40
2550 #define _IOCCP7 0x80
2551
2552 //==============================================================================
2553
2554
2555 //==============================================================================
2556 // IOCCN Bits
2557
2558 extern __at(0x0398) __sfr IOCCN;
2559
2560 typedef struct
2561 {
2562 unsigned IOCCN0 : 1;
2563 unsigned IOCCN1 : 1;
2564 unsigned IOCCN2 : 1;
2565 unsigned IOCCN3 : 1;
2566 unsigned IOCCN4 : 1;
2567 unsigned IOCCN5 : 1;
2568 unsigned IOCCN6 : 1;
2569 unsigned IOCCN7 : 1;
2570 } __IOCCNbits_t;
2571
2572 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits;
2573
2574 #define _IOCCN0 0x01
2575 #define _IOCCN1 0x02
2576 #define _IOCCN2 0x04
2577 #define _IOCCN3 0x08
2578 #define _IOCCN4 0x10
2579 #define _IOCCN5 0x20
2580 #define _IOCCN6 0x40
2581 #define _IOCCN7 0x80
2582
2583 //==============================================================================
2584
2585
2586 //==============================================================================
2587 // IOCCF Bits
2588
2589 extern __at(0x0399) __sfr IOCCF;
2590
2591 typedef struct
2592 {
2593 unsigned IOCCF0 : 1;
2594 unsigned IOCCF1 : 1;
2595 unsigned IOCCF2 : 1;
2596 unsigned IOCCF3 : 1;
2597 unsigned IOCCF4 : 1;
2598 unsigned IOCCF5 : 1;
2599 unsigned IOCCF6 : 1;
2600 unsigned IOCCF7 : 1;
2601 } __IOCCFbits_t;
2602
2603 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits;
2604
2605 #define _IOCCF0 0x01
2606 #define _IOCCF1 0x02
2607 #define _IOCCF2 0x04
2608 #define _IOCCF3 0x08
2609 #define _IOCCF4 0x10
2610 #define _IOCCF5 0x20
2611 #define _IOCCF6 0x40
2612 #define _IOCCF7 0x80
2613
2614 //==============================================================================
2615
2616
2617 //==============================================================================
2618 // CWG1DBR Bits
2619
2620 extern __at(0x0691) __sfr CWG1DBR;
2621
2622 typedef union
2623 {
2624 struct
2625 {
2626 unsigned CWG1DBR0 : 1;
2627 unsigned CWG1DBR1 : 1;
2628 unsigned CWG1DBR2 : 1;
2629 unsigned CWG1DBR3 : 1;
2630 unsigned CWG1DBR4 : 1;
2631 unsigned CWG1DBR5 : 1;
2632 unsigned : 1;
2633 unsigned : 1;
2634 };
2635
2636 struct
2637 {
2638 unsigned CWG1DBR : 6;
2639 unsigned : 2;
2640 };
2641 } __CWG1DBRbits_t;
2642
2643 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2644
2645 #define _CWG1DBR0 0x01
2646 #define _CWG1DBR1 0x02
2647 #define _CWG1DBR2 0x04
2648 #define _CWG1DBR3 0x08
2649 #define _CWG1DBR4 0x10
2650 #define _CWG1DBR5 0x20
2651
2652 //==============================================================================
2653
2654
2655 //==============================================================================
2656 // CWG1DBF Bits
2657
2658 extern __at(0x0692) __sfr CWG1DBF;
2659
2660 typedef union
2661 {
2662 struct
2663 {
2664 unsigned CWG1DBF0 : 1;
2665 unsigned CWG1DBF1 : 1;
2666 unsigned CWG1DBF2 : 1;
2667 unsigned CWG1DBF3 : 1;
2668 unsigned CWG1DBF4 : 1;
2669 unsigned CWG1DBF5 : 1;
2670 unsigned : 1;
2671 unsigned : 1;
2672 };
2673
2674 struct
2675 {
2676 unsigned CWG1DBF : 6;
2677 unsigned : 2;
2678 };
2679 } __CWG1DBFbits_t;
2680
2681 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2682
2683 #define _CWG1DBF0 0x01
2684 #define _CWG1DBF1 0x02
2685 #define _CWG1DBF2 0x04
2686 #define _CWG1DBF3 0x08
2687 #define _CWG1DBF4 0x10
2688 #define _CWG1DBF5 0x20
2689
2690 //==============================================================================
2691
2692
2693 //==============================================================================
2694 // CWG1CON0 Bits
2695
2696 extern __at(0x0693) __sfr CWG1CON0;
2697
2698 typedef struct
2699 {
2700 unsigned G1CS0 : 1;
2701 unsigned : 1;
2702 unsigned : 1;
2703 unsigned G1POLA : 1;
2704 unsigned G1POLB : 1;
2705 unsigned G1OEA : 1;
2706 unsigned G1OEB : 1;
2707 unsigned G1EN : 1;
2708 } __CWG1CON0bits_t;
2709
2710 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2711
2712 #define _G1CS0 0x01
2713 #define _G1POLA 0x08
2714 #define _G1POLB 0x10
2715 #define _G1OEA 0x20
2716 #define _G1OEB 0x40
2717 #define _G1EN 0x80
2718
2719 //==============================================================================
2720
2721
2722 //==============================================================================
2723 // CWG1CON1 Bits
2724
2725 extern __at(0x0694) __sfr CWG1CON1;
2726
2727 typedef union
2728 {
2729 struct
2730 {
2731 unsigned G1IS0 : 1;
2732 unsigned G1IS1 : 1;
2733 unsigned G1IS2 : 1;
2734 unsigned : 1;
2735 unsigned G1ASDLA0 : 1;
2736 unsigned G1ASDLA1 : 1;
2737 unsigned G1ASDLB0 : 1;
2738 unsigned G1ASDLB1 : 1;
2739 };
2740
2741 struct
2742 {
2743 unsigned G1IS : 3;
2744 unsigned : 5;
2745 };
2746
2747 struct
2748 {
2749 unsigned : 4;
2750 unsigned G1ASDLA : 2;
2751 unsigned : 2;
2752 };
2753
2754 struct
2755 {
2756 unsigned : 6;
2757 unsigned G1ASDLB : 2;
2758 };
2759 } __CWG1CON1bits_t;
2760
2761 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2762
2763 #define _G1IS0 0x01
2764 #define _G1IS1 0x02
2765 #define _G1IS2 0x04
2766 #define _G1ASDLA0 0x10
2767 #define _G1ASDLA1 0x20
2768 #define _G1ASDLB0 0x40
2769 #define _G1ASDLB1 0x80
2770
2771 //==============================================================================
2772
2773
2774 //==============================================================================
2775 // CWG1CON2 Bits
2776
2777 extern __at(0x0695) __sfr CWG1CON2;
2778
2779 typedef struct
2780 {
2781 unsigned : 1;
2782 unsigned G1ASDSPPS : 1;
2783 unsigned G1ASDSC1 : 1;
2784 unsigned G1ASDSC2 : 1;
2785 unsigned : 1;
2786 unsigned : 1;
2787 unsigned G1ARSEN : 1;
2788 unsigned G1ASE : 1;
2789 } __CWG1CON2bits_t;
2790
2791 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2792
2793 #define _G1ASDSPPS 0x02
2794 #define _G1ASDSC1 0x04
2795 #define _G1ASDSC2 0x08
2796 #define _G1ARSEN 0x40
2797 #define _G1ASE 0x80
2798
2799 //==============================================================================
2800
2801
2802 //==============================================================================
2803 // PWMEN Bits
2804
2805 extern __at(0x0D8E) __sfr PWMEN;
2806
2807 typedef union
2808 {
2809 struct
2810 {
2811 unsigned PWM1EN_A : 1;
2812 unsigned PWM2EN_A : 1;
2813 unsigned PWM3EN_A : 1;
2814 unsigned PWM4EN_A : 1;
2815 unsigned : 1;
2816 unsigned : 1;
2817 unsigned : 1;
2818 unsigned : 1;
2819 };
2820
2821 struct
2822 {
2823 unsigned MPWM1EN : 1;
2824 unsigned MPWM2EN : 1;
2825 unsigned MPWM3EN : 1;
2826 unsigned : 1;
2827 unsigned : 1;
2828 unsigned : 1;
2829 unsigned : 1;
2830 unsigned : 1;
2831 };
2832 } __PWMENbits_t;
2833
2834 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
2835
2836 #define _PWM1EN_A 0x01
2837 #define _MPWM1EN 0x01
2838 #define _PWM2EN_A 0x02
2839 #define _MPWM2EN 0x02
2840 #define _PWM3EN_A 0x04
2841 #define _MPWM3EN 0x04
2842 #define _PWM4EN_A 0x08
2843
2844 //==============================================================================
2845
2846
2847 //==============================================================================
2848 // PWMLD Bits
2849
2850 extern __at(0x0D8F) __sfr PWMLD;
2851
2852 typedef union
2853 {
2854 struct
2855 {
2856 unsigned PWM1LDA_A : 1;
2857 unsigned PWM2LDA_A : 1;
2858 unsigned PWM3LDA_A : 1;
2859 unsigned PWM4LDA_A : 1;
2860 unsigned : 1;
2861 unsigned : 1;
2862 unsigned : 1;
2863 unsigned : 1;
2864 };
2865
2866 struct
2867 {
2868 unsigned MPWM1LD : 1;
2869 unsigned MPWM2LD : 1;
2870 unsigned MPWM3LD : 1;
2871 unsigned : 1;
2872 unsigned : 1;
2873 unsigned : 1;
2874 unsigned : 1;
2875 unsigned : 1;
2876 };
2877 } __PWMLDbits_t;
2878
2879 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
2880
2881 #define _PWM1LDA_A 0x01
2882 #define _MPWM1LD 0x01
2883 #define _PWM2LDA_A 0x02
2884 #define _MPWM2LD 0x02
2885 #define _PWM3LDA_A 0x04
2886 #define _MPWM3LD 0x04
2887 #define _PWM4LDA_A 0x08
2888
2889 //==============================================================================
2890
2891
2892 //==============================================================================
2893 // PWMOUT Bits
2894
2895 extern __at(0x0D90) __sfr PWMOUT;
2896
2897 typedef union
2898 {
2899 struct
2900 {
2901 unsigned PWM1OUT_A : 1;
2902 unsigned PWM2OUT_A : 1;
2903 unsigned PWM3OUT_A : 1;
2904 unsigned PWM4OUT_A : 1;
2905 unsigned : 1;
2906 unsigned : 1;
2907 unsigned : 1;
2908 unsigned : 1;
2909 };
2910
2911 struct
2912 {
2913 unsigned MPWM1OUT : 1;
2914 unsigned MPWM2OUT : 1;
2915 unsigned MPWM3OUT : 1;
2916 unsigned : 1;
2917 unsigned : 1;
2918 unsigned : 1;
2919 unsigned : 1;
2920 unsigned : 1;
2921 };
2922 } __PWMOUTbits_t;
2923
2924 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
2925
2926 #define _PWM1OUT_A 0x01
2927 #define _MPWM1OUT 0x01
2928 #define _PWM2OUT_A 0x02
2929 #define _MPWM2OUT 0x02
2930 #define _PWM3OUT_A 0x04
2931 #define _MPWM3OUT 0x04
2932 #define _PWM4OUT_A 0x08
2933
2934 //==============================================================================
2935
2936 extern __at(0x0D91) __sfr PWM1PH;
2937
2938 //==============================================================================
2939 // PWM1PHL Bits
2940
2941 extern __at(0x0D91) __sfr PWM1PHL;
2942
2943 typedef struct
2944 {
2945 unsigned PWM1PHL0 : 1;
2946 unsigned PWM1PHL1 : 1;
2947 unsigned PWM1PHL2 : 1;
2948 unsigned PWM1PHL3 : 1;
2949 unsigned PWM1PHL4 : 1;
2950 unsigned PWM1PHL5 : 1;
2951 unsigned PWM1PHL6 : 1;
2952 unsigned PWM1PHL7 : 1;
2953 } __PWM1PHLbits_t;
2954
2955 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
2956
2957 #define _PWM1PHL0 0x01
2958 #define _PWM1PHL1 0x02
2959 #define _PWM1PHL2 0x04
2960 #define _PWM1PHL3 0x08
2961 #define _PWM1PHL4 0x10
2962 #define _PWM1PHL5 0x20
2963 #define _PWM1PHL6 0x40
2964 #define _PWM1PHL7 0x80
2965
2966 //==============================================================================
2967
2968
2969 //==============================================================================
2970 // PWM1PHH Bits
2971
2972 extern __at(0x0D92) __sfr PWM1PHH;
2973
2974 typedef struct
2975 {
2976 unsigned PWM1PHH0 : 1;
2977 unsigned PWM1PHH1 : 1;
2978 unsigned PWM1PHH2 : 1;
2979 unsigned PWM1PHH3 : 1;
2980 unsigned PWM1PHH4 : 1;
2981 unsigned PWM1PHH5 : 1;
2982 unsigned PWM1PHH6 : 1;
2983 unsigned PWM1PHH7 : 1;
2984 } __PWM1PHHbits_t;
2985
2986 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
2987
2988 #define _PWM1PHH0 0x01
2989 #define _PWM1PHH1 0x02
2990 #define _PWM1PHH2 0x04
2991 #define _PWM1PHH3 0x08
2992 #define _PWM1PHH4 0x10
2993 #define _PWM1PHH5 0x20
2994 #define _PWM1PHH6 0x40
2995 #define _PWM1PHH7 0x80
2996
2997 //==============================================================================
2998
2999 extern __at(0x0D93) __sfr PWM1DC;
3000
3001 //==============================================================================
3002 // PWM1DCL Bits
3003
3004 extern __at(0x0D93) __sfr PWM1DCL;
3005
3006 typedef struct
3007 {
3008 unsigned PWM1DCL0 : 1;
3009 unsigned PWM1DCL1 : 1;
3010 unsigned PWM1DCL2 : 1;
3011 unsigned PWM1DCL3 : 1;
3012 unsigned PWM1DCL4 : 1;
3013 unsigned PWM1DCL5 : 1;
3014 unsigned PWM1DCL6 : 1;
3015 unsigned PWM1DCL7 : 1;
3016 } __PWM1DCLbits_t;
3017
3018 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
3019
3020 #define _PWM1DCL0 0x01
3021 #define _PWM1DCL1 0x02
3022 #define _PWM1DCL2 0x04
3023 #define _PWM1DCL3 0x08
3024 #define _PWM1DCL4 0x10
3025 #define _PWM1DCL5 0x20
3026 #define _PWM1DCL6 0x40
3027 #define _PWM1DCL7 0x80
3028
3029 //==============================================================================
3030
3031
3032 //==============================================================================
3033 // PWM1DCH Bits
3034
3035 extern __at(0x0D94) __sfr PWM1DCH;
3036
3037 typedef struct
3038 {
3039 unsigned PWM1DCH0 : 1;
3040 unsigned PWM1DCH1 : 1;
3041 unsigned PWM1DCH2 : 1;
3042 unsigned PWM1DCH3 : 1;
3043 unsigned PWM1DCH4 : 1;
3044 unsigned PWM1DCH5 : 1;
3045 unsigned PWM1DCH6 : 1;
3046 unsigned PWM1DCH7 : 1;
3047 } __PWM1DCHbits_t;
3048
3049 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
3050
3051 #define _PWM1DCH0 0x01
3052 #define _PWM1DCH1 0x02
3053 #define _PWM1DCH2 0x04
3054 #define _PWM1DCH3 0x08
3055 #define _PWM1DCH4 0x10
3056 #define _PWM1DCH5 0x20
3057 #define _PWM1DCH6 0x40
3058 #define _PWM1DCH7 0x80
3059
3060 //==============================================================================
3061
3062 extern __at(0x0D95) __sfr PWM1PR;
3063
3064 //==============================================================================
3065 // PWM1PRL Bits
3066
3067 extern __at(0x0D95) __sfr PWM1PRL;
3068
3069 typedef struct
3070 {
3071 unsigned PWM1PRL0 : 1;
3072 unsigned PWM1PRL1 : 1;
3073 unsigned PWM1PRL2 : 1;
3074 unsigned PWM1PRL3 : 1;
3075 unsigned PWM1PRL4 : 1;
3076 unsigned PWM1PRL5 : 1;
3077 unsigned PWM1PRL6 : 1;
3078 unsigned PWM1PRL7 : 1;
3079 } __PWM1PRLbits_t;
3080
3081 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
3082
3083 #define _PWM1PRL0 0x01
3084 #define _PWM1PRL1 0x02
3085 #define _PWM1PRL2 0x04
3086 #define _PWM1PRL3 0x08
3087 #define _PWM1PRL4 0x10
3088 #define _PWM1PRL5 0x20
3089 #define _PWM1PRL6 0x40
3090 #define _PWM1PRL7 0x80
3091
3092 //==============================================================================
3093
3094
3095 //==============================================================================
3096 // PWM1PRH Bits
3097
3098 extern __at(0x0D96) __sfr PWM1PRH;
3099
3100 typedef struct
3101 {
3102 unsigned PWM1PRH0 : 1;
3103 unsigned PWM1PRH1 : 1;
3104 unsigned PWM1PRH2 : 1;
3105 unsigned PWM1PRH3 : 1;
3106 unsigned PWM1PRH4 : 1;
3107 unsigned PWM1PRH5 : 1;
3108 unsigned PWM1PRH6 : 1;
3109 unsigned PWM1PRH7 : 1;
3110 } __PWM1PRHbits_t;
3111
3112 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
3113
3114 #define _PWM1PRH0 0x01
3115 #define _PWM1PRH1 0x02
3116 #define _PWM1PRH2 0x04
3117 #define _PWM1PRH3 0x08
3118 #define _PWM1PRH4 0x10
3119 #define _PWM1PRH5 0x20
3120 #define _PWM1PRH6 0x40
3121 #define _PWM1PRH7 0x80
3122
3123 //==============================================================================
3124
3125 extern __at(0x0D97) __sfr PWM1OF;
3126
3127 //==============================================================================
3128 // PWM1OFL Bits
3129
3130 extern __at(0x0D97) __sfr PWM1OFL;
3131
3132 typedef struct
3133 {
3134 unsigned PWM1OFL0 : 1;
3135 unsigned PWM1OFL1 : 1;
3136 unsigned PWM1OFL2 : 1;
3137 unsigned PWM1OFL3 : 1;
3138 unsigned PWM1OFL4 : 1;
3139 unsigned PWM1OFL5 : 1;
3140 unsigned PWM1OFL6 : 1;
3141 unsigned PWM1OFL7 : 1;
3142 } __PWM1OFLbits_t;
3143
3144 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
3145
3146 #define _PWM1OFL0 0x01
3147 #define _PWM1OFL1 0x02
3148 #define _PWM1OFL2 0x04
3149 #define _PWM1OFL3 0x08
3150 #define _PWM1OFL4 0x10
3151 #define _PWM1OFL5 0x20
3152 #define _PWM1OFL6 0x40
3153 #define _PWM1OFL7 0x80
3154
3155 //==============================================================================
3156
3157
3158 //==============================================================================
3159 // PWM1OFH Bits
3160
3161 extern __at(0x0D98) __sfr PWM1OFH;
3162
3163 typedef struct
3164 {
3165 unsigned PWM1OFH0 : 1;
3166 unsigned PWM1OFH1 : 1;
3167 unsigned PWM1OFH2 : 1;
3168 unsigned PWM1OFH3 : 1;
3169 unsigned PWM1OFH4 : 1;
3170 unsigned PWM1OFH5 : 1;
3171 unsigned PWM1OFH6 : 1;
3172 unsigned PWM1OFH7 : 1;
3173 } __PWM1OFHbits_t;
3174
3175 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
3176
3177 #define _PWM1OFH0 0x01
3178 #define _PWM1OFH1 0x02
3179 #define _PWM1OFH2 0x04
3180 #define _PWM1OFH3 0x08
3181 #define _PWM1OFH4 0x10
3182 #define _PWM1OFH5 0x20
3183 #define _PWM1OFH6 0x40
3184 #define _PWM1OFH7 0x80
3185
3186 //==============================================================================
3187
3188 extern __at(0x0D99) __sfr PWM1TMR;
3189
3190 //==============================================================================
3191 // PWM1TMRL Bits
3192
3193 extern __at(0x0D99) __sfr PWM1TMRL;
3194
3195 typedef struct
3196 {
3197 unsigned PWM1TMRL0 : 1;
3198 unsigned PWM1TMRL1 : 1;
3199 unsigned PWM1TMRL2 : 1;
3200 unsigned PWM1TMRL3 : 1;
3201 unsigned PWM1TMRL4 : 1;
3202 unsigned PWM1TMRL5 : 1;
3203 unsigned PWM1TMRL6 : 1;
3204 unsigned PWM1TMRL7 : 1;
3205 } __PWM1TMRLbits_t;
3206
3207 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
3208
3209 #define _PWM1TMRL0 0x01
3210 #define _PWM1TMRL1 0x02
3211 #define _PWM1TMRL2 0x04
3212 #define _PWM1TMRL3 0x08
3213 #define _PWM1TMRL4 0x10
3214 #define _PWM1TMRL5 0x20
3215 #define _PWM1TMRL6 0x40
3216 #define _PWM1TMRL7 0x80
3217
3218 //==============================================================================
3219
3220
3221 //==============================================================================
3222 // PWM1TMRH Bits
3223
3224 extern __at(0x0D9A) __sfr PWM1TMRH;
3225
3226 typedef struct
3227 {
3228 unsigned PWM1TMRH0 : 1;
3229 unsigned PWM1TMRH1 : 1;
3230 unsigned PWM1TMRH2 : 1;
3231 unsigned PWM1TMRH3 : 1;
3232 unsigned PWM1TMRH4 : 1;
3233 unsigned PWM1TMRH5 : 1;
3234 unsigned PWM1TMRH6 : 1;
3235 unsigned PWM1TMRH7 : 1;
3236 } __PWM1TMRHbits_t;
3237
3238 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
3239
3240 #define _PWM1TMRH0 0x01
3241 #define _PWM1TMRH1 0x02
3242 #define _PWM1TMRH2 0x04
3243 #define _PWM1TMRH3 0x08
3244 #define _PWM1TMRH4 0x10
3245 #define _PWM1TMRH5 0x20
3246 #define _PWM1TMRH6 0x40
3247 #define _PWM1TMRH7 0x80
3248
3249 //==============================================================================
3250
3251
3252 //==============================================================================
3253 // PWM1CON Bits
3254
3255 extern __at(0x0D9B) __sfr PWM1CON;
3256
3257 typedef union
3258 {
3259 struct
3260 {
3261 unsigned : 1;
3262 unsigned : 1;
3263 unsigned PWM1MODE0 : 1;
3264 unsigned PWM1MODE1 : 1;
3265 unsigned POL : 1;
3266 unsigned OUT : 1;
3267 unsigned OE : 1;
3268 unsigned EN : 1;
3269 };
3270
3271 struct
3272 {
3273 unsigned : 1;
3274 unsigned : 1;
3275 unsigned MODE0 : 1;
3276 unsigned MODE1 : 1;
3277 unsigned PWM1POL : 1;
3278 unsigned PWM1OUT : 1;
3279 unsigned PWM1OE : 1;
3280 unsigned PWM1EN : 1;
3281 };
3282
3283 struct
3284 {
3285 unsigned : 2;
3286 unsigned PWM1MODE : 2;
3287 unsigned : 4;
3288 };
3289
3290 struct
3291 {
3292 unsigned : 2;
3293 unsigned MODE : 2;
3294 unsigned : 4;
3295 };
3296 } __PWM1CONbits_t;
3297
3298 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
3299
3300 #define _PWM1MODE0 0x04
3301 #define _MODE0 0x04
3302 #define _PWM1MODE1 0x08
3303 #define _MODE1 0x08
3304 #define _POL 0x10
3305 #define _PWM1POL 0x10
3306 #define _OUT 0x20
3307 #define _PWM1OUT 0x20
3308 #define _OE 0x40
3309 #define _PWM1OE 0x40
3310 #define _EN 0x80
3311 #define _PWM1EN 0x80
3312
3313 //==============================================================================
3314
3315
3316 //==============================================================================
3317 // PWM1INTCON Bits
3318
3319 extern __at(0x0D9C) __sfr PWM1INTCON;
3320
3321 typedef union
3322 {
3323 struct
3324 {
3325 unsigned PRIE : 1;
3326 unsigned DCIE : 1;
3327 unsigned PHIE : 1;
3328 unsigned OFIE : 1;
3329 unsigned : 1;
3330 unsigned : 1;
3331 unsigned : 1;
3332 unsigned : 1;
3333 };
3334
3335 struct
3336 {
3337 unsigned PWM1PRIE : 1;
3338 unsigned PWM1DCIE : 1;
3339 unsigned PWM1PHIE : 1;
3340 unsigned PWM1OFIE : 1;
3341 unsigned : 1;
3342 unsigned : 1;
3343 unsigned : 1;
3344 unsigned : 1;
3345 };
3346 } __PWM1INTCONbits_t;
3347
3348 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
3349
3350 #define _PRIE 0x01
3351 #define _PWM1PRIE 0x01
3352 #define _DCIE 0x02
3353 #define _PWM1DCIE 0x02
3354 #define _PHIE 0x04
3355 #define _PWM1PHIE 0x04
3356 #define _OFIE 0x08
3357 #define _PWM1OFIE 0x08
3358
3359 //==============================================================================
3360
3361
3362 //==============================================================================
3363 // PWM1INTE Bits
3364
3365 extern __at(0x0D9C) __sfr PWM1INTE;
3366
3367 typedef union
3368 {
3369 struct
3370 {
3371 unsigned PRIE : 1;
3372 unsigned DCIE : 1;
3373 unsigned PHIE : 1;
3374 unsigned OFIE : 1;
3375 unsigned : 1;
3376 unsigned : 1;
3377 unsigned : 1;
3378 unsigned : 1;
3379 };
3380
3381 struct
3382 {
3383 unsigned PWM1PRIE : 1;
3384 unsigned PWM1DCIE : 1;
3385 unsigned PWM1PHIE : 1;
3386 unsigned PWM1OFIE : 1;
3387 unsigned : 1;
3388 unsigned : 1;
3389 unsigned : 1;
3390 unsigned : 1;
3391 };
3392 } __PWM1INTEbits_t;
3393
3394 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
3395
3396 #define _PWM1INTE_PRIE 0x01
3397 #define _PWM1INTE_PWM1PRIE 0x01
3398 #define _PWM1INTE_DCIE 0x02
3399 #define _PWM1INTE_PWM1DCIE 0x02
3400 #define _PWM1INTE_PHIE 0x04
3401 #define _PWM1INTE_PWM1PHIE 0x04
3402 #define _PWM1INTE_OFIE 0x08
3403 #define _PWM1INTE_PWM1OFIE 0x08
3404
3405 //==============================================================================
3406
3407
3408 //==============================================================================
3409 // PWM1INTF Bits
3410
3411 extern __at(0x0D9D) __sfr PWM1INTF;
3412
3413 typedef union
3414 {
3415 struct
3416 {
3417 unsigned PRIF : 1;
3418 unsigned DCIF : 1;
3419 unsigned PHIF : 1;
3420 unsigned OFIF : 1;
3421 unsigned : 1;
3422 unsigned : 1;
3423 unsigned : 1;
3424 unsigned : 1;
3425 };
3426
3427 struct
3428 {
3429 unsigned PWM1PRIF : 1;
3430 unsigned PWM1DCIF : 1;
3431 unsigned PWM1PHIF : 1;
3432 unsigned PWM1OFIF : 1;
3433 unsigned : 1;
3434 unsigned : 1;
3435 unsigned : 1;
3436 unsigned : 1;
3437 };
3438 } __PWM1INTFbits_t;
3439
3440 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
3441
3442 #define _PRIF 0x01
3443 #define _PWM1PRIF 0x01
3444 #define _DCIF 0x02
3445 #define _PWM1DCIF 0x02
3446 #define _PHIF 0x04
3447 #define _PWM1PHIF 0x04
3448 #define _OFIF 0x08
3449 #define _PWM1OFIF 0x08
3450
3451 //==============================================================================
3452
3453
3454 //==============================================================================
3455 // PWM1INTFLG Bits
3456
3457 extern __at(0x0D9D) __sfr PWM1INTFLG;
3458
3459 typedef union
3460 {
3461 struct
3462 {
3463 unsigned PRIF : 1;
3464 unsigned DCIF : 1;
3465 unsigned PHIF : 1;
3466 unsigned OFIF : 1;
3467 unsigned : 1;
3468 unsigned : 1;
3469 unsigned : 1;
3470 unsigned : 1;
3471 };
3472
3473 struct
3474 {
3475 unsigned PWM1PRIF : 1;
3476 unsigned PWM1DCIF : 1;
3477 unsigned PWM1PHIF : 1;
3478 unsigned PWM1OFIF : 1;
3479 unsigned : 1;
3480 unsigned : 1;
3481 unsigned : 1;
3482 unsigned : 1;
3483 };
3484 } __PWM1INTFLGbits_t;
3485
3486 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
3487
3488 #define _PWM1INTFLG_PRIF 0x01
3489 #define _PWM1INTFLG_PWM1PRIF 0x01
3490 #define _PWM1INTFLG_DCIF 0x02
3491 #define _PWM1INTFLG_PWM1DCIF 0x02
3492 #define _PWM1INTFLG_PHIF 0x04
3493 #define _PWM1INTFLG_PWM1PHIF 0x04
3494 #define _PWM1INTFLG_OFIF 0x08
3495 #define _PWM1INTFLG_PWM1OFIF 0x08
3496
3497 //==============================================================================
3498
3499
3500 //==============================================================================
3501 // PWM1CLKCON Bits
3502
3503 extern __at(0x0D9E) __sfr PWM1CLKCON;
3504
3505 typedef union
3506 {
3507 struct
3508 {
3509 unsigned PWM1CS0 : 1;
3510 unsigned PWM1CS1 : 1;
3511 unsigned : 1;
3512 unsigned : 1;
3513 unsigned PWM1PS0 : 1;
3514 unsigned PWM1PS1 : 1;
3515 unsigned PWM1PS2 : 1;
3516 unsigned : 1;
3517 };
3518
3519 struct
3520 {
3521 unsigned CS0 : 1;
3522 unsigned CS1 : 1;
3523 unsigned : 1;
3524 unsigned : 1;
3525 unsigned PS0 : 1;
3526 unsigned PS1 : 1;
3527 unsigned PS2 : 1;
3528 unsigned : 1;
3529 };
3530
3531 struct
3532 {
3533 unsigned PWM1CS : 2;
3534 unsigned : 6;
3535 };
3536
3537 struct
3538 {
3539 unsigned CS : 2;
3540 unsigned : 6;
3541 };
3542
3543 struct
3544 {
3545 unsigned : 4;
3546 unsigned PWM1PS : 3;
3547 unsigned : 1;
3548 };
3549
3550 struct
3551 {
3552 unsigned : 4;
3553 unsigned PS : 3;
3554 unsigned : 1;
3555 };
3556 } __PWM1CLKCONbits_t;
3557
3558 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
3559
3560 #define _PWM1CLKCON_PWM1CS0 0x01
3561 #define _PWM1CLKCON_CS0 0x01
3562 #define _PWM1CLKCON_PWM1CS1 0x02
3563 #define _PWM1CLKCON_CS1 0x02
3564 #define _PWM1CLKCON_PWM1PS0 0x10
3565 #define _PWM1CLKCON_PS0 0x10
3566 #define _PWM1CLKCON_PWM1PS1 0x20
3567 #define _PWM1CLKCON_PS1 0x20
3568 #define _PWM1CLKCON_PWM1PS2 0x40
3569 #define _PWM1CLKCON_PS2 0x40
3570
3571 //==============================================================================
3572
3573
3574 //==============================================================================
3575 // PWM1LDCON Bits
3576
3577 extern __at(0x0D9F) __sfr PWM1LDCON;
3578
3579 typedef union
3580 {
3581 struct
3582 {
3583 unsigned PWM1LDS0 : 1;
3584 unsigned PWM1LDS1 : 1;
3585 unsigned : 1;
3586 unsigned : 1;
3587 unsigned : 1;
3588 unsigned : 1;
3589 unsigned LDT : 1;
3590 unsigned LDA : 1;
3591 };
3592
3593 struct
3594 {
3595 unsigned LDS0 : 1;
3596 unsigned LDS1 : 1;
3597 unsigned : 1;
3598 unsigned : 1;
3599 unsigned : 1;
3600 unsigned : 1;
3601 unsigned PWM1LDM : 1;
3602 unsigned PWM1LD : 1;
3603 };
3604
3605 struct
3606 {
3607 unsigned PWM1LDS : 2;
3608 unsigned : 6;
3609 };
3610
3611 struct
3612 {
3613 unsigned LDS : 2;
3614 unsigned : 6;
3615 };
3616 } __PWM1LDCONbits_t;
3617
3618 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
3619
3620 #define _PWM1LDS0 0x01
3621 #define _LDS0 0x01
3622 #define _PWM1LDS1 0x02
3623 #define _LDS1 0x02
3624 #define _LDT 0x40
3625 #define _PWM1LDM 0x40
3626 #define _LDA 0x80
3627 #define _PWM1LD 0x80
3628
3629 //==============================================================================
3630
3631
3632 //==============================================================================
3633 // PWM1OFCON Bits
3634
3635 extern __at(0x0DA0) __sfr PWM1OFCON;
3636
3637 typedef union
3638 {
3639 struct
3640 {
3641 unsigned PWM1OFS0 : 1;
3642 unsigned PWM1OFS1 : 1;
3643 unsigned : 1;
3644 unsigned : 1;
3645 unsigned OFO : 1;
3646 unsigned PWM1OFM0 : 1;
3647 unsigned PWM1OFM1 : 1;
3648 unsigned : 1;
3649 };
3650
3651 struct
3652 {
3653 unsigned OFS0 : 1;
3654 unsigned OFS1 : 1;
3655 unsigned : 1;
3656 unsigned : 1;
3657 unsigned PWM1OFMC : 1;
3658 unsigned OFM0 : 1;
3659 unsigned OFM1 : 1;
3660 unsigned : 1;
3661 };
3662
3663 struct
3664 {
3665 unsigned PWM1OFS : 2;
3666 unsigned : 6;
3667 };
3668
3669 struct
3670 {
3671 unsigned OFS : 2;
3672 unsigned : 6;
3673 };
3674
3675 struct
3676 {
3677 unsigned : 5;
3678 unsigned PWM1OFM : 2;
3679 unsigned : 1;
3680 };
3681
3682 struct
3683 {
3684 unsigned : 5;
3685 unsigned OFM : 2;
3686 unsigned : 1;
3687 };
3688 } __PWM1OFCONbits_t;
3689
3690 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
3691
3692 #define _PWM1OFS0 0x01
3693 #define _OFS0 0x01
3694 #define _PWM1OFS1 0x02
3695 #define _OFS1 0x02
3696 #define _OFO 0x10
3697 #define _PWM1OFMC 0x10
3698 #define _PWM1OFM0 0x20
3699 #define _OFM0 0x20
3700 #define _PWM1OFM1 0x40
3701 #define _OFM1 0x40
3702
3703 //==============================================================================
3704
3705 extern __at(0x0DA1) __sfr PWM2PH;
3706
3707 //==============================================================================
3708 // PWM2PHL Bits
3709
3710 extern __at(0x0DA1) __sfr PWM2PHL;
3711
3712 typedef struct
3713 {
3714 unsigned PWM2PHL0 : 1;
3715 unsigned PWM2PHL1 : 1;
3716 unsigned PWM2PHL2 : 1;
3717 unsigned PWM2PHL3 : 1;
3718 unsigned PWM2PHL4 : 1;
3719 unsigned PWM2PHL5 : 1;
3720 unsigned PWM2PHL6 : 1;
3721 unsigned PWM2PHL7 : 1;
3722 } __PWM2PHLbits_t;
3723
3724 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
3725
3726 #define _PWM2PHL0 0x01
3727 #define _PWM2PHL1 0x02
3728 #define _PWM2PHL2 0x04
3729 #define _PWM2PHL3 0x08
3730 #define _PWM2PHL4 0x10
3731 #define _PWM2PHL5 0x20
3732 #define _PWM2PHL6 0x40
3733 #define _PWM2PHL7 0x80
3734
3735 //==============================================================================
3736
3737
3738 //==============================================================================
3739 // PWM2PHH Bits
3740
3741 extern __at(0x0DA2) __sfr PWM2PHH;
3742
3743 typedef struct
3744 {
3745 unsigned PWM2PHH0 : 1;
3746 unsigned PWM2PHH1 : 1;
3747 unsigned PWM2PHH2 : 1;
3748 unsigned PWM2PHH3 : 1;
3749 unsigned PWM2PHH4 : 1;
3750 unsigned PWM2PHH5 : 1;
3751 unsigned PWM2PHH6 : 1;
3752 unsigned PWM2PHH7 : 1;
3753 } __PWM2PHHbits_t;
3754
3755 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
3756
3757 #define _PWM2PHH0 0x01
3758 #define _PWM2PHH1 0x02
3759 #define _PWM2PHH2 0x04
3760 #define _PWM2PHH3 0x08
3761 #define _PWM2PHH4 0x10
3762 #define _PWM2PHH5 0x20
3763 #define _PWM2PHH6 0x40
3764 #define _PWM2PHH7 0x80
3765
3766 //==============================================================================
3767
3768 extern __at(0x0DA3) __sfr PWM2DC;
3769
3770 //==============================================================================
3771 // PWM2DCL Bits
3772
3773 extern __at(0x0DA3) __sfr PWM2DCL;
3774
3775 typedef struct
3776 {
3777 unsigned PWM2DCL0 : 1;
3778 unsigned PWM2DCL1 : 1;
3779 unsigned PWM2DCL2 : 1;
3780 unsigned PWM2DCL3 : 1;
3781 unsigned PWM2DCL4 : 1;
3782 unsigned PWM2DCL5 : 1;
3783 unsigned PWM2DCL6 : 1;
3784 unsigned PWM2DCL7 : 1;
3785 } __PWM2DCLbits_t;
3786
3787 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
3788
3789 #define _PWM2DCL0 0x01
3790 #define _PWM2DCL1 0x02
3791 #define _PWM2DCL2 0x04
3792 #define _PWM2DCL3 0x08
3793 #define _PWM2DCL4 0x10
3794 #define _PWM2DCL5 0x20
3795 #define _PWM2DCL6 0x40
3796 #define _PWM2DCL7 0x80
3797
3798 //==============================================================================
3799
3800
3801 //==============================================================================
3802 // PWM2DCH Bits
3803
3804 extern __at(0x0DA4) __sfr PWM2DCH;
3805
3806 typedef struct
3807 {
3808 unsigned PWM2DCH0 : 1;
3809 unsigned PWM2DCH1 : 1;
3810 unsigned PWM2DCH2 : 1;
3811 unsigned PWM2DCH3 : 1;
3812 unsigned PWM2DCH4 : 1;
3813 unsigned PWM2DCH5 : 1;
3814 unsigned PWM2DCH6 : 1;
3815 unsigned PWM2DCH7 : 1;
3816 } __PWM2DCHbits_t;
3817
3818 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
3819
3820 #define _PWM2DCH0 0x01
3821 #define _PWM2DCH1 0x02
3822 #define _PWM2DCH2 0x04
3823 #define _PWM2DCH3 0x08
3824 #define _PWM2DCH4 0x10
3825 #define _PWM2DCH5 0x20
3826 #define _PWM2DCH6 0x40
3827 #define _PWM2DCH7 0x80
3828
3829 //==============================================================================
3830
3831 extern __at(0x0DA5) __sfr PWM2PR;
3832
3833 //==============================================================================
3834 // PWM2PRL Bits
3835
3836 extern __at(0x0DA5) __sfr PWM2PRL;
3837
3838 typedef struct
3839 {
3840 unsigned PWM2PRL0 : 1;
3841 unsigned PWM2PRL1 : 1;
3842 unsigned PWM2PRL2 : 1;
3843 unsigned PWM2PRL3 : 1;
3844 unsigned PWM2PRL4 : 1;
3845 unsigned PWM2PRL5 : 1;
3846 unsigned PWM2PRL6 : 1;
3847 unsigned PWM2PRL7 : 1;
3848 } __PWM2PRLbits_t;
3849
3850 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
3851
3852 #define _PWM2PRL0 0x01
3853 #define _PWM2PRL1 0x02
3854 #define _PWM2PRL2 0x04
3855 #define _PWM2PRL3 0x08
3856 #define _PWM2PRL4 0x10
3857 #define _PWM2PRL5 0x20
3858 #define _PWM2PRL6 0x40
3859 #define _PWM2PRL7 0x80
3860
3861 //==============================================================================
3862
3863
3864 //==============================================================================
3865 // PWM2PRH Bits
3866
3867 extern __at(0x0DA6) __sfr PWM2PRH;
3868
3869 typedef struct
3870 {
3871 unsigned PWM2PRH0 : 1;
3872 unsigned PWM2PRH1 : 1;
3873 unsigned PWM2PRH2 : 1;
3874 unsigned PWM2PRH3 : 1;
3875 unsigned PWM2PRH4 : 1;
3876 unsigned PWM2PRH5 : 1;
3877 unsigned PWM2PRH6 : 1;
3878 unsigned PWM2PRH7 : 1;
3879 } __PWM2PRHbits_t;
3880
3881 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
3882
3883 #define _PWM2PRH0 0x01
3884 #define _PWM2PRH1 0x02
3885 #define _PWM2PRH2 0x04
3886 #define _PWM2PRH3 0x08
3887 #define _PWM2PRH4 0x10
3888 #define _PWM2PRH5 0x20
3889 #define _PWM2PRH6 0x40
3890 #define _PWM2PRH7 0x80
3891
3892 //==============================================================================
3893
3894 extern __at(0x0DA7) __sfr PWM2OF;
3895
3896 //==============================================================================
3897 // PWM2OFL Bits
3898
3899 extern __at(0x0DA7) __sfr PWM2OFL;
3900
3901 typedef struct
3902 {
3903 unsigned PWM2OFL0 : 1;
3904 unsigned PWM2OFL1 : 1;
3905 unsigned PWM2OFL2 : 1;
3906 unsigned PWM2OFL3 : 1;
3907 unsigned PWM2OFL4 : 1;
3908 unsigned PWM2OFL5 : 1;
3909 unsigned PWM2OFL6 : 1;
3910 unsigned PWM2OFL7 : 1;
3911 } __PWM2OFLbits_t;
3912
3913 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
3914
3915 #define _PWM2OFL0 0x01
3916 #define _PWM2OFL1 0x02
3917 #define _PWM2OFL2 0x04
3918 #define _PWM2OFL3 0x08
3919 #define _PWM2OFL4 0x10
3920 #define _PWM2OFL5 0x20
3921 #define _PWM2OFL6 0x40
3922 #define _PWM2OFL7 0x80
3923
3924 //==============================================================================
3925
3926
3927 //==============================================================================
3928 // PWM2OFH Bits
3929
3930 extern __at(0x0DA8) __sfr PWM2OFH;
3931
3932 typedef struct
3933 {
3934 unsigned PWM2OFH0 : 1;
3935 unsigned PWM2OFH1 : 1;
3936 unsigned PWM2OFH2 : 1;
3937 unsigned PWM2OFH3 : 1;
3938 unsigned PWM2OFH4 : 1;
3939 unsigned PWM2OFH5 : 1;
3940 unsigned PWM2OFH6 : 1;
3941 unsigned PWM2OFH7 : 1;
3942 } __PWM2OFHbits_t;
3943
3944 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
3945
3946 #define _PWM2OFH0 0x01
3947 #define _PWM2OFH1 0x02
3948 #define _PWM2OFH2 0x04
3949 #define _PWM2OFH3 0x08
3950 #define _PWM2OFH4 0x10
3951 #define _PWM2OFH5 0x20
3952 #define _PWM2OFH6 0x40
3953 #define _PWM2OFH7 0x80
3954
3955 //==============================================================================
3956
3957 extern __at(0x0DA9) __sfr PWM2TMR;
3958
3959 //==============================================================================
3960 // PWM2TMRL Bits
3961
3962 extern __at(0x0DA9) __sfr PWM2TMRL;
3963
3964 typedef struct
3965 {
3966 unsigned PWM2TMRL0 : 1;
3967 unsigned PWM2TMRL1 : 1;
3968 unsigned PWM2TMRL2 : 1;
3969 unsigned PWM2TMRL3 : 1;
3970 unsigned PWM2TMRL4 : 1;
3971 unsigned PWM2TMRL5 : 1;
3972 unsigned PWM2TMRL6 : 1;
3973 unsigned PWM2TMRL7 : 1;
3974 } __PWM2TMRLbits_t;
3975
3976 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
3977
3978 #define _PWM2TMRL0 0x01
3979 #define _PWM2TMRL1 0x02
3980 #define _PWM2TMRL2 0x04
3981 #define _PWM2TMRL3 0x08
3982 #define _PWM2TMRL4 0x10
3983 #define _PWM2TMRL5 0x20
3984 #define _PWM2TMRL6 0x40
3985 #define _PWM2TMRL7 0x80
3986
3987 //==============================================================================
3988
3989
3990 //==============================================================================
3991 // PWM2TMRH Bits
3992
3993 extern __at(0x0DAA) __sfr PWM2TMRH;
3994
3995 typedef struct
3996 {
3997 unsigned PWM2TMRH0 : 1;
3998 unsigned PWM2TMRH1 : 1;
3999 unsigned PWM2TMRH2 : 1;
4000 unsigned PWM2TMRH3 : 1;
4001 unsigned PWM2TMRH4 : 1;
4002 unsigned PWM2TMRH5 : 1;
4003 unsigned PWM2TMRH6 : 1;
4004 unsigned PWM2TMRH7 : 1;
4005 } __PWM2TMRHbits_t;
4006
4007 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
4008
4009 #define _PWM2TMRH0 0x01
4010 #define _PWM2TMRH1 0x02
4011 #define _PWM2TMRH2 0x04
4012 #define _PWM2TMRH3 0x08
4013 #define _PWM2TMRH4 0x10
4014 #define _PWM2TMRH5 0x20
4015 #define _PWM2TMRH6 0x40
4016 #define _PWM2TMRH7 0x80
4017
4018 //==============================================================================
4019
4020
4021 //==============================================================================
4022 // PWM2CON Bits
4023
4024 extern __at(0x0DAB) __sfr PWM2CON;
4025
4026 typedef union
4027 {
4028 struct
4029 {
4030 unsigned : 1;
4031 unsigned : 1;
4032 unsigned PWM2MODE0 : 1;
4033 unsigned PWM2MODE1 : 1;
4034 unsigned POL : 1;
4035 unsigned OUT : 1;
4036 unsigned OE : 1;
4037 unsigned EN : 1;
4038 };
4039
4040 struct
4041 {
4042 unsigned : 1;
4043 unsigned : 1;
4044 unsigned MODE0 : 1;
4045 unsigned MODE1 : 1;
4046 unsigned PWM2POL : 1;
4047 unsigned PWM2OUT : 1;
4048 unsigned PWM2OE : 1;
4049 unsigned PWM2EN : 1;
4050 };
4051
4052 struct
4053 {
4054 unsigned : 2;
4055 unsigned MODE : 2;
4056 unsigned : 4;
4057 };
4058
4059 struct
4060 {
4061 unsigned : 2;
4062 unsigned PWM2MODE : 2;
4063 unsigned : 4;
4064 };
4065 } __PWM2CONbits_t;
4066
4067 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
4068
4069 #define _PWM2CON_PWM2MODE0 0x04
4070 #define _PWM2CON_MODE0 0x04
4071 #define _PWM2CON_PWM2MODE1 0x08
4072 #define _PWM2CON_MODE1 0x08
4073 #define _PWM2CON_POL 0x10
4074 #define _PWM2CON_PWM2POL 0x10
4075 #define _PWM2CON_OUT 0x20
4076 #define _PWM2CON_PWM2OUT 0x20
4077 #define _PWM2CON_OE 0x40
4078 #define _PWM2CON_PWM2OE 0x40
4079 #define _PWM2CON_EN 0x80
4080 #define _PWM2CON_PWM2EN 0x80
4081
4082 //==============================================================================
4083
4084
4085 //==============================================================================
4086 // PWM2INTCON Bits
4087
4088 extern __at(0x0DAC) __sfr PWM2INTCON;
4089
4090 typedef union
4091 {
4092 struct
4093 {
4094 unsigned PRIE : 1;
4095 unsigned DCIE : 1;
4096 unsigned PHIE : 1;
4097 unsigned OFIE : 1;
4098 unsigned : 1;
4099 unsigned : 1;
4100 unsigned : 1;
4101 unsigned : 1;
4102 };
4103
4104 struct
4105 {
4106 unsigned PWM2PRIE : 1;
4107 unsigned PWM2DCIE : 1;
4108 unsigned PWM2PHIE : 1;
4109 unsigned PWM2OFIE : 1;
4110 unsigned : 1;
4111 unsigned : 1;
4112 unsigned : 1;
4113 unsigned : 1;
4114 };
4115 } __PWM2INTCONbits_t;
4116
4117 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
4118
4119 #define _PWM2INTCON_PRIE 0x01
4120 #define _PWM2INTCON_PWM2PRIE 0x01
4121 #define _PWM2INTCON_DCIE 0x02
4122 #define _PWM2INTCON_PWM2DCIE 0x02
4123 #define _PWM2INTCON_PHIE 0x04
4124 #define _PWM2INTCON_PWM2PHIE 0x04
4125 #define _PWM2INTCON_OFIE 0x08
4126 #define _PWM2INTCON_PWM2OFIE 0x08
4127
4128 //==============================================================================
4129
4130
4131 //==============================================================================
4132 // PWM2INTE Bits
4133
4134 extern __at(0x0DAC) __sfr PWM2INTE;
4135
4136 typedef union
4137 {
4138 struct
4139 {
4140 unsigned PRIE : 1;
4141 unsigned DCIE : 1;
4142 unsigned PHIE : 1;
4143 unsigned OFIE : 1;
4144 unsigned : 1;
4145 unsigned : 1;
4146 unsigned : 1;
4147 unsigned : 1;
4148 };
4149
4150 struct
4151 {
4152 unsigned PWM2PRIE : 1;
4153 unsigned PWM2DCIE : 1;
4154 unsigned PWM2PHIE : 1;
4155 unsigned PWM2OFIE : 1;
4156 unsigned : 1;
4157 unsigned : 1;
4158 unsigned : 1;
4159 unsigned : 1;
4160 };
4161 } __PWM2INTEbits_t;
4162
4163 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
4164
4165 #define _PWM2INTE_PRIE 0x01
4166 #define _PWM2INTE_PWM2PRIE 0x01
4167 #define _PWM2INTE_DCIE 0x02
4168 #define _PWM2INTE_PWM2DCIE 0x02
4169 #define _PWM2INTE_PHIE 0x04
4170 #define _PWM2INTE_PWM2PHIE 0x04
4171 #define _PWM2INTE_OFIE 0x08
4172 #define _PWM2INTE_PWM2OFIE 0x08
4173
4174 //==============================================================================
4175
4176
4177 //==============================================================================
4178 // PWM2INTF Bits
4179
4180 extern __at(0x0DAD) __sfr PWM2INTF;
4181
4182 typedef union
4183 {
4184 struct
4185 {
4186 unsigned PRIF : 1;
4187 unsigned DCIF : 1;
4188 unsigned PHIF : 1;
4189 unsigned OFIF : 1;
4190 unsigned : 1;
4191 unsigned : 1;
4192 unsigned : 1;
4193 unsigned : 1;
4194 };
4195
4196 struct
4197 {
4198 unsigned PWM2PRIF : 1;
4199 unsigned PWM2DCIF : 1;
4200 unsigned PWM2PHIF : 1;
4201 unsigned PWM2OFIF : 1;
4202 unsigned : 1;
4203 unsigned : 1;
4204 unsigned : 1;
4205 unsigned : 1;
4206 };
4207 } __PWM2INTFbits_t;
4208
4209 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
4210
4211 #define _PWM2INTF_PRIF 0x01
4212 #define _PWM2INTF_PWM2PRIF 0x01
4213 #define _PWM2INTF_DCIF 0x02
4214 #define _PWM2INTF_PWM2DCIF 0x02
4215 #define _PWM2INTF_PHIF 0x04
4216 #define _PWM2INTF_PWM2PHIF 0x04
4217 #define _PWM2INTF_OFIF 0x08
4218 #define _PWM2INTF_PWM2OFIF 0x08
4219
4220 //==============================================================================
4221
4222
4223 //==============================================================================
4224 // PWM2INTFLG Bits
4225
4226 extern __at(0x0DAD) __sfr PWM2INTFLG;
4227
4228 typedef union
4229 {
4230 struct
4231 {
4232 unsigned PRIF : 1;
4233 unsigned DCIF : 1;
4234 unsigned PHIF : 1;
4235 unsigned OFIF : 1;
4236 unsigned : 1;
4237 unsigned : 1;
4238 unsigned : 1;
4239 unsigned : 1;
4240 };
4241
4242 struct
4243 {
4244 unsigned PWM2PRIF : 1;
4245 unsigned PWM2DCIF : 1;
4246 unsigned PWM2PHIF : 1;
4247 unsigned PWM2OFIF : 1;
4248 unsigned : 1;
4249 unsigned : 1;
4250 unsigned : 1;
4251 unsigned : 1;
4252 };
4253 } __PWM2INTFLGbits_t;
4254
4255 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
4256
4257 #define _PWM2INTFLG_PRIF 0x01
4258 #define _PWM2INTFLG_PWM2PRIF 0x01
4259 #define _PWM2INTFLG_DCIF 0x02
4260 #define _PWM2INTFLG_PWM2DCIF 0x02
4261 #define _PWM2INTFLG_PHIF 0x04
4262 #define _PWM2INTFLG_PWM2PHIF 0x04
4263 #define _PWM2INTFLG_OFIF 0x08
4264 #define _PWM2INTFLG_PWM2OFIF 0x08
4265
4266 //==============================================================================
4267
4268
4269 //==============================================================================
4270 // PWM2CLKCON Bits
4271
4272 extern __at(0x0DAE) __sfr PWM2CLKCON;
4273
4274 typedef union
4275 {
4276 struct
4277 {
4278 unsigned PWM2CS0 : 1;
4279 unsigned PWM2CS1 : 1;
4280 unsigned : 1;
4281 unsigned : 1;
4282 unsigned PWM2PS0 : 1;
4283 unsigned PWM2PS1 : 1;
4284 unsigned PWM2PS2 : 1;
4285 unsigned : 1;
4286 };
4287
4288 struct
4289 {
4290 unsigned CS0 : 1;
4291 unsigned CS1 : 1;
4292 unsigned : 1;
4293 unsigned : 1;
4294 unsigned PS0 : 1;
4295 unsigned PS1 : 1;
4296 unsigned PS2 : 1;
4297 unsigned : 1;
4298 };
4299
4300 struct
4301 {
4302 unsigned PWM2CS : 2;
4303 unsigned : 6;
4304 };
4305
4306 struct
4307 {
4308 unsigned CS : 2;
4309 unsigned : 6;
4310 };
4311
4312 struct
4313 {
4314 unsigned : 4;
4315 unsigned PWM2PS : 3;
4316 unsigned : 1;
4317 };
4318
4319 struct
4320 {
4321 unsigned : 4;
4322 unsigned PS : 3;
4323 unsigned : 1;
4324 };
4325 } __PWM2CLKCONbits_t;
4326
4327 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
4328
4329 #define _PWM2CLKCON_PWM2CS0 0x01
4330 #define _PWM2CLKCON_CS0 0x01
4331 #define _PWM2CLKCON_PWM2CS1 0x02
4332 #define _PWM2CLKCON_CS1 0x02
4333 #define _PWM2CLKCON_PWM2PS0 0x10
4334 #define _PWM2CLKCON_PS0 0x10
4335 #define _PWM2CLKCON_PWM2PS1 0x20
4336 #define _PWM2CLKCON_PS1 0x20
4337 #define _PWM2CLKCON_PWM2PS2 0x40
4338 #define _PWM2CLKCON_PS2 0x40
4339
4340 //==============================================================================
4341
4342
4343 //==============================================================================
4344 // PWM2LDCON Bits
4345
4346 extern __at(0x0DAF) __sfr PWM2LDCON;
4347
4348 typedef union
4349 {
4350 struct
4351 {
4352 unsigned PWM2LDS0 : 1;
4353 unsigned PWM2LDS1 : 1;
4354 unsigned : 1;
4355 unsigned : 1;
4356 unsigned : 1;
4357 unsigned : 1;
4358 unsigned LDT : 1;
4359 unsigned LDA : 1;
4360 };
4361
4362 struct
4363 {
4364 unsigned LDS0 : 1;
4365 unsigned LDS1 : 1;
4366 unsigned : 1;
4367 unsigned : 1;
4368 unsigned : 1;
4369 unsigned : 1;
4370 unsigned PWM2LDM : 1;
4371 unsigned PWM2LD : 1;
4372 };
4373
4374 struct
4375 {
4376 unsigned PWM2LDS : 2;
4377 unsigned : 6;
4378 };
4379
4380 struct
4381 {
4382 unsigned LDS : 2;
4383 unsigned : 6;
4384 };
4385 } __PWM2LDCONbits_t;
4386
4387 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
4388
4389 #define _PWM2LDCON_PWM2LDS0 0x01
4390 #define _PWM2LDCON_LDS0 0x01
4391 #define _PWM2LDCON_PWM2LDS1 0x02
4392 #define _PWM2LDCON_LDS1 0x02
4393 #define _PWM2LDCON_LDT 0x40
4394 #define _PWM2LDCON_PWM2LDM 0x40
4395 #define _PWM2LDCON_LDA 0x80
4396 #define _PWM2LDCON_PWM2LD 0x80
4397
4398 //==============================================================================
4399
4400
4401 //==============================================================================
4402 // PWM2OFCON Bits
4403
4404 extern __at(0x0DB0) __sfr PWM2OFCON;
4405
4406 typedef union
4407 {
4408 struct
4409 {
4410 unsigned PWM2OFS0 : 1;
4411 unsigned PWM2OFS1 : 1;
4412 unsigned : 1;
4413 unsigned : 1;
4414 unsigned OFO : 1;
4415 unsigned PWM2OFM0 : 1;
4416 unsigned PWM2OFM1 : 1;
4417 unsigned : 1;
4418 };
4419
4420 struct
4421 {
4422 unsigned OFS0 : 1;
4423 unsigned OFS1 : 1;
4424 unsigned : 1;
4425 unsigned : 1;
4426 unsigned PWM2OFMC : 1;
4427 unsigned OFM0 : 1;
4428 unsigned OFM1 : 1;
4429 unsigned : 1;
4430 };
4431
4432 struct
4433 {
4434 unsigned OFS : 2;
4435 unsigned : 6;
4436 };
4437
4438 struct
4439 {
4440 unsigned PWM2OFS : 2;
4441 unsigned : 6;
4442 };
4443
4444 struct
4445 {
4446 unsigned : 5;
4447 unsigned PWM2OFM : 2;
4448 unsigned : 1;
4449 };
4450
4451 struct
4452 {
4453 unsigned : 5;
4454 unsigned OFM : 2;
4455 unsigned : 1;
4456 };
4457 } __PWM2OFCONbits_t;
4458
4459 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
4460
4461 #define _PWM2OFCON_PWM2OFS0 0x01
4462 #define _PWM2OFCON_OFS0 0x01
4463 #define _PWM2OFCON_PWM2OFS1 0x02
4464 #define _PWM2OFCON_OFS1 0x02
4465 #define _PWM2OFCON_OFO 0x10
4466 #define _PWM2OFCON_PWM2OFMC 0x10
4467 #define _PWM2OFCON_PWM2OFM0 0x20
4468 #define _PWM2OFCON_OFM0 0x20
4469 #define _PWM2OFCON_PWM2OFM1 0x40
4470 #define _PWM2OFCON_OFM1 0x40
4471
4472 //==============================================================================
4473
4474 extern __at(0x0DB1) __sfr PWM3PH;
4475
4476 //==============================================================================
4477 // PWM3PHL Bits
4478
4479 extern __at(0x0DB1) __sfr PWM3PHL;
4480
4481 typedef struct
4482 {
4483 unsigned PWM3PHL0 : 1;
4484 unsigned PWM3PHL1 : 1;
4485 unsigned PWM3PHL2 : 1;
4486 unsigned PWM3PHL3 : 1;
4487 unsigned PWM3PHL4 : 1;
4488 unsigned PWM3PHL5 : 1;
4489 unsigned PWM3PHL6 : 1;
4490 unsigned PWM3PHL7 : 1;
4491 } __PWM3PHLbits_t;
4492
4493 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
4494
4495 #define _PWM3PHL0 0x01
4496 #define _PWM3PHL1 0x02
4497 #define _PWM3PHL2 0x04
4498 #define _PWM3PHL3 0x08
4499 #define _PWM3PHL4 0x10
4500 #define _PWM3PHL5 0x20
4501 #define _PWM3PHL6 0x40
4502 #define _PWM3PHL7 0x80
4503
4504 //==============================================================================
4505
4506
4507 //==============================================================================
4508 // PWM3PHH Bits
4509
4510 extern __at(0x0DB2) __sfr PWM3PHH;
4511
4512 typedef struct
4513 {
4514 unsigned PWM3PHH0 : 1;
4515 unsigned PWM3PHH1 : 1;
4516 unsigned PWM3PHH2 : 1;
4517 unsigned PWM3PHH3 : 1;
4518 unsigned PWM3PHH4 : 1;
4519 unsigned PWM3PHH5 : 1;
4520 unsigned PWM3PHH6 : 1;
4521 unsigned PWM3PHH7 : 1;
4522 } __PWM3PHHbits_t;
4523
4524 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
4525
4526 #define _PWM3PHH0 0x01
4527 #define _PWM3PHH1 0x02
4528 #define _PWM3PHH2 0x04
4529 #define _PWM3PHH3 0x08
4530 #define _PWM3PHH4 0x10
4531 #define _PWM3PHH5 0x20
4532 #define _PWM3PHH6 0x40
4533 #define _PWM3PHH7 0x80
4534
4535 //==============================================================================
4536
4537 extern __at(0x0DB3) __sfr PWM3DC;
4538
4539 //==============================================================================
4540 // PWM3DCL Bits
4541
4542 extern __at(0x0DB3) __sfr PWM3DCL;
4543
4544 typedef struct
4545 {
4546 unsigned PWM3DCL0 : 1;
4547 unsigned PWM3DCL1 : 1;
4548 unsigned PWM3DCL2 : 1;
4549 unsigned PWM3DCL3 : 1;
4550 unsigned PWM3DCL4 : 1;
4551 unsigned PWM3DCL5 : 1;
4552 unsigned PWM3DCL6 : 1;
4553 unsigned PWM3DCL7 : 1;
4554 } __PWM3DCLbits_t;
4555
4556 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
4557
4558 #define _PWM3DCL0 0x01
4559 #define _PWM3DCL1 0x02
4560 #define _PWM3DCL2 0x04
4561 #define _PWM3DCL3 0x08
4562 #define _PWM3DCL4 0x10
4563 #define _PWM3DCL5 0x20
4564 #define _PWM3DCL6 0x40
4565 #define _PWM3DCL7 0x80
4566
4567 //==============================================================================
4568
4569
4570 //==============================================================================
4571 // PWM3DCH Bits
4572
4573 extern __at(0x0DB4) __sfr PWM3DCH;
4574
4575 typedef struct
4576 {
4577 unsigned PWM3DCH0 : 1;
4578 unsigned PWM3DCH1 : 1;
4579 unsigned PWM3DCH2 : 1;
4580 unsigned PWM3DCH3 : 1;
4581 unsigned PWM3DCH4 : 1;
4582 unsigned PWM3DCH5 : 1;
4583 unsigned PWM3DCH6 : 1;
4584 unsigned PWM3DCH7 : 1;
4585 } __PWM3DCHbits_t;
4586
4587 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
4588
4589 #define _PWM3DCH0 0x01
4590 #define _PWM3DCH1 0x02
4591 #define _PWM3DCH2 0x04
4592 #define _PWM3DCH3 0x08
4593 #define _PWM3DCH4 0x10
4594 #define _PWM3DCH5 0x20
4595 #define _PWM3DCH6 0x40
4596 #define _PWM3DCH7 0x80
4597
4598 //==============================================================================
4599
4600 extern __at(0x0DB5) __sfr PWM3PR;
4601
4602 //==============================================================================
4603 // PWM3PRL Bits
4604
4605 extern __at(0x0DB5) __sfr PWM3PRL;
4606
4607 typedef struct
4608 {
4609 unsigned PWM3PRL0 : 1;
4610 unsigned PWM3PRL1 : 1;
4611 unsigned PWM3PRL2 : 1;
4612 unsigned PWM3PRL3 : 1;
4613 unsigned PWM3PRL4 : 1;
4614 unsigned PWM3PRL5 : 1;
4615 unsigned PWM3PRL6 : 1;
4616 unsigned PWM3PRL7 : 1;
4617 } __PWM3PRLbits_t;
4618
4619 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
4620
4621 #define _PWM3PRL0 0x01
4622 #define _PWM3PRL1 0x02
4623 #define _PWM3PRL2 0x04
4624 #define _PWM3PRL3 0x08
4625 #define _PWM3PRL4 0x10
4626 #define _PWM3PRL5 0x20
4627 #define _PWM3PRL6 0x40
4628 #define _PWM3PRL7 0x80
4629
4630 //==============================================================================
4631
4632
4633 //==============================================================================
4634 // PWM3PRH Bits
4635
4636 extern __at(0x0DB6) __sfr PWM3PRH;
4637
4638 typedef struct
4639 {
4640 unsigned PWM3PRH0 : 1;
4641 unsigned PWM3PRH1 : 1;
4642 unsigned PWM3PRH2 : 1;
4643 unsigned PWM3PRH3 : 1;
4644 unsigned PWM3PRH4 : 1;
4645 unsigned PWM3PRH5 : 1;
4646 unsigned PWM3PRH6 : 1;
4647 unsigned PWM3PRH7 : 1;
4648 } __PWM3PRHbits_t;
4649
4650 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
4651
4652 #define _PWM3PRH0 0x01
4653 #define _PWM3PRH1 0x02
4654 #define _PWM3PRH2 0x04
4655 #define _PWM3PRH3 0x08
4656 #define _PWM3PRH4 0x10
4657 #define _PWM3PRH5 0x20
4658 #define _PWM3PRH6 0x40
4659 #define _PWM3PRH7 0x80
4660
4661 //==============================================================================
4662
4663 extern __at(0x0DB7) __sfr PWM3OF;
4664
4665 //==============================================================================
4666 // PWM3OFL Bits
4667
4668 extern __at(0x0DB7) __sfr PWM3OFL;
4669
4670 typedef struct
4671 {
4672 unsigned PWM3OFL0 : 1;
4673 unsigned PWM3OFL1 : 1;
4674 unsigned PWM3OFL2 : 1;
4675 unsigned PWM3OFL3 : 1;
4676 unsigned PWM3OFL4 : 1;
4677 unsigned PWM3OFL5 : 1;
4678 unsigned PWM3OFL6 : 1;
4679 unsigned PWM3OFL7 : 1;
4680 } __PWM3OFLbits_t;
4681
4682 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
4683
4684 #define _PWM3OFL0 0x01
4685 #define _PWM3OFL1 0x02
4686 #define _PWM3OFL2 0x04
4687 #define _PWM3OFL3 0x08
4688 #define _PWM3OFL4 0x10
4689 #define _PWM3OFL5 0x20
4690 #define _PWM3OFL6 0x40
4691 #define _PWM3OFL7 0x80
4692
4693 //==============================================================================
4694
4695
4696 //==============================================================================
4697 // PWM3OFH Bits
4698
4699 extern __at(0x0DB8) __sfr PWM3OFH;
4700
4701 typedef struct
4702 {
4703 unsigned PWM3OFH0 : 1;
4704 unsigned PWM3OFH1 : 1;
4705 unsigned PWM3OFH2 : 1;
4706 unsigned PWM3OFH3 : 1;
4707 unsigned PWM3OFH4 : 1;
4708 unsigned PWM3OFH5 : 1;
4709 unsigned PWM3OFH6 : 1;
4710 unsigned PWM3OFH7 : 1;
4711 } __PWM3OFHbits_t;
4712
4713 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
4714
4715 #define _PWM3OFH0 0x01
4716 #define _PWM3OFH1 0x02
4717 #define _PWM3OFH2 0x04
4718 #define _PWM3OFH3 0x08
4719 #define _PWM3OFH4 0x10
4720 #define _PWM3OFH5 0x20
4721 #define _PWM3OFH6 0x40
4722 #define _PWM3OFH7 0x80
4723
4724 //==============================================================================
4725
4726 extern __at(0x0DB9) __sfr PWM3TMR;
4727
4728 //==============================================================================
4729 // PWM3TMRL Bits
4730
4731 extern __at(0x0DB9) __sfr PWM3TMRL;
4732
4733 typedef struct
4734 {
4735 unsigned PWM3TMRL0 : 1;
4736 unsigned PWM3TMRL1 : 1;
4737 unsigned PWM3TMRL2 : 1;
4738 unsigned PWM3TMRL3 : 1;
4739 unsigned PWM3TMRL4 : 1;
4740 unsigned PWM3TMRL5 : 1;
4741 unsigned PWM3TMRL6 : 1;
4742 unsigned PWM3TMRL7 : 1;
4743 } __PWM3TMRLbits_t;
4744
4745 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
4746
4747 #define _PWM3TMRL0 0x01
4748 #define _PWM3TMRL1 0x02
4749 #define _PWM3TMRL2 0x04
4750 #define _PWM3TMRL3 0x08
4751 #define _PWM3TMRL4 0x10
4752 #define _PWM3TMRL5 0x20
4753 #define _PWM3TMRL6 0x40
4754 #define _PWM3TMRL7 0x80
4755
4756 //==============================================================================
4757
4758
4759 //==============================================================================
4760 // PWM3TMRH Bits
4761
4762 extern __at(0x0DBA) __sfr PWM3TMRH;
4763
4764 typedef struct
4765 {
4766 unsigned PWM3TMRH0 : 1;
4767 unsigned PWM3TMRH1 : 1;
4768 unsigned PWM3TMRH2 : 1;
4769 unsigned PWM3TMRH3 : 1;
4770 unsigned PWM3TMRH4 : 1;
4771 unsigned PWM3TMRH5 : 1;
4772 unsigned PWM3TMRH6 : 1;
4773 unsigned PWM3TMRH7 : 1;
4774 } __PWM3TMRHbits_t;
4775
4776 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
4777
4778 #define _PWM3TMRH0 0x01
4779 #define _PWM3TMRH1 0x02
4780 #define _PWM3TMRH2 0x04
4781 #define _PWM3TMRH3 0x08
4782 #define _PWM3TMRH4 0x10
4783 #define _PWM3TMRH5 0x20
4784 #define _PWM3TMRH6 0x40
4785 #define _PWM3TMRH7 0x80
4786
4787 //==============================================================================
4788
4789
4790 //==============================================================================
4791 // PWM3CON Bits
4792
4793 extern __at(0x0DBB) __sfr PWM3CON;
4794
4795 typedef union
4796 {
4797 struct
4798 {
4799 unsigned : 1;
4800 unsigned : 1;
4801 unsigned PWM3MODE0 : 1;
4802 unsigned PWM3MODE1 : 1;
4803 unsigned POL : 1;
4804 unsigned OUT : 1;
4805 unsigned OE : 1;
4806 unsigned EN : 1;
4807 };
4808
4809 struct
4810 {
4811 unsigned : 1;
4812 unsigned : 1;
4813 unsigned MODE0 : 1;
4814 unsigned MODE1 : 1;
4815 unsigned PWM3POL : 1;
4816 unsigned PWM3OUT : 1;
4817 unsigned PWM3OE : 1;
4818 unsigned PWM3EN : 1;
4819 };
4820
4821 struct
4822 {
4823 unsigned : 2;
4824 unsigned MODE : 2;
4825 unsigned : 4;
4826 };
4827
4828 struct
4829 {
4830 unsigned : 2;
4831 unsigned PWM3MODE : 2;
4832 unsigned : 4;
4833 };
4834 } __PWM3CONbits_t;
4835
4836 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
4837
4838 #define _PWM3CON_PWM3MODE0 0x04
4839 #define _PWM3CON_MODE0 0x04
4840 #define _PWM3CON_PWM3MODE1 0x08
4841 #define _PWM3CON_MODE1 0x08
4842 #define _PWM3CON_POL 0x10
4843 #define _PWM3CON_PWM3POL 0x10
4844 #define _PWM3CON_OUT 0x20
4845 #define _PWM3CON_PWM3OUT 0x20
4846 #define _PWM3CON_OE 0x40
4847 #define _PWM3CON_PWM3OE 0x40
4848 #define _PWM3CON_EN 0x80
4849 #define _PWM3CON_PWM3EN 0x80
4850
4851 //==============================================================================
4852
4853
4854 //==============================================================================
4855 // PWM3INTCON Bits
4856
4857 extern __at(0x0DBC) __sfr PWM3INTCON;
4858
4859 typedef union
4860 {
4861 struct
4862 {
4863 unsigned PRIE : 1;
4864 unsigned DCIE : 1;
4865 unsigned PHIE : 1;
4866 unsigned OFIE : 1;
4867 unsigned : 1;
4868 unsigned : 1;
4869 unsigned : 1;
4870 unsigned : 1;
4871 };
4872
4873 struct
4874 {
4875 unsigned PWM3PRIE : 1;
4876 unsigned PWM3DCIE : 1;
4877 unsigned PWM3PHIE : 1;
4878 unsigned PWM3OFIE : 1;
4879 unsigned : 1;
4880 unsigned : 1;
4881 unsigned : 1;
4882 unsigned : 1;
4883 };
4884 } __PWM3INTCONbits_t;
4885
4886 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
4887
4888 #define _PWM3INTCON_PRIE 0x01
4889 #define _PWM3INTCON_PWM3PRIE 0x01
4890 #define _PWM3INTCON_DCIE 0x02
4891 #define _PWM3INTCON_PWM3DCIE 0x02
4892 #define _PWM3INTCON_PHIE 0x04
4893 #define _PWM3INTCON_PWM3PHIE 0x04
4894 #define _PWM3INTCON_OFIE 0x08
4895 #define _PWM3INTCON_PWM3OFIE 0x08
4896
4897 //==============================================================================
4898
4899
4900 //==============================================================================
4901 // PWM3INTE Bits
4902
4903 extern __at(0x0DBC) __sfr PWM3INTE;
4904
4905 typedef union
4906 {
4907 struct
4908 {
4909 unsigned PRIE : 1;
4910 unsigned DCIE : 1;
4911 unsigned PHIE : 1;
4912 unsigned OFIE : 1;
4913 unsigned : 1;
4914 unsigned : 1;
4915 unsigned : 1;
4916 unsigned : 1;
4917 };
4918
4919 struct
4920 {
4921 unsigned PWM3PRIE : 1;
4922 unsigned PWM3DCIE : 1;
4923 unsigned PWM3PHIE : 1;
4924 unsigned PWM3OFIE : 1;
4925 unsigned : 1;
4926 unsigned : 1;
4927 unsigned : 1;
4928 unsigned : 1;
4929 };
4930 } __PWM3INTEbits_t;
4931
4932 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
4933
4934 #define _PWM3INTE_PRIE 0x01
4935 #define _PWM3INTE_PWM3PRIE 0x01
4936 #define _PWM3INTE_DCIE 0x02
4937 #define _PWM3INTE_PWM3DCIE 0x02
4938 #define _PWM3INTE_PHIE 0x04
4939 #define _PWM3INTE_PWM3PHIE 0x04
4940 #define _PWM3INTE_OFIE 0x08
4941 #define _PWM3INTE_PWM3OFIE 0x08
4942
4943 //==============================================================================
4944
4945
4946 //==============================================================================
4947 // PWM3INTF Bits
4948
4949 extern __at(0x0DBD) __sfr PWM3INTF;
4950
4951 typedef union
4952 {
4953 struct
4954 {
4955 unsigned PRIF : 1;
4956 unsigned DCIF : 1;
4957 unsigned PHIF : 1;
4958 unsigned OFIF : 1;
4959 unsigned : 1;
4960 unsigned : 1;
4961 unsigned : 1;
4962 unsigned : 1;
4963 };
4964
4965 struct
4966 {
4967 unsigned PWM3PRIF : 1;
4968 unsigned PWM3DCIF : 1;
4969 unsigned PWM3PHIF : 1;
4970 unsigned PWM3OFIF : 1;
4971 unsigned : 1;
4972 unsigned : 1;
4973 unsigned : 1;
4974 unsigned : 1;
4975 };
4976 } __PWM3INTFbits_t;
4977
4978 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
4979
4980 #define _PWM3INTF_PRIF 0x01
4981 #define _PWM3INTF_PWM3PRIF 0x01
4982 #define _PWM3INTF_DCIF 0x02
4983 #define _PWM3INTF_PWM3DCIF 0x02
4984 #define _PWM3INTF_PHIF 0x04
4985 #define _PWM3INTF_PWM3PHIF 0x04
4986 #define _PWM3INTF_OFIF 0x08
4987 #define _PWM3INTF_PWM3OFIF 0x08
4988
4989 //==============================================================================
4990
4991
4992 //==============================================================================
4993 // PWM3INTFLG Bits
4994
4995 extern __at(0x0DBD) __sfr PWM3INTFLG;
4996
4997 typedef union
4998 {
4999 struct
5000 {
5001 unsigned PRIF : 1;
5002 unsigned DCIF : 1;
5003 unsigned PHIF : 1;
5004 unsigned OFIF : 1;
5005 unsigned : 1;
5006 unsigned : 1;
5007 unsigned : 1;
5008 unsigned : 1;
5009 };
5010
5011 struct
5012 {
5013 unsigned PWM3PRIF : 1;
5014 unsigned PWM3DCIF : 1;
5015 unsigned PWM3PHIF : 1;
5016 unsigned PWM3OFIF : 1;
5017 unsigned : 1;
5018 unsigned : 1;
5019 unsigned : 1;
5020 unsigned : 1;
5021 };
5022 } __PWM3INTFLGbits_t;
5023
5024 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
5025
5026 #define _PWM3INTFLG_PRIF 0x01
5027 #define _PWM3INTFLG_PWM3PRIF 0x01
5028 #define _PWM3INTFLG_DCIF 0x02
5029 #define _PWM3INTFLG_PWM3DCIF 0x02
5030 #define _PWM3INTFLG_PHIF 0x04
5031 #define _PWM3INTFLG_PWM3PHIF 0x04
5032 #define _PWM3INTFLG_OFIF 0x08
5033 #define _PWM3INTFLG_PWM3OFIF 0x08
5034
5035 //==============================================================================
5036
5037
5038 //==============================================================================
5039 // PWM3CLKCON Bits
5040
5041 extern __at(0x0DBE) __sfr PWM3CLKCON;
5042
5043 typedef union
5044 {
5045 struct
5046 {
5047 unsigned PWM3CS0 : 1;
5048 unsigned PWM3CS1 : 1;
5049 unsigned : 1;
5050 unsigned : 1;
5051 unsigned PWM3PS0 : 1;
5052 unsigned PWM3PS1 : 1;
5053 unsigned PWM3PS2 : 1;
5054 unsigned : 1;
5055 };
5056
5057 struct
5058 {
5059 unsigned CS0 : 1;
5060 unsigned CS1 : 1;
5061 unsigned : 1;
5062 unsigned : 1;
5063 unsigned PS0 : 1;
5064 unsigned PS1 : 1;
5065 unsigned PS2 : 1;
5066 unsigned : 1;
5067 };
5068
5069 struct
5070 {
5071 unsigned CS : 2;
5072 unsigned : 6;
5073 };
5074
5075 struct
5076 {
5077 unsigned PWM3CS : 2;
5078 unsigned : 6;
5079 };
5080
5081 struct
5082 {
5083 unsigned : 4;
5084 unsigned PS : 3;
5085 unsigned : 1;
5086 };
5087
5088 struct
5089 {
5090 unsigned : 4;
5091 unsigned PWM3PS : 3;
5092 unsigned : 1;
5093 };
5094 } __PWM3CLKCONbits_t;
5095
5096 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
5097
5098 #define _PWM3CLKCON_PWM3CS0 0x01
5099 #define _PWM3CLKCON_CS0 0x01
5100 #define _PWM3CLKCON_PWM3CS1 0x02
5101 #define _PWM3CLKCON_CS1 0x02
5102 #define _PWM3CLKCON_PWM3PS0 0x10
5103 #define _PWM3CLKCON_PS0 0x10
5104 #define _PWM3CLKCON_PWM3PS1 0x20
5105 #define _PWM3CLKCON_PS1 0x20
5106 #define _PWM3CLKCON_PWM3PS2 0x40
5107 #define _PWM3CLKCON_PS2 0x40
5108
5109 //==============================================================================
5110
5111
5112 //==============================================================================
5113 // PWM3LDCON Bits
5114
5115 extern __at(0x0DBF) __sfr PWM3LDCON;
5116
5117 typedef union
5118 {
5119 struct
5120 {
5121 unsigned PWM3LDS0 : 1;
5122 unsigned PWM3LDS1 : 1;
5123 unsigned : 1;
5124 unsigned : 1;
5125 unsigned : 1;
5126 unsigned : 1;
5127 unsigned LDT : 1;
5128 unsigned LDA : 1;
5129 };
5130
5131 struct
5132 {
5133 unsigned LDS0 : 1;
5134 unsigned LDS1 : 1;
5135 unsigned : 1;
5136 unsigned : 1;
5137 unsigned : 1;
5138 unsigned : 1;
5139 unsigned PWM3LDM : 1;
5140 unsigned PWM3LD : 1;
5141 };
5142
5143 struct
5144 {
5145 unsigned LDS : 2;
5146 unsigned : 6;
5147 };
5148
5149 struct
5150 {
5151 unsigned PWM3LDS : 2;
5152 unsigned : 6;
5153 };
5154 } __PWM3LDCONbits_t;
5155
5156 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
5157
5158 #define _PWM3LDCON_PWM3LDS0 0x01
5159 #define _PWM3LDCON_LDS0 0x01
5160 #define _PWM3LDCON_PWM3LDS1 0x02
5161 #define _PWM3LDCON_LDS1 0x02
5162 #define _PWM3LDCON_LDT 0x40
5163 #define _PWM3LDCON_PWM3LDM 0x40
5164 #define _PWM3LDCON_LDA 0x80
5165 #define _PWM3LDCON_PWM3LD 0x80
5166
5167 //==============================================================================
5168
5169
5170 //==============================================================================
5171 // PWM3OFCON Bits
5172
5173 extern __at(0x0DC0) __sfr PWM3OFCON;
5174
5175 typedef union
5176 {
5177 struct
5178 {
5179 unsigned PWM3OFS0 : 1;
5180 unsigned PWM3OFS1 : 1;
5181 unsigned : 1;
5182 unsigned : 1;
5183 unsigned OFO : 1;
5184 unsigned PWM3OFM0 : 1;
5185 unsigned PWM3OFM1 : 1;
5186 unsigned : 1;
5187 };
5188
5189 struct
5190 {
5191 unsigned OFS0 : 1;
5192 unsigned OFS1 : 1;
5193 unsigned : 1;
5194 unsigned : 1;
5195 unsigned PWM3OFMC : 1;
5196 unsigned OFM0 : 1;
5197 unsigned OFM1 : 1;
5198 unsigned : 1;
5199 };
5200
5201 struct
5202 {
5203 unsigned OFS : 2;
5204 unsigned : 6;
5205 };
5206
5207 struct
5208 {
5209 unsigned PWM3OFS : 2;
5210 unsigned : 6;
5211 };
5212
5213 struct
5214 {
5215 unsigned : 5;
5216 unsigned OFM : 2;
5217 unsigned : 1;
5218 };
5219
5220 struct
5221 {
5222 unsigned : 5;
5223 unsigned PWM3OFM : 2;
5224 unsigned : 1;
5225 };
5226 } __PWM3OFCONbits_t;
5227
5228 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
5229
5230 #define _PWM3OFCON_PWM3OFS0 0x01
5231 #define _PWM3OFCON_OFS0 0x01
5232 #define _PWM3OFCON_PWM3OFS1 0x02
5233 #define _PWM3OFCON_OFS1 0x02
5234 #define _PWM3OFCON_OFO 0x10
5235 #define _PWM3OFCON_PWM3OFMC 0x10
5236 #define _PWM3OFCON_PWM3OFM0 0x20
5237 #define _PWM3OFCON_OFM0 0x20
5238 #define _PWM3OFCON_PWM3OFM1 0x40
5239 #define _PWM3OFCON_OFM1 0x40
5240
5241 //==============================================================================
5242
5243 extern __at(0x0DC1) __sfr PWM4PH;
5244
5245 //==============================================================================
5246 // PWM4PHL Bits
5247
5248 extern __at(0x0DC1) __sfr PWM4PHL;
5249
5250 typedef struct
5251 {
5252 unsigned PWM4PHL0 : 1;
5253 unsigned PWM4PHL1 : 1;
5254 unsigned PWM4PHL2 : 1;
5255 unsigned PWM4PHL3 : 1;
5256 unsigned PWM4PHL4 : 1;
5257 unsigned PWM4PHL5 : 1;
5258 unsigned PWM4PHL6 : 1;
5259 unsigned PWM4PHL7 : 1;
5260 } __PWM4PHLbits_t;
5261
5262 extern __at(0x0DC1) volatile __PWM4PHLbits_t PWM4PHLbits;
5263
5264 #define _PWM4PHL0 0x01
5265 #define _PWM4PHL1 0x02
5266 #define _PWM4PHL2 0x04
5267 #define _PWM4PHL3 0x08
5268 #define _PWM4PHL4 0x10
5269 #define _PWM4PHL5 0x20
5270 #define _PWM4PHL6 0x40
5271 #define _PWM4PHL7 0x80
5272
5273 //==============================================================================
5274
5275
5276 //==============================================================================
5277 // PWM4PHH Bits
5278
5279 extern __at(0x0DC2) __sfr PWM4PHH;
5280
5281 typedef struct
5282 {
5283 unsigned PWM4PHH0 : 1;
5284 unsigned PWM4PHH1 : 1;
5285 unsigned PWM4PHH2 : 1;
5286 unsigned PWM4PHH3 : 1;
5287 unsigned PWM4PHH4 : 1;
5288 unsigned PWM4PHH5 : 1;
5289 unsigned PWM4PHH6 : 1;
5290 unsigned PWM4PHH7 : 1;
5291 } __PWM4PHHbits_t;
5292
5293 extern __at(0x0DC2) volatile __PWM4PHHbits_t PWM4PHHbits;
5294
5295 #define _PWM4PHH0 0x01
5296 #define _PWM4PHH1 0x02
5297 #define _PWM4PHH2 0x04
5298 #define _PWM4PHH3 0x08
5299 #define _PWM4PHH4 0x10
5300 #define _PWM4PHH5 0x20
5301 #define _PWM4PHH6 0x40
5302 #define _PWM4PHH7 0x80
5303
5304 //==============================================================================
5305
5306 extern __at(0x0DC3) __sfr PWM4DC;
5307
5308 //==============================================================================
5309 // PWM4DCL Bits
5310
5311 extern __at(0x0DC3) __sfr PWM4DCL;
5312
5313 typedef struct
5314 {
5315 unsigned PWM4DCL0 : 1;
5316 unsigned PWM4DCL1 : 1;
5317 unsigned PWM4DCL2 : 1;
5318 unsigned PWM4DCL3 : 1;
5319 unsigned PWM4DCL4 : 1;
5320 unsigned PWM4DCL5 : 1;
5321 unsigned PWM4DCL6 : 1;
5322 unsigned PWM4DCL7 : 1;
5323 } __PWM4DCLbits_t;
5324
5325 extern __at(0x0DC3) volatile __PWM4DCLbits_t PWM4DCLbits;
5326
5327 #define _PWM4DCL0 0x01
5328 #define _PWM4DCL1 0x02
5329 #define _PWM4DCL2 0x04
5330 #define _PWM4DCL3 0x08
5331 #define _PWM4DCL4 0x10
5332 #define _PWM4DCL5 0x20
5333 #define _PWM4DCL6 0x40
5334 #define _PWM4DCL7 0x80
5335
5336 //==============================================================================
5337
5338
5339 //==============================================================================
5340 // PWM4DCH Bits
5341
5342 extern __at(0x0DC4) __sfr PWM4DCH;
5343
5344 typedef struct
5345 {
5346 unsigned PWM4DCH0 : 1;
5347 unsigned PWM4DCH1 : 1;
5348 unsigned PWM4DCH2 : 1;
5349 unsigned PWM4DCH3 : 1;
5350 unsigned PWM4DCH4 : 1;
5351 unsigned PWM4DCH5 : 1;
5352 unsigned PWM4DCH6 : 1;
5353 unsigned PWM4DCH7 : 1;
5354 } __PWM4DCHbits_t;
5355
5356 extern __at(0x0DC4) volatile __PWM4DCHbits_t PWM4DCHbits;
5357
5358 #define _PWM4DCH0 0x01
5359 #define _PWM4DCH1 0x02
5360 #define _PWM4DCH2 0x04
5361 #define _PWM4DCH3 0x08
5362 #define _PWM4DCH4 0x10
5363 #define _PWM4DCH5 0x20
5364 #define _PWM4DCH6 0x40
5365 #define _PWM4DCH7 0x80
5366
5367 //==============================================================================
5368
5369 extern __at(0x0DC5) __sfr PWM4PR;
5370
5371 //==============================================================================
5372 // PWM4PRL Bits
5373
5374 extern __at(0x0DC5) __sfr PWM4PRL;
5375
5376 typedef struct
5377 {
5378 unsigned PWM4PRL0 : 1;
5379 unsigned PWM4PRL1 : 1;
5380 unsigned PWM4PRL2 : 1;
5381 unsigned PWM4PRL3 : 1;
5382 unsigned PWM4PRL4 : 1;
5383 unsigned PWM4PRL5 : 1;
5384 unsigned PWM4PRL6 : 1;
5385 unsigned PWM4PRL7 : 1;
5386 } __PWM4PRLbits_t;
5387
5388 extern __at(0x0DC5) volatile __PWM4PRLbits_t PWM4PRLbits;
5389
5390 #define _PWM4PRL0 0x01
5391 #define _PWM4PRL1 0x02
5392 #define _PWM4PRL2 0x04
5393 #define _PWM4PRL3 0x08
5394 #define _PWM4PRL4 0x10
5395 #define _PWM4PRL5 0x20
5396 #define _PWM4PRL6 0x40
5397 #define _PWM4PRL7 0x80
5398
5399 //==============================================================================
5400
5401
5402 //==============================================================================
5403 // PWM4PRH Bits
5404
5405 extern __at(0x0DC6) __sfr PWM4PRH;
5406
5407 typedef struct
5408 {
5409 unsigned PWM4PRH0 : 1;
5410 unsigned PWM4PRH1 : 1;
5411 unsigned PWM4PRH2 : 1;
5412 unsigned PWM4PRH3 : 1;
5413 unsigned PWM4PRH4 : 1;
5414 unsigned PWM4PRH5 : 1;
5415 unsigned PWM4PRH6 : 1;
5416 unsigned PWM4PRH7 : 1;
5417 } __PWM4PRHbits_t;
5418
5419 extern __at(0x0DC6) volatile __PWM4PRHbits_t PWM4PRHbits;
5420
5421 #define _PWM4PRH0 0x01
5422 #define _PWM4PRH1 0x02
5423 #define _PWM4PRH2 0x04
5424 #define _PWM4PRH3 0x08
5425 #define _PWM4PRH4 0x10
5426 #define _PWM4PRH5 0x20
5427 #define _PWM4PRH6 0x40
5428 #define _PWM4PRH7 0x80
5429
5430 //==============================================================================
5431
5432 extern __at(0x0DC7) __sfr PWM4OF;
5433
5434 //==============================================================================
5435 // PWM4OFL Bits
5436
5437 extern __at(0x0DC7) __sfr PWM4OFL;
5438
5439 typedef struct
5440 {
5441 unsigned PWM4OFL0 : 1;
5442 unsigned PWM4OFL1 : 1;
5443 unsigned PWM4OFL2 : 1;
5444 unsigned PWM4OFL3 : 1;
5445 unsigned PWM4OFL4 : 1;
5446 unsigned PWM4OFL5 : 1;
5447 unsigned PWM4OFL6 : 1;
5448 unsigned PWM4OFL7 : 1;
5449 } __PWM4OFLbits_t;
5450
5451 extern __at(0x0DC7) volatile __PWM4OFLbits_t PWM4OFLbits;
5452
5453 #define _PWM4OFL0 0x01
5454 #define _PWM4OFL1 0x02
5455 #define _PWM4OFL2 0x04
5456 #define _PWM4OFL3 0x08
5457 #define _PWM4OFL4 0x10
5458 #define _PWM4OFL5 0x20
5459 #define _PWM4OFL6 0x40
5460 #define _PWM4OFL7 0x80
5461
5462 //==============================================================================
5463
5464
5465 //==============================================================================
5466 // PWM4OFH Bits
5467
5468 extern __at(0x0DC8) __sfr PWM4OFH;
5469
5470 typedef struct
5471 {
5472 unsigned PWM4OFH0 : 1;
5473 unsigned PWM4OFH1 : 1;
5474 unsigned PWM4OFH2 : 1;
5475 unsigned PWM4OFH3 : 1;
5476 unsigned PWM4OFH4 : 1;
5477 unsigned PWM4OFH5 : 1;
5478 unsigned PWM4OFH6 : 1;
5479 unsigned PWM4OFH7 : 1;
5480 } __PWM4OFHbits_t;
5481
5482 extern __at(0x0DC8) volatile __PWM4OFHbits_t PWM4OFHbits;
5483
5484 #define _PWM4OFH0 0x01
5485 #define _PWM4OFH1 0x02
5486 #define _PWM4OFH2 0x04
5487 #define _PWM4OFH3 0x08
5488 #define _PWM4OFH4 0x10
5489 #define _PWM4OFH5 0x20
5490 #define _PWM4OFH6 0x40
5491 #define _PWM4OFH7 0x80
5492
5493 //==============================================================================
5494
5495 extern __at(0x0DC9) __sfr PWM4TMR;
5496
5497 //==============================================================================
5498 // PWM4TMRL Bits
5499
5500 extern __at(0x0DC9) __sfr PWM4TMRL;
5501
5502 typedef struct
5503 {
5504 unsigned PWM4TMRL0 : 1;
5505 unsigned PWM4TMRL1 : 1;
5506 unsigned PWM4TMRL2 : 1;
5507 unsigned PWM4TMRL3 : 1;
5508 unsigned PWM4TMRL4 : 1;
5509 unsigned PWM4TMRL5 : 1;
5510 unsigned PWM4TMRL6 : 1;
5511 unsigned PWM4TMRL7 : 1;
5512 } __PWM4TMRLbits_t;
5513
5514 extern __at(0x0DC9) volatile __PWM4TMRLbits_t PWM4TMRLbits;
5515
5516 #define _PWM4TMRL0 0x01
5517 #define _PWM4TMRL1 0x02
5518 #define _PWM4TMRL2 0x04
5519 #define _PWM4TMRL3 0x08
5520 #define _PWM4TMRL4 0x10
5521 #define _PWM4TMRL5 0x20
5522 #define _PWM4TMRL6 0x40
5523 #define _PWM4TMRL7 0x80
5524
5525 //==============================================================================
5526
5527
5528 //==============================================================================
5529 // PWM4TMRH Bits
5530
5531 extern __at(0x0DCA) __sfr PWM4TMRH;
5532
5533 typedef struct
5534 {
5535 unsigned PWM4TMRH0 : 1;
5536 unsigned PWM4TMRH1 : 1;
5537 unsigned PWM4TMRH2 : 1;
5538 unsigned PWM4TMRH3 : 1;
5539 unsigned PWM4TMRH4 : 1;
5540 unsigned PWM4TMRH5 : 1;
5541 unsigned PWM4TMRH6 : 1;
5542 unsigned PWM4TMRH7 : 1;
5543 } __PWM4TMRHbits_t;
5544
5545 extern __at(0x0DCA) volatile __PWM4TMRHbits_t PWM4TMRHbits;
5546
5547 #define _PWM4TMRH0 0x01
5548 #define _PWM4TMRH1 0x02
5549 #define _PWM4TMRH2 0x04
5550 #define _PWM4TMRH3 0x08
5551 #define _PWM4TMRH4 0x10
5552 #define _PWM4TMRH5 0x20
5553 #define _PWM4TMRH6 0x40
5554 #define _PWM4TMRH7 0x80
5555
5556 //==============================================================================
5557
5558
5559 //==============================================================================
5560 // PWM4CON Bits
5561
5562 extern __at(0x0DCB) __sfr PWM4CON;
5563
5564 typedef union
5565 {
5566 struct
5567 {
5568 unsigned : 1;
5569 unsigned : 1;
5570 unsigned PWM4MODE0 : 1;
5571 unsigned PWM4MODE1 : 1;
5572 unsigned POL : 1;
5573 unsigned OUT : 1;
5574 unsigned OE : 1;
5575 unsigned EN : 1;
5576 };
5577
5578 struct
5579 {
5580 unsigned : 1;
5581 unsigned : 1;
5582 unsigned MODE0 : 1;
5583 unsigned MODE1 : 1;
5584 unsigned PWM4POL : 1;
5585 unsigned PWM4OUT : 1;
5586 unsigned PWM4OE : 1;
5587 unsigned PWM4EN : 1;
5588 };
5589
5590 struct
5591 {
5592 unsigned : 2;
5593 unsigned MODE : 2;
5594 unsigned : 4;
5595 };
5596
5597 struct
5598 {
5599 unsigned : 2;
5600 unsigned PWM4MODE : 2;
5601 unsigned : 4;
5602 };
5603 } __PWM4CONbits_t;
5604
5605 extern __at(0x0DCB) volatile __PWM4CONbits_t PWM4CONbits;
5606
5607 #define _PWM4CON_PWM4MODE0 0x04
5608 #define _PWM4CON_MODE0 0x04
5609 #define _PWM4CON_PWM4MODE1 0x08
5610 #define _PWM4CON_MODE1 0x08
5611 #define _PWM4CON_POL 0x10
5612 #define _PWM4CON_PWM4POL 0x10
5613 #define _PWM4CON_OUT 0x20
5614 #define _PWM4CON_PWM4OUT 0x20
5615 #define _PWM4CON_OE 0x40
5616 #define _PWM4CON_PWM4OE 0x40
5617 #define _PWM4CON_EN 0x80
5618 #define _PWM4CON_PWM4EN 0x80
5619
5620 //==============================================================================
5621
5622
5623 //==============================================================================
5624 // PWM4INTCON Bits
5625
5626 extern __at(0x0DCC) __sfr PWM4INTCON;
5627
5628 typedef union
5629 {
5630 struct
5631 {
5632 unsigned PRIE : 1;
5633 unsigned DCIE : 1;
5634 unsigned PHIE : 1;
5635 unsigned OFIE : 1;
5636 unsigned : 1;
5637 unsigned : 1;
5638 unsigned : 1;
5639 unsigned : 1;
5640 };
5641
5642 struct
5643 {
5644 unsigned PWM4PRIE : 1;
5645 unsigned PWM4DCIE : 1;
5646 unsigned PWM4PHIE : 1;
5647 unsigned PWM4OFIE : 1;
5648 unsigned : 1;
5649 unsigned : 1;
5650 unsigned : 1;
5651 unsigned : 1;
5652 };
5653 } __PWM4INTCONbits_t;
5654
5655 extern __at(0x0DCC) volatile __PWM4INTCONbits_t PWM4INTCONbits;
5656
5657 #define _PWM4INTCON_PRIE 0x01
5658 #define _PWM4INTCON_PWM4PRIE 0x01
5659 #define _PWM4INTCON_DCIE 0x02
5660 #define _PWM4INTCON_PWM4DCIE 0x02
5661 #define _PWM4INTCON_PHIE 0x04
5662 #define _PWM4INTCON_PWM4PHIE 0x04
5663 #define _PWM4INTCON_OFIE 0x08
5664 #define _PWM4INTCON_PWM4OFIE 0x08
5665
5666 //==============================================================================
5667
5668
5669 //==============================================================================
5670 // PWM4INTE Bits
5671
5672 extern __at(0x0DCC) __sfr PWM4INTE;
5673
5674 typedef union
5675 {
5676 struct
5677 {
5678 unsigned PRIE : 1;
5679 unsigned DCIE : 1;
5680 unsigned PHIE : 1;
5681 unsigned OFIE : 1;
5682 unsigned : 1;
5683 unsigned : 1;
5684 unsigned : 1;
5685 unsigned : 1;
5686 };
5687
5688 struct
5689 {
5690 unsigned PWM4PRIE : 1;
5691 unsigned PWM4DCIE : 1;
5692 unsigned PWM4PHIE : 1;
5693 unsigned PWM4OFIE : 1;
5694 unsigned : 1;
5695 unsigned : 1;
5696 unsigned : 1;
5697 unsigned : 1;
5698 };
5699 } __PWM4INTEbits_t;
5700
5701 extern __at(0x0DCC) volatile __PWM4INTEbits_t PWM4INTEbits;
5702
5703 #define _PWM4INTE_PRIE 0x01
5704 #define _PWM4INTE_PWM4PRIE 0x01
5705 #define _PWM4INTE_DCIE 0x02
5706 #define _PWM4INTE_PWM4DCIE 0x02
5707 #define _PWM4INTE_PHIE 0x04
5708 #define _PWM4INTE_PWM4PHIE 0x04
5709 #define _PWM4INTE_OFIE 0x08
5710 #define _PWM4INTE_PWM4OFIE 0x08
5711
5712 //==============================================================================
5713
5714
5715 //==============================================================================
5716 // PWM4INTF Bits
5717
5718 extern __at(0x0DCD) __sfr PWM4INTF;
5719
5720 typedef union
5721 {
5722 struct
5723 {
5724 unsigned PRIF : 1;
5725 unsigned DCIF : 1;
5726 unsigned PHIF : 1;
5727 unsigned OFIF : 1;
5728 unsigned : 1;
5729 unsigned : 1;
5730 unsigned : 1;
5731 unsigned : 1;
5732 };
5733
5734 struct
5735 {
5736 unsigned PWM4PRIF : 1;
5737 unsigned PWM4DCIF : 1;
5738 unsigned PWM4PHIF : 1;
5739 unsigned PWM4OFIF : 1;
5740 unsigned : 1;
5741 unsigned : 1;
5742 unsigned : 1;
5743 unsigned : 1;
5744 };
5745 } __PWM4INTFbits_t;
5746
5747 extern __at(0x0DCD) volatile __PWM4INTFbits_t PWM4INTFbits;
5748
5749 #define _PWM4INTF_PRIF 0x01
5750 #define _PWM4INTF_PWM4PRIF 0x01
5751 #define _PWM4INTF_DCIF 0x02
5752 #define _PWM4INTF_PWM4DCIF 0x02
5753 #define _PWM4INTF_PHIF 0x04
5754 #define _PWM4INTF_PWM4PHIF 0x04
5755 #define _PWM4INTF_OFIF 0x08
5756 #define _PWM4INTF_PWM4OFIF 0x08
5757
5758 //==============================================================================
5759
5760
5761 //==============================================================================
5762 // PWM4INTFLG Bits
5763
5764 extern __at(0x0DCD) __sfr PWM4INTFLG;
5765
5766 typedef union
5767 {
5768 struct
5769 {
5770 unsigned PRIF : 1;
5771 unsigned DCIF : 1;
5772 unsigned PHIF : 1;
5773 unsigned OFIF : 1;
5774 unsigned : 1;
5775 unsigned : 1;
5776 unsigned : 1;
5777 unsigned : 1;
5778 };
5779
5780 struct
5781 {
5782 unsigned PWM4PRIF : 1;
5783 unsigned PWM4DCIF : 1;
5784 unsigned PWM4PHIF : 1;
5785 unsigned PWM4OFIF : 1;
5786 unsigned : 1;
5787 unsigned : 1;
5788 unsigned : 1;
5789 unsigned : 1;
5790 };
5791 } __PWM4INTFLGbits_t;
5792
5793 extern __at(0x0DCD) volatile __PWM4INTFLGbits_t PWM4INTFLGbits;
5794
5795 #define _PWM4INTFLG_PRIF 0x01
5796 #define _PWM4INTFLG_PWM4PRIF 0x01
5797 #define _PWM4INTFLG_DCIF 0x02
5798 #define _PWM4INTFLG_PWM4DCIF 0x02
5799 #define _PWM4INTFLG_PHIF 0x04
5800 #define _PWM4INTFLG_PWM4PHIF 0x04
5801 #define _PWM4INTFLG_OFIF 0x08
5802 #define _PWM4INTFLG_PWM4OFIF 0x08
5803
5804 //==============================================================================
5805
5806
5807 //==============================================================================
5808 // PWM4CLKCON Bits
5809
5810 extern __at(0x0DCE) __sfr PWM4CLKCON;
5811
5812 typedef union
5813 {
5814 struct
5815 {
5816 unsigned PWM4CS0 : 1;
5817 unsigned PWM4CS1 : 1;
5818 unsigned : 1;
5819 unsigned : 1;
5820 unsigned PWM4PS0 : 1;
5821 unsigned PWM4PS1 : 1;
5822 unsigned PWM4PS2 : 1;
5823 unsigned : 1;
5824 };
5825
5826 struct
5827 {
5828 unsigned CS0 : 1;
5829 unsigned CS1 : 1;
5830 unsigned : 1;
5831 unsigned : 1;
5832 unsigned PS0 : 1;
5833 unsigned PS1 : 1;
5834 unsigned PS2 : 1;
5835 unsigned : 1;
5836 };
5837
5838 struct
5839 {
5840 unsigned PWM4CS : 2;
5841 unsigned : 6;
5842 };
5843
5844 struct
5845 {
5846 unsigned CS : 2;
5847 unsigned : 6;
5848 };
5849
5850 struct
5851 {
5852 unsigned : 4;
5853 unsigned PWM4PS : 3;
5854 unsigned : 1;
5855 };
5856
5857 struct
5858 {
5859 unsigned : 4;
5860 unsigned PS : 3;
5861 unsigned : 1;
5862 };
5863 } __PWM4CLKCONbits_t;
5864
5865 extern __at(0x0DCE) volatile __PWM4CLKCONbits_t PWM4CLKCONbits;
5866
5867 #define _PWM4CLKCON_PWM4CS0 0x01
5868 #define _PWM4CLKCON_CS0 0x01
5869 #define _PWM4CLKCON_PWM4CS1 0x02
5870 #define _PWM4CLKCON_CS1 0x02
5871 #define _PWM4CLKCON_PWM4PS0 0x10
5872 #define _PWM4CLKCON_PS0 0x10
5873 #define _PWM4CLKCON_PWM4PS1 0x20
5874 #define _PWM4CLKCON_PS1 0x20
5875 #define _PWM4CLKCON_PWM4PS2 0x40
5876 #define _PWM4CLKCON_PS2 0x40
5877
5878 //==============================================================================
5879
5880
5881 //==============================================================================
5882 // PWM4LDCON Bits
5883
5884 extern __at(0x0DCF) __sfr PWM4LDCON;
5885
5886 typedef union
5887 {
5888 struct
5889 {
5890 unsigned PWM4LDS0 : 1;
5891 unsigned PWM4LDS1 : 1;
5892 unsigned : 1;
5893 unsigned : 1;
5894 unsigned : 1;
5895 unsigned : 1;
5896 unsigned LDT : 1;
5897 unsigned LDA : 1;
5898 };
5899
5900 struct
5901 {
5902 unsigned LDS0 : 1;
5903 unsigned LDS1 : 1;
5904 unsigned : 1;
5905 unsigned : 1;
5906 unsigned : 1;
5907 unsigned : 1;
5908 unsigned PWM4LDM : 1;
5909 unsigned PWM4LD : 1;
5910 };
5911
5912 struct
5913 {
5914 unsigned PWM4LDS : 2;
5915 unsigned : 6;
5916 };
5917
5918 struct
5919 {
5920 unsigned LDS : 2;
5921 unsigned : 6;
5922 };
5923 } __PWM4LDCONbits_t;
5924
5925 extern __at(0x0DCF) volatile __PWM4LDCONbits_t PWM4LDCONbits;
5926
5927 #define _PWM4LDCON_PWM4LDS0 0x01
5928 #define _PWM4LDCON_LDS0 0x01
5929 #define _PWM4LDCON_PWM4LDS1 0x02
5930 #define _PWM4LDCON_LDS1 0x02
5931 #define _PWM4LDCON_LDT 0x40
5932 #define _PWM4LDCON_PWM4LDM 0x40
5933 #define _PWM4LDCON_LDA 0x80
5934 #define _PWM4LDCON_PWM4LD 0x80
5935
5936 //==============================================================================
5937
5938
5939 //==============================================================================
5940 // PWM4OFCON Bits
5941
5942 extern __at(0x0DD0) __sfr PWM4OFCON;
5943
5944 typedef union
5945 {
5946 struct
5947 {
5948 unsigned PWM4OFS0 : 1;
5949 unsigned PWM4OFS1 : 1;
5950 unsigned : 1;
5951 unsigned : 1;
5952 unsigned OFO : 1;
5953 unsigned PWM4OFM0 : 1;
5954 unsigned PWM4OFM1 : 1;
5955 unsigned : 1;
5956 };
5957
5958 struct
5959 {
5960 unsigned OFS0 : 1;
5961 unsigned OFS1 : 1;
5962 unsigned : 1;
5963 unsigned : 1;
5964 unsigned PWM4OFMC : 1;
5965 unsigned OFM0 : 1;
5966 unsigned OFM1 : 1;
5967 unsigned : 1;
5968 };
5969
5970 struct
5971 {
5972 unsigned OFS : 2;
5973 unsigned : 6;
5974 };
5975
5976 struct
5977 {
5978 unsigned PWM4OFS : 2;
5979 unsigned : 6;
5980 };
5981
5982 struct
5983 {
5984 unsigned : 5;
5985 unsigned OFM : 2;
5986 unsigned : 1;
5987 };
5988
5989 struct
5990 {
5991 unsigned : 5;
5992 unsigned PWM4OFM : 2;
5993 unsigned : 1;
5994 };
5995 } __PWM4OFCONbits_t;
5996
5997 extern __at(0x0DD0) volatile __PWM4OFCONbits_t PWM4OFCONbits;
5998
5999 #define _PWM4OFCON_PWM4OFS0 0x01
6000 #define _PWM4OFCON_OFS0 0x01
6001 #define _PWM4OFCON_PWM4OFS1 0x02
6002 #define _PWM4OFCON_OFS1 0x02
6003 #define _PWM4OFCON_OFO 0x10
6004 #define _PWM4OFCON_PWM4OFMC 0x10
6005 #define _PWM4OFCON_PWM4OFM0 0x20
6006 #define _PWM4OFCON_OFM0 0x20
6007 #define _PWM4OFCON_PWM4OFM1 0x40
6008 #define _PWM4OFCON_OFM1 0x40
6009
6010 //==============================================================================
6011
6012
6013 //==============================================================================
6014 // PPSLOCK Bits
6015
6016 extern __at(0x0E0F) __sfr PPSLOCK;
6017
6018 typedef struct
6019 {
6020 unsigned PPSLOCKED : 1;
6021 unsigned : 1;
6022 unsigned : 1;
6023 unsigned : 1;
6024 unsigned : 1;
6025 unsigned : 1;
6026 unsigned : 1;
6027 unsigned : 1;
6028 } __PPSLOCKbits_t;
6029
6030 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits;
6031
6032 #define _PPSLOCKED 0x01
6033
6034 //==============================================================================
6035
6036
6037 //==============================================================================
6038 // INTPPS Bits
6039
6040 extern __at(0x0E10) __sfr INTPPS;
6041
6042 typedef union
6043 {
6044 struct
6045 {
6046 unsigned INTPPS0 : 1;
6047 unsigned INTPPS1 : 1;
6048 unsigned INTPPS2 : 1;
6049 unsigned INTPPS3 : 1;
6050 unsigned INTPPS4 : 1;
6051 unsigned : 1;
6052 unsigned : 1;
6053 unsigned : 1;
6054 };
6055
6056 struct
6057 {
6058 unsigned INTPPS : 5;
6059 unsigned : 3;
6060 };
6061 } __INTPPSbits_t;
6062
6063 extern __at(0x0E10) volatile __INTPPSbits_t INTPPSbits;
6064
6065 #define _INTPPS0 0x01
6066 #define _INTPPS1 0x02
6067 #define _INTPPS2 0x04
6068 #define _INTPPS3 0x08
6069 #define _INTPPS4 0x10
6070
6071 //==============================================================================
6072
6073
6074 //==============================================================================
6075 // T0CKIPPS Bits
6076
6077 extern __at(0x0E11) __sfr T0CKIPPS;
6078
6079 typedef union
6080 {
6081 struct
6082 {
6083 unsigned T0CKIPPS0 : 1;
6084 unsigned T0CKIPPS1 : 1;
6085 unsigned T0CKIPPS2 : 1;
6086 unsigned T0CKIPPS3 : 1;
6087 unsigned T0CKIPPS4 : 1;
6088 unsigned : 1;
6089 unsigned : 1;
6090 unsigned : 1;
6091 };
6092
6093 struct
6094 {
6095 unsigned T0CKIPPS : 5;
6096 unsigned : 3;
6097 };
6098 } __T0CKIPPSbits_t;
6099
6100 extern __at(0x0E11) volatile __T0CKIPPSbits_t T0CKIPPSbits;
6101
6102 #define _T0CKIPPS0 0x01
6103 #define _T0CKIPPS1 0x02
6104 #define _T0CKIPPS2 0x04
6105 #define _T0CKIPPS3 0x08
6106 #define _T0CKIPPS4 0x10
6107
6108 //==============================================================================
6109
6110
6111 //==============================================================================
6112 // T1CKIPPS Bits
6113
6114 extern __at(0x0E12) __sfr T1CKIPPS;
6115
6116 typedef union
6117 {
6118 struct
6119 {
6120 unsigned T1CKIPPS0 : 1;
6121 unsigned T1CKIPPS1 : 1;
6122 unsigned T1CKIPPS2 : 1;
6123 unsigned T1CKIPPS3 : 1;
6124 unsigned T1CKIPPS4 : 1;
6125 unsigned : 1;
6126 unsigned : 1;
6127 unsigned : 1;
6128 };
6129
6130 struct
6131 {
6132 unsigned T1CKIPPS : 5;
6133 unsigned : 3;
6134 };
6135 } __T1CKIPPSbits_t;
6136
6137 extern __at(0x0E12) volatile __T1CKIPPSbits_t T1CKIPPSbits;
6138
6139 #define _T1CKIPPS0 0x01
6140 #define _T1CKIPPS1 0x02
6141 #define _T1CKIPPS2 0x04
6142 #define _T1CKIPPS3 0x08
6143 #define _T1CKIPPS4 0x10
6144
6145 //==============================================================================
6146
6147
6148 //==============================================================================
6149 // T1GPPS Bits
6150
6151 extern __at(0x0E13) __sfr T1GPPS;
6152
6153 typedef union
6154 {
6155 struct
6156 {
6157 unsigned T1GPPS0 : 1;
6158 unsigned T1GPPS1 : 1;
6159 unsigned T1GPPS2 : 1;
6160 unsigned T1GPPS3 : 1;
6161 unsigned T1GPPS4 : 1;
6162 unsigned : 1;
6163 unsigned : 1;
6164 unsigned : 1;
6165 };
6166
6167 struct
6168 {
6169 unsigned T1GPPS : 5;
6170 unsigned : 3;
6171 };
6172 } __T1GPPSbits_t;
6173
6174 extern __at(0x0E13) volatile __T1GPPSbits_t T1GPPSbits;
6175
6176 #define _T1GPPS0 0x01
6177 #define _T1GPPS1 0x02
6178 #define _T1GPPS2 0x04
6179 #define _T1GPPS3 0x08
6180 #define _T1GPPS4 0x10
6181
6182 //==============================================================================
6183
6184
6185 //==============================================================================
6186 // CWG1INPPS Bits
6187
6188 extern __at(0x0E14) __sfr CWG1INPPS;
6189
6190 typedef union
6191 {
6192 struct
6193 {
6194 unsigned CWG1INPPS0 : 1;
6195 unsigned CWG1INPPS1 : 1;
6196 unsigned CWG1INPPS2 : 1;
6197 unsigned CWG1INPPS3 : 1;
6198 unsigned CWG1INPPS4 : 1;
6199 unsigned : 1;
6200 unsigned : 1;
6201 unsigned : 1;
6202 };
6203
6204 struct
6205 {
6206 unsigned CWG1INPPS : 5;
6207 unsigned : 3;
6208 };
6209 } __CWG1INPPSbits_t;
6210
6211 extern __at(0x0E14) volatile __CWG1INPPSbits_t CWG1INPPSbits;
6212
6213 #define _CWG1INPPS0 0x01
6214 #define _CWG1INPPS1 0x02
6215 #define _CWG1INPPS2 0x04
6216 #define _CWG1INPPS3 0x08
6217 #define _CWG1INPPS4 0x10
6218
6219 //==============================================================================
6220
6221
6222 //==============================================================================
6223 // RXPPS Bits
6224
6225 extern __at(0x0E15) __sfr RXPPS;
6226
6227 typedef union
6228 {
6229 struct
6230 {
6231 unsigned RXPPS0 : 1;
6232 unsigned RXPPS1 : 1;
6233 unsigned RXPPS2 : 1;
6234 unsigned RXPPS3 : 1;
6235 unsigned RXPPS4 : 1;
6236 unsigned : 1;
6237 unsigned : 1;
6238 unsigned : 1;
6239 };
6240
6241 struct
6242 {
6243 unsigned RXPPS : 5;
6244 unsigned : 3;
6245 };
6246 } __RXPPSbits_t;
6247
6248 extern __at(0x0E15) volatile __RXPPSbits_t RXPPSbits;
6249
6250 #define _RXPPS0 0x01
6251 #define _RXPPS1 0x02
6252 #define _RXPPS2 0x04
6253 #define _RXPPS3 0x08
6254 #define _RXPPS4 0x10
6255
6256 //==============================================================================
6257
6258
6259 //==============================================================================
6260 // CKPPS Bits
6261
6262 extern __at(0x0E16) __sfr CKPPS;
6263
6264 typedef union
6265 {
6266 struct
6267 {
6268 unsigned CKPPS0 : 1;
6269 unsigned CKPPS1 : 1;
6270 unsigned CKPPS2 : 1;
6271 unsigned CKPPS3 : 1;
6272 unsigned CKPPS4 : 1;
6273 unsigned : 1;
6274 unsigned : 1;
6275 unsigned : 1;
6276 };
6277
6278 struct
6279 {
6280 unsigned CKPPS : 5;
6281 unsigned : 3;
6282 };
6283 } __CKPPSbits_t;
6284
6285 extern __at(0x0E16) volatile __CKPPSbits_t CKPPSbits;
6286
6287 #define _CKPPS0 0x01
6288 #define _CKPPS1 0x02
6289 #define _CKPPS2 0x04
6290 #define _CKPPS3 0x08
6291 #define _CKPPS4 0x10
6292
6293 //==============================================================================
6294
6295
6296 //==============================================================================
6297 // ADCACTPPS Bits
6298
6299 extern __at(0x0E17) __sfr ADCACTPPS;
6300
6301 typedef union
6302 {
6303 struct
6304 {
6305 unsigned ADCACTPPS0 : 1;
6306 unsigned ADCACTPPS1 : 1;
6307 unsigned ADCACTPPS2 : 1;
6308 unsigned ADCACTPPS3 : 1;
6309 unsigned ADCACTPPS4 : 1;
6310 unsigned : 1;
6311 unsigned : 1;
6312 unsigned : 1;
6313 };
6314
6315 struct
6316 {
6317 unsigned ADCACTPPS : 5;
6318 unsigned : 3;
6319 };
6320 } __ADCACTPPSbits_t;
6321
6322 extern __at(0x0E17) volatile __ADCACTPPSbits_t ADCACTPPSbits;
6323
6324 #define _ADCACTPPS0 0x01
6325 #define _ADCACTPPS1 0x02
6326 #define _ADCACTPPS2 0x04
6327 #define _ADCACTPPS3 0x08
6328 #define _ADCACTPPS4 0x10
6329
6330 //==============================================================================
6331
6332
6333 //==============================================================================
6334 // RA0PPS Bits
6335
6336 extern __at(0x0E90) __sfr RA0PPS;
6337
6338 typedef union
6339 {
6340 struct
6341 {
6342 unsigned RA0PPS0 : 1;
6343 unsigned RA0PPS1 : 1;
6344 unsigned RA0PPS2 : 1;
6345 unsigned RA0PPS3 : 1;
6346 unsigned : 1;
6347 unsigned : 1;
6348 unsigned : 1;
6349 unsigned : 1;
6350 };
6351
6352 struct
6353 {
6354 unsigned RA0PPS : 4;
6355 unsigned : 4;
6356 };
6357 } __RA0PPSbits_t;
6358
6359 extern __at(0x0E90) volatile __RA0PPSbits_t RA0PPSbits;
6360
6361 #define _RA0PPS0 0x01
6362 #define _RA0PPS1 0x02
6363 #define _RA0PPS2 0x04
6364 #define _RA0PPS3 0x08
6365
6366 //==============================================================================
6367
6368
6369 //==============================================================================
6370 // RA1PPS Bits
6371
6372 extern __at(0x0E91) __sfr RA1PPS;
6373
6374 typedef union
6375 {
6376 struct
6377 {
6378 unsigned RA1PPS0 : 1;
6379 unsigned RA1PPS1 : 1;
6380 unsigned RA1PPS2 : 1;
6381 unsigned RA1PPS3 : 1;
6382 unsigned : 1;
6383 unsigned : 1;
6384 unsigned : 1;
6385 unsigned : 1;
6386 };
6387
6388 struct
6389 {
6390 unsigned RA1PPS : 4;
6391 unsigned : 4;
6392 };
6393 } __RA1PPSbits_t;
6394
6395 extern __at(0x0E91) volatile __RA1PPSbits_t RA1PPSbits;
6396
6397 #define _RA1PPS0 0x01
6398 #define _RA1PPS1 0x02
6399 #define _RA1PPS2 0x04
6400 #define _RA1PPS3 0x08
6401
6402 //==============================================================================
6403
6404
6405 //==============================================================================
6406 // RA2PPS Bits
6407
6408 extern __at(0x0E92) __sfr RA2PPS;
6409
6410 typedef union
6411 {
6412 struct
6413 {
6414 unsigned RA2PPS0 : 1;
6415 unsigned RA2PPS1 : 1;
6416 unsigned RA2PPS2 : 1;
6417 unsigned RA2PPS3 : 1;
6418 unsigned : 1;
6419 unsigned : 1;
6420 unsigned : 1;
6421 unsigned : 1;
6422 };
6423
6424 struct
6425 {
6426 unsigned RA2PPS : 4;
6427 unsigned : 4;
6428 };
6429 } __RA2PPSbits_t;
6430
6431 extern __at(0x0E92) volatile __RA2PPSbits_t RA2PPSbits;
6432
6433 #define _RA2PPS0 0x01
6434 #define _RA2PPS1 0x02
6435 #define _RA2PPS2 0x04
6436 #define _RA2PPS3 0x08
6437
6438 //==============================================================================
6439
6440
6441 //==============================================================================
6442 // RA4PPS Bits
6443
6444 extern __at(0x0E94) __sfr RA4PPS;
6445
6446 typedef union
6447 {
6448 struct
6449 {
6450 unsigned RA4PPS0 : 1;
6451 unsigned RA4PPS1 : 1;
6452 unsigned RA4PPS2 : 1;
6453 unsigned RA4PPS3 : 1;
6454 unsigned : 1;
6455 unsigned : 1;
6456 unsigned : 1;
6457 unsigned : 1;
6458 };
6459
6460 struct
6461 {
6462 unsigned RA4PPS : 4;
6463 unsigned : 4;
6464 };
6465 } __RA4PPSbits_t;
6466
6467 extern __at(0x0E94) volatile __RA4PPSbits_t RA4PPSbits;
6468
6469 #define _RA4PPS0 0x01
6470 #define _RA4PPS1 0x02
6471 #define _RA4PPS2 0x04
6472 #define _RA4PPS3 0x08
6473
6474 //==============================================================================
6475
6476
6477 //==============================================================================
6478 // RA5PPS Bits
6479
6480 extern __at(0x0E95) __sfr RA5PPS;
6481
6482 typedef union
6483 {
6484 struct
6485 {
6486 unsigned RA5PPS0 : 1;
6487 unsigned RA5PPS1 : 1;
6488 unsigned RA5PPS2 : 1;
6489 unsigned RA5PPS3 : 1;
6490 unsigned : 1;
6491 unsigned : 1;
6492 unsigned : 1;
6493 unsigned : 1;
6494 };
6495
6496 struct
6497 {
6498 unsigned RA5PPS : 4;
6499 unsigned : 4;
6500 };
6501 } __RA5PPSbits_t;
6502
6503 extern __at(0x0E95) volatile __RA5PPSbits_t RA5PPSbits;
6504
6505 #define _RA5PPS0 0x01
6506 #define _RA5PPS1 0x02
6507 #define _RA5PPS2 0x04
6508 #define _RA5PPS3 0x08
6509
6510 //==============================================================================
6511
6512
6513 //==============================================================================
6514 // RB4PPS Bits
6515
6516 extern __at(0x0E9C) __sfr RB4PPS;
6517
6518 typedef union
6519 {
6520 struct
6521 {
6522 unsigned RB4PPS0 : 1;
6523 unsigned RB4PPS1 : 1;
6524 unsigned RB4PPS2 : 1;
6525 unsigned RB4PPS3 : 1;
6526 unsigned : 1;
6527 unsigned : 1;
6528 unsigned : 1;
6529 unsigned : 1;
6530 };
6531
6532 struct
6533 {
6534 unsigned RB4PPS : 4;
6535 unsigned : 4;
6536 };
6537 } __RB4PPSbits_t;
6538
6539 extern __at(0x0E9C) volatile __RB4PPSbits_t RB4PPSbits;
6540
6541 #define _RB4PPS0 0x01
6542 #define _RB4PPS1 0x02
6543 #define _RB4PPS2 0x04
6544 #define _RB4PPS3 0x08
6545
6546 //==============================================================================
6547
6548
6549 //==============================================================================
6550 // RB5PPS Bits
6551
6552 extern __at(0x0E9D) __sfr RB5PPS;
6553
6554 typedef union
6555 {
6556 struct
6557 {
6558 unsigned RB5PPS0 : 1;
6559 unsigned RB5PPS1 : 1;
6560 unsigned RB5PPS2 : 1;
6561 unsigned RB5PPS3 : 1;
6562 unsigned : 1;
6563 unsigned : 1;
6564 unsigned : 1;
6565 unsigned : 1;
6566 };
6567
6568 struct
6569 {
6570 unsigned RB5PPS : 4;
6571 unsigned : 4;
6572 };
6573 } __RB5PPSbits_t;
6574
6575 extern __at(0x0E9D) volatile __RB5PPSbits_t RB5PPSbits;
6576
6577 #define _RB5PPS0 0x01
6578 #define _RB5PPS1 0x02
6579 #define _RB5PPS2 0x04
6580 #define _RB5PPS3 0x08
6581
6582 //==============================================================================
6583
6584
6585 //==============================================================================
6586 // RB6PPS Bits
6587
6588 extern __at(0x0E9E) __sfr RB6PPS;
6589
6590 typedef union
6591 {
6592 struct
6593 {
6594 unsigned RB6PPS0 : 1;
6595 unsigned RB6PPS1 : 1;
6596 unsigned RB6PPS2 : 1;
6597 unsigned RB6PPS3 : 1;
6598 unsigned : 1;
6599 unsigned : 1;
6600 unsigned : 1;
6601 unsigned : 1;
6602 };
6603
6604 struct
6605 {
6606 unsigned RB6PPS : 4;
6607 unsigned : 4;
6608 };
6609 } __RB6PPSbits_t;
6610
6611 extern __at(0x0E9E) volatile __RB6PPSbits_t RB6PPSbits;
6612
6613 #define _RB6PPS0 0x01
6614 #define _RB6PPS1 0x02
6615 #define _RB6PPS2 0x04
6616 #define _RB6PPS3 0x08
6617
6618 //==============================================================================
6619
6620
6621 //==============================================================================
6622 // RB7PPS Bits
6623
6624 extern __at(0x0E9F) __sfr RB7PPS;
6625
6626 typedef union
6627 {
6628 struct
6629 {
6630 unsigned RB7PPS0 : 1;
6631 unsigned RB7PPS1 : 1;
6632 unsigned RB7PPS2 : 1;
6633 unsigned RB7PPS3 : 1;
6634 unsigned : 1;
6635 unsigned : 1;
6636 unsigned : 1;
6637 unsigned : 1;
6638 };
6639
6640 struct
6641 {
6642 unsigned RB7PPS : 4;
6643 unsigned : 4;
6644 };
6645 } __RB7PPSbits_t;
6646
6647 extern __at(0x0E9F) volatile __RB7PPSbits_t RB7PPSbits;
6648
6649 #define _RB7PPS0 0x01
6650 #define _RB7PPS1 0x02
6651 #define _RB7PPS2 0x04
6652 #define _RB7PPS3 0x08
6653
6654 //==============================================================================
6655
6656
6657 //==============================================================================
6658 // RC0PPS Bits
6659
6660 extern __at(0x0EA0) __sfr RC0PPS;
6661
6662 typedef union
6663 {
6664 struct
6665 {
6666 unsigned RC0PPS0 : 1;
6667 unsigned RC0PPS1 : 1;
6668 unsigned RC0PPS2 : 1;
6669 unsigned RC0PPS3 : 1;
6670 unsigned : 1;
6671 unsigned : 1;
6672 unsigned : 1;
6673 unsigned : 1;
6674 };
6675
6676 struct
6677 {
6678 unsigned RC0PPS : 4;
6679 unsigned : 4;
6680 };
6681 } __RC0PPSbits_t;
6682
6683 extern __at(0x0EA0) volatile __RC0PPSbits_t RC0PPSbits;
6684
6685 #define _RC0PPS0 0x01
6686 #define _RC0PPS1 0x02
6687 #define _RC0PPS2 0x04
6688 #define _RC0PPS3 0x08
6689
6690 //==============================================================================
6691
6692
6693 //==============================================================================
6694 // RC1PPS Bits
6695
6696 extern __at(0x0EA1) __sfr RC1PPS;
6697
6698 typedef union
6699 {
6700 struct
6701 {
6702 unsigned RC1PPS0 : 1;
6703 unsigned RC1PPS1 : 1;
6704 unsigned RC1PPS2 : 1;
6705 unsigned RC1PPS3 : 1;
6706 unsigned : 1;
6707 unsigned : 1;
6708 unsigned : 1;
6709 unsigned : 1;
6710 };
6711
6712 struct
6713 {
6714 unsigned RC1PPS : 4;
6715 unsigned : 4;
6716 };
6717 } __RC1PPSbits_t;
6718
6719 extern __at(0x0EA1) volatile __RC1PPSbits_t RC1PPSbits;
6720
6721 #define _RC1PPS0 0x01
6722 #define _RC1PPS1 0x02
6723 #define _RC1PPS2 0x04
6724 #define _RC1PPS3 0x08
6725
6726 //==============================================================================
6727
6728
6729 //==============================================================================
6730 // RC2PPS Bits
6731
6732 extern __at(0x0EA2) __sfr RC2PPS;
6733
6734 typedef union
6735 {
6736 struct
6737 {
6738 unsigned RC1PPS0 : 1;
6739 unsigned RC1PPS1 : 1;
6740 unsigned RC1PPS2 : 1;
6741 unsigned RC1PPS3 : 1;
6742 unsigned : 1;
6743 unsigned : 1;
6744 unsigned : 1;
6745 unsigned : 1;
6746 };
6747
6748 struct
6749 {
6750 unsigned RC1PPS : 4;
6751 unsigned : 4;
6752 };
6753 } __RC2PPSbits_t;
6754
6755 extern __at(0x0EA2) volatile __RC2PPSbits_t RC2PPSbits;
6756
6757 #define _RC2PPS_RC1PPS0 0x01
6758 #define _RC2PPS_RC1PPS1 0x02
6759 #define _RC2PPS_RC1PPS2 0x04
6760 #define _RC2PPS_RC1PPS3 0x08
6761
6762 //==============================================================================
6763
6764
6765 //==============================================================================
6766 // RC3PPS Bits
6767
6768 extern __at(0x0EA3) __sfr RC3PPS;
6769
6770 typedef union
6771 {
6772 struct
6773 {
6774 unsigned RC3PPS0 : 1;
6775 unsigned RC3PPS1 : 1;
6776 unsigned RC3PPS2 : 1;
6777 unsigned RC3PPS3 : 1;
6778 unsigned : 1;
6779 unsigned : 1;
6780 unsigned : 1;
6781 unsigned : 1;
6782 };
6783
6784 struct
6785 {
6786 unsigned RC3PPS : 4;
6787 unsigned : 4;
6788 };
6789 } __RC3PPSbits_t;
6790
6791 extern __at(0x0EA3) volatile __RC3PPSbits_t RC3PPSbits;
6792
6793 #define _RC3PPS0 0x01
6794 #define _RC3PPS1 0x02
6795 #define _RC3PPS2 0x04
6796 #define _RC3PPS3 0x08
6797
6798 //==============================================================================
6799
6800
6801 //==============================================================================
6802 // RC4PPS Bits
6803
6804 extern __at(0x0EA4) __sfr RC4PPS;
6805
6806 typedef union
6807 {
6808 struct
6809 {
6810 unsigned RC4PPS0 : 1;
6811 unsigned RC4PPS1 : 1;
6812 unsigned RC4PPS2 : 1;
6813 unsigned RC4PPS3 : 1;
6814 unsigned : 1;
6815 unsigned : 1;
6816 unsigned : 1;
6817 unsigned : 1;
6818 };
6819
6820 struct
6821 {
6822 unsigned RC4PPS : 4;
6823 unsigned : 4;
6824 };
6825 } __RC4PPSbits_t;
6826
6827 extern __at(0x0EA4) volatile __RC4PPSbits_t RC4PPSbits;
6828
6829 #define _RC4PPS0 0x01
6830 #define _RC4PPS1 0x02
6831 #define _RC4PPS2 0x04
6832 #define _RC4PPS3 0x08
6833
6834 //==============================================================================
6835
6836
6837 //==============================================================================
6838 // RC5PPS Bits
6839
6840 extern __at(0x0EA5) __sfr RC5PPS;
6841
6842 typedef union
6843 {
6844 struct
6845 {
6846 unsigned RC5PPS0 : 1;
6847 unsigned RC5PPS1 : 1;
6848 unsigned RC5PPS2 : 1;
6849 unsigned RC5PPS3 : 1;
6850 unsigned : 1;
6851 unsigned : 1;
6852 unsigned : 1;
6853 unsigned : 1;
6854 };
6855
6856 struct
6857 {
6858 unsigned RC5PPS : 4;
6859 unsigned : 4;
6860 };
6861 } __RC5PPSbits_t;
6862
6863 extern __at(0x0EA5) volatile __RC5PPSbits_t RC5PPSbits;
6864
6865 #define _RC5PPS0 0x01
6866 #define _RC5PPS1 0x02
6867 #define _RC5PPS2 0x04
6868 #define _RC5PPS3 0x08
6869
6870 //==============================================================================
6871
6872
6873 //==============================================================================
6874 // RC6PPS Bits
6875
6876 extern __at(0x0EA6) __sfr RC6PPS;
6877
6878 typedef union
6879 {
6880 struct
6881 {
6882 unsigned RC6PPS0 : 1;
6883 unsigned RC6PPS1 : 1;
6884 unsigned RC6PPS2 : 1;
6885 unsigned RC6PPS3 : 1;
6886 unsigned : 1;
6887 unsigned : 1;
6888 unsigned : 1;
6889 unsigned : 1;
6890 };
6891
6892 struct
6893 {
6894 unsigned RC6PPS : 4;
6895 unsigned : 4;
6896 };
6897 } __RC6PPSbits_t;
6898
6899 extern __at(0x0EA6) volatile __RC6PPSbits_t RC6PPSbits;
6900
6901 #define _RC6PPS0 0x01
6902 #define _RC6PPS1 0x02
6903 #define _RC6PPS2 0x04
6904 #define _RC6PPS3 0x08
6905
6906 //==============================================================================
6907
6908
6909 //==============================================================================
6910 // RC7PPS Bits
6911
6912 extern __at(0x0EA7) __sfr RC7PPS;
6913
6914 typedef union
6915 {
6916 struct
6917 {
6918 unsigned RC7PPS0 : 1;
6919 unsigned RC7PPS1 : 1;
6920 unsigned RC7PPS2 : 1;
6921 unsigned RC7PPS3 : 1;
6922 unsigned : 1;
6923 unsigned : 1;
6924 unsigned : 1;
6925 unsigned : 1;
6926 };
6927
6928 struct
6929 {
6930 unsigned RC7PPS : 4;
6931 unsigned : 4;
6932 };
6933 } __RC7PPSbits_t;
6934
6935 extern __at(0x0EA7) volatile __RC7PPSbits_t RC7PPSbits;
6936
6937 #define _RC7PPS0 0x01
6938 #define _RC7PPS1 0x02
6939 #define _RC7PPS2 0x04
6940 #define _RC7PPS3 0x08
6941
6942 //==============================================================================
6943
6944
6945 //==============================================================================
6946 // STATUS_SHAD Bits
6947
6948 extern __at(0x0FE4) __sfr STATUS_SHAD;
6949
6950 typedef struct
6951 {
6952 unsigned C_SHAD : 1;
6953 unsigned DC_SHAD : 1;
6954 unsigned Z_SHAD : 1;
6955 unsigned : 1;
6956 unsigned : 1;
6957 unsigned : 1;
6958 unsigned : 1;
6959 unsigned : 1;
6960 } __STATUS_SHADbits_t;
6961
6962 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
6963
6964 #define _C_SHAD 0x01
6965 #define _DC_SHAD 0x02
6966 #define _Z_SHAD 0x04
6967
6968 //==============================================================================
6969
6970 extern __at(0x0FE5) __sfr WREG_SHAD;
6971 extern __at(0x0FE6) __sfr BSR_SHAD;
6972 extern __at(0x0FE7) __sfr PCLATH_SHAD;
6973 extern __at(0x0FE8) __sfr FSR0L_SHAD;
6974 extern __at(0x0FE8) __sfr FSR0_SHAD;
6975 extern __at(0x0FE9) __sfr FSR0H_SHAD;
6976 extern __at(0x0FEA) __sfr FSR1L_SHAD;
6977 extern __at(0x0FEA) __sfr FSR1_SHAD;
6978 extern __at(0x0FEB) __sfr FSR1H_SHAD;
6979 extern __at(0x0FED) __sfr STKPTR;
6980 extern __at(0x0FEE) __sfr TOS;
6981 extern __at(0x0FEE) __sfr TOSL;
6982 extern __at(0x0FEF) __sfr TOSH;
6983
6984 //==============================================================================
6985 //
6986 // Configuration Bits
6987 //
6988 //==============================================================================
6989
6990 #define _CONFIG1 0x8007
6991 #define _CONFIG2 0x8008
6992
6993 //----------------------------- CONFIG1 Options -------------------------------
6994
6995 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin.
6996 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin.
6997 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin.
6998 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin.
6999 #define _WDTE_OFF 0x3FE7 // WDT disabled.
7000 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
7001 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
7002 #define _WDTE_ON 0x3FFF // WDT enabled.
7003 #define _PWRTE_ON 0x3FDF // PWRT enabled.
7004 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
7005 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
7006 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
7007 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
7008 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
7009 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
7010 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
7011 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
7012 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
7013 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
7014 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
7015
7016 //----------------------------- CONFIG2 Options -------------------------------
7017
7018 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control.
7019 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control.
7020 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control.
7021 #define _WRT_OFF 0x3FFF // Write protection off.
7022 #define _PPS1WAY_OFF 0x3FFB // PPSLOCKED Bit Can Be Cleared & Set Repeatedly.
7023 #define _PPS1WAY_ON 0x3FFF // PPSLOCKED Bit Can Be Cleared & Set Once.
7024 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
7025 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
7026 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
7027 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
7028 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
7029 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
7030 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
7031 #define _LPBOREN_ON 0x37FF // LPBOR is enabled.
7032 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled.
7033 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
7034 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
7035 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
7036 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
7037
7038 //==============================================================================
7039
7040 #define _DEVID1 0x8006
7041
7042 #define _IDLOC0 0x8000
7043 #define _IDLOC1 0x8001
7044 #define _IDLOC2 0x8002
7045 #define _IDLOC3 0x8003
7046
7047 //==============================================================================
7048
7049 #ifndef NO_BIT_DEFINES
7050
7051 #define ADCACTPPS0 ADCACTPPSbits.ADCACTPPS0 // bit 0
7052 #define ADCACTPPS1 ADCACTPPSbits.ADCACTPPS1 // bit 1
7053 #define ADCACTPPS2 ADCACTPPSbits.ADCACTPPS2 // bit 2
7054 #define ADCACTPPS3 ADCACTPPSbits.ADCACTPPS3 // bit 3
7055 #define ADCACTPPS4 ADCACTPPSbits.ADCACTPPS4 // bit 4
7056
7057 #define ADON ADCON0bits.ADON // bit 0
7058 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
7059 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
7060 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
7061 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
7062 #define CHS0 ADCON0bits.CHS0 // bit 2
7063 #define CHS1 ADCON0bits.CHS1 // bit 3
7064 #define CHS2 ADCON0bits.CHS2 // bit 4
7065 #define CHS3 ADCON0bits.CHS3 // bit 5
7066 #define CHS4 ADCON0bits.CHS4 // bit 6
7067
7068 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
7069 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
7070 #define ADCS0 ADCON1bits.ADCS0 // bit 4
7071 #define ADCS1 ADCON1bits.ADCS1 // bit 5
7072 #define ADCS2 ADCON1bits.ADCS2 // bit 6
7073 #define ADFM ADCON1bits.ADFM // bit 7
7074
7075 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
7076 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
7077 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
7078 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
7079
7080 #define ANSA0 ANSELAbits.ANSA0 // bit 0
7081 #define ANSA1 ANSELAbits.ANSA1 // bit 1
7082 #define ANSA2 ANSELAbits.ANSA2 // bit 2
7083 #define ANSA4 ANSELAbits.ANSA4 // bit 4
7084
7085 #define ANSB4 ANSELBbits.ANSB4 // bit 4
7086 #define ANSB5 ANSELBbits.ANSB5 // bit 5
7087
7088 #define ANSC0 ANSELCbits.ANSC0 // bit 0
7089 #define ANSC1 ANSELCbits.ANSC1 // bit 1
7090 #define ANSC2 ANSELCbits.ANSC2 // bit 2
7091 #define ANSC3 ANSELCbits.ANSC3 // bit 3
7092 #define ANSC6 ANSELCbits.ANSC6 // bit 6
7093 #define ANSC7 ANSELCbits.ANSC7 // bit 7
7094
7095 #define ABDEN BAUDCONbits.ABDEN // bit 0
7096 #define WUE BAUDCONbits.WUE // bit 1
7097 #define BRG16 BAUDCONbits.BRG16 // bit 3
7098 #define SCKP BAUDCONbits.SCKP // bit 4
7099 #define RCIDL BAUDCONbits.RCIDL // bit 6
7100 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
7101
7102 #define BORRDY BORCONbits.BORRDY // bit 0
7103 #define BORFS BORCONbits.BORFS // bit 6
7104 #define SBOREN BORCONbits.SBOREN // bit 7
7105
7106 #define BSR0 BSRbits.BSR0 // bit 0
7107 #define BSR1 BSRbits.BSR1 // bit 1
7108 #define BSR2 BSRbits.BSR2 // bit 2
7109 #define BSR3 BSRbits.BSR3 // bit 3
7110 #define BSR4 BSRbits.BSR4 // bit 4
7111
7112 #define CKPPS0 CKPPSbits.CKPPS0 // bit 0
7113 #define CKPPS1 CKPPSbits.CKPPS1 // bit 1
7114 #define CKPPS2 CKPPSbits.CKPPS2 // bit 2
7115 #define CKPPS3 CKPPSbits.CKPPS3 // bit 3
7116 #define CKPPS4 CKPPSbits.CKPPS4 // bit 4
7117
7118 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
7119 #define C1HYS CM1CON0bits.C1HYS // bit 1
7120 #define C1SP CM1CON0bits.C1SP // bit 2
7121 #define C1POL CM1CON0bits.C1POL // bit 4
7122 #define C1OE CM1CON0bits.C1OE // bit 5
7123 #define C1OUT CM1CON0bits.C1OUT // bit 6
7124 #define C1ON CM1CON0bits.C1ON // bit 7
7125
7126 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
7127 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
7128 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
7129 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
7130 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
7131 #define C1INTN CM1CON1bits.C1INTN // bit 6
7132 #define C1INTP CM1CON1bits.C1INTP // bit 7
7133
7134 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
7135 #define C2HYS CM2CON0bits.C2HYS // bit 1
7136 #define C2SP CM2CON0bits.C2SP // bit 2
7137 #define C2POL CM2CON0bits.C2POL // bit 4
7138 #define C2OE CM2CON0bits.C2OE // bit 5
7139 #define C2OUT CM2CON0bits.C2OUT // bit 6
7140 #define C2ON CM2CON0bits.C2ON // bit 7
7141
7142 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
7143 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
7144 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
7145 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
7146 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
7147 #define C2INTN CM2CON1bits.C2INTN // bit 6
7148 #define C2INTP CM2CON1bits.C2INTP // bit 7
7149
7150 #define MC1OUT CMOUTbits.MC1OUT // bit 0
7151 #define MC2OUT CMOUTbits.MC2OUT // bit 1
7152
7153 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
7154 #define G1POLA CWG1CON0bits.G1POLA // bit 3
7155 #define G1POLB CWG1CON0bits.G1POLB // bit 4
7156 #define G1OEA CWG1CON0bits.G1OEA // bit 5
7157 #define G1OEB CWG1CON0bits.G1OEB // bit 6
7158 #define G1EN CWG1CON0bits.G1EN // bit 7
7159
7160 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
7161 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
7162 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
7163 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
7164 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
7165 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
7166 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
7167
7168 #define G1ASDSPPS CWG1CON2bits.G1ASDSPPS // bit 1
7169 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
7170 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
7171 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
7172 #define G1ASE CWG1CON2bits.G1ASE // bit 7
7173
7174 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
7175 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
7176 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
7177 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
7178 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
7179 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
7180
7181 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
7182 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
7183 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
7184 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
7185 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
7186 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
7187
7188 #define CWG1INPPS0 CWG1INPPSbits.CWG1INPPS0 // bit 0
7189 #define CWG1INPPS1 CWG1INPPSbits.CWG1INPPS1 // bit 1
7190 #define CWG1INPPS2 CWG1INPPSbits.CWG1INPPS2 // bit 2
7191 #define CWG1INPPS3 CWG1INPPSbits.CWG1INPPS3 // bit 3
7192 #define CWG1INPPS4 CWG1INPPSbits.CWG1INPPS4 // bit 4
7193
7194 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
7195 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
7196 #define DACOE DACCON0bits.DACOE // bit 5
7197 #define DACLPS DACCON0bits.DACLPS // bit 6
7198 #define DACEN DACCON0bits.DACEN // bit 7
7199
7200 #define DACR0 DACCON1bits.DACR0 // bit 0
7201 #define DACR1 DACCON1bits.DACR1 // bit 1
7202 #define DACR2 DACCON1bits.DACR2 // bit 2
7203 #define DACR3 DACCON1bits.DACR3 // bit 3
7204 #define DACR4 DACCON1bits.DACR4 // bit 4
7205
7206 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
7207 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
7208 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
7209 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
7210 #define TSRNG FVRCONbits.TSRNG // bit 4
7211 #define TSEN FVRCONbits.TSEN // bit 5
7212 #define FVRRDY FVRCONbits.FVRRDY // bit 6
7213 #define FVREN FVRCONbits.FVREN // bit 7
7214
7215 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
7216 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
7217 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
7218 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
7219 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
7220 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
7221
7222 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
7223 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
7224 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
7225 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
7226
7227 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
7228 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
7229 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
7230 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
7231 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
7232 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
7233 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
7234 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
7235
7236 #define IOCIF INTCONbits.IOCIF // bit 0
7237 #define INTF INTCONbits.INTF // bit 1
7238 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
7239 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
7240 #define IOCIE INTCONbits.IOCIE // bit 3
7241 #define INTE INTCONbits.INTE // bit 4
7242 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
7243 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
7244 #define PEIE INTCONbits.PEIE // bit 6
7245 #define GIE INTCONbits.GIE // bit 7
7246
7247 #define INTPPS0 INTPPSbits.INTPPS0 // bit 0
7248 #define INTPPS1 INTPPSbits.INTPPS1 // bit 1
7249 #define INTPPS2 INTPPSbits.INTPPS2 // bit 2
7250 #define INTPPS3 INTPPSbits.INTPPS3 // bit 3
7251 #define INTPPS4 INTPPSbits.INTPPS4 // bit 4
7252
7253 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
7254 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
7255 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
7256 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
7257 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
7258 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
7259
7260 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
7261 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
7262 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
7263 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
7264 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
7265 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
7266
7267 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
7268 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
7269 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
7270 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
7271 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
7272 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
7273
7274 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
7275 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
7276 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
7277 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
7278
7279 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
7280 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
7281 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
7282 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
7283
7284 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
7285 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
7286 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
7287 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
7288
7289 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
7290 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
7291 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
7292 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
7293 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
7294 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
7295 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
7296 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
7297
7298 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
7299 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
7300 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
7301 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
7302 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
7303 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
7304 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
7305 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
7306
7307 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
7308 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
7309 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
7310 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
7311 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
7312 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
7313 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
7314 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
7315
7316 #define LATA0 LATAbits.LATA0 // bit 0
7317 #define LATA1 LATAbits.LATA1 // bit 1
7318 #define LATA2 LATAbits.LATA2 // bit 2
7319 #define LATA4 LATAbits.LATA4 // bit 4
7320 #define LATA5 LATAbits.LATA5 // bit 5
7321
7322 #define LATB4 LATBbits.LATB4 // bit 4
7323 #define LATB5 LATBbits.LATB5 // bit 5
7324 #define LATB6 LATBbits.LATB6 // bit 6
7325 #define LATB7 LATBbits.LATB7 // bit 7
7326
7327 #define LATC0 LATCbits.LATC0 // bit 0
7328 #define LATC1 LATCbits.LATC1 // bit 1
7329 #define LATC2 LATCbits.LATC2 // bit 2
7330 #define LATC3 LATCbits.LATC3 // bit 3
7331 #define LATC4 LATCbits.LATC4 // bit 4
7332 #define LATC5 LATCbits.LATC5 // bit 5
7333 #define LATC6 LATCbits.LATC6 // bit 6
7334 #define LATC7 LATCbits.LATC7 // bit 7
7335
7336 #define ODA0 ODCONAbits.ODA0 // bit 0
7337 #define ODA1 ODCONAbits.ODA1 // bit 1
7338 #define ODA2 ODCONAbits.ODA2 // bit 2
7339 #define ODA4 ODCONAbits.ODA4 // bit 4
7340 #define ODA5 ODCONAbits.ODA5 // bit 5
7341
7342 #define ODB4 ODCONBbits.ODB4 // bit 4
7343 #define ODB5 ODCONBbits.ODB5 // bit 5
7344 #define ODB6 ODCONBbits.ODB6 // bit 6
7345 #define ODB7 ODCONBbits.ODB7 // bit 7
7346
7347 #define ODC0 ODCONCbits.ODC0 // bit 0
7348 #define ODC1 ODCONCbits.ODC1 // bit 1
7349 #define ODC2 ODCONCbits.ODC2 // bit 2
7350 #define ODC3 ODCONCbits.ODC3 // bit 3
7351 #define ODC4 ODCONCbits.ODC4 // bit 4
7352 #define ODC5 ODCONCbits.ODC5 // bit 5
7353 #define ODC6 ODCONCbits.ODC6 // bit 6
7354 #define ODC7 ODCONCbits.ODC7 // bit 7
7355
7356 #define PS0 OPTION_REGbits.PS0 // bit 0
7357 #define PS1 OPTION_REGbits.PS1 // bit 1
7358 #define PS2 OPTION_REGbits.PS2 // bit 2
7359 #define PSA OPTION_REGbits.PSA // bit 3
7360 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
7361 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
7362 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
7363 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
7364 #define INTEDG OPTION_REGbits.INTEDG // bit 6
7365 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
7366
7367 #define SCS0 OSCCONbits.SCS0 // bit 0
7368 #define SCS1 OSCCONbits.SCS1 // bit 1
7369 #define IRCF0 OSCCONbits.IRCF0 // bit 3
7370 #define IRCF1 OSCCONbits.IRCF1 // bit 4
7371 #define IRCF2 OSCCONbits.IRCF2 // bit 5
7372 #define IRCF3 OSCCONbits.IRCF3 // bit 6
7373 #define SPLLEN OSCCONbits.SPLLEN // bit 7
7374
7375 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
7376 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
7377 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
7378 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
7379 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
7380 #define OSTS OSCSTATbits.OSTS // bit 5
7381 #define PLLR OSCSTATbits.PLLR // bit 6
7382
7383 #define TUN0 OSCTUNEbits.TUN0 // bit 0
7384 #define TUN1 OSCTUNEbits.TUN1 // bit 1
7385 #define TUN2 OSCTUNEbits.TUN2 // bit 2
7386 #define TUN3 OSCTUNEbits.TUN3 // bit 3
7387 #define TUN4 OSCTUNEbits.TUN4 // bit 4
7388 #define TUN5 OSCTUNEbits.TUN5 // bit 5
7389
7390 #define NOT_BOR PCONbits.NOT_BOR // bit 0
7391 #define NOT_POR PCONbits.NOT_POR // bit 1
7392 #define NOT_RI PCONbits.NOT_RI // bit 2
7393 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
7394 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
7395 #define STKUNF PCONbits.STKUNF // bit 6
7396 #define STKOVF PCONbits.STKOVF // bit 7
7397
7398 #define TMR1IE PIE1bits.TMR1IE // bit 0
7399 #define TMR2IE PIE1bits.TMR2IE // bit 1
7400 #define TXIE PIE1bits.TXIE // bit 4
7401 #define RCIE PIE1bits.RCIE // bit 5
7402 #define ADIE PIE1bits.ADIE // bit 6
7403 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
7404
7405 #define C1IE PIE2bits.C1IE // bit 5
7406 #define C2IE PIE2bits.C2IE // bit 6
7407
7408 #define PWM1IE PIE3bits.PWM1IE // bit 4
7409 #define PWM2IE PIE3bits.PWM2IE // bit 5
7410 #define PWM3IE PIE3bits.PWM3IE // bit 6
7411 #define PWM4IE PIE3bits.PWM4IE // bit 7
7412
7413 #define TMR1IF PIR1bits.TMR1IF // bit 0
7414 #define TMR2IF PIR1bits.TMR2IF // bit 1
7415 #define TXIF PIR1bits.TXIF // bit 4
7416 #define RCIF PIR1bits.RCIF // bit 5
7417 #define ADIF PIR1bits.ADIF // bit 6
7418 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
7419
7420 #define C1IF PIR2bits.C1IF // bit 5
7421 #define C2IF PIR2bits.C2IF // bit 6
7422
7423 #define PWM1IF PIR3bits.PWM1IF // bit 4
7424 #define PWM2IF PIR3bits.PWM2IF // bit 5
7425 #define PWM3IF PIR3bits.PWM3IF // bit 6
7426 #define PWM4IF PIR3bits.PWM4IF // bit 7
7427
7428 #define RD PMCON1bits.RD // bit 0
7429 #define WR PMCON1bits.WR // bit 1
7430 #define WREN PMCON1bits.WREN // bit 2
7431 #define WRERR PMCON1bits.WRERR // bit 3
7432 #define FREE PMCON1bits.FREE // bit 4
7433 #define LWLO PMCON1bits.LWLO // bit 5
7434 #define CFGS PMCON1bits.CFGS // bit 6
7435
7436 #define RA0 PORTAbits.RA0 // bit 0
7437 #define RA1 PORTAbits.RA1 // bit 1
7438 #define RA2 PORTAbits.RA2 // bit 2
7439 #define RA3 PORTAbits.RA3 // bit 3
7440 #define RA4 PORTAbits.RA4 // bit 4
7441 #define RA5 PORTAbits.RA5 // bit 5
7442
7443 #define RB4 PORTBbits.RB4 // bit 4
7444 #define RB5 PORTBbits.RB5 // bit 5
7445 #define RB6 PORTBbits.RB6 // bit 6
7446 #define RB7 PORTBbits.RB7 // bit 7
7447
7448 #define RC0 PORTCbits.RC0 // bit 0
7449 #define RC1 PORTCbits.RC1 // bit 1
7450 #define RC2 PORTCbits.RC2 // bit 2
7451 #define RC3 PORTCbits.RC3 // bit 3
7452 #define RC4 PORTCbits.RC4 // bit 4
7453 #define RC5 PORTCbits.RC5 // bit 5
7454 #define RC6 PORTCbits.RC6 // bit 6
7455 #define RC7 PORTCbits.RC7 // bit 7
7456
7457 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
7458
7459 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits
7460 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits
7461 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits
7462 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits
7463 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits
7464 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits
7465 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits
7466 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits
7467 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits
7468 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits
7469 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits
7470 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits
7471
7472 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
7473 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
7474 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
7475 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
7476 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
7477 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
7478 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
7479 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
7480
7481 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0
7482 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1
7483 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2
7484 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3
7485 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4
7486 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5
7487 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6
7488 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7
7489
7490 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits
7491 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits
7492 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits
7493 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits
7494 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits
7495 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits
7496 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits
7497 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits
7498
7499 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits
7500 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits
7501 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits
7502 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits
7503 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits
7504 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits
7505 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits
7506 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits
7507
7508 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits
7509 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits
7510 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits
7511 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits
7512 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits
7513 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits
7514 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits
7515 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits
7516
7517 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits
7518 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits
7519 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits
7520 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits
7521 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits
7522 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits
7523 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits
7524 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits
7525 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits
7526 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits
7527
7528 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0
7529 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1
7530 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2
7531 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3
7532 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4
7533 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5
7534 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6
7535 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7
7536
7537 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0
7538 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1
7539 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2
7540 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3
7541 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4
7542 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5
7543 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6
7544 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7
7545
7546 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0
7547 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1
7548 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2
7549 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3
7550 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4
7551 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5
7552 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6
7553 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7
7554
7555 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0
7556 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1
7557 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2
7558 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3
7559 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4
7560 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5
7561 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6
7562 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7
7563
7564 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0
7565 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1
7566 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2
7567 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3
7568 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4
7569 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5
7570 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6
7571 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7
7572
7573 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0
7574 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1
7575 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2
7576 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3
7577 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4
7578 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5
7579 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6
7580 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7
7581
7582 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0
7583 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1
7584 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2
7585 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3
7586 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4
7587 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5
7588 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6
7589 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7
7590
7591 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0
7592 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1
7593 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2
7594 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3
7595 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4
7596 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5
7597 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6
7598 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7
7599
7600 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
7601 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
7602 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
7603 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
7604 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
7605 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
7606 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
7607 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
7608
7609 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0
7610 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1
7611 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2
7612 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3
7613 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4
7614 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5
7615 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6
7616 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7
7617
7618 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0
7619 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1
7620 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2
7621 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3
7622 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4
7623 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5
7624 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6
7625 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7
7626
7627 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0
7628 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1
7629 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2
7630 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3
7631 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4
7632 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5
7633 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6
7634 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7
7635
7636 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0
7637 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1
7638 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2
7639 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3
7640 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4
7641 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5
7642 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6
7643 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7
7644
7645 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0
7646 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1
7647 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2
7648 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3
7649 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4
7650 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5
7651 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6
7652 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7
7653
7654 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0
7655 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1
7656 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2
7657 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3
7658 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4
7659 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5
7660 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6
7661 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7
7662
7663 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0
7664 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1
7665 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2
7666 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3
7667 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4
7668 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5
7669 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6
7670 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7
7671
7672 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0
7673 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1
7674 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2
7675 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3
7676 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4
7677 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5
7678 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6
7679 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7
7680
7681 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0
7682 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1
7683 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2
7684 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3
7685 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4
7686 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5
7687 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6
7688 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7
7689
7690 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
7691 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
7692 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
7693 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
7694 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
7695 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
7696 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
7697 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
7698
7699 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0
7700 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1
7701 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2
7702 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3
7703 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4
7704 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5
7705 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6
7706 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7
7707
7708 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0
7709 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1
7710 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2
7711 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3
7712 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4
7713 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5
7714 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6
7715 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7
7716
7717 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0
7718 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1
7719 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2
7720 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3
7721 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4
7722 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5
7723 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6
7724 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7
7725
7726 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0
7727 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1
7728 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2
7729 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3
7730 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4
7731 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5
7732 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6
7733 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7
7734
7735 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0
7736 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1
7737 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2
7738 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3
7739 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4
7740 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5
7741 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6
7742 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7
7743
7744 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0
7745 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1
7746 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2
7747 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3
7748 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4
7749 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5
7750 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6
7751 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7
7752
7753 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0
7754 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1
7755 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2
7756 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3
7757 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4
7758 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5
7759 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6
7760 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7
7761
7762 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0
7763 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1
7764 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2
7765 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3
7766 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4
7767 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5
7768 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6
7769 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7
7770
7771 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0
7772 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1
7773 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2
7774 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3
7775 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4
7776 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5
7777 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6
7778 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7
7779
7780 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
7781 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
7782 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
7783 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
7784 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
7785 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
7786 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
7787 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
7788
7789 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 0
7790 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 1
7791 #define PWM4DCL2 PWM4DCLbits.PWM4DCL2 // bit 2
7792 #define PWM4DCL3 PWM4DCLbits.PWM4DCL3 // bit 3
7793 #define PWM4DCL4 PWM4DCLbits.PWM4DCL4 // bit 4
7794 #define PWM4DCL5 PWM4DCLbits.PWM4DCL5 // bit 5
7795 #define PWM4DCL6 PWM4DCLbits.PWM4DCL6 // bit 6
7796 #define PWM4DCL7 PWM4DCLbits.PWM4DCL7 // bit 7
7797
7798 #define PWM4OFH0 PWM4OFHbits.PWM4OFH0 // bit 0
7799 #define PWM4OFH1 PWM4OFHbits.PWM4OFH1 // bit 1
7800 #define PWM4OFH2 PWM4OFHbits.PWM4OFH2 // bit 2
7801 #define PWM4OFH3 PWM4OFHbits.PWM4OFH3 // bit 3
7802 #define PWM4OFH4 PWM4OFHbits.PWM4OFH4 // bit 4
7803 #define PWM4OFH5 PWM4OFHbits.PWM4OFH5 // bit 5
7804 #define PWM4OFH6 PWM4OFHbits.PWM4OFH6 // bit 6
7805 #define PWM4OFH7 PWM4OFHbits.PWM4OFH7 // bit 7
7806
7807 #define PWM4OFL0 PWM4OFLbits.PWM4OFL0 // bit 0
7808 #define PWM4OFL1 PWM4OFLbits.PWM4OFL1 // bit 1
7809 #define PWM4OFL2 PWM4OFLbits.PWM4OFL2 // bit 2
7810 #define PWM4OFL3 PWM4OFLbits.PWM4OFL3 // bit 3
7811 #define PWM4OFL4 PWM4OFLbits.PWM4OFL4 // bit 4
7812 #define PWM4OFL5 PWM4OFLbits.PWM4OFL5 // bit 5
7813 #define PWM4OFL6 PWM4OFLbits.PWM4OFL6 // bit 6
7814 #define PWM4OFL7 PWM4OFLbits.PWM4OFL7 // bit 7
7815
7816 #define PWM4PHH0 PWM4PHHbits.PWM4PHH0 // bit 0
7817 #define PWM4PHH1 PWM4PHHbits.PWM4PHH1 // bit 1
7818 #define PWM4PHH2 PWM4PHHbits.PWM4PHH2 // bit 2
7819 #define PWM4PHH3 PWM4PHHbits.PWM4PHH3 // bit 3
7820 #define PWM4PHH4 PWM4PHHbits.PWM4PHH4 // bit 4
7821 #define PWM4PHH5 PWM4PHHbits.PWM4PHH5 // bit 5
7822 #define PWM4PHH6 PWM4PHHbits.PWM4PHH6 // bit 6
7823 #define PWM4PHH7 PWM4PHHbits.PWM4PHH7 // bit 7
7824
7825 #define PWM4PHL0 PWM4PHLbits.PWM4PHL0 // bit 0
7826 #define PWM4PHL1 PWM4PHLbits.PWM4PHL1 // bit 1
7827 #define PWM4PHL2 PWM4PHLbits.PWM4PHL2 // bit 2
7828 #define PWM4PHL3 PWM4PHLbits.PWM4PHL3 // bit 3
7829 #define PWM4PHL4 PWM4PHLbits.PWM4PHL4 // bit 4
7830 #define PWM4PHL5 PWM4PHLbits.PWM4PHL5 // bit 5
7831 #define PWM4PHL6 PWM4PHLbits.PWM4PHL6 // bit 6
7832 #define PWM4PHL7 PWM4PHLbits.PWM4PHL7 // bit 7
7833
7834 #define PWM4PRH0 PWM4PRHbits.PWM4PRH0 // bit 0
7835 #define PWM4PRH1 PWM4PRHbits.PWM4PRH1 // bit 1
7836 #define PWM4PRH2 PWM4PRHbits.PWM4PRH2 // bit 2
7837 #define PWM4PRH3 PWM4PRHbits.PWM4PRH3 // bit 3
7838 #define PWM4PRH4 PWM4PRHbits.PWM4PRH4 // bit 4
7839 #define PWM4PRH5 PWM4PRHbits.PWM4PRH5 // bit 5
7840 #define PWM4PRH6 PWM4PRHbits.PWM4PRH6 // bit 6
7841 #define PWM4PRH7 PWM4PRHbits.PWM4PRH7 // bit 7
7842
7843 #define PWM4PRL0 PWM4PRLbits.PWM4PRL0 // bit 0
7844 #define PWM4PRL1 PWM4PRLbits.PWM4PRL1 // bit 1
7845 #define PWM4PRL2 PWM4PRLbits.PWM4PRL2 // bit 2
7846 #define PWM4PRL3 PWM4PRLbits.PWM4PRL3 // bit 3
7847 #define PWM4PRL4 PWM4PRLbits.PWM4PRL4 // bit 4
7848 #define PWM4PRL5 PWM4PRLbits.PWM4PRL5 // bit 5
7849 #define PWM4PRL6 PWM4PRLbits.PWM4PRL6 // bit 6
7850 #define PWM4PRL7 PWM4PRLbits.PWM4PRL7 // bit 7
7851
7852 #define PWM4TMRH0 PWM4TMRHbits.PWM4TMRH0 // bit 0
7853 #define PWM4TMRH1 PWM4TMRHbits.PWM4TMRH1 // bit 1
7854 #define PWM4TMRH2 PWM4TMRHbits.PWM4TMRH2 // bit 2
7855 #define PWM4TMRH3 PWM4TMRHbits.PWM4TMRH3 // bit 3
7856 #define PWM4TMRH4 PWM4TMRHbits.PWM4TMRH4 // bit 4
7857 #define PWM4TMRH5 PWM4TMRHbits.PWM4TMRH5 // bit 5
7858 #define PWM4TMRH6 PWM4TMRHbits.PWM4TMRH6 // bit 6
7859 #define PWM4TMRH7 PWM4TMRHbits.PWM4TMRH7 // bit 7
7860
7861 #define PWM4TMRL0 PWM4TMRLbits.PWM4TMRL0 // bit 0
7862 #define PWM4TMRL1 PWM4TMRLbits.PWM4TMRL1 // bit 1
7863 #define PWM4TMRL2 PWM4TMRLbits.PWM4TMRL2 // bit 2
7864 #define PWM4TMRL3 PWM4TMRLbits.PWM4TMRL3 // bit 3
7865 #define PWM4TMRL4 PWM4TMRLbits.PWM4TMRL4 // bit 4
7866 #define PWM4TMRL5 PWM4TMRLbits.PWM4TMRL5 // bit 5
7867 #define PWM4TMRL6 PWM4TMRLbits.PWM4TMRL6 // bit 6
7868 #define PWM4TMRL7 PWM4TMRLbits.PWM4TMRL7 // bit 7
7869
7870 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits
7871 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits
7872 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits
7873 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits
7874 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits
7875 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits
7876 #define PWM4EN_A PWMENbits.PWM4EN_A // bit 3
7877
7878 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits
7879 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits
7880 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits
7881 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits
7882 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits
7883 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits
7884 #define PWM4LDA_A PWMLDbits.PWM4LDA_A // bit 3
7885
7886 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits
7887 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits
7888 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits
7889 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits
7890 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits
7891 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits
7892 #define PWM4OUT_A PWMOUTbits.PWM4OUT_A // bit 3
7893
7894 #define RA0PPS0 RA0PPSbits.RA0PPS0 // bit 0
7895 #define RA0PPS1 RA0PPSbits.RA0PPS1 // bit 1
7896 #define RA0PPS2 RA0PPSbits.RA0PPS2 // bit 2
7897 #define RA0PPS3 RA0PPSbits.RA0PPS3 // bit 3
7898
7899 #define RA1PPS0 RA1PPSbits.RA1PPS0 // bit 0
7900 #define RA1PPS1 RA1PPSbits.RA1PPS1 // bit 1
7901 #define RA1PPS2 RA1PPSbits.RA1PPS2 // bit 2
7902 #define RA1PPS3 RA1PPSbits.RA1PPS3 // bit 3
7903
7904 #define RA2PPS0 RA2PPSbits.RA2PPS0 // bit 0
7905 #define RA2PPS1 RA2PPSbits.RA2PPS1 // bit 1
7906 #define RA2PPS2 RA2PPSbits.RA2PPS2 // bit 2
7907 #define RA2PPS3 RA2PPSbits.RA2PPS3 // bit 3
7908
7909 #define RA4PPS0 RA4PPSbits.RA4PPS0 // bit 0
7910 #define RA4PPS1 RA4PPSbits.RA4PPS1 // bit 1
7911 #define RA4PPS2 RA4PPSbits.RA4PPS2 // bit 2
7912 #define RA4PPS3 RA4PPSbits.RA4PPS3 // bit 3
7913
7914 #define RA5PPS0 RA5PPSbits.RA5PPS0 // bit 0
7915 #define RA5PPS1 RA5PPSbits.RA5PPS1 // bit 1
7916 #define RA5PPS2 RA5PPSbits.RA5PPS2 // bit 2
7917 #define RA5PPS3 RA5PPSbits.RA5PPS3 // bit 3
7918
7919 #define RB4PPS0 RB4PPSbits.RB4PPS0 // bit 0
7920 #define RB4PPS1 RB4PPSbits.RB4PPS1 // bit 1
7921 #define RB4PPS2 RB4PPSbits.RB4PPS2 // bit 2
7922 #define RB4PPS3 RB4PPSbits.RB4PPS3 // bit 3
7923
7924 #define RB5PPS0 RB5PPSbits.RB5PPS0 // bit 0
7925 #define RB5PPS1 RB5PPSbits.RB5PPS1 // bit 1
7926 #define RB5PPS2 RB5PPSbits.RB5PPS2 // bit 2
7927 #define RB5PPS3 RB5PPSbits.RB5PPS3 // bit 3
7928
7929 #define RB6PPS0 RB6PPSbits.RB6PPS0 // bit 0
7930 #define RB6PPS1 RB6PPSbits.RB6PPS1 // bit 1
7931 #define RB6PPS2 RB6PPSbits.RB6PPS2 // bit 2
7932 #define RB6PPS3 RB6PPSbits.RB6PPS3 // bit 3
7933
7934 #define RB7PPS0 RB7PPSbits.RB7PPS0 // bit 0
7935 #define RB7PPS1 RB7PPSbits.RB7PPS1 // bit 1
7936 #define RB7PPS2 RB7PPSbits.RB7PPS2 // bit 2
7937 #define RB7PPS3 RB7PPSbits.RB7PPS3 // bit 3
7938
7939 #define RC0PPS0 RC0PPSbits.RC0PPS0 // bit 0
7940 #define RC0PPS1 RC0PPSbits.RC0PPS1 // bit 1
7941 #define RC0PPS2 RC0PPSbits.RC0PPS2 // bit 2
7942 #define RC0PPS3 RC0PPSbits.RC0PPS3 // bit 3
7943
7944 #define RC1PPS0 RC1PPSbits.RC1PPS0 // bit 0
7945 #define RC1PPS1 RC1PPSbits.RC1PPS1 // bit 1
7946 #define RC1PPS2 RC1PPSbits.RC1PPS2 // bit 2
7947 #define RC1PPS3 RC1PPSbits.RC1PPS3 // bit 3
7948
7949 #define RC3PPS0 RC3PPSbits.RC3PPS0 // bit 0
7950 #define RC3PPS1 RC3PPSbits.RC3PPS1 // bit 1
7951 #define RC3PPS2 RC3PPSbits.RC3PPS2 // bit 2
7952 #define RC3PPS3 RC3PPSbits.RC3PPS3 // bit 3
7953
7954 #define RC4PPS0 RC4PPSbits.RC4PPS0 // bit 0
7955 #define RC4PPS1 RC4PPSbits.RC4PPS1 // bit 1
7956 #define RC4PPS2 RC4PPSbits.RC4PPS2 // bit 2
7957 #define RC4PPS3 RC4PPSbits.RC4PPS3 // bit 3
7958
7959 #define RC5PPS0 RC5PPSbits.RC5PPS0 // bit 0
7960 #define RC5PPS1 RC5PPSbits.RC5PPS1 // bit 1
7961 #define RC5PPS2 RC5PPSbits.RC5PPS2 // bit 2
7962 #define RC5PPS3 RC5PPSbits.RC5PPS3 // bit 3
7963
7964 #define RC6PPS0 RC6PPSbits.RC6PPS0 // bit 0
7965 #define RC6PPS1 RC6PPSbits.RC6PPS1 // bit 1
7966 #define RC6PPS2 RC6PPSbits.RC6PPS2 // bit 2
7967 #define RC6PPS3 RC6PPSbits.RC6PPS3 // bit 3
7968
7969 #define RC7PPS0 RC7PPSbits.RC7PPS0 // bit 0
7970 #define RC7PPS1 RC7PPSbits.RC7PPS1 // bit 1
7971 #define RC7PPS2 RC7PPSbits.RC7PPS2 // bit 2
7972 #define RC7PPS3 RC7PPSbits.RC7PPS3 // bit 3
7973
7974 #define RX9D RCSTAbits.RX9D // bit 0
7975 #define OERR RCSTAbits.OERR // bit 1
7976 #define FERR RCSTAbits.FERR // bit 2
7977 #define ADDEN RCSTAbits.ADDEN // bit 3
7978 #define CREN RCSTAbits.CREN // bit 4
7979 #define SREN RCSTAbits.SREN // bit 5
7980 #define RX9 RCSTAbits.RX9 // bit 6
7981 #define SPEN RCSTAbits.SPEN // bit 7
7982
7983 #define RXPPS0 RXPPSbits.RXPPS0 // bit 0
7984 #define RXPPS1 RXPPSbits.RXPPS1 // bit 1
7985 #define RXPPS2 RXPPSbits.RXPPS2 // bit 2
7986 #define RXPPS3 RXPPSbits.RXPPS3 // bit 3
7987 #define RXPPS4 RXPPSbits.RXPPS4 // bit 4
7988
7989 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
7990 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
7991 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
7992 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
7993 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
7994
7995 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
7996 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
7997 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
7998 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
7999
8000 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
8001 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
8002 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
8003 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
8004 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
8005 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
8006 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
8007 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
8008
8009 #define C STATUSbits.C // bit 0
8010 #define DC STATUSbits.DC // bit 1
8011 #define Z STATUSbits.Z // bit 2
8012 #define NOT_PD STATUSbits.NOT_PD // bit 3
8013 #define NOT_TO STATUSbits.NOT_TO // bit 4
8014
8015 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
8016 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
8017 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
8018
8019 #define T0CKIPPS0 T0CKIPPSbits.T0CKIPPS0 // bit 0
8020 #define T0CKIPPS1 T0CKIPPSbits.T0CKIPPS1 // bit 1
8021 #define T0CKIPPS2 T0CKIPPSbits.T0CKIPPS2 // bit 2
8022 #define T0CKIPPS3 T0CKIPPSbits.T0CKIPPS3 // bit 3
8023 #define T0CKIPPS4 T0CKIPPSbits.T0CKIPPS4 // bit 4
8024
8025 #define T1CKIPPS0 T1CKIPPSbits.T1CKIPPS0 // bit 0
8026 #define T1CKIPPS1 T1CKIPPSbits.T1CKIPPS1 // bit 1
8027 #define T1CKIPPS2 T1CKIPPSbits.T1CKIPPS2 // bit 2
8028 #define T1CKIPPS3 T1CKIPPSbits.T1CKIPPS3 // bit 3
8029 #define T1CKIPPS4 T1CKIPPSbits.T1CKIPPS4 // bit 4
8030
8031 #define TMR1ON T1CONbits.TMR1ON // bit 0
8032 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
8033 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
8034 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
8035 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
8036 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
8037 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
8038
8039 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
8040 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
8041 #define T1GVAL T1GCONbits.T1GVAL // bit 2
8042 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
8043 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
8044 #define T1GSPM T1GCONbits.T1GSPM // bit 4
8045 #define T1GTM T1GCONbits.T1GTM // bit 5
8046 #define T1GPOL T1GCONbits.T1GPOL // bit 6
8047 #define TMR1GE T1GCONbits.TMR1GE // bit 7
8048
8049 #define T1GPPS0 T1GPPSbits.T1GPPS0 // bit 0
8050 #define T1GPPS1 T1GPPSbits.T1GPPS1 // bit 1
8051 #define T1GPPS2 T1GPPSbits.T1GPPS2 // bit 2
8052 #define T1GPPS3 T1GPPSbits.T1GPPS3 // bit 3
8053 #define T1GPPS4 T1GPPSbits.T1GPPS4 // bit 4
8054
8055 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
8056 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
8057 #define TMR2ON T2CONbits.TMR2ON // bit 2
8058 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
8059 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
8060 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
8061 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
8062
8063 #define TRISA0 TRISAbits.TRISA0 // bit 0
8064 #define TRISA1 TRISAbits.TRISA1 // bit 1
8065 #define TRISA2 TRISAbits.TRISA2 // bit 2
8066 #define TRISA3 TRISAbits.TRISA3 // bit 3
8067 #define TRISA4 TRISAbits.TRISA4 // bit 4
8068 #define TRISA5 TRISAbits.TRISA5 // bit 5
8069
8070 #define TRISB3 TRISBbits.TRISB3 // bit 4
8071 #define TRISB5 TRISBbits.TRISB5 // bit 5
8072 #define TRISB6 TRISBbits.TRISB6 // bit 6
8073 #define TRISB7 TRISBbits.TRISB7 // bit 7
8074
8075 #define TRISC0 TRISCbits.TRISC0 // bit 0
8076 #define TRISC1 TRISCbits.TRISC1 // bit 1
8077 #define TRISC2 TRISCbits.TRISC2 // bit 2
8078 #define TRISC3 TRISCbits.TRISC3 // bit 3
8079 #define TRISC4 TRISCbits.TRISC4 // bit 4
8080 #define TRISC5 TRISCbits.TRISC5 // bit 5
8081 #define TRISC6 TRISCbits.TRISC6 // bit 6
8082 #define TRISC7 TRISCbits.TRISC7 // bit 7
8083
8084 #define TX9D TXSTAbits.TX9D // bit 0
8085 #define TRMT TXSTAbits.TRMT // bit 1
8086 #define BRGH TXSTAbits.BRGH // bit 2
8087 #define SENDB TXSTAbits.SENDB // bit 3
8088 #define SYNC TXSTAbits.SYNC // bit 4
8089 #define TXEN TXSTAbits.TXEN // bit 5
8090 #define TX9 TXSTAbits.TX9 // bit 6
8091 #define CSRC TXSTAbits.CSRC // bit 7
8092
8093 #define Reserved VREGCONbits.Reserved // bit 0
8094 #define VREGPM VREGCONbits.VREGPM // bit 1
8095
8096 #define SWDTEN WDTCONbits.SWDTEN // bit 0
8097 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
8098 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
8099 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
8100 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
8101 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
8102
8103 #define WPUA0 WPUAbits.WPUA0 // bit 0
8104 #define WPUA1 WPUAbits.WPUA1 // bit 1
8105 #define WPUA2 WPUAbits.WPUA2 // bit 2
8106 #define WPUA3 WPUAbits.WPUA3 // bit 3
8107 #define WPUA4 WPUAbits.WPUA4 // bit 4
8108 #define WPUA5 WPUAbits.WPUA5 // bit 5
8109
8110 #define WPUB4 WPUBbits.WPUB4 // bit 4
8111 #define WPUB5 WPUBbits.WPUB5 // bit 5
8112 #define WPUB6 WPUBbits.WPUB6 // bit 6
8113 #define WPUB7 WPUBbits.WPUB7 // bit 7
8114
8115 #define WPUC0 WPUCbits.WPUC0 // bit 0
8116 #define WPUC1 WPUCbits.WPUC1 // bit 1
8117 #define WPUC2 WPUCbits.WPUC2 // bit 2
8118 #define WPUC3 WPUCbits.WPUC3 // bit 3
8119 #define WPUC4 WPUCbits.WPUC4 // bit 4
8120 #define WPUC5 WPUCbits.WPUC5 // bit 5
8121 #define WPUC6 WPUCbits.WPUC6 // bit 6
8122 #define WPUC7 WPUCbits.WPUC7 // bit 7
8123
8124 #endif // #ifndef NO_BIT_DEFINES
8125
8126 #endif // #ifndef __PIC16F1578_H__
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