2 * This declarations of the PIC16F1713 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:12 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F1713_H__
26 #define __PIC16F1713_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTE_ADDR 0x0010
54 #define PIR1_ADDR 0x0011
55 #define PIR2_ADDR 0x0012
56 #define PIR3_ADDR 0x0013
57 #define TMR0_ADDR 0x0015
58 #define TMR1_ADDR 0x0016
59 #define TMR1L_ADDR 0x0016
60 #define TMR1H_ADDR 0x0017
61 #define T1CON_ADDR 0x0018
62 #define T1GCON_ADDR 0x0019
63 #define TMR2_ADDR 0x001A
64 #define PR2_ADDR 0x001B
65 #define T2CON_ADDR 0x001C
66 #define TRISA_ADDR 0x008C
67 #define TRISB_ADDR 0x008D
68 #define TRISC_ADDR 0x008E
69 #define TRISE_ADDR 0x0090
70 #define PIE1_ADDR 0x0091
71 #define PIE2_ADDR 0x0092
72 #define PIE3_ADDR 0x0093
73 #define OPTION_REG_ADDR 0x0095
74 #define PCON_ADDR 0x0096
75 #define WDTCON_ADDR 0x0097
76 #define OSCTUNE_ADDR 0x0098
77 #define OSCCON_ADDR 0x0099
78 #define OSCSTAT_ADDR 0x009A
79 #define ADRES_ADDR 0x009B
80 #define ADRESL_ADDR 0x009B
81 #define ADRESH_ADDR 0x009C
82 #define ADCON0_ADDR 0x009D
83 #define ADCON1_ADDR 0x009E
84 #define ADCON2_ADDR 0x009F
85 #define LATA_ADDR 0x010C
86 #define LATB_ADDR 0x010D
87 #define LATC_ADDR 0x010E
88 #define CM1CON0_ADDR 0x0111
89 #define CM1CON1_ADDR 0x0112
90 #define CM2CON0_ADDR 0x0113
91 #define CM2CON1_ADDR 0x0114
92 #define CMOUT_ADDR 0x0115
93 #define BORCON_ADDR 0x0116
94 #define FVRCON_ADDR 0x0117
95 #define DAC1CON0_ADDR 0x0118
96 #define DAC1CON1_ADDR 0x0119
97 #define DAC2CON0_ADDR 0x011A
98 #define DAC2CON1_ADDR 0x011B
99 #define DAC2REF_ADDR 0x011B
100 #define ZCD1CON_ADDR 0x011C
101 #define ANSELA_ADDR 0x018C
102 #define ANSELB_ADDR 0x018D
103 #define ANSELC_ADDR 0x018E
104 #define PMADR_ADDR 0x0191
105 #define PMADRL_ADDR 0x0191
106 #define PMADRH_ADDR 0x0192
107 #define PMDAT_ADDR 0x0193
108 #define PMDATL_ADDR 0x0193
109 #define PMDATH_ADDR 0x0194
110 #define PMCON1_ADDR 0x0195
111 #define PMCON2_ADDR 0x0196
112 #define VREGCON_ADDR 0x0197
113 #define RC1REG_ADDR 0x0199
114 #define RCREG_ADDR 0x0199
115 #define RCREG1_ADDR 0x0199
116 #define TX1REG_ADDR 0x019A
117 #define TXREG_ADDR 0x019A
118 #define TXREG1_ADDR 0x019A
119 #define SP1BRG_ADDR 0x019B
120 #define SP1BRGL_ADDR 0x019B
121 #define SPBRG_ADDR 0x019B
122 #define SPBRG1_ADDR 0x019B
123 #define SPBRGL_ADDR 0x019B
124 #define SP1BRGH_ADDR 0x019C
125 #define SPBRGH_ADDR 0x019C
126 #define SPBRGH1_ADDR 0x019C
127 #define RC1STA_ADDR 0x019D
128 #define RCSTA_ADDR 0x019D
129 #define RCSTA1_ADDR 0x019D
130 #define TX1STA_ADDR 0x019E
131 #define TXSTA_ADDR 0x019E
132 #define TXSTA1_ADDR 0x019E
133 #define BAUD1CON_ADDR 0x019F
134 #define BAUDCON_ADDR 0x019F
135 #define BAUDCON1_ADDR 0x019F
136 #define BAUDCTL_ADDR 0x019F
137 #define BAUDCTL1_ADDR 0x019F
138 #define WPUA_ADDR 0x020C
139 #define WPUB_ADDR 0x020D
140 #define WPUC_ADDR 0x020E
141 #define WPUE_ADDR 0x0210
142 #define SSP1BUF_ADDR 0x0211
143 #define SSPBUF_ADDR 0x0211
144 #define SSP1ADD_ADDR 0x0212
145 #define SSPADD_ADDR 0x0212
146 #define SSP1MSK_ADDR 0x0213
147 #define SSPMSK_ADDR 0x0213
148 #define SSP1STAT_ADDR 0x0214
149 #define SSPSTAT_ADDR 0x0214
150 #define SSP1CON_ADDR 0x0215
151 #define SSP1CON1_ADDR 0x0215
152 #define SSPCON_ADDR 0x0215
153 #define SSPCON1_ADDR 0x0215
154 #define SSP1CON2_ADDR 0x0216
155 #define SSPCON2_ADDR 0x0216
156 #define SSP1CON3_ADDR 0x0217
157 #define SSPCON3_ADDR 0x0217
158 #define ODCONA_ADDR 0x028C
159 #define ODCONB_ADDR 0x028D
160 #define ODCONC_ADDR 0x028E
161 #define CCPR1_ADDR 0x0291
162 #define CCPR1L_ADDR 0x0291
163 #define CCPR1H_ADDR 0x0292
164 #define CCP1CON_ADDR 0x0293
165 #define ECCP1CON_ADDR 0x0293
166 #define CCPR2_ADDR 0x0298
167 #define CCPR2L_ADDR 0x0298
168 #define CCPR2H_ADDR 0x0299
169 #define CCP2CON_ADDR 0x029A
170 #define ECCP2CON_ADDR 0x029A
171 #define CCPTMRS_ADDR 0x029E
172 #define SLRCONA_ADDR 0x030C
173 #define SLRCONB_ADDR 0x030D
174 #define SLRCONC_ADDR 0x030E
175 #define INLVLA_ADDR 0x038C
176 #define INLVLB_ADDR 0x038D
177 #define INLVLC_ADDR 0x038E
178 #define INLVLE_ADDR 0x0390
179 #define IOCAP_ADDR 0x0391
180 #define IOCAN_ADDR 0x0392
181 #define IOCAF_ADDR 0x0393
182 #define IOCBP_ADDR 0x0394
183 #define IOCBN_ADDR 0x0395
184 #define IOCBF_ADDR 0x0396
185 #define IOCCP_ADDR 0x0397
186 #define IOCCN_ADDR 0x0398
187 #define IOCCF_ADDR 0x0399
188 #define IOCEP_ADDR 0x039D
189 #define IOCEN_ADDR 0x039E
190 #define IOCEF_ADDR 0x039F
191 #define TMR4_ADDR 0x0415
192 #define PR4_ADDR 0x0416
193 #define T4CON_ADDR 0x0417
194 #define TMR6_ADDR 0x041C
195 #define PR6_ADDR 0x041D
196 #define T6CON_ADDR 0x041E
197 #define NCO1ACC_ADDR 0x0498
198 #define NCO1ACCL_ADDR 0x0498
199 #define NCO1ACCH_ADDR 0x0499
200 #define NCO1ACCU_ADDR 0x049A
201 #define NCO1INC_ADDR 0x049B
202 #define NCO1INCL_ADDR 0x049B
203 #define NCO1INCH_ADDR 0x049C
204 #define NCO1INCU_ADDR 0x049D
205 #define NCO1CON_ADDR 0x049E
206 #define NCO1CLK_ADDR 0x049F
207 #define OPA1CON_ADDR 0x0511
208 #define OPA2CON_ADDR 0x0515
209 #define PWM3DCL_ADDR 0x0617
210 #define PWM3DCH_ADDR 0x0618
211 #define PWM3CON_ADDR 0x0619
212 #define PWM3CON0_ADDR 0x0619
213 #define PWM4DCL_ADDR 0x061A
214 #define PWM4DCH_ADDR 0x061B
215 #define PWM4CON_ADDR 0x061C
216 #define PWM4CON0_ADDR 0x061C
217 #define COG1PHR_ADDR 0x0691
218 #define COG1PHF_ADDR 0x0692
219 #define COG1BLKR_ADDR 0x0693
220 #define COG1BLKF_ADDR 0x0694
221 #define COG1DBR_ADDR 0x0695
222 #define COG1DBF_ADDR 0x0696
223 #define COG1CON0_ADDR 0x0697
224 #define COG1CON1_ADDR 0x0698
225 #define COG1RIS_ADDR 0x0699
226 #define COG1RSIM_ADDR 0x069A
227 #define COG1FIS_ADDR 0x069B
228 #define COG1FSIM_ADDR 0x069C
229 #define COG1ASD0_ADDR 0x069D
230 #define COG1ASD1_ADDR 0x069E
231 #define COG1STR_ADDR 0x069F
232 #define PPSLOCK_ADDR 0x0E0F
233 #define INTPPS_ADDR 0x0E10
234 #define T0CKIPPS_ADDR 0x0E11
235 #define T1CKIPPS_ADDR 0x0E12
236 #define T1GPPS_ADDR 0x0E13
237 #define CCP1PPS_ADDR 0x0E14
238 #define CCP2PPS_ADDR 0x0E15
239 #define COGINPPS_ADDR 0x0E17
240 #define SSPCLKPPS_ADDR 0x0E20
241 #define SSPDATPPS_ADDR 0x0E21
242 #define SSPSSPPS_ADDR 0x0E22
243 #define RXPPS_ADDR 0x0E24
244 #define CKPPS_ADDR 0x0E25
245 #define CLCIN0PPS_ADDR 0x0E28
246 #define CLCIN1PPS_ADDR 0x0E29
247 #define CLCIN2PPS_ADDR 0x0E2A
248 #define CLCIN3PPS_ADDR 0x0E2B
249 #define RA0PPS_ADDR 0x0E90
250 #define RA1PPS_ADDR 0x0E91
251 #define RA2PPS_ADDR 0x0E92
252 #define RA3PPS_ADDR 0x0E93
253 #define RA4PPS_ADDR 0x0E94
254 #define RA5PPS_ADDR 0x0E95
255 #define RA6PPS_ADDR 0x0E96
256 #define RA7PPS_ADDR 0x0E97
257 #define RB0PPS_ADDR 0x0E98
258 #define RB1PPS_ADDR 0x0E99
259 #define RB2PPS_ADDR 0x0E9A
260 #define RB3PPS_ADDR 0x0E9B
261 #define RB4PPS_ADDR 0x0E9C
262 #define RB5PPS_ADDR 0x0E9D
263 #define RB6PPS_ADDR 0x0E9E
264 #define RB7PPS_ADDR 0x0E9F
265 #define RC0PPS_ADDR 0x0EA0
266 #define RC1PPS_ADDR 0x0EA1
267 #define RC2PPS_ADDR 0x0EA2
268 #define RC3PPS_ADDR 0x0EA3
269 #define RC4PPS_ADDR 0x0EA4
270 #define RC5PPS_ADDR 0x0EA5
271 #define RC6PPS_ADDR 0x0EA6
272 #define RC7PPS_ADDR 0x0EA7
273 #define CLCDATA_ADDR 0x0F0F
274 #define CLC1CON_ADDR 0x0F10
275 #define CLC1POL_ADDR 0x0F11
276 #define CLC1SEL0_ADDR 0x0F12
277 #define CLC1SEL1_ADDR 0x0F13
278 #define CLC1SEL2_ADDR 0x0F14
279 #define CLC1SEL3_ADDR 0x0F15
280 #define CLC1GLS0_ADDR 0x0F16
281 #define CLC1GLS1_ADDR 0x0F17
282 #define CLC1GLS2_ADDR 0x0F18
283 #define CLC1GLS3_ADDR 0x0F19
284 #define CLC2CON_ADDR 0x0F1A
285 #define CLC2POL_ADDR 0x0F1B
286 #define CLC2SEL0_ADDR 0x0F1C
287 #define CLC2SEL1_ADDR 0x0F1D
288 #define CLC2SEL2_ADDR 0x0F1E
289 #define CLC2SEL3_ADDR 0x0F1F
290 #define CLC2GLS0_ADDR 0x0F20
291 #define CLC2GLS1_ADDR 0x0F21
292 #define CLC2GLS2_ADDR 0x0F22
293 #define CLC2GLS3_ADDR 0x0F23
294 #define CLC3CON_ADDR 0x0F24
295 #define CLC3POL_ADDR 0x0F25
296 #define CLC3SEL0_ADDR 0x0F26
297 #define CLC3SEL1_ADDR 0x0F27
298 #define CLC3SEL2_ADDR 0x0F28
299 #define CLC3SEL3_ADDR 0x0F29
300 #define CLC3GLS0_ADDR 0x0F2A
301 #define CLC3GLS1_ADDR 0x0F2B
302 #define CLC3GLS2_ADDR 0x0F2C
303 #define CLC3GLS3_ADDR 0x0F2D
304 #define CLC4CON_ADDR 0x0F2E
305 #define CLC4POL_ADDR 0x0F2F
306 #define CLC4SEL0_ADDR 0x0F30
307 #define CLC4SEL1_ADDR 0x0F31
308 #define CLC4SEL2_ADDR 0x0F32
309 #define CLC4SEL3_ADDR 0x0F33
310 #define CLC4GLS0_ADDR 0x0F34
311 #define CLC4GLS1_ADDR 0x0F35
312 #define CLC4GLS2_ADDR 0x0F36
313 #define CLC4GLS3_ADDR 0x0F37
314 #define STATUS_SHAD_ADDR 0x0FE4
315 #define WREG_SHAD_ADDR 0x0FE5
316 #define BSR_SHAD_ADDR 0x0FE6
317 #define PCLATH_SHAD_ADDR 0x0FE7
318 #define FSR0L_SHAD_ADDR 0x0FE8
319 #define FSR0H_SHAD_ADDR 0x0FE9
320 #define FSR1L_SHAD_ADDR 0x0FEA
321 #define FSR1H_SHAD_ADDR 0x0FEB
322 #define STKPTR_ADDR 0x0FED
323 #define TOSL_ADDR 0x0FEE
324 #define TOSH_ADDR 0x0FEF
326 #endif // #ifndef NO_ADDR_DEFINES
328 //==============================================================================
330 // Register Definitions
332 //==============================================================================
334 extern __at(0x0000) __sfr INDF0
;
335 extern __at(0x0001) __sfr INDF1
;
336 extern __at(0x0002) __sfr PCL
;
338 //==============================================================================
341 extern __at(0x0003) __sfr STATUS
;
355 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
363 //==============================================================================
365 extern __at(0x0004) __sfr FSR0
;
366 extern __at(0x0004) __sfr FSR0L
;
367 extern __at(0x0005) __sfr FSR0H
;
368 extern __at(0x0006) __sfr FSR1
;
369 extern __at(0x0006) __sfr FSR1L
;
370 extern __at(0x0007) __sfr FSR1H
;
372 //==============================================================================
375 extern __at(0x0008) __sfr BSR
;
398 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
406 //==============================================================================
408 extern __at(0x0009) __sfr WREG
;
409 extern __at(0x000A) __sfr PCLATH
;
411 //==============================================================================
414 extern __at(0x000B) __sfr INTCON
;
443 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
456 //==============================================================================
459 //==============================================================================
462 extern __at(0x000C) __sfr PORTA
;
476 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
487 //==============================================================================
490 //==============================================================================
493 extern __at(0x000D) __sfr PORTB
;
507 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
518 //==============================================================================
521 //==============================================================================
524 extern __at(0x000E) __sfr PORTC
;
538 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
549 //==============================================================================
552 //==============================================================================
555 extern __at(0x0010) __sfr PORTE
;
569 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
573 //==============================================================================
576 //==============================================================================
579 extern __at(0x0011) __sfr PIR1
;
590 unsigned TMR1GIF
: 1;
593 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
602 #define _TMR1GIF 0x80
604 //==============================================================================
607 //==============================================================================
610 extern __at(0x0012) __sfr PIR2
;
624 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
634 //==============================================================================
637 //==============================================================================
640 extern __at(0x0013) __sfr PIR3
;
654 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
664 //==============================================================================
666 extern __at(0x0015) __sfr TMR0
;
667 extern __at(0x0016) __sfr TMR1
;
668 extern __at(0x0016) __sfr TMR1L
;
669 extern __at(0x0017) __sfr TMR1H
;
671 //==============================================================================
674 extern __at(0x0018) __sfr T1CON
;
682 unsigned NOT_T1SYNC
: 1;
683 unsigned T1OSCEN
: 1;
684 unsigned T1CKPS0
: 1;
685 unsigned T1CKPS1
: 1;
686 unsigned TMR1CS0
: 1;
687 unsigned TMR1CS1
: 1;
704 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
707 #define _NOT_T1SYNC 0x04
708 #define _T1OSCEN 0x08
709 #define _T1CKPS0 0x10
710 #define _T1CKPS1 0x20
711 #define _TMR1CS0 0x40
712 #define _TMR1CS1 0x80
714 //==============================================================================
717 //==============================================================================
720 extern __at(0x0019) __sfr T1GCON
;
729 unsigned T1GGO_NOT_DONE
: 1;
743 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
748 #define _T1GGO_NOT_DONE 0x08
754 //==============================================================================
756 extern __at(0x001A) __sfr TMR2
;
757 extern __at(0x001B) __sfr PR2
;
759 //==============================================================================
762 extern __at(0x001C) __sfr T2CON
;
768 unsigned T2CKPS0
: 1;
769 unsigned T2CKPS1
: 1;
771 unsigned T2OUTPS0
: 1;
772 unsigned T2OUTPS1
: 1;
773 unsigned T2OUTPS2
: 1;
774 unsigned T2OUTPS3
: 1;
787 unsigned T2OUTPS
: 4;
792 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
794 #define _T2CKPS0 0x01
795 #define _T2CKPS1 0x02
797 #define _T2OUTPS0 0x08
798 #define _T2OUTPS1 0x10
799 #define _T2OUTPS2 0x20
800 #define _T2OUTPS3 0x40
802 //==============================================================================
805 //==============================================================================
808 extern __at(0x008C) __sfr TRISA
;
822 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
833 //==============================================================================
836 //==============================================================================
839 extern __at(0x008D) __sfr TRISB
;
853 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
864 //==============================================================================
867 //==============================================================================
870 extern __at(0x008E) __sfr TRISC
;
884 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
895 //==============================================================================
898 //==============================================================================
901 extern __at(0x0090) __sfr TRISE
;
915 extern __at(0x0090) volatile __TRISEbits_t TRISEbits
;
919 //==============================================================================
922 //==============================================================================
925 extern __at(0x0091) __sfr PIE1
;
936 unsigned TMR1GIE
: 1;
939 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
948 #define _TMR1GIE 0x80
950 //==============================================================================
953 //==============================================================================
956 extern __at(0x0092) __sfr PIE2
;
970 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
980 //==============================================================================
983 //==============================================================================
986 extern __at(0x0093) __sfr PIE3
;
1000 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1002 #define _CLC1IE 0x01
1003 #define _CLC2IE 0x02
1004 #define _CLC3IE 0x04
1005 #define _CLC4IE 0x08
1010 //==============================================================================
1013 //==============================================================================
1016 extern __at(0x0095) __sfr OPTION_REG
;
1026 unsigned TMR0SE
: 1;
1027 unsigned TMR0CS
: 1;
1028 unsigned INTEDG
: 1;
1029 unsigned NOT_WPUEN
: 1;
1049 } __OPTION_REGbits_t
;
1051 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1057 #define _TMR0SE 0x10
1059 #define _TMR0CS 0x20
1061 #define _INTEDG 0x40
1062 #define _NOT_WPUEN 0x80
1064 //==============================================================================
1067 //==============================================================================
1070 extern __at(0x0096) __sfr PCON
;
1074 unsigned NOT_BOR
: 1;
1075 unsigned NOT_POR
: 1;
1076 unsigned NOT_RI
: 1;
1077 unsigned NOT_RMCLR
: 1;
1078 unsigned NOT_RWDT
: 1;
1080 unsigned STKUNF
: 1;
1081 unsigned STKOVF
: 1;
1084 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1086 #define _NOT_BOR 0x01
1087 #define _NOT_POR 0x02
1088 #define _NOT_RI 0x04
1089 #define _NOT_RMCLR 0x08
1090 #define _NOT_RWDT 0x10
1091 #define _STKUNF 0x40
1092 #define _STKOVF 0x80
1094 //==============================================================================
1097 //==============================================================================
1100 extern __at(0x0097) __sfr WDTCON
;
1106 unsigned SWDTEN
: 1;
1107 unsigned WDTPS0
: 1;
1108 unsigned WDTPS1
: 1;
1109 unsigned WDTPS2
: 1;
1110 unsigned WDTPS3
: 1;
1111 unsigned WDTPS4
: 1;
1124 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1126 #define _SWDTEN 0x01
1127 #define _WDTPS0 0x02
1128 #define _WDTPS1 0x04
1129 #define _WDTPS2 0x08
1130 #define _WDTPS3 0x10
1131 #define _WDTPS4 0x20
1133 //==============================================================================
1136 //==============================================================================
1139 extern __at(0x0098) __sfr OSCTUNE
;
1162 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1171 //==============================================================================
1174 //==============================================================================
1177 extern __at(0x0099) __sfr OSCCON
;
1190 unsigned SPLLEN
: 1;
1207 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1215 #define _SPLLEN 0x80
1217 //==============================================================================
1220 //==============================================================================
1223 extern __at(0x009A) __sfr OSCSTAT
;
1227 unsigned HFIOFS
: 1;
1228 unsigned LFIOFR
: 1;
1229 unsigned MFIOFR
: 1;
1230 unsigned HFIOFL
: 1;
1231 unsigned HFIOFR
: 1;
1237 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1239 #define _HFIOFS 0x01
1240 #define _LFIOFR 0x02
1241 #define _MFIOFR 0x04
1242 #define _HFIOFL 0x08
1243 #define _HFIOFR 0x10
1248 //==============================================================================
1250 extern __at(0x009B) __sfr ADRES
;
1251 extern __at(0x009B) __sfr ADRESL
;
1252 extern __at(0x009C) __sfr ADRESH
;
1254 //==============================================================================
1257 extern __at(0x009D) __sfr ADCON0
;
1264 unsigned GO_NOT_DONE
: 1;
1305 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1308 #define _GO_NOT_DONE 0x02
1317 //==============================================================================
1320 //==============================================================================
1323 extern __at(0x009E) __sfr ADCON1
;
1329 unsigned ADPREF0
: 1;
1330 unsigned ADPREF1
: 1;
1331 unsigned ADNREF
: 1;
1341 unsigned ADPREF
: 2;
1346 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1348 #define _ADPREF0 0x01
1349 #define _ADPREF1 0x02
1350 #define _ADNREF 0x04
1353 //==============================================================================
1356 //==============================================================================
1359 extern __at(0x009F) __sfr ADCON2
;
1369 unsigned TRIGSEL0
: 1;
1370 unsigned TRIGSEL1
: 1;
1371 unsigned TRIGSEL2
: 1;
1372 unsigned TRIGSEL3
: 1;
1378 unsigned TRIGSEL
: 4;
1382 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1384 #define _TRIGSEL0 0x10
1385 #define _TRIGSEL1 0x20
1386 #define _TRIGSEL2 0x40
1387 #define _TRIGSEL3 0x80
1389 //==============================================================================
1392 //==============================================================================
1395 extern __at(0x010C) __sfr LATA
;
1409 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1420 //==============================================================================
1423 //==============================================================================
1426 extern __at(0x010D) __sfr LATB
;
1440 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
1451 //==============================================================================
1454 //==============================================================================
1457 extern __at(0x010E) __sfr LATC
;
1471 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1482 //==============================================================================
1485 //==============================================================================
1488 extern __at(0x0111) __sfr CM1CON0
;
1492 unsigned C1SYNC
: 1;
1502 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1504 #define _C1SYNC 0x01
1512 //==============================================================================
1515 //==============================================================================
1518 extern __at(0x0112) __sfr CM1CON1
;
1524 unsigned C1NCH0
: 1;
1525 unsigned C1NCH1
: 1;
1526 unsigned C1NCH2
: 1;
1527 unsigned C1PCH0
: 1;
1528 unsigned C1PCH1
: 1;
1529 unsigned C1PCH2
: 1;
1530 unsigned C1INTN
: 1;
1531 unsigned C1INTP
: 1;
1548 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1550 #define _C1NCH0 0x01
1551 #define _C1NCH1 0x02
1552 #define _C1NCH2 0x04
1553 #define _C1PCH0 0x08
1554 #define _C1PCH1 0x10
1555 #define _C1PCH2 0x20
1556 #define _C1INTN 0x40
1557 #define _C1INTP 0x80
1559 //==============================================================================
1562 //==============================================================================
1565 extern __at(0x0113) __sfr CM2CON0
;
1569 unsigned C2SYNC
: 1;
1579 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
1581 #define _C2SYNC 0x01
1589 //==============================================================================
1592 //==============================================================================
1595 extern __at(0x0114) __sfr CM2CON1
;
1601 unsigned C2NCH0
: 1;
1602 unsigned C2NCH1
: 1;
1603 unsigned C2NCH2
: 1;
1604 unsigned C2PCH0
: 1;
1605 unsigned C2PCH1
: 1;
1606 unsigned C2PCH2
: 1;
1607 unsigned C2INTN
: 1;
1608 unsigned C2INTP
: 1;
1625 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
1627 #define _C2NCH0 0x01
1628 #define _C2NCH1 0x02
1629 #define _C2NCH2 0x04
1630 #define _C2PCH0 0x08
1631 #define _C2PCH1 0x10
1632 #define _C2PCH2 0x20
1633 #define _C2INTN 0x40
1634 #define _C2INTP 0x80
1636 //==============================================================================
1639 //==============================================================================
1642 extern __at(0x0115) __sfr CMOUT
;
1646 unsigned MC1OUT
: 1;
1647 unsigned MC2OUT
: 1;
1656 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1658 #define _MC1OUT 0x01
1659 #define _MC2OUT 0x02
1661 //==============================================================================
1664 //==============================================================================
1667 extern __at(0x0116) __sfr BORCON
;
1671 unsigned BORRDY
: 1;
1678 unsigned SBOREN
: 1;
1681 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1683 #define _BORRDY 0x01
1685 #define _SBOREN 0x80
1687 //==============================================================================
1690 //==============================================================================
1693 extern __at(0x0117) __sfr FVRCON
;
1699 unsigned ADFVR0
: 1;
1700 unsigned ADFVR1
: 1;
1701 unsigned CDAFVR0
: 1;
1702 unsigned CDAFVR1
: 1;
1705 unsigned FVRRDY
: 1;
1718 unsigned CDAFVR
: 2;
1723 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1725 #define _ADFVR0 0x01
1726 #define _ADFVR1 0x02
1727 #define _CDAFVR0 0x04
1728 #define _CDAFVR1 0x08
1731 #define _FVRRDY 0x40
1734 //==============================================================================
1737 //==============================================================================
1740 extern __at(0x0118) __sfr DAC1CON0
;
1746 unsigned DAC1NSS
: 1;
1748 unsigned DAC1PSS0
: 1;
1749 unsigned DAC1PSS1
: 1;
1750 unsigned DAC1OE2
: 1;
1751 unsigned DAC1OE1
: 1;
1753 unsigned DAC1EN
: 1;
1758 unsigned DACNSS
: 1;
1760 unsigned DACPSS0
: 1;
1761 unsigned DACPSS1
: 1;
1762 unsigned DACOE0
: 1;
1763 unsigned DACOE1
: 1;
1771 unsigned DAC1PSS
: 2;
1778 unsigned DACPSS
: 2;
1790 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1792 #define _DAC1NSS 0x01
1793 #define _DACNSS 0x01
1794 #define _DAC1PSS0 0x04
1795 #define _DACPSS0 0x04
1796 #define _DAC1PSS1 0x08
1797 #define _DACPSS1 0x08
1798 #define _DAC1OE2 0x10
1799 #define _DACOE0 0x10
1800 #define _DAC1OE1 0x20
1801 #define _DACOE1 0x20
1802 #define _DAC1EN 0x80
1805 //==============================================================================
1808 //==============================================================================
1811 extern __at(0x0119) __sfr DAC1CON1
;
1817 unsigned DAC1R0
: 1;
1818 unsigned DAC1R1
: 1;
1819 unsigned DAC1R2
: 1;
1820 unsigned DAC1R3
: 1;
1821 unsigned DAC1R4
: 1;
1822 unsigned DAC1R5
: 1;
1823 unsigned DAC1R6
: 1;
1824 unsigned DAC1R7
: 1;
1840 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
1842 #define _DAC1R0 0x01
1844 #define _DAC1R1 0x02
1846 #define _DAC1R2 0x04
1848 #define _DAC1R3 0x08
1850 #define _DAC1R4 0x10
1852 #define _DAC1R5 0x20
1854 #define _DAC1R6 0x40
1856 #define _DAC1R7 0x80
1859 //==============================================================================
1862 //==============================================================================
1865 extern __at(0x011A) __sfr DAC2CON0
;
1883 unsigned DACNSS
: 1;
1885 unsigned DACPSS0
: 1;
1886 unsigned DACPSS1
: 1;
1887 unsigned DACOE2
: 1;
1888 unsigned DACOE1
: 1;
1895 unsigned DAC2NSS
: 1;
1897 unsigned DAC2PSS0
: 1;
1898 unsigned DAC2PSS1
: 1;
1899 unsigned DAC2OE2
: 1;
1900 unsigned DAC2OE1
: 1;
1902 unsigned DAC2EN
: 1;
1908 unsigned DACPSS
: 2;
1922 unsigned DAC2PSS
: 2;
1927 extern __at(0x011A) volatile __DAC2CON0bits_t DAC2CON0bits
;
1929 #define _DAC2CON0_NSS 0x01
1930 #define _DAC2CON0_DACNSS 0x01
1931 #define _DAC2CON0_DAC2NSS 0x01
1932 #define _DAC2CON0_PSS0 0x04
1933 #define _DAC2CON0_DACPSS0 0x04
1934 #define _DAC2CON0_DAC2PSS0 0x04
1935 #define _DAC2CON0_PSS1 0x08
1936 #define _DAC2CON0_DACPSS1 0x08
1937 #define _DAC2CON0_DAC2PSS1 0x08
1938 #define _DAC2CON0_OE2 0x10
1939 #define _DAC2CON0_DACOE2 0x10
1940 #define _DAC2CON0_DAC2OE2 0x10
1941 #define _DAC2CON0_OE1 0x20
1942 #define _DAC2CON0_DACOE1 0x20
1943 #define _DAC2CON0_DAC2OE1 0x20
1944 #define _DAC2CON0_EN 0x80
1945 #define _DAC2CON0_DACEN 0x80
1946 #define _DAC2CON0_DAC2EN 0x80
1948 //==============================================================================
1951 //==============================================================================
1954 extern __at(0x011B) __sfr DAC2CON1
;
1977 unsigned DAC2REF5
: 1;
1984 unsigned DAC2R0
: 1;
1985 unsigned DAC2R1
: 1;
1986 unsigned DAC2R2
: 1;
1987 unsigned DAC2R3
: 1;
1988 unsigned DAC2R4
: 1;
2008 unsigned DAC2REF0
: 1;
2009 unsigned DAC2REF1
: 1;
2010 unsigned DAC2REF2
: 1;
2011 unsigned DAC2REF3
: 1;
2012 unsigned DAC2REF4
: 1;
2020 unsigned DAC2REF
: 6;
2049 extern __at(0x011B) volatile __DAC2CON1bits_t DAC2CON1bits
;
2051 #define _DAC2CON1_DACR0 0x01
2052 #define _DAC2CON1_R0 0x01
2053 #define _DAC2CON1_DAC2R0 0x01
2054 #define _DAC2CON1_REF0 0x01
2055 #define _DAC2CON1_DAC2REF0 0x01
2056 #define _DAC2CON1_DACR1 0x02
2057 #define _DAC2CON1_R1 0x02
2058 #define _DAC2CON1_DAC2R1 0x02
2059 #define _DAC2CON1_REF1 0x02
2060 #define _DAC2CON1_DAC2REF1 0x02
2061 #define _DAC2CON1_DACR2 0x04
2062 #define _DAC2CON1_R2 0x04
2063 #define _DAC2CON1_DAC2R2 0x04
2064 #define _DAC2CON1_REF2 0x04
2065 #define _DAC2CON1_DAC2REF2 0x04
2066 #define _DAC2CON1_DACR3 0x08
2067 #define _DAC2CON1_R3 0x08
2068 #define _DAC2CON1_DAC2R3 0x08
2069 #define _DAC2CON1_REF3 0x08
2070 #define _DAC2CON1_DAC2REF3 0x08
2071 #define _DAC2CON1_DACR4 0x10
2072 #define _DAC2CON1_R4 0x10
2073 #define _DAC2CON1_DAC2R4 0x10
2074 #define _DAC2CON1_REF4 0x10
2075 #define _DAC2CON1_DAC2REF4 0x10
2076 #define _DAC2CON1_REF5 0x20
2077 #define _DAC2CON1_DAC2REF5 0x20
2079 //==============================================================================
2082 //==============================================================================
2085 extern __at(0x011B) __sfr DAC2REF
;
2108 unsigned DAC2REF5
: 1;
2115 unsigned DAC2R0
: 1;
2116 unsigned DAC2R1
: 1;
2117 unsigned DAC2R2
: 1;
2118 unsigned DAC2R3
: 1;
2119 unsigned DAC2R4
: 1;
2139 unsigned DAC2REF0
: 1;
2140 unsigned DAC2REF1
: 1;
2141 unsigned DAC2REF2
: 1;
2142 unsigned DAC2REF3
: 1;
2143 unsigned DAC2REF4
: 1;
2157 unsigned DAC2REF
: 6;
2180 extern __at(0x011B) volatile __DAC2REFbits_t DAC2REFbits
;
2182 #define _DAC2REF_DACR0 0x01
2183 #define _DAC2REF_R0 0x01
2184 #define _DAC2REF_DAC2R0 0x01
2185 #define _DAC2REF_REF0 0x01
2186 #define _DAC2REF_DAC2REF0 0x01
2187 #define _DAC2REF_DACR1 0x02
2188 #define _DAC2REF_R1 0x02
2189 #define _DAC2REF_DAC2R1 0x02
2190 #define _DAC2REF_REF1 0x02
2191 #define _DAC2REF_DAC2REF1 0x02
2192 #define _DAC2REF_DACR2 0x04
2193 #define _DAC2REF_R2 0x04
2194 #define _DAC2REF_DAC2R2 0x04
2195 #define _DAC2REF_REF2 0x04
2196 #define _DAC2REF_DAC2REF2 0x04
2197 #define _DAC2REF_DACR3 0x08
2198 #define _DAC2REF_R3 0x08
2199 #define _DAC2REF_DAC2R3 0x08
2200 #define _DAC2REF_REF3 0x08
2201 #define _DAC2REF_DAC2REF3 0x08
2202 #define _DAC2REF_DACR4 0x10
2203 #define _DAC2REF_R4 0x10
2204 #define _DAC2REF_DAC2R4 0x10
2205 #define _DAC2REF_REF4 0x10
2206 #define _DAC2REF_DAC2REF4 0x10
2207 #define _DAC2REF_REF5 0x20
2208 #define _DAC2REF_DAC2REF5 0x20
2210 //==============================================================================
2213 //==============================================================================
2216 extern __at(0x011C) __sfr ZCD1CON
;
2220 unsigned ZCD1INTN
: 1;
2221 unsigned ZCD1INTP
: 1;
2224 unsigned ZCD1POL
: 1;
2225 unsigned ZCD1OUT
: 1;
2227 unsigned ZCD1EN
: 1;
2230 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
2232 #define _ZCD1INTN 0x01
2233 #define _ZCD1INTP 0x02
2234 #define _ZCD1POL 0x10
2235 #define _ZCD1OUT 0x20
2236 #define _ZCD1EN 0x80
2238 //==============================================================================
2241 //==============================================================================
2244 extern __at(0x018C) __sfr ANSELA
;
2267 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
2276 //==============================================================================
2279 //==============================================================================
2282 extern __at(0x018D) __sfr ANSELB
;
2305 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits
;
2314 //==============================================================================
2317 //==============================================================================
2320 extern __at(0x018E) __sfr ANSELC
;
2334 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits
;
2343 //==============================================================================
2345 extern __at(0x0191) __sfr PMADR
;
2346 extern __at(0x0191) __sfr PMADRL
;
2347 extern __at(0x0192) __sfr PMADRH
;
2348 extern __at(0x0193) __sfr PMDAT
;
2349 extern __at(0x0193) __sfr PMDATL
;
2350 extern __at(0x0194) __sfr PMDATH
;
2352 //==============================================================================
2355 extern __at(0x0195) __sfr PMCON1
;
2369 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
2379 //==============================================================================
2381 extern __at(0x0196) __sfr PMCON2
;
2383 //==============================================================================
2386 extern __at(0x0197) __sfr VREGCON
;
2390 unsigned Reserved
: 1;
2391 unsigned VREGPM
: 1;
2400 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits
;
2402 #define _Reserved 0x01
2403 #define _VREGPM 0x02
2405 //==============================================================================
2407 extern __at(0x0199) __sfr RC1REG
;
2408 extern __at(0x0199) __sfr RCREG
;
2409 extern __at(0x0199) __sfr RCREG1
;
2410 extern __at(0x019A) __sfr TX1REG
;
2411 extern __at(0x019A) __sfr TXREG
;
2412 extern __at(0x019A) __sfr TXREG1
;
2413 extern __at(0x019B) __sfr SP1BRG
;
2414 extern __at(0x019B) __sfr SP1BRGL
;
2415 extern __at(0x019B) __sfr SPBRG
;
2416 extern __at(0x019B) __sfr SPBRG1
;
2417 extern __at(0x019B) __sfr SPBRGL
;
2418 extern __at(0x019C) __sfr SP1BRGH
;
2419 extern __at(0x019C) __sfr SPBRGH
;
2420 extern __at(0x019C) __sfr SPBRGH1
;
2422 //==============================================================================
2425 extern __at(0x019D) __sfr RC1STA
;
2439 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
2450 //==============================================================================
2453 //==============================================================================
2456 extern __at(0x019D) __sfr RCSTA
;
2470 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
2472 #define _RCSTA_RX9D 0x01
2473 #define _RCSTA_OERR 0x02
2474 #define _RCSTA_FERR 0x04
2475 #define _RCSTA_ADDEN 0x08
2476 #define _RCSTA_CREN 0x10
2477 #define _RCSTA_SREN 0x20
2478 #define _RCSTA_RX9 0x40
2479 #define _RCSTA_SPEN 0x80
2481 //==============================================================================
2484 //==============================================================================
2487 extern __at(0x019D) __sfr RCSTA1
;
2501 extern __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits
;
2503 #define _RCSTA1_RX9D 0x01
2504 #define _RCSTA1_OERR 0x02
2505 #define _RCSTA1_FERR 0x04
2506 #define _RCSTA1_ADDEN 0x08
2507 #define _RCSTA1_CREN 0x10
2508 #define _RCSTA1_SREN 0x20
2509 #define _RCSTA1_RX9 0x40
2510 #define _RCSTA1_SPEN 0x80
2512 //==============================================================================
2515 //==============================================================================
2518 extern __at(0x019E) __sfr TX1STA
;
2532 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
2543 //==============================================================================
2546 //==============================================================================
2549 extern __at(0x019E) __sfr TXSTA
;
2563 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
2565 #define _TXSTA_TX9D 0x01
2566 #define _TXSTA_TRMT 0x02
2567 #define _TXSTA_BRGH 0x04
2568 #define _TXSTA_SENDB 0x08
2569 #define _TXSTA_SYNC 0x10
2570 #define _TXSTA_TXEN 0x20
2571 #define _TXSTA_TX9 0x40
2572 #define _TXSTA_CSRC 0x80
2574 //==============================================================================
2577 //==============================================================================
2580 extern __at(0x019E) __sfr TXSTA1
;
2594 extern __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits
;
2596 #define _TXSTA1_TX9D 0x01
2597 #define _TXSTA1_TRMT 0x02
2598 #define _TXSTA1_BRGH 0x04
2599 #define _TXSTA1_SENDB 0x08
2600 #define _TXSTA1_SYNC 0x10
2601 #define _TXSTA1_TXEN 0x20
2602 #define _TXSTA1_TX9 0x40
2603 #define _TXSTA1_CSRC 0x80
2605 //==============================================================================
2608 //==============================================================================
2611 extern __at(0x019F) __sfr BAUD1CON
;
2622 unsigned ABDOVF
: 1;
2625 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2632 #define _ABDOVF 0x80
2634 //==============================================================================
2637 //==============================================================================
2640 extern __at(0x019F) __sfr BAUDCON
;
2651 unsigned ABDOVF
: 1;
2654 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits
;
2656 #define _BAUDCON_ABDEN 0x01
2657 #define _BAUDCON_WUE 0x02
2658 #define _BAUDCON_BRG16 0x08
2659 #define _BAUDCON_SCKP 0x10
2660 #define _BAUDCON_RCIDL 0x40
2661 #define _BAUDCON_ABDOVF 0x80
2663 //==============================================================================
2666 //==============================================================================
2669 extern __at(0x019F) __sfr BAUDCON1
;
2680 unsigned ABDOVF
: 1;
2683 extern __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits
;
2685 #define _BAUDCON1_ABDEN 0x01
2686 #define _BAUDCON1_WUE 0x02
2687 #define _BAUDCON1_BRG16 0x08
2688 #define _BAUDCON1_SCKP 0x10
2689 #define _BAUDCON1_RCIDL 0x40
2690 #define _BAUDCON1_ABDOVF 0x80
2692 //==============================================================================
2695 //==============================================================================
2698 extern __at(0x019F) __sfr BAUDCTL
;
2709 unsigned ABDOVF
: 1;
2712 extern __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits
;
2714 #define _BAUDCTL_ABDEN 0x01
2715 #define _BAUDCTL_WUE 0x02
2716 #define _BAUDCTL_BRG16 0x08
2717 #define _BAUDCTL_SCKP 0x10
2718 #define _BAUDCTL_RCIDL 0x40
2719 #define _BAUDCTL_ABDOVF 0x80
2721 //==============================================================================
2724 //==============================================================================
2727 extern __at(0x019F) __sfr BAUDCTL1
;
2738 unsigned ABDOVF
: 1;
2741 extern __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
2743 #define _BAUDCTL1_ABDEN 0x01
2744 #define _BAUDCTL1_WUE 0x02
2745 #define _BAUDCTL1_BRG16 0x08
2746 #define _BAUDCTL1_SCKP 0x10
2747 #define _BAUDCTL1_RCIDL 0x40
2748 #define _BAUDCTL1_ABDOVF 0x80
2750 //==============================================================================
2753 //==============================================================================
2756 extern __at(0x020C) __sfr WPUA
;
2770 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
2781 //==============================================================================
2784 //==============================================================================
2787 extern __at(0x020D) __sfr WPUB
;
2801 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
2812 //==============================================================================
2815 //==============================================================================
2818 extern __at(0x020E) __sfr WPUC
;
2832 extern __at(0x020E) volatile __WPUCbits_t WPUCbits
;
2843 //==============================================================================
2846 //==============================================================================
2849 extern __at(0x0210) __sfr WPUE
;
2863 extern __at(0x0210) volatile __WPUEbits_t WPUEbits
;
2867 //==============================================================================
2870 //==============================================================================
2873 extern __at(0x0211) __sfr SSP1BUF
;
2879 unsigned SSP1BUF0
: 1;
2880 unsigned SSP1BUF1
: 1;
2881 unsigned SSP1BUF2
: 1;
2882 unsigned SSP1BUF3
: 1;
2883 unsigned SSP1BUF4
: 1;
2884 unsigned SSP1BUF5
: 1;
2885 unsigned SSP1BUF6
: 1;
2886 unsigned SSP1BUF7
: 1;
2902 extern __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits
;
2904 #define _SSP1BUF0 0x01
2906 #define _SSP1BUF1 0x02
2908 #define _SSP1BUF2 0x04
2910 #define _SSP1BUF3 0x08
2912 #define _SSP1BUF4 0x10
2914 #define _SSP1BUF5 0x20
2916 #define _SSP1BUF6 0x40
2918 #define _SSP1BUF7 0x80
2921 //==============================================================================
2924 //==============================================================================
2927 extern __at(0x0211) __sfr SSPBUF
;
2933 unsigned SSP1BUF0
: 1;
2934 unsigned SSP1BUF1
: 1;
2935 unsigned SSP1BUF2
: 1;
2936 unsigned SSP1BUF3
: 1;
2937 unsigned SSP1BUF4
: 1;
2938 unsigned SSP1BUF5
: 1;
2939 unsigned SSP1BUF6
: 1;
2940 unsigned SSP1BUF7
: 1;
2956 extern __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits
;
2958 #define _SSPBUF_SSP1BUF0 0x01
2959 #define _SSPBUF_BUF0 0x01
2960 #define _SSPBUF_SSP1BUF1 0x02
2961 #define _SSPBUF_BUF1 0x02
2962 #define _SSPBUF_SSP1BUF2 0x04
2963 #define _SSPBUF_BUF2 0x04
2964 #define _SSPBUF_SSP1BUF3 0x08
2965 #define _SSPBUF_BUF3 0x08
2966 #define _SSPBUF_SSP1BUF4 0x10
2967 #define _SSPBUF_BUF4 0x10
2968 #define _SSPBUF_SSP1BUF5 0x20
2969 #define _SSPBUF_BUF5 0x20
2970 #define _SSPBUF_SSP1BUF6 0x40
2971 #define _SSPBUF_BUF6 0x40
2972 #define _SSPBUF_SSP1BUF7 0x80
2973 #define _SSPBUF_BUF7 0x80
2975 //==============================================================================
2978 //==============================================================================
2981 extern __at(0x0212) __sfr SSP1ADD
;
2987 unsigned SSP1ADD0
: 1;
2988 unsigned SSP1ADD1
: 1;
2989 unsigned SSP1ADD2
: 1;
2990 unsigned SSP1ADD3
: 1;
2991 unsigned SSP1ADD4
: 1;
2992 unsigned SSP1ADD5
: 1;
2993 unsigned SSP1ADD6
: 1;
2994 unsigned SSP1ADD7
: 1;
3010 extern __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits
;
3012 #define _SSP1ADD0 0x01
3014 #define _SSP1ADD1 0x02
3016 #define _SSP1ADD2 0x04
3018 #define _SSP1ADD3 0x08
3020 #define _SSP1ADD4 0x10
3022 #define _SSP1ADD5 0x20
3024 #define _SSP1ADD6 0x40
3026 #define _SSP1ADD7 0x80
3029 //==============================================================================
3032 //==============================================================================
3035 extern __at(0x0212) __sfr SSPADD
;
3041 unsigned SSP1ADD0
: 1;
3042 unsigned SSP1ADD1
: 1;
3043 unsigned SSP1ADD2
: 1;
3044 unsigned SSP1ADD3
: 1;
3045 unsigned SSP1ADD4
: 1;
3046 unsigned SSP1ADD5
: 1;
3047 unsigned SSP1ADD6
: 1;
3048 unsigned SSP1ADD7
: 1;
3064 extern __at(0x0212) volatile __SSPADDbits_t SSPADDbits
;
3066 #define _SSPADD_SSP1ADD0 0x01
3067 #define _SSPADD_ADD0 0x01
3068 #define _SSPADD_SSP1ADD1 0x02
3069 #define _SSPADD_ADD1 0x02
3070 #define _SSPADD_SSP1ADD2 0x04
3071 #define _SSPADD_ADD2 0x04
3072 #define _SSPADD_SSP1ADD3 0x08
3073 #define _SSPADD_ADD3 0x08
3074 #define _SSPADD_SSP1ADD4 0x10
3075 #define _SSPADD_ADD4 0x10
3076 #define _SSPADD_SSP1ADD5 0x20
3077 #define _SSPADD_ADD5 0x20
3078 #define _SSPADD_SSP1ADD6 0x40
3079 #define _SSPADD_ADD6 0x40
3080 #define _SSPADD_SSP1ADD7 0x80
3081 #define _SSPADD_ADD7 0x80
3083 //==============================================================================
3086 //==============================================================================
3089 extern __at(0x0213) __sfr SSP1MSK
;
3095 unsigned SSP1MSK0
: 1;
3096 unsigned SSP1MSK1
: 1;
3097 unsigned SSP1MSK2
: 1;
3098 unsigned SSP1MSK3
: 1;
3099 unsigned SSP1MSK4
: 1;
3100 unsigned SSP1MSK5
: 1;
3101 unsigned SSP1MSK6
: 1;
3102 unsigned SSP1MSK7
: 1;
3118 extern __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits
;
3120 #define _SSP1MSK0 0x01
3122 #define _SSP1MSK1 0x02
3124 #define _SSP1MSK2 0x04
3126 #define _SSP1MSK3 0x08
3128 #define _SSP1MSK4 0x10
3130 #define _SSP1MSK5 0x20
3132 #define _SSP1MSK6 0x40
3134 #define _SSP1MSK7 0x80
3137 //==============================================================================
3140 //==============================================================================
3143 extern __at(0x0213) __sfr SSPMSK
;
3149 unsigned SSP1MSK0
: 1;
3150 unsigned SSP1MSK1
: 1;
3151 unsigned SSP1MSK2
: 1;
3152 unsigned SSP1MSK3
: 1;
3153 unsigned SSP1MSK4
: 1;
3154 unsigned SSP1MSK5
: 1;
3155 unsigned SSP1MSK6
: 1;
3156 unsigned SSP1MSK7
: 1;
3172 extern __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits
;
3174 #define _SSPMSK_SSP1MSK0 0x01
3175 #define _SSPMSK_MSK0 0x01
3176 #define _SSPMSK_SSP1MSK1 0x02
3177 #define _SSPMSK_MSK1 0x02
3178 #define _SSPMSK_SSP1MSK2 0x04
3179 #define _SSPMSK_MSK2 0x04
3180 #define _SSPMSK_SSP1MSK3 0x08
3181 #define _SSPMSK_MSK3 0x08
3182 #define _SSPMSK_SSP1MSK4 0x10
3183 #define _SSPMSK_MSK4 0x10
3184 #define _SSPMSK_SSP1MSK5 0x20
3185 #define _SSPMSK_MSK5 0x20
3186 #define _SSPMSK_SSP1MSK6 0x40
3187 #define _SSPMSK_MSK6 0x40
3188 #define _SSPMSK_SSP1MSK7 0x80
3189 #define _SSPMSK_MSK7 0x80
3191 //==============================================================================
3194 //==============================================================================
3197 extern __at(0x0214) __sfr SSP1STAT
;
3203 unsigned R_NOT_W
: 1;
3206 unsigned D_NOT_A
: 1;
3211 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
3215 #define _R_NOT_W 0x04
3218 #define _D_NOT_A 0x20
3222 //==============================================================================
3225 //==============================================================================
3228 extern __at(0x0214) __sfr SSPSTAT
;
3234 unsigned R_NOT_W
: 1;
3237 unsigned D_NOT_A
: 1;
3242 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
3244 #define _SSPSTAT_BF 0x01
3245 #define _SSPSTAT_UA 0x02
3246 #define _SSPSTAT_R_NOT_W 0x04
3247 #define _SSPSTAT_S 0x08
3248 #define _SSPSTAT_P 0x10
3249 #define _SSPSTAT_D_NOT_A 0x20
3250 #define _SSPSTAT_CKE 0x40
3251 #define _SSPSTAT_SMP 0x80
3253 //==============================================================================
3256 //==============================================================================
3259 extern __at(0x0215) __sfr SSP1CON
;
3282 extern __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits
;
3293 //==============================================================================
3296 //==============================================================================
3299 extern __at(0x0215) __sfr SSP1CON1
;
3322 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
3324 #define _SSP1CON1_SSPM0 0x01
3325 #define _SSP1CON1_SSPM1 0x02
3326 #define _SSP1CON1_SSPM2 0x04
3327 #define _SSP1CON1_SSPM3 0x08
3328 #define _SSP1CON1_CKP 0x10
3329 #define _SSP1CON1_SSPEN 0x20
3330 #define _SSP1CON1_SSPOV 0x40
3331 #define _SSP1CON1_WCOL 0x80
3333 //==============================================================================
3336 //==============================================================================
3339 extern __at(0x0215) __sfr SSPCON
;
3362 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
3364 #define _SSPCON_SSPM0 0x01
3365 #define _SSPCON_SSPM1 0x02
3366 #define _SSPCON_SSPM2 0x04
3367 #define _SSPCON_SSPM3 0x08
3368 #define _SSPCON_CKP 0x10
3369 #define _SSPCON_SSPEN 0x20
3370 #define _SSPCON_SSPOV 0x40
3371 #define _SSPCON_WCOL 0x80
3373 //==============================================================================
3376 //==============================================================================
3379 extern __at(0x0215) __sfr SSPCON1
;
3402 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
3404 #define _SSPCON1_SSPM0 0x01
3405 #define _SSPCON1_SSPM1 0x02
3406 #define _SSPCON1_SSPM2 0x04
3407 #define _SSPCON1_SSPM3 0x08
3408 #define _SSPCON1_CKP 0x10
3409 #define _SSPCON1_SSPEN 0x20
3410 #define _SSPCON1_SSPOV 0x40
3411 #define _SSPCON1_WCOL 0x80
3413 //==============================================================================
3416 //==============================================================================
3419 extern __at(0x0216) __sfr SSP1CON2
;
3429 unsigned ACKSTAT
: 1;
3433 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
3441 #define _ACKSTAT 0x40
3444 //==============================================================================
3447 //==============================================================================
3450 extern __at(0x0216) __sfr SSPCON2
;
3460 unsigned ACKSTAT
: 1;
3464 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
3466 #define _SSPCON2_SEN 0x01
3467 #define _SSPCON2_RSEN 0x02
3468 #define _SSPCON2_PEN 0x04
3469 #define _SSPCON2_RCEN 0x08
3470 #define _SSPCON2_ACKEN 0x10
3471 #define _SSPCON2_ACKDT 0x20
3472 #define _SSPCON2_ACKSTAT 0x40
3473 #define _SSPCON2_GCEN 0x80
3475 //==============================================================================
3478 //==============================================================================
3481 extern __at(0x0217) __sfr SSP1CON3
;
3492 unsigned ACKTIM
: 1;
3495 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
3504 #define _ACKTIM 0x80
3506 //==============================================================================
3509 //==============================================================================
3512 extern __at(0x0217) __sfr SSPCON3
;
3523 unsigned ACKTIM
: 1;
3526 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
3528 #define _SSPCON3_DHEN 0x01
3529 #define _SSPCON3_AHEN 0x02
3530 #define _SSPCON3_SBCDE 0x04
3531 #define _SSPCON3_SDAHT 0x08
3532 #define _SSPCON3_BOEN 0x10
3533 #define _SSPCON3_SCIE 0x20
3534 #define _SSPCON3_PCIE 0x40
3535 #define _SSPCON3_ACKTIM 0x80
3537 //==============================================================================
3540 //==============================================================================
3543 extern __at(0x028C) __sfr ODCONA
;
3557 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
3568 //==============================================================================
3571 //==============================================================================
3574 extern __at(0x028D) __sfr ODCONB
;
3588 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits
;
3599 //==============================================================================
3602 //==============================================================================
3605 extern __at(0x028E) __sfr ODCONC
;
3619 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits
;
3630 //==============================================================================
3632 extern __at(0x0291) __sfr CCPR1
;
3633 extern __at(0x0291) __sfr CCPR1L
;
3634 extern __at(0x0292) __sfr CCPR1H
;
3636 //==============================================================================
3639 extern __at(0x0293) __sfr CCP1CON
;
3645 unsigned CCP1M0
: 1;
3646 unsigned CCP1M1
: 1;
3647 unsigned CCP1M2
: 1;
3648 unsigned CCP1M3
: 1;
3681 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
3683 #define _CCP1M0 0x01
3684 #define _CCP1M1 0x02
3685 #define _CCP1M2 0x04
3686 #define _CCP1M3 0x08
3692 //==============================================================================
3695 //==============================================================================
3698 extern __at(0x0293) __sfr ECCP1CON
;
3704 unsigned CCP1M0
: 1;
3705 unsigned CCP1M1
: 1;
3706 unsigned CCP1M2
: 1;
3707 unsigned CCP1M3
: 1;
3740 extern __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits
;
3742 #define _ECCP1CON_CCP1M0 0x01
3743 #define _ECCP1CON_CCP1M1 0x02
3744 #define _ECCP1CON_CCP1M2 0x04
3745 #define _ECCP1CON_CCP1M3 0x08
3746 #define _ECCP1CON_DC1B0 0x10
3747 #define _ECCP1CON_CCP1Y 0x10
3748 #define _ECCP1CON_DC1B1 0x20
3749 #define _ECCP1CON_CCP1X 0x20
3751 //==============================================================================
3753 extern __at(0x0298) __sfr CCPR2
;
3754 extern __at(0x0298) __sfr CCPR2L
;
3755 extern __at(0x0299) __sfr CCPR2H
;
3757 //==============================================================================
3760 extern __at(0x029A) __sfr CCP2CON
;
3766 unsigned CCP2M0
: 1;
3767 unsigned CCP2M1
: 1;
3768 unsigned CCP2M2
: 1;
3769 unsigned CCP2M3
: 1;
3802 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
3804 #define _CCP2M0 0x01
3805 #define _CCP2M1 0x02
3806 #define _CCP2M2 0x04
3807 #define _CCP2M3 0x08
3813 //==============================================================================
3816 //==============================================================================
3819 extern __at(0x029A) __sfr ECCP2CON
;
3825 unsigned CCP2M0
: 1;
3826 unsigned CCP2M1
: 1;
3827 unsigned CCP2M2
: 1;
3828 unsigned CCP2M3
: 1;
3861 extern __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits
;
3863 #define _ECCP2CON_CCP2M0 0x01
3864 #define _ECCP2CON_CCP2M1 0x02
3865 #define _ECCP2CON_CCP2M2 0x04
3866 #define _ECCP2CON_CCP2M3 0x08
3867 #define _ECCP2CON_DC2B0 0x10
3868 #define _ECCP2CON_CCP2Y 0x10
3869 #define _ECCP2CON_DC2B1 0x20
3870 #define _ECCP2CON_CCP2X 0x20
3872 //==============================================================================
3875 //==============================================================================
3878 extern __at(0x029E) __sfr CCPTMRS
;
3884 unsigned C1TSEL0
: 1;
3885 unsigned C1TSEL1
: 1;
3886 unsigned C2TSEL0
: 1;
3887 unsigned C2TSEL1
: 1;
3888 unsigned P3TSEL0
: 1;
3889 unsigned P3TSEL1
: 1;
3890 unsigned P4TSEL0
: 1;
3891 unsigned P4TSEL1
: 1;
3896 unsigned C1TSEL
: 2;
3903 unsigned C2TSEL
: 2;
3910 unsigned P3TSEL
: 2;
3917 unsigned P4TSEL
: 2;
3921 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
3923 #define _C1TSEL0 0x01
3924 #define _C1TSEL1 0x02
3925 #define _C2TSEL0 0x04
3926 #define _C2TSEL1 0x08
3927 #define _P3TSEL0 0x10
3928 #define _P3TSEL1 0x20
3929 #define _P4TSEL0 0x40
3930 #define _P4TSEL1 0x80
3932 //==============================================================================
3935 //==============================================================================
3938 extern __at(0x030C) __sfr SLRCONA
;
3952 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
3963 //==============================================================================
3966 //==============================================================================
3969 extern __at(0x030D) __sfr SLRCONB
;
3983 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits
;
3994 //==============================================================================
3997 //==============================================================================
4000 extern __at(0x030E) __sfr SLRCONC
;
4014 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits
;
4025 //==============================================================================
4028 //==============================================================================
4031 extern __at(0x038C) __sfr INLVLA
;
4035 unsigned INLVLA0
: 1;
4036 unsigned INLVLA1
: 1;
4037 unsigned INLVLA2
: 1;
4038 unsigned INLVLA3
: 1;
4039 unsigned INLVLA4
: 1;
4040 unsigned INLVLA5
: 1;
4041 unsigned INLVLA6
: 1;
4042 unsigned INLVLA7
: 1;
4045 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
4047 #define _INLVLA0 0x01
4048 #define _INLVLA1 0x02
4049 #define _INLVLA2 0x04
4050 #define _INLVLA3 0x08
4051 #define _INLVLA4 0x10
4052 #define _INLVLA5 0x20
4053 #define _INLVLA6 0x40
4054 #define _INLVLA7 0x80
4056 //==============================================================================
4059 //==============================================================================
4062 extern __at(0x038D) __sfr INLVLB
;
4066 unsigned INLVLB0
: 1;
4067 unsigned INLVLB1
: 1;
4068 unsigned INLVLB2
: 1;
4069 unsigned INLVLB3
: 1;
4070 unsigned INLVLB4
: 1;
4071 unsigned INLVLB5
: 1;
4072 unsigned INLVLB6
: 1;
4073 unsigned INLVLB7
: 1;
4076 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits
;
4078 #define _INLVLB0 0x01
4079 #define _INLVLB1 0x02
4080 #define _INLVLB2 0x04
4081 #define _INLVLB3 0x08
4082 #define _INLVLB4 0x10
4083 #define _INLVLB5 0x20
4084 #define _INLVLB6 0x40
4085 #define _INLVLB7 0x80
4087 //==============================================================================
4090 //==============================================================================
4093 extern __at(0x038E) __sfr INLVLC
;
4097 unsigned INLVLC0
: 1;
4098 unsigned INLVLC1
: 1;
4099 unsigned INLVLC2
: 1;
4100 unsigned INLVLC3
: 1;
4101 unsigned INLVLC4
: 1;
4102 unsigned INLVLC5
: 1;
4103 unsigned INLVLC6
: 1;
4104 unsigned INLVLC7
: 1;
4107 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits
;
4109 #define _INLVLC0 0x01
4110 #define _INLVLC1 0x02
4111 #define _INLVLC2 0x04
4112 #define _INLVLC3 0x08
4113 #define _INLVLC4 0x10
4114 #define _INLVLC5 0x20
4115 #define _INLVLC6 0x40
4116 #define _INLVLC7 0x80
4118 //==============================================================================
4121 //==============================================================================
4124 extern __at(0x0390) __sfr INLVLE
;
4131 unsigned INLVLE3
: 1;
4138 extern __at(0x0390) volatile __INLVLEbits_t INLVLEbits
;
4140 #define _INLVLE3 0x08
4142 //==============================================================================
4145 //==============================================================================
4148 extern __at(0x0391) __sfr IOCAP
;
4152 unsigned IOCAP0
: 1;
4153 unsigned IOCAP1
: 1;
4154 unsigned IOCAP2
: 1;
4155 unsigned IOCAP3
: 1;
4156 unsigned IOCAP4
: 1;
4157 unsigned IOCAP5
: 1;
4158 unsigned IOCAP6
: 1;
4159 unsigned IOCAP7
: 1;
4162 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits
;
4164 #define _IOCAP0 0x01
4165 #define _IOCAP1 0x02
4166 #define _IOCAP2 0x04
4167 #define _IOCAP3 0x08
4168 #define _IOCAP4 0x10
4169 #define _IOCAP5 0x20
4170 #define _IOCAP6 0x40
4171 #define _IOCAP7 0x80
4173 //==============================================================================
4176 //==============================================================================
4179 extern __at(0x0392) __sfr IOCAN
;
4183 unsigned IOCAN0
: 1;
4184 unsigned IOCAN1
: 1;
4185 unsigned IOCAN2
: 1;
4186 unsigned IOCAN3
: 1;
4187 unsigned IOCAN4
: 1;
4188 unsigned IOCAN5
: 1;
4189 unsigned IOCAN6
: 1;
4190 unsigned IOCAN7
: 1;
4193 extern __at(0x0392) volatile __IOCANbits_t IOCANbits
;
4195 #define _IOCAN0 0x01
4196 #define _IOCAN1 0x02
4197 #define _IOCAN2 0x04
4198 #define _IOCAN3 0x08
4199 #define _IOCAN4 0x10
4200 #define _IOCAN5 0x20
4201 #define _IOCAN6 0x40
4202 #define _IOCAN7 0x80
4204 //==============================================================================
4207 //==============================================================================
4210 extern __at(0x0393) __sfr IOCAF
;
4214 unsigned IOCAF0
: 1;
4215 unsigned IOCAF1
: 1;
4216 unsigned IOCAF2
: 1;
4217 unsigned IOCAF3
: 1;
4218 unsigned IOCAF4
: 1;
4219 unsigned IOCAF5
: 1;
4220 unsigned IOCAF6
: 1;
4221 unsigned IOCAF7
: 1;
4224 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits
;
4226 #define _IOCAF0 0x01
4227 #define _IOCAF1 0x02
4228 #define _IOCAF2 0x04
4229 #define _IOCAF3 0x08
4230 #define _IOCAF4 0x10
4231 #define _IOCAF5 0x20
4232 #define _IOCAF6 0x40
4233 #define _IOCAF7 0x80
4235 //==============================================================================
4238 //==============================================================================
4241 extern __at(0x0394) __sfr IOCBP
;
4245 unsigned IOCBP0
: 1;
4246 unsigned IOCBP1
: 1;
4247 unsigned IOCBP2
: 1;
4248 unsigned IOCBP3
: 1;
4249 unsigned IOCBP4
: 1;
4250 unsigned IOCBP5
: 1;
4251 unsigned IOCBP6
: 1;
4252 unsigned IOCBP7
: 1;
4255 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
4257 #define _IOCBP0 0x01
4258 #define _IOCBP1 0x02
4259 #define _IOCBP2 0x04
4260 #define _IOCBP3 0x08
4261 #define _IOCBP4 0x10
4262 #define _IOCBP5 0x20
4263 #define _IOCBP6 0x40
4264 #define _IOCBP7 0x80
4266 //==============================================================================
4269 //==============================================================================
4272 extern __at(0x0395) __sfr IOCBN
;
4276 unsigned IOCBN0
: 1;
4277 unsigned IOCBN1
: 1;
4278 unsigned IOCBN2
: 1;
4279 unsigned IOCBN3
: 1;
4280 unsigned IOCBN4
: 1;
4281 unsigned IOCBN5
: 1;
4282 unsigned IOCBN6
: 1;
4283 unsigned IOCBN7
: 1;
4286 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
4288 #define _IOCBN0 0x01
4289 #define _IOCBN1 0x02
4290 #define _IOCBN2 0x04
4291 #define _IOCBN3 0x08
4292 #define _IOCBN4 0x10
4293 #define _IOCBN5 0x20
4294 #define _IOCBN6 0x40
4295 #define _IOCBN7 0x80
4297 //==============================================================================
4300 //==============================================================================
4303 extern __at(0x0396) __sfr IOCBF
;
4307 unsigned IOCBF0
: 1;
4308 unsigned IOCBF1
: 1;
4309 unsigned IOCBF2
: 1;
4310 unsigned IOCBF3
: 1;
4311 unsigned IOCBF4
: 1;
4312 unsigned IOCBF5
: 1;
4313 unsigned IOCBF6
: 1;
4314 unsigned IOCBF7
: 1;
4317 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
4319 #define _IOCBF0 0x01
4320 #define _IOCBF1 0x02
4321 #define _IOCBF2 0x04
4322 #define _IOCBF3 0x08
4323 #define _IOCBF4 0x10
4324 #define _IOCBF5 0x20
4325 #define _IOCBF6 0x40
4326 #define _IOCBF7 0x80
4328 //==============================================================================
4331 //==============================================================================
4334 extern __at(0x0397) __sfr IOCCP
;
4338 unsigned IOCCP0
: 1;
4339 unsigned IOCCP1
: 1;
4340 unsigned IOCCP2
: 1;
4341 unsigned IOCCP3
: 1;
4342 unsigned IOCCP4
: 1;
4343 unsigned IOCCP5
: 1;
4344 unsigned IOCCP6
: 1;
4345 unsigned IOCCP7
: 1;
4348 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits
;
4350 #define _IOCCP0 0x01
4351 #define _IOCCP1 0x02
4352 #define _IOCCP2 0x04
4353 #define _IOCCP3 0x08
4354 #define _IOCCP4 0x10
4355 #define _IOCCP5 0x20
4356 #define _IOCCP6 0x40
4357 #define _IOCCP7 0x80
4359 //==============================================================================
4362 //==============================================================================
4365 extern __at(0x0398) __sfr IOCCN
;
4369 unsigned IOCCN0
: 1;
4370 unsigned IOCCN1
: 1;
4371 unsigned IOCCN2
: 1;
4372 unsigned IOCCN3
: 1;
4373 unsigned IOCCN4
: 1;
4374 unsigned IOCCN5
: 1;
4375 unsigned IOCCN6
: 1;
4376 unsigned IOCCN7
: 1;
4379 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits
;
4381 #define _IOCCN0 0x01
4382 #define _IOCCN1 0x02
4383 #define _IOCCN2 0x04
4384 #define _IOCCN3 0x08
4385 #define _IOCCN4 0x10
4386 #define _IOCCN5 0x20
4387 #define _IOCCN6 0x40
4388 #define _IOCCN7 0x80
4390 //==============================================================================
4393 //==============================================================================
4396 extern __at(0x0399) __sfr IOCCF
;
4400 unsigned IOCCF0
: 1;
4401 unsigned IOCCF1
: 1;
4402 unsigned IOCCF2
: 1;
4403 unsigned IOCCF3
: 1;
4404 unsigned IOCCF4
: 1;
4405 unsigned IOCCF5
: 1;
4406 unsigned IOCCF6
: 1;
4407 unsigned IOCCF7
: 1;
4410 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits
;
4412 #define _IOCCF0 0x01
4413 #define _IOCCF1 0x02
4414 #define _IOCCF2 0x04
4415 #define _IOCCF3 0x08
4416 #define _IOCCF4 0x10
4417 #define _IOCCF5 0x20
4418 #define _IOCCF6 0x40
4419 #define _IOCCF7 0x80
4421 //==============================================================================
4424 //==============================================================================
4427 extern __at(0x039D) __sfr IOCEP
;
4434 unsigned IOCEP3
: 1;
4441 extern __at(0x039D) volatile __IOCEPbits_t IOCEPbits
;
4443 #define _IOCEP3 0x08
4445 //==============================================================================
4448 //==============================================================================
4451 extern __at(0x039E) __sfr IOCEN
;
4458 unsigned IOCEN3
: 1;
4465 extern __at(0x039E) volatile __IOCENbits_t IOCENbits
;
4467 #define _IOCEN3 0x08
4469 //==============================================================================
4472 //==============================================================================
4475 extern __at(0x039F) __sfr IOCEF
;
4482 unsigned IOCEF3
: 1;
4489 extern __at(0x039F) volatile __IOCEFbits_t IOCEFbits
;
4491 #define _IOCEF3 0x08
4493 //==============================================================================
4495 extern __at(0x0415) __sfr TMR4
;
4496 extern __at(0x0416) __sfr PR4
;
4498 //==============================================================================
4501 extern __at(0x0417) __sfr T4CON
;
4507 unsigned T4CKPS0
: 1;
4508 unsigned T4CKPS1
: 1;
4509 unsigned TMR4ON
: 1;
4510 unsigned T4OUTPS0
: 1;
4511 unsigned T4OUTPS1
: 1;
4512 unsigned T4OUTPS2
: 1;
4513 unsigned T4OUTPS3
: 1;
4519 unsigned T4CKPS
: 2;
4526 unsigned T4OUTPS
: 4;
4531 extern __at(0x0417) volatile __T4CONbits_t T4CONbits
;
4533 #define _T4CKPS0 0x01
4534 #define _T4CKPS1 0x02
4535 #define _TMR4ON 0x04
4536 #define _T4OUTPS0 0x08
4537 #define _T4OUTPS1 0x10
4538 #define _T4OUTPS2 0x20
4539 #define _T4OUTPS3 0x40
4541 //==============================================================================
4543 extern __at(0x041C) __sfr TMR6
;
4544 extern __at(0x041D) __sfr PR6
;
4546 //==============================================================================
4549 extern __at(0x041E) __sfr T6CON
;
4555 unsigned T6CKPS0
: 1;
4556 unsigned T6CKPS1
: 1;
4557 unsigned TMR6ON
: 1;
4558 unsigned T6OUTPS0
: 1;
4559 unsigned T6OUTPS1
: 1;
4560 unsigned T6OUTPS2
: 1;
4561 unsigned T6OUTPS3
: 1;
4567 unsigned T6CKPS
: 2;
4574 unsigned T6OUTPS
: 4;
4579 extern __at(0x041E) volatile __T6CONbits_t T6CONbits
;
4581 #define _T6CKPS0 0x01
4582 #define _T6CKPS1 0x02
4583 #define _TMR6ON 0x04
4584 #define _T6OUTPS0 0x08
4585 #define _T6OUTPS1 0x10
4586 #define _T6OUTPS2 0x20
4587 #define _T6OUTPS3 0x40
4589 //==============================================================================
4591 extern __at(0x0498) __sfr NCO1ACC
;
4593 //==============================================================================
4596 extern __at(0x0498) __sfr NCO1ACCL
;
4600 unsigned NCO1ACC0
: 1;
4601 unsigned NCO1ACC1
: 1;
4602 unsigned NCO1ACC2
: 1;
4603 unsigned NCO1ACC3
: 1;
4604 unsigned NCO1ACC4
: 1;
4605 unsigned NCO1ACC5
: 1;
4606 unsigned NCO1ACC6
: 1;
4607 unsigned NCO1ACC7
: 1;
4610 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits
;
4612 #define _NCO1ACC0 0x01
4613 #define _NCO1ACC1 0x02
4614 #define _NCO1ACC2 0x04
4615 #define _NCO1ACC3 0x08
4616 #define _NCO1ACC4 0x10
4617 #define _NCO1ACC5 0x20
4618 #define _NCO1ACC6 0x40
4619 #define _NCO1ACC7 0x80
4621 //==============================================================================
4624 //==============================================================================
4627 extern __at(0x0499) __sfr NCO1ACCH
;
4631 unsigned NCO1ACC8
: 1;
4632 unsigned NCO1ACC9
: 1;
4633 unsigned NCO1ACC10
: 1;
4634 unsigned NCO1ACC11
: 1;
4635 unsigned NCO1ACC12
: 1;
4636 unsigned NCO1ACC13
: 1;
4637 unsigned NCO1ACC14
: 1;
4638 unsigned NCO1ACC15
: 1;
4641 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits
;
4643 #define _NCO1ACC8 0x01
4644 #define _NCO1ACC9 0x02
4645 #define _NCO1ACC10 0x04
4646 #define _NCO1ACC11 0x08
4647 #define _NCO1ACC12 0x10
4648 #define _NCO1ACC13 0x20
4649 #define _NCO1ACC14 0x40
4650 #define _NCO1ACC15 0x80
4652 //==============================================================================
4655 //==============================================================================
4658 extern __at(0x049A) __sfr NCO1ACCU
;
4662 unsigned NCO1ACC16
: 1;
4663 unsigned NCO1ACC17
: 1;
4664 unsigned NCO1ACC18
: 1;
4665 unsigned NCO1ACC19
: 1;
4672 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits
;
4674 #define _NCO1ACC16 0x01
4675 #define _NCO1ACC17 0x02
4676 #define _NCO1ACC18 0x04
4677 #define _NCO1ACC19 0x08
4679 //==============================================================================
4681 extern __at(0x049B) __sfr NCO1INC
;
4683 //==============================================================================
4686 extern __at(0x049B) __sfr NCO1INCL
;
4690 unsigned NCO1INC0
: 1;
4691 unsigned NCO1INC1
: 1;
4692 unsigned NCO1INC2
: 1;
4693 unsigned NCO1INC3
: 1;
4694 unsigned NCO1INC4
: 1;
4695 unsigned NCO1INC5
: 1;
4696 unsigned NCO1INC6
: 1;
4697 unsigned NCO1INC7
: 1;
4700 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits
;
4702 #define _NCO1INC0 0x01
4703 #define _NCO1INC1 0x02
4704 #define _NCO1INC2 0x04
4705 #define _NCO1INC3 0x08
4706 #define _NCO1INC4 0x10
4707 #define _NCO1INC5 0x20
4708 #define _NCO1INC6 0x40
4709 #define _NCO1INC7 0x80
4711 //==============================================================================
4714 //==============================================================================
4717 extern __at(0x049C) __sfr NCO1INCH
;
4721 unsigned NCO1INC8
: 1;
4722 unsigned NCO1INC9
: 1;
4723 unsigned NCO1INC10
: 1;
4724 unsigned NCO1INC11
: 1;
4725 unsigned NCO1INC12
: 1;
4726 unsigned NCO1INC13
: 1;
4727 unsigned NCO1INC14
: 1;
4728 unsigned NCO1INC15
: 1;
4731 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits
;
4733 #define _NCO1INC8 0x01
4734 #define _NCO1INC9 0x02
4735 #define _NCO1INC10 0x04
4736 #define _NCO1INC11 0x08
4737 #define _NCO1INC12 0x10
4738 #define _NCO1INC13 0x20
4739 #define _NCO1INC14 0x40
4740 #define _NCO1INC15 0x80
4742 //==============================================================================
4745 //==============================================================================
4748 extern __at(0x049D) __sfr NCO1INCU
;
4752 unsigned NCO1INC16
: 1;
4753 unsigned NCO1INC17
: 1;
4754 unsigned NCO1INC18
: 1;
4755 unsigned NCO1INC19
: 1;
4762 extern __at(0x049D) volatile __NCO1INCUbits_t NCO1INCUbits
;
4764 #define _NCO1INC16 0x01
4765 #define _NCO1INC17 0x02
4766 #define _NCO1INC18 0x04
4767 #define _NCO1INC19 0x08
4769 //==============================================================================
4772 //==============================================================================
4775 extern __at(0x049E) __sfr NCO1CON
;
4789 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits
;
4796 //==============================================================================
4799 //==============================================================================
4802 extern __at(0x049F) __sfr NCO1CLK
;
4808 unsigned N1CKS0
: 1;
4809 unsigned N1CKS1
: 1;
4813 unsigned N1PWS0
: 1;
4814 unsigned N1PWS1
: 1;
4815 unsigned N1PWS2
: 1;
4831 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits
;
4833 #define _N1CKS0 0x01
4834 #define _N1CKS1 0x02
4835 #define _N1PWS0 0x20
4836 #define _N1PWS1 0x40
4837 #define _N1PWS2 0x80
4839 //==============================================================================
4842 //==============================================================================
4845 extern __at(0x0511) __sfr OPA1CON
;
4851 unsigned OPA1PCH0
: 1;
4852 unsigned OPA1PCH1
: 1;
4855 unsigned OPA1UG
: 1;
4857 unsigned OPA1SP
: 1;
4858 unsigned OPA1EN
: 1;
4863 unsigned OPA1PCH
: 2;
4868 extern __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits
;
4870 #define _OPA1PCH0 0x01
4871 #define _OPA1PCH1 0x02
4872 #define _OPA1UG 0x10
4873 #define _OPA1SP 0x40
4874 #define _OPA1EN 0x80
4876 //==============================================================================
4879 //==============================================================================
4882 extern __at(0x0515) __sfr OPA2CON
;
4888 unsigned OPA2PCH0
: 1;
4889 unsigned OPA2PCH1
: 1;
4892 unsigned OPA2UG
: 1;
4894 unsigned OPA2SP
: 1;
4895 unsigned OPA2EN
: 1;
4900 unsigned OPA2PCH
: 2;
4905 extern __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits
;
4907 #define _OPA2PCH0 0x01
4908 #define _OPA2PCH1 0x02
4909 #define _OPA2UG 0x10
4910 #define _OPA2SP 0x40
4911 #define _OPA2EN 0x80
4913 //==============================================================================
4916 //==============================================================================
4919 extern __at(0x0617) __sfr PWM3DCL
;
4931 unsigned PWM3DCL0
: 1;
4932 unsigned PWM3DCL1
: 1;
4938 unsigned PWM3DCL
: 2;
4942 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits
;
4944 #define _PWM3DCL0 0x40
4945 #define _PWM3DCL1 0x80
4947 //==============================================================================
4950 //==============================================================================
4953 extern __at(0x0618) __sfr PWM3DCH
;
4957 unsigned PWM3DCH0
: 1;
4958 unsigned PWM3DCH1
: 1;
4959 unsigned PWM3DCH2
: 1;
4960 unsigned PWM3DCH3
: 1;
4961 unsigned PWM3DCH4
: 1;
4962 unsigned PWM3DCH5
: 1;
4963 unsigned PWM3DCH6
: 1;
4964 unsigned PWM3DCH7
: 1;
4967 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits
;
4969 #define _PWM3DCH0 0x01
4970 #define _PWM3DCH1 0x02
4971 #define _PWM3DCH2 0x04
4972 #define _PWM3DCH3 0x08
4973 #define _PWM3DCH4 0x10
4974 #define _PWM3DCH5 0x20
4975 #define _PWM3DCH6 0x40
4976 #define _PWM3DCH7 0x80
4978 //==============================================================================
4981 //==============================================================================
4984 extern __at(0x0619) __sfr PWM3CON
;
4992 unsigned PWM3POL
: 1;
4993 unsigned PWM3OUT
: 1;
4995 unsigned PWM3EN
: 1;
4998 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits
;
5000 #define _PWM3POL 0x10
5001 #define _PWM3OUT 0x20
5002 #define _PWM3EN 0x80
5004 //==============================================================================
5007 //==============================================================================
5010 extern __at(0x0619) __sfr PWM3CON0
;
5018 unsigned PWM3POL
: 1;
5019 unsigned PWM3OUT
: 1;
5021 unsigned PWM3EN
: 1;
5024 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits
;
5026 #define _PWM3CON0_PWM3POL 0x10
5027 #define _PWM3CON0_PWM3OUT 0x20
5028 #define _PWM3CON0_PWM3EN 0x80
5030 //==============================================================================
5033 //==============================================================================
5036 extern __at(0x061A) __sfr PWM4DCL
;
5048 unsigned PWM4DCL0
: 1;
5049 unsigned PWM4DCL1
: 1;
5055 unsigned PWM4DCL
: 2;
5059 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits
;
5061 #define _PWM4DCL0 0x40
5062 #define _PWM4DCL1 0x80
5064 //==============================================================================
5067 //==============================================================================
5070 extern __at(0x061B) __sfr PWM4DCH
;
5074 unsigned PWM4DCH0
: 1;
5075 unsigned PWM4DCH1
: 1;
5076 unsigned PWM4DCH2
: 1;
5077 unsigned PWM4DCH3
: 1;
5078 unsigned PWM4DCH4
: 1;
5079 unsigned PWM4DCH5
: 1;
5080 unsigned PWM4DCH6
: 1;
5081 unsigned PWM4DCH7
: 1;
5084 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits
;
5086 #define _PWM4DCH0 0x01
5087 #define _PWM4DCH1 0x02
5088 #define _PWM4DCH2 0x04
5089 #define _PWM4DCH3 0x08
5090 #define _PWM4DCH4 0x10
5091 #define _PWM4DCH5 0x20
5092 #define _PWM4DCH6 0x40
5093 #define _PWM4DCH7 0x80
5095 //==============================================================================
5098 //==============================================================================
5101 extern __at(0x061C) __sfr PWM4CON
;
5109 unsigned PWM4POL
: 1;
5110 unsigned PWM4OUT
: 1;
5112 unsigned PWM4EN
: 1;
5115 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits
;
5117 #define _PWM4POL 0x10
5118 #define _PWM4OUT 0x20
5119 #define _PWM4EN 0x80
5121 //==============================================================================
5124 //==============================================================================
5127 extern __at(0x061C) __sfr PWM4CON0
;
5135 unsigned PWM4POL
: 1;
5136 unsigned PWM4OUT
: 1;
5138 unsigned PWM4EN
: 1;
5141 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits
;
5143 #define _PWM4CON0_PWM4POL 0x10
5144 #define _PWM4CON0_PWM4OUT 0x20
5145 #define _PWM4CON0_PWM4EN 0x80
5147 //==============================================================================
5150 //==============================================================================
5153 extern __at(0x0691) __sfr COG1PHR
;
5159 unsigned G1PHR0
: 1;
5160 unsigned G1PHR1
: 1;
5161 unsigned G1PHR2
: 1;
5162 unsigned G1PHR3
: 1;
5163 unsigned G1PHR4
: 1;
5164 unsigned G1PHR5
: 1;
5176 extern __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits
;
5178 #define _G1PHR0 0x01
5179 #define _G1PHR1 0x02
5180 #define _G1PHR2 0x04
5181 #define _G1PHR3 0x08
5182 #define _G1PHR4 0x10
5183 #define _G1PHR5 0x20
5185 //==============================================================================
5188 //==============================================================================
5191 extern __at(0x0692) __sfr COG1PHF
;
5197 unsigned G1PHF0
: 1;
5198 unsigned G1PHF1
: 1;
5199 unsigned G1PHF2
: 1;
5200 unsigned G1PHF3
: 1;
5201 unsigned G1PHF4
: 1;
5202 unsigned G1PHF5
: 1;
5214 extern __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits
;
5216 #define _G1PHF0 0x01
5217 #define _G1PHF1 0x02
5218 #define _G1PHF2 0x04
5219 #define _G1PHF3 0x08
5220 #define _G1PHF4 0x10
5221 #define _G1PHF5 0x20
5223 //==============================================================================
5226 //==============================================================================
5229 extern __at(0x0693) __sfr COG1BLKR
;
5235 unsigned G1BLKR0
: 1;
5236 unsigned G1BLKR1
: 1;
5237 unsigned G1BLKR2
: 1;
5238 unsigned G1BLKR3
: 1;
5239 unsigned G1BLKR4
: 1;
5240 unsigned G1BLKR5
: 1;
5247 unsigned G1BLKR
: 6;
5252 extern __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits
;
5254 #define _G1BLKR0 0x01
5255 #define _G1BLKR1 0x02
5256 #define _G1BLKR2 0x04
5257 #define _G1BLKR3 0x08
5258 #define _G1BLKR4 0x10
5259 #define _G1BLKR5 0x20
5261 //==============================================================================
5264 //==============================================================================
5267 extern __at(0x0694) __sfr COG1BLKF
;
5273 unsigned G1BLKF0
: 1;
5274 unsigned G1BLKF1
: 1;
5275 unsigned G1BLKF2
: 1;
5276 unsigned G1BLKF3
: 1;
5277 unsigned G1BLKF4
: 1;
5278 unsigned G1BLKF5
: 1;
5285 unsigned G1BLKF
: 6;
5290 extern __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits
;
5292 #define _G1BLKF0 0x01
5293 #define _G1BLKF1 0x02
5294 #define _G1BLKF2 0x04
5295 #define _G1BLKF3 0x08
5296 #define _G1BLKF4 0x10
5297 #define _G1BLKF5 0x20
5299 //==============================================================================
5302 //==============================================================================
5305 extern __at(0x0695) __sfr COG1DBR
;
5311 unsigned G1DBR0
: 1;
5312 unsigned G1DBR1
: 1;
5313 unsigned G1DBR2
: 1;
5314 unsigned G1DBR3
: 1;
5315 unsigned G1DBR4
: 1;
5316 unsigned G1DBR5
: 1;
5328 extern __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits
;
5330 #define _G1DBR0 0x01
5331 #define _G1DBR1 0x02
5332 #define _G1DBR2 0x04
5333 #define _G1DBR3 0x08
5334 #define _G1DBR4 0x10
5335 #define _G1DBR5 0x20
5337 //==============================================================================
5340 //==============================================================================
5343 extern __at(0x0696) __sfr COG1DBF
;
5349 unsigned G1DBF0
: 1;
5350 unsigned G1DBF1
: 1;
5351 unsigned G1DBF2
: 1;
5352 unsigned G1DBF3
: 1;
5353 unsigned G1DBF4
: 1;
5354 unsigned G1DBF5
: 1;
5366 extern __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits
;
5368 #define _G1DBF0 0x01
5369 #define _G1DBF1 0x02
5370 #define _G1DBF2 0x04
5371 #define _G1DBF3 0x08
5372 #define _G1DBF4 0x10
5373 #define _G1DBF5 0x20
5375 //==============================================================================
5378 //==============================================================================
5381 extern __at(0x0697) __sfr COG1CON0
;
5411 extern __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits
;
5421 //==============================================================================
5424 //==============================================================================
5427 extern __at(0x0698) __sfr COG1CON1
;
5431 unsigned G1POLA
: 1;
5432 unsigned G1POLB
: 1;
5433 unsigned G1POLC
: 1;
5434 unsigned G1POLD
: 1;
5437 unsigned G1FDBS
: 1;
5438 unsigned G1RDBS
: 1;
5441 extern __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits
;
5443 #define _G1POLA 0x01
5444 #define _G1POLB 0x02
5445 #define _G1POLC 0x04
5446 #define _G1POLD 0x08
5447 #define _G1FDBS 0x40
5448 #define _G1RDBS 0x80
5450 //==============================================================================
5453 //==============================================================================
5456 extern __at(0x0699) __sfr COG1RIS
;
5460 unsigned G1RIS0
: 1;
5461 unsigned G1RIS1
: 1;
5462 unsigned G1RIS2
: 1;
5463 unsigned G1RIS3
: 1;
5464 unsigned G1RIS4
: 1;
5465 unsigned G1RIS5
: 1;
5466 unsigned G1RIS6
: 1;
5467 unsigned G1RIS7
: 1;
5470 extern __at(0x0699) volatile __COG1RISbits_t COG1RISbits
;
5472 #define _G1RIS0 0x01
5473 #define _G1RIS1 0x02
5474 #define _G1RIS2 0x04
5475 #define _G1RIS3 0x08
5476 #define _G1RIS4 0x10
5477 #define _G1RIS5 0x20
5478 #define _G1RIS6 0x40
5479 #define _G1RIS7 0x80
5481 //==============================================================================
5484 //==============================================================================
5487 extern __at(0x069A) __sfr COG1RSIM
;
5491 unsigned G1RSIM0
: 1;
5492 unsigned G1RSIM1
: 1;
5493 unsigned G1RSIM2
: 1;
5494 unsigned G1RSIM3
: 1;
5495 unsigned G1RSIM4
: 1;
5496 unsigned G1RSIM5
: 1;
5497 unsigned G1RSIM6
: 1;
5498 unsigned G1RSIM7
: 1;
5501 extern __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits
;
5503 #define _G1RSIM0 0x01
5504 #define _G1RSIM1 0x02
5505 #define _G1RSIM2 0x04
5506 #define _G1RSIM3 0x08
5507 #define _G1RSIM4 0x10
5508 #define _G1RSIM5 0x20
5509 #define _G1RSIM6 0x40
5510 #define _G1RSIM7 0x80
5512 //==============================================================================
5515 //==============================================================================
5518 extern __at(0x069B) __sfr COG1FIS
;
5522 unsigned G1FIS0
: 1;
5523 unsigned G1FIS1
: 1;
5524 unsigned G1FIS2
: 1;
5525 unsigned G1FIS3
: 1;
5526 unsigned G1FIS4
: 1;
5527 unsigned G1FIS5
: 1;
5528 unsigned G1FIS6
: 1;
5529 unsigned G1FIS7
: 1;
5532 extern __at(0x069B) volatile __COG1FISbits_t COG1FISbits
;
5534 #define _G1FIS0 0x01
5535 #define _G1FIS1 0x02
5536 #define _G1FIS2 0x04
5537 #define _G1FIS3 0x08
5538 #define _G1FIS4 0x10
5539 #define _G1FIS5 0x20
5540 #define _G1FIS6 0x40
5541 #define _G1FIS7 0x80
5543 //==============================================================================
5546 //==============================================================================
5549 extern __at(0x069C) __sfr COG1FSIM
;
5553 unsigned G1FSIM0
: 1;
5554 unsigned G1FSIM1
: 1;
5555 unsigned G1FSIM2
: 1;
5556 unsigned G1FSIM3
: 1;
5557 unsigned G1FSIM4
: 1;
5558 unsigned G1FSIM5
: 1;
5559 unsigned G1FSIM6
: 1;
5560 unsigned G1FSIM7
: 1;
5563 extern __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits
;
5565 #define _G1FSIM0 0x01
5566 #define _G1FSIM1 0x02
5567 #define _G1FSIM2 0x04
5568 #define _G1FSIM3 0x08
5569 #define _G1FSIM4 0x10
5570 #define _G1FSIM5 0x20
5571 #define _G1FSIM6 0x40
5572 #define _G1FSIM7 0x80
5574 //==============================================================================
5577 //==============================================================================
5580 extern __at(0x069D) __sfr COG1ASD0
;
5588 unsigned G1ASDAC0
: 1;
5589 unsigned G1ASDAC1
: 1;
5590 unsigned G1ASDBD0
: 1;
5591 unsigned G1ASDBD1
: 1;
5592 unsigned G1ARSEN
: 1;
5599 unsigned G1ASDAC
: 2;
5606 unsigned G1ASDBD
: 2;
5611 extern __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits
;
5613 #define _G1ASDAC0 0x04
5614 #define _G1ASDAC1 0x08
5615 #define _G1ASDBD0 0x10
5616 #define _G1ASDBD1 0x20
5617 #define _G1ARSEN 0x40
5620 //==============================================================================
5623 //==============================================================================
5626 extern __at(0x069E) __sfr COG1ASD1
;
5630 unsigned G1AS0E
: 1;
5631 unsigned G1AS1E
: 1;
5632 unsigned G1AS2E
: 1;
5633 unsigned G1AS3E
: 1;
5640 extern __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits
;
5642 #define _G1AS0E 0x01
5643 #define _G1AS1E 0x02
5644 #define _G1AS2E 0x04
5645 #define _G1AS3E 0x08
5647 //==============================================================================
5650 //==============================================================================
5653 extern __at(0x069F) __sfr COG1STR
;
5657 unsigned G1STRA
: 1;
5658 unsigned G1STRB
: 1;
5659 unsigned G1STRC
: 1;
5660 unsigned G1STRD
: 1;
5661 unsigned G1SDATA
: 1;
5662 unsigned G1SDATB
: 1;
5663 unsigned G1SDATC
: 1;
5664 unsigned G1SDATD
: 1;
5667 extern __at(0x069F) volatile __COG1STRbits_t COG1STRbits
;
5669 #define _G1STRA 0x01
5670 #define _G1STRB 0x02
5671 #define _G1STRC 0x04
5672 #define _G1STRD 0x08
5673 #define _G1SDATA 0x10
5674 #define _G1SDATB 0x20
5675 #define _G1SDATC 0x40
5676 #define _G1SDATD 0x80
5678 //==============================================================================
5681 //==============================================================================
5684 extern __at(0x0E0F) __sfr PPSLOCK
;
5688 unsigned PPSLOCKED
: 1;
5698 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits
;
5700 #define _PPSLOCKED 0x01
5702 //==============================================================================
5704 extern __at(0x0E10) __sfr INTPPS
;
5705 extern __at(0x0E11) __sfr T0CKIPPS
;
5706 extern __at(0x0E12) __sfr T1CKIPPS
;
5707 extern __at(0x0E13) __sfr T1GPPS
;
5708 extern __at(0x0E14) __sfr CCP1PPS
;
5709 extern __at(0x0E15) __sfr CCP2PPS
;
5710 extern __at(0x0E17) __sfr COGINPPS
;
5711 extern __at(0x0E20) __sfr SSPCLKPPS
;
5712 extern __at(0x0E21) __sfr SSPDATPPS
;
5713 extern __at(0x0E22) __sfr SSPSSPPS
;
5714 extern __at(0x0E24) __sfr RXPPS
;
5715 extern __at(0x0E25) __sfr CKPPS
;
5716 extern __at(0x0E28) __sfr CLCIN0PPS
;
5717 extern __at(0x0E29) __sfr CLCIN1PPS
;
5718 extern __at(0x0E2A) __sfr CLCIN2PPS
;
5719 extern __at(0x0E2B) __sfr CLCIN3PPS
;
5720 extern __at(0x0E90) __sfr RA0PPS
;
5721 extern __at(0x0E91) __sfr RA1PPS
;
5722 extern __at(0x0E92) __sfr RA2PPS
;
5723 extern __at(0x0E93) __sfr RA3PPS
;
5724 extern __at(0x0E94) __sfr RA4PPS
;
5725 extern __at(0x0E95) __sfr RA5PPS
;
5726 extern __at(0x0E96) __sfr RA6PPS
;
5727 extern __at(0x0E97) __sfr RA7PPS
;
5728 extern __at(0x0E98) __sfr RB0PPS
;
5729 extern __at(0x0E99) __sfr RB1PPS
;
5730 extern __at(0x0E9A) __sfr RB2PPS
;
5731 extern __at(0x0E9B) __sfr RB3PPS
;
5732 extern __at(0x0E9C) __sfr RB4PPS
;
5733 extern __at(0x0E9D) __sfr RB5PPS
;
5734 extern __at(0x0E9E) __sfr RB6PPS
;
5735 extern __at(0x0E9F) __sfr RB7PPS
;
5736 extern __at(0x0EA0) __sfr RC0PPS
;
5737 extern __at(0x0EA1) __sfr RC1PPS
;
5738 extern __at(0x0EA2) __sfr RC2PPS
;
5739 extern __at(0x0EA3) __sfr RC3PPS
;
5740 extern __at(0x0EA4) __sfr RC4PPS
;
5741 extern __at(0x0EA5) __sfr RC5PPS
;
5742 extern __at(0x0EA6) __sfr RC6PPS
;
5743 extern __at(0x0EA7) __sfr RC7PPS
;
5745 //==============================================================================
5748 extern __at(0x0F0F) __sfr CLCDATA
;
5754 unsigned MLC1OUT
: 1;
5755 unsigned MLC2OUT
: 1;
5756 unsigned MLC3OUT
: 1;
5757 unsigned MLC4OUT
: 1;
5766 unsigned MCLC1OUT
: 1;
5767 unsigned MCLC2OUT
: 1;
5768 unsigned MCLC3OUT
: 1;
5769 unsigned MCLC4OUT
: 1;
5777 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits
;
5779 #define _MLC1OUT 0x01
5780 #define _MCLC1OUT 0x01
5781 #define _MLC2OUT 0x02
5782 #define _MCLC2OUT 0x02
5783 #define _MLC3OUT 0x04
5784 #define _MCLC3OUT 0x04
5785 #define _MLC4OUT 0x08
5786 #define _MCLC4OUT 0x08
5788 //==============================================================================
5791 //==============================================================================
5794 extern __at(0x0F10) __sfr CLC1CON
;
5800 unsigned LC1MODE0
: 1;
5801 unsigned LC1MODE1
: 1;
5802 unsigned LC1MODE2
: 1;
5803 unsigned LC1INTN
: 1;
5804 unsigned LC1INTP
: 1;
5805 unsigned LC1OUT
: 1;
5830 unsigned LC1MODE
: 3;
5835 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits
;
5837 #define _LC1MODE0 0x01
5839 #define _LC1MODE1 0x02
5841 #define _LC1MODE2 0x04
5843 #define _LC1INTN 0x08
5845 #define _LC1INTP 0x10
5847 #define _LC1OUT 0x20
5852 //==============================================================================
5855 //==============================================================================
5858 extern __at(0x0F11) __sfr CLC1POL
;
5864 unsigned LC1G1POL
: 1;
5865 unsigned LC1G2POL
: 1;
5866 unsigned LC1G3POL
: 1;
5867 unsigned LC1G4POL
: 1;
5871 unsigned LC1POL
: 1;
5887 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits
;
5889 #define _LC1G1POL 0x01
5891 #define _LC1G2POL 0x02
5893 #define _LC1G3POL 0x04
5895 #define _LC1G4POL 0x08
5897 #define _LC1POL 0x80
5900 //==============================================================================
5903 //==============================================================================
5906 extern __at(0x0F12) __sfr CLC1SEL0
;
5912 unsigned LC1D1S0
: 1;
5913 unsigned LC1D1S1
: 1;
5914 unsigned LC1D1S2
: 1;
5915 unsigned LC1D1S3
: 1;
5916 unsigned LC1D1S4
: 1;
5936 unsigned LC1D1S
: 5;
5947 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
5949 #define _LC1D1S0 0x01
5951 #define _LC1D1S1 0x02
5953 #define _LC1D1S2 0x04
5955 #define _LC1D1S3 0x08
5957 #define _LC1D1S4 0x10
5960 //==============================================================================
5963 //==============================================================================
5966 extern __at(0x0F13) __sfr CLC1SEL1
;
5972 unsigned LC1D2S0
: 1;
5973 unsigned LC1D2S1
: 1;
5974 unsigned LC1D2S2
: 1;
5975 unsigned LC1D2S3
: 1;
5976 unsigned LC1D2S4
: 1;
5996 unsigned LC1D2S
: 5;
6007 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
6009 #define _LC1D2S0 0x01
6011 #define _LC1D2S1 0x02
6013 #define _LC1D2S2 0x04
6015 #define _LC1D2S3 0x08
6017 #define _LC1D2S4 0x10
6020 //==============================================================================
6023 //==============================================================================
6026 extern __at(0x0F14) __sfr CLC1SEL2
;
6032 unsigned LC1D3S0
: 1;
6033 unsigned LC1D3S1
: 1;
6034 unsigned LC1D3S2
: 1;
6035 unsigned LC1D3S3
: 1;
6036 unsigned LC1D3S4
: 1;
6062 unsigned LC1D3S
: 5;
6067 extern __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
6069 #define _LC1D3S0 0x01
6071 #define _LC1D3S1 0x02
6073 #define _LC1D3S2 0x04
6075 #define _LC1D3S3 0x08
6077 #define _LC1D3S4 0x10
6080 //==============================================================================
6083 //==============================================================================
6086 extern __at(0x0F15) __sfr CLC1SEL3
;
6092 unsigned LC1D4S0
: 1;
6093 unsigned LC1D4S1
: 1;
6094 unsigned LC1D4S2
: 1;
6095 unsigned LC1D4S3
: 1;
6096 unsigned LC1D4S4
: 1;
6116 unsigned LC1D4S
: 5;
6127 extern __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
6129 #define _LC1D4S0 0x01
6131 #define _LC1D4S1 0x02
6133 #define _LC1D4S2 0x04
6135 #define _LC1D4S3 0x08
6137 #define _LC1D4S4 0x10
6140 //==============================================================================
6143 //==============================================================================
6146 extern __at(0x0F16) __sfr CLC1GLS0
;
6152 unsigned LC1G1D1N
: 1;
6153 unsigned LC1G1D1T
: 1;
6154 unsigned LC1G1D2N
: 1;
6155 unsigned LC1G1D2T
: 1;
6156 unsigned LC1G1D3N
: 1;
6157 unsigned LC1G1D3T
: 1;
6158 unsigned LC1G1D4N
: 1;
6159 unsigned LC1G1D4T
: 1;
6175 extern __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
6177 #define _LC1G1D1N 0x01
6179 #define _LC1G1D1T 0x02
6181 #define _LC1G1D2N 0x04
6183 #define _LC1G1D2T 0x08
6185 #define _LC1G1D3N 0x10
6187 #define _LC1G1D3T 0x20
6189 #define _LC1G1D4N 0x40
6191 #define _LC1G1D4T 0x80
6194 //==============================================================================
6197 //==============================================================================
6200 extern __at(0x0F17) __sfr CLC1GLS1
;
6206 unsigned LC1G2D1N
: 1;
6207 unsigned LC1G2D1T
: 1;
6208 unsigned LC1G2D2N
: 1;
6209 unsigned LC1G2D2T
: 1;
6210 unsigned LC1G2D3N
: 1;
6211 unsigned LC1G2D3T
: 1;
6212 unsigned LC1G2D4N
: 1;
6213 unsigned LC1G2D4T
: 1;
6229 extern __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
6231 #define _CLC1GLS1_LC1G2D1N 0x01
6232 #define _CLC1GLS1_D1N 0x01
6233 #define _CLC1GLS1_LC1G2D1T 0x02
6234 #define _CLC1GLS1_D1T 0x02
6235 #define _CLC1GLS1_LC1G2D2N 0x04
6236 #define _CLC1GLS1_D2N 0x04
6237 #define _CLC1GLS1_LC1G2D2T 0x08
6238 #define _CLC1GLS1_D2T 0x08
6239 #define _CLC1GLS1_LC1G2D3N 0x10
6240 #define _CLC1GLS1_D3N 0x10
6241 #define _CLC1GLS1_LC1G2D3T 0x20
6242 #define _CLC1GLS1_D3T 0x20
6243 #define _CLC1GLS1_LC1G2D4N 0x40
6244 #define _CLC1GLS1_D4N 0x40
6245 #define _CLC1GLS1_LC1G2D4T 0x80
6246 #define _CLC1GLS1_D4T 0x80
6248 //==============================================================================
6251 //==============================================================================
6254 extern __at(0x0F18) __sfr CLC1GLS2
;
6260 unsigned LC1G3D1N
: 1;
6261 unsigned LC1G3D1T
: 1;
6262 unsigned LC1G3D2N
: 1;
6263 unsigned LC1G3D2T
: 1;
6264 unsigned LC1G3D3N
: 1;
6265 unsigned LC1G3D3T
: 1;
6266 unsigned LC1G3D4N
: 1;
6267 unsigned LC1G3D4T
: 1;
6283 extern __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
6285 #define _CLC1GLS2_LC1G3D1N 0x01
6286 #define _CLC1GLS2_D1N 0x01
6287 #define _CLC1GLS2_LC1G3D1T 0x02
6288 #define _CLC1GLS2_D1T 0x02
6289 #define _CLC1GLS2_LC1G3D2N 0x04
6290 #define _CLC1GLS2_D2N 0x04
6291 #define _CLC1GLS2_LC1G3D2T 0x08
6292 #define _CLC1GLS2_D2T 0x08
6293 #define _CLC1GLS2_LC1G3D3N 0x10
6294 #define _CLC1GLS2_D3N 0x10
6295 #define _CLC1GLS2_LC1G3D3T 0x20
6296 #define _CLC1GLS2_D3T 0x20
6297 #define _CLC1GLS2_LC1G3D4N 0x40
6298 #define _CLC1GLS2_D4N 0x40
6299 #define _CLC1GLS2_LC1G3D4T 0x80
6300 #define _CLC1GLS2_D4T 0x80
6302 //==============================================================================
6305 //==============================================================================
6308 extern __at(0x0F19) __sfr CLC1GLS3
;
6314 unsigned LC1G4D1N
: 1;
6315 unsigned LC1G4D1T
: 1;
6316 unsigned LC1G4D2N
: 1;
6317 unsigned LC1G4D2T
: 1;
6318 unsigned LC1G4D3N
: 1;
6319 unsigned LC1G4D3T
: 1;
6320 unsigned LC1G4D4N
: 1;
6321 unsigned LC1G4D4T
: 1;
6337 extern __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
6339 #define _LC1G4D1N 0x01
6341 #define _LC1G4D1T 0x02
6343 #define _LC1G4D2N 0x04
6345 #define _LC1G4D2T 0x08
6347 #define _LC1G4D3N 0x10
6349 #define _LC1G4D3T 0x20
6351 #define _LC1G4D4N 0x40
6353 #define _LC1G4D4T 0x80
6356 //==============================================================================
6359 //==============================================================================
6362 extern __at(0x0F1A) __sfr CLC2CON
;
6368 unsigned LC2MODE0
: 1;
6369 unsigned LC2MODE1
: 1;
6370 unsigned LC2MODE2
: 1;
6371 unsigned LC2INTN
: 1;
6372 unsigned LC2INTP
: 1;
6373 unsigned LC2OUT
: 1;
6398 unsigned LC2MODE
: 3;
6403 extern __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits
;
6405 #define _CLC2CON_LC2MODE0 0x01
6406 #define _CLC2CON_MODE0 0x01
6407 #define _CLC2CON_LC2MODE1 0x02
6408 #define _CLC2CON_MODE1 0x02
6409 #define _CLC2CON_LC2MODE2 0x04
6410 #define _CLC2CON_MODE2 0x04
6411 #define _CLC2CON_LC2INTN 0x08
6412 #define _CLC2CON_INTN 0x08
6413 #define _CLC2CON_LC2INTP 0x10
6414 #define _CLC2CON_INTP 0x10
6415 #define _CLC2CON_LC2OUT 0x20
6416 #define _CLC2CON_OUT 0x20
6417 #define _CLC2CON_LC2EN 0x80
6418 #define _CLC2CON_EN 0x80
6420 //==============================================================================
6423 //==============================================================================
6426 extern __at(0x0F1B) __sfr CLC2POL
;
6432 unsigned LC2G1POL
: 1;
6433 unsigned LC2G2POL
: 1;
6434 unsigned LC2G3POL
: 1;
6435 unsigned LC2G4POL
: 1;
6439 unsigned LC2POL
: 1;
6455 extern __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits
;
6457 #define _CLC2POL_LC2G1POL 0x01
6458 #define _CLC2POL_G1POL 0x01
6459 #define _CLC2POL_LC2G2POL 0x02
6460 #define _CLC2POL_G2POL 0x02
6461 #define _CLC2POL_LC2G3POL 0x04
6462 #define _CLC2POL_G3POL 0x04
6463 #define _CLC2POL_LC2G4POL 0x08
6464 #define _CLC2POL_G4POL 0x08
6465 #define _CLC2POL_LC2POL 0x80
6466 #define _CLC2POL_POL 0x80
6468 //==============================================================================
6471 //==============================================================================
6474 extern __at(0x0F1C) __sfr CLC2SEL0
;
6480 unsigned LC2D1S0
: 1;
6481 unsigned LC2D1S1
: 1;
6482 unsigned LC2D1S2
: 1;
6483 unsigned LC2D1S3
: 1;
6484 unsigned LC2D1S4
: 1;
6504 unsigned LC2D1S
: 5;
6515 extern __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
6517 #define _CLC2SEL0_LC2D1S0 0x01
6518 #define _CLC2SEL0_D1S0 0x01
6519 #define _CLC2SEL0_LC2D1S1 0x02
6520 #define _CLC2SEL0_D1S1 0x02
6521 #define _CLC2SEL0_LC2D1S2 0x04
6522 #define _CLC2SEL0_D1S2 0x04
6523 #define _CLC2SEL0_LC2D1S3 0x08
6524 #define _CLC2SEL0_D1S3 0x08
6525 #define _CLC2SEL0_LC2D1S4 0x10
6526 #define _CLC2SEL0_D1S4 0x10
6528 //==============================================================================
6531 //==============================================================================
6534 extern __at(0x0F1D) __sfr CLC2SEL1
;
6540 unsigned LC2D2S0
: 1;
6541 unsigned LC2D2S1
: 1;
6542 unsigned LC2D2S2
: 1;
6543 unsigned LC2D2S3
: 1;
6544 unsigned LC2D2S4
: 1;
6570 unsigned LC2D2S
: 5;
6575 extern __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
6577 #define _CLC2SEL1_LC2D2S0 0x01
6578 #define _CLC2SEL1_D2S0 0x01
6579 #define _CLC2SEL1_LC2D2S1 0x02
6580 #define _CLC2SEL1_D2S1 0x02
6581 #define _CLC2SEL1_LC2D2S2 0x04
6582 #define _CLC2SEL1_D2S2 0x04
6583 #define _CLC2SEL1_LC2D2S3 0x08
6584 #define _CLC2SEL1_D2S3 0x08
6585 #define _CLC2SEL1_LC2D2S4 0x10
6586 #define _CLC2SEL1_D2S4 0x10
6588 //==============================================================================
6591 //==============================================================================
6594 extern __at(0x0F1E) __sfr CLC2SEL2
;
6600 unsigned LC2D3S0
: 1;
6601 unsigned LC2D3S1
: 1;
6602 unsigned LC2D3S2
: 1;
6603 unsigned LC2D3S3
: 1;
6604 unsigned LC2D3S4
: 1;
6624 unsigned LC2D3S
: 5;
6635 extern __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
6637 #define _CLC2SEL2_LC2D3S0 0x01
6638 #define _CLC2SEL2_D3S0 0x01
6639 #define _CLC2SEL2_LC2D3S1 0x02
6640 #define _CLC2SEL2_D3S1 0x02
6641 #define _CLC2SEL2_LC2D3S2 0x04
6642 #define _CLC2SEL2_D3S2 0x04
6643 #define _CLC2SEL2_LC2D3S3 0x08
6644 #define _CLC2SEL2_D3S3 0x08
6645 #define _CLC2SEL2_LC2D3S4 0x10
6646 #define _CLC2SEL2_D3S4 0x10
6648 //==============================================================================
6651 //==============================================================================
6654 extern __at(0x0F1F) __sfr CLC2SEL3
;
6660 unsigned LC2D4S0
: 1;
6661 unsigned LC2D4S1
: 1;
6662 unsigned LC2D4S2
: 1;
6663 unsigned LC2D4S3
: 1;
6664 unsigned LC2D4S4
: 1;
6690 unsigned LC2D4S
: 5;
6695 extern __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
6697 #define _CLC2SEL3_LC2D4S0 0x01
6698 #define _CLC2SEL3_D4S0 0x01
6699 #define _CLC2SEL3_LC2D4S1 0x02
6700 #define _CLC2SEL3_D4S1 0x02
6701 #define _CLC2SEL3_LC2D4S2 0x04
6702 #define _CLC2SEL3_D4S2 0x04
6703 #define _CLC2SEL3_LC2D4S3 0x08
6704 #define _CLC2SEL3_D4S3 0x08
6705 #define _CLC2SEL3_LC2D4S4 0x10
6706 #define _CLC2SEL3_D4S4 0x10
6708 //==============================================================================
6711 //==============================================================================
6714 extern __at(0x0F20) __sfr CLC2GLS0
;
6720 unsigned LC2G1D1N
: 1;
6721 unsigned LC2G1D1T
: 1;
6722 unsigned LC2G1D2N
: 1;
6723 unsigned LC2G1D2T
: 1;
6724 unsigned LC2G1D3N
: 1;
6725 unsigned LC2G1D3T
: 1;
6726 unsigned LC2G1D4N
: 1;
6727 unsigned LC2G1D4T
: 1;
6743 extern __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
6745 #define _CLC2GLS0_LC2G1D1N 0x01
6746 #define _CLC2GLS0_D1N 0x01
6747 #define _CLC2GLS0_LC2G1D1T 0x02
6748 #define _CLC2GLS0_D1T 0x02
6749 #define _CLC2GLS0_LC2G1D2N 0x04
6750 #define _CLC2GLS0_D2N 0x04
6751 #define _CLC2GLS0_LC2G1D2T 0x08
6752 #define _CLC2GLS0_D2T 0x08
6753 #define _CLC2GLS0_LC2G1D3N 0x10
6754 #define _CLC2GLS0_D3N 0x10
6755 #define _CLC2GLS0_LC2G1D3T 0x20
6756 #define _CLC2GLS0_D3T 0x20
6757 #define _CLC2GLS0_LC2G1D4N 0x40
6758 #define _CLC2GLS0_D4N 0x40
6759 #define _CLC2GLS0_LC2G1D4T 0x80
6760 #define _CLC2GLS0_D4T 0x80
6762 //==============================================================================
6765 //==============================================================================
6768 extern __at(0x0F21) __sfr CLC2GLS1
;
6774 unsigned LC2G2D1N
: 1;
6775 unsigned LC2G2D1T
: 1;
6776 unsigned LC2G2D2N
: 1;
6777 unsigned LC2G2D2T
: 1;
6778 unsigned LC2G2D3N
: 1;
6779 unsigned LC2G2D3T
: 1;
6780 unsigned LC2G2D4N
: 1;
6781 unsigned LC2G2D4T
: 1;
6797 extern __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
6799 #define _CLC2GLS1_LC2G2D1N 0x01
6800 #define _CLC2GLS1_D1N 0x01
6801 #define _CLC2GLS1_LC2G2D1T 0x02
6802 #define _CLC2GLS1_D1T 0x02
6803 #define _CLC2GLS1_LC2G2D2N 0x04
6804 #define _CLC2GLS1_D2N 0x04
6805 #define _CLC2GLS1_LC2G2D2T 0x08
6806 #define _CLC2GLS1_D2T 0x08
6807 #define _CLC2GLS1_LC2G2D3N 0x10
6808 #define _CLC2GLS1_D3N 0x10
6809 #define _CLC2GLS1_LC2G2D3T 0x20
6810 #define _CLC2GLS1_D3T 0x20
6811 #define _CLC2GLS1_LC2G2D4N 0x40
6812 #define _CLC2GLS1_D4N 0x40
6813 #define _CLC2GLS1_LC2G2D4T 0x80
6814 #define _CLC2GLS1_D4T 0x80
6816 //==============================================================================
6819 //==============================================================================
6822 extern __at(0x0F22) __sfr CLC2GLS2
;
6828 unsigned LC2G3D1N
: 1;
6829 unsigned LC2G3D1T
: 1;
6830 unsigned LC2G3D2N
: 1;
6831 unsigned LC2G3D2T
: 1;
6832 unsigned LC2G3D3N
: 1;
6833 unsigned LC2G3D3T
: 1;
6834 unsigned LC2G3D4N
: 1;
6835 unsigned LC2G3D4T
: 1;
6851 extern __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
6853 #define _CLC2GLS2_LC2G3D1N 0x01
6854 #define _CLC2GLS2_D1N 0x01
6855 #define _CLC2GLS2_LC2G3D1T 0x02
6856 #define _CLC2GLS2_D1T 0x02
6857 #define _CLC2GLS2_LC2G3D2N 0x04
6858 #define _CLC2GLS2_D2N 0x04
6859 #define _CLC2GLS2_LC2G3D2T 0x08
6860 #define _CLC2GLS2_D2T 0x08
6861 #define _CLC2GLS2_LC2G3D3N 0x10
6862 #define _CLC2GLS2_D3N 0x10
6863 #define _CLC2GLS2_LC2G3D3T 0x20
6864 #define _CLC2GLS2_D3T 0x20
6865 #define _CLC2GLS2_LC2G3D4N 0x40
6866 #define _CLC2GLS2_D4N 0x40
6867 #define _CLC2GLS2_LC2G3D4T 0x80
6868 #define _CLC2GLS2_D4T 0x80
6870 //==============================================================================
6873 //==============================================================================
6876 extern __at(0x0F23) __sfr CLC2GLS3
;
6882 unsigned LC2G4D1N
: 1;
6883 unsigned LC2G4D1T
: 1;
6884 unsigned LC2G4D2N
: 1;
6885 unsigned LC2G4D2T
: 1;
6886 unsigned LC2G4D3N
: 1;
6887 unsigned LC2G4D3T
: 1;
6888 unsigned LC2G4D4N
: 1;
6889 unsigned LC2G4D4T
: 1;
6905 extern __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
6907 #define _CLC2GLS3_LC2G4D1N 0x01
6908 #define _CLC2GLS3_G4D1N 0x01
6909 #define _CLC2GLS3_LC2G4D1T 0x02
6910 #define _CLC2GLS3_G4D1T 0x02
6911 #define _CLC2GLS3_LC2G4D2N 0x04
6912 #define _CLC2GLS3_G4D2N 0x04
6913 #define _CLC2GLS3_LC2G4D2T 0x08
6914 #define _CLC2GLS3_G4D2T 0x08
6915 #define _CLC2GLS3_LC2G4D3N 0x10
6916 #define _CLC2GLS3_G4D3N 0x10
6917 #define _CLC2GLS3_LC2G4D3T 0x20
6918 #define _CLC2GLS3_G4D3T 0x20
6919 #define _CLC2GLS3_LC2G4D4N 0x40
6920 #define _CLC2GLS3_G4D4N 0x40
6921 #define _CLC2GLS3_LC2G4D4T 0x80
6922 #define _CLC2GLS3_G4D4T 0x80
6924 //==============================================================================
6927 //==============================================================================
6930 extern __at(0x0F24) __sfr CLC3CON
;
6936 unsigned LC3MODE0
: 1;
6937 unsigned LC3MODE1
: 1;
6938 unsigned LC3MODE2
: 1;
6939 unsigned LC3INTN
: 1;
6940 unsigned LC3INTP
: 1;
6941 unsigned LC3OUT
: 1;
6966 unsigned LC3MODE
: 3;
6971 extern __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits
;
6973 #define _CLC3CON_LC3MODE0 0x01
6974 #define _CLC3CON_MODE0 0x01
6975 #define _CLC3CON_LC3MODE1 0x02
6976 #define _CLC3CON_MODE1 0x02
6977 #define _CLC3CON_LC3MODE2 0x04
6978 #define _CLC3CON_MODE2 0x04
6979 #define _CLC3CON_LC3INTN 0x08
6980 #define _CLC3CON_INTN 0x08
6981 #define _CLC3CON_LC3INTP 0x10
6982 #define _CLC3CON_INTP 0x10
6983 #define _CLC3CON_LC3OUT 0x20
6984 #define _CLC3CON_OUT 0x20
6985 #define _CLC3CON_LC3EN 0x80
6986 #define _CLC3CON_EN 0x80
6988 //==============================================================================
6991 //==============================================================================
6994 extern __at(0x0F25) __sfr CLC3POL
;
7000 unsigned LC3G1POL
: 1;
7001 unsigned LC3G2POL
: 1;
7002 unsigned LC3G3POL
: 1;
7003 unsigned LC3G4POL
: 1;
7007 unsigned LC3POL
: 1;
7023 extern __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits
;
7025 #define _CLC3POL_LC3G1POL 0x01
7026 #define _CLC3POL_G1POL 0x01
7027 #define _CLC3POL_LC3G2POL 0x02
7028 #define _CLC3POL_G2POL 0x02
7029 #define _CLC3POL_LC3G3POL 0x04
7030 #define _CLC3POL_G3POL 0x04
7031 #define _CLC3POL_LC3G4POL 0x08
7032 #define _CLC3POL_G4POL 0x08
7033 #define _CLC3POL_LC3POL 0x80
7034 #define _CLC3POL_POL 0x80
7036 //==============================================================================
7039 //==============================================================================
7042 extern __at(0x0F26) __sfr CLC3SEL0
;
7048 unsigned LC3D1S0
: 1;
7049 unsigned LC3D1S1
: 1;
7050 unsigned LC3D1S2
: 1;
7051 unsigned LC3D1S3
: 1;
7052 unsigned LC3D1S4
: 1;
7072 unsigned LC3D1S
: 5;
7083 extern __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
7085 #define _CLC3SEL0_LC3D1S0 0x01
7086 #define _CLC3SEL0_D1S0 0x01
7087 #define _CLC3SEL0_LC3D1S1 0x02
7088 #define _CLC3SEL0_D1S1 0x02
7089 #define _CLC3SEL0_LC3D1S2 0x04
7090 #define _CLC3SEL0_D1S2 0x04
7091 #define _CLC3SEL0_LC3D1S3 0x08
7092 #define _CLC3SEL0_D1S3 0x08
7093 #define _CLC3SEL0_LC3D1S4 0x10
7094 #define _CLC3SEL0_D1S4 0x10
7096 //==============================================================================
7099 //==============================================================================
7102 extern __at(0x0F27) __sfr CLC3SEL1
;
7108 unsigned LC3D2S0
: 1;
7109 unsigned LC3D2S1
: 1;
7110 unsigned LC3D2S2
: 1;
7111 unsigned LC3D2S3
: 1;
7112 unsigned LC3D2S4
: 1;
7132 unsigned LC3D2S
: 5;
7143 extern __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
7145 #define _CLC3SEL1_LC3D2S0 0x01
7146 #define _CLC3SEL1_D2S0 0x01
7147 #define _CLC3SEL1_LC3D2S1 0x02
7148 #define _CLC3SEL1_D2S1 0x02
7149 #define _CLC3SEL1_LC3D2S2 0x04
7150 #define _CLC3SEL1_D2S2 0x04
7151 #define _CLC3SEL1_LC3D2S3 0x08
7152 #define _CLC3SEL1_D2S3 0x08
7153 #define _CLC3SEL1_LC3D2S4 0x10
7154 #define _CLC3SEL1_D2S4 0x10
7156 //==============================================================================
7159 //==============================================================================
7162 extern __at(0x0F28) __sfr CLC3SEL2
;
7168 unsigned LC3D3S0
: 1;
7169 unsigned LC3D3S1
: 1;
7170 unsigned LC3D3S2
: 1;
7171 unsigned LC3D3S3
: 1;
7172 unsigned LC3D3S4
: 1;
7192 unsigned LC3D3S
: 5;
7203 extern __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
7205 #define _CLC3SEL2_LC3D3S0 0x01
7206 #define _CLC3SEL2_D3S0 0x01
7207 #define _CLC3SEL2_LC3D3S1 0x02
7208 #define _CLC3SEL2_D3S1 0x02
7209 #define _CLC3SEL2_LC3D3S2 0x04
7210 #define _CLC3SEL2_D3S2 0x04
7211 #define _CLC3SEL2_LC3D3S3 0x08
7212 #define _CLC3SEL2_D3S3 0x08
7213 #define _CLC3SEL2_LC3D3S4 0x10
7214 #define _CLC3SEL2_D3S4 0x10
7216 //==============================================================================
7219 //==============================================================================
7222 extern __at(0x0F29) __sfr CLC3SEL3
;
7228 unsigned LC3D4S0
: 1;
7229 unsigned LC3D4S1
: 1;
7230 unsigned LC3D4S2
: 1;
7231 unsigned LC3D4S3
: 1;
7232 unsigned LC3D4S4
: 1;
7258 unsigned LC3D4S
: 5;
7263 extern __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
7265 #define _CLC3SEL3_LC3D4S0 0x01
7266 #define _CLC3SEL3_D4S0 0x01
7267 #define _CLC3SEL3_LC3D4S1 0x02
7268 #define _CLC3SEL3_D4S1 0x02
7269 #define _CLC3SEL3_LC3D4S2 0x04
7270 #define _CLC3SEL3_D4S2 0x04
7271 #define _CLC3SEL3_LC3D4S3 0x08
7272 #define _CLC3SEL3_D4S3 0x08
7273 #define _CLC3SEL3_LC3D4S4 0x10
7274 #define _CLC3SEL3_D4S4 0x10
7276 //==============================================================================
7279 //==============================================================================
7282 extern __at(0x0F2A) __sfr CLC3GLS0
;
7288 unsigned LC3G1D1N
: 1;
7289 unsigned LC3G1D1T
: 1;
7290 unsigned LC3G1D2N
: 1;
7291 unsigned LC3G1D2T
: 1;
7292 unsigned LC3G1D3N
: 1;
7293 unsigned LC3G1D3T
: 1;
7294 unsigned LC3G1D4N
: 1;
7295 unsigned LC3G1D4T
: 1;
7311 extern __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
7313 #define _CLC3GLS0_LC3G1D1N 0x01
7314 #define _CLC3GLS0_D1N 0x01
7315 #define _CLC3GLS0_LC3G1D1T 0x02
7316 #define _CLC3GLS0_D1T 0x02
7317 #define _CLC3GLS0_LC3G1D2N 0x04
7318 #define _CLC3GLS0_D2N 0x04
7319 #define _CLC3GLS0_LC3G1D2T 0x08
7320 #define _CLC3GLS0_D2T 0x08
7321 #define _CLC3GLS0_LC3G1D3N 0x10
7322 #define _CLC3GLS0_D3N 0x10
7323 #define _CLC3GLS0_LC3G1D3T 0x20
7324 #define _CLC3GLS0_D3T 0x20
7325 #define _CLC3GLS0_LC3G1D4N 0x40
7326 #define _CLC3GLS0_D4N 0x40
7327 #define _CLC3GLS0_LC3G1D4T 0x80
7328 #define _CLC3GLS0_D4T 0x80
7330 //==============================================================================
7333 //==============================================================================
7336 extern __at(0x0F2B) __sfr CLC3GLS1
;
7342 unsigned LC3G2D1N
: 1;
7343 unsigned LC3G2D1T
: 1;
7344 unsigned LC3G2D2N
: 1;
7345 unsigned LC3G2D2T
: 1;
7346 unsigned LC3G2D3N
: 1;
7347 unsigned LC3G2D3T
: 1;
7348 unsigned LC3G2D4N
: 1;
7349 unsigned LC3G2D4T
: 1;
7365 extern __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
7367 #define _CLC3GLS1_LC3G2D1N 0x01
7368 #define _CLC3GLS1_D1N 0x01
7369 #define _CLC3GLS1_LC3G2D1T 0x02
7370 #define _CLC3GLS1_D1T 0x02
7371 #define _CLC3GLS1_LC3G2D2N 0x04
7372 #define _CLC3GLS1_D2N 0x04
7373 #define _CLC3GLS1_LC3G2D2T 0x08
7374 #define _CLC3GLS1_D2T 0x08
7375 #define _CLC3GLS1_LC3G2D3N 0x10
7376 #define _CLC3GLS1_D3N 0x10
7377 #define _CLC3GLS1_LC3G2D3T 0x20
7378 #define _CLC3GLS1_D3T 0x20
7379 #define _CLC3GLS1_LC3G2D4N 0x40
7380 #define _CLC3GLS1_D4N 0x40
7381 #define _CLC3GLS1_LC3G2D4T 0x80
7382 #define _CLC3GLS1_D4T 0x80
7384 //==============================================================================
7387 //==============================================================================
7390 extern __at(0x0F2C) __sfr CLC3GLS2
;
7396 unsigned LC3G3D1N
: 1;
7397 unsigned LC3G3D1T
: 1;
7398 unsigned LC3G3D2N
: 1;
7399 unsigned LC3G3D2T
: 1;
7400 unsigned LC3G3D3N
: 1;
7401 unsigned LC3G3D3T
: 1;
7402 unsigned LC3G3D4N
: 1;
7403 unsigned LC3G3D4T
: 1;
7419 extern __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
7421 #define _CLC3GLS2_LC3G3D1N 0x01
7422 #define _CLC3GLS2_D1N 0x01
7423 #define _CLC3GLS2_LC3G3D1T 0x02
7424 #define _CLC3GLS2_D1T 0x02
7425 #define _CLC3GLS2_LC3G3D2N 0x04
7426 #define _CLC3GLS2_D2N 0x04
7427 #define _CLC3GLS2_LC3G3D2T 0x08
7428 #define _CLC3GLS2_D2T 0x08
7429 #define _CLC3GLS2_LC3G3D3N 0x10
7430 #define _CLC3GLS2_D3N 0x10
7431 #define _CLC3GLS2_LC3G3D3T 0x20
7432 #define _CLC3GLS2_D3T 0x20
7433 #define _CLC3GLS2_LC3G3D4N 0x40
7434 #define _CLC3GLS2_D4N 0x40
7435 #define _CLC3GLS2_LC3G3D4T 0x80
7436 #define _CLC3GLS2_D4T 0x80
7438 //==============================================================================
7441 //==============================================================================
7444 extern __at(0x0F2D) __sfr CLC3GLS3
;
7450 unsigned LC3G4D1N
: 1;
7451 unsigned LC3G4D1T
: 1;
7452 unsigned LC3G4D2N
: 1;
7453 unsigned LC3G4D2T
: 1;
7454 unsigned LC3G4D3N
: 1;
7455 unsigned LC3G4D3T
: 1;
7456 unsigned LC3G4D4N
: 1;
7457 unsigned LC3G4D4T
: 1;
7473 extern __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
7475 #define _CLC3GLS3_LC3G4D1N 0x01
7476 #define _CLC3GLS3_G4D1N 0x01
7477 #define _CLC3GLS3_LC3G4D1T 0x02
7478 #define _CLC3GLS3_G4D1T 0x02
7479 #define _CLC3GLS3_LC3G4D2N 0x04
7480 #define _CLC3GLS3_G4D2N 0x04
7481 #define _CLC3GLS3_LC3G4D2T 0x08
7482 #define _CLC3GLS3_G4D2T 0x08
7483 #define _CLC3GLS3_LC3G4D3N 0x10
7484 #define _CLC3GLS3_G4D3N 0x10
7485 #define _CLC3GLS3_LC3G4D3T 0x20
7486 #define _CLC3GLS3_G4D3T 0x20
7487 #define _CLC3GLS3_LC3G4D4N 0x40
7488 #define _CLC3GLS3_G4D4N 0x40
7489 #define _CLC3GLS3_LC3G4D4T 0x80
7490 #define _CLC3GLS3_G4D4T 0x80
7492 //==============================================================================
7495 //==============================================================================
7498 extern __at(0x0F2E) __sfr CLC4CON
;
7504 unsigned LC4MODE0
: 1;
7505 unsigned LC4MODE1
: 1;
7506 unsigned LC4MODE2
: 1;
7507 unsigned LC4INTN
: 1;
7508 unsigned LC4INTP
: 1;
7509 unsigned LC4OUT
: 1;
7534 unsigned LC4MODE
: 3;
7539 extern __at(0x0F2E) volatile __CLC4CONbits_t CLC4CONbits
;
7541 #define _CLC4CON_LC4MODE0 0x01
7542 #define _CLC4CON_MODE0 0x01
7543 #define _CLC4CON_LC4MODE1 0x02
7544 #define _CLC4CON_MODE1 0x02
7545 #define _CLC4CON_LC4MODE2 0x04
7546 #define _CLC4CON_MODE2 0x04
7547 #define _CLC4CON_LC4INTN 0x08
7548 #define _CLC4CON_INTN 0x08
7549 #define _CLC4CON_LC4INTP 0x10
7550 #define _CLC4CON_INTP 0x10
7551 #define _CLC4CON_LC4OUT 0x20
7552 #define _CLC4CON_OUT 0x20
7553 #define _CLC4CON_LC4EN 0x80
7554 #define _CLC4CON_EN 0x80
7556 //==============================================================================
7559 //==============================================================================
7562 extern __at(0x0F2F) __sfr CLC4POL
;
7568 unsigned LC4G1POL
: 1;
7569 unsigned LC4G2POL
: 1;
7570 unsigned LC4G3POL
: 1;
7571 unsigned LC4G4POL
: 1;
7575 unsigned LC4POL
: 1;
7591 extern __at(0x0F2F) volatile __CLC4POLbits_t CLC4POLbits
;
7593 #define _CLC4POL_LC4G1POL 0x01
7594 #define _CLC4POL_G1POL 0x01
7595 #define _CLC4POL_LC4G2POL 0x02
7596 #define _CLC4POL_G2POL 0x02
7597 #define _CLC4POL_LC4G3POL 0x04
7598 #define _CLC4POL_G3POL 0x04
7599 #define _CLC4POL_LC4G4POL 0x08
7600 #define _CLC4POL_G4POL 0x08
7601 #define _CLC4POL_LC4POL 0x80
7602 #define _CLC4POL_POL 0x80
7604 //==============================================================================
7607 //==============================================================================
7610 extern __at(0x0F30) __sfr CLC4SEL0
;
7616 unsigned LC4D1S0
: 1;
7617 unsigned LC4D1S1
: 1;
7618 unsigned LC4D1S2
: 1;
7619 unsigned LC4D1S3
: 1;
7620 unsigned LC4D1S4
: 1;
7640 unsigned LC4D1S
: 5;
7651 extern __at(0x0F30) volatile __CLC4SEL0bits_t CLC4SEL0bits
;
7653 #define _CLC4SEL0_LC4D1S0 0x01
7654 #define _CLC4SEL0_D1S0 0x01
7655 #define _CLC4SEL0_LC4D1S1 0x02
7656 #define _CLC4SEL0_D1S1 0x02
7657 #define _CLC4SEL0_LC4D1S2 0x04
7658 #define _CLC4SEL0_D1S2 0x04
7659 #define _CLC4SEL0_LC4D1S3 0x08
7660 #define _CLC4SEL0_D1S3 0x08
7661 #define _CLC4SEL0_LC4D1S4 0x10
7662 #define _CLC4SEL0_D1S4 0x10
7664 //==============================================================================
7667 //==============================================================================
7670 extern __at(0x0F31) __sfr CLC4SEL1
;
7676 unsigned LC4D2S0
: 1;
7677 unsigned LC4D2S1
: 1;
7678 unsigned LC4D2S2
: 1;
7679 unsigned LC4D2S3
: 1;
7680 unsigned LC4D2S4
: 1;
7706 unsigned LC4D2S
: 5;
7711 extern __at(0x0F31) volatile __CLC4SEL1bits_t CLC4SEL1bits
;
7713 #define _CLC4SEL1_LC4D2S0 0x01
7714 #define _CLC4SEL1_D2S0 0x01
7715 #define _CLC4SEL1_LC4D2S1 0x02
7716 #define _CLC4SEL1_D2S1 0x02
7717 #define _CLC4SEL1_LC4D2S2 0x04
7718 #define _CLC4SEL1_D2S2 0x04
7719 #define _CLC4SEL1_LC4D2S3 0x08
7720 #define _CLC4SEL1_D2S3 0x08
7721 #define _CLC4SEL1_LC4D2S4 0x10
7722 #define _CLC4SEL1_D2S4 0x10
7724 //==============================================================================
7727 //==============================================================================
7730 extern __at(0x0F32) __sfr CLC4SEL2
;
7736 unsigned LC4D3S0
: 1;
7737 unsigned LC4D3S1
: 1;
7738 unsigned LC4D3S2
: 1;
7739 unsigned LC4D3S3
: 1;
7740 unsigned LC4D3S4
: 1;
7760 unsigned LC4D3S
: 5;
7771 extern __at(0x0F32) volatile __CLC4SEL2bits_t CLC4SEL2bits
;
7773 #define _CLC4SEL2_LC4D3S0 0x01
7774 #define _CLC4SEL2_D3S0 0x01
7775 #define _CLC4SEL2_LC4D3S1 0x02
7776 #define _CLC4SEL2_D3S1 0x02
7777 #define _CLC4SEL2_LC4D3S2 0x04
7778 #define _CLC4SEL2_D3S2 0x04
7779 #define _CLC4SEL2_LC4D3S3 0x08
7780 #define _CLC4SEL2_D3S3 0x08
7781 #define _CLC4SEL2_LC4D3S4 0x10
7782 #define _CLC4SEL2_D3S4 0x10
7784 //==============================================================================
7787 //==============================================================================
7790 extern __at(0x0F33) __sfr CLC4SEL3
;
7796 unsigned LC4D4S0
: 1;
7797 unsigned LC4D4S1
: 1;
7798 unsigned LC4D4S2
: 1;
7799 unsigned LC4D4S3
: 1;
7800 unsigned LC4D4S4
: 1;
7820 unsigned LC4D4S
: 5;
7831 extern __at(0x0F33) volatile __CLC4SEL3bits_t CLC4SEL3bits
;
7833 #define _CLC4SEL3_LC4D4S0 0x01
7834 #define _CLC4SEL3_D4S0 0x01
7835 #define _CLC4SEL3_LC4D4S1 0x02
7836 #define _CLC4SEL3_D4S1 0x02
7837 #define _CLC4SEL3_LC4D4S2 0x04
7838 #define _CLC4SEL3_D4S2 0x04
7839 #define _CLC4SEL3_LC4D4S3 0x08
7840 #define _CLC4SEL3_D4S3 0x08
7841 #define _CLC4SEL3_LC4D4S4 0x10
7842 #define _CLC4SEL3_D4S4 0x10
7844 //==============================================================================
7847 //==============================================================================
7850 extern __at(0x0F34) __sfr CLC4GLS0
;
7856 unsigned LC4G1D1N
: 1;
7857 unsigned LC4G1D1T
: 1;
7858 unsigned LC4G1D2N
: 1;
7859 unsigned LC4G1D2T
: 1;
7860 unsigned LC4G1D3N
: 1;
7861 unsigned LC4G1D3T
: 1;
7862 unsigned LC4G1D4N
: 1;
7863 unsigned LC4G1D4T
: 1;
7879 extern __at(0x0F34) volatile __CLC4GLS0bits_t CLC4GLS0bits
;
7881 #define _CLC4GLS0_LC4G1D1N 0x01
7882 #define _CLC4GLS0_D1N 0x01
7883 #define _CLC4GLS0_LC4G1D1T 0x02
7884 #define _CLC4GLS0_D1T 0x02
7885 #define _CLC4GLS0_LC4G1D2N 0x04
7886 #define _CLC4GLS0_D2N 0x04
7887 #define _CLC4GLS0_LC4G1D2T 0x08
7888 #define _CLC4GLS0_D2T 0x08
7889 #define _CLC4GLS0_LC4G1D3N 0x10
7890 #define _CLC4GLS0_D3N 0x10
7891 #define _CLC4GLS0_LC4G1D3T 0x20
7892 #define _CLC4GLS0_D3T 0x20
7893 #define _CLC4GLS0_LC4G1D4N 0x40
7894 #define _CLC4GLS0_D4N 0x40
7895 #define _CLC4GLS0_LC4G1D4T 0x80
7896 #define _CLC4GLS0_D4T 0x80
7898 //==============================================================================
7901 //==============================================================================
7904 extern __at(0x0F35) __sfr CLC4GLS1
;
7910 unsigned LC4G2D1N
: 1;
7911 unsigned LC4G2D1T
: 1;
7912 unsigned LC4G2D2N
: 1;
7913 unsigned LC4G2D2T
: 1;
7914 unsigned LC4G2D3N
: 1;
7915 unsigned LC4G2D3T
: 1;
7916 unsigned LC4G2D4N
: 1;
7917 unsigned LC4G2D4T
: 1;
7933 extern __at(0x0F35) volatile __CLC4GLS1bits_t CLC4GLS1bits
;
7935 #define _CLC4GLS1_LC4G2D1N 0x01
7936 #define _CLC4GLS1_D1N 0x01
7937 #define _CLC4GLS1_LC4G2D1T 0x02
7938 #define _CLC4GLS1_D1T 0x02
7939 #define _CLC4GLS1_LC4G2D2N 0x04
7940 #define _CLC4GLS1_D2N 0x04
7941 #define _CLC4GLS1_LC4G2D2T 0x08
7942 #define _CLC4GLS1_D2T 0x08
7943 #define _CLC4GLS1_LC4G2D3N 0x10
7944 #define _CLC4GLS1_D3N 0x10
7945 #define _CLC4GLS1_LC4G2D3T 0x20
7946 #define _CLC4GLS1_D3T 0x20
7947 #define _CLC4GLS1_LC4G2D4N 0x40
7948 #define _CLC4GLS1_D4N 0x40
7949 #define _CLC4GLS1_LC4G2D4T 0x80
7950 #define _CLC4GLS1_D4T 0x80
7952 //==============================================================================
7955 //==============================================================================
7958 extern __at(0x0F36) __sfr CLC4GLS2
;
7964 unsigned LC4G3D1N
: 1;
7965 unsigned LC4G3D1T
: 1;
7966 unsigned LC4G3D2N
: 1;
7967 unsigned LC4G3D2T
: 1;
7968 unsigned LC4G3D3N
: 1;
7969 unsigned LC4G3D3T
: 1;
7970 unsigned LC4G3D4N
: 1;
7971 unsigned LC4G3D4T
: 1;
7987 extern __at(0x0F36) volatile __CLC4GLS2bits_t CLC4GLS2bits
;
7989 #define _CLC4GLS2_LC4G3D1N 0x01
7990 #define _CLC4GLS2_D1N 0x01
7991 #define _CLC4GLS2_LC4G3D1T 0x02
7992 #define _CLC4GLS2_D1T 0x02
7993 #define _CLC4GLS2_LC4G3D2N 0x04
7994 #define _CLC4GLS2_D2N 0x04
7995 #define _CLC4GLS2_LC4G3D2T 0x08
7996 #define _CLC4GLS2_D2T 0x08
7997 #define _CLC4GLS2_LC4G3D3N 0x10
7998 #define _CLC4GLS2_D3N 0x10
7999 #define _CLC4GLS2_LC4G3D3T 0x20
8000 #define _CLC4GLS2_D3T 0x20
8001 #define _CLC4GLS2_LC4G3D4N 0x40
8002 #define _CLC4GLS2_D4N 0x40
8003 #define _CLC4GLS2_LC4G3D4T 0x80
8004 #define _CLC4GLS2_D4T 0x80
8006 //==============================================================================
8009 //==============================================================================
8012 extern __at(0x0F37) __sfr CLC4GLS3
;
8018 unsigned LC4G4D1N
: 1;
8019 unsigned LC4G4D1T
: 1;
8020 unsigned LC4G4D2N
: 1;
8021 unsigned LC4G4D2T
: 1;
8022 unsigned LC4G4D3N
: 1;
8023 unsigned LC4G4D3T
: 1;
8024 unsigned LC4G4D4N
: 1;
8025 unsigned LC4G4D4T
: 1;
8041 extern __at(0x0F37) volatile __CLC4GLS3bits_t CLC4GLS3bits
;
8043 #define _CLC4GLS3_LC4G4D1N 0x01
8044 #define _CLC4GLS3_G4D1N 0x01
8045 #define _CLC4GLS3_LC4G4D1T 0x02
8046 #define _CLC4GLS3_G4D1T 0x02
8047 #define _CLC4GLS3_LC4G4D2N 0x04
8048 #define _CLC4GLS3_G4D2N 0x04
8049 #define _CLC4GLS3_LC4G4D2T 0x08
8050 #define _CLC4GLS3_G4D2T 0x08
8051 #define _CLC4GLS3_LC4G4D3N 0x10
8052 #define _CLC4GLS3_G4D3N 0x10
8053 #define _CLC4GLS3_LC4G4D3T 0x20
8054 #define _CLC4GLS3_G4D3T 0x20
8055 #define _CLC4GLS3_LC4G4D4N 0x40
8056 #define _CLC4GLS3_G4D4N 0x40
8057 #define _CLC4GLS3_LC4G4D4T 0x80
8058 #define _CLC4GLS3_G4D4T 0x80
8060 //==============================================================================
8063 //==============================================================================
8066 extern __at(0x0FE4) __sfr STATUS_SHAD
;
8070 unsigned C_SHAD
: 1;
8071 unsigned DC_SHAD
: 1;
8072 unsigned Z_SHAD
: 1;
8078 } __STATUS_SHADbits_t
;
8080 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
8082 #define _C_SHAD 0x01
8083 #define _DC_SHAD 0x02
8084 #define _Z_SHAD 0x04
8086 //==============================================================================
8088 extern __at(0x0FE5) __sfr WREG_SHAD
;
8089 extern __at(0x0FE6) __sfr BSR_SHAD
;
8090 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
8091 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
8092 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
8093 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
8094 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
8095 extern __at(0x0FED) __sfr STKPTR
;
8096 extern __at(0x0FEE) __sfr TOSL
;
8097 extern __at(0x0FEF) __sfr TOSH
;
8099 //==============================================================================
8101 // Configuration Bits
8103 //==============================================================================
8105 #define _CONFIG1 0x8007
8106 #define _CONFIG2 0x8008
8108 //----------------------------- CONFIG1 Options -------------------------------
8110 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
8111 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
8112 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
8113 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
8114 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
8115 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
8116 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
8117 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
8118 #define _WDTE_OFF 0x3FE7 // WDT disabled.
8119 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
8120 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
8121 #define _WDTE_ON 0x3FFF // WDT enabled.
8122 #define _PWRTE_ON 0x3FDF // PWRT enabled.
8123 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
8124 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input if LVP bit is also 0.
8125 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
8126 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
8127 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
8128 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
8129 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
8130 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
8131 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
8132 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
8133 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
8134 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
8135 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
8136 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
8137 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
8139 //----------------------------- CONFIG2 Options -------------------------------
8141 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control.
8142 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control.
8143 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control.
8144 #define _WRT_OFF 0x3FFF // Write protection off.
8145 #define _PPS1WAY_OFF 0x3FFB // The PPSLOCK bit can be set and cleared repeatedly by software.
8146 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit cannot be cleared once it is set by software.
8147 #define _ZCDDIS_OFF 0x3F7F // Zero-cross detect circuit is always enabled.
8148 #define _ZCDDIS_ON 0x3FFF // Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.
8149 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
8150 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
8151 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
8152 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
8153 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
8154 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
8155 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
8156 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
8157 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
8158 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
8159 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
8160 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
8162 //==============================================================================
8164 #define _DEVID1 0x8006
8166 #define _IDLOC0 0x8000
8167 #define _IDLOC1 0x8001
8168 #define _IDLOC2 0x8002
8169 #define _IDLOC3 0x8003
8171 //==============================================================================
8173 #ifndef NO_BIT_DEFINES
8175 #define ADON ADCON0bits.ADON // bit 0
8176 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
8177 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
8178 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
8179 #define CHS0 ADCON0bits.CHS0 // bit 2
8180 #define CHS1 ADCON0bits.CHS1 // bit 3
8181 #define CHS2 ADCON0bits.CHS2 // bit 4
8182 #define CHS3 ADCON0bits.CHS3 // bit 5
8183 #define CHS4 ADCON0bits.CHS4 // bit 6
8185 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
8186 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
8187 #define ADNREF ADCON1bits.ADNREF // bit 2
8188 #define ADFM ADCON1bits.ADFM // bit 7
8190 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
8191 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
8192 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
8193 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
8195 #define ANSA0 ANSELAbits.ANSA0 // bit 0
8196 #define ANSA1 ANSELAbits.ANSA1 // bit 1
8197 #define ANSA2 ANSELAbits.ANSA2 // bit 2
8198 #define ANSA3 ANSELAbits.ANSA3 // bit 3
8199 #define ANSA4 ANSELAbits.ANSA4 // bit 4
8200 #define ANSA5 ANSELAbits.ANSA5 // bit 5
8202 #define ANSB0 ANSELBbits.ANSB0 // bit 0
8203 #define ANSB1 ANSELBbits.ANSB1 // bit 1
8204 #define ANSB2 ANSELBbits.ANSB2 // bit 2
8205 #define ANSB3 ANSELBbits.ANSB3 // bit 3
8206 #define ANSB4 ANSELBbits.ANSB4 // bit 4
8207 #define ANSB5 ANSELBbits.ANSB5 // bit 5
8209 #define ANSC2 ANSELCbits.ANSC2 // bit 2
8210 #define ANSC3 ANSELCbits.ANSC3 // bit 3
8211 #define ANSC4 ANSELCbits.ANSC4 // bit 4
8212 #define ANSC5 ANSELCbits.ANSC5 // bit 5
8213 #define ANSC6 ANSELCbits.ANSC6 // bit 6
8214 #define ANSC7 ANSELCbits.ANSC7 // bit 7
8216 #define ABDEN BAUD1CONbits.ABDEN // bit 0
8217 #define WUE BAUD1CONbits.WUE // bit 1
8218 #define BRG16 BAUD1CONbits.BRG16 // bit 3
8219 #define SCKP BAUD1CONbits.SCKP // bit 4
8220 #define RCIDL BAUD1CONbits.RCIDL // bit 6
8221 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
8223 #define BORRDY BORCONbits.BORRDY // bit 0
8224 #define BORFS BORCONbits.BORFS // bit 6
8225 #define SBOREN BORCONbits.SBOREN // bit 7
8227 #define BSR0 BSRbits.BSR0 // bit 0
8228 #define BSR1 BSRbits.BSR1 // bit 1
8229 #define BSR2 BSRbits.BSR2 // bit 2
8230 #define BSR3 BSRbits.BSR3 // bit 3
8231 #define BSR4 BSRbits.BSR4 // bit 4
8233 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
8234 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
8235 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
8236 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
8237 #define DC1B0 CCP1CONbits.DC1B0 // bit 4, shadows bit in CCP1CONbits
8238 #define CCP1Y CCP1CONbits.CCP1Y // bit 4, shadows bit in CCP1CONbits
8239 #define DC1B1 CCP1CONbits.DC1B1 // bit 5, shadows bit in CCP1CONbits
8240 #define CCP1X CCP1CONbits.CCP1X // bit 5, shadows bit in CCP1CONbits
8242 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
8243 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
8244 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
8245 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
8246 #define DC2B0 CCP2CONbits.DC2B0 // bit 4, shadows bit in CCP2CONbits
8247 #define CCP2Y CCP2CONbits.CCP2Y // bit 4, shadows bit in CCP2CONbits
8248 #define DC2B1 CCP2CONbits.DC2B1 // bit 5, shadows bit in CCP2CONbits
8249 #define CCP2X CCP2CONbits.CCP2X // bit 5, shadows bit in CCP2CONbits
8251 #define C1TSEL0 CCPTMRSbits.C1TSEL0 // bit 0
8252 #define C1TSEL1 CCPTMRSbits.C1TSEL1 // bit 1
8253 #define C2TSEL0 CCPTMRSbits.C2TSEL0 // bit 2
8254 #define C2TSEL1 CCPTMRSbits.C2TSEL1 // bit 3
8255 #define P3TSEL0 CCPTMRSbits.P3TSEL0 // bit 4
8256 #define P3TSEL1 CCPTMRSbits.P3TSEL1 // bit 5
8257 #define P4TSEL0 CCPTMRSbits.P4TSEL0 // bit 6
8258 #define P4TSEL1 CCPTMRSbits.P4TSEL1 // bit 7
8260 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
8261 #define MODE0 CLC1CONbits.MODE0 // bit 0, shadows bit in CLC1CONbits
8262 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
8263 #define MODE1 CLC1CONbits.MODE1 // bit 1, shadows bit in CLC1CONbits
8264 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
8265 #define MODE2 CLC1CONbits.MODE2 // bit 2, shadows bit in CLC1CONbits
8266 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
8267 #define INTN CLC1CONbits.INTN // bit 3, shadows bit in CLC1CONbits
8268 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
8269 #define INTP CLC1CONbits.INTP // bit 4, shadows bit in CLC1CONbits
8270 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
8271 #define OUT CLC1CONbits.OUT // bit 5, shadows bit in CLC1CONbits
8272 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
8273 #define EN CLC1CONbits.EN // bit 7, shadows bit in CLC1CONbits
8275 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
8276 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
8277 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
8278 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
8279 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
8280 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
8281 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
8282 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
8283 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
8284 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
8285 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
8286 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
8287 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
8288 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
8289 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
8290 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
8292 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
8293 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
8294 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
8295 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
8296 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
8297 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
8298 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
8299 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
8300 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
8301 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
8302 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
8303 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
8304 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
8305 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
8306 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
8307 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
8309 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
8310 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
8311 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
8312 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
8313 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
8314 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
8315 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
8316 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
8317 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
8318 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
8320 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
8321 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
8322 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
8323 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
8324 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
8325 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
8326 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
8327 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
8328 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
8329 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
8331 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
8332 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
8333 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
8334 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
8335 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
8336 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
8337 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
8338 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
8339 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
8340 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
8342 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
8343 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
8344 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
8345 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
8346 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
8347 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
8348 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
8349 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
8350 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
8351 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
8353 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
8354 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
8355 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
8356 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
8357 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
8358 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
8359 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
8360 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
8361 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
8362 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
8364 #define MLC1OUT CLCDATAbits.MLC1OUT // bit 0, shadows bit in CLCDATAbits
8365 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0, shadows bit in CLCDATAbits
8366 #define MLC2OUT CLCDATAbits.MLC2OUT // bit 1, shadows bit in CLCDATAbits
8367 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1, shadows bit in CLCDATAbits
8368 #define MLC3OUT CLCDATAbits.MLC3OUT // bit 2, shadows bit in CLCDATAbits
8369 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2, shadows bit in CLCDATAbits
8370 #define MLC4OUT CLCDATAbits.MLC4OUT // bit 3, shadows bit in CLCDATAbits
8371 #define MCLC4OUT CLCDATAbits.MCLC4OUT // bit 3, shadows bit in CLCDATAbits
8373 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
8374 #define C1HYS CM1CON0bits.C1HYS // bit 1
8375 #define C1SP CM1CON0bits.C1SP // bit 2
8376 #define C1ZLF CM1CON0bits.C1ZLF // bit 3
8377 #define C1POL CM1CON0bits.C1POL // bit 4
8378 #define C1OUT CM1CON0bits.C1OUT // bit 6
8379 #define C1ON CM1CON0bits.C1ON // bit 7
8381 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
8382 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
8383 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
8384 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 3
8385 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 4
8386 #define C1PCH2 CM1CON1bits.C1PCH2 // bit 5
8387 #define C1INTN CM1CON1bits.C1INTN // bit 6
8388 #define C1INTP CM1CON1bits.C1INTP // bit 7
8390 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
8391 #define C2HYS CM2CON0bits.C2HYS // bit 1
8392 #define C2SP CM2CON0bits.C2SP // bit 2
8393 #define C2ZLF CM2CON0bits.C2ZLF // bit 3
8394 #define C2POL CM2CON0bits.C2POL // bit 4
8395 #define C2OUT CM2CON0bits.C2OUT // bit 6
8396 #define C2ON CM2CON0bits.C2ON // bit 7
8398 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
8399 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
8400 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
8401 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 3
8402 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 4
8403 #define C2PCH2 CM2CON1bits.C2PCH2 // bit 5
8404 #define C2INTN CM2CON1bits.C2INTN // bit 6
8405 #define C2INTP CM2CON1bits.C2INTP // bit 7
8407 #define MC1OUT CMOUTbits.MC1OUT // bit 0
8408 #define MC2OUT CMOUTbits.MC2OUT // bit 1
8410 #define G1ASDAC0 COG1ASD0bits.G1ASDAC0 // bit 2
8411 #define G1ASDAC1 COG1ASD0bits.G1ASDAC1 // bit 3
8412 #define G1ASDBD0 COG1ASD0bits.G1ASDBD0 // bit 4
8413 #define G1ASDBD1 COG1ASD0bits.G1ASDBD1 // bit 5
8414 #define G1ARSEN COG1ASD0bits.G1ARSEN // bit 6
8415 #define G1ASE COG1ASD0bits.G1ASE // bit 7
8417 #define G1AS0E COG1ASD1bits.G1AS0E // bit 0
8418 #define G1AS1E COG1ASD1bits.G1AS1E // bit 1
8419 #define G1AS2E COG1ASD1bits.G1AS2E // bit 2
8420 #define G1AS3E COG1ASD1bits.G1AS3E // bit 3
8422 #define G1BLKF0 COG1BLKFbits.G1BLKF0 // bit 0
8423 #define G1BLKF1 COG1BLKFbits.G1BLKF1 // bit 1
8424 #define G1BLKF2 COG1BLKFbits.G1BLKF2 // bit 2
8425 #define G1BLKF3 COG1BLKFbits.G1BLKF3 // bit 3
8426 #define G1BLKF4 COG1BLKFbits.G1BLKF4 // bit 4
8427 #define G1BLKF5 COG1BLKFbits.G1BLKF5 // bit 5
8429 #define G1BLKR0 COG1BLKRbits.G1BLKR0 // bit 0
8430 #define G1BLKR1 COG1BLKRbits.G1BLKR1 // bit 1
8431 #define G1BLKR2 COG1BLKRbits.G1BLKR2 // bit 2
8432 #define G1BLKR3 COG1BLKRbits.G1BLKR3 // bit 3
8433 #define G1BLKR4 COG1BLKRbits.G1BLKR4 // bit 4
8434 #define G1BLKR5 COG1BLKRbits.G1BLKR5 // bit 5
8436 #define G1MD0 COG1CON0bits.G1MD0 // bit 0
8437 #define G1MD1 COG1CON0bits.G1MD1 // bit 1
8438 #define G1MD2 COG1CON0bits.G1MD2 // bit 2
8439 #define G1CS0 COG1CON0bits.G1CS0 // bit 3
8440 #define G1CS1 COG1CON0bits.G1CS1 // bit 4
8441 #define G1LD COG1CON0bits.G1LD // bit 6
8442 #define G1EN COG1CON0bits.G1EN // bit 7
8444 #define G1POLA COG1CON1bits.G1POLA // bit 0
8445 #define G1POLB COG1CON1bits.G1POLB // bit 1
8446 #define G1POLC COG1CON1bits.G1POLC // bit 2
8447 #define G1POLD COG1CON1bits.G1POLD // bit 3
8448 #define G1FDBS COG1CON1bits.G1FDBS // bit 6
8449 #define G1RDBS COG1CON1bits.G1RDBS // bit 7
8451 #define G1DBF0 COG1DBFbits.G1DBF0 // bit 0
8452 #define G1DBF1 COG1DBFbits.G1DBF1 // bit 1
8453 #define G1DBF2 COG1DBFbits.G1DBF2 // bit 2
8454 #define G1DBF3 COG1DBFbits.G1DBF3 // bit 3
8455 #define G1DBF4 COG1DBFbits.G1DBF4 // bit 4
8456 #define G1DBF5 COG1DBFbits.G1DBF5 // bit 5
8458 #define G1DBR0 COG1DBRbits.G1DBR0 // bit 0
8459 #define G1DBR1 COG1DBRbits.G1DBR1 // bit 1
8460 #define G1DBR2 COG1DBRbits.G1DBR2 // bit 2
8461 #define G1DBR3 COG1DBRbits.G1DBR3 // bit 3
8462 #define G1DBR4 COG1DBRbits.G1DBR4 // bit 4
8463 #define G1DBR5 COG1DBRbits.G1DBR5 // bit 5
8465 #define G1FIS0 COG1FISbits.G1FIS0 // bit 0
8466 #define G1FIS1 COG1FISbits.G1FIS1 // bit 1
8467 #define G1FIS2 COG1FISbits.G1FIS2 // bit 2
8468 #define G1FIS3 COG1FISbits.G1FIS3 // bit 3
8469 #define G1FIS4 COG1FISbits.G1FIS4 // bit 4
8470 #define G1FIS5 COG1FISbits.G1FIS5 // bit 5
8471 #define G1FIS6 COG1FISbits.G1FIS6 // bit 6
8472 #define G1FIS7 COG1FISbits.G1FIS7 // bit 7
8474 #define G1FSIM0 COG1FSIMbits.G1FSIM0 // bit 0
8475 #define G1FSIM1 COG1FSIMbits.G1FSIM1 // bit 1
8476 #define G1FSIM2 COG1FSIMbits.G1FSIM2 // bit 2
8477 #define G1FSIM3 COG1FSIMbits.G1FSIM3 // bit 3
8478 #define G1FSIM4 COG1FSIMbits.G1FSIM4 // bit 4
8479 #define G1FSIM5 COG1FSIMbits.G1FSIM5 // bit 5
8480 #define G1FSIM6 COG1FSIMbits.G1FSIM6 // bit 6
8481 #define G1FSIM7 COG1FSIMbits.G1FSIM7 // bit 7
8483 #define G1PHF0 COG1PHFbits.G1PHF0 // bit 0
8484 #define G1PHF1 COG1PHFbits.G1PHF1 // bit 1
8485 #define G1PHF2 COG1PHFbits.G1PHF2 // bit 2
8486 #define G1PHF3 COG1PHFbits.G1PHF3 // bit 3
8487 #define G1PHF4 COG1PHFbits.G1PHF4 // bit 4
8488 #define G1PHF5 COG1PHFbits.G1PHF5 // bit 5
8490 #define G1PHR0 COG1PHRbits.G1PHR0 // bit 0
8491 #define G1PHR1 COG1PHRbits.G1PHR1 // bit 1
8492 #define G1PHR2 COG1PHRbits.G1PHR2 // bit 2
8493 #define G1PHR3 COG1PHRbits.G1PHR3 // bit 3
8494 #define G1PHR4 COG1PHRbits.G1PHR4 // bit 4
8495 #define G1PHR5 COG1PHRbits.G1PHR5 // bit 5
8497 #define G1RIS0 COG1RISbits.G1RIS0 // bit 0
8498 #define G1RIS1 COG1RISbits.G1RIS1 // bit 1
8499 #define G1RIS2 COG1RISbits.G1RIS2 // bit 2
8500 #define G1RIS3 COG1RISbits.G1RIS3 // bit 3
8501 #define G1RIS4 COG1RISbits.G1RIS4 // bit 4
8502 #define G1RIS5 COG1RISbits.G1RIS5 // bit 5
8503 #define G1RIS6 COG1RISbits.G1RIS6 // bit 6
8504 #define G1RIS7 COG1RISbits.G1RIS7 // bit 7
8506 #define G1RSIM0 COG1RSIMbits.G1RSIM0 // bit 0
8507 #define G1RSIM1 COG1RSIMbits.G1RSIM1 // bit 1
8508 #define G1RSIM2 COG1RSIMbits.G1RSIM2 // bit 2
8509 #define G1RSIM3 COG1RSIMbits.G1RSIM3 // bit 3
8510 #define G1RSIM4 COG1RSIMbits.G1RSIM4 // bit 4
8511 #define G1RSIM5 COG1RSIMbits.G1RSIM5 // bit 5
8512 #define G1RSIM6 COG1RSIMbits.G1RSIM6 // bit 6
8513 #define G1RSIM7 COG1RSIMbits.G1RSIM7 // bit 7
8515 #define G1STRA COG1STRbits.G1STRA // bit 0
8516 #define G1STRB COG1STRbits.G1STRB // bit 1
8517 #define G1STRC COG1STRbits.G1STRC // bit 2
8518 #define G1STRD COG1STRbits.G1STRD // bit 3
8519 #define G1SDATA COG1STRbits.G1SDATA // bit 4
8520 #define G1SDATB COG1STRbits.G1SDATB // bit 5
8521 #define G1SDATC COG1STRbits.G1SDATC // bit 6
8522 #define G1SDATD COG1STRbits.G1SDATD // bit 7
8524 #define DAC1NSS DAC1CON0bits.DAC1NSS // bit 0, shadows bit in DAC1CON0bits
8525 #define DACNSS DAC1CON0bits.DACNSS // bit 0, shadows bit in DAC1CON0bits
8526 #define DAC1PSS0 DAC1CON0bits.DAC1PSS0 // bit 2, shadows bit in DAC1CON0bits
8527 #define DACPSS0 DAC1CON0bits.DACPSS0 // bit 2, shadows bit in DAC1CON0bits
8528 #define DAC1PSS1 DAC1CON0bits.DAC1PSS1 // bit 3, shadows bit in DAC1CON0bits
8529 #define DACPSS1 DAC1CON0bits.DACPSS1 // bit 3, shadows bit in DAC1CON0bits
8530 #define DAC1OE2 DAC1CON0bits.DAC1OE2 // bit 4, shadows bit in DAC1CON0bits
8531 #define DACOE0 DAC1CON0bits.DACOE0 // bit 4, shadows bit in DAC1CON0bits
8532 #define DAC1OE1 DAC1CON0bits.DAC1OE1 // bit 5, shadows bit in DAC1CON0bits
8533 #define DACOE1 DAC1CON0bits.DACOE1 // bit 5, shadows bit in DAC1CON0bits
8534 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7, shadows bit in DAC1CON0bits
8535 #define DACEN DAC1CON0bits.DACEN // bit 7, shadows bit in DAC1CON0bits
8537 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0, shadows bit in DAC1CON1bits
8538 #define DACR0 DAC1CON1bits.DACR0 // bit 0, shadows bit in DAC1CON1bits
8539 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1, shadows bit in DAC1CON1bits
8540 #define DACR1 DAC1CON1bits.DACR1 // bit 1, shadows bit in DAC1CON1bits
8541 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2, shadows bit in DAC1CON1bits
8542 #define DACR2 DAC1CON1bits.DACR2 // bit 2, shadows bit in DAC1CON1bits
8543 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3, shadows bit in DAC1CON1bits
8544 #define DACR3 DAC1CON1bits.DACR3 // bit 3, shadows bit in DAC1CON1bits
8545 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4, shadows bit in DAC1CON1bits
8546 #define DACR4 DAC1CON1bits.DACR4 // bit 4, shadows bit in DAC1CON1bits
8547 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5, shadows bit in DAC1CON1bits
8548 #define DACR5 DAC1CON1bits.DACR5 // bit 5, shadows bit in DAC1CON1bits
8549 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6, shadows bit in DAC1CON1bits
8550 #define DACR6 DAC1CON1bits.DACR6 // bit 6, shadows bit in DAC1CON1bits
8551 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7, shadows bit in DAC1CON1bits
8552 #define DACR7 DAC1CON1bits.DACR7 // bit 7, shadows bit in DAC1CON1bits
8554 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
8555 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
8556 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
8557 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
8558 #define TSRNG FVRCONbits.TSRNG // bit 4
8559 #define TSEN FVRCONbits.TSEN // bit 5
8560 #define FVRRDY FVRCONbits.FVRRDY // bit 6
8561 #define FVREN FVRCONbits.FVREN // bit 7
8563 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
8564 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
8565 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
8566 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
8567 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
8568 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
8569 #define INLVLA6 INLVLAbits.INLVLA6 // bit 6
8570 #define INLVLA7 INLVLAbits.INLVLA7 // bit 7
8572 #define INLVLB0 INLVLBbits.INLVLB0 // bit 0
8573 #define INLVLB1 INLVLBbits.INLVLB1 // bit 1
8574 #define INLVLB2 INLVLBbits.INLVLB2 // bit 2
8575 #define INLVLB3 INLVLBbits.INLVLB3 // bit 3
8576 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
8577 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
8578 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
8579 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
8581 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
8582 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
8583 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
8584 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
8585 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
8586 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
8587 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
8588 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
8590 #define INLVLE3 INLVLEbits.INLVLE3 // bit 3
8592 #define IOCIF INTCONbits.IOCIF // bit 0
8593 #define INTF INTCONbits.INTF // bit 1
8594 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
8595 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
8596 #define IOCIE INTCONbits.IOCIE // bit 3
8597 #define INTE INTCONbits.INTE // bit 4
8598 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
8599 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
8600 #define PEIE INTCONbits.PEIE // bit 6
8601 #define GIE INTCONbits.GIE // bit 7
8603 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
8604 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
8605 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
8606 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
8607 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
8608 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
8609 #define IOCAF6 IOCAFbits.IOCAF6 // bit 6
8610 #define IOCAF7 IOCAFbits.IOCAF7 // bit 7
8612 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
8613 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
8614 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
8615 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
8616 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
8617 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
8618 #define IOCAN6 IOCANbits.IOCAN6 // bit 6
8619 #define IOCAN7 IOCANbits.IOCAN7 // bit 7
8621 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
8622 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
8623 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
8624 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
8625 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
8626 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
8627 #define IOCAP6 IOCAPbits.IOCAP6 // bit 6
8628 #define IOCAP7 IOCAPbits.IOCAP7 // bit 7
8630 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
8631 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
8632 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
8633 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
8634 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
8635 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
8636 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
8637 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
8639 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
8640 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
8641 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
8642 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
8643 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
8644 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
8645 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
8646 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
8648 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
8649 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
8650 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
8651 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
8652 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
8653 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
8654 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
8655 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
8657 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
8658 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
8659 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
8660 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
8661 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
8662 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
8663 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
8664 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
8666 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
8667 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
8668 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
8669 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
8670 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
8671 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
8672 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
8673 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
8675 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
8676 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
8677 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
8678 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
8679 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
8680 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
8681 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
8682 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
8684 #define IOCEF3 IOCEFbits.IOCEF3 // bit 3
8686 #define IOCEN3 IOCENbits.IOCEN3 // bit 3
8688 #define IOCEP3 IOCEPbits.IOCEP3 // bit 3
8690 #define LATA0 LATAbits.LATA0 // bit 0
8691 #define LATA1 LATAbits.LATA1 // bit 1
8692 #define LATA2 LATAbits.LATA2 // bit 2
8693 #define LATA3 LATAbits.LATA3 // bit 3
8694 #define LATA4 LATAbits.LATA4 // bit 4
8695 #define LATA5 LATAbits.LATA5 // bit 5
8696 #define LATA6 LATAbits.LATA6 // bit 6
8697 #define LATA7 LATAbits.LATA7 // bit 7
8699 #define LATB0 LATBbits.LATB0 // bit 0
8700 #define LATB1 LATBbits.LATB1 // bit 1
8701 #define LATB2 LATBbits.LATB2 // bit 2
8702 #define LATB3 LATBbits.LATB3 // bit 3
8703 #define LATB4 LATBbits.LATB4 // bit 4
8704 #define LATB5 LATBbits.LATB5 // bit 5
8705 #define LATB6 LATBbits.LATB6 // bit 6
8706 #define LATB7 LATBbits.LATB7 // bit 7
8708 #define LATC0 LATCbits.LATC0 // bit 0
8709 #define LATC1 LATCbits.LATC1 // bit 1
8710 #define LATC2 LATCbits.LATC2 // bit 2
8711 #define LATC3 LATCbits.LATC3 // bit 3
8712 #define LATC4 LATCbits.LATC4 // bit 4
8713 #define LATC5 LATCbits.LATC5 // bit 5
8714 #define LATC6 LATCbits.LATC6 // bit 6
8715 #define LATC7 LATCbits.LATC7 // bit 7
8717 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
8718 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
8719 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
8720 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
8721 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
8722 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
8723 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
8724 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
8726 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
8727 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
8728 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
8729 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
8730 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
8731 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
8732 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
8733 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
8735 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
8736 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
8737 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
8738 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
8740 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
8741 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
8742 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
8743 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
8744 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
8746 #define N1PFM NCO1CONbits.N1PFM // bit 0
8747 #define N1POL NCO1CONbits.N1POL // bit 4
8748 #define N1OUT NCO1CONbits.N1OUT // bit 5
8749 #define N1EN NCO1CONbits.N1EN // bit 7
8751 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
8752 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
8753 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
8754 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
8755 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
8756 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
8757 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
8758 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
8760 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
8761 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
8762 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
8763 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
8764 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
8765 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
8766 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
8767 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
8769 #define NCO1INC16 NCO1INCUbits.NCO1INC16 // bit 0
8770 #define NCO1INC17 NCO1INCUbits.NCO1INC17 // bit 1
8771 #define NCO1INC18 NCO1INCUbits.NCO1INC18 // bit 2
8772 #define NCO1INC19 NCO1INCUbits.NCO1INC19 // bit 3
8774 #define ODA0 ODCONAbits.ODA0 // bit 0
8775 #define ODA1 ODCONAbits.ODA1 // bit 1
8776 #define ODA2 ODCONAbits.ODA2 // bit 2
8777 #define ODA3 ODCONAbits.ODA3 // bit 3
8778 #define ODA4 ODCONAbits.ODA4 // bit 4
8779 #define ODA5 ODCONAbits.ODA5 // bit 5
8780 #define ODA6 ODCONAbits.ODA6 // bit 6
8781 #define ODA7 ODCONAbits.ODA7 // bit 7
8783 #define ODB0 ODCONBbits.ODB0 // bit 0
8784 #define ODB1 ODCONBbits.ODB1 // bit 1
8785 #define ODB2 ODCONBbits.ODB2 // bit 2
8786 #define ODB3 ODCONBbits.ODB3 // bit 3
8787 #define ODB4 ODCONBbits.ODB4 // bit 4
8788 #define ODB5 ODCONBbits.ODB5 // bit 5
8789 #define ODB6 ODCONBbits.ODB6 // bit 6
8790 #define ODB7 ODCONBbits.ODB7 // bit 7
8792 #define ODC0 ODCONCbits.ODC0 // bit 0
8793 #define ODC1 ODCONCbits.ODC1 // bit 1
8794 #define ODC2 ODCONCbits.ODC2 // bit 2
8795 #define ODC3 ODCONCbits.ODC3 // bit 3
8796 #define ODC4 ODCONCbits.ODC4 // bit 4
8797 #define ODC5 ODCONCbits.ODC5 // bit 5
8798 #define ODC6 ODCONCbits.ODC6 // bit 6
8799 #define ODC7 ODCONCbits.ODC7 // bit 7
8801 #define OPA1PCH0 OPA1CONbits.OPA1PCH0 // bit 0
8802 #define OPA1PCH1 OPA1CONbits.OPA1PCH1 // bit 1
8803 #define OPA1UG OPA1CONbits.OPA1UG // bit 4
8804 #define OPA1SP OPA1CONbits.OPA1SP // bit 6
8805 #define OPA1EN OPA1CONbits.OPA1EN // bit 7
8807 #define OPA2PCH0 OPA2CONbits.OPA2PCH0 // bit 0
8808 #define OPA2PCH1 OPA2CONbits.OPA2PCH1 // bit 1
8809 #define OPA2UG OPA2CONbits.OPA2UG // bit 4
8810 #define OPA2SP OPA2CONbits.OPA2SP // bit 6
8811 #define OPA2EN OPA2CONbits.OPA2EN // bit 7
8813 #define PS0 OPTION_REGbits.PS0 // bit 0
8814 #define PS1 OPTION_REGbits.PS1 // bit 1
8815 #define PS2 OPTION_REGbits.PS2 // bit 2
8816 #define PSA OPTION_REGbits.PSA // bit 3
8817 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
8818 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
8819 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
8820 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
8821 #define INTEDG OPTION_REGbits.INTEDG // bit 6
8822 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
8824 #define SCS0 OSCCONbits.SCS0 // bit 0
8825 #define SCS1 OSCCONbits.SCS1 // bit 1
8826 #define IRCF0 OSCCONbits.IRCF0 // bit 3
8827 #define IRCF1 OSCCONbits.IRCF1 // bit 4
8828 #define IRCF2 OSCCONbits.IRCF2 // bit 5
8829 #define IRCF3 OSCCONbits.IRCF3 // bit 6
8830 #define SPLLEN OSCCONbits.SPLLEN // bit 7
8832 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
8833 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
8834 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
8835 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
8836 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
8837 #define OSTS OSCSTATbits.OSTS // bit 5
8838 #define PLLR OSCSTATbits.PLLR // bit 6
8839 #define SOSCR OSCSTATbits.SOSCR // bit 7
8841 #define TUN0 OSCTUNEbits.TUN0 // bit 0
8842 #define TUN1 OSCTUNEbits.TUN1 // bit 1
8843 #define TUN2 OSCTUNEbits.TUN2 // bit 2
8844 #define TUN3 OSCTUNEbits.TUN3 // bit 3
8845 #define TUN4 OSCTUNEbits.TUN4 // bit 4
8846 #define TUN5 OSCTUNEbits.TUN5 // bit 5
8848 #define NOT_BOR PCONbits.NOT_BOR // bit 0
8849 #define NOT_POR PCONbits.NOT_POR // bit 1
8850 #define NOT_RI PCONbits.NOT_RI // bit 2
8851 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
8852 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
8853 #define STKUNF PCONbits.STKUNF // bit 6
8854 #define STKOVF PCONbits.STKOVF // bit 7
8856 #define TMR1IE PIE1bits.TMR1IE // bit 0
8857 #define TMR2IE PIE1bits.TMR2IE // bit 1
8858 #define CCP1IE PIE1bits.CCP1IE // bit 2
8859 #define SSP1IE PIE1bits.SSP1IE // bit 3
8860 #define TXIE PIE1bits.TXIE // bit 4
8861 #define RCIE PIE1bits.RCIE // bit 5
8862 #define ADIE PIE1bits.ADIE // bit 6
8863 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
8865 #define CCP2IE PIE2bits.CCP2IE // bit 0
8866 #define TMR4IE PIE2bits.TMR4IE // bit 1
8867 #define TMR6IE PIE2bits.TMR6IE // bit 2
8868 #define BCL1IE PIE2bits.BCL1IE // bit 3
8869 #define C1IE PIE2bits.C1IE // bit 5
8870 #define C2IE PIE2bits.C2IE // bit 6
8871 #define OSFIE PIE2bits.OSFIE // bit 7
8873 #define CLC1IE PIE3bits.CLC1IE // bit 0
8874 #define CLC2IE PIE3bits.CLC2IE // bit 1
8875 #define CLC3IE PIE3bits.CLC3IE // bit 2
8876 #define CLC4IE PIE3bits.CLC4IE // bit 3
8877 #define ZCDIE PIE3bits.ZCDIE // bit 4
8878 #define COGIE PIE3bits.COGIE // bit 5
8879 #define NCOIE PIE3bits.NCOIE // bit 6
8881 #define TMR1IF PIR1bits.TMR1IF // bit 0
8882 #define TMR2IF PIR1bits.TMR2IF // bit 1
8883 #define CCP1IF PIR1bits.CCP1IF // bit 2
8884 #define SSP1IF PIR1bits.SSP1IF // bit 3
8885 #define TXIF PIR1bits.TXIF // bit 4
8886 #define RCIF PIR1bits.RCIF // bit 5
8887 #define ADIF PIR1bits.ADIF // bit 6
8888 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
8890 #define CCP2IF PIR2bits.CCP2IF // bit 0
8891 #define TMR4IF PIR2bits.TMR4IF // bit 1
8892 #define TMR6IF PIR2bits.TMR6IF // bit 2
8893 #define BCL1IF PIR2bits.BCL1IF // bit 3
8894 #define C1IF PIR2bits.C1IF // bit 5
8895 #define C2IF PIR2bits.C2IF // bit 6
8896 #define OSFIF PIR2bits.OSFIF // bit 7
8898 #define CLC1IF PIR3bits.CLC1IF // bit 0
8899 #define CLC2IF PIR3bits.CLC2IF // bit 1
8900 #define CLC3IF PIR3bits.CLC3IF // bit 2
8901 #define CLC4IF PIR3bits.CLC4IF // bit 3
8902 #define ZCDIF PIR3bits.ZCDIF // bit 4
8903 #define COGIF PIR3bits.COGIF // bit 5
8904 #define NCOIF PIR3bits.NCOIF // bit 6
8906 #define RD PMCON1bits.RD // bit 0
8907 #define WR PMCON1bits.WR // bit 1
8908 #define WREN PMCON1bits.WREN // bit 2
8909 #define WRERR PMCON1bits.WRERR // bit 3
8910 #define FREE PMCON1bits.FREE // bit 4
8911 #define LWLO PMCON1bits.LWLO // bit 5
8912 #define CFGS PMCON1bits.CFGS // bit 6
8914 #define RA0 PORTAbits.RA0 // bit 0
8915 #define RA1 PORTAbits.RA1 // bit 1
8916 #define RA2 PORTAbits.RA2 // bit 2
8917 #define RA3 PORTAbits.RA3 // bit 3
8918 #define RA4 PORTAbits.RA4 // bit 4
8919 #define RA5 PORTAbits.RA5 // bit 5
8920 #define RA6 PORTAbits.RA6 // bit 6
8921 #define RA7 PORTAbits.RA7 // bit 7
8923 #define RB0 PORTBbits.RB0 // bit 0
8924 #define RB1 PORTBbits.RB1 // bit 1
8925 #define RB2 PORTBbits.RB2 // bit 2
8926 #define RB3 PORTBbits.RB3 // bit 3
8927 #define RB4 PORTBbits.RB4 // bit 4
8928 #define RB5 PORTBbits.RB5 // bit 5
8929 #define RB6 PORTBbits.RB6 // bit 6
8930 #define RB7 PORTBbits.RB7 // bit 7
8932 #define RC0 PORTCbits.RC0 // bit 0
8933 #define RC1 PORTCbits.RC1 // bit 1
8934 #define RC2 PORTCbits.RC2 // bit 2
8935 #define RC3 PORTCbits.RC3 // bit 3
8936 #define RC4 PORTCbits.RC4 // bit 4
8937 #define RC5 PORTCbits.RC5 // bit 5
8938 #define RC6 PORTCbits.RC6 // bit 6
8939 #define RC7 PORTCbits.RC7 // bit 7
8941 #define RE3 PORTEbits.RE3 // bit 3
8943 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
8945 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
8946 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
8947 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
8949 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
8950 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
8951 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
8952 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
8953 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
8954 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
8955 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
8956 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
8958 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
8959 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
8961 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
8962 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
8963 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
8965 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
8966 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
8967 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
8968 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
8969 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
8970 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
8971 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
8972 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
8974 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
8975 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
8977 #define RX9D RC1STAbits.RX9D // bit 0
8978 #define OERR RC1STAbits.OERR // bit 1
8979 #define FERR RC1STAbits.FERR // bit 2
8980 #define ADDEN RC1STAbits.ADDEN // bit 3
8981 #define CREN RC1STAbits.CREN // bit 4
8982 #define SREN RC1STAbits.SREN // bit 5
8983 #define RX9 RC1STAbits.RX9 // bit 6
8984 #define SPEN RC1STAbits.SPEN // bit 7
8986 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
8987 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
8988 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
8989 #define SLRA3 SLRCONAbits.SLRA3 // bit 3
8990 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
8991 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
8992 #define SLRA6 SLRCONAbits.SLRA6 // bit 6
8993 #define SLRA7 SLRCONAbits.SLRA7 // bit 7
8995 #define SLRB0 SLRCONBbits.SLRB0 // bit 0
8996 #define SLRB1 SLRCONBbits.SLRB1 // bit 1
8997 #define SLRB2 SLRCONBbits.SLRB2 // bit 2
8998 #define SLRB3 SLRCONBbits.SLRB3 // bit 3
8999 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
9000 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
9001 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
9002 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
9004 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
9005 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
9006 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
9007 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
9008 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
9009 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
9010 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
9011 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
9013 #define SSP1ADD0 SSP1ADDbits.SSP1ADD0 // bit 0, shadows bit in SSP1ADDbits
9014 #define ADD0 SSP1ADDbits.ADD0 // bit 0, shadows bit in SSP1ADDbits
9015 #define SSP1ADD1 SSP1ADDbits.SSP1ADD1 // bit 1, shadows bit in SSP1ADDbits
9016 #define ADD1 SSP1ADDbits.ADD1 // bit 1, shadows bit in SSP1ADDbits
9017 #define SSP1ADD2 SSP1ADDbits.SSP1ADD2 // bit 2, shadows bit in SSP1ADDbits
9018 #define ADD2 SSP1ADDbits.ADD2 // bit 2, shadows bit in SSP1ADDbits
9019 #define SSP1ADD3 SSP1ADDbits.SSP1ADD3 // bit 3, shadows bit in SSP1ADDbits
9020 #define ADD3 SSP1ADDbits.ADD3 // bit 3, shadows bit in SSP1ADDbits
9021 #define SSP1ADD4 SSP1ADDbits.SSP1ADD4 // bit 4, shadows bit in SSP1ADDbits
9022 #define ADD4 SSP1ADDbits.ADD4 // bit 4, shadows bit in SSP1ADDbits
9023 #define SSP1ADD5 SSP1ADDbits.SSP1ADD5 // bit 5, shadows bit in SSP1ADDbits
9024 #define ADD5 SSP1ADDbits.ADD5 // bit 5, shadows bit in SSP1ADDbits
9025 #define SSP1ADD6 SSP1ADDbits.SSP1ADD6 // bit 6, shadows bit in SSP1ADDbits
9026 #define ADD6 SSP1ADDbits.ADD6 // bit 6, shadows bit in SSP1ADDbits
9027 #define SSP1ADD7 SSP1ADDbits.SSP1ADD7 // bit 7, shadows bit in SSP1ADDbits
9028 #define ADD7 SSP1ADDbits.ADD7 // bit 7, shadows bit in SSP1ADDbits
9030 #define SSP1BUF0 SSP1BUFbits.SSP1BUF0 // bit 0, shadows bit in SSP1BUFbits
9031 #define BUF0 SSP1BUFbits.BUF0 // bit 0, shadows bit in SSP1BUFbits
9032 #define SSP1BUF1 SSP1BUFbits.SSP1BUF1 // bit 1, shadows bit in SSP1BUFbits
9033 #define BUF1 SSP1BUFbits.BUF1 // bit 1, shadows bit in SSP1BUFbits
9034 #define SSP1BUF2 SSP1BUFbits.SSP1BUF2 // bit 2, shadows bit in SSP1BUFbits
9035 #define BUF2 SSP1BUFbits.BUF2 // bit 2, shadows bit in SSP1BUFbits
9036 #define SSP1BUF3 SSP1BUFbits.SSP1BUF3 // bit 3, shadows bit in SSP1BUFbits
9037 #define BUF3 SSP1BUFbits.BUF3 // bit 3, shadows bit in SSP1BUFbits
9038 #define SSP1BUF4 SSP1BUFbits.SSP1BUF4 // bit 4, shadows bit in SSP1BUFbits
9039 #define BUF4 SSP1BUFbits.BUF4 // bit 4, shadows bit in SSP1BUFbits
9040 #define SSP1BUF5 SSP1BUFbits.SSP1BUF5 // bit 5, shadows bit in SSP1BUFbits
9041 #define BUF5 SSP1BUFbits.BUF5 // bit 5, shadows bit in SSP1BUFbits
9042 #define SSP1BUF6 SSP1BUFbits.SSP1BUF6 // bit 6, shadows bit in SSP1BUFbits
9043 #define BUF6 SSP1BUFbits.BUF6 // bit 6, shadows bit in SSP1BUFbits
9044 #define SSP1BUF7 SSP1BUFbits.SSP1BUF7 // bit 7, shadows bit in SSP1BUFbits
9045 #define BUF7 SSP1BUFbits.BUF7 // bit 7, shadows bit in SSP1BUFbits
9047 #define SSPM0 SSP1CONbits.SSPM0 // bit 0
9048 #define SSPM1 SSP1CONbits.SSPM1 // bit 1
9049 #define SSPM2 SSP1CONbits.SSPM2 // bit 2
9050 #define SSPM3 SSP1CONbits.SSPM3 // bit 3
9051 #define CKP SSP1CONbits.CKP // bit 4
9052 #define SSPEN SSP1CONbits.SSPEN // bit 5
9053 #define SSPOV SSP1CONbits.SSPOV // bit 6
9054 #define WCOL SSP1CONbits.WCOL // bit 7
9056 #define SEN SSP1CON2bits.SEN // bit 0
9057 #define RSEN SSP1CON2bits.RSEN // bit 1
9058 #define PEN SSP1CON2bits.PEN // bit 2
9059 #define RCEN SSP1CON2bits.RCEN // bit 3
9060 #define ACKEN SSP1CON2bits.ACKEN // bit 4
9061 #define ACKDT SSP1CON2bits.ACKDT // bit 5
9062 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
9063 #define GCEN SSP1CON2bits.GCEN // bit 7
9065 #define DHEN SSP1CON3bits.DHEN // bit 0
9066 #define AHEN SSP1CON3bits.AHEN // bit 1
9067 #define SBCDE SSP1CON3bits.SBCDE // bit 2
9068 #define SDAHT SSP1CON3bits.SDAHT // bit 3
9069 #define BOEN SSP1CON3bits.BOEN // bit 4
9070 #define SCIE SSP1CON3bits.SCIE // bit 5
9071 #define PCIE SSP1CON3bits.PCIE // bit 6
9072 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
9074 #define SSP1MSK0 SSP1MSKbits.SSP1MSK0 // bit 0, shadows bit in SSP1MSKbits
9075 #define MSK0 SSP1MSKbits.MSK0 // bit 0, shadows bit in SSP1MSKbits
9076 #define SSP1MSK1 SSP1MSKbits.SSP1MSK1 // bit 1, shadows bit in SSP1MSKbits
9077 #define MSK1 SSP1MSKbits.MSK1 // bit 1, shadows bit in SSP1MSKbits
9078 #define SSP1MSK2 SSP1MSKbits.SSP1MSK2 // bit 2, shadows bit in SSP1MSKbits
9079 #define MSK2 SSP1MSKbits.MSK2 // bit 2, shadows bit in SSP1MSKbits
9080 #define SSP1MSK3 SSP1MSKbits.SSP1MSK3 // bit 3, shadows bit in SSP1MSKbits
9081 #define MSK3 SSP1MSKbits.MSK3 // bit 3, shadows bit in SSP1MSKbits
9082 #define SSP1MSK4 SSP1MSKbits.SSP1MSK4 // bit 4, shadows bit in SSP1MSKbits
9083 #define MSK4 SSP1MSKbits.MSK4 // bit 4, shadows bit in SSP1MSKbits
9084 #define SSP1MSK5 SSP1MSKbits.SSP1MSK5 // bit 5, shadows bit in SSP1MSKbits
9085 #define MSK5 SSP1MSKbits.MSK5 // bit 5, shadows bit in SSP1MSKbits
9086 #define SSP1MSK6 SSP1MSKbits.SSP1MSK6 // bit 6, shadows bit in SSP1MSKbits
9087 #define MSK6 SSP1MSKbits.MSK6 // bit 6, shadows bit in SSP1MSKbits
9088 #define SSP1MSK7 SSP1MSKbits.SSP1MSK7 // bit 7, shadows bit in SSP1MSKbits
9089 #define MSK7 SSP1MSKbits.MSK7 // bit 7, shadows bit in SSP1MSKbits
9091 #define BF SSP1STATbits.BF // bit 0
9092 #define UA SSP1STATbits.UA // bit 1
9093 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
9094 #define S SSP1STATbits.S // bit 3
9095 #define P SSP1STATbits.P // bit 4
9096 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
9097 #define CKE SSP1STATbits.CKE // bit 6
9098 #define SMP SSP1STATbits.SMP // bit 7
9100 #define C STATUSbits.C // bit 0
9101 #define DC STATUSbits.DC // bit 1
9102 #define Z STATUSbits.Z // bit 2
9103 #define NOT_PD STATUSbits.NOT_PD // bit 3
9104 #define NOT_TO STATUSbits.NOT_TO // bit 4
9106 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
9107 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
9108 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
9110 #define TMR1ON T1CONbits.TMR1ON // bit 0
9111 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
9112 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
9113 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
9114 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
9115 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
9116 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
9118 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
9119 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
9120 #define T1GVAL T1GCONbits.T1GVAL // bit 2
9121 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
9122 #define T1GSPM T1GCONbits.T1GSPM // bit 4
9123 #define T1GTM T1GCONbits.T1GTM // bit 5
9124 #define T1GPOL T1GCONbits.T1GPOL // bit 6
9125 #define TMR1GE T1GCONbits.TMR1GE // bit 7
9127 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
9128 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
9129 #define TMR2ON T2CONbits.TMR2ON // bit 2
9130 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
9131 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
9132 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
9133 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
9135 #define T4CKPS0 T4CONbits.T4CKPS0 // bit 0
9136 #define T4CKPS1 T4CONbits.T4CKPS1 // bit 1
9137 #define TMR4ON T4CONbits.TMR4ON // bit 2
9138 #define T4OUTPS0 T4CONbits.T4OUTPS0 // bit 3
9139 #define T4OUTPS1 T4CONbits.T4OUTPS1 // bit 4
9140 #define T4OUTPS2 T4CONbits.T4OUTPS2 // bit 5
9141 #define T4OUTPS3 T4CONbits.T4OUTPS3 // bit 6
9143 #define T6CKPS0 T6CONbits.T6CKPS0 // bit 0
9144 #define T6CKPS1 T6CONbits.T6CKPS1 // bit 1
9145 #define TMR6ON T6CONbits.TMR6ON // bit 2
9146 #define T6OUTPS0 T6CONbits.T6OUTPS0 // bit 3
9147 #define T6OUTPS1 T6CONbits.T6OUTPS1 // bit 4
9148 #define T6OUTPS2 T6CONbits.T6OUTPS2 // bit 5
9149 #define T6OUTPS3 T6CONbits.T6OUTPS3 // bit 6
9151 #define TRISA0 TRISAbits.TRISA0 // bit 0
9152 #define TRISA1 TRISAbits.TRISA1 // bit 1
9153 #define TRISA2 TRISAbits.TRISA2 // bit 2
9154 #define TRISA3 TRISAbits.TRISA3 // bit 3
9155 #define TRISA4 TRISAbits.TRISA4 // bit 4
9156 #define TRISA5 TRISAbits.TRISA5 // bit 5
9157 #define TRISA6 TRISAbits.TRISA6 // bit 6
9158 #define TRISA7 TRISAbits.TRISA7 // bit 7
9160 #define TRISB0 TRISBbits.TRISB0 // bit 0
9161 #define TRISB1 TRISBbits.TRISB1 // bit 1
9162 #define TRISB2 TRISBbits.TRISB2 // bit 2
9163 #define TRISB3 TRISBbits.TRISB3 // bit 3
9164 #define TRISB4 TRISBbits.TRISB4 // bit 4
9165 #define TRISB5 TRISBbits.TRISB5 // bit 5
9166 #define TRISB6 TRISBbits.TRISB6 // bit 6
9167 #define TRISB7 TRISBbits.TRISB7 // bit 7
9169 #define TRISC0 TRISCbits.TRISC0 // bit 0
9170 #define TRISC1 TRISCbits.TRISC1 // bit 1
9171 #define TRISC2 TRISCbits.TRISC2 // bit 2
9172 #define TRISC3 TRISCbits.TRISC3 // bit 3
9173 #define TRISC4 TRISCbits.TRISC4 // bit 4
9174 #define TRISC5 TRISCbits.TRISC5 // bit 5
9175 #define TRISC6 TRISCbits.TRISC6 // bit 6
9176 #define TRISC7 TRISCbits.TRISC7 // bit 7
9178 #define TRISE3 TRISEbits.TRISE3 // bit 3
9180 #define TX9D TX1STAbits.TX9D // bit 0
9181 #define TRMT TX1STAbits.TRMT // bit 1
9182 #define BRGH TX1STAbits.BRGH // bit 2
9183 #define SENDB TX1STAbits.SENDB // bit 3
9184 #define SYNC TX1STAbits.SYNC // bit 4
9185 #define TXEN TX1STAbits.TXEN // bit 5
9186 #define TX9 TX1STAbits.TX9 // bit 6
9187 #define CSRC TX1STAbits.CSRC // bit 7
9189 #define Reserved VREGCONbits.Reserved // bit 0
9190 #define VREGPM VREGCONbits.VREGPM // bit 1
9192 #define SWDTEN WDTCONbits.SWDTEN // bit 0
9193 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
9194 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
9195 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
9196 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
9197 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
9199 #define WPUA0 WPUAbits.WPUA0 // bit 0
9200 #define WPUA1 WPUAbits.WPUA1 // bit 1
9201 #define WPUA2 WPUAbits.WPUA2 // bit 2
9202 #define WPUA3 WPUAbits.WPUA3 // bit 3
9203 #define WPUA4 WPUAbits.WPUA4 // bit 4
9204 #define WPUA5 WPUAbits.WPUA5 // bit 5
9205 #define WPUA6 WPUAbits.WPUA6 // bit 6
9206 #define WPUA7 WPUAbits.WPUA7 // bit 7
9208 #define WPUB0 WPUBbits.WPUB0 // bit 0
9209 #define WPUB1 WPUBbits.WPUB1 // bit 1
9210 #define WPUB2 WPUBbits.WPUB2 // bit 2
9211 #define WPUB3 WPUBbits.WPUB3 // bit 3
9212 #define WPUB4 WPUBbits.WPUB4 // bit 4
9213 #define WPUB5 WPUBbits.WPUB5 // bit 5
9214 #define WPUB6 WPUBbits.WPUB6 // bit 6
9215 #define WPUB7 WPUBbits.WPUB7 // bit 7
9217 #define WPUC0 WPUCbits.WPUC0 // bit 0
9218 #define WPUC1 WPUCbits.WPUC1 // bit 1
9219 #define WPUC2 WPUCbits.WPUC2 // bit 2
9220 #define WPUC3 WPUCbits.WPUC3 // bit 3
9221 #define WPUC4 WPUCbits.WPUC4 // bit 4
9222 #define WPUC5 WPUCbits.WPUC5 // bit 5
9223 #define WPUC6 WPUCbits.WPUC6 // bit 6
9224 #define WPUC7 WPUCbits.WPUC7 // bit 7
9226 #define WPUE3 WPUEbits.WPUE3 // bit 3
9228 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
9229 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
9230 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
9231 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
9232 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
9234 #endif // #ifndef NO_BIT_DEFINES
9236 #endif // #ifndef __PIC16F1713_H__