2 * This declarations of the PIC16F1719 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:13 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F1719_H__
26 #define __PIC16F1719_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTD_ADDR 0x000F
54 #define PORTE_ADDR 0x0010
55 #define PIR1_ADDR 0x0011
56 #define PIR2_ADDR 0x0012
57 #define PIR3_ADDR 0x0013
58 #define TMR0_ADDR 0x0015
59 #define TMR1_ADDR 0x0016
60 #define TMR1L_ADDR 0x0016
61 #define TMR1H_ADDR 0x0017
62 #define T1CON_ADDR 0x0018
63 #define T1GCON_ADDR 0x0019
64 #define TMR2_ADDR 0x001A
65 #define PR2_ADDR 0x001B
66 #define T2CON_ADDR 0x001C
67 #define TRISA_ADDR 0x008C
68 #define TRISB_ADDR 0x008D
69 #define TRISC_ADDR 0x008E
70 #define TRISD_ADDR 0x008F
71 #define TRISE_ADDR 0x0090
72 #define PIE1_ADDR 0x0091
73 #define PIE2_ADDR 0x0092
74 #define PIE3_ADDR 0x0093
75 #define OPTION_REG_ADDR 0x0095
76 #define PCON_ADDR 0x0096
77 #define WDTCON_ADDR 0x0097
78 #define OSCTUNE_ADDR 0x0098
79 #define OSCCON_ADDR 0x0099
80 #define OSCSTAT_ADDR 0x009A
81 #define ADRES_ADDR 0x009B
82 #define ADRESL_ADDR 0x009B
83 #define ADRESH_ADDR 0x009C
84 #define ADCON0_ADDR 0x009D
85 #define ADCON1_ADDR 0x009E
86 #define ADCON2_ADDR 0x009F
87 #define LATA_ADDR 0x010C
88 #define LATB_ADDR 0x010D
89 #define LATC_ADDR 0x010E
90 #define LATD_ADDR 0x010F
91 #define LATE_ADDR 0x0110
92 #define CM1CON0_ADDR 0x0111
93 #define CM1CON1_ADDR 0x0112
94 #define CM2CON0_ADDR 0x0113
95 #define CM2CON1_ADDR 0x0114
96 #define CMOUT_ADDR 0x0115
97 #define BORCON_ADDR 0x0116
98 #define FVRCON_ADDR 0x0117
99 #define DAC1CON0_ADDR 0x0118
100 #define DAC1CON1_ADDR 0x0119
101 #define DAC2CON0_ADDR 0x011A
102 #define DAC2CON1_ADDR 0x011B
103 #define DAC2REF_ADDR 0x011B
104 #define ZCD1CON_ADDR 0x011C
105 #define ANSELA_ADDR 0x018C
106 #define ANSELB_ADDR 0x018D
107 #define ANSELC_ADDR 0x018E
108 #define ANSELD_ADDR 0x018F
109 #define ANSELE_ADDR 0x0190
110 #define PMADR_ADDR 0x0191
111 #define PMADRL_ADDR 0x0191
112 #define PMADRH_ADDR 0x0192
113 #define PMDAT_ADDR 0x0193
114 #define PMDATL_ADDR 0x0193
115 #define PMDATH_ADDR 0x0194
116 #define PMCON1_ADDR 0x0195
117 #define PMCON2_ADDR 0x0196
118 #define VREGCON_ADDR 0x0197
119 #define RC1REG_ADDR 0x0199
120 #define RCREG_ADDR 0x0199
121 #define RCREG1_ADDR 0x0199
122 #define TX1REG_ADDR 0x019A
123 #define TXREG_ADDR 0x019A
124 #define TXREG1_ADDR 0x019A
125 #define SP1BRG_ADDR 0x019B
126 #define SP1BRGL_ADDR 0x019B
127 #define SPBRG_ADDR 0x019B
128 #define SPBRG1_ADDR 0x019B
129 #define SPBRGL_ADDR 0x019B
130 #define SP1BRGH_ADDR 0x019C
131 #define SPBRGH_ADDR 0x019C
132 #define SPBRGH1_ADDR 0x019C
133 #define RC1STA_ADDR 0x019D
134 #define RCSTA_ADDR 0x019D
135 #define RCSTA1_ADDR 0x019D
136 #define TX1STA_ADDR 0x019E
137 #define TXSTA_ADDR 0x019E
138 #define TXSTA1_ADDR 0x019E
139 #define BAUD1CON_ADDR 0x019F
140 #define BAUDCON_ADDR 0x019F
141 #define BAUDCON1_ADDR 0x019F
142 #define BAUDCTL_ADDR 0x019F
143 #define BAUDCTL1_ADDR 0x019F
144 #define WPUA_ADDR 0x020C
145 #define WPUB_ADDR 0x020D
146 #define WPUC_ADDR 0x020E
147 #define WPUD_ADDR 0x020F
148 #define WPUE_ADDR 0x0210
149 #define SSP1BUF_ADDR 0x0211
150 #define SSPBUF_ADDR 0x0211
151 #define SSP1ADD_ADDR 0x0212
152 #define SSPADD_ADDR 0x0212
153 #define SSP1MSK_ADDR 0x0213
154 #define SSPMSK_ADDR 0x0213
155 #define SSP1STAT_ADDR 0x0214
156 #define SSPSTAT_ADDR 0x0214
157 #define SSP1CON_ADDR 0x0215
158 #define SSP1CON1_ADDR 0x0215
159 #define SSPCON_ADDR 0x0215
160 #define SSPCON1_ADDR 0x0215
161 #define SSP1CON2_ADDR 0x0216
162 #define SSPCON2_ADDR 0x0216
163 #define SSP1CON3_ADDR 0x0217
164 #define SSPCON3_ADDR 0x0217
165 #define ODCONA_ADDR 0x028C
166 #define ODCONB_ADDR 0x028D
167 #define ODCONC_ADDR 0x028E
168 #define ODCOND_ADDR 0x028F
169 #define ODCONE_ADDR 0x0290
170 #define CCPR1_ADDR 0x0291
171 #define CCPR1L_ADDR 0x0291
172 #define CCPR1H_ADDR 0x0292
173 #define CCP1CON_ADDR 0x0293
174 #define ECCP1CON_ADDR 0x0293
175 #define CCPR2_ADDR 0x0298
176 #define CCPR2L_ADDR 0x0298
177 #define CCPR2H_ADDR 0x0299
178 #define CCP2CON_ADDR 0x029A
179 #define ECCP2CON_ADDR 0x029A
180 #define CCPTMRS_ADDR 0x029E
181 #define SLRCONA_ADDR 0x030C
182 #define SLRCONB_ADDR 0x030D
183 #define SLRCONC_ADDR 0x030E
184 #define SLRCOND_ADDR 0x030F
185 #define SLRCONE_ADDR 0x0310
186 #define INLVLA_ADDR 0x038C
187 #define INLVLB_ADDR 0x038D
188 #define INLVLC_ADDR 0x038E
189 #define INLVLD_ADDR 0x038F
190 #define INLVLE_ADDR 0x0390
191 #define IOCAP_ADDR 0x0391
192 #define IOCAN_ADDR 0x0392
193 #define IOCAF_ADDR 0x0393
194 #define IOCBP_ADDR 0x0394
195 #define IOCBN_ADDR 0x0395
196 #define IOCBF_ADDR 0x0396
197 #define IOCCP_ADDR 0x0397
198 #define IOCCN_ADDR 0x0398
199 #define IOCCF_ADDR 0x0399
200 #define IOCEP_ADDR 0x039D
201 #define IOCEN_ADDR 0x039E
202 #define IOCEF_ADDR 0x039F
203 #define TMR4_ADDR 0x0415
204 #define PR4_ADDR 0x0416
205 #define T4CON_ADDR 0x0417
206 #define TMR6_ADDR 0x041C
207 #define PR6_ADDR 0x041D
208 #define T6CON_ADDR 0x041E
209 #define NCO1ACC_ADDR 0x0498
210 #define NCO1ACCL_ADDR 0x0498
211 #define NCO1ACCH_ADDR 0x0499
212 #define NCO1ACCU_ADDR 0x049A
213 #define NCO1INC_ADDR 0x049B
214 #define NCO1INCL_ADDR 0x049B
215 #define NCO1INCH_ADDR 0x049C
216 #define NCO1INCU_ADDR 0x049D
217 #define NCO1CON_ADDR 0x049E
218 #define NCO1CLK_ADDR 0x049F
219 #define OPA1CON_ADDR 0x0511
220 #define OPA2CON_ADDR 0x0515
221 #define PWM3DCL_ADDR 0x0617
222 #define PWM3DCH_ADDR 0x0618
223 #define PWM3CON_ADDR 0x0619
224 #define PWM3CON0_ADDR 0x0619
225 #define PWM4DCL_ADDR 0x061A
226 #define PWM4DCH_ADDR 0x061B
227 #define PWM4CON_ADDR 0x061C
228 #define PWM4CON0_ADDR 0x061C
229 #define COG1PHR_ADDR 0x0691
230 #define COG1PHF_ADDR 0x0692
231 #define COG1BLKR_ADDR 0x0693
232 #define COG1BLKF_ADDR 0x0694
233 #define COG1DBR_ADDR 0x0695
234 #define COG1DBF_ADDR 0x0696
235 #define COG1CON0_ADDR 0x0697
236 #define COG1CON1_ADDR 0x0698
237 #define COG1RIS_ADDR 0x0699
238 #define COG1RSIM_ADDR 0x069A
239 #define COG1FIS_ADDR 0x069B
240 #define COG1FSIM_ADDR 0x069C
241 #define COG1ASD0_ADDR 0x069D
242 #define COG1ASD1_ADDR 0x069E
243 #define COG1STR_ADDR 0x069F
244 #define PPSLOCK_ADDR 0x0E0F
245 #define INTPPS_ADDR 0x0E10
246 #define T0CKIPPS_ADDR 0x0E11
247 #define T1CKIPPS_ADDR 0x0E12
248 #define T1GPPS_ADDR 0x0E13
249 #define CCP1PPS_ADDR 0x0E14
250 #define CCP2PPS_ADDR 0x0E15
251 #define COGINPPS_ADDR 0x0E17
252 #define SSPCLKPPS_ADDR 0x0E20
253 #define SSPDATPPS_ADDR 0x0E21
254 #define SSPSSPPS_ADDR 0x0E22
255 #define RXPPS_ADDR 0x0E24
256 #define CKPPS_ADDR 0x0E25
257 #define CLCIN0PPS_ADDR 0x0E28
258 #define CLCIN1PPS_ADDR 0x0E29
259 #define CLCIN2PPS_ADDR 0x0E2A
260 #define CLCIN3PPS_ADDR 0x0E2B
261 #define RA0PPS_ADDR 0x0E90
262 #define RA1PPS_ADDR 0x0E91
263 #define RA2PPS_ADDR 0x0E92
264 #define RA3PPS_ADDR 0x0E93
265 #define RA4PPS_ADDR 0x0E94
266 #define RA5PPS_ADDR 0x0E95
267 #define RA6PPS_ADDR 0x0E96
268 #define RA7PPS_ADDR 0x0E97
269 #define RB0PPS_ADDR 0x0E98
270 #define RB1PPS_ADDR 0x0E99
271 #define RB2PPS_ADDR 0x0E9A
272 #define RB3PPS_ADDR 0x0E9B
273 #define RB4PPS_ADDR 0x0E9C
274 #define RB5PPS_ADDR 0x0E9D
275 #define RB6PPS_ADDR 0x0E9E
276 #define RB7PPS_ADDR 0x0E9F
277 #define RC0PPS_ADDR 0x0EA0
278 #define RC1PPS_ADDR 0x0EA1
279 #define RC2PPS_ADDR 0x0EA2
280 #define RC3PPS_ADDR 0x0EA3
281 #define RC4PPS_ADDR 0x0EA4
282 #define RC5PPS_ADDR 0x0EA5
283 #define RC6PPS_ADDR 0x0EA6
284 #define RC7PPS_ADDR 0x0EA7
285 #define RD0PPS_ADDR 0x0EA8
286 #define RD1PPS_ADDR 0x0EA9
287 #define RD2PPS_ADDR 0x0EAA
288 #define RD3PPS_ADDR 0x0EAB
289 #define RD4PPS_ADDR 0x0EAC
290 #define RD5PPS_ADDR 0x0EAD
291 #define RD6PPS_ADDR 0x0EAE
292 #define RD7PPS_ADDR 0x0EAF
293 #define RE0PPS_ADDR 0x0EB0
294 #define RE1PPS_ADDR 0x0EB1
295 #define RE2PPS_ADDR 0x0EB2
296 #define CLCDATA_ADDR 0x0F0F
297 #define CLC1CON_ADDR 0x0F10
298 #define CLC1POL_ADDR 0x0F11
299 #define CLC1SEL0_ADDR 0x0F12
300 #define CLC1SEL1_ADDR 0x0F13
301 #define CLC1SEL2_ADDR 0x0F14
302 #define CLC1SEL3_ADDR 0x0F15
303 #define CLC1GLS0_ADDR 0x0F16
304 #define CLC1GLS1_ADDR 0x0F17
305 #define CLC1GLS2_ADDR 0x0F18
306 #define CLC1GLS3_ADDR 0x0F19
307 #define CLC2CON_ADDR 0x0F1A
308 #define CLC2POL_ADDR 0x0F1B
309 #define CLC2SEL0_ADDR 0x0F1C
310 #define CLC2SEL1_ADDR 0x0F1D
311 #define CLC2SEL2_ADDR 0x0F1E
312 #define CLC2SEL3_ADDR 0x0F1F
313 #define CLC2GLS0_ADDR 0x0F20
314 #define CLC2GLS1_ADDR 0x0F21
315 #define CLC2GLS2_ADDR 0x0F22
316 #define CLC2GLS3_ADDR 0x0F23
317 #define CLC3CON_ADDR 0x0F24
318 #define CLC3POL_ADDR 0x0F25
319 #define CLC3SEL0_ADDR 0x0F26
320 #define CLC3SEL1_ADDR 0x0F27
321 #define CLC3SEL2_ADDR 0x0F28
322 #define CLC3SEL3_ADDR 0x0F29
323 #define CLC3GLS0_ADDR 0x0F2A
324 #define CLC3GLS1_ADDR 0x0F2B
325 #define CLC3GLS2_ADDR 0x0F2C
326 #define CLC3GLS3_ADDR 0x0F2D
327 #define CLC4CON_ADDR 0x0F2E
328 #define CLC4POL_ADDR 0x0F2F
329 #define CLC4SEL0_ADDR 0x0F30
330 #define CLC4SEL1_ADDR 0x0F31
331 #define CLC4SEL2_ADDR 0x0F32
332 #define CLC4SEL3_ADDR 0x0F33
333 #define CLC4GLS0_ADDR 0x0F34
334 #define CLC4GLS1_ADDR 0x0F35
335 #define CLC4GLS2_ADDR 0x0F36
336 #define CLC4GLS3_ADDR 0x0F37
337 #define STATUS_SHAD_ADDR 0x0FE4
338 #define WREG_SHAD_ADDR 0x0FE5
339 #define BSR_SHAD_ADDR 0x0FE6
340 #define PCLATH_SHAD_ADDR 0x0FE7
341 #define FSR0L_SHAD_ADDR 0x0FE8
342 #define FSR0H_SHAD_ADDR 0x0FE9
343 #define FSR1L_SHAD_ADDR 0x0FEA
344 #define FSR1H_SHAD_ADDR 0x0FEB
345 #define STKPTR_ADDR 0x0FED
346 #define TOSL_ADDR 0x0FEE
347 #define TOSH_ADDR 0x0FEF
349 #endif // #ifndef NO_ADDR_DEFINES
351 //==============================================================================
353 // Register Definitions
355 //==============================================================================
357 extern __at(0x0000) __sfr INDF0
;
358 extern __at(0x0001) __sfr INDF1
;
359 extern __at(0x0002) __sfr PCL
;
361 //==============================================================================
364 extern __at(0x0003) __sfr STATUS
;
378 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
386 //==============================================================================
388 extern __at(0x0004) __sfr FSR0
;
389 extern __at(0x0004) __sfr FSR0L
;
390 extern __at(0x0005) __sfr FSR0H
;
391 extern __at(0x0006) __sfr FSR1
;
392 extern __at(0x0006) __sfr FSR1L
;
393 extern __at(0x0007) __sfr FSR1H
;
395 //==============================================================================
398 extern __at(0x0008) __sfr BSR
;
421 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
429 //==============================================================================
431 extern __at(0x0009) __sfr WREG
;
432 extern __at(0x000A) __sfr PCLATH
;
434 //==============================================================================
437 extern __at(0x000B) __sfr INTCON
;
466 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
479 //==============================================================================
482 //==============================================================================
485 extern __at(0x000C) __sfr PORTA
;
499 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
510 //==============================================================================
513 //==============================================================================
516 extern __at(0x000D) __sfr PORTB
;
530 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
541 //==============================================================================
544 //==============================================================================
547 extern __at(0x000E) __sfr PORTC
;
561 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
572 //==============================================================================
575 //==============================================================================
578 extern __at(0x000F) __sfr PORTD
;
592 extern __at(0x000F) volatile __PORTDbits_t PORTDbits
;
603 //==============================================================================
606 //==============================================================================
609 extern __at(0x0010) __sfr PORTE
;
632 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
639 //==============================================================================
642 //==============================================================================
645 extern __at(0x0011) __sfr PIR1
;
656 unsigned TMR1GIF
: 1;
659 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
668 #define _TMR1GIF 0x80
670 //==============================================================================
673 //==============================================================================
676 extern __at(0x0012) __sfr PIR2
;
690 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
700 //==============================================================================
703 //==============================================================================
706 extern __at(0x0013) __sfr PIR3
;
720 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
730 //==============================================================================
732 extern __at(0x0015) __sfr TMR0
;
733 extern __at(0x0016) __sfr TMR1
;
734 extern __at(0x0016) __sfr TMR1L
;
735 extern __at(0x0017) __sfr TMR1H
;
737 //==============================================================================
740 extern __at(0x0018) __sfr T1CON
;
748 unsigned NOT_T1SYNC
: 1;
749 unsigned T1OSCEN
: 1;
750 unsigned T1CKPS0
: 1;
751 unsigned T1CKPS1
: 1;
752 unsigned TMR1CS0
: 1;
753 unsigned TMR1CS1
: 1;
770 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
773 #define _NOT_T1SYNC 0x04
774 #define _T1OSCEN 0x08
775 #define _T1CKPS0 0x10
776 #define _T1CKPS1 0x20
777 #define _TMR1CS0 0x40
778 #define _TMR1CS1 0x80
780 //==============================================================================
783 //==============================================================================
786 extern __at(0x0019) __sfr T1GCON
;
795 unsigned T1GGO_NOT_DONE
: 1;
809 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
814 #define _T1GGO_NOT_DONE 0x08
820 //==============================================================================
822 extern __at(0x001A) __sfr TMR2
;
823 extern __at(0x001B) __sfr PR2
;
825 //==============================================================================
828 extern __at(0x001C) __sfr T2CON
;
834 unsigned T2CKPS0
: 1;
835 unsigned T2CKPS1
: 1;
837 unsigned T2OUTPS0
: 1;
838 unsigned T2OUTPS1
: 1;
839 unsigned T2OUTPS2
: 1;
840 unsigned T2OUTPS3
: 1;
853 unsigned T2OUTPS
: 4;
858 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
860 #define _T2CKPS0 0x01
861 #define _T2CKPS1 0x02
863 #define _T2OUTPS0 0x08
864 #define _T2OUTPS1 0x10
865 #define _T2OUTPS2 0x20
866 #define _T2OUTPS3 0x40
868 //==============================================================================
871 //==============================================================================
874 extern __at(0x008C) __sfr TRISA
;
888 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
899 //==============================================================================
902 //==============================================================================
905 extern __at(0x008D) __sfr TRISB
;
919 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
930 //==============================================================================
933 //==============================================================================
936 extern __at(0x008E) __sfr TRISC
;
950 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
961 //==============================================================================
964 //==============================================================================
967 extern __at(0x008F) __sfr TRISD
;
981 extern __at(0x008F) volatile __TRISDbits_t TRISDbits
;
992 //==============================================================================
995 //==============================================================================
998 extern __at(0x0090) __sfr TRISE
;
1004 unsigned TRISE0
: 1;
1005 unsigned TRISE1
: 1;
1006 unsigned TRISE2
: 1;
1007 unsigned TRISE3
: 1;
1021 extern __at(0x0090) volatile __TRISEbits_t TRISEbits
;
1023 #define _TRISE0 0x01
1024 #define _TRISE1 0x02
1025 #define _TRISE2 0x04
1026 #define _TRISE3 0x08
1028 //==============================================================================
1031 //==============================================================================
1034 extern __at(0x0091) __sfr PIE1
;
1038 unsigned TMR1IE
: 1;
1039 unsigned TMR2IE
: 1;
1040 unsigned CCP1IE
: 1;
1041 unsigned SSP1IE
: 1;
1045 unsigned TMR1GIE
: 1;
1048 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
1050 #define _TMR1IE 0x01
1051 #define _TMR2IE 0x02
1052 #define _CCP1IE 0x04
1053 #define _SSP1IE 0x08
1057 #define _TMR1GIE 0x80
1059 //==============================================================================
1062 //==============================================================================
1065 extern __at(0x0092) __sfr PIE2
;
1069 unsigned CCP2IE
: 1;
1070 unsigned TMR4IE
: 1;
1071 unsigned TMR6IE
: 1;
1072 unsigned BCL1IE
: 1;
1079 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
1081 #define _CCP2IE 0x01
1082 #define _TMR4IE 0x02
1083 #define _TMR6IE 0x04
1084 #define _BCL1IE 0x08
1089 //==============================================================================
1092 //==============================================================================
1095 extern __at(0x0093) __sfr PIE3
;
1099 unsigned CLC1IE
: 1;
1100 unsigned CLC2IE
: 1;
1101 unsigned CLC3IE
: 1;
1102 unsigned CLC4IE
: 1;
1109 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1111 #define _CLC1IE 0x01
1112 #define _CLC2IE 0x02
1113 #define _CLC3IE 0x04
1114 #define _CLC4IE 0x08
1119 //==============================================================================
1122 //==============================================================================
1125 extern __at(0x0095) __sfr OPTION_REG
;
1135 unsigned TMR0SE
: 1;
1136 unsigned TMR0CS
: 1;
1137 unsigned INTEDG
: 1;
1138 unsigned NOT_WPUEN
: 1;
1158 } __OPTION_REGbits_t
;
1160 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1166 #define _TMR0SE 0x10
1168 #define _TMR0CS 0x20
1170 #define _INTEDG 0x40
1171 #define _NOT_WPUEN 0x80
1173 //==============================================================================
1176 //==============================================================================
1179 extern __at(0x0096) __sfr PCON
;
1183 unsigned NOT_BOR
: 1;
1184 unsigned NOT_POR
: 1;
1185 unsigned NOT_RI
: 1;
1186 unsigned NOT_RMCLR
: 1;
1187 unsigned NOT_RWDT
: 1;
1189 unsigned STKUNF
: 1;
1190 unsigned STKOVF
: 1;
1193 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1195 #define _NOT_BOR 0x01
1196 #define _NOT_POR 0x02
1197 #define _NOT_RI 0x04
1198 #define _NOT_RMCLR 0x08
1199 #define _NOT_RWDT 0x10
1200 #define _STKUNF 0x40
1201 #define _STKOVF 0x80
1203 //==============================================================================
1206 //==============================================================================
1209 extern __at(0x0097) __sfr WDTCON
;
1215 unsigned SWDTEN
: 1;
1216 unsigned WDTPS0
: 1;
1217 unsigned WDTPS1
: 1;
1218 unsigned WDTPS2
: 1;
1219 unsigned WDTPS3
: 1;
1220 unsigned WDTPS4
: 1;
1233 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1235 #define _SWDTEN 0x01
1236 #define _WDTPS0 0x02
1237 #define _WDTPS1 0x04
1238 #define _WDTPS2 0x08
1239 #define _WDTPS3 0x10
1240 #define _WDTPS4 0x20
1242 //==============================================================================
1245 //==============================================================================
1248 extern __at(0x0098) __sfr OSCTUNE
;
1271 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1280 //==============================================================================
1283 //==============================================================================
1286 extern __at(0x0099) __sfr OSCCON
;
1299 unsigned SPLLEN
: 1;
1316 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1324 #define _SPLLEN 0x80
1326 //==============================================================================
1329 //==============================================================================
1332 extern __at(0x009A) __sfr OSCSTAT
;
1336 unsigned HFIOFS
: 1;
1337 unsigned LFIOFR
: 1;
1338 unsigned MFIOFR
: 1;
1339 unsigned HFIOFL
: 1;
1340 unsigned HFIOFR
: 1;
1346 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1348 #define _HFIOFS 0x01
1349 #define _LFIOFR 0x02
1350 #define _MFIOFR 0x04
1351 #define _HFIOFL 0x08
1352 #define _HFIOFR 0x10
1357 //==============================================================================
1359 extern __at(0x009B) __sfr ADRES
;
1360 extern __at(0x009B) __sfr ADRESL
;
1361 extern __at(0x009C) __sfr ADRESH
;
1363 //==============================================================================
1366 extern __at(0x009D) __sfr ADCON0
;
1373 unsigned GO_NOT_DONE
: 1;
1414 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1417 #define _GO_NOT_DONE 0x02
1426 //==============================================================================
1429 //==============================================================================
1432 extern __at(0x009E) __sfr ADCON1
;
1438 unsigned ADPREF0
: 1;
1439 unsigned ADPREF1
: 1;
1440 unsigned ADNREF
: 1;
1450 unsigned ADPREF
: 2;
1455 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1457 #define _ADPREF0 0x01
1458 #define _ADPREF1 0x02
1459 #define _ADNREF 0x04
1462 //==============================================================================
1465 //==============================================================================
1468 extern __at(0x009F) __sfr ADCON2
;
1478 unsigned TRIGSEL0
: 1;
1479 unsigned TRIGSEL1
: 1;
1480 unsigned TRIGSEL2
: 1;
1481 unsigned TRIGSEL3
: 1;
1487 unsigned TRIGSEL
: 4;
1491 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1493 #define _TRIGSEL0 0x10
1494 #define _TRIGSEL1 0x20
1495 #define _TRIGSEL2 0x40
1496 #define _TRIGSEL3 0x80
1498 //==============================================================================
1501 //==============================================================================
1504 extern __at(0x010C) __sfr LATA
;
1518 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1529 //==============================================================================
1532 //==============================================================================
1535 extern __at(0x010D) __sfr LATB
;
1549 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
1560 //==============================================================================
1563 //==============================================================================
1566 extern __at(0x010E) __sfr LATC
;
1580 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1591 //==============================================================================
1594 //==============================================================================
1597 extern __at(0x010F) __sfr LATD
;
1611 extern __at(0x010F) volatile __LATDbits_t LATDbits
;
1622 //==============================================================================
1625 //==============================================================================
1628 extern __at(0x0110) __sfr LATE
;
1651 extern __at(0x0110) volatile __LATEbits_t LATEbits
;
1657 //==============================================================================
1660 //==============================================================================
1663 extern __at(0x0111) __sfr CM1CON0
;
1667 unsigned C1SYNC
: 1;
1677 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1679 #define _C1SYNC 0x01
1687 //==============================================================================
1690 //==============================================================================
1693 extern __at(0x0112) __sfr CM1CON1
;
1699 unsigned C1NCH0
: 1;
1700 unsigned C1NCH1
: 1;
1701 unsigned C1NCH2
: 1;
1702 unsigned C1PCH0
: 1;
1703 unsigned C1PCH1
: 1;
1704 unsigned C1PCH2
: 1;
1705 unsigned C1INTN
: 1;
1706 unsigned C1INTP
: 1;
1723 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1725 #define _C1NCH0 0x01
1726 #define _C1NCH1 0x02
1727 #define _C1NCH2 0x04
1728 #define _C1PCH0 0x08
1729 #define _C1PCH1 0x10
1730 #define _C1PCH2 0x20
1731 #define _C1INTN 0x40
1732 #define _C1INTP 0x80
1734 //==============================================================================
1737 //==============================================================================
1740 extern __at(0x0113) __sfr CM2CON0
;
1744 unsigned C2SYNC
: 1;
1754 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
1756 #define _C2SYNC 0x01
1764 //==============================================================================
1767 //==============================================================================
1770 extern __at(0x0114) __sfr CM2CON1
;
1776 unsigned C2NCH0
: 1;
1777 unsigned C2NCH1
: 1;
1778 unsigned C2NCH2
: 1;
1779 unsigned C2PCH0
: 1;
1780 unsigned C2PCH1
: 1;
1781 unsigned C2PCH2
: 1;
1782 unsigned C2INTN
: 1;
1783 unsigned C2INTP
: 1;
1800 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
1802 #define _C2NCH0 0x01
1803 #define _C2NCH1 0x02
1804 #define _C2NCH2 0x04
1805 #define _C2PCH0 0x08
1806 #define _C2PCH1 0x10
1807 #define _C2PCH2 0x20
1808 #define _C2INTN 0x40
1809 #define _C2INTP 0x80
1811 //==============================================================================
1814 //==============================================================================
1817 extern __at(0x0115) __sfr CMOUT
;
1821 unsigned MC1OUT
: 1;
1822 unsigned MC2OUT
: 1;
1831 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1833 #define _MC1OUT 0x01
1834 #define _MC2OUT 0x02
1836 //==============================================================================
1839 //==============================================================================
1842 extern __at(0x0116) __sfr BORCON
;
1846 unsigned BORRDY
: 1;
1853 unsigned SBOREN
: 1;
1856 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1858 #define _BORRDY 0x01
1860 #define _SBOREN 0x80
1862 //==============================================================================
1865 //==============================================================================
1868 extern __at(0x0117) __sfr FVRCON
;
1874 unsigned ADFVR0
: 1;
1875 unsigned ADFVR1
: 1;
1876 unsigned CDAFVR0
: 1;
1877 unsigned CDAFVR1
: 1;
1880 unsigned FVRRDY
: 1;
1893 unsigned CDAFVR
: 2;
1898 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1900 #define _ADFVR0 0x01
1901 #define _ADFVR1 0x02
1902 #define _CDAFVR0 0x04
1903 #define _CDAFVR1 0x08
1906 #define _FVRRDY 0x40
1909 //==============================================================================
1912 //==============================================================================
1915 extern __at(0x0118) __sfr DAC1CON0
;
1921 unsigned DAC1NSS
: 1;
1923 unsigned DAC1PSS0
: 1;
1924 unsigned DAC1PSS1
: 1;
1925 unsigned DAC1OE2
: 1;
1926 unsigned DAC1OE1
: 1;
1928 unsigned DAC1EN
: 1;
1933 unsigned DACNSS
: 1;
1935 unsigned DACPSS0
: 1;
1936 unsigned DACPSS1
: 1;
1937 unsigned DACOE0
: 1;
1938 unsigned DACOE1
: 1;
1946 unsigned DAC1PSS
: 2;
1953 unsigned DACPSS
: 2;
1965 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1967 #define _DAC1NSS 0x01
1968 #define _DACNSS 0x01
1969 #define _DAC1PSS0 0x04
1970 #define _DACPSS0 0x04
1971 #define _DAC1PSS1 0x08
1972 #define _DACPSS1 0x08
1973 #define _DAC1OE2 0x10
1974 #define _DACOE0 0x10
1975 #define _DAC1OE1 0x20
1976 #define _DACOE1 0x20
1977 #define _DAC1EN 0x80
1980 //==============================================================================
1983 //==============================================================================
1986 extern __at(0x0119) __sfr DAC1CON1
;
1992 unsigned DAC1R0
: 1;
1993 unsigned DAC1R1
: 1;
1994 unsigned DAC1R2
: 1;
1995 unsigned DAC1R3
: 1;
1996 unsigned DAC1R4
: 1;
1997 unsigned DAC1R5
: 1;
1998 unsigned DAC1R6
: 1;
1999 unsigned DAC1R7
: 1;
2015 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
2017 #define _DAC1R0 0x01
2019 #define _DAC1R1 0x02
2021 #define _DAC1R2 0x04
2023 #define _DAC1R3 0x08
2025 #define _DAC1R4 0x10
2027 #define _DAC1R5 0x20
2029 #define _DAC1R6 0x40
2031 #define _DAC1R7 0x80
2034 //==============================================================================
2037 //==============================================================================
2040 extern __at(0x011A) __sfr DAC2CON0
;
2058 unsigned DACNSS
: 1;
2060 unsigned DACPSS0
: 1;
2061 unsigned DACPSS1
: 1;
2062 unsigned DACOE2
: 1;
2063 unsigned DACOE1
: 1;
2070 unsigned DAC2NSS
: 1;
2072 unsigned DAC2PSS0
: 1;
2073 unsigned DAC2PSS1
: 1;
2074 unsigned DAC2OE2
: 1;
2075 unsigned DAC2OE1
: 1;
2077 unsigned DAC2EN
: 1;
2090 unsigned DAC2PSS
: 2;
2097 unsigned DACPSS
: 2;
2102 extern __at(0x011A) volatile __DAC2CON0bits_t DAC2CON0bits
;
2104 #define _DAC2CON0_NSS 0x01
2105 #define _DAC2CON0_DACNSS 0x01
2106 #define _DAC2CON0_DAC2NSS 0x01
2107 #define _DAC2CON0_PSS0 0x04
2108 #define _DAC2CON0_DACPSS0 0x04
2109 #define _DAC2CON0_DAC2PSS0 0x04
2110 #define _DAC2CON0_PSS1 0x08
2111 #define _DAC2CON0_DACPSS1 0x08
2112 #define _DAC2CON0_DAC2PSS1 0x08
2113 #define _DAC2CON0_OE2 0x10
2114 #define _DAC2CON0_DACOE2 0x10
2115 #define _DAC2CON0_DAC2OE2 0x10
2116 #define _DAC2CON0_OE1 0x20
2117 #define _DAC2CON0_DACOE1 0x20
2118 #define _DAC2CON0_DAC2OE1 0x20
2119 #define _DAC2CON0_EN 0x80
2120 #define _DAC2CON0_DACEN 0x80
2121 #define _DAC2CON0_DAC2EN 0x80
2123 //==============================================================================
2126 //==============================================================================
2129 extern __at(0x011B) __sfr DAC2CON1
;
2152 unsigned DAC2REF5
: 1;
2159 unsigned DAC2R0
: 1;
2160 unsigned DAC2R1
: 1;
2161 unsigned DAC2R2
: 1;
2162 unsigned DAC2R3
: 1;
2163 unsigned DAC2R4
: 1;
2183 unsigned DAC2REF0
: 1;
2184 unsigned DAC2REF1
: 1;
2185 unsigned DAC2REF2
: 1;
2186 unsigned DAC2REF3
: 1;
2187 unsigned DAC2REF4
: 1;
2213 unsigned DAC2REF
: 6;
2224 extern __at(0x011B) volatile __DAC2CON1bits_t DAC2CON1bits
;
2226 #define _DAC2CON1_DACR0 0x01
2227 #define _DAC2CON1_R0 0x01
2228 #define _DAC2CON1_DAC2R0 0x01
2229 #define _DAC2CON1_REF0 0x01
2230 #define _DAC2CON1_DAC2REF0 0x01
2231 #define _DAC2CON1_DACR1 0x02
2232 #define _DAC2CON1_R1 0x02
2233 #define _DAC2CON1_DAC2R1 0x02
2234 #define _DAC2CON1_REF1 0x02
2235 #define _DAC2CON1_DAC2REF1 0x02
2236 #define _DAC2CON1_DACR2 0x04
2237 #define _DAC2CON1_R2 0x04
2238 #define _DAC2CON1_DAC2R2 0x04
2239 #define _DAC2CON1_REF2 0x04
2240 #define _DAC2CON1_DAC2REF2 0x04
2241 #define _DAC2CON1_DACR3 0x08
2242 #define _DAC2CON1_R3 0x08
2243 #define _DAC2CON1_DAC2R3 0x08
2244 #define _DAC2CON1_REF3 0x08
2245 #define _DAC2CON1_DAC2REF3 0x08
2246 #define _DAC2CON1_DACR4 0x10
2247 #define _DAC2CON1_R4 0x10
2248 #define _DAC2CON1_DAC2R4 0x10
2249 #define _DAC2CON1_REF4 0x10
2250 #define _DAC2CON1_DAC2REF4 0x10
2251 #define _DAC2CON1_REF5 0x20
2252 #define _DAC2CON1_DAC2REF5 0x20
2254 //==============================================================================
2257 //==============================================================================
2260 extern __at(0x011B) __sfr DAC2REF
;
2283 unsigned DAC2REF5
: 1;
2290 unsigned DAC2R0
: 1;
2291 unsigned DAC2R1
: 1;
2292 unsigned DAC2R2
: 1;
2293 unsigned DAC2R3
: 1;
2294 unsigned DAC2R4
: 1;
2314 unsigned DAC2REF0
: 1;
2315 unsigned DAC2REF1
: 1;
2316 unsigned DAC2REF2
: 1;
2317 unsigned DAC2REF3
: 1;
2318 unsigned DAC2REF4
: 1;
2350 unsigned DAC2REF
: 6;
2355 extern __at(0x011B) volatile __DAC2REFbits_t DAC2REFbits
;
2357 #define _DAC2REF_DACR0 0x01
2358 #define _DAC2REF_R0 0x01
2359 #define _DAC2REF_DAC2R0 0x01
2360 #define _DAC2REF_REF0 0x01
2361 #define _DAC2REF_DAC2REF0 0x01
2362 #define _DAC2REF_DACR1 0x02
2363 #define _DAC2REF_R1 0x02
2364 #define _DAC2REF_DAC2R1 0x02
2365 #define _DAC2REF_REF1 0x02
2366 #define _DAC2REF_DAC2REF1 0x02
2367 #define _DAC2REF_DACR2 0x04
2368 #define _DAC2REF_R2 0x04
2369 #define _DAC2REF_DAC2R2 0x04
2370 #define _DAC2REF_REF2 0x04
2371 #define _DAC2REF_DAC2REF2 0x04
2372 #define _DAC2REF_DACR3 0x08
2373 #define _DAC2REF_R3 0x08
2374 #define _DAC2REF_DAC2R3 0x08
2375 #define _DAC2REF_REF3 0x08
2376 #define _DAC2REF_DAC2REF3 0x08
2377 #define _DAC2REF_DACR4 0x10
2378 #define _DAC2REF_R4 0x10
2379 #define _DAC2REF_DAC2R4 0x10
2380 #define _DAC2REF_REF4 0x10
2381 #define _DAC2REF_DAC2REF4 0x10
2382 #define _DAC2REF_REF5 0x20
2383 #define _DAC2REF_DAC2REF5 0x20
2385 //==============================================================================
2388 //==============================================================================
2391 extern __at(0x011C) __sfr ZCD1CON
;
2395 unsigned ZCD1INTN
: 1;
2396 unsigned ZCD1INTP
: 1;
2399 unsigned ZCD1POL
: 1;
2400 unsigned ZCD1OUT
: 1;
2402 unsigned ZCD1EN
: 1;
2405 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
2407 #define _ZCD1INTN 0x01
2408 #define _ZCD1INTP 0x02
2409 #define _ZCD1POL 0x10
2410 #define _ZCD1OUT 0x20
2411 #define _ZCD1EN 0x80
2413 //==============================================================================
2416 //==============================================================================
2419 extern __at(0x018C) __sfr ANSELA
;
2442 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
2451 //==============================================================================
2454 //==============================================================================
2457 extern __at(0x018D) __sfr ANSELB
;
2480 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits
;
2489 //==============================================================================
2492 //==============================================================================
2495 extern __at(0x018E) __sfr ANSELC
;
2509 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits
;
2518 //==============================================================================
2521 //==============================================================================
2524 extern __at(0x018F) __sfr ANSELD
;
2538 extern __at(0x018F) volatile __ANSELDbits_t ANSELDbits
;
2549 //==============================================================================
2552 //==============================================================================
2555 extern __at(0x0190) __sfr ANSELE
;
2578 extern __at(0x0190) volatile __ANSELEbits_t ANSELEbits
;
2584 //==============================================================================
2586 extern __at(0x0191) __sfr PMADR
;
2587 extern __at(0x0191) __sfr PMADRL
;
2588 extern __at(0x0192) __sfr PMADRH
;
2589 extern __at(0x0193) __sfr PMDAT
;
2590 extern __at(0x0193) __sfr PMDATL
;
2591 extern __at(0x0194) __sfr PMDATH
;
2593 //==============================================================================
2596 extern __at(0x0195) __sfr PMCON1
;
2610 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
2620 //==============================================================================
2622 extern __at(0x0196) __sfr PMCON2
;
2624 //==============================================================================
2627 extern __at(0x0197) __sfr VREGCON
;
2631 unsigned Reserved
: 1;
2632 unsigned VREGPM
: 1;
2641 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits
;
2643 #define _Reserved 0x01
2644 #define _VREGPM 0x02
2646 //==============================================================================
2648 extern __at(0x0199) __sfr RC1REG
;
2649 extern __at(0x0199) __sfr RCREG
;
2650 extern __at(0x0199) __sfr RCREG1
;
2651 extern __at(0x019A) __sfr TX1REG
;
2652 extern __at(0x019A) __sfr TXREG
;
2653 extern __at(0x019A) __sfr TXREG1
;
2654 extern __at(0x019B) __sfr SP1BRG
;
2655 extern __at(0x019B) __sfr SP1BRGL
;
2656 extern __at(0x019B) __sfr SPBRG
;
2657 extern __at(0x019B) __sfr SPBRG1
;
2658 extern __at(0x019B) __sfr SPBRGL
;
2659 extern __at(0x019C) __sfr SP1BRGH
;
2660 extern __at(0x019C) __sfr SPBRGH
;
2661 extern __at(0x019C) __sfr SPBRGH1
;
2663 //==============================================================================
2666 extern __at(0x019D) __sfr RC1STA
;
2680 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
2691 //==============================================================================
2694 //==============================================================================
2697 extern __at(0x019D) __sfr RCSTA
;
2711 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
2713 #define _RCSTA_RX9D 0x01
2714 #define _RCSTA_OERR 0x02
2715 #define _RCSTA_FERR 0x04
2716 #define _RCSTA_ADDEN 0x08
2717 #define _RCSTA_CREN 0x10
2718 #define _RCSTA_SREN 0x20
2719 #define _RCSTA_RX9 0x40
2720 #define _RCSTA_SPEN 0x80
2722 //==============================================================================
2725 //==============================================================================
2728 extern __at(0x019D) __sfr RCSTA1
;
2742 extern __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits
;
2744 #define _RCSTA1_RX9D 0x01
2745 #define _RCSTA1_OERR 0x02
2746 #define _RCSTA1_FERR 0x04
2747 #define _RCSTA1_ADDEN 0x08
2748 #define _RCSTA1_CREN 0x10
2749 #define _RCSTA1_SREN 0x20
2750 #define _RCSTA1_RX9 0x40
2751 #define _RCSTA1_SPEN 0x80
2753 //==============================================================================
2756 //==============================================================================
2759 extern __at(0x019E) __sfr TX1STA
;
2773 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
2784 //==============================================================================
2787 //==============================================================================
2790 extern __at(0x019E) __sfr TXSTA
;
2804 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
2806 #define _TXSTA_TX9D 0x01
2807 #define _TXSTA_TRMT 0x02
2808 #define _TXSTA_BRGH 0x04
2809 #define _TXSTA_SENDB 0x08
2810 #define _TXSTA_SYNC 0x10
2811 #define _TXSTA_TXEN 0x20
2812 #define _TXSTA_TX9 0x40
2813 #define _TXSTA_CSRC 0x80
2815 //==============================================================================
2818 //==============================================================================
2821 extern __at(0x019E) __sfr TXSTA1
;
2835 extern __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits
;
2837 #define _TXSTA1_TX9D 0x01
2838 #define _TXSTA1_TRMT 0x02
2839 #define _TXSTA1_BRGH 0x04
2840 #define _TXSTA1_SENDB 0x08
2841 #define _TXSTA1_SYNC 0x10
2842 #define _TXSTA1_TXEN 0x20
2843 #define _TXSTA1_TX9 0x40
2844 #define _TXSTA1_CSRC 0x80
2846 //==============================================================================
2849 //==============================================================================
2852 extern __at(0x019F) __sfr BAUD1CON
;
2863 unsigned ABDOVF
: 1;
2866 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2873 #define _ABDOVF 0x80
2875 //==============================================================================
2878 //==============================================================================
2881 extern __at(0x019F) __sfr BAUDCON
;
2892 unsigned ABDOVF
: 1;
2895 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits
;
2897 #define _BAUDCON_ABDEN 0x01
2898 #define _BAUDCON_WUE 0x02
2899 #define _BAUDCON_BRG16 0x08
2900 #define _BAUDCON_SCKP 0x10
2901 #define _BAUDCON_RCIDL 0x40
2902 #define _BAUDCON_ABDOVF 0x80
2904 //==============================================================================
2907 //==============================================================================
2910 extern __at(0x019F) __sfr BAUDCON1
;
2921 unsigned ABDOVF
: 1;
2924 extern __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits
;
2926 #define _BAUDCON1_ABDEN 0x01
2927 #define _BAUDCON1_WUE 0x02
2928 #define _BAUDCON1_BRG16 0x08
2929 #define _BAUDCON1_SCKP 0x10
2930 #define _BAUDCON1_RCIDL 0x40
2931 #define _BAUDCON1_ABDOVF 0x80
2933 //==============================================================================
2936 //==============================================================================
2939 extern __at(0x019F) __sfr BAUDCTL
;
2950 unsigned ABDOVF
: 1;
2953 extern __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits
;
2955 #define _BAUDCTL_ABDEN 0x01
2956 #define _BAUDCTL_WUE 0x02
2957 #define _BAUDCTL_BRG16 0x08
2958 #define _BAUDCTL_SCKP 0x10
2959 #define _BAUDCTL_RCIDL 0x40
2960 #define _BAUDCTL_ABDOVF 0x80
2962 //==============================================================================
2965 //==============================================================================
2968 extern __at(0x019F) __sfr BAUDCTL1
;
2979 unsigned ABDOVF
: 1;
2982 extern __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
2984 #define _BAUDCTL1_ABDEN 0x01
2985 #define _BAUDCTL1_WUE 0x02
2986 #define _BAUDCTL1_BRG16 0x08
2987 #define _BAUDCTL1_SCKP 0x10
2988 #define _BAUDCTL1_RCIDL 0x40
2989 #define _BAUDCTL1_ABDOVF 0x80
2991 //==============================================================================
2994 //==============================================================================
2997 extern __at(0x020C) __sfr WPUA
;
3011 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
3022 //==============================================================================
3025 //==============================================================================
3028 extern __at(0x020D) __sfr WPUB
;
3042 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
3053 //==============================================================================
3056 //==============================================================================
3059 extern __at(0x020E) __sfr WPUC
;
3073 extern __at(0x020E) volatile __WPUCbits_t WPUCbits
;
3084 //==============================================================================
3087 //==============================================================================
3090 extern __at(0x020F) __sfr WPUD
;
3104 extern __at(0x020F) volatile __WPUDbits_t WPUDbits
;
3115 //==============================================================================
3118 //==============================================================================
3121 extern __at(0x0210) __sfr WPUE
;
3144 extern __at(0x0210) volatile __WPUEbits_t WPUEbits
;
3151 //==============================================================================
3154 //==============================================================================
3157 extern __at(0x0211) __sfr SSP1BUF
;
3163 unsigned SSP1BUF0
: 1;
3164 unsigned SSP1BUF1
: 1;
3165 unsigned SSP1BUF2
: 1;
3166 unsigned SSP1BUF3
: 1;
3167 unsigned SSP1BUF4
: 1;
3168 unsigned SSP1BUF5
: 1;
3169 unsigned SSP1BUF6
: 1;
3170 unsigned SSP1BUF7
: 1;
3186 extern __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits
;
3188 #define _SSP1BUF0 0x01
3190 #define _SSP1BUF1 0x02
3192 #define _SSP1BUF2 0x04
3194 #define _SSP1BUF3 0x08
3196 #define _SSP1BUF4 0x10
3198 #define _SSP1BUF5 0x20
3200 #define _SSP1BUF6 0x40
3202 #define _SSP1BUF7 0x80
3205 //==============================================================================
3208 //==============================================================================
3211 extern __at(0x0211) __sfr SSPBUF
;
3217 unsigned SSP1BUF0
: 1;
3218 unsigned SSP1BUF1
: 1;
3219 unsigned SSP1BUF2
: 1;
3220 unsigned SSP1BUF3
: 1;
3221 unsigned SSP1BUF4
: 1;
3222 unsigned SSP1BUF5
: 1;
3223 unsigned SSP1BUF6
: 1;
3224 unsigned SSP1BUF7
: 1;
3240 extern __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits
;
3242 #define _SSPBUF_SSP1BUF0 0x01
3243 #define _SSPBUF_BUF0 0x01
3244 #define _SSPBUF_SSP1BUF1 0x02
3245 #define _SSPBUF_BUF1 0x02
3246 #define _SSPBUF_SSP1BUF2 0x04
3247 #define _SSPBUF_BUF2 0x04
3248 #define _SSPBUF_SSP1BUF3 0x08
3249 #define _SSPBUF_BUF3 0x08
3250 #define _SSPBUF_SSP1BUF4 0x10
3251 #define _SSPBUF_BUF4 0x10
3252 #define _SSPBUF_SSP1BUF5 0x20
3253 #define _SSPBUF_BUF5 0x20
3254 #define _SSPBUF_SSP1BUF6 0x40
3255 #define _SSPBUF_BUF6 0x40
3256 #define _SSPBUF_SSP1BUF7 0x80
3257 #define _SSPBUF_BUF7 0x80
3259 //==============================================================================
3262 //==============================================================================
3265 extern __at(0x0212) __sfr SSP1ADD
;
3271 unsigned SSP1ADD0
: 1;
3272 unsigned SSP1ADD1
: 1;
3273 unsigned SSP1ADD2
: 1;
3274 unsigned SSP1ADD3
: 1;
3275 unsigned SSP1ADD4
: 1;
3276 unsigned SSP1ADD5
: 1;
3277 unsigned SSP1ADD6
: 1;
3278 unsigned SSP1ADD7
: 1;
3294 extern __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits
;
3296 #define _SSP1ADD0 0x01
3298 #define _SSP1ADD1 0x02
3300 #define _SSP1ADD2 0x04
3302 #define _SSP1ADD3 0x08
3304 #define _SSP1ADD4 0x10
3306 #define _SSP1ADD5 0x20
3308 #define _SSP1ADD6 0x40
3310 #define _SSP1ADD7 0x80
3313 //==============================================================================
3316 //==============================================================================
3319 extern __at(0x0212) __sfr SSPADD
;
3325 unsigned SSP1ADD0
: 1;
3326 unsigned SSP1ADD1
: 1;
3327 unsigned SSP1ADD2
: 1;
3328 unsigned SSP1ADD3
: 1;
3329 unsigned SSP1ADD4
: 1;
3330 unsigned SSP1ADD5
: 1;
3331 unsigned SSP1ADD6
: 1;
3332 unsigned SSP1ADD7
: 1;
3348 extern __at(0x0212) volatile __SSPADDbits_t SSPADDbits
;
3350 #define _SSPADD_SSP1ADD0 0x01
3351 #define _SSPADD_ADD0 0x01
3352 #define _SSPADD_SSP1ADD1 0x02
3353 #define _SSPADD_ADD1 0x02
3354 #define _SSPADD_SSP1ADD2 0x04
3355 #define _SSPADD_ADD2 0x04
3356 #define _SSPADD_SSP1ADD3 0x08
3357 #define _SSPADD_ADD3 0x08
3358 #define _SSPADD_SSP1ADD4 0x10
3359 #define _SSPADD_ADD4 0x10
3360 #define _SSPADD_SSP1ADD5 0x20
3361 #define _SSPADD_ADD5 0x20
3362 #define _SSPADD_SSP1ADD6 0x40
3363 #define _SSPADD_ADD6 0x40
3364 #define _SSPADD_SSP1ADD7 0x80
3365 #define _SSPADD_ADD7 0x80
3367 //==============================================================================
3370 //==============================================================================
3373 extern __at(0x0213) __sfr SSP1MSK
;
3379 unsigned SSP1MSK0
: 1;
3380 unsigned SSP1MSK1
: 1;
3381 unsigned SSP1MSK2
: 1;
3382 unsigned SSP1MSK3
: 1;
3383 unsigned SSP1MSK4
: 1;
3384 unsigned SSP1MSK5
: 1;
3385 unsigned SSP1MSK6
: 1;
3386 unsigned SSP1MSK7
: 1;
3402 extern __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits
;
3404 #define _SSP1MSK0 0x01
3406 #define _SSP1MSK1 0x02
3408 #define _SSP1MSK2 0x04
3410 #define _SSP1MSK3 0x08
3412 #define _SSP1MSK4 0x10
3414 #define _SSP1MSK5 0x20
3416 #define _SSP1MSK6 0x40
3418 #define _SSP1MSK7 0x80
3421 //==============================================================================
3424 //==============================================================================
3427 extern __at(0x0213) __sfr SSPMSK
;
3433 unsigned SSP1MSK0
: 1;
3434 unsigned SSP1MSK1
: 1;
3435 unsigned SSP1MSK2
: 1;
3436 unsigned SSP1MSK3
: 1;
3437 unsigned SSP1MSK4
: 1;
3438 unsigned SSP1MSK5
: 1;
3439 unsigned SSP1MSK6
: 1;
3440 unsigned SSP1MSK7
: 1;
3456 extern __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits
;
3458 #define _SSPMSK_SSP1MSK0 0x01
3459 #define _SSPMSK_MSK0 0x01
3460 #define _SSPMSK_SSP1MSK1 0x02
3461 #define _SSPMSK_MSK1 0x02
3462 #define _SSPMSK_SSP1MSK2 0x04
3463 #define _SSPMSK_MSK2 0x04
3464 #define _SSPMSK_SSP1MSK3 0x08
3465 #define _SSPMSK_MSK3 0x08
3466 #define _SSPMSK_SSP1MSK4 0x10
3467 #define _SSPMSK_MSK4 0x10
3468 #define _SSPMSK_SSP1MSK5 0x20
3469 #define _SSPMSK_MSK5 0x20
3470 #define _SSPMSK_SSP1MSK6 0x40
3471 #define _SSPMSK_MSK6 0x40
3472 #define _SSPMSK_SSP1MSK7 0x80
3473 #define _SSPMSK_MSK7 0x80
3475 //==============================================================================
3478 //==============================================================================
3481 extern __at(0x0214) __sfr SSP1STAT
;
3487 unsigned R_NOT_W
: 1;
3490 unsigned D_NOT_A
: 1;
3495 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
3499 #define _R_NOT_W 0x04
3502 #define _D_NOT_A 0x20
3506 //==============================================================================
3509 //==============================================================================
3512 extern __at(0x0214) __sfr SSPSTAT
;
3518 unsigned R_NOT_W
: 1;
3521 unsigned D_NOT_A
: 1;
3526 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
3528 #define _SSPSTAT_BF 0x01
3529 #define _SSPSTAT_UA 0x02
3530 #define _SSPSTAT_R_NOT_W 0x04
3531 #define _SSPSTAT_S 0x08
3532 #define _SSPSTAT_P 0x10
3533 #define _SSPSTAT_D_NOT_A 0x20
3534 #define _SSPSTAT_CKE 0x40
3535 #define _SSPSTAT_SMP 0x80
3537 //==============================================================================
3540 //==============================================================================
3543 extern __at(0x0215) __sfr SSP1CON
;
3566 extern __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits
;
3577 //==============================================================================
3580 //==============================================================================
3583 extern __at(0x0215) __sfr SSP1CON1
;
3606 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
3608 #define _SSP1CON1_SSPM0 0x01
3609 #define _SSP1CON1_SSPM1 0x02
3610 #define _SSP1CON1_SSPM2 0x04
3611 #define _SSP1CON1_SSPM3 0x08
3612 #define _SSP1CON1_CKP 0x10
3613 #define _SSP1CON1_SSPEN 0x20
3614 #define _SSP1CON1_SSPOV 0x40
3615 #define _SSP1CON1_WCOL 0x80
3617 //==============================================================================
3620 //==============================================================================
3623 extern __at(0x0215) __sfr SSPCON
;
3646 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
3648 #define _SSPCON_SSPM0 0x01
3649 #define _SSPCON_SSPM1 0x02
3650 #define _SSPCON_SSPM2 0x04
3651 #define _SSPCON_SSPM3 0x08
3652 #define _SSPCON_CKP 0x10
3653 #define _SSPCON_SSPEN 0x20
3654 #define _SSPCON_SSPOV 0x40
3655 #define _SSPCON_WCOL 0x80
3657 //==============================================================================
3660 //==============================================================================
3663 extern __at(0x0215) __sfr SSPCON1
;
3686 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
3688 #define _SSPCON1_SSPM0 0x01
3689 #define _SSPCON1_SSPM1 0x02
3690 #define _SSPCON1_SSPM2 0x04
3691 #define _SSPCON1_SSPM3 0x08
3692 #define _SSPCON1_CKP 0x10
3693 #define _SSPCON1_SSPEN 0x20
3694 #define _SSPCON1_SSPOV 0x40
3695 #define _SSPCON1_WCOL 0x80
3697 //==============================================================================
3700 //==============================================================================
3703 extern __at(0x0216) __sfr SSP1CON2
;
3713 unsigned ACKSTAT
: 1;
3717 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
3725 #define _ACKSTAT 0x40
3728 //==============================================================================
3731 //==============================================================================
3734 extern __at(0x0216) __sfr SSPCON2
;
3744 unsigned ACKSTAT
: 1;
3748 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
3750 #define _SSPCON2_SEN 0x01
3751 #define _SSPCON2_RSEN 0x02
3752 #define _SSPCON2_PEN 0x04
3753 #define _SSPCON2_RCEN 0x08
3754 #define _SSPCON2_ACKEN 0x10
3755 #define _SSPCON2_ACKDT 0x20
3756 #define _SSPCON2_ACKSTAT 0x40
3757 #define _SSPCON2_GCEN 0x80
3759 //==============================================================================
3762 //==============================================================================
3765 extern __at(0x0217) __sfr SSP1CON3
;
3776 unsigned ACKTIM
: 1;
3779 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
3788 #define _ACKTIM 0x80
3790 //==============================================================================
3793 //==============================================================================
3796 extern __at(0x0217) __sfr SSPCON3
;
3807 unsigned ACKTIM
: 1;
3810 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
3812 #define _SSPCON3_DHEN 0x01
3813 #define _SSPCON3_AHEN 0x02
3814 #define _SSPCON3_SBCDE 0x04
3815 #define _SSPCON3_SDAHT 0x08
3816 #define _SSPCON3_BOEN 0x10
3817 #define _SSPCON3_SCIE 0x20
3818 #define _SSPCON3_PCIE 0x40
3819 #define _SSPCON3_ACKTIM 0x80
3821 //==============================================================================
3824 //==============================================================================
3827 extern __at(0x028C) __sfr ODCONA
;
3841 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
3852 //==============================================================================
3855 //==============================================================================
3858 extern __at(0x028D) __sfr ODCONB
;
3872 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits
;
3883 //==============================================================================
3886 //==============================================================================
3889 extern __at(0x028E) __sfr ODCONC
;
3903 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits
;
3914 //==============================================================================
3917 //==============================================================================
3920 extern __at(0x028F) __sfr ODCOND
;
3934 extern __at(0x028F) volatile __ODCONDbits_t ODCONDbits
;
3945 //==============================================================================
3948 //==============================================================================
3951 extern __at(0x0290) __sfr ODCONE
;
3974 extern __at(0x0290) volatile __ODCONEbits_t ODCONEbits
;
3980 //==============================================================================
3982 extern __at(0x0291) __sfr CCPR1
;
3983 extern __at(0x0291) __sfr CCPR1L
;
3984 extern __at(0x0292) __sfr CCPR1H
;
3986 //==============================================================================
3989 extern __at(0x0293) __sfr CCP1CON
;
3995 unsigned CCP1M0
: 1;
3996 unsigned CCP1M1
: 1;
3997 unsigned CCP1M2
: 1;
3998 unsigned CCP1M3
: 1;
4031 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
4033 #define _CCP1M0 0x01
4034 #define _CCP1M1 0x02
4035 #define _CCP1M2 0x04
4036 #define _CCP1M3 0x08
4042 //==============================================================================
4045 //==============================================================================
4048 extern __at(0x0293) __sfr ECCP1CON
;
4054 unsigned CCP1M0
: 1;
4055 unsigned CCP1M1
: 1;
4056 unsigned CCP1M2
: 1;
4057 unsigned CCP1M3
: 1;
4090 extern __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits
;
4092 #define _ECCP1CON_CCP1M0 0x01
4093 #define _ECCP1CON_CCP1M1 0x02
4094 #define _ECCP1CON_CCP1M2 0x04
4095 #define _ECCP1CON_CCP1M3 0x08
4096 #define _ECCP1CON_DC1B0 0x10
4097 #define _ECCP1CON_CCP1Y 0x10
4098 #define _ECCP1CON_DC1B1 0x20
4099 #define _ECCP1CON_CCP1X 0x20
4101 //==============================================================================
4103 extern __at(0x0298) __sfr CCPR2
;
4104 extern __at(0x0298) __sfr CCPR2L
;
4105 extern __at(0x0299) __sfr CCPR2H
;
4107 //==============================================================================
4110 extern __at(0x029A) __sfr CCP2CON
;
4116 unsigned CCP2M0
: 1;
4117 unsigned CCP2M1
: 1;
4118 unsigned CCP2M2
: 1;
4119 unsigned CCP2M3
: 1;
4152 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
4154 #define _CCP2M0 0x01
4155 #define _CCP2M1 0x02
4156 #define _CCP2M2 0x04
4157 #define _CCP2M3 0x08
4163 //==============================================================================
4166 //==============================================================================
4169 extern __at(0x029A) __sfr ECCP2CON
;
4175 unsigned CCP2M0
: 1;
4176 unsigned CCP2M1
: 1;
4177 unsigned CCP2M2
: 1;
4178 unsigned CCP2M3
: 1;
4211 extern __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits
;
4213 #define _ECCP2CON_CCP2M0 0x01
4214 #define _ECCP2CON_CCP2M1 0x02
4215 #define _ECCP2CON_CCP2M2 0x04
4216 #define _ECCP2CON_CCP2M3 0x08
4217 #define _ECCP2CON_DC2B0 0x10
4218 #define _ECCP2CON_CCP2Y 0x10
4219 #define _ECCP2CON_DC2B1 0x20
4220 #define _ECCP2CON_CCP2X 0x20
4222 //==============================================================================
4225 //==============================================================================
4228 extern __at(0x029E) __sfr CCPTMRS
;
4234 unsigned C1TSEL0
: 1;
4235 unsigned C1TSEL1
: 1;
4236 unsigned C2TSEL0
: 1;
4237 unsigned C2TSEL1
: 1;
4238 unsigned P3TSEL0
: 1;
4239 unsigned P3TSEL1
: 1;
4240 unsigned P4TSEL0
: 1;
4241 unsigned P4TSEL1
: 1;
4246 unsigned C1TSEL
: 2;
4253 unsigned C2TSEL
: 2;
4260 unsigned P3TSEL
: 2;
4267 unsigned P4TSEL
: 2;
4271 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
4273 #define _C1TSEL0 0x01
4274 #define _C1TSEL1 0x02
4275 #define _C2TSEL0 0x04
4276 #define _C2TSEL1 0x08
4277 #define _P3TSEL0 0x10
4278 #define _P3TSEL1 0x20
4279 #define _P4TSEL0 0x40
4280 #define _P4TSEL1 0x80
4282 //==============================================================================
4285 //==============================================================================
4288 extern __at(0x030C) __sfr SLRCONA
;
4302 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
4313 //==============================================================================
4316 //==============================================================================
4319 extern __at(0x030D) __sfr SLRCONB
;
4333 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits
;
4344 //==============================================================================
4347 //==============================================================================
4350 extern __at(0x030E) __sfr SLRCONC
;
4364 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits
;
4375 //==============================================================================
4378 //==============================================================================
4381 extern __at(0x030F) __sfr SLRCOND
;
4395 extern __at(0x030F) volatile __SLRCONDbits_t SLRCONDbits
;
4406 //==============================================================================
4409 //==============================================================================
4412 extern __at(0x0310) __sfr SLRCONE
;
4435 extern __at(0x0310) volatile __SLRCONEbits_t SLRCONEbits
;
4441 //==============================================================================
4444 //==============================================================================
4447 extern __at(0x038C) __sfr INLVLA
;
4451 unsigned INLVLA0
: 1;
4452 unsigned INLVLA1
: 1;
4453 unsigned INLVLA2
: 1;
4454 unsigned INLVLA3
: 1;
4455 unsigned INLVLA4
: 1;
4456 unsigned INLVLA5
: 1;
4457 unsigned INLVLA6
: 1;
4458 unsigned INLVLA7
: 1;
4461 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
4463 #define _INLVLA0 0x01
4464 #define _INLVLA1 0x02
4465 #define _INLVLA2 0x04
4466 #define _INLVLA3 0x08
4467 #define _INLVLA4 0x10
4468 #define _INLVLA5 0x20
4469 #define _INLVLA6 0x40
4470 #define _INLVLA7 0x80
4472 //==============================================================================
4475 //==============================================================================
4478 extern __at(0x038D) __sfr INLVLB
;
4482 unsigned INLVLB0
: 1;
4483 unsigned INLVLB1
: 1;
4484 unsigned INLVLB2
: 1;
4485 unsigned INLVLB3
: 1;
4486 unsigned INLVLB4
: 1;
4487 unsigned INLVLB5
: 1;
4488 unsigned INLVLB6
: 1;
4489 unsigned INLVLB7
: 1;
4492 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits
;
4494 #define _INLVLB0 0x01
4495 #define _INLVLB1 0x02
4496 #define _INLVLB2 0x04
4497 #define _INLVLB3 0x08
4498 #define _INLVLB4 0x10
4499 #define _INLVLB5 0x20
4500 #define _INLVLB6 0x40
4501 #define _INLVLB7 0x80
4503 //==============================================================================
4506 //==============================================================================
4509 extern __at(0x038E) __sfr INLVLC
;
4513 unsigned INLVLC0
: 1;
4514 unsigned INLVLC1
: 1;
4515 unsigned INLVLC2
: 1;
4516 unsigned INLVLC3
: 1;
4517 unsigned INLVLC4
: 1;
4518 unsigned INLVLC5
: 1;
4519 unsigned INLVLC6
: 1;
4520 unsigned INLVLC7
: 1;
4523 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits
;
4525 #define _INLVLC0 0x01
4526 #define _INLVLC1 0x02
4527 #define _INLVLC2 0x04
4528 #define _INLVLC3 0x08
4529 #define _INLVLC4 0x10
4530 #define _INLVLC5 0x20
4531 #define _INLVLC6 0x40
4532 #define _INLVLC7 0x80
4534 //==============================================================================
4537 //==============================================================================
4540 extern __at(0x038F) __sfr INLVLD
;
4544 unsigned INLVLD0
: 1;
4545 unsigned INLVLD1
: 1;
4546 unsigned INLVLD2
: 1;
4547 unsigned INLVLD3
: 1;
4548 unsigned INLVLD4
: 1;
4549 unsigned INLVLD5
: 1;
4550 unsigned INLVLD6
: 1;
4551 unsigned INLVLD7
: 1;
4554 extern __at(0x038F) volatile __INLVLDbits_t INLVLDbits
;
4556 #define _INLVLD0 0x01
4557 #define _INLVLD1 0x02
4558 #define _INLVLD2 0x04
4559 #define _INLVLD3 0x08
4560 #define _INLVLD4 0x10
4561 #define _INLVLD5 0x20
4562 #define _INLVLD6 0x40
4563 #define _INLVLD7 0x80
4565 //==============================================================================
4568 //==============================================================================
4571 extern __at(0x0390) __sfr INLVLE
;
4577 unsigned INLVLE0
: 1;
4578 unsigned INLVLE1
: 1;
4579 unsigned INLVLE2
: 1;
4580 unsigned INLVLE3
: 1;
4589 unsigned INLVLE
: 4;
4594 extern __at(0x0390) volatile __INLVLEbits_t INLVLEbits
;
4596 #define _INLVLE0 0x01
4597 #define _INLVLE1 0x02
4598 #define _INLVLE2 0x04
4599 #define _INLVLE3 0x08
4601 //==============================================================================
4604 //==============================================================================
4607 extern __at(0x0391) __sfr IOCAP
;
4611 unsigned IOCAP0
: 1;
4612 unsigned IOCAP1
: 1;
4613 unsigned IOCAP2
: 1;
4614 unsigned IOCAP3
: 1;
4615 unsigned IOCAP4
: 1;
4616 unsigned IOCAP5
: 1;
4617 unsigned IOCAP6
: 1;
4618 unsigned IOCAP7
: 1;
4621 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits
;
4623 #define _IOCAP0 0x01
4624 #define _IOCAP1 0x02
4625 #define _IOCAP2 0x04
4626 #define _IOCAP3 0x08
4627 #define _IOCAP4 0x10
4628 #define _IOCAP5 0x20
4629 #define _IOCAP6 0x40
4630 #define _IOCAP7 0x80
4632 //==============================================================================
4635 //==============================================================================
4638 extern __at(0x0392) __sfr IOCAN
;
4642 unsigned IOCAN0
: 1;
4643 unsigned IOCAN1
: 1;
4644 unsigned IOCAN2
: 1;
4645 unsigned IOCAN3
: 1;
4646 unsigned IOCAN4
: 1;
4647 unsigned IOCAN5
: 1;
4648 unsigned IOCAN6
: 1;
4649 unsigned IOCAN7
: 1;
4652 extern __at(0x0392) volatile __IOCANbits_t IOCANbits
;
4654 #define _IOCAN0 0x01
4655 #define _IOCAN1 0x02
4656 #define _IOCAN2 0x04
4657 #define _IOCAN3 0x08
4658 #define _IOCAN4 0x10
4659 #define _IOCAN5 0x20
4660 #define _IOCAN6 0x40
4661 #define _IOCAN7 0x80
4663 //==============================================================================
4666 //==============================================================================
4669 extern __at(0x0393) __sfr IOCAF
;
4673 unsigned IOCAF0
: 1;
4674 unsigned IOCAF1
: 1;
4675 unsigned IOCAF2
: 1;
4676 unsigned IOCAF3
: 1;
4677 unsigned IOCAF4
: 1;
4678 unsigned IOCAF5
: 1;
4679 unsigned IOCAF6
: 1;
4680 unsigned IOCAF7
: 1;
4683 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits
;
4685 #define _IOCAF0 0x01
4686 #define _IOCAF1 0x02
4687 #define _IOCAF2 0x04
4688 #define _IOCAF3 0x08
4689 #define _IOCAF4 0x10
4690 #define _IOCAF5 0x20
4691 #define _IOCAF6 0x40
4692 #define _IOCAF7 0x80
4694 //==============================================================================
4697 //==============================================================================
4700 extern __at(0x0394) __sfr IOCBP
;
4704 unsigned IOCBP0
: 1;
4705 unsigned IOCBP1
: 1;
4706 unsigned IOCBP2
: 1;
4707 unsigned IOCBP3
: 1;
4708 unsigned IOCBP4
: 1;
4709 unsigned IOCBP5
: 1;
4710 unsigned IOCBP6
: 1;
4711 unsigned IOCBP7
: 1;
4714 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
4716 #define _IOCBP0 0x01
4717 #define _IOCBP1 0x02
4718 #define _IOCBP2 0x04
4719 #define _IOCBP3 0x08
4720 #define _IOCBP4 0x10
4721 #define _IOCBP5 0x20
4722 #define _IOCBP6 0x40
4723 #define _IOCBP7 0x80
4725 //==============================================================================
4728 //==============================================================================
4731 extern __at(0x0395) __sfr IOCBN
;
4735 unsigned IOCBN0
: 1;
4736 unsigned IOCBN1
: 1;
4737 unsigned IOCBN2
: 1;
4738 unsigned IOCBN3
: 1;
4739 unsigned IOCBN4
: 1;
4740 unsigned IOCBN5
: 1;
4741 unsigned IOCBN6
: 1;
4742 unsigned IOCBN7
: 1;
4745 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
4747 #define _IOCBN0 0x01
4748 #define _IOCBN1 0x02
4749 #define _IOCBN2 0x04
4750 #define _IOCBN3 0x08
4751 #define _IOCBN4 0x10
4752 #define _IOCBN5 0x20
4753 #define _IOCBN6 0x40
4754 #define _IOCBN7 0x80
4756 //==============================================================================
4759 //==============================================================================
4762 extern __at(0x0396) __sfr IOCBF
;
4766 unsigned IOCBF0
: 1;
4767 unsigned IOCBF1
: 1;
4768 unsigned IOCBF2
: 1;
4769 unsigned IOCBF3
: 1;
4770 unsigned IOCBF4
: 1;
4771 unsigned IOCBF5
: 1;
4772 unsigned IOCBF6
: 1;
4773 unsigned IOCBF7
: 1;
4776 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
4778 #define _IOCBF0 0x01
4779 #define _IOCBF1 0x02
4780 #define _IOCBF2 0x04
4781 #define _IOCBF3 0x08
4782 #define _IOCBF4 0x10
4783 #define _IOCBF5 0x20
4784 #define _IOCBF6 0x40
4785 #define _IOCBF7 0x80
4787 //==============================================================================
4790 //==============================================================================
4793 extern __at(0x0397) __sfr IOCCP
;
4797 unsigned IOCCP0
: 1;
4798 unsigned IOCCP1
: 1;
4799 unsigned IOCCP2
: 1;
4800 unsigned IOCCP3
: 1;
4801 unsigned IOCCP4
: 1;
4802 unsigned IOCCP5
: 1;
4803 unsigned IOCCP6
: 1;
4804 unsigned IOCCP7
: 1;
4807 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits
;
4809 #define _IOCCP0 0x01
4810 #define _IOCCP1 0x02
4811 #define _IOCCP2 0x04
4812 #define _IOCCP3 0x08
4813 #define _IOCCP4 0x10
4814 #define _IOCCP5 0x20
4815 #define _IOCCP6 0x40
4816 #define _IOCCP7 0x80
4818 //==============================================================================
4821 //==============================================================================
4824 extern __at(0x0398) __sfr IOCCN
;
4828 unsigned IOCCN0
: 1;
4829 unsigned IOCCN1
: 1;
4830 unsigned IOCCN2
: 1;
4831 unsigned IOCCN3
: 1;
4832 unsigned IOCCN4
: 1;
4833 unsigned IOCCN5
: 1;
4834 unsigned IOCCN6
: 1;
4835 unsigned IOCCN7
: 1;
4838 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits
;
4840 #define _IOCCN0 0x01
4841 #define _IOCCN1 0x02
4842 #define _IOCCN2 0x04
4843 #define _IOCCN3 0x08
4844 #define _IOCCN4 0x10
4845 #define _IOCCN5 0x20
4846 #define _IOCCN6 0x40
4847 #define _IOCCN7 0x80
4849 //==============================================================================
4852 //==============================================================================
4855 extern __at(0x0399) __sfr IOCCF
;
4859 unsigned IOCCF0
: 1;
4860 unsigned IOCCF1
: 1;
4861 unsigned IOCCF2
: 1;
4862 unsigned IOCCF3
: 1;
4863 unsigned IOCCF4
: 1;
4864 unsigned IOCCF5
: 1;
4865 unsigned IOCCF6
: 1;
4866 unsigned IOCCF7
: 1;
4869 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits
;
4871 #define _IOCCF0 0x01
4872 #define _IOCCF1 0x02
4873 #define _IOCCF2 0x04
4874 #define _IOCCF3 0x08
4875 #define _IOCCF4 0x10
4876 #define _IOCCF5 0x20
4877 #define _IOCCF6 0x40
4878 #define _IOCCF7 0x80
4880 //==============================================================================
4883 //==============================================================================
4886 extern __at(0x039D) __sfr IOCEP
;
4893 unsigned IOCEP3
: 1;
4900 extern __at(0x039D) volatile __IOCEPbits_t IOCEPbits
;
4902 #define _IOCEP3 0x08
4904 //==============================================================================
4907 //==============================================================================
4910 extern __at(0x039E) __sfr IOCEN
;
4917 unsigned IOCEN3
: 1;
4924 extern __at(0x039E) volatile __IOCENbits_t IOCENbits
;
4926 #define _IOCEN3 0x08
4928 //==============================================================================
4931 //==============================================================================
4934 extern __at(0x039F) __sfr IOCEF
;
4941 unsigned IOCEF3
: 1;
4948 extern __at(0x039F) volatile __IOCEFbits_t IOCEFbits
;
4950 #define _IOCEF3 0x08
4952 //==============================================================================
4954 extern __at(0x0415) __sfr TMR4
;
4955 extern __at(0x0416) __sfr PR4
;
4957 //==============================================================================
4960 extern __at(0x0417) __sfr T4CON
;
4966 unsigned T4CKPS0
: 1;
4967 unsigned T4CKPS1
: 1;
4968 unsigned TMR4ON
: 1;
4969 unsigned T4OUTPS0
: 1;
4970 unsigned T4OUTPS1
: 1;
4971 unsigned T4OUTPS2
: 1;
4972 unsigned T4OUTPS3
: 1;
4978 unsigned T4CKPS
: 2;
4985 unsigned T4OUTPS
: 4;
4990 extern __at(0x0417) volatile __T4CONbits_t T4CONbits
;
4992 #define _T4CKPS0 0x01
4993 #define _T4CKPS1 0x02
4994 #define _TMR4ON 0x04
4995 #define _T4OUTPS0 0x08
4996 #define _T4OUTPS1 0x10
4997 #define _T4OUTPS2 0x20
4998 #define _T4OUTPS3 0x40
5000 //==============================================================================
5002 extern __at(0x041C) __sfr TMR6
;
5003 extern __at(0x041D) __sfr PR6
;
5005 //==============================================================================
5008 extern __at(0x041E) __sfr T6CON
;
5014 unsigned T6CKPS0
: 1;
5015 unsigned T6CKPS1
: 1;
5016 unsigned TMR6ON
: 1;
5017 unsigned T6OUTPS0
: 1;
5018 unsigned T6OUTPS1
: 1;
5019 unsigned T6OUTPS2
: 1;
5020 unsigned T6OUTPS3
: 1;
5026 unsigned T6CKPS
: 2;
5033 unsigned T6OUTPS
: 4;
5038 extern __at(0x041E) volatile __T6CONbits_t T6CONbits
;
5040 #define _T6CKPS0 0x01
5041 #define _T6CKPS1 0x02
5042 #define _TMR6ON 0x04
5043 #define _T6OUTPS0 0x08
5044 #define _T6OUTPS1 0x10
5045 #define _T6OUTPS2 0x20
5046 #define _T6OUTPS3 0x40
5048 //==============================================================================
5050 extern __at(0x0498) __sfr NCO1ACC
;
5052 //==============================================================================
5055 extern __at(0x0498) __sfr NCO1ACCL
;
5059 unsigned NCO1ACC0
: 1;
5060 unsigned NCO1ACC1
: 1;
5061 unsigned NCO1ACC2
: 1;
5062 unsigned NCO1ACC3
: 1;
5063 unsigned NCO1ACC4
: 1;
5064 unsigned NCO1ACC5
: 1;
5065 unsigned NCO1ACC6
: 1;
5066 unsigned NCO1ACC7
: 1;
5069 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits
;
5071 #define _NCO1ACC0 0x01
5072 #define _NCO1ACC1 0x02
5073 #define _NCO1ACC2 0x04
5074 #define _NCO1ACC3 0x08
5075 #define _NCO1ACC4 0x10
5076 #define _NCO1ACC5 0x20
5077 #define _NCO1ACC6 0x40
5078 #define _NCO1ACC7 0x80
5080 //==============================================================================
5083 //==============================================================================
5086 extern __at(0x0499) __sfr NCO1ACCH
;
5090 unsigned NCO1ACC8
: 1;
5091 unsigned NCO1ACC9
: 1;
5092 unsigned NCO1ACC10
: 1;
5093 unsigned NCO1ACC11
: 1;
5094 unsigned NCO1ACC12
: 1;
5095 unsigned NCO1ACC13
: 1;
5096 unsigned NCO1ACC14
: 1;
5097 unsigned NCO1ACC15
: 1;
5100 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits
;
5102 #define _NCO1ACC8 0x01
5103 #define _NCO1ACC9 0x02
5104 #define _NCO1ACC10 0x04
5105 #define _NCO1ACC11 0x08
5106 #define _NCO1ACC12 0x10
5107 #define _NCO1ACC13 0x20
5108 #define _NCO1ACC14 0x40
5109 #define _NCO1ACC15 0x80
5111 //==============================================================================
5114 //==============================================================================
5117 extern __at(0x049A) __sfr NCO1ACCU
;
5121 unsigned NCO1ACC16
: 1;
5122 unsigned NCO1ACC17
: 1;
5123 unsigned NCO1ACC18
: 1;
5124 unsigned NCO1ACC19
: 1;
5131 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits
;
5133 #define _NCO1ACC16 0x01
5134 #define _NCO1ACC17 0x02
5135 #define _NCO1ACC18 0x04
5136 #define _NCO1ACC19 0x08
5138 //==============================================================================
5140 extern __at(0x049B) __sfr NCO1INC
;
5142 //==============================================================================
5145 extern __at(0x049B) __sfr NCO1INCL
;
5149 unsigned NCO1INC0
: 1;
5150 unsigned NCO1INC1
: 1;
5151 unsigned NCO1INC2
: 1;
5152 unsigned NCO1INC3
: 1;
5153 unsigned NCO1INC4
: 1;
5154 unsigned NCO1INC5
: 1;
5155 unsigned NCO1INC6
: 1;
5156 unsigned NCO1INC7
: 1;
5159 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits
;
5161 #define _NCO1INC0 0x01
5162 #define _NCO1INC1 0x02
5163 #define _NCO1INC2 0x04
5164 #define _NCO1INC3 0x08
5165 #define _NCO1INC4 0x10
5166 #define _NCO1INC5 0x20
5167 #define _NCO1INC6 0x40
5168 #define _NCO1INC7 0x80
5170 //==============================================================================
5173 //==============================================================================
5176 extern __at(0x049C) __sfr NCO1INCH
;
5180 unsigned NCO1INC8
: 1;
5181 unsigned NCO1INC9
: 1;
5182 unsigned NCO1INC10
: 1;
5183 unsigned NCO1INC11
: 1;
5184 unsigned NCO1INC12
: 1;
5185 unsigned NCO1INC13
: 1;
5186 unsigned NCO1INC14
: 1;
5187 unsigned NCO1INC15
: 1;
5190 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits
;
5192 #define _NCO1INC8 0x01
5193 #define _NCO1INC9 0x02
5194 #define _NCO1INC10 0x04
5195 #define _NCO1INC11 0x08
5196 #define _NCO1INC12 0x10
5197 #define _NCO1INC13 0x20
5198 #define _NCO1INC14 0x40
5199 #define _NCO1INC15 0x80
5201 //==============================================================================
5204 //==============================================================================
5207 extern __at(0x049D) __sfr NCO1INCU
;
5211 unsigned NCO1INC16
: 1;
5212 unsigned NCO1INC17
: 1;
5213 unsigned NCO1INC18
: 1;
5214 unsigned NCO1INC19
: 1;
5221 extern __at(0x049D) volatile __NCO1INCUbits_t NCO1INCUbits
;
5223 #define _NCO1INC16 0x01
5224 #define _NCO1INC17 0x02
5225 #define _NCO1INC18 0x04
5226 #define _NCO1INC19 0x08
5228 //==============================================================================
5231 //==============================================================================
5234 extern __at(0x049E) __sfr NCO1CON
;
5248 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits
;
5255 //==============================================================================
5258 //==============================================================================
5261 extern __at(0x049F) __sfr NCO1CLK
;
5267 unsigned N1CKS0
: 1;
5268 unsigned N1CKS1
: 1;
5272 unsigned N1PWS0
: 1;
5273 unsigned N1PWS1
: 1;
5274 unsigned N1PWS2
: 1;
5290 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits
;
5292 #define _N1CKS0 0x01
5293 #define _N1CKS1 0x02
5294 #define _N1PWS0 0x20
5295 #define _N1PWS1 0x40
5296 #define _N1PWS2 0x80
5298 //==============================================================================
5301 //==============================================================================
5304 extern __at(0x0511) __sfr OPA1CON
;
5310 unsigned OPA1PCH0
: 1;
5311 unsigned OPA1PCH1
: 1;
5314 unsigned OPA1UG
: 1;
5316 unsigned OPA1SP
: 1;
5317 unsigned OPA1EN
: 1;
5322 unsigned OPA1PCH
: 2;
5327 extern __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits
;
5329 #define _OPA1PCH0 0x01
5330 #define _OPA1PCH1 0x02
5331 #define _OPA1UG 0x10
5332 #define _OPA1SP 0x40
5333 #define _OPA1EN 0x80
5335 //==============================================================================
5338 //==============================================================================
5341 extern __at(0x0515) __sfr OPA2CON
;
5347 unsigned OPA2PCH0
: 1;
5348 unsigned OPA2PCH1
: 1;
5351 unsigned OPA2UG
: 1;
5353 unsigned OPA2SP
: 1;
5354 unsigned OPA2EN
: 1;
5359 unsigned OPA2PCH
: 2;
5364 extern __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits
;
5366 #define _OPA2PCH0 0x01
5367 #define _OPA2PCH1 0x02
5368 #define _OPA2UG 0x10
5369 #define _OPA2SP 0x40
5370 #define _OPA2EN 0x80
5372 //==============================================================================
5375 //==============================================================================
5378 extern __at(0x0617) __sfr PWM3DCL
;
5390 unsigned PWM3DCL0
: 1;
5391 unsigned PWM3DCL1
: 1;
5397 unsigned PWM3DCL
: 2;
5401 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits
;
5403 #define _PWM3DCL0 0x40
5404 #define _PWM3DCL1 0x80
5406 //==============================================================================
5409 //==============================================================================
5412 extern __at(0x0618) __sfr PWM3DCH
;
5416 unsigned PWM3DCH0
: 1;
5417 unsigned PWM3DCH1
: 1;
5418 unsigned PWM3DCH2
: 1;
5419 unsigned PWM3DCH3
: 1;
5420 unsigned PWM3DCH4
: 1;
5421 unsigned PWM3DCH5
: 1;
5422 unsigned PWM3DCH6
: 1;
5423 unsigned PWM3DCH7
: 1;
5426 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits
;
5428 #define _PWM3DCH0 0x01
5429 #define _PWM3DCH1 0x02
5430 #define _PWM3DCH2 0x04
5431 #define _PWM3DCH3 0x08
5432 #define _PWM3DCH4 0x10
5433 #define _PWM3DCH5 0x20
5434 #define _PWM3DCH6 0x40
5435 #define _PWM3DCH7 0x80
5437 //==============================================================================
5440 //==============================================================================
5443 extern __at(0x0619) __sfr PWM3CON
;
5451 unsigned PWM3POL
: 1;
5452 unsigned PWM3OUT
: 1;
5454 unsigned PWM3EN
: 1;
5457 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits
;
5459 #define _PWM3POL 0x10
5460 #define _PWM3OUT 0x20
5461 #define _PWM3EN 0x80
5463 //==============================================================================
5466 //==============================================================================
5469 extern __at(0x0619) __sfr PWM3CON0
;
5477 unsigned PWM3POL
: 1;
5478 unsigned PWM3OUT
: 1;
5480 unsigned PWM3EN
: 1;
5483 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits
;
5485 #define _PWM3CON0_PWM3POL 0x10
5486 #define _PWM3CON0_PWM3OUT 0x20
5487 #define _PWM3CON0_PWM3EN 0x80
5489 //==============================================================================
5492 //==============================================================================
5495 extern __at(0x061A) __sfr PWM4DCL
;
5507 unsigned PWM4DCL0
: 1;
5508 unsigned PWM4DCL1
: 1;
5514 unsigned PWM4DCL
: 2;
5518 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits
;
5520 #define _PWM4DCL0 0x40
5521 #define _PWM4DCL1 0x80
5523 //==============================================================================
5526 //==============================================================================
5529 extern __at(0x061B) __sfr PWM4DCH
;
5533 unsigned PWM4DCH0
: 1;
5534 unsigned PWM4DCH1
: 1;
5535 unsigned PWM4DCH2
: 1;
5536 unsigned PWM4DCH3
: 1;
5537 unsigned PWM4DCH4
: 1;
5538 unsigned PWM4DCH5
: 1;
5539 unsigned PWM4DCH6
: 1;
5540 unsigned PWM4DCH7
: 1;
5543 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits
;
5545 #define _PWM4DCH0 0x01
5546 #define _PWM4DCH1 0x02
5547 #define _PWM4DCH2 0x04
5548 #define _PWM4DCH3 0x08
5549 #define _PWM4DCH4 0x10
5550 #define _PWM4DCH5 0x20
5551 #define _PWM4DCH6 0x40
5552 #define _PWM4DCH7 0x80
5554 //==============================================================================
5557 //==============================================================================
5560 extern __at(0x061C) __sfr PWM4CON
;
5568 unsigned PWM4POL
: 1;
5569 unsigned PWM4OUT
: 1;
5571 unsigned PWM4EN
: 1;
5574 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits
;
5576 #define _PWM4POL 0x10
5577 #define _PWM4OUT 0x20
5578 #define _PWM4EN 0x80
5580 //==============================================================================
5583 //==============================================================================
5586 extern __at(0x061C) __sfr PWM4CON0
;
5594 unsigned PWM4POL
: 1;
5595 unsigned PWM4OUT
: 1;
5597 unsigned PWM4EN
: 1;
5600 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits
;
5602 #define _PWM4CON0_PWM4POL 0x10
5603 #define _PWM4CON0_PWM4OUT 0x20
5604 #define _PWM4CON0_PWM4EN 0x80
5606 //==============================================================================
5609 //==============================================================================
5612 extern __at(0x0691) __sfr COG1PHR
;
5618 unsigned G1PHR0
: 1;
5619 unsigned G1PHR1
: 1;
5620 unsigned G1PHR2
: 1;
5621 unsigned G1PHR3
: 1;
5622 unsigned G1PHR4
: 1;
5623 unsigned G1PHR5
: 1;
5635 extern __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits
;
5637 #define _G1PHR0 0x01
5638 #define _G1PHR1 0x02
5639 #define _G1PHR2 0x04
5640 #define _G1PHR3 0x08
5641 #define _G1PHR4 0x10
5642 #define _G1PHR5 0x20
5644 //==============================================================================
5647 //==============================================================================
5650 extern __at(0x0692) __sfr COG1PHF
;
5656 unsigned G1PHF0
: 1;
5657 unsigned G1PHF1
: 1;
5658 unsigned G1PHF2
: 1;
5659 unsigned G1PHF3
: 1;
5660 unsigned G1PHF4
: 1;
5661 unsigned G1PHF5
: 1;
5673 extern __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits
;
5675 #define _G1PHF0 0x01
5676 #define _G1PHF1 0x02
5677 #define _G1PHF2 0x04
5678 #define _G1PHF3 0x08
5679 #define _G1PHF4 0x10
5680 #define _G1PHF5 0x20
5682 //==============================================================================
5685 //==============================================================================
5688 extern __at(0x0693) __sfr COG1BLKR
;
5694 unsigned G1BLKR0
: 1;
5695 unsigned G1BLKR1
: 1;
5696 unsigned G1BLKR2
: 1;
5697 unsigned G1BLKR3
: 1;
5698 unsigned G1BLKR4
: 1;
5699 unsigned G1BLKR5
: 1;
5706 unsigned G1BLKR
: 6;
5711 extern __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits
;
5713 #define _G1BLKR0 0x01
5714 #define _G1BLKR1 0x02
5715 #define _G1BLKR2 0x04
5716 #define _G1BLKR3 0x08
5717 #define _G1BLKR4 0x10
5718 #define _G1BLKR5 0x20
5720 //==============================================================================
5723 //==============================================================================
5726 extern __at(0x0694) __sfr COG1BLKF
;
5732 unsigned G1BLKF0
: 1;
5733 unsigned G1BLKF1
: 1;
5734 unsigned G1BLKF2
: 1;
5735 unsigned G1BLKF3
: 1;
5736 unsigned G1BLKF4
: 1;
5737 unsigned G1BLKF5
: 1;
5744 unsigned G1BLKF
: 6;
5749 extern __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits
;
5751 #define _G1BLKF0 0x01
5752 #define _G1BLKF1 0x02
5753 #define _G1BLKF2 0x04
5754 #define _G1BLKF3 0x08
5755 #define _G1BLKF4 0x10
5756 #define _G1BLKF5 0x20
5758 //==============================================================================
5761 //==============================================================================
5764 extern __at(0x0695) __sfr COG1DBR
;
5770 unsigned G1DBR0
: 1;
5771 unsigned G1DBR1
: 1;
5772 unsigned G1DBR2
: 1;
5773 unsigned G1DBR3
: 1;
5774 unsigned G1DBR4
: 1;
5775 unsigned G1DBR5
: 1;
5787 extern __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits
;
5789 #define _G1DBR0 0x01
5790 #define _G1DBR1 0x02
5791 #define _G1DBR2 0x04
5792 #define _G1DBR3 0x08
5793 #define _G1DBR4 0x10
5794 #define _G1DBR5 0x20
5796 //==============================================================================
5799 //==============================================================================
5802 extern __at(0x0696) __sfr COG1DBF
;
5808 unsigned G1DBF0
: 1;
5809 unsigned G1DBF1
: 1;
5810 unsigned G1DBF2
: 1;
5811 unsigned G1DBF3
: 1;
5812 unsigned G1DBF4
: 1;
5813 unsigned G1DBF5
: 1;
5825 extern __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits
;
5827 #define _G1DBF0 0x01
5828 #define _G1DBF1 0x02
5829 #define _G1DBF2 0x04
5830 #define _G1DBF3 0x08
5831 #define _G1DBF4 0x10
5832 #define _G1DBF5 0x20
5834 //==============================================================================
5837 //==============================================================================
5840 extern __at(0x0697) __sfr COG1CON0
;
5870 extern __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits
;
5880 //==============================================================================
5883 //==============================================================================
5886 extern __at(0x0698) __sfr COG1CON1
;
5890 unsigned G1POLA
: 1;
5891 unsigned G1POLB
: 1;
5892 unsigned G1POLC
: 1;
5893 unsigned G1POLD
: 1;
5896 unsigned G1FDBS
: 1;
5897 unsigned G1RDBS
: 1;
5900 extern __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits
;
5902 #define _G1POLA 0x01
5903 #define _G1POLB 0x02
5904 #define _G1POLC 0x04
5905 #define _G1POLD 0x08
5906 #define _G1FDBS 0x40
5907 #define _G1RDBS 0x80
5909 //==============================================================================
5912 //==============================================================================
5915 extern __at(0x0699) __sfr COG1RIS
;
5919 unsigned G1RIS0
: 1;
5920 unsigned G1RIS1
: 1;
5921 unsigned G1RIS2
: 1;
5922 unsigned G1RIS3
: 1;
5923 unsigned G1RIS4
: 1;
5924 unsigned G1RIS5
: 1;
5925 unsigned G1RIS6
: 1;
5926 unsigned G1RIS7
: 1;
5929 extern __at(0x0699) volatile __COG1RISbits_t COG1RISbits
;
5931 #define _G1RIS0 0x01
5932 #define _G1RIS1 0x02
5933 #define _G1RIS2 0x04
5934 #define _G1RIS3 0x08
5935 #define _G1RIS4 0x10
5936 #define _G1RIS5 0x20
5937 #define _G1RIS6 0x40
5938 #define _G1RIS7 0x80
5940 //==============================================================================
5943 //==============================================================================
5946 extern __at(0x069A) __sfr COG1RSIM
;
5950 unsigned G1RSIM0
: 1;
5951 unsigned G1RSIM1
: 1;
5952 unsigned G1RSIM2
: 1;
5953 unsigned G1RSIM3
: 1;
5954 unsigned G1RSIM4
: 1;
5955 unsigned G1RSIM5
: 1;
5956 unsigned G1RSIM6
: 1;
5957 unsigned G1RSIM7
: 1;
5960 extern __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits
;
5962 #define _G1RSIM0 0x01
5963 #define _G1RSIM1 0x02
5964 #define _G1RSIM2 0x04
5965 #define _G1RSIM3 0x08
5966 #define _G1RSIM4 0x10
5967 #define _G1RSIM5 0x20
5968 #define _G1RSIM6 0x40
5969 #define _G1RSIM7 0x80
5971 //==============================================================================
5974 //==============================================================================
5977 extern __at(0x069B) __sfr COG1FIS
;
5981 unsigned G1FIS0
: 1;
5982 unsigned G1FIS1
: 1;
5983 unsigned G1FIS2
: 1;
5984 unsigned G1FIS3
: 1;
5985 unsigned G1FIS4
: 1;
5986 unsigned G1FIS5
: 1;
5987 unsigned G1FIS6
: 1;
5988 unsigned G1FIS7
: 1;
5991 extern __at(0x069B) volatile __COG1FISbits_t COG1FISbits
;
5993 #define _G1FIS0 0x01
5994 #define _G1FIS1 0x02
5995 #define _G1FIS2 0x04
5996 #define _G1FIS3 0x08
5997 #define _G1FIS4 0x10
5998 #define _G1FIS5 0x20
5999 #define _G1FIS6 0x40
6000 #define _G1FIS7 0x80
6002 //==============================================================================
6005 //==============================================================================
6008 extern __at(0x069C) __sfr COG1FSIM
;
6012 unsigned G1FSIM0
: 1;
6013 unsigned G1FSIM1
: 1;
6014 unsigned G1FSIM2
: 1;
6015 unsigned G1FSIM3
: 1;
6016 unsigned G1FSIM4
: 1;
6017 unsigned G1FSIM5
: 1;
6018 unsigned G1FSIM6
: 1;
6019 unsigned G1FSIM7
: 1;
6022 extern __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits
;
6024 #define _G1FSIM0 0x01
6025 #define _G1FSIM1 0x02
6026 #define _G1FSIM2 0x04
6027 #define _G1FSIM3 0x08
6028 #define _G1FSIM4 0x10
6029 #define _G1FSIM5 0x20
6030 #define _G1FSIM6 0x40
6031 #define _G1FSIM7 0x80
6033 //==============================================================================
6036 //==============================================================================
6039 extern __at(0x069D) __sfr COG1ASD0
;
6047 unsigned G1ASDAC0
: 1;
6048 unsigned G1ASDAC1
: 1;
6049 unsigned G1ASDBD0
: 1;
6050 unsigned G1ASDBD1
: 1;
6051 unsigned G1ARSEN
: 1;
6058 unsigned G1ASDAC
: 2;
6065 unsigned G1ASDBD
: 2;
6070 extern __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits
;
6072 #define _G1ASDAC0 0x04
6073 #define _G1ASDAC1 0x08
6074 #define _G1ASDBD0 0x10
6075 #define _G1ASDBD1 0x20
6076 #define _G1ARSEN 0x40
6079 //==============================================================================
6082 //==============================================================================
6085 extern __at(0x069E) __sfr COG1ASD1
;
6089 unsigned G1AS0E
: 1;
6090 unsigned G1AS1E
: 1;
6091 unsigned G1AS2E
: 1;
6092 unsigned G1AS3E
: 1;
6099 extern __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits
;
6101 #define _G1AS0E 0x01
6102 #define _G1AS1E 0x02
6103 #define _G1AS2E 0x04
6104 #define _G1AS3E 0x08
6106 //==============================================================================
6109 //==============================================================================
6112 extern __at(0x069F) __sfr COG1STR
;
6116 unsigned G1STRA
: 1;
6117 unsigned G1STRB
: 1;
6118 unsigned G1STRC
: 1;
6119 unsigned G1STRD
: 1;
6120 unsigned G1SDATA
: 1;
6121 unsigned G1SDATB
: 1;
6122 unsigned G1SDATC
: 1;
6123 unsigned G1SDATD
: 1;
6126 extern __at(0x069F) volatile __COG1STRbits_t COG1STRbits
;
6128 #define _G1STRA 0x01
6129 #define _G1STRB 0x02
6130 #define _G1STRC 0x04
6131 #define _G1STRD 0x08
6132 #define _G1SDATA 0x10
6133 #define _G1SDATB 0x20
6134 #define _G1SDATC 0x40
6135 #define _G1SDATD 0x80
6137 //==============================================================================
6140 //==============================================================================
6143 extern __at(0x0E0F) __sfr PPSLOCK
;
6147 unsigned PPSLOCKED
: 1;
6157 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits
;
6159 #define _PPSLOCKED 0x01
6161 //==============================================================================
6163 extern __at(0x0E10) __sfr INTPPS
;
6164 extern __at(0x0E11) __sfr T0CKIPPS
;
6165 extern __at(0x0E12) __sfr T1CKIPPS
;
6166 extern __at(0x0E13) __sfr T1GPPS
;
6167 extern __at(0x0E14) __sfr CCP1PPS
;
6168 extern __at(0x0E15) __sfr CCP2PPS
;
6169 extern __at(0x0E17) __sfr COGINPPS
;
6170 extern __at(0x0E20) __sfr SSPCLKPPS
;
6171 extern __at(0x0E21) __sfr SSPDATPPS
;
6172 extern __at(0x0E22) __sfr SSPSSPPS
;
6173 extern __at(0x0E24) __sfr RXPPS
;
6174 extern __at(0x0E25) __sfr CKPPS
;
6175 extern __at(0x0E28) __sfr CLCIN0PPS
;
6176 extern __at(0x0E29) __sfr CLCIN1PPS
;
6177 extern __at(0x0E2A) __sfr CLCIN2PPS
;
6178 extern __at(0x0E2B) __sfr CLCIN3PPS
;
6179 extern __at(0x0E90) __sfr RA0PPS
;
6180 extern __at(0x0E91) __sfr RA1PPS
;
6181 extern __at(0x0E92) __sfr RA2PPS
;
6182 extern __at(0x0E93) __sfr RA3PPS
;
6183 extern __at(0x0E94) __sfr RA4PPS
;
6184 extern __at(0x0E95) __sfr RA5PPS
;
6185 extern __at(0x0E96) __sfr RA6PPS
;
6186 extern __at(0x0E97) __sfr RA7PPS
;
6187 extern __at(0x0E98) __sfr RB0PPS
;
6188 extern __at(0x0E99) __sfr RB1PPS
;
6189 extern __at(0x0E9A) __sfr RB2PPS
;
6190 extern __at(0x0E9B) __sfr RB3PPS
;
6191 extern __at(0x0E9C) __sfr RB4PPS
;
6192 extern __at(0x0E9D) __sfr RB5PPS
;
6193 extern __at(0x0E9E) __sfr RB6PPS
;
6194 extern __at(0x0E9F) __sfr RB7PPS
;
6195 extern __at(0x0EA0) __sfr RC0PPS
;
6196 extern __at(0x0EA1) __sfr RC1PPS
;
6197 extern __at(0x0EA2) __sfr RC2PPS
;
6198 extern __at(0x0EA3) __sfr RC3PPS
;
6199 extern __at(0x0EA4) __sfr RC4PPS
;
6200 extern __at(0x0EA5) __sfr RC5PPS
;
6201 extern __at(0x0EA6) __sfr RC6PPS
;
6202 extern __at(0x0EA7) __sfr RC7PPS
;
6203 extern __at(0x0EA8) __sfr RD0PPS
;
6204 extern __at(0x0EA9) __sfr RD1PPS
;
6205 extern __at(0x0EAA) __sfr RD2PPS
;
6206 extern __at(0x0EAB) __sfr RD3PPS
;
6207 extern __at(0x0EAC) __sfr RD4PPS
;
6208 extern __at(0x0EAD) __sfr RD5PPS
;
6209 extern __at(0x0EAE) __sfr RD6PPS
;
6210 extern __at(0x0EAF) __sfr RD7PPS
;
6211 extern __at(0x0EB0) __sfr RE0PPS
;
6212 extern __at(0x0EB1) __sfr RE1PPS
;
6213 extern __at(0x0EB2) __sfr RE2PPS
;
6215 //==============================================================================
6218 extern __at(0x0F0F) __sfr CLCDATA
;
6224 unsigned MLC1OUT
: 1;
6225 unsigned MLC2OUT
: 1;
6226 unsigned MLC3OUT
: 1;
6227 unsigned MLC4OUT
: 1;
6236 unsigned MCLC1OUT
: 1;
6237 unsigned MCLC2OUT
: 1;
6238 unsigned MCLC3OUT
: 1;
6239 unsigned MCLC4OUT
: 1;
6247 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits
;
6249 #define _MLC1OUT 0x01
6250 #define _MCLC1OUT 0x01
6251 #define _MLC2OUT 0x02
6252 #define _MCLC2OUT 0x02
6253 #define _MLC3OUT 0x04
6254 #define _MCLC3OUT 0x04
6255 #define _MLC4OUT 0x08
6256 #define _MCLC4OUT 0x08
6258 //==============================================================================
6261 //==============================================================================
6264 extern __at(0x0F10) __sfr CLC1CON
;
6270 unsigned LC1MODE0
: 1;
6271 unsigned LC1MODE1
: 1;
6272 unsigned LC1MODE2
: 1;
6273 unsigned LC1INTN
: 1;
6274 unsigned LC1INTP
: 1;
6275 unsigned LC1OUT
: 1;
6300 unsigned LC1MODE
: 3;
6305 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits
;
6307 #define _LC1MODE0 0x01
6309 #define _LC1MODE1 0x02
6311 #define _LC1MODE2 0x04
6313 #define _LC1INTN 0x08
6315 #define _LC1INTP 0x10
6317 #define _LC1OUT 0x20
6322 //==============================================================================
6325 //==============================================================================
6328 extern __at(0x0F11) __sfr CLC1POL
;
6334 unsigned LC1G1POL
: 1;
6335 unsigned LC1G2POL
: 1;
6336 unsigned LC1G3POL
: 1;
6337 unsigned LC1G4POL
: 1;
6341 unsigned LC1POL
: 1;
6357 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits
;
6359 #define _LC1G1POL 0x01
6361 #define _LC1G2POL 0x02
6363 #define _LC1G3POL 0x04
6365 #define _LC1G4POL 0x08
6367 #define _LC1POL 0x80
6370 //==============================================================================
6373 //==============================================================================
6376 extern __at(0x0F12) __sfr CLC1SEL0
;
6382 unsigned LC1D1S0
: 1;
6383 unsigned LC1D1S1
: 1;
6384 unsigned LC1D1S2
: 1;
6385 unsigned LC1D1S3
: 1;
6386 unsigned LC1D1S4
: 1;
6406 unsigned LC1D1S
: 5;
6417 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
6419 #define _LC1D1S0 0x01
6421 #define _LC1D1S1 0x02
6423 #define _LC1D1S2 0x04
6425 #define _LC1D1S3 0x08
6427 #define _LC1D1S4 0x10
6430 //==============================================================================
6433 //==============================================================================
6436 extern __at(0x0F13) __sfr CLC1SEL1
;
6442 unsigned LC1D2S0
: 1;
6443 unsigned LC1D2S1
: 1;
6444 unsigned LC1D2S2
: 1;
6445 unsigned LC1D2S3
: 1;
6446 unsigned LC1D2S4
: 1;
6466 unsigned LC1D2S
: 5;
6477 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
6479 #define _LC1D2S0 0x01
6481 #define _LC1D2S1 0x02
6483 #define _LC1D2S2 0x04
6485 #define _LC1D2S3 0x08
6487 #define _LC1D2S4 0x10
6490 //==============================================================================
6493 //==============================================================================
6496 extern __at(0x0F14) __sfr CLC1SEL2
;
6502 unsigned LC1D3S0
: 1;
6503 unsigned LC1D3S1
: 1;
6504 unsigned LC1D3S2
: 1;
6505 unsigned LC1D3S3
: 1;
6506 unsigned LC1D3S4
: 1;
6526 unsigned LC1D3S
: 5;
6537 extern __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
6539 #define _LC1D3S0 0x01
6541 #define _LC1D3S1 0x02
6543 #define _LC1D3S2 0x04
6545 #define _LC1D3S3 0x08
6547 #define _LC1D3S4 0x10
6550 //==============================================================================
6553 //==============================================================================
6556 extern __at(0x0F15) __sfr CLC1SEL3
;
6562 unsigned LC1D4S0
: 1;
6563 unsigned LC1D4S1
: 1;
6564 unsigned LC1D4S2
: 1;
6565 unsigned LC1D4S3
: 1;
6566 unsigned LC1D4S4
: 1;
6586 unsigned LC1D4S
: 5;
6597 extern __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
6599 #define _LC1D4S0 0x01
6601 #define _LC1D4S1 0x02
6603 #define _LC1D4S2 0x04
6605 #define _LC1D4S3 0x08
6607 #define _LC1D4S4 0x10
6610 //==============================================================================
6613 //==============================================================================
6616 extern __at(0x0F16) __sfr CLC1GLS0
;
6622 unsigned LC1G1D1N
: 1;
6623 unsigned LC1G1D1T
: 1;
6624 unsigned LC1G1D2N
: 1;
6625 unsigned LC1G1D2T
: 1;
6626 unsigned LC1G1D3N
: 1;
6627 unsigned LC1G1D3T
: 1;
6628 unsigned LC1G1D4N
: 1;
6629 unsigned LC1G1D4T
: 1;
6645 extern __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
6647 #define _LC1G1D1N 0x01
6649 #define _LC1G1D1T 0x02
6651 #define _LC1G1D2N 0x04
6653 #define _LC1G1D2T 0x08
6655 #define _LC1G1D3N 0x10
6657 #define _LC1G1D3T 0x20
6659 #define _LC1G1D4N 0x40
6661 #define _LC1G1D4T 0x80
6664 //==============================================================================
6667 //==============================================================================
6670 extern __at(0x0F17) __sfr CLC1GLS1
;
6676 unsigned LC1G2D1N
: 1;
6677 unsigned LC1G2D1T
: 1;
6678 unsigned LC1G2D2N
: 1;
6679 unsigned LC1G2D2T
: 1;
6680 unsigned LC1G2D3N
: 1;
6681 unsigned LC1G2D3T
: 1;
6682 unsigned LC1G2D4N
: 1;
6683 unsigned LC1G2D4T
: 1;
6699 extern __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
6701 #define _CLC1GLS1_LC1G2D1N 0x01
6702 #define _CLC1GLS1_D1N 0x01
6703 #define _CLC1GLS1_LC1G2D1T 0x02
6704 #define _CLC1GLS1_D1T 0x02
6705 #define _CLC1GLS1_LC1G2D2N 0x04
6706 #define _CLC1GLS1_D2N 0x04
6707 #define _CLC1GLS1_LC1G2D2T 0x08
6708 #define _CLC1GLS1_D2T 0x08
6709 #define _CLC1GLS1_LC1G2D3N 0x10
6710 #define _CLC1GLS1_D3N 0x10
6711 #define _CLC1GLS1_LC1G2D3T 0x20
6712 #define _CLC1GLS1_D3T 0x20
6713 #define _CLC1GLS1_LC1G2D4N 0x40
6714 #define _CLC1GLS1_D4N 0x40
6715 #define _CLC1GLS1_LC1G2D4T 0x80
6716 #define _CLC1GLS1_D4T 0x80
6718 //==============================================================================
6721 //==============================================================================
6724 extern __at(0x0F18) __sfr CLC1GLS2
;
6730 unsigned LC1G3D1N
: 1;
6731 unsigned LC1G3D1T
: 1;
6732 unsigned LC1G3D2N
: 1;
6733 unsigned LC1G3D2T
: 1;
6734 unsigned LC1G3D3N
: 1;
6735 unsigned LC1G3D3T
: 1;
6736 unsigned LC1G3D4N
: 1;
6737 unsigned LC1G3D4T
: 1;
6753 extern __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
6755 #define _CLC1GLS2_LC1G3D1N 0x01
6756 #define _CLC1GLS2_D1N 0x01
6757 #define _CLC1GLS2_LC1G3D1T 0x02
6758 #define _CLC1GLS2_D1T 0x02
6759 #define _CLC1GLS2_LC1G3D2N 0x04
6760 #define _CLC1GLS2_D2N 0x04
6761 #define _CLC1GLS2_LC1G3D2T 0x08
6762 #define _CLC1GLS2_D2T 0x08
6763 #define _CLC1GLS2_LC1G3D3N 0x10
6764 #define _CLC1GLS2_D3N 0x10
6765 #define _CLC1GLS2_LC1G3D3T 0x20
6766 #define _CLC1GLS2_D3T 0x20
6767 #define _CLC1GLS2_LC1G3D4N 0x40
6768 #define _CLC1GLS2_D4N 0x40
6769 #define _CLC1GLS2_LC1G3D4T 0x80
6770 #define _CLC1GLS2_D4T 0x80
6772 //==============================================================================
6775 //==============================================================================
6778 extern __at(0x0F19) __sfr CLC1GLS3
;
6784 unsigned LC1G4D1N
: 1;
6785 unsigned LC1G4D1T
: 1;
6786 unsigned LC1G4D2N
: 1;
6787 unsigned LC1G4D2T
: 1;
6788 unsigned LC1G4D3N
: 1;
6789 unsigned LC1G4D3T
: 1;
6790 unsigned LC1G4D4N
: 1;
6791 unsigned LC1G4D4T
: 1;
6807 extern __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
6809 #define _LC1G4D1N 0x01
6811 #define _LC1G4D1T 0x02
6813 #define _LC1G4D2N 0x04
6815 #define _LC1G4D2T 0x08
6817 #define _LC1G4D3N 0x10
6819 #define _LC1G4D3T 0x20
6821 #define _LC1G4D4N 0x40
6823 #define _LC1G4D4T 0x80
6826 //==============================================================================
6829 //==============================================================================
6832 extern __at(0x0F1A) __sfr CLC2CON
;
6838 unsigned LC2MODE0
: 1;
6839 unsigned LC2MODE1
: 1;
6840 unsigned LC2MODE2
: 1;
6841 unsigned LC2INTN
: 1;
6842 unsigned LC2INTP
: 1;
6843 unsigned LC2OUT
: 1;
6862 unsigned LC2MODE
: 3;
6873 extern __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits
;
6875 #define _CLC2CON_LC2MODE0 0x01
6876 #define _CLC2CON_MODE0 0x01
6877 #define _CLC2CON_LC2MODE1 0x02
6878 #define _CLC2CON_MODE1 0x02
6879 #define _CLC2CON_LC2MODE2 0x04
6880 #define _CLC2CON_MODE2 0x04
6881 #define _CLC2CON_LC2INTN 0x08
6882 #define _CLC2CON_INTN 0x08
6883 #define _CLC2CON_LC2INTP 0x10
6884 #define _CLC2CON_INTP 0x10
6885 #define _CLC2CON_LC2OUT 0x20
6886 #define _CLC2CON_OUT 0x20
6887 #define _CLC2CON_LC2EN 0x80
6888 #define _CLC2CON_EN 0x80
6890 //==============================================================================
6893 //==============================================================================
6896 extern __at(0x0F1B) __sfr CLC2POL
;
6902 unsigned LC2G1POL
: 1;
6903 unsigned LC2G2POL
: 1;
6904 unsigned LC2G3POL
: 1;
6905 unsigned LC2G4POL
: 1;
6909 unsigned LC2POL
: 1;
6925 extern __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits
;
6927 #define _CLC2POL_LC2G1POL 0x01
6928 #define _CLC2POL_G1POL 0x01
6929 #define _CLC2POL_LC2G2POL 0x02
6930 #define _CLC2POL_G2POL 0x02
6931 #define _CLC2POL_LC2G3POL 0x04
6932 #define _CLC2POL_G3POL 0x04
6933 #define _CLC2POL_LC2G4POL 0x08
6934 #define _CLC2POL_G4POL 0x08
6935 #define _CLC2POL_LC2POL 0x80
6936 #define _CLC2POL_POL 0x80
6938 //==============================================================================
6941 //==============================================================================
6944 extern __at(0x0F1C) __sfr CLC2SEL0
;
6950 unsigned LC2D1S0
: 1;
6951 unsigned LC2D1S1
: 1;
6952 unsigned LC2D1S2
: 1;
6953 unsigned LC2D1S3
: 1;
6954 unsigned LC2D1S4
: 1;
6980 unsigned LC2D1S
: 5;
6985 extern __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
6987 #define _CLC2SEL0_LC2D1S0 0x01
6988 #define _CLC2SEL0_D1S0 0x01
6989 #define _CLC2SEL0_LC2D1S1 0x02
6990 #define _CLC2SEL0_D1S1 0x02
6991 #define _CLC2SEL0_LC2D1S2 0x04
6992 #define _CLC2SEL0_D1S2 0x04
6993 #define _CLC2SEL0_LC2D1S3 0x08
6994 #define _CLC2SEL0_D1S3 0x08
6995 #define _CLC2SEL0_LC2D1S4 0x10
6996 #define _CLC2SEL0_D1S4 0x10
6998 //==============================================================================
7001 //==============================================================================
7004 extern __at(0x0F1D) __sfr CLC2SEL1
;
7010 unsigned LC2D2S0
: 1;
7011 unsigned LC2D2S1
: 1;
7012 unsigned LC2D2S2
: 1;
7013 unsigned LC2D2S3
: 1;
7014 unsigned LC2D2S4
: 1;
7034 unsigned LC2D2S
: 5;
7045 extern __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
7047 #define _CLC2SEL1_LC2D2S0 0x01
7048 #define _CLC2SEL1_D2S0 0x01
7049 #define _CLC2SEL1_LC2D2S1 0x02
7050 #define _CLC2SEL1_D2S1 0x02
7051 #define _CLC2SEL1_LC2D2S2 0x04
7052 #define _CLC2SEL1_D2S2 0x04
7053 #define _CLC2SEL1_LC2D2S3 0x08
7054 #define _CLC2SEL1_D2S3 0x08
7055 #define _CLC2SEL1_LC2D2S4 0x10
7056 #define _CLC2SEL1_D2S4 0x10
7058 //==============================================================================
7061 //==============================================================================
7064 extern __at(0x0F1E) __sfr CLC2SEL2
;
7070 unsigned LC2D3S0
: 1;
7071 unsigned LC2D3S1
: 1;
7072 unsigned LC2D3S2
: 1;
7073 unsigned LC2D3S3
: 1;
7074 unsigned LC2D3S4
: 1;
7094 unsigned LC2D3S
: 5;
7105 extern __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
7107 #define _CLC2SEL2_LC2D3S0 0x01
7108 #define _CLC2SEL2_D3S0 0x01
7109 #define _CLC2SEL2_LC2D3S1 0x02
7110 #define _CLC2SEL2_D3S1 0x02
7111 #define _CLC2SEL2_LC2D3S2 0x04
7112 #define _CLC2SEL2_D3S2 0x04
7113 #define _CLC2SEL2_LC2D3S3 0x08
7114 #define _CLC2SEL2_D3S3 0x08
7115 #define _CLC2SEL2_LC2D3S4 0x10
7116 #define _CLC2SEL2_D3S4 0x10
7118 //==============================================================================
7121 //==============================================================================
7124 extern __at(0x0F1F) __sfr CLC2SEL3
;
7130 unsigned LC2D4S0
: 1;
7131 unsigned LC2D4S1
: 1;
7132 unsigned LC2D4S2
: 1;
7133 unsigned LC2D4S3
: 1;
7134 unsigned LC2D4S4
: 1;
7154 unsigned LC2D4S
: 5;
7165 extern __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
7167 #define _CLC2SEL3_LC2D4S0 0x01
7168 #define _CLC2SEL3_D4S0 0x01
7169 #define _CLC2SEL3_LC2D4S1 0x02
7170 #define _CLC2SEL3_D4S1 0x02
7171 #define _CLC2SEL3_LC2D4S2 0x04
7172 #define _CLC2SEL3_D4S2 0x04
7173 #define _CLC2SEL3_LC2D4S3 0x08
7174 #define _CLC2SEL3_D4S3 0x08
7175 #define _CLC2SEL3_LC2D4S4 0x10
7176 #define _CLC2SEL3_D4S4 0x10
7178 //==============================================================================
7181 //==============================================================================
7184 extern __at(0x0F20) __sfr CLC2GLS0
;
7190 unsigned LC2G1D1N
: 1;
7191 unsigned LC2G1D1T
: 1;
7192 unsigned LC2G1D2N
: 1;
7193 unsigned LC2G1D2T
: 1;
7194 unsigned LC2G1D3N
: 1;
7195 unsigned LC2G1D3T
: 1;
7196 unsigned LC2G1D4N
: 1;
7197 unsigned LC2G1D4T
: 1;
7213 extern __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
7215 #define _CLC2GLS0_LC2G1D1N 0x01
7216 #define _CLC2GLS0_D1N 0x01
7217 #define _CLC2GLS0_LC2G1D1T 0x02
7218 #define _CLC2GLS0_D1T 0x02
7219 #define _CLC2GLS0_LC2G1D2N 0x04
7220 #define _CLC2GLS0_D2N 0x04
7221 #define _CLC2GLS0_LC2G1D2T 0x08
7222 #define _CLC2GLS0_D2T 0x08
7223 #define _CLC2GLS0_LC2G1D3N 0x10
7224 #define _CLC2GLS0_D3N 0x10
7225 #define _CLC2GLS0_LC2G1D3T 0x20
7226 #define _CLC2GLS0_D3T 0x20
7227 #define _CLC2GLS0_LC2G1D4N 0x40
7228 #define _CLC2GLS0_D4N 0x40
7229 #define _CLC2GLS0_LC2G1D4T 0x80
7230 #define _CLC2GLS0_D4T 0x80
7232 //==============================================================================
7235 //==============================================================================
7238 extern __at(0x0F21) __sfr CLC2GLS1
;
7244 unsigned LC2G2D1N
: 1;
7245 unsigned LC2G2D1T
: 1;
7246 unsigned LC2G2D2N
: 1;
7247 unsigned LC2G2D2T
: 1;
7248 unsigned LC2G2D3N
: 1;
7249 unsigned LC2G2D3T
: 1;
7250 unsigned LC2G2D4N
: 1;
7251 unsigned LC2G2D4T
: 1;
7267 extern __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
7269 #define _CLC2GLS1_LC2G2D1N 0x01
7270 #define _CLC2GLS1_D1N 0x01
7271 #define _CLC2GLS1_LC2G2D1T 0x02
7272 #define _CLC2GLS1_D1T 0x02
7273 #define _CLC2GLS1_LC2G2D2N 0x04
7274 #define _CLC2GLS1_D2N 0x04
7275 #define _CLC2GLS1_LC2G2D2T 0x08
7276 #define _CLC2GLS1_D2T 0x08
7277 #define _CLC2GLS1_LC2G2D3N 0x10
7278 #define _CLC2GLS1_D3N 0x10
7279 #define _CLC2GLS1_LC2G2D3T 0x20
7280 #define _CLC2GLS1_D3T 0x20
7281 #define _CLC2GLS1_LC2G2D4N 0x40
7282 #define _CLC2GLS1_D4N 0x40
7283 #define _CLC2GLS1_LC2G2D4T 0x80
7284 #define _CLC2GLS1_D4T 0x80
7286 //==============================================================================
7289 //==============================================================================
7292 extern __at(0x0F22) __sfr CLC2GLS2
;
7298 unsigned LC2G3D1N
: 1;
7299 unsigned LC2G3D1T
: 1;
7300 unsigned LC2G3D2N
: 1;
7301 unsigned LC2G3D2T
: 1;
7302 unsigned LC2G3D3N
: 1;
7303 unsigned LC2G3D3T
: 1;
7304 unsigned LC2G3D4N
: 1;
7305 unsigned LC2G3D4T
: 1;
7321 extern __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
7323 #define _CLC2GLS2_LC2G3D1N 0x01
7324 #define _CLC2GLS2_D1N 0x01
7325 #define _CLC2GLS2_LC2G3D1T 0x02
7326 #define _CLC2GLS2_D1T 0x02
7327 #define _CLC2GLS2_LC2G3D2N 0x04
7328 #define _CLC2GLS2_D2N 0x04
7329 #define _CLC2GLS2_LC2G3D2T 0x08
7330 #define _CLC2GLS2_D2T 0x08
7331 #define _CLC2GLS2_LC2G3D3N 0x10
7332 #define _CLC2GLS2_D3N 0x10
7333 #define _CLC2GLS2_LC2G3D3T 0x20
7334 #define _CLC2GLS2_D3T 0x20
7335 #define _CLC2GLS2_LC2G3D4N 0x40
7336 #define _CLC2GLS2_D4N 0x40
7337 #define _CLC2GLS2_LC2G3D4T 0x80
7338 #define _CLC2GLS2_D4T 0x80
7340 //==============================================================================
7343 //==============================================================================
7346 extern __at(0x0F23) __sfr CLC2GLS3
;
7352 unsigned LC2G4D1N
: 1;
7353 unsigned LC2G4D1T
: 1;
7354 unsigned LC2G4D2N
: 1;
7355 unsigned LC2G4D2T
: 1;
7356 unsigned LC2G4D3N
: 1;
7357 unsigned LC2G4D3T
: 1;
7358 unsigned LC2G4D4N
: 1;
7359 unsigned LC2G4D4T
: 1;
7375 extern __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
7377 #define _CLC2GLS3_LC2G4D1N 0x01
7378 #define _CLC2GLS3_G4D1N 0x01
7379 #define _CLC2GLS3_LC2G4D1T 0x02
7380 #define _CLC2GLS3_G4D1T 0x02
7381 #define _CLC2GLS3_LC2G4D2N 0x04
7382 #define _CLC2GLS3_G4D2N 0x04
7383 #define _CLC2GLS3_LC2G4D2T 0x08
7384 #define _CLC2GLS3_G4D2T 0x08
7385 #define _CLC2GLS3_LC2G4D3N 0x10
7386 #define _CLC2GLS3_G4D3N 0x10
7387 #define _CLC2GLS3_LC2G4D3T 0x20
7388 #define _CLC2GLS3_G4D3T 0x20
7389 #define _CLC2GLS3_LC2G4D4N 0x40
7390 #define _CLC2GLS3_G4D4N 0x40
7391 #define _CLC2GLS3_LC2G4D4T 0x80
7392 #define _CLC2GLS3_G4D4T 0x80
7394 //==============================================================================
7397 //==============================================================================
7400 extern __at(0x0F24) __sfr CLC3CON
;
7406 unsigned LC3MODE0
: 1;
7407 unsigned LC3MODE1
: 1;
7408 unsigned LC3MODE2
: 1;
7409 unsigned LC3INTN
: 1;
7410 unsigned LC3INTP
: 1;
7411 unsigned LC3OUT
: 1;
7430 unsigned LC3MODE
: 3;
7441 extern __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits
;
7443 #define _CLC3CON_LC3MODE0 0x01
7444 #define _CLC3CON_MODE0 0x01
7445 #define _CLC3CON_LC3MODE1 0x02
7446 #define _CLC3CON_MODE1 0x02
7447 #define _CLC3CON_LC3MODE2 0x04
7448 #define _CLC3CON_MODE2 0x04
7449 #define _CLC3CON_LC3INTN 0x08
7450 #define _CLC3CON_INTN 0x08
7451 #define _CLC3CON_LC3INTP 0x10
7452 #define _CLC3CON_INTP 0x10
7453 #define _CLC3CON_LC3OUT 0x20
7454 #define _CLC3CON_OUT 0x20
7455 #define _CLC3CON_LC3EN 0x80
7456 #define _CLC3CON_EN 0x80
7458 //==============================================================================
7461 //==============================================================================
7464 extern __at(0x0F25) __sfr CLC3POL
;
7470 unsigned LC3G1POL
: 1;
7471 unsigned LC3G2POL
: 1;
7472 unsigned LC3G3POL
: 1;
7473 unsigned LC3G4POL
: 1;
7477 unsigned LC3POL
: 1;
7493 extern __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits
;
7495 #define _CLC3POL_LC3G1POL 0x01
7496 #define _CLC3POL_G1POL 0x01
7497 #define _CLC3POL_LC3G2POL 0x02
7498 #define _CLC3POL_G2POL 0x02
7499 #define _CLC3POL_LC3G3POL 0x04
7500 #define _CLC3POL_G3POL 0x04
7501 #define _CLC3POL_LC3G4POL 0x08
7502 #define _CLC3POL_G4POL 0x08
7503 #define _CLC3POL_LC3POL 0x80
7504 #define _CLC3POL_POL 0x80
7506 //==============================================================================
7509 //==============================================================================
7512 extern __at(0x0F26) __sfr CLC3SEL0
;
7518 unsigned LC3D1S0
: 1;
7519 unsigned LC3D1S1
: 1;
7520 unsigned LC3D1S2
: 1;
7521 unsigned LC3D1S3
: 1;
7522 unsigned LC3D1S4
: 1;
7542 unsigned LC3D1S
: 5;
7553 extern __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
7555 #define _CLC3SEL0_LC3D1S0 0x01
7556 #define _CLC3SEL0_D1S0 0x01
7557 #define _CLC3SEL0_LC3D1S1 0x02
7558 #define _CLC3SEL0_D1S1 0x02
7559 #define _CLC3SEL0_LC3D1S2 0x04
7560 #define _CLC3SEL0_D1S2 0x04
7561 #define _CLC3SEL0_LC3D1S3 0x08
7562 #define _CLC3SEL0_D1S3 0x08
7563 #define _CLC3SEL0_LC3D1S4 0x10
7564 #define _CLC3SEL0_D1S4 0x10
7566 //==============================================================================
7569 //==============================================================================
7572 extern __at(0x0F27) __sfr CLC3SEL1
;
7578 unsigned LC3D2S0
: 1;
7579 unsigned LC3D2S1
: 1;
7580 unsigned LC3D2S2
: 1;
7581 unsigned LC3D2S3
: 1;
7582 unsigned LC3D2S4
: 1;
7608 unsigned LC3D2S
: 5;
7613 extern __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
7615 #define _CLC3SEL1_LC3D2S0 0x01
7616 #define _CLC3SEL1_D2S0 0x01
7617 #define _CLC3SEL1_LC3D2S1 0x02
7618 #define _CLC3SEL1_D2S1 0x02
7619 #define _CLC3SEL1_LC3D2S2 0x04
7620 #define _CLC3SEL1_D2S2 0x04
7621 #define _CLC3SEL1_LC3D2S3 0x08
7622 #define _CLC3SEL1_D2S3 0x08
7623 #define _CLC3SEL1_LC3D2S4 0x10
7624 #define _CLC3SEL1_D2S4 0x10
7626 //==============================================================================
7629 //==============================================================================
7632 extern __at(0x0F28) __sfr CLC3SEL2
;
7638 unsigned LC3D3S0
: 1;
7639 unsigned LC3D3S1
: 1;
7640 unsigned LC3D3S2
: 1;
7641 unsigned LC3D3S3
: 1;
7642 unsigned LC3D3S4
: 1;
7662 unsigned LC3D3S
: 5;
7673 extern __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
7675 #define _CLC3SEL2_LC3D3S0 0x01
7676 #define _CLC3SEL2_D3S0 0x01
7677 #define _CLC3SEL2_LC3D3S1 0x02
7678 #define _CLC3SEL2_D3S1 0x02
7679 #define _CLC3SEL2_LC3D3S2 0x04
7680 #define _CLC3SEL2_D3S2 0x04
7681 #define _CLC3SEL2_LC3D3S3 0x08
7682 #define _CLC3SEL2_D3S3 0x08
7683 #define _CLC3SEL2_LC3D3S4 0x10
7684 #define _CLC3SEL2_D3S4 0x10
7686 //==============================================================================
7689 //==============================================================================
7692 extern __at(0x0F29) __sfr CLC3SEL3
;
7698 unsigned LC3D4S0
: 1;
7699 unsigned LC3D4S1
: 1;
7700 unsigned LC3D4S2
: 1;
7701 unsigned LC3D4S3
: 1;
7702 unsigned LC3D4S4
: 1;
7722 unsigned LC3D4S
: 5;
7733 extern __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
7735 #define _CLC3SEL3_LC3D4S0 0x01
7736 #define _CLC3SEL3_D4S0 0x01
7737 #define _CLC3SEL3_LC3D4S1 0x02
7738 #define _CLC3SEL3_D4S1 0x02
7739 #define _CLC3SEL3_LC3D4S2 0x04
7740 #define _CLC3SEL3_D4S2 0x04
7741 #define _CLC3SEL3_LC3D4S3 0x08
7742 #define _CLC3SEL3_D4S3 0x08
7743 #define _CLC3SEL3_LC3D4S4 0x10
7744 #define _CLC3SEL3_D4S4 0x10
7746 //==============================================================================
7749 //==============================================================================
7752 extern __at(0x0F2A) __sfr CLC3GLS0
;
7758 unsigned LC3G1D1N
: 1;
7759 unsigned LC3G1D1T
: 1;
7760 unsigned LC3G1D2N
: 1;
7761 unsigned LC3G1D2T
: 1;
7762 unsigned LC3G1D3N
: 1;
7763 unsigned LC3G1D3T
: 1;
7764 unsigned LC3G1D4N
: 1;
7765 unsigned LC3G1D4T
: 1;
7781 extern __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
7783 #define _CLC3GLS0_LC3G1D1N 0x01
7784 #define _CLC3GLS0_D1N 0x01
7785 #define _CLC3GLS0_LC3G1D1T 0x02
7786 #define _CLC3GLS0_D1T 0x02
7787 #define _CLC3GLS0_LC3G1D2N 0x04
7788 #define _CLC3GLS0_D2N 0x04
7789 #define _CLC3GLS0_LC3G1D2T 0x08
7790 #define _CLC3GLS0_D2T 0x08
7791 #define _CLC3GLS0_LC3G1D3N 0x10
7792 #define _CLC3GLS0_D3N 0x10
7793 #define _CLC3GLS0_LC3G1D3T 0x20
7794 #define _CLC3GLS0_D3T 0x20
7795 #define _CLC3GLS0_LC3G1D4N 0x40
7796 #define _CLC3GLS0_D4N 0x40
7797 #define _CLC3GLS0_LC3G1D4T 0x80
7798 #define _CLC3GLS0_D4T 0x80
7800 //==============================================================================
7803 //==============================================================================
7806 extern __at(0x0F2B) __sfr CLC3GLS1
;
7812 unsigned LC3G2D1N
: 1;
7813 unsigned LC3G2D1T
: 1;
7814 unsigned LC3G2D2N
: 1;
7815 unsigned LC3G2D2T
: 1;
7816 unsigned LC3G2D3N
: 1;
7817 unsigned LC3G2D3T
: 1;
7818 unsigned LC3G2D4N
: 1;
7819 unsigned LC3G2D4T
: 1;
7835 extern __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
7837 #define _CLC3GLS1_LC3G2D1N 0x01
7838 #define _CLC3GLS1_D1N 0x01
7839 #define _CLC3GLS1_LC3G2D1T 0x02
7840 #define _CLC3GLS1_D1T 0x02
7841 #define _CLC3GLS1_LC3G2D2N 0x04
7842 #define _CLC3GLS1_D2N 0x04
7843 #define _CLC3GLS1_LC3G2D2T 0x08
7844 #define _CLC3GLS1_D2T 0x08
7845 #define _CLC3GLS1_LC3G2D3N 0x10
7846 #define _CLC3GLS1_D3N 0x10
7847 #define _CLC3GLS1_LC3G2D3T 0x20
7848 #define _CLC3GLS1_D3T 0x20
7849 #define _CLC3GLS1_LC3G2D4N 0x40
7850 #define _CLC3GLS1_D4N 0x40
7851 #define _CLC3GLS1_LC3G2D4T 0x80
7852 #define _CLC3GLS1_D4T 0x80
7854 //==============================================================================
7857 //==============================================================================
7860 extern __at(0x0F2C) __sfr CLC3GLS2
;
7866 unsigned LC3G3D1N
: 1;
7867 unsigned LC3G3D1T
: 1;
7868 unsigned LC3G3D2N
: 1;
7869 unsigned LC3G3D2T
: 1;
7870 unsigned LC3G3D3N
: 1;
7871 unsigned LC3G3D3T
: 1;
7872 unsigned LC3G3D4N
: 1;
7873 unsigned LC3G3D4T
: 1;
7889 extern __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
7891 #define _CLC3GLS2_LC3G3D1N 0x01
7892 #define _CLC3GLS2_D1N 0x01
7893 #define _CLC3GLS2_LC3G3D1T 0x02
7894 #define _CLC3GLS2_D1T 0x02
7895 #define _CLC3GLS2_LC3G3D2N 0x04
7896 #define _CLC3GLS2_D2N 0x04
7897 #define _CLC3GLS2_LC3G3D2T 0x08
7898 #define _CLC3GLS2_D2T 0x08
7899 #define _CLC3GLS2_LC3G3D3N 0x10
7900 #define _CLC3GLS2_D3N 0x10
7901 #define _CLC3GLS2_LC3G3D3T 0x20
7902 #define _CLC3GLS2_D3T 0x20
7903 #define _CLC3GLS2_LC3G3D4N 0x40
7904 #define _CLC3GLS2_D4N 0x40
7905 #define _CLC3GLS2_LC3G3D4T 0x80
7906 #define _CLC3GLS2_D4T 0x80
7908 //==============================================================================
7911 //==============================================================================
7914 extern __at(0x0F2D) __sfr CLC3GLS3
;
7920 unsigned LC3G4D1N
: 1;
7921 unsigned LC3G4D1T
: 1;
7922 unsigned LC3G4D2N
: 1;
7923 unsigned LC3G4D2T
: 1;
7924 unsigned LC3G4D3N
: 1;
7925 unsigned LC3G4D3T
: 1;
7926 unsigned LC3G4D4N
: 1;
7927 unsigned LC3G4D4T
: 1;
7943 extern __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
7945 #define _CLC3GLS3_LC3G4D1N 0x01
7946 #define _CLC3GLS3_G4D1N 0x01
7947 #define _CLC3GLS3_LC3G4D1T 0x02
7948 #define _CLC3GLS3_G4D1T 0x02
7949 #define _CLC3GLS3_LC3G4D2N 0x04
7950 #define _CLC3GLS3_G4D2N 0x04
7951 #define _CLC3GLS3_LC3G4D2T 0x08
7952 #define _CLC3GLS3_G4D2T 0x08
7953 #define _CLC3GLS3_LC3G4D3N 0x10
7954 #define _CLC3GLS3_G4D3N 0x10
7955 #define _CLC3GLS3_LC3G4D3T 0x20
7956 #define _CLC3GLS3_G4D3T 0x20
7957 #define _CLC3GLS3_LC3G4D4N 0x40
7958 #define _CLC3GLS3_G4D4N 0x40
7959 #define _CLC3GLS3_LC3G4D4T 0x80
7960 #define _CLC3GLS3_G4D4T 0x80
7962 //==============================================================================
7965 //==============================================================================
7968 extern __at(0x0F2E) __sfr CLC4CON
;
7974 unsigned LC4MODE0
: 1;
7975 unsigned LC4MODE1
: 1;
7976 unsigned LC4MODE2
: 1;
7977 unsigned LC4INTN
: 1;
7978 unsigned LC4INTP
: 1;
7979 unsigned LC4OUT
: 1;
8004 unsigned LC4MODE
: 3;
8009 extern __at(0x0F2E) volatile __CLC4CONbits_t CLC4CONbits
;
8011 #define _CLC4CON_LC4MODE0 0x01
8012 #define _CLC4CON_MODE0 0x01
8013 #define _CLC4CON_LC4MODE1 0x02
8014 #define _CLC4CON_MODE1 0x02
8015 #define _CLC4CON_LC4MODE2 0x04
8016 #define _CLC4CON_MODE2 0x04
8017 #define _CLC4CON_LC4INTN 0x08
8018 #define _CLC4CON_INTN 0x08
8019 #define _CLC4CON_LC4INTP 0x10
8020 #define _CLC4CON_INTP 0x10
8021 #define _CLC4CON_LC4OUT 0x20
8022 #define _CLC4CON_OUT 0x20
8023 #define _CLC4CON_LC4EN 0x80
8024 #define _CLC4CON_EN 0x80
8026 //==============================================================================
8029 //==============================================================================
8032 extern __at(0x0F2F) __sfr CLC4POL
;
8038 unsigned LC4G1POL
: 1;
8039 unsigned LC4G2POL
: 1;
8040 unsigned LC4G3POL
: 1;
8041 unsigned LC4G4POL
: 1;
8045 unsigned LC4POL
: 1;
8061 extern __at(0x0F2F) volatile __CLC4POLbits_t CLC4POLbits
;
8063 #define _CLC4POL_LC4G1POL 0x01
8064 #define _CLC4POL_G1POL 0x01
8065 #define _CLC4POL_LC4G2POL 0x02
8066 #define _CLC4POL_G2POL 0x02
8067 #define _CLC4POL_LC4G3POL 0x04
8068 #define _CLC4POL_G3POL 0x04
8069 #define _CLC4POL_LC4G4POL 0x08
8070 #define _CLC4POL_G4POL 0x08
8071 #define _CLC4POL_LC4POL 0x80
8072 #define _CLC4POL_POL 0x80
8074 //==============================================================================
8077 //==============================================================================
8080 extern __at(0x0F30) __sfr CLC4SEL0
;
8086 unsigned LC4D1S0
: 1;
8087 unsigned LC4D1S1
: 1;
8088 unsigned LC4D1S2
: 1;
8089 unsigned LC4D1S3
: 1;
8090 unsigned LC4D1S4
: 1;
8116 unsigned LC4D1S
: 5;
8121 extern __at(0x0F30) volatile __CLC4SEL0bits_t CLC4SEL0bits
;
8123 #define _CLC4SEL0_LC4D1S0 0x01
8124 #define _CLC4SEL0_D1S0 0x01
8125 #define _CLC4SEL0_LC4D1S1 0x02
8126 #define _CLC4SEL0_D1S1 0x02
8127 #define _CLC4SEL0_LC4D1S2 0x04
8128 #define _CLC4SEL0_D1S2 0x04
8129 #define _CLC4SEL0_LC4D1S3 0x08
8130 #define _CLC4SEL0_D1S3 0x08
8131 #define _CLC4SEL0_LC4D1S4 0x10
8132 #define _CLC4SEL0_D1S4 0x10
8134 //==============================================================================
8137 //==============================================================================
8140 extern __at(0x0F31) __sfr CLC4SEL1
;
8146 unsigned LC4D2S0
: 1;
8147 unsigned LC4D2S1
: 1;
8148 unsigned LC4D2S2
: 1;
8149 unsigned LC4D2S3
: 1;
8150 unsigned LC4D2S4
: 1;
8170 unsigned LC4D2S
: 5;
8181 extern __at(0x0F31) volatile __CLC4SEL1bits_t CLC4SEL1bits
;
8183 #define _CLC4SEL1_LC4D2S0 0x01
8184 #define _CLC4SEL1_D2S0 0x01
8185 #define _CLC4SEL1_LC4D2S1 0x02
8186 #define _CLC4SEL1_D2S1 0x02
8187 #define _CLC4SEL1_LC4D2S2 0x04
8188 #define _CLC4SEL1_D2S2 0x04
8189 #define _CLC4SEL1_LC4D2S3 0x08
8190 #define _CLC4SEL1_D2S3 0x08
8191 #define _CLC4SEL1_LC4D2S4 0x10
8192 #define _CLC4SEL1_D2S4 0x10
8194 //==============================================================================
8197 //==============================================================================
8200 extern __at(0x0F32) __sfr CLC4SEL2
;
8206 unsigned LC4D3S0
: 1;
8207 unsigned LC4D3S1
: 1;
8208 unsigned LC4D3S2
: 1;
8209 unsigned LC4D3S3
: 1;
8210 unsigned LC4D3S4
: 1;
8230 unsigned LC4D3S
: 5;
8241 extern __at(0x0F32) volatile __CLC4SEL2bits_t CLC4SEL2bits
;
8243 #define _CLC4SEL2_LC4D3S0 0x01
8244 #define _CLC4SEL2_D3S0 0x01
8245 #define _CLC4SEL2_LC4D3S1 0x02
8246 #define _CLC4SEL2_D3S1 0x02
8247 #define _CLC4SEL2_LC4D3S2 0x04
8248 #define _CLC4SEL2_D3S2 0x04
8249 #define _CLC4SEL2_LC4D3S3 0x08
8250 #define _CLC4SEL2_D3S3 0x08
8251 #define _CLC4SEL2_LC4D3S4 0x10
8252 #define _CLC4SEL2_D3S4 0x10
8254 //==============================================================================
8257 //==============================================================================
8260 extern __at(0x0F33) __sfr CLC4SEL3
;
8266 unsigned LC4D4S0
: 1;
8267 unsigned LC4D4S1
: 1;
8268 unsigned LC4D4S2
: 1;
8269 unsigned LC4D4S3
: 1;
8270 unsigned LC4D4S4
: 1;
8290 unsigned LC4D4S
: 5;
8301 extern __at(0x0F33) volatile __CLC4SEL3bits_t CLC4SEL3bits
;
8303 #define _CLC4SEL3_LC4D4S0 0x01
8304 #define _CLC4SEL3_D4S0 0x01
8305 #define _CLC4SEL3_LC4D4S1 0x02
8306 #define _CLC4SEL3_D4S1 0x02
8307 #define _CLC4SEL3_LC4D4S2 0x04
8308 #define _CLC4SEL3_D4S2 0x04
8309 #define _CLC4SEL3_LC4D4S3 0x08
8310 #define _CLC4SEL3_D4S3 0x08
8311 #define _CLC4SEL3_LC4D4S4 0x10
8312 #define _CLC4SEL3_D4S4 0x10
8314 //==============================================================================
8317 //==============================================================================
8320 extern __at(0x0F34) __sfr CLC4GLS0
;
8326 unsigned LC4G1D1N
: 1;
8327 unsigned LC4G1D1T
: 1;
8328 unsigned LC4G1D2N
: 1;
8329 unsigned LC4G1D2T
: 1;
8330 unsigned LC4G1D3N
: 1;
8331 unsigned LC4G1D3T
: 1;
8332 unsigned LC4G1D4N
: 1;
8333 unsigned LC4G1D4T
: 1;
8349 extern __at(0x0F34) volatile __CLC4GLS0bits_t CLC4GLS0bits
;
8351 #define _CLC4GLS0_LC4G1D1N 0x01
8352 #define _CLC4GLS0_D1N 0x01
8353 #define _CLC4GLS0_LC4G1D1T 0x02
8354 #define _CLC4GLS0_D1T 0x02
8355 #define _CLC4GLS0_LC4G1D2N 0x04
8356 #define _CLC4GLS0_D2N 0x04
8357 #define _CLC4GLS0_LC4G1D2T 0x08
8358 #define _CLC4GLS0_D2T 0x08
8359 #define _CLC4GLS0_LC4G1D3N 0x10
8360 #define _CLC4GLS0_D3N 0x10
8361 #define _CLC4GLS0_LC4G1D3T 0x20
8362 #define _CLC4GLS0_D3T 0x20
8363 #define _CLC4GLS0_LC4G1D4N 0x40
8364 #define _CLC4GLS0_D4N 0x40
8365 #define _CLC4GLS0_LC4G1D4T 0x80
8366 #define _CLC4GLS0_D4T 0x80
8368 //==============================================================================
8371 //==============================================================================
8374 extern __at(0x0F35) __sfr CLC4GLS1
;
8380 unsigned LC4G2D1N
: 1;
8381 unsigned LC4G2D1T
: 1;
8382 unsigned LC4G2D2N
: 1;
8383 unsigned LC4G2D2T
: 1;
8384 unsigned LC4G2D3N
: 1;
8385 unsigned LC4G2D3T
: 1;
8386 unsigned LC4G2D4N
: 1;
8387 unsigned LC4G2D4T
: 1;
8403 extern __at(0x0F35) volatile __CLC4GLS1bits_t CLC4GLS1bits
;
8405 #define _CLC4GLS1_LC4G2D1N 0x01
8406 #define _CLC4GLS1_D1N 0x01
8407 #define _CLC4GLS1_LC4G2D1T 0x02
8408 #define _CLC4GLS1_D1T 0x02
8409 #define _CLC4GLS1_LC4G2D2N 0x04
8410 #define _CLC4GLS1_D2N 0x04
8411 #define _CLC4GLS1_LC4G2D2T 0x08
8412 #define _CLC4GLS1_D2T 0x08
8413 #define _CLC4GLS1_LC4G2D3N 0x10
8414 #define _CLC4GLS1_D3N 0x10
8415 #define _CLC4GLS1_LC4G2D3T 0x20
8416 #define _CLC4GLS1_D3T 0x20
8417 #define _CLC4GLS1_LC4G2D4N 0x40
8418 #define _CLC4GLS1_D4N 0x40
8419 #define _CLC4GLS1_LC4G2D4T 0x80
8420 #define _CLC4GLS1_D4T 0x80
8422 //==============================================================================
8425 //==============================================================================
8428 extern __at(0x0F36) __sfr CLC4GLS2
;
8434 unsigned LC4G3D1N
: 1;
8435 unsigned LC4G3D1T
: 1;
8436 unsigned LC4G3D2N
: 1;
8437 unsigned LC4G3D2T
: 1;
8438 unsigned LC4G3D3N
: 1;
8439 unsigned LC4G3D3T
: 1;
8440 unsigned LC4G3D4N
: 1;
8441 unsigned LC4G3D4T
: 1;
8457 extern __at(0x0F36) volatile __CLC4GLS2bits_t CLC4GLS2bits
;
8459 #define _CLC4GLS2_LC4G3D1N 0x01
8460 #define _CLC4GLS2_D1N 0x01
8461 #define _CLC4GLS2_LC4G3D1T 0x02
8462 #define _CLC4GLS2_D1T 0x02
8463 #define _CLC4GLS2_LC4G3D2N 0x04
8464 #define _CLC4GLS2_D2N 0x04
8465 #define _CLC4GLS2_LC4G3D2T 0x08
8466 #define _CLC4GLS2_D2T 0x08
8467 #define _CLC4GLS2_LC4G3D3N 0x10
8468 #define _CLC4GLS2_D3N 0x10
8469 #define _CLC4GLS2_LC4G3D3T 0x20
8470 #define _CLC4GLS2_D3T 0x20
8471 #define _CLC4GLS2_LC4G3D4N 0x40
8472 #define _CLC4GLS2_D4N 0x40
8473 #define _CLC4GLS2_LC4G3D4T 0x80
8474 #define _CLC4GLS2_D4T 0x80
8476 //==============================================================================
8479 //==============================================================================
8482 extern __at(0x0F37) __sfr CLC4GLS3
;
8488 unsigned LC4G4D1N
: 1;
8489 unsigned LC4G4D1T
: 1;
8490 unsigned LC4G4D2N
: 1;
8491 unsigned LC4G4D2T
: 1;
8492 unsigned LC4G4D3N
: 1;
8493 unsigned LC4G4D3T
: 1;
8494 unsigned LC4G4D4N
: 1;
8495 unsigned LC4G4D4T
: 1;
8511 extern __at(0x0F37) volatile __CLC4GLS3bits_t CLC4GLS3bits
;
8513 #define _CLC4GLS3_LC4G4D1N 0x01
8514 #define _CLC4GLS3_G4D1N 0x01
8515 #define _CLC4GLS3_LC4G4D1T 0x02
8516 #define _CLC4GLS3_G4D1T 0x02
8517 #define _CLC4GLS3_LC4G4D2N 0x04
8518 #define _CLC4GLS3_G4D2N 0x04
8519 #define _CLC4GLS3_LC4G4D2T 0x08
8520 #define _CLC4GLS3_G4D2T 0x08
8521 #define _CLC4GLS3_LC4G4D3N 0x10
8522 #define _CLC4GLS3_G4D3N 0x10
8523 #define _CLC4GLS3_LC4G4D3T 0x20
8524 #define _CLC4GLS3_G4D3T 0x20
8525 #define _CLC4GLS3_LC4G4D4N 0x40
8526 #define _CLC4GLS3_G4D4N 0x40
8527 #define _CLC4GLS3_LC4G4D4T 0x80
8528 #define _CLC4GLS3_G4D4T 0x80
8530 //==============================================================================
8533 //==============================================================================
8536 extern __at(0x0FE4) __sfr STATUS_SHAD
;
8540 unsigned C_SHAD
: 1;
8541 unsigned DC_SHAD
: 1;
8542 unsigned Z_SHAD
: 1;
8548 } __STATUS_SHADbits_t
;
8550 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
8552 #define _C_SHAD 0x01
8553 #define _DC_SHAD 0x02
8554 #define _Z_SHAD 0x04
8556 //==============================================================================
8558 extern __at(0x0FE5) __sfr WREG_SHAD
;
8559 extern __at(0x0FE6) __sfr BSR_SHAD
;
8560 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
8561 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
8562 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
8563 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
8564 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
8565 extern __at(0x0FED) __sfr STKPTR
;
8566 extern __at(0x0FEE) __sfr TOSL
;
8567 extern __at(0x0FEF) __sfr TOSH
;
8569 //==============================================================================
8571 // Configuration Bits
8573 //==============================================================================
8575 #define _CONFIG1 0x8007
8576 #define _CONFIG2 0x8008
8578 //----------------------------- CONFIG1 Options -------------------------------
8580 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
8581 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
8582 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
8583 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
8584 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
8585 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
8586 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
8587 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
8588 #define _WDTE_OFF 0x3FE7 // WDT disabled.
8589 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
8590 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
8591 #define _WDTE_ON 0x3FFF // WDT enabled.
8592 #define _PWRTE_ON 0x3FDF // PWRT enabled.
8593 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
8594 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input if LVP bit is also 0.
8595 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
8596 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
8597 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
8598 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
8599 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
8600 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
8601 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
8602 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
8603 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
8604 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
8605 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
8606 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
8607 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
8609 //----------------------------- CONFIG2 Options -------------------------------
8611 #define _WRT_ALL 0x3FFC // 0000h to 1FFFh write protected, no addresses may be modified by EECON control.
8612 #define _WRT_HALF 0x3FFD // 0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
8613 #define _WRT_BOOT 0x3FFE // 0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control.
8614 #define _WRT_OFF 0x3FFF // Write protection off.
8615 #define _PPS1WAY_OFF 0x3FFB // The PPSLOCK bit can be set and cleared repeatedly by software.
8616 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit cannot be cleared once it is set by software.
8617 #define _ZCDDIS_OFF 0x3F7F // Zero-cross detect circuit is always enabled.
8618 #define _ZCDDIS_ON 0x3FFF // Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.
8619 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
8620 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
8621 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
8622 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
8623 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
8624 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
8625 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
8626 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
8627 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
8628 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
8629 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
8630 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
8632 //==============================================================================
8634 #define _DEVID1 0x8006
8636 #define _IDLOC0 0x8000
8637 #define _IDLOC1 0x8001
8638 #define _IDLOC2 0x8002
8639 #define _IDLOC3 0x8003
8641 //==============================================================================
8643 #ifndef NO_BIT_DEFINES
8645 #define ADON ADCON0bits.ADON // bit 0
8646 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
8647 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
8648 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
8649 #define CHS0 ADCON0bits.CHS0 // bit 2
8650 #define CHS1 ADCON0bits.CHS1 // bit 3
8651 #define CHS2 ADCON0bits.CHS2 // bit 4
8652 #define CHS3 ADCON0bits.CHS3 // bit 5
8653 #define CHS4 ADCON0bits.CHS4 // bit 6
8655 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
8656 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
8657 #define ADNREF ADCON1bits.ADNREF // bit 2
8658 #define ADFM ADCON1bits.ADFM // bit 7
8660 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
8661 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
8662 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
8663 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
8665 #define ANSA0 ANSELAbits.ANSA0 // bit 0
8666 #define ANSA1 ANSELAbits.ANSA1 // bit 1
8667 #define ANSA2 ANSELAbits.ANSA2 // bit 2
8668 #define ANSA3 ANSELAbits.ANSA3 // bit 3
8669 #define ANSA4 ANSELAbits.ANSA4 // bit 4
8670 #define ANSA5 ANSELAbits.ANSA5 // bit 5
8672 #define ANSB0 ANSELBbits.ANSB0 // bit 0
8673 #define ANSB1 ANSELBbits.ANSB1 // bit 1
8674 #define ANSB2 ANSELBbits.ANSB2 // bit 2
8675 #define ANSB3 ANSELBbits.ANSB3 // bit 3
8676 #define ANSB4 ANSELBbits.ANSB4 // bit 4
8677 #define ANSB5 ANSELBbits.ANSB5 // bit 5
8679 #define ANSC2 ANSELCbits.ANSC2 // bit 2
8680 #define ANSC3 ANSELCbits.ANSC3 // bit 3
8681 #define ANSC4 ANSELCbits.ANSC4 // bit 4
8682 #define ANSC5 ANSELCbits.ANSC5 // bit 5
8683 #define ANSC6 ANSELCbits.ANSC6 // bit 6
8684 #define ANSC7 ANSELCbits.ANSC7 // bit 7
8686 #define ANSD0 ANSELDbits.ANSD0 // bit 0
8687 #define ANSD1 ANSELDbits.ANSD1 // bit 1
8688 #define ANSD2 ANSELDbits.ANSD2 // bit 2
8689 #define ANSD3 ANSELDbits.ANSD3 // bit 3
8690 #define ANSD4 ANSELDbits.ANSD4 // bit 4
8691 #define ANSD5 ANSELDbits.ANSD5 // bit 5
8692 #define ANSD6 ANSELDbits.ANSD6 // bit 6
8693 #define ANSD7 ANSELDbits.ANSD7 // bit 7
8695 #define ANSE0 ANSELEbits.ANSE0 // bit 0
8696 #define ANSE1 ANSELEbits.ANSE1 // bit 1
8697 #define ANSE2 ANSELEbits.ANSE2 // bit 2
8699 #define ABDEN BAUD1CONbits.ABDEN // bit 0
8700 #define WUE BAUD1CONbits.WUE // bit 1
8701 #define BRG16 BAUD1CONbits.BRG16 // bit 3
8702 #define SCKP BAUD1CONbits.SCKP // bit 4
8703 #define RCIDL BAUD1CONbits.RCIDL // bit 6
8704 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
8706 #define BORRDY BORCONbits.BORRDY // bit 0
8707 #define BORFS BORCONbits.BORFS // bit 6
8708 #define SBOREN BORCONbits.SBOREN // bit 7
8710 #define BSR0 BSRbits.BSR0 // bit 0
8711 #define BSR1 BSRbits.BSR1 // bit 1
8712 #define BSR2 BSRbits.BSR2 // bit 2
8713 #define BSR3 BSRbits.BSR3 // bit 3
8714 #define BSR4 BSRbits.BSR4 // bit 4
8716 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
8717 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
8718 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
8719 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
8720 #define DC1B0 CCP1CONbits.DC1B0 // bit 4, shadows bit in CCP1CONbits
8721 #define CCP1Y CCP1CONbits.CCP1Y // bit 4, shadows bit in CCP1CONbits
8722 #define DC1B1 CCP1CONbits.DC1B1 // bit 5, shadows bit in CCP1CONbits
8723 #define CCP1X CCP1CONbits.CCP1X // bit 5, shadows bit in CCP1CONbits
8725 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
8726 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
8727 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
8728 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
8729 #define DC2B0 CCP2CONbits.DC2B0 // bit 4, shadows bit in CCP2CONbits
8730 #define CCP2Y CCP2CONbits.CCP2Y // bit 4, shadows bit in CCP2CONbits
8731 #define DC2B1 CCP2CONbits.DC2B1 // bit 5, shadows bit in CCP2CONbits
8732 #define CCP2X CCP2CONbits.CCP2X // bit 5, shadows bit in CCP2CONbits
8734 #define C1TSEL0 CCPTMRSbits.C1TSEL0 // bit 0
8735 #define C1TSEL1 CCPTMRSbits.C1TSEL1 // bit 1
8736 #define C2TSEL0 CCPTMRSbits.C2TSEL0 // bit 2
8737 #define C2TSEL1 CCPTMRSbits.C2TSEL1 // bit 3
8738 #define P3TSEL0 CCPTMRSbits.P3TSEL0 // bit 4
8739 #define P3TSEL1 CCPTMRSbits.P3TSEL1 // bit 5
8740 #define P4TSEL0 CCPTMRSbits.P4TSEL0 // bit 6
8741 #define P4TSEL1 CCPTMRSbits.P4TSEL1 // bit 7
8743 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
8744 #define MODE0 CLC1CONbits.MODE0 // bit 0, shadows bit in CLC1CONbits
8745 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
8746 #define MODE1 CLC1CONbits.MODE1 // bit 1, shadows bit in CLC1CONbits
8747 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
8748 #define MODE2 CLC1CONbits.MODE2 // bit 2, shadows bit in CLC1CONbits
8749 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
8750 #define INTN CLC1CONbits.INTN // bit 3, shadows bit in CLC1CONbits
8751 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
8752 #define INTP CLC1CONbits.INTP // bit 4, shadows bit in CLC1CONbits
8753 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
8754 #define OUT CLC1CONbits.OUT // bit 5, shadows bit in CLC1CONbits
8755 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
8756 #define EN CLC1CONbits.EN // bit 7, shadows bit in CLC1CONbits
8758 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
8759 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
8760 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
8761 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
8762 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
8763 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
8764 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
8765 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
8766 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
8767 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
8768 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
8769 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
8770 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
8771 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
8772 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
8773 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
8775 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
8776 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
8777 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
8778 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
8779 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
8780 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
8781 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
8782 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
8783 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
8784 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
8785 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
8786 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
8787 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
8788 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
8789 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
8790 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
8792 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
8793 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
8794 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
8795 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
8796 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
8797 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
8798 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
8799 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
8800 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
8801 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
8803 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
8804 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
8805 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
8806 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
8807 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
8808 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
8809 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
8810 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
8811 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
8812 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
8814 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
8815 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
8816 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
8817 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
8818 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
8819 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
8820 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
8821 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
8822 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
8823 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
8825 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
8826 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
8827 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
8828 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
8829 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
8830 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
8831 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
8832 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
8833 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
8834 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
8836 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
8837 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
8838 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
8839 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
8840 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
8841 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
8842 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
8843 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
8844 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
8845 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
8847 #define MLC1OUT CLCDATAbits.MLC1OUT // bit 0, shadows bit in CLCDATAbits
8848 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0, shadows bit in CLCDATAbits
8849 #define MLC2OUT CLCDATAbits.MLC2OUT // bit 1, shadows bit in CLCDATAbits
8850 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1, shadows bit in CLCDATAbits
8851 #define MLC3OUT CLCDATAbits.MLC3OUT // bit 2, shadows bit in CLCDATAbits
8852 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2, shadows bit in CLCDATAbits
8853 #define MLC4OUT CLCDATAbits.MLC4OUT // bit 3, shadows bit in CLCDATAbits
8854 #define MCLC4OUT CLCDATAbits.MCLC4OUT // bit 3, shadows bit in CLCDATAbits
8856 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
8857 #define C1HYS CM1CON0bits.C1HYS // bit 1
8858 #define C1SP CM1CON0bits.C1SP // bit 2
8859 #define C1ZLF CM1CON0bits.C1ZLF // bit 3
8860 #define C1POL CM1CON0bits.C1POL // bit 4
8861 #define C1OUT CM1CON0bits.C1OUT // bit 6
8862 #define C1ON CM1CON0bits.C1ON // bit 7
8864 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
8865 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
8866 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
8867 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 3
8868 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 4
8869 #define C1PCH2 CM1CON1bits.C1PCH2 // bit 5
8870 #define C1INTN CM1CON1bits.C1INTN // bit 6
8871 #define C1INTP CM1CON1bits.C1INTP // bit 7
8873 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
8874 #define C2HYS CM2CON0bits.C2HYS // bit 1
8875 #define C2SP CM2CON0bits.C2SP // bit 2
8876 #define C2ZLF CM2CON0bits.C2ZLF // bit 3
8877 #define C2POL CM2CON0bits.C2POL // bit 4
8878 #define C2OUT CM2CON0bits.C2OUT // bit 6
8879 #define C2ON CM2CON0bits.C2ON // bit 7
8881 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
8882 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
8883 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
8884 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 3
8885 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 4
8886 #define C2PCH2 CM2CON1bits.C2PCH2 // bit 5
8887 #define C2INTN CM2CON1bits.C2INTN // bit 6
8888 #define C2INTP CM2CON1bits.C2INTP // bit 7
8890 #define MC1OUT CMOUTbits.MC1OUT // bit 0
8891 #define MC2OUT CMOUTbits.MC2OUT // bit 1
8893 #define G1ASDAC0 COG1ASD0bits.G1ASDAC0 // bit 2
8894 #define G1ASDAC1 COG1ASD0bits.G1ASDAC1 // bit 3
8895 #define G1ASDBD0 COG1ASD0bits.G1ASDBD0 // bit 4
8896 #define G1ASDBD1 COG1ASD0bits.G1ASDBD1 // bit 5
8897 #define G1ARSEN COG1ASD0bits.G1ARSEN // bit 6
8898 #define G1ASE COG1ASD0bits.G1ASE // bit 7
8900 #define G1AS0E COG1ASD1bits.G1AS0E // bit 0
8901 #define G1AS1E COG1ASD1bits.G1AS1E // bit 1
8902 #define G1AS2E COG1ASD1bits.G1AS2E // bit 2
8903 #define G1AS3E COG1ASD1bits.G1AS3E // bit 3
8905 #define G1BLKF0 COG1BLKFbits.G1BLKF0 // bit 0
8906 #define G1BLKF1 COG1BLKFbits.G1BLKF1 // bit 1
8907 #define G1BLKF2 COG1BLKFbits.G1BLKF2 // bit 2
8908 #define G1BLKF3 COG1BLKFbits.G1BLKF3 // bit 3
8909 #define G1BLKF4 COG1BLKFbits.G1BLKF4 // bit 4
8910 #define G1BLKF5 COG1BLKFbits.G1BLKF5 // bit 5
8912 #define G1BLKR0 COG1BLKRbits.G1BLKR0 // bit 0
8913 #define G1BLKR1 COG1BLKRbits.G1BLKR1 // bit 1
8914 #define G1BLKR2 COG1BLKRbits.G1BLKR2 // bit 2
8915 #define G1BLKR3 COG1BLKRbits.G1BLKR3 // bit 3
8916 #define G1BLKR4 COG1BLKRbits.G1BLKR4 // bit 4
8917 #define G1BLKR5 COG1BLKRbits.G1BLKR5 // bit 5
8919 #define G1MD0 COG1CON0bits.G1MD0 // bit 0
8920 #define G1MD1 COG1CON0bits.G1MD1 // bit 1
8921 #define G1MD2 COG1CON0bits.G1MD2 // bit 2
8922 #define G1CS0 COG1CON0bits.G1CS0 // bit 3
8923 #define G1CS1 COG1CON0bits.G1CS1 // bit 4
8924 #define G1LD COG1CON0bits.G1LD // bit 6
8925 #define G1EN COG1CON0bits.G1EN // bit 7
8927 #define G1POLA COG1CON1bits.G1POLA // bit 0
8928 #define G1POLB COG1CON1bits.G1POLB // bit 1
8929 #define G1POLC COG1CON1bits.G1POLC // bit 2
8930 #define G1POLD COG1CON1bits.G1POLD // bit 3
8931 #define G1FDBS COG1CON1bits.G1FDBS // bit 6
8932 #define G1RDBS COG1CON1bits.G1RDBS // bit 7
8934 #define G1DBF0 COG1DBFbits.G1DBF0 // bit 0
8935 #define G1DBF1 COG1DBFbits.G1DBF1 // bit 1
8936 #define G1DBF2 COG1DBFbits.G1DBF2 // bit 2
8937 #define G1DBF3 COG1DBFbits.G1DBF3 // bit 3
8938 #define G1DBF4 COG1DBFbits.G1DBF4 // bit 4
8939 #define G1DBF5 COG1DBFbits.G1DBF5 // bit 5
8941 #define G1DBR0 COG1DBRbits.G1DBR0 // bit 0
8942 #define G1DBR1 COG1DBRbits.G1DBR1 // bit 1
8943 #define G1DBR2 COG1DBRbits.G1DBR2 // bit 2
8944 #define G1DBR3 COG1DBRbits.G1DBR3 // bit 3
8945 #define G1DBR4 COG1DBRbits.G1DBR4 // bit 4
8946 #define G1DBR5 COG1DBRbits.G1DBR5 // bit 5
8948 #define G1FIS0 COG1FISbits.G1FIS0 // bit 0
8949 #define G1FIS1 COG1FISbits.G1FIS1 // bit 1
8950 #define G1FIS2 COG1FISbits.G1FIS2 // bit 2
8951 #define G1FIS3 COG1FISbits.G1FIS3 // bit 3
8952 #define G1FIS4 COG1FISbits.G1FIS4 // bit 4
8953 #define G1FIS5 COG1FISbits.G1FIS5 // bit 5
8954 #define G1FIS6 COG1FISbits.G1FIS6 // bit 6
8955 #define G1FIS7 COG1FISbits.G1FIS7 // bit 7
8957 #define G1FSIM0 COG1FSIMbits.G1FSIM0 // bit 0
8958 #define G1FSIM1 COG1FSIMbits.G1FSIM1 // bit 1
8959 #define G1FSIM2 COG1FSIMbits.G1FSIM2 // bit 2
8960 #define G1FSIM3 COG1FSIMbits.G1FSIM3 // bit 3
8961 #define G1FSIM4 COG1FSIMbits.G1FSIM4 // bit 4
8962 #define G1FSIM5 COG1FSIMbits.G1FSIM5 // bit 5
8963 #define G1FSIM6 COG1FSIMbits.G1FSIM6 // bit 6
8964 #define G1FSIM7 COG1FSIMbits.G1FSIM7 // bit 7
8966 #define G1PHF0 COG1PHFbits.G1PHF0 // bit 0
8967 #define G1PHF1 COG1PHFbits.G1PHF1 // bit 1
8968 #define G1PHF2 COG1PHFbits.G1PHF2 // bit 2
8969 #define G1PHF3 COG1PHFbits.G1PHF3 // bit 3
8970 #define G1PHF4 COG1PHFbits.G1PHF4 // bit 4
8971 #define G1PHF5 COG1PHFbits.G1PHF5 // bit 5
8973 #define G1PHR0 COG1PHRbits.G1PHR0 // bit 0
8974 #define G1PHR1 COG1PHRbits.G1PHR1 // bit 1
8975 #define G1PHR2 COG1PHRbits.G1PHR2 // bit 2
8976 #define G1PHR3 COG1PHRbits.G1PHR3 // bit 3
8977 #define G1PHR4 COG1PHRbits.G1PHR4 // bit 4
8978 #define G1PHR5 COG1PHRbits.G1PHR5 // bit 5
8980 #define G1RIS0 COG1RISbits.G1RIS0 // bit 0
8981 #define G1RIS1 COG1RISbits.G1RIS1 // bit 1
8982 #define G1RIS2 COG1RISbits.G1RIS2 // bit 2
8983 #define G1RIS3 COG1RISbits.G1RIS3 // bit 3
8984 #define G1RIS4 COG1RISbits.G1RIS4 // bit 4
8985 #define G1RIS5 COG1RISbits.G1RIS5 // bit 5
8986 #define G1RIS6 COG1RISbits.G1RIS6 // bit 6
8987 #define G1RIS7 COG1RISbits.G1RIS7 // bit 7
8989 #define G1RSIM0 COG1RSIMbits.G1RSIM0 // bit 0
8990 #define G1RSIM1 COG1RSIMbits.G1RSIM1 // bit 1
8991 #define G1RSIM2 COG1RSIMbits.G1RSIM2 // bit 2
8992 #define G1RSIM3 COG1RSIMbits.G1RSIM3 // bit 3
8993 #define G1RSIM4 COG1RSIMbits.G1RSIM4 // bit 4
8994 #define G1RSIM5 COG1RSIMbits.G1RSIM5 // bit 5
8995 #define G1RSIM6 COG1RSIMbits.G1RSIM6 // bit 6
8996 #define G1RSIM7 COG1RSIMbits.G1RSIM7 // bit 7
8998 #define G1STRA COG1STRbits.G1STRA // bit 0
8999 #define G1STRB COG1STRbits.G1STRB // bit 1
9000 #define G1STRC COG1STRbits.G1STRC // bit 2
9001 #define G1STRD COG1STRbits.G1STRD // bit 3
9002 #define G1SDATA COG1STRbits.G1SDATA // bit 4
9003 #define G1SDATB COG1STRbits.G1SDATB // bit 5
9004 #define G1SDATC COG1STRbits.G1SDATC // bit 6
9005 #define G1SDATD COG1STRbits.G1SDATD // bit 7
9007 #define DAC1NSS DAC1CON0bits.DAC1NSS // bit 0, shadows bit in DAC1CON0bits
9008 #define DACNSS DAC1CON0bits.DACNSS // bit 0, shadows bit in DAC1CON0bits
9009 #define DAC1PSS0 DAC1CON0bits.DAC1PSS0 // bit 2, shadows bit in DAC1CON0bits
9010 #define DACPSS0 DAC1CON0bits.DACPSS0 // bit 2, shadows bit in DAC1CON0bits
9011 #define DAC1PSS1 DAC1CON0bits.DAC1PSS1 // bit 3, shadows bit in DAC1CON0bits
9012 #define DACPSS1 DAC1CON0bits.DACPSS1 // bit 3, shadows bit in DAC1CON0bits
9013 #define DAC1OE2 DAC1CON0bits.DAC1OE2 // bit 4, shadows bit in DAC1CON0bits
9014 #define DACOE0 DAC1CON0bits.DACOE0 // bit 4, shadows bit in DAC1CON0bits
9015 #define DAC1OE1 DAC1CON0bits.DAC1OE1 // bit 5, shadows bit in DAC1CON0bits
9016 #define DACOE1 DAC1CON0bits.DACOE1 // bit 5, shadows bit in DAC1CON0bits
9017 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7, shadows bit in DAC1CON0bits
9018 #define DACEN DAC1CON0bits.DACEN // bit 7, shadows bit in DAC1CON0bits
9020 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0, shadows bit in DAC1CON1bits
9021 #define DACR0 DAC1CON1bits.DACR0 // bit 0, shadows bit in DAC1CON1bits
9022 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1, shadows bit in DAC1CON1bits
9023 #define DACR1 DAC1CON1bits.DACR1 // bit 1, shadows bit in DAC1CON1bits
9024 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2, shadows bit in DAC1CON1bits
9025 #define DACR2 DAC1CON1bits.DACR2 // bit 2, shadows bit in DAC1CON1bits
9026 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3, shadows bit in DAC1CON1bits
9027 #define DACR3 DAC1CON1bits.DACR3 // bit 3, shadows bit in DAC1CON1bits
9028 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4, shadows bit in DAC1CON1bits
9029 #define DACR4 DAC1CON1bits.DACR4 // bit 4, shadows bit in DAC1CON1bits
9030 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5, shadows bit in DAC1CON1bits
9031 #define DACR5 DAC1CON1bits.DACR5 // bit 5, shadows bit in DAC1CON1bits
9032 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6, shadows bit in DAC1CON1bits
9033 #define DACR6 DAC1CON1bits.DACR6 // bit 6, shadows bit in DAC1CON1bits
9034 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7, shadows bit in DAC1CON1bits
9035 #define DACR7 DAC1CON1bits.DACR7 // bit 7, shadows bit in DAC1CON1bits
9037 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
9038 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
9039 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
9040 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
9041 #define TSRNG FVRCONbits.TSRNG // bit 4
9042 #define TSEN FVRCONbits.TSEN // bit 5
9043 #define FVRRDY FVRCONbits.FVRRDY // bit 6
9044 #define FVREN FVRCONbits.FVREN // bit 7
9046 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
9047 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
9048 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
9049 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
9050 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
9051 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
9052 #define INLVLA6 INLVLAbits.INLVLA6 // bit 6
9053 #define INLVLA7 INLVLAbits.INLVLA7 // bit 7
9055 #define INLVLB0 INLVLBbits.INLVLB0 // bit 0
9056 #define INLVLB1 INLVLBbits.INLVLB1 // bit 1
9057 #define INLVLB2 INLVLBbits.INLVLB2 // bit 2
9058 #define INLVLB3 INLVLBbits.INLVLB3 // bit 3
9059 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
9060 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
9061 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
9062 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
9064 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
9065 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
9066 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
9067 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
9068 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
9069 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
9070 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
9071 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
9073 #define INLVLD0 INLVLDbits.INLVLD0 // bit 0
9074 #define INLVLD1 INLVLDbits.INLVLD1 // bit 1
9075 #define INLVLD2 INLVLDbits.INLVLD2 // bit 2
9076 #define INLVLD3 INLVLDbits.INLVLD3 // bit 3
9077 #define INLVLD4 INLVLDbits.INLVLD4 // bit 4
9078 #define INLVLD5 INLVLDbits.INLVLD5 // bit 5
9079 #define INLVLD6 INLVLDbits.INLVLD6 // bit 6
9080 #define INLVLD7 INLVLDbits.INLVLD7 // bit 7
9082 #define INLVLE0 INLVLEbits.INLVLE0 // bit 0
9083 #define INLVLE1 INLVLEbits.INLVLE1 // bit 1
9084 #define INLVLE2 INLVLEbits.INLVLE2 // bit 2
9085 #define INLVLE3 INLVLEbits.INLVLE3 // bit 3
9087 #define IOCIF INTCONbits.IOCIF // bit 0
9088 #define INTF INTCONbits.INTF // bit 1
9089 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
9090 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
9091 #define IOCIE INTCONbits.IOCIE // bit 3
9092 #define INTE INTCONbits.INTE // bit 4
9093 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
9094 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
9095 #define PEIE INTCONbits.PEIE // bit 6
9096 #define GIE INTCONbits.GIE // bit 7
9098 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
9099 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
9100 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
9101 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
9102 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
9103 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
9104 #define IOCAF6 IOCAFbits.IOCAF6 // bit 6
9105 #define IOCAF7 IOCAFbits.IOCAF7 // bit 7
9107 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
9108 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
9109 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
9110 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
9111 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
9112 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
9113 #define IOCAN6 IOCANbits.IOCAN6 // bit 6
9114 #define IOCAN7 IOCANbits.IOCAN7 // bit 7
9116 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
9117 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
9118 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
9119 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
9120 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
9121 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
9122 #define IOCAP6 IOCAPbits.IOCAP6 // bit 6
9123 #define IOCAP7 IOCAPbits.IOCAP7 // bit 7
9125 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
9126 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
9127 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
9128 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
9129 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
9130 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
9131 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
9132 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
9134 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
9135 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
9136 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
9137 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
9138 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
9139 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
9140 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
9141 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
9143 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
9144 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
9145 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
9146 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
9147 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
9148 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
9149 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
9150 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
9152 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
9153 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
9154 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
9155 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
9156 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
9157 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
9158 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
9159 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
9161 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
9162 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
9163 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
9164 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
9165 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
9166 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
9167 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
9168 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
9170 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
9171 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
9172 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
9173 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
9174 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
9175 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
9176 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
9177 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
9179 #define IOCEF3 IOCEFbits.IOCEF3 // bit 3
9181 #define IOCEN3 IOCENbits.IOCEN3 // bit 3
9183 #define IOCEP3 IOCEPbits.IOCEP3 // bit 3
9185 #define LATA0 LATAbits.LATA0 // bit 0
9186 #define LATA1 LATAbits.LATA1 // bit 1
9187 #define LATA2 LATAbits.LATA2 // bit 2
9188 #define LATA3 LATAbits.LATA3 // bit 3
9189 #define LATA4 LATAbits.LATA4 // bit 4
9190 #define LATA5 LATAbits.LATA5 // bit 5
9191 #define LATA6 LATAbits.LATA6 // bit 6
9192 #define LATA7 LATAbits.LATA7 // bit 7
9194 #define LATB0 LATBbits.LATB0 // bit 0
9195 #define LATB1 LATBbits.LATB1 // bit 1
9196 #define LATB2 LATBbits.LATB2 // bit 2
9197 #define LATB3 LATBbits.LATB3 // bit 3
9198 #define LATB4 LATBbits.LATB4 // bit 4
9199 #define LATB5 LATBbits.LATB5 // bit 5
9200 #define LATB6 LATBbits.LATB6 // bit 6
9201 #define LATB7 LATBbits.LATB7 // bit 7
9203 #define LATC0 LATCbits.LATC0 // bit 0
9204 #define LATC1 LATCbits.LATC1 // bit 1
9205 #define LATC2 LATCbits.LATC2 // bit 2
9206 #define LATC3 LATCbits.LATC3 // bit 3
9207 #define LATC4 LATCbits.LATC4 // bit 4
9208 #define LATC5 LATCbits.LATC5 // bit 5
9209 #define LATC6 LATCbits.LATC6 // bit 6
9210 #define LATC7 LATCbits.LATC7 // bit 7
9212 #define LATD0 LATDbits.LATD0 // bit 0
9213 #define LATD1 LATDbits.LATD1 // bit 1
9214 #define LATD2 LATDbits.LATD2 // bit 2
9215 #define LATD3 LATDbits.LATD3 // bit 3
9216 #define LATD4 LATDbits.LATD4 // bit 4
9217 #define LATD5 LATDbits.LATD5 // bit 5
9218 #define LATD6 LATDbits.LATD6 // bit 6
9219 #define LATD7 LATDbits.LATD7 // bit 7
9221 #define LATE0 LATEbits.LATE0 // bit 0
9222 #define LATE1 LATEbits.LATE1 // bit 1
9223 #define LATE2 LATEbits.LATE2 // bit 2
9225 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
9226 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
9227 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
9228 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
9229 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
9230 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
9231 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
9232 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
9234 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
9235 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
9236 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
9237 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
9238 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
9239 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
9240 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
9241 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
9243 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
9244 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
9245 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
9246 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
9248 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
9249 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
9250 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
9251 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
9252 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
9254 #define N1PFM NCO1CONbits.N1PFM // bit 0
9255 #define N1POL NCO1CONbits.N1POL // bit 4
9256 #define N1OUT NCO1CONbits.N1OUT // bit 5
9257 #define N1EN NCO1CONbits.N1EN // bit 7
9259 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
9260 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
9261 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
9262 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
9263 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
9264 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
9265 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
9266 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
9268 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
9269 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
9270 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
9271 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
9272 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
9273 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
9274 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
9275 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
9277 #define NCO1INC16 NCO1INCUbits.NCO1INC16 // bit 0
9278 #define NCO1INC17 NCO1INCUbits.NCO1INC17 // bit 1
9279 #define NCO1INC18 NCO1INCUbits.NCO1INC18 // bit 2
9280 #define NCO1INC19 NCO1INCUbits.NCO1INC19 // bit 3
9282 #define ODA0 ODCONAbits.ODA0 // bit 0
9283 #define ODA1 ODCONAbits.ODA1 // bit 1
9284 #define ODA2 ODCONAbits.ODA2 // bit 2
9285 #define ODA3 ODCONAbits.ODA3 // bit 3
9286 #define ODA4 ODCONAbits.ODA4 // bit 4
9287 #define ODA5 ODCONAbits.ODA5 // bit 5
9288 #define ODA6 ODCONAbits.ODA6 // bit 6
9289 #define ODA7 ODCONAbits.ODA7 // bit 7
9291 #define ODB0 ODCONBbits.ODB0 // bit 0
9292 #define ODB1 ODCONBbits.ODB1 // bit 1
9293 #define ODB2 ODCONBbits.ODB2 // bit 2
9294 #define ODB3 ODCONBbits.ODB3 // bit 3
9295 #define ODB4 ODCONBbits.ODB4 // bit 4
9296 #define ODB5 ODCONBbits.ODB5 // bit 5
9297 #define ODB6 ODCONBbits.ODB6 // bit 6
9298 #define ODB7 ODCONBbits.ODB7 // bit 7
9300 #define ODC0 ODCONCbits.ODC0 // bit 0
9301 #define ODC1 ODCONCbits.ODC1 // bit 1
9302 #define ODC2 ODCONCbits.ODC2 // bit 2
9303 #define ODC3 ODCONCbits.ODC3 // bit 3
9304 #define ODC4 ODCONCbits.ODC4 // bit 4
9305 #define ODC5 ODCONCbits.ODC5 // bit 5
9306 #define ODC6 ODCONCbits.ODC6 // bit 6
9307 #define ODC7 ODCONCbits.ODC7 // bit 7
9309 #define ODD0 ODCONDbits.ODD0 // bit 0
9310 #define ODD1 ODCONDbits.ODD1 // bit 1
9311 #define ODD2 ODCONDbits.ODD2 // bit 2
9312 #define ODD3 ODCONDbits.ODD3 // bit 3
9313 #define ODD4 ODCONDbits.ODD4 // bit 4
9314 #define ODD5 ODCONDbits.ODD5 // bit 5
9315 #define ODD6 ODCONDbits.ODD6 // bit 6
9316 #define ODD7 ODCONDbits.ODD7 // bit 7
9318 #define ODE0 ODCONEbits.ODE0 // bit 0
9319 #define ODE1 ODCONEbits.ODE1 // bit 1
9320 #define ODE2 ODCONEbits.ODE2 // bit 2
9322 #define OPA1PCH0 OPA1CONbits.OPA1PCH0 // bit 0
9323 #define OPA1PCH1 OPA1CONbits.OPA1PCH1 // bit 1
9324 #define OPA1UG OPA1CONbits.OPA1UG // bit 4
9325 #define OPA1SP OPA1CONbits.OPA1SP // bit 6
9326 #define OPA1EN OPA1CONbits.OPA1EN // bit 7
9328 #define OPA2PCH0 OPA2CONbits.OPA2PCH0 // bit 0
9329 #define OPA2PCH1 OPA2CONbits.OPA2PCH1 // bit 1
9330 #define OPA2UG OPA2CONbits.OPA2UG // bit 4
9331 #define OPA2SP OPA2CONbits.OPA2SP // bit 6
9332 #define OPA2EN OPA2CONbits.OPA2EN // bit 7
9334 #define PS0 OPTION_REGbits.PS0 // bit 0
9335 #define PS1 OPTION_REGbits.PS1 // bit 1
9336 #define PS2 OPTION_REGbits.PS2 // bit 2
9337 #define PSA OPTION_REGbits.PSA // bit 3
9338 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
9339 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
9340 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
9341 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
9342 #define INTEDG OPTION_REGbits.INTEDG // bit 6
9343 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
9345 #define SCS0 OSCCONbits.SCS0 // bit 0
9346 #define SCS1 OSCCONbits.SCS1 // bit 1
9347 #define IRCF0 OSCCONbits.IRCF0 // bit 3
9348 #define IRCF1 OSCCONbits.IRCF1 // bit 4
9349 #define IRCF2 OSCCONbits.IRCF2 // bit 5
9350 #define IRCF3 OSCCONbits.IRCF3 // bit 6
9351 #define SPLLEN OSCCONbits.SPLLEN // bit 7
9353 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
9354 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
9355 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
9356 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
9357 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
9358 #define OSTS OSCSTATbits.OSTS // bit 5
9359 #define PLLR OSCSTATbits.PLLR // bit 6
9360 #define SOSCR OSCSTATbits.SOSCR // bit 7
9362 #define TUN0 OSCTUNEbits.TUN0 // bit 0
9363 #define TUN1 OSCTUNEbits.TUN1 // bit 1
9364 #define TUN2 OSCTUNEbits.TUN2 // bit 2
9365 #define TUN3 OSCTUNEbits.TUN3 // bit 3
9366 #define TUN4 OSCTUNEbits.TUN4 // bit 4
9367 #define TUN5 OSCTUNEbits.TUN5 // bit 5
9369 #define NOT_BOR PCONbits.NOT_BOR // bit 0
9370 #define NOT_POR PCONbits.NOT_POR // bit 1
9371 #define NOT_RI PCONbits.NOT_RI // bit 2
9372 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
9373 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
9374 #define STKUNF PCONbits.STKUNF // bit 6
9375 #define STKOVF PCONbits.STKOVF // bit 7
9377 #define TMR1IE PIE1bits.TMR1IE // bit 0
9378 #define TMR2IE PIE1bits.TMR2IE // bit 1
9379 #define CCP1IE PIE1bits.CCP1IE // bit 2
9380 #define SSP1IE PIE1bits.SSP1IE // bit 3
9381 #define TXIE PIE1bits.TXIE // bit 4
9382 #define RCIE PIE1bits.RCIE // bit 5
9383 #define ADIE PIE1bits.ADIE // bit 6
9384 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
9386 #define CCP2IE PIE2bits.CCP2IE // bit 0
9387 #define TMR4IE PIE2bits.TMR4IE // bit 1
9388 #define TMR6IE PIE2bits.TMR6IE // bit 2
9389 #define BCL1IE PIE2bits.BCL1IE // bit 3
9390 #define C1IE PIE2bits.C1IE // bit 5
9391 #define C2IE PIE2bits.C2IE // bit 6
9392 #define OSFIE PIE2bits.OSFIE // bit 7
9394 #define CLC1IE PIE3bits.CLC1IE // bit 0
9395 #define CLC2IE PIE3bits.CLC2IE // bit 1
9396 #define CLC3IE PIE3bits.CLC3IE // bit 2
9397 #define CLC4IE PIE3bits.CLC4IE // bit 3
9398 #define ZCDIE PIE3bits.ZCDIE // bit 4
9399 #define COGIE PIE3bits.COGIE // bit 5
9400 #define NCOIE PIE3bits.NCOIE // bit 6
9402 #define TMR1IF PIR1bits.TMR1IF // bit 0
9403 #define TMR2IF PIR1bits.TMR2IF // bit 1
9404 #define CCP1IF PIR1bits.CCP1IF // bit 2
9405 #define SSP1IF PIR1bits.SSP1IF // bit 3
9406 #define TXIF PIR1bits.TXIF // bit 4
9407 #define RCIF PIR1bits.RCIF // bit 5
9408 #define ADIF PIR1bits.ADIF // bit 6
9409 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
9411 #define CCP2IF PIR2bits.CCP2IF // bit 0
9412 #define TMR4IF PIR2bits.TMR4IF // bit 1
9413 #define TMR6IF PIR2bits.TMR6IF // bit 2
9414 #define BCL1IF PIR2bits.BCL1IF // bit 3
9415 #define C1IF PIR2bits.C1IF // bit 5
9416 #define C2IF PIR2bits.C2IF // bit 6
9417 #define OSFIF PIR2bits.OSFIF // bit 7
9419 #define CLC1IF PIR3bits.CLC1IF // bit 0
9420 #define CLC2IF PIR3bits.CLC2IF // bit 1
9421 #define CLC3IF PIR3bits.CLC3IF // bit 2
9422 #define CLC4IF PIR3bits.CLC4IF // bit 3
9423 #define ZCDIF PIR3bits.ZCDIF // bit 4
9424 #define COGIF PIR3bits.COGIF // bit 5
9425 #define NCOIF PIR3bits.NCOIF // bit 6
9427 #define RD PMCON1bits.RD // bit 0
9428 #define WR PMCON1bits.WR // bit 1
9429 #define WREN PMCON1bits.WREN // bit 2
9430 #define WRERR PMCON1bits.WRERR // bit 3
9431 #define FREE PMCON1bits.FREE // bit 4
9432 #define LWLO PMCON1bits.LWLO // bit 5
9433 #define CFGS PMCON1bits.CFGS // bit 6
9435 #define RA0 PORTAbits.RA0 // bit 0
9436 #define RA1 PORTAbits.RA1 // bit 1
9437 #define RA2 PORTAbits.RA2 // bit 2
9438 #define RA3 PORTAbits.RA3 // bit 3
9439 #define RA4 PORTAbits.RA4 // bit 4
9440 #define RA5 PORTAbits.RA5 // bit 5
9441 #define RA6 PORTAbits.RA6 // bit 6
9442 #define RA7 PORTAbits.RA7 // bit 7
9444 #define RB0 PORTBbits.RB0 // bit 0
9445 #define RB1 PORTBbits.RB1 // bit 1
9446 #define RB2 PORTBbits.RB2 // bit 2
9447 #define RB3 PORTBbits.RB3 // bit 3
9448 #define RB4 PORTBbits.RB4 // bit 4
9449 #define RB5 PORTBbits.RB5 // bit 5
9450 #define RB6 PORTBbits.RB6 // bit 6
9451 #define RB7 PORTBbits.RB7 // bit 7
9453 #define RC0 PORTCbits.RC0 // bit 0
9454 #define RC1 PORTCbits.RC1 // bit 1
9455 #define RC2 PORTCbits.RC2 // bit 2
9456 #define RC3 PORTCbits.RC3 // bit 3
9457 #define RC4 PORTCbits.RC4 // bit 4
9458 #define RC5 PORTCbits.RC5 // bit 5
9459 #define RC6 PORTCbits.RC6 // bit 6
9460 #define RC7 PORTCbits.RC7 // bit 7
9462 #define RD0 PORTDbits.RD0 // bit 0
9463 #define RD1 PORTDbits.RD1 // bit 1
9464 #define RD2 PORTDbits.RD2 // bit 2
9465 #define RD3 PORTDbits.RD3 // bit 3
9466 #define RD4 PORTDbits.RD4 // bit 4
9467 #define RD5 PORTDbits.RD5 // bit 5
9468 #define RD6 PORTDbits.RD6 // bit 6
9469 #define RD7 PORTDbits.RD7 // bit 7
9471 #define RE0 PORTEbits.RE0 // bit 0
9472 #define RE1 PORTEbits.RE1 // bit 1
9473 #define RE2 PORTEbits.RE2 // bit 2
9474 #define RE3 PORTEbits.RE3 // bit 3
9476 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
9478 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
9479 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
9480 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
9482 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
9483 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
9484 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
9485 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
9486 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
9487 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
9488 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
9489 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
9491 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
9492 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
9494 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
9495 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
9496 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
9498 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
9499 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
9500 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
9501 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
9502 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
9503 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
9504 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
9505 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
9507 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
9508 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
9510 #define RX9D RC1STAbits.RX9D // bit 0
9511 #define OERR RC1STAbits.OERR // bit 1
9512 #define FERR RC1STAbits.FERR // bit 2
9513 #define ADDEN RC1STAbits.ADDEN // bit 3
9514 #define CREN RC1STAbits.CREN // bit 4
9515 #define SREN RC1STAbits.SREN // bit 5
9516 #define RX9 RC1STAbits.RX9 // bit 6
9517 #define SPEN RC1STAbits.SPEN // bit 7
9519 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
9520 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
9521 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
9522 #define SLRA3 SLRCONAbits.SLRA3 // bit 3
9523 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
9524 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
9525 #define SLRA6 SLRCONAbits.SLRA6 // bit 6
9526 #define SLRA7 SLRCONAbits.SLRA7 // bit 7
9528 #define SLRB0 SLRCONBbits.SLRB0 // bit 0
9529 #define SLRB1 SLRCONBbits.SLRB1 // bit 1
9530 #define SLRB2 SLRCONBbits.SLRB2 // bit 2
9531 #define SLRB3 SLRCONBbits.SLRB3 // bit 3
9532 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
9533 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
9534 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
9535 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
9537 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
9538 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
9539 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
9540 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
9541 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
9542 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
9543 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
9544 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
9546 #define SLRD0 SLRCONDbits.SLRD0 // bit 0
9547 #define SLRD1 SLRCONDbits.SLRD1 // bit 1
9548 #define SLRD2 SLRCONDbits.SLRD2 // bit 2
9549 #define SLRD3 SLRCONDbits.SLRD3 // bit 3
9550 #define SLRD4 SLRCONDbits.SLRD4 // bit 4
9551 #define SLRD5 SLRCONDbits.SLRD5 // bit 5
9552 #define SLRD6 SLRCONDbits.SLRD6 // bit 6
9553 #define SLRD7 SLRCONDbits.SLRD7 // bit 7
9555 #define SLRE0 SLRCONEbits.SLRE0 // bit 0
9556 #define SLRE1 SLRCONEbits.SLRE1 // bit 1
9557 #define SLRE2 SLRCONEbits.SLRE2 // bit 2
9559 #define SSP1ADD0 SSP1ADDbits.SSP1ADD0 // bit 0, shadows bit in SSP1ADDbits
9560 #define ADD0 SSP1ADDbits.ADD0 // bit 0, shadows bit in SSP1ADDbits
9561 #define SSP1ADD1 SSP1ADDbits.SSP1ADD1 // bit 1, shadows bit in SSP1ADDbits
9562 #define ADD1 SSP1ADDbits.ADD1 // bit 1, shadows bit in SSP1ADDbits
9563 #define SSP1ADD2 SSP1ADDbits.SSP1ADD2 // bit 2, shadows bit in SSP1ADDbits
9564 #define ADD2 SSP1ADDbits.ADD2 // bit 2, shadows bit in SSP1ADDbits
9565 #define SSP1ADD3 SSP1ADDbits.SSP1ADD3 // bit 3, shadows bit in SSP1ADDbits
9566 #define ADD3 SSP1ADDbits.ADD3 // bit 3, shadows bit in SSP1ADDbits
9567 #define SSP1ADD4 SSP1ADDbits.SSP1ADD4 // bit 4, shadows bit in SSP1ADDbits
9568 #define ADD4 SSP1ADDbits.ADD4 // bit 4, shadows bit in SSP1ADDbits
9569 #define SSP1ADD5 SSP1ADDbits.SSP1ADD5 // bit 5, shadows bit in SSP1ADDbits
9570 #define ADD5 SSP1ADDbits.ADD5 // bit 5, shadows bit in SSP1ADDbits
9571 #define SSP1ADD6 SSP1ADDbits.SSP1ADD6 // bit 6, shadows bit in SSP1ADDbits
9572 #define ADD6 SSP1ADDbits.ADD6 // bit 6, shadows bit in SSP1ADDbits
9573 #define SSP1ADD7 SSP1ADDbits.SSP1ADD7 // bit 7, shadows bit in SSP1ADDbits
9574 #define ADD7 SSP1ADDbits.ADD7 // bit 7, shadows bit in SSP1ADDbits
9576 #define SSP1BUF0 SSP1BUFbits.SSP1BUF0 // bit 0, shadows bit in SSP1BUFbits
9577 #define BUF0 SSP1BUFbits.BUF0 // bit 0, shadows bit in SSP1BUFbits
9578 #define SSP1BUF1 SSP1BUFbits.SSP1BUF1 // bit 1, shadows bit in SSP1BUFbits
9579 #define BUF1 SSP1BUFbits.BUF1 // bit 1, shadows bit in SSP1BUFbits
9580 #define SSP1BUF2 SSP1BUFbits.SSP1BUF2 // bit 2, shadows bit in SSP1BUFbits
9581 #define BUF2 SSP1BUFbits.BUF2 // bit 2, shadows bit in SSP1BUFbits
9582 #define SSP1BUF3 SSP1BUFbits.SSP1BUF3 // bit 3, shadows bit in SSP1BUFbits
9583 #define BUF3 SSP1BUFbits.BUF3 // bit 3, shadows bit in SSP1BUFbits
9584 #define SSP1BUF4 SSP1BUFbits.SSP1BUF4 // bit 4, shadows bit in SSP1BUFbits
9585 #define BUF4 SSP1BUFbits.BUF4 // bit 4, shadows bit in SSP1BUFbits
9586 #define SSP1BUF5 SSP1BUFbits.SSP1BUF5 // bit 5, shadows bit in SSP1BUFbits
9587 #define BUF5 SSP1BUFbits.BUF5 // bit 5, shadows bit in SSP1BUFbits
9588 #define SSP1BUF6 SSP1BUFbits.SSP1BUF6 // bit 6, shadows bit in SSP1BUFbits
9589 #define BUF6 SSP1BUFbits.BUF6 // bit 6, shadows bit in SSP1BUFbits
9590 #define SSP1BUF7 SSP1BUFbits.SSP1BUF7 // bit 7, shadows bit in SSP1BUFbits
9591 #define BUF7 SSP1BUFbits.BUF7 // bit 7, shadows bit in SSP1BUFbits
9593 #define SSPM0 SSP1CONbits.SSPM0 // bit 0
9594 #define SSPM1 SSP1CONbits.SSPM1 // bit 1
9595 #define SSPM2 SSP1CONbits.SSPM2 // bit 2
9596 #define SSPM3 SSP1CONbits.SSPM3 // bit 3
9597 #define CKP SSP1CONbits.CKP // bit 4
9598 #define SSPEN SSP1CONbits.SSPEN // bit 5
9599 #define SSPOV SSP1CONbits.SSPOV // bit 6
9600 #define WCOL SSP1CONbits.WCOL // bit 7
9602 #define SEN SSP1CON2bits.SEN // bit 0
9603 #define RSEN SSP1CON2bits.RSEN // bit 1
9604 #define PEN SSP1CON2bits.PEN // bit 2
9605 #define RCEN SSP1CON2bits.RCEN // bit 3
9606 #define ACKEN SSP1CON2bits.ACKEN // bit 4
9607 #define ACKDT SSP1CON2bits.ACKDT // bit 5
9608 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
9609 #define GCEN SSP1CON2bits.GCEN // bit 7
9611 #define DHEN SSP1CON3bits.DHEN // bit 0
9612 #define AHEN SSP1CON3bits.AHEN // bit 1
9613 #define SBCDE SSP1CON3bits.SBCDE // bit 2
9614 #define SDAHT SSP1CON3bits.SDAHT // bit 3
9615 #define BOEN SSP1CON3bits.BOEN // bit 4
9616 #define SCIE SSP1CON3bits.SCIE // bit 5
9617 #define PCIE SSP1CON3bits.PCIE // bit 6
9618 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
9620 #define SSP1MSK0 SSP1MSKbits.SSP1MSK0 // bit 0, shadows bit in SSP1MSKbits
9621 #define MSK0 SSP1MSKbits.MSK0 // bit 0, shadows bit in SSP1MSKbits
9622 #define SSP1MSK1 SSP1MSKbits.SSP1MSK1 // bit 1, shadows bit in SSP1MSKbits
9623 #define MSK1 SSP1MSKbits.MSK1 // bit 1, shadows bit in SSP1MSKbits
9624 #define SSP1MSK2 SSP1MSKbits.SSP1MSK2 // bit 2, shadows bit in SSP1MSKbits
9625 #define MSK2 SSP1MSKbits.MSK2 // bit 2, shadows bit in SSP1MSKbits
9626 #define SSP1MSK3 SSP1MSKbits.SSP1MSK3 // bit 3, shadows bit in SSP1MSKbits
9627 #define MSK3 SSP1MSKbits.MSK3 // bit 3, shadows bit in SSP1MSKbits
9628 #define SSP1MSK4 SSP1MSKbits.SSP1MSK4 // bit 4, shadows bit in SSP1MSKbits
9629 #define MSK4 SSP1MSKbits.MSK4 // bit 4, shadows bit in SSP1MSKbits
9630 #define SSP1MSK5 SSP1MSKbits.SSP1MSK5 // bit 5, shadows bit in SSP1MSKbits
9631 #define MSK5 SSP1MSKbits.MSK5 // bit 5, shadows bit in SSP1MSKbits
9632 #define SSP1MSK6 SSP1MSKbits.SSP1MSK6 // bit 6, shadows bit in SSP1MSKbits
9633 #define MSK6 SSP1MSKbits.MSK6 // bit 6, shadows bit in SSP1MSKbits
9634 #define SSP1MSK7 SSP1MSKbits.SSP1MSK7 // bit 7, shadows bit in SSP1MSKbits
9635 #define MSK7 SSP1MSKbits.MSK7 // bit 7, shadows bit in SSP1MSKbits
9637 #define BF SSP1STATbits.BF // bit 0
9638 #define UA SSP1STATbits.UA // bit 1
9639 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
9640 #define S SSP1STATbits.S // bit 3
9641 #define P SSP1STATbits.P // bit 4
9642 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
9643 #define CKE SSP1STATbits.CKE // bit 6
9644 #define SMP SSP1STATbits.SMP // bit 7
9646 #define C STATUSbits.C // bit 0
9647 #define DC STATUSbits.DC // bit 1
9648 #define Z STATUSbits.Z // bit 2
9649 #define NOT_PD STATUSbits.NOT_PD // bit 3
9650 #define NOT_TO STATUSbits.NOT_TO // bit 4
9652 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
9653 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
9654 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
9656 #define TMR1ON T1CONbits.TMR1ON // bit 0
9657 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
9658 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
9659 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
9660 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
9661 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
9662 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
9664 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
9665 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
9666 #define T1GVAL T1GCONbits.T1GVAL // bit 2
9667 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
9668 #define T1GSPM T1GCONbits.T1GSPM // bit 4
9669 #define T1GTM T1GCONbits.T1GTM // bit 5
9670 #define T1GPOL T1GCONbits.T1GPOL // bit 6
9671 #define TMR1GE T1GCONbits.TMR1GE // bit 7
9673 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
9674 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
9675 #define TMR2ON T2CONbits.TMR2ON // bit 2
9676 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
9677 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
9678 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
9679 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
9681 #define T4CKPS0 T4CONbits.T4CKPS0 // bit 0
9682 #define T4CKPS1 T4CONbits.T4CKPS1 // bit 1
9683 #define TMR4ON T4CONbits.TMR4ON // bit 2
9684 #define T4OUTPS0 T4CONbits.T4OUTPS0 // bit 3
9685 #define T4OUTPS1 T4CONbits.T4OUTPS1 // bit 4
9686 #define T4OUTPS2 T4CONbits.T4OUTPS2 // bit 5
9687 #define T4OUTPS3 T4CONbits.T4OUTPS3 // bit 6
9689 #define T6CKPS0 T6CONbits.T6CKPS0 // bit 0
9690 #define T6CKPS1 T6CONbits.T6CKPS1 // bit 1
9691 #define TMR6ON T6CONbits.TMR6ON // bit 2
9692 #define T6OUTPS0 T6CONbits.T6OUTPS0 // bit 3
9693 #define T6OUTPS1 T6CONbits.T6OUTPS1 // bit 4
9694 #define T6OUTPS2 T6CONbits.T6OUTPS2 // bit 5
9695 #define T6OUTPS3 T6CONbits.T6OUTPS3 // bit 6
9697 #define TRISA0 TRISAbits.TRISA0 // bit 0
9698 #define TRISA1 TRISAbits.TRISA1 // bit 1
9699 #define TRISA2 TRISAbits.TRISA2 // bit 2
9700 #define TRISA3 TRISAbits.TRISA3 // bit 3
9701 #define TRISA4 TRISAbits.TRISA4 // bit 4
9702 #define TRISA5 TRISAbits.TRISA5 // bit 5
9703 #define TRISA6 TRISAbits.TRISA6 // bit 6
9704 #define TRISA7 TRISAbits.TRISA7 // bit 7
9706 #define TRISB0 TRISBbits.TRISB0 // bit 0
9707 #define TRISB1 TRISBbits.TRISB1 // bit 1
9708 #define TRISB2 TRISBbits.TRISB2 // bit 2
9709 #define TRISB3 TRISBbits.TRISB3 // bit 3
9710 #define TRISB4 TRISBbits.TRISB4 // bit 4
9711 #define TRISB5 TRISBbits.TRISB5 // bit 5
9712 #define TRISB6 TRISBbits.TRISB6 // bit 6
9713 #define TRISB7 TRISBbits.TRISB7 // bit 7
9715 #define TRISC0 TRISCbits.TRISC0 // bit 0
9716 #define TRISC1 TRISCbits.TRISC1 // bit 1
9717 #define TRISC2 TRISCbits.TRISC2 // bit 2
9718 #define TRISC3 TRISCbits.TRISC3 // bit 3
9719 #define TRISC4 TRISCbits.TRISC4 // bit 4
9720 #define TRISC5 TRISCbits.TRISC5 // bit 5
9721 #define TRISC6 TRISCbits.TRISC6 // bit 6
9722 #define TRISC7 TRISCbits.TRISC7 // bit 7
9724 #define TRISD0 TRISDbits.TRISD0 // bit 0
9725 #define TRISD1 TRISDbits.TRISD1 // bit 1
9726 #define TRISD2 TRISDbits.TRISD2 // bit 2
9727 #define TRISD3 TRISDbits.TRISD3 // bit 3
9728 #define TRISD4 TRISDbits.TRISD4 // bit 4
9729 #define TRISD5 TRISDbits.TRISD5 // bit 5
9730 #define TRISD6 TRISDbits.TRISD6 // bit 6
9731 #define TRISD7 TRISDbits.TRISD7 // bit 7
9733 #define TRISE0 TRISEbits.TRISE0 // bit 0
9734 #define TRISE1 TRISEbits.TRISE1 // bit 1
9735 #define TRISE2 TRISEbits.TRISE2 // bit 2
9736 #define TRISE3 TRISEbits.TRISE3 // bit 3
9738 #define TX9D TX1STAbits.TX9D // bit 0
9739 #define TRMT TX1STAbits.TRMT // bit 1
9740 #define BRGH TX1STAbits.BRGH // bit 2
9741 #define SENDB TX1STAbits.SENDB // bit 3
9742 #define SYNC TX1STAbits.SYNC // bit 4
9743 #define TXEN TX1STAbits.TXEN // bit 5
9744 #define TX9 TX1STAbits.TX9 // bit 6
9745 #define CSRC TX1STAbits.CSRC // bit 7
9747 #define Reserved VREGCONbits.Reserved // bit 0
9748 #define VREGPM VREGCONbits.VREGPM // bit 1
9750 #define SWDTEN WDTCONbits.SWDTEN // bit 0
9751 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
9752 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
9753 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
9754 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
9755 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
9757 #define WPUA0 WPUAbits.WPUA0 // bit 0
9758 #define WPUA1 WPUAbits.WPUA1 // bit 1
9759 #define WPUA2 WPUAbits.WPUA2 // bit 2
9760 #define WPUA3 WPUAbits.WPUA3 // bit 3
9761 #define WPUA4 WPUAbits.WPUA4 // bit 4
9762 #define WPUA5 WPUAbits.WPUA5 // bit 5
9763 #define WPUA6 WPUAbits.WPUA6 // bit 6
9764 #define WPUA7 WPUAbits.WPUA7 // bit 7
9766 #define WPUB0 WPUBbits.WPUB0 // bit 0
9767 #define WPUB1 WPUBbits.WPUB1 // bit 1
9768 #define WPUB2 WPUBbits.WPUB2 // bit 2
9769 #define WPUB3 WPUBbits.WPUB3 // bit 3
9770 #define WPUB4 WPUBbits.WPUB4 // bit 4
9771 #define WPUB5 WPUBbits.WPUB5 // bit 5
9772 #define WPUB6 WPUBbits.WPUB6 // bit 6
9773 #define WPUB7 WPUBbits.WPUB7 // bit 7
9775 #define WPUC0 WPUCbits.WPUC0 // bit 0
9776 #define WPUC1 WPUCbits.WPUC1 // bit 1
9777 #define WPUC2 WPUCbits.WPUC2 // bit 2
9778 #define WPUC3 WPUCbits.WPUC3 // bit 3
9779 #define WPUC4 WPUCbits.WPUC4 // bit 4
9780 #define WPUC5 WPUCbits.WPUC5 // bit 5
9781 #define WPUC6 WPUCbits.WPUC6 // bit 6
9782 #define WPUC7 WPUCbits.WPUC7 // bit 7
9784 #define WPUD0 WPUDbits.WPUD0 // bit 0
9785 #define WPUD1 WPUDbits.WPUD1 // bit 1
9786 #define WPUD2 WPUDbits.WPUD2 // bit 2
9787 #define WPUD3 WPUDbits.WPUD3 // bit 3
9788 #define WPUD4 WPUDbits.WPUD4 // bit 4
9789 #define WPUD5 WPUDbits.WPUD5 // bit 5
9790 #define WPUD6 WPUDbits.WPUD6 // bit 6
9791 #define WPUD7 WPUDbits.WPUD7 // bit 7
9793 #define WPUE0 WPUEbits.WPUE0 // bit 0
9794 #define WPUE1 WPUEbits.WPUE1 // bit 1
9795 #define WPUE2 WPUEbits.WPUE2 // bit 2
9796 #define WPUE3 WPUEbits.WPUE3 // bit 3
9798 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
9799 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
9800 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
9801 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
9802 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
9804 #endif // #ifndef NO_BIT_DEFINES
9806 #endif // #ifndef __PIC16F1719_H__