?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f684.h
blobba83a0ccbd4a8095865dcd3f15c06545ba582ab3
1 /*
2 * This declarations of the PIC16F684 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16F684_H__
26 #define __PIC16F684_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTC_ADDR 0x0007
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define TMR1_ADDR 0x000E
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define TMR2_ADDR 0x0011
51 #define T2CON_ADDR 0x0012
52 #define CCPR1_ADDR 0x0013
53 #define CCPR1L_ADDR 0x0013
54 #define CCPR1H_ADDR 0x0014
55 #define CCP1CON_ADDR 0x0015
56 #define PWM1CON_ADDR 0x0016
57 #define ECCPAS_ADDR 0x0017
58 #define WDTCON_ADDR 0x0018
59 #define CMCON0_ADDR 0x0019
60 #define CMCON1_ADDR 0x001A
61 #define ADRESH_ADDR 0x001E
62 #define ADCON0_ADDR 0x001F
63 #define OPTION_REG_ADDR 0x0081
64 #define TRISA_ADDR 0x0085
65 #define TRISC_ADDR 0x0087
66 #define PIE1_ADDR 0x008C
67 #define PCON_ADDR 0x008E
68 #define OSCCON_ADDR 0x008F
69 #define OSCTUNE_ADDR 0x0090
70 #define ANSEL_ADDR 0x0091
71 #define PR2_ADDR 0x0092
72 #define WPU_ADDR 0x0095
73 #define WPUA_ADDR 0x0095
74 #define IOC_ADDR 0x0096
75 #define IOCA_ADDR 0x0096
76 #define VRCON_ADDR 0x0099
77 #define EEDAT_ADDR 0x009A
78 #define EEDATA_ADDR 0x009A
79 #define EEADR_ADDR 0x009B
80 #define EECON1_ADDR 0x009C
81 #define EECON2_ADDR 0x009D
82 #define ADRESL_ADDR 0x009E
83 #define ADCON1_ADDR 0x009F
84
85 #endif // #ifndef NO_ADDR_DEFINES
86
87 //==============================================================================
88 //
89 // Register Definitions
90 //
91 //==============================================================================
92
93 extern __at(0x0000) __sfr INDF;
94 extern __at(0x0001) __sfr TMR0;
95 extern __at(0x0002) __sfr PCL;
96
97 //==============================================================================
98 // STATUS Bits
99
100 extern __at(0x0003) __sfr STATUS;
101
102 typedef union
103 {
104 struct
105 {
106 unsigned C : 1;
107 unsigned DC : 1;
108 unsigned Z : 1;
109 unsigned NOT_PD : 1;
110 unsigned NOT_TO : 1;
111 unsigned RP0 : 1;
112 unsigned RP1 : 1;
113 unsigned IRP : 1;
114 };
115
116 struct
117 {
118 unsigned : 5;
119 unsigned RP : 2;
120 unsigned : 1;
121 };
122 } __STATUSbits_t;
123
124 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
125
126 #define _C 0x01
127 #define _DC 0x02
128 #define _Z 0x04
129 #define _NOT_PD 0x08
130 #define _NOT_TO 0x10
131 #define _RP0 0x20
132 #define _RP1 0x40
133 #define _IRP 0x80
134
135 //==============================================================================
136
137 extern __at(0x0004) __sfr FSR;
138
139 //==============================================================================
140 // PORTA Bits
141
142 extern __at(0x0005) __sfr PORTA;
143
144 typedef union
145 {
146 struct
147 {
148 unsigned RA0 : 1;
149 unsigned RA1 : 1;
150 unsigned RA2 : 1;
151 unsigned RA3 : 1;
152 unsigned RA4 : 1;
153 unsigned RA5 : 1;
154 unsigned : 1;
155 unsigned : 1;
156 };
157
158 struct
159 {
160 unsigned RA : 6;
161 unsigned : 2;
162 };
163 } __PORTAbits_t;
164
165 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
166
167 #define _RA0 0x01
168 #define _RA1 0x02
169 #define _RA2 0x04
170 #define _RA3 0x08
171 #define _RA4 0x10
172 #define _RA5 0x20
173
174 //==============================================================================
175
176
177 //==============================================================================
178 // PORTC Bits
179
180 extern __at(0x0007) __sfr PORTC;
181
182 typedef union
183 {
184 struct
185 {
186 unsigned RC0 : 1;
187 unsigned RC1 : 1;
188 unsigned RC2 : 1;
189 unsigned RC3 : 1;
190 unsigned RC4 : 1;
191 unsigned RC5 : 1;
192 unsigned : 1;
193 unsigned : 1;
194 };
195
196 struct
197 {
198 unsigned RC : 6;
199 unsigned : 2;
200 };
201 } __PORTCbits_t;
202
203 extern __at(0x0007) volatile __PORTCbits_t PORTCbits;
204
205 #define _RC0 0x01
206 #define _RC1 0x02
207 #define _RC2 0x04
208 #define _RC3 0x08
209 #define _RC4 0x10
210 #define _RC5 0x20
211
212 //==============================================================================
213
214 extern __at(0x000A) __sfr PCLATH;
215
216 //==============================================================================
217 // INTCON Bits
218
219 extern __at(0x000B) __sfr INTCON;
220
221 typedef union
222 {
223 struct
224 {
225 unsigned RAIF : 1;
226 unsigned INTF : 1;
227 unsigned T0IF : 1;
228 unsigned RAIE : 1;
229 unsigned INTE : 1;
230 unsigned T0IE : 1;
231 unsigned PEIE : 1;
232 unsigned GIE : 1;
233 };
234
235 struct
236 {
237 unsigned : 1;
238 unsigned : 1;
239 unsigned TMR0IF : 1;
240 unsigned : 1;
241 unsigned : 1;
242 unsigned TMR0IE : 1;
243 unsigned : 1;
244 unsigned : 1;
245 };
246 } __INTCONbits_t;
247
248 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
249
250 #define _RAIF 0x01
251 #define _INTF 0x02
252 #define _T0IF 0x04
253 #define _TMR0IF 0x04
254 #define _RAIE 0x08
255 #define _INTE 0x10
256 #define _T0IE 0x20
257 #define _TMR0IE 0x20
258 #define _PEIE 0x40
259 #define _GIE 0x80
260
261 //==============================================================================
262
263
264 //==============================================================================
265 // PIR1 Bits
266
267 extern __at(0x000C) __sfr PIR1;
268
269 typedef union
270 {
271 struct
272 {
273 unsigned TMR1IF : 1;
274 unsigned TMR2IF : 1;
275 unsigned OSFIF : 1;
276 unsigned C1IF : 1;
277 unsigned C2IF : 1;
278 unsigned CCP1IF : 1;
279 unsigned ADIF : 1;
280 unsigned EEIF : 1;
281 };
282
283 struct
284 {
285 unsigned T1IF : 1;
286 unsigned T2IF : 1;
287 unsigned : 1;
288 unsigned : 1;
289 unsigned : 1;
290 unsigned ECCPIF : 1;
291 unsigned : 1;
292 unsigned : 1;
293 };
294 } __PIR1bits_t;
295
296 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
297
298 #define _TMR1IF 0x01
299 #define _T1IF 0x01
300 #define _TMR2IF 0x02
301 #define _T2IF 0x02
302 #define _OSFIF 0x04
303 #define _C1IF 0x08
304 #define _C2IF 0x10
305 #define _CCP1IF 0x20
306 #define _ECCPIF 0x20
307 #define _ADIF 0x40
308 #define _EEIF 0x80
309
310 //==============================================================================
311
312 extern __at(0x000E) __sfr TMR1;
313 extern __at(0x000E) __sfr TMR1L;
314 extern __at(0x000F) __sfr TMR1H;
315
316 //==============================================================================
317 // T1CON Bits
318
319 extern __at(0x0010) __sfr T1CON;
320
321 typedef union
322 {
323 struct
324 {
325 unsigned TMR1ON : 1;
326 unsigned TMR1CS : 1;
327 unsigned NOT_T1SYNC : 1;
328 unsigned T1OSCEN : 1;
329 unsigned T1CKPS0 : 1;
330 unsigned T1CKPS1 : 1;
331 unsigned TMR1GE : 1;
332 unsigned T1GINV : 1;
333 };
334
335 struct
336 {
337 unsigned : 4;
338 unsigned T1CKPS : 2;
339 unsigned : 2;
340 };
341 } __T1CONbits_t;
342
343 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
344
345 #define _TMR1ON 0x01
346 #define _TMR1CS 0x02
347 #define _NOT_T1SYNC 0x04
348 #define _T1OSCEN 0x08
349 #define _T1CKPS0 0x10
350 #define _T1CKPS1 0x20
351 #define _TMR1GE 0x40
352 #define _T1GINV 0x80
353
354 //==============================================================================
355
356 extern __at(0x0011) __sfr TMR2;
357
358 //==============================================================================
359 // T2CON Bits
360
361 extern __at(0x0012) __sfr T2CON;
362
363 typedef union
364 {
365 struct
366 {
367 unsigned T2CKPS0 : 1;
368 unsigned T2CKPS1 : 1;
369 unsigned TMR2ON : 1;
370 unsigned TOUTPS0 : 1;
371 unsigned TOUTPS1 : 1;
372 unsigned TOUTPS2 : 1;
373 unsigned TOUTPS3 : 1;
374 unsigned : 1;
375 };
376
377 struct
378 {
379 unsigned T2CKPS : 2;
380 unsigned : 6;
381 };
382
383 struct
384 {
385 unsigned : 3;
386 unsigned TOUTPS : 4;
387 unsigned : 1;
388 };
389 } __T2CONbits_t;
390
391 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
392
393 #define _T2CKPS0 0x01
394 #define _T2CKPS1 0x02
395 #define _TMR2ON 0x04
396 #define _TOUTPS0 0x08
397 #define _TOUTPS1 0x10
398 #define _TOUTPS2 0x20
399 #define _TOUTPS3 0x40
400
401 //==============================================================================
402
403 extern __at(0x0013) __sfr CCPR1;
404 extern __at(0x0013) __sfr CCPR1L;
405 extern __at(0x0014) __sfr CCPR1H;
406
407 //==============================================================================
408 // CCP1CON Bits
409
410 extern __at(0x0015) __sfr CCP1CON;
411
412 typedef union
413 {
414 struct
415 {
416 unsigned CCP1M0 : 1;
417 unsigned CCP1M1 : 1;
418 unsigned CCP1M2 : 1;
419 unsigned CCP1M3 : 1;
420 unsigned DC1B0 : 1;
421 unsigned DC1B1 : 1;
422 unsigned P1M0 : 1;
423 unsigned P1M1 : 1;
424 };
425
426 struct
427 {
428 unsigned CCP1M : 4;
429 unsigned : 4;
430 };
431
432 struct
433 {
434 unsigned : 4;
435 unsigned DC1B : 2;
436 unsigned : 2;
437 };
438
439 struct
440 {
441 unsigned : 6;
442 unsigned P1M : 2;
443 };
444 } __CCP1CONbits_t;
445
446 extern __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits;
447
448 #define _CCP1M0 0x01
449 #define _CCP1M1 0x02
450 #define _CCP1M2 0x04
451 #define _CCP1M3 0x08
452 #define _DC1B0 0x10
453 #define _DC1B1 0x20
454 #define _P1M0 0x40
455 #define _P1M1 0x80
456
457 //==============================================================================
458
459
460 //==============================================================================
461 // PWM1CON Bits
462
463 extern __at(0x0016) __sfr PWM1CON;
464
465 typedef union
466 {
467 struct
468 {
469 unsigned PDC0 : 1;
470 unsigned PDC1 : 1;
471 unsigned PDC2 : 1;
472 unsigned PDC3 : 1;
473 unsigned PDC4 : 1;
474 unsigned PDC5 : 1;
475 unsigned PDC6 : 1;
476 unsigned PRSEN : 1;
477 };
478
479 struct
480 {
481 unsigned PDC : 7;
482 unsigned : 1;
483 };
484 } __PWM1CONbits_t;
485
486 extern __at(0x0016) volatile __PWM1CONbits_t PWM1CONbits;
487
488 #define _PDC0 0x01
489 #define _PDC1 0x02
490 #define _PDC2 0x04
491 #define _PDC3 0x08
492 #define _PDC4 0x10
493 #define _PDC5 0x20
494 #define _PDC6 0x40
495 #define _PRSEN 0x80
496
497 //==============================================================================
498
499
500 //==============================================================================
501 // ECCPAS Bits
502
503 extern __at(0x0017) __sfr ECCPAS;
504
505 typedef union
506 {
507 struct
508 {
509 unsigned PSSBD0 : 1;
510 unsigned PSSBD1 : 1;
511 unsigned PSSAC0 : 1;
512 unsigned PSSAC1 : 1;
513 unsigned ECCPAS0 : 1;
514 unsigned ECCPAS1 : 1;
515 unsigned ECCPAS2 : 1;
516 unsigned ECCPASE : 1;
517 };
518
519 struct
520 {
521 unsigned PSSBD : 2;
522 unsigned : 6;
523 };
524
525 struct
526 {
527 unsigned : 2;
528 unsigned PSSAC : 2;
529 unsigned : 4;
530 };
531
532 struct
533 {
534 unsigned : 4;
535 unsigned ECCPAS : 3;
536 unsigned : 1;
537 };
538 } __ECCPASbits_t;
539
540 extern __at(0x0017) volatile __ECCPASbits_t ECCPASbits;
541
542 #define _PSSBD0 0x01
543 #define _PSSBD1 0x02
544 #define _PSSAC0 0x04
545 #define _PSSAC1 0x08
546 #define _ECCPAS0 0x10
547 #define _ECCPAS1 0x20
548 #define _ECCPAS2 0x40
549 #define _ECCPASE 0x80
550
551 //==============================================================================
552
553
554 //==============================================================================
555 // WDTCON Bits
556
557 extern __at(0x0018) __sfr WDTCON;
558
559 typedef union
560 {
561 struct
562 {
563 unsigned SWDTEN : 1;
564 unsigned WDTPS0 : 1;
565 unsigned WDTPS1 : 1;
566 unsigned WDTPS2 : 1;
567 unsigned WDTPS3 : 1;
568 unsigned : 1;
569 unsigned : 1;
570 unsigned : 1;
571 };
572
573 struct
574 {
575 unsigned : 1;
576 unsigned WDTPS : 4;
577 unsigned : 3;
578 };
579 } __WDTCONbits_t;
580
581 extern __at(0x0018) volatile __WDTCONbits_t WDTCONbits;
582
583 #define _SWDTEN 0x01
584 #define _WDTPS0 0x02
585 #define _WDTPS1 0x04
586 #define _WDTPS2 0x08
587 #define _WDTPS3 0x10
588
589 //==============================================================================
590
591
592 //==============================================================================
593 // CMCON0 Bits
594
595 extern __at(0x0019) __sfr CMCON0;
596
597 typedef union
598 {
599 struct
600 {
601 unsigned CM0 : 1;
602 unsigned CM1 : 1;
603 unsigned CM2 : 1;
604 unsigned CIS : 1;
605 unsigned C1INV : 1;
606 unsigned C2INV : 1;
607 unsigned C1OUT : 1;
608 unsigned C2OUT : 1;
609 };
610
611 struct
612 {
613 unsigned CM : 3;
614 unsigned : 5;
615 };
616 } __CMCON0bits_t;
617
618 extern __at(0x0019) volatile __CMCON0bits_t CMCON0bits;
619
620 #define _CM0 0x01
621 #define _CM1 0x02
622 #define _CM2 0x04
623 #define _CIS 0x08
624 #define _C1INV 0x10
625 #define _C2INV 0x20
626 #define _C1OUT 0x40
627 #define _C2OUT 0x80
628
629 //==============================================================================
630
631
632 //==============================================================================
633 // CMCON1 Bits
634
635 extern __at(0x001A) __sfr CMCON1;
636
637 typedef struct
638 {
639 unsigned C2SYNC : 1;
640 unsigned T1GSS : 1;
641 unsigned : 1;
642 unsigned : 1;
643 unsigned : 1;
644 unsigned : 1;
645 unsigned : 1;
646 unsigned : 1;
647 } __CMCON1bits_t;
648
649 extern __at(0x001A) volatile __CMCON1bits_t CMCON1bits;
650
651 #define _C2SYNC 0x01
652 #define _T1GSS 0x02
653
654 //==============================================================================
655
656 extern __at(0x001E) __sfr ADRESH;
657
658 //==============================================================================
659 // ADCON0 Bits
660
661 extern __at(0x001F) __sfr ADCON0;
662
663 typedef union
664 {
665 struct
666 {
667 unsigned ADON : 1;
668 unsigned GO_NOT_DONE : 1;
669 unsigned CHS0 : 1;
670 unsigned CHS1 : 1;
671 unsigned CHS2 : 1;
672 unsigned : 1;
673 unsigned VCFG : 1;
674 unsigned ADFM : 1;
675 };
676
677 struct
678 {
679 unsigned : 1;
680 unsigned GO : 1;
681 unsigned : 1;
682 unsigned : 1;
683 unsigned : 1;
684 unsigned : 1;
685 unsigned : 1;
686 unsigned : 1;
687 };
688
689 struct
690 {
691 unsigned : 1;
692 unsigned NOT_DONE : 1;
693 unsigned : 1;
694 unsigned : 1;
695 unsigned : 1;
696 unsigned : 1;
697 unsigned : 1;
698 unsigned : 1;
699 };
700
701 struct
702 {
703 unsigned : 1;
704 unsigned GO_DONE : 1;
705 unsigned : 1;
706 unsigned : 1;
707 unsigned : 1;
708 unsigned : 1;
709 unsigned : 1;
710 unsigned : 1;
711 };
712
713 struct
714 {
715 unsigned : 2;
716 unsigned CHS : 3;
717 unsigned : 3;
718 };
719 } __ADCON0bits_t;
720
721 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
722
723 #define _ADON 0x01
724 #define _GO_NOT_DONE 0x02
725 #define _GO 0x02
726 #define _NOT_DONE 0x02
727 #define _GO_DONE 0x02
728 #define _CHS0 0x04
729 #define _CHS1 0x08
730 #define _CHS2 0x10
731 #define _VCFG 0x40
732 #define _ADFM 0x80
733
734 //==============================================================================
735
736
737 //==============================================================================
738 // OPTION_REG Bits
739
740 extern __at(0x0081) __sfr OPTION_REG;
741
742 typedef union
743 {
744 struct
745 {
746 unsigned PS0 : 1;
747 unsigned PS1 : 1;
748 unsigned PS2 : 1;
749 unsigned PSA : 1;
750 unsigned T0SE : 1;
751 unsigned T0CS : 1;
752 unsigned INTEDG : 1;
753 unsigned NOT_RAPU : 1;
754 };
755
756 struct
757 {
758 unsigned PS : 3;
759 unsigned : 5;
760 };
761 } __OPTION_REGbits_t;
762
763 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
764
765 #define _PS0 0x01
766 #define _PS1 0x02
767 #define _PS2 0x04
768 #define _PSA 0x08
769 #define _T0SE 0x10
770 #define _T0CS 0x20
771 #define _INTEDG 0x40
772 #define _NOT_RAPU 0x80
773
774 //==============================================================================
775
776
777 //==============================================================================
778 // TRISA Bits
779
780 extern __at(0x0085) __sfr TRISA;
781
782 typedef union
783 {
784 struct
785 {
786 unsigned TRISA0 : 1;
787 unsigned TRISA1 : 1;
788 unsigned TRISA2 : 1;
789 unsigned TRISA3 : 1;
790 unsigned TRISA4 : 1;
791 unsigned TRISA5 : 1;
792 unsigned : 1;
793 unsigned : 1;
794 };
795
796 struct
797 {
798 unsigned TRISA : 6;
799 unsigned : 2;
800 };
801 } __TRISAbits_t;
802
803 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
804
805 #define _TRISA0 0x01
806 #define _TRISA1 0x02
807 #define _TRISA2 0x04
808 #define _TRISA3 0x08
809 #define _TRISA4 0x10
810 #define _TRISA5 0x20
811
812 //==============================================================================
813
814
815 //==============================================================================
816 // TRISC Bits
817
818 extern __at(0x0087) __sfr TRISC;
819
820 typedef union
821 {
822 struct
823 {
824 unsigned TRISC0 : 1;
825 unsigned TRISC1 : 1;
826 unsigned TRISC2 : 1;
827 unsigned TRISC3 : 1;
828 unsigned TRISC4 : 1;
829 unsigned TRISC5 : 1;
830 unsigned : 1;
831 unsigned : 1;
832 };
833
834 struct
835 {
836 unsigned TRISC : 6;
837 unsigned : 2;
838 };
839 } __TRISCbits_t;
840
841 extern __at(0x0087) volatile __TRISCbits_t TRISCbits;
842
843 #define _TRISC0 0x01
844 #define _TRISC1 0x02
845 #define _TRISC2 0x04
846 #define _TRISC3 0x08
847 #define _TRISC4 0x10
848 #define _TRISC5 0x20
849
850 //==============================================================================
851
852
853 //==============================================================================
854 // PIE1 Bits
855
856 extern __at(0x008C) __sfr PIE1;
857
858 typedef union
859 {
860 struct
861 {
862 unsigned TMR1IE : 1;
863 unsigned TMR2IE : 1;
864 unsigned OSFIE : 1;
865 unsigned C1IE : 1;
866 unsigned C2IE : 1;
867 unsigned CCP1IE : 1;
868 unsigned ADIE : 1;
869 unsigned EEIE : 1;
870 };
871
872 struct
873 {
874 unsigned T1IE : 1;
875 unsigned T2IE : 1;
876 unsigned : 1;
877 unsigned : 1;
878 unsigned : 1;
879 unsigned ECCPIE : 1;
880 unsigned : 1;
881 unsigned : 1;
882 };
883 } __PIE1bits_t;
884
885 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
886
887 #define _TMR1IE 0x01
888 #define _T1IE 0x01
889 #define _TMR2IE 0x02
890 #define _T2IE 0x02
891 #define _OSFIE 0x04
892 #define _C1IE 0x08
893 #define _C2IE 0x10
894 #define _CCP1IE 0x20
895 #define _ECCPIE 0x20
896 #define _ADIE 0x40
897 #define _EEIE 0x80
898
899 //==============================================================================
900
901
902 //==============================================================================
903 // PCON Bits
904
905 extern __at(0x008E) __sfr PCON;
906
907 typedef union
908 {
909 struct
910 {
911 unsigned NOT_BOR : 1;
912 unsigned NOT_POR : 1;
913 unsigned : 1;
914 unsigned : 1;
915 unsigned SBOREN : 1;
916 unsigned ULPWUE : 1;
917 unsigned : 1;
918 unsigned : 1;
919 };
920
921 struct
922 {
923 unsigned NOT_BOD : 1;
924 unsigned : 1;
925 unsigned : 1;
926 unsigned : 1;
927 unsigned SBODEN : 1;
928 unsigned : 1;
929 unsigned : 1;
930 unsigned : 1;
931 };
932 } __PCONbits_t;
933
934 extern __at(0x008E) volatile __PCONbits_t PCONbits;
935
936 #define _NOT_BOR 0x01
937 #define _NOT_BOD 0x01
938 #define _NOT_POR 0x02
939 #define _SBOREN 0x10
940 #define _SBODEN 0x10
941 #define _ULPWUE 0x20
942
943 //==============================================================================
944
945
946 //==============================================================================
947 // OSCCON Bits
948
949 extern __at(0x008F) __sfr OSCCON;
950
951 typedef union
952 {
953 struct
954 {
955 unsigned SCS : 1;
956 unsigned LTS : 1;
957 unsigned HTS : 1;
958 unsigned OSTS : 1;
959 unsigned IRCF0 : 1;
960 unsigned IRCF1 : 1;
961 unsigned IRCF2 : 1;
962 unsigned : 1;
963 };
964
965 struct
966 {
967 unsigned : 4;
968 unsigned IRCF : 3;
969 unsigned : 1;
970 };
971 } __OSCCONbits_t;
972
973 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
974
975 #define _SCS 0x01
976 #define _LTS 0x02
977 #define _HTS 0x04
978 #define _OSTS 0x08
979 #define _IRCF0 0x10
980 #define _IRCF1 0x20
981 #define _IRCF2 0x40
982
983 //==============================================================================
984
985
986 //==============================================================================
987 // OSCTUNE Bits
988
989 extern __at(0x0090) __sfr OSCTUNE;
990
991 typedef union
992 {
993 struct
994 {
995 unsigned TUN0 : 1;
996 unsigned TUN1 : 1;
997 unsigned TUN2 : 1;
998 unsigned TUN3 : 1;
999 unsigned TUN4 : 1;
1000 unsigned : 1;
1001 unsigned : 1;
1002 unsigned : 1;
1003 };
1004
1005 struct
1006 {
1007 unsigned TUN : 5;
1008 unsigned : 3;
1009 };
1010 } __OSCTUNEbits_t;
1011
1012 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
1013
1014 #define _TUN0 0x01
1015 #define _TUN1 0x02
1016 #define _TUN2 0x04
1017 #define _TUN3 0x08
1018 #define _TUN4 0x10
1019
1020 //==============================================================================
1021
1022
1023 //==============================================================================
1024 // ANSEL Bits
1025
1026 extern __at(0x0091) __sfr ANSEL;
1027
1028 typedef struct
1029 {
1030 unsigned ANS0 : 1;
1031 unsigned ANS1 : 1;
1032 unsigned ANS2 : 1;
1033 unsigned ANS3 : 1;
1034 unsigned ANS4 : 1;
1035 unsigned ANS5 : 1;
1036 unsigned ANS6 : 1;
1037 unsigned ANS7 : 1;
1038 } __ANSELbits_t;
1039
1040 extern __at(0x0091) volatile __ANSELbits_t ANSELbits;
1041
1042 #define _ANS0 0x01
1043 #define _ANS1 0x02
1044 #define _ANS2 0x04
1045 #define _ANS3 0x08
1046 #define _ANS4 0x10
1047 #define _ANS5 0x20
1048 #define _ANS6 0x40
1049 #define _ANS7 0x80
1050
1051 //==============================================================================
1052
1053 extern __at(0x0092) __sfr PR2;
1054
1055 //==============================================================================
1056 // WPU Bits
1057
1058 extern __at(0x0095) __sfr WPU;
1059
1060 typedef union
1061 {
1062 struct
1063 {
1064 unsigned WPUA0 : 1;
1065 unsigned WPUA1 : 1;
1066 unsigned WPUA2 : 1;
1067 unsigned : 1;
1068 unsigned WPUA4 : 1;
1069 unsigned WPUA5 : 1;
1070 unsigned : 1;
1071 unsigned : 1;
1072 };
1073
1074 struct
1075 {
1076 unsigned WPU0 : 1;
1077 unsigned WPU1 : 1;
1078 unsigned WPU2 : 1;
1079 unsigned : 1;
1080 unsigned WPU4 : 1;
1081 unsigned WPU5 : 1;
1082 unsigned : 1;
1083 unsigned : 1;
1084 };
1085 } __WPUbits_t;
1086
1087 extern __at(0x0095) volatile __WPUbits_t WPUbits;
1088
1089 #define _WPUA0 0x01
1090 #define _WPU0 0x01
1091 #define _WPUA1 0x02
1092 #define _WPU1 0x02
1093 #define _WPUA2 0x04
1094 #define _WPU2 0x04
1095 #define _WPUA4 0x10
1096 #define _WPU4 0x10
1097 #define _WPUA5 0x20
1098 #define _WPU5 0x20
1099
1100 //==============================================================================
1101
1102
1103 //==============================================================================
1104 // WPUA Bits
1105
1106 extern __at(0x0095) __sfr WPUA;
1107
1108 typedef union
1109 {
1110 struct
1111 {
1112 unsigned WPUA0 : 1;
1113 unsigned WPUA1 : 1;
1114 unsigned WPUA2 : 1;
1115 unsigned : 1;
1116 unsigned WPUA4 : 1;
1117 unsigned WPUA5 : 1;
1118 unsigned : 1;
1119 unsigned : 1;
1120 };
1121
1122 struct
1123 {
1124 unsigned WPU0 : 1;
1125 unsigned WPU1 : 1;
1126 unsigned WPU2 : 1;
1127 unsigned : 1;
1128 unsigned WPU4 : 1;
1129 unsigned WPU5 : 1;
1130 unsigned : 1;
1131 unsigned : 1;
1132 };
1133 } __WPUAbits_t;
1134
1135 extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
1136
1137 #define _WPUA_WPUA0 0x01
1138 #define _WPUA_WPU0 0x01
1139 #define _WPUA_WPUA1 0x02
1140 #define _WPUA_WPU1 0x02
1141 #define _WPUA_WPUA2 0x04
1142 #define _WPUA_WPU2 0x04
1143 #define _WPUA_WPUA4 0x10
1144 #define _WPUA_WPU4 0x10
1145 #define _WPUA_WPUA5 0x20
1146 #define _WPUA_WPU5 0x20
1147
1148 //==============================================================================
1149
1150
1151 //==============================================================================
1152 // IOC Bits
1153
1154 extern __at(0x0096) __sfr IOC;
1155
1156 typedef union
1157 {
1158 struct
1159 {
1160 unsigned IOCA0 : 1;
1161 unsigned IOCA1 : 1;
1162 unsigned IOCA2 : 1;
1163 unsigned IOCA3 : 1;
1164 unsigned IOCA4 : 1;
1165 unsigned IOCA5 : 1;
1166 unsigned : 1;
1167 unsigned : 1;
1168 };
1169
1170 struct
1171 {
1172 unsigned IOC0 : 1;
1173 unsigned IOC1 : 1;
1174 unsigned IOC2 : 1;
1175 unsigned IOC3 : 1;
1176 unsigned IOC4 : 1;
1177 unsigned IOC5 : 1;
1178 unsigned : 1;
1179 unsigned : 1;
1180 };
1181
1182 struct
1183 {
1184 unsigned IOC : 6;
1185 unsigned : 2;
1186 };
1187
1188 struct
1189 {
1190 unsigned IOCA : 6;
1191 unsigned : 2;
1192 };
1193 } __IOCbits_t;
1194
1195 extern __at(0x0096) volatile __IOCbits_t IOCbits;
1196
1197 #define _IOCA0 0x01
1198 #define _IOC0 0x01
1199 #define _IOCA1 0x02
1200 #define _IOC1 0x02
1201 #define _IOCA2 0x04
1202 #define _IOC2 0x04
1203 #define _IOCA3 0x08
1204 #define _IOC3 0x08
1205 #define _IOCA4 0x10
1206 #define _IOC4 0x10
1207 #define _IOCA5 0x20
1208 #define _IOC5 0x20
1209
1210 //==============================================================================
1211
1212
1213 //==============================================================================
1214 // IOCA Bits
1215
1216 extern __at(0x0096) __sfr IOCA;
1217
1218 typedef union
1219 {
1220 struct
1221 {
1222 unsigned IOCA0 : 1;
1223 unsigned IOCA1 : 1;
1224 unsigned IOCA2 : 1;
1225 unsigned IOCA3 : 1;
1226 unsigned IOCA4 : 1;
1227 unsigned IOCA5 : 1;
1228 unsigned : 1;
1229 unsigned : 1;
1230 };
1231
1232 struct
1233 {
1234 unsigned IOC0 : 1;
1235 unsigned IOC1 : 1;
1236 unsigned IOC2 : 1;
1237 unsigned IOC3 : 1;
1238 unsigned IOC4 : 1;
1239 unsigned IOC5 : 1;
1240 unsigned : 1;
1241 unsigned : 1;
1242 };
1243
1244 struct
1245 {
1246 unsigned IOCA : 6;
1247 unsigned : 2;
1248 };
1249
1250 struct
1251 {
1252 unsigned IOC : 6;
1253 unsigned : 2;
1254 };
1255 } __IOCAbits_t;
1256
1257 extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
1258
1259 #define _IOCA_IOCA0 0x01
1260 #define _IOCA_IOC0 0x01
1261 #define _IOCA_IOCA1 0x02
1262 #define _IOCA_IOC1 0x02
1263 #define _IOCA_IOCA2 0x04
1264 #define _IOCA_IOC2 0x04
1265 #define _IOCA_IOCA3 0x08
1266 #define _IOCA_IOC3 0x08
1267 #define _IOCA_IOCA4 0x10
1268 #define _IOCA_IOC4 0x10
1269 #define _IOCA_IOCA5 0x20
1270 #define _IOCA_IOC5 0x20
1271
1272 //==============================================================================
1273
1274
1275 //==============================================================================
1276 // VRCON Bits
1277
1278 extern __at(0x0099) __sfr VRCON;
1279
1280 typedef union
1281 {
1282 struct
1283 {
1284 unsigned VR0 : 1;
1285 unsigned VR1 : 1;
1286 unsigned VR2 : 1;
1287 unsigned VR3 : 1;
1288 unsigned : 1;
1289 unsigned VRR : 1;
1290 unsigned : 1;
1291 unsigned VREN : 1;
1292 };
1293
1294 struct
1295 {
1296 unsigned VR : 4;
1297 unsigned : 4;
1298 };
1299 } __VRCONbits_t;
1300
1301 extern __at(0x0099) volatile __VRCONbits_t VRCONbits;
1302
1303 #define _VR0 0x01
1304 #define _VR1 0x02
1305 #define _VR2 0x04
1306 #define _VR3 0x08
1307 #define _VRR 0x20
1308 #define _VREN 0x80
1309
1310 //==============================================================================
1311
1312 extern __at(0x009A) __sfr EEDAT;
1313 extern __at(0x009A) __sfr EEDATA;
1314 extern __at(0x009B) __sfr EEADR;
1315
1316 //==============================================================================
1317 // EECON1 Bits
1318
1319 extern __at(0x009C) __sfr EECON1;
1320
1321 typedef struct
1322 {
1323 unsigned RD : 1;
1324 unsigned WR : 1;
1325 unsigned WREN : 1;
1326 unsigned WRERR : 1;
1327 unsigned : 1;
1328 unsigned : 1;
1329 unsigned : 1;
1330 unsigned : 1;
1331 } __EECON1bits_t;
1332
1333 extern __at(0x009C) volatile __EECON1bits_t EECON1bits;
1334
1335 #define _RD 0x01
1336 #define _WR 0x02
1337 #define _WREN 0x04
1338 #define _WRERR 0x08
1339
1340 //==============================================================================
1341
1342 extern __at(0x009D) __sfr EECON2;
1343 extern __at(0x009E) __sfr ADRESL;
1344
1345 //==============================================================================
1346 // ADCON1 Bits
1347
1348 extern __at(0x009F) __sfr ADCON1;
1349
1350 typedef union
1351 {
1352 struct
1353 {
1354 unsigned : 1;
1355 unsigned : 1;
1356 unsigned : 1;
1357 unsigned : 1;
1358 unsigned ADCS0 : 1;
1359 unsigned ADCS1 : 1;
1360 unsigned ADCS2 : 1;
1361 unsigned : 1;
1362 };
1363
1364 struct
1365 {
1366 unsigned : 4;
1367 unsigned ADCS : 3;
1368 unsigned : 1;
1369 };
1370 } __ADCON1bits_t;
1371
1372 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
1373
1374 #define _ADCS0 0x10
1375 #define _ADCS1 0x20
1376 #define _ADCS2 0x40
1377
1378 //==============================================================================
1379
1380
1381 //==============================================================================
1382 //
1383 // Configuration Bits
1384 //
1385 //==============================================================================
1386
1387 #define _CONFIG 0x2007
1388
1389 //----------------------------- CONFIG Options -------------------------------
1390
1391 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1392 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1393 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
1394 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
1395 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1396 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1397 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1398 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1399 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1400 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1401 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1402 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1403 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1404 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1405 #define _FOSC_EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1406 #define _EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1407 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1408 #define _FOSC_EXTRCCLK 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1409 #define _EXTRC 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1410 #define _EXTRC_OSC_CLKOUT 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1411 #define _WDTE_OFF 0x3FF7 // WDT disabled.
1412 #define _WDT_OFF 0x3FF7 // WDT disabled.
1413 #define _WDTE_ON 0x3FFF // WDT enabled.
1414 #define _WDT_ON 0x3FFF // WDT enabled.
1415 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1416 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1417 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1418 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1419 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1420 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1421 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
1422 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
1423 #define _BOREN_OFF 0x3CFF // BOR disabled.
1424 #define _BOD_OFF 0x3CFF // BOR disabled.
1425 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1426 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1427 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1428 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1429 #define _BOREN_ON 0x3FFF // BOR enabled.
1430 #define _BOD_ON 0x3FFF // BOR enabled.
1431 #define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled.
1432 #define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled.
1433 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
1434 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
1435
1436 //==============================================================================
1437
1438 #define _DEVID1 0x2006
1439
1440 #define _IDLOC0 0x2000
1441 #define _IDLOC1 0x2001
1442 #define _IDLOC2 0x2002
1443 #define _IDLOC3 0x2003
1444
1445 //==============================================================================
1446
1447 #ifndef NO_BIT_DEFINES
1448
1449 #define ADON ADCON0bits.ADON // bit 0
1450 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1451 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1452 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1453 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1454 #define CHS0 ADCON0bits.CHS0 // bit 2
1455 #define CHS1 ADCON0bits.CHS1 // bit 3
1456 #define CHS2 ADCON0bits.CHS2 // bit 4
1457 #define VCFG ADCON0bits.VCFG // bit 6
1458 #define ADFM ADCON0bits.ADFM // bit 7
1459
1460 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1461 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1462 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1463
1464 #define ANS0 ANSELbits.ANS0 // bit 0
1465 #define ANS1 ANSELbits.ANS1 // bit 1
1466 #define ANS2 ANSELbits.ANS2 // bit 2
1467 #define ANS3 ANSELbits.ANS3 // bit 3
1468 #define ANS4 ANSELbits.ANS4 // bit 4
1469 #define ANS5 ANSELbits.ANS5 // bit 5
1470 #define ANS6 ANSELbits.ANS6 // bit 6
1471 #define ANS7 ANSELbits.ANS7 // bit 7
1472
1473 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1474 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1475 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1476 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1477 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
1478 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
1479 #define P1M0 CCP1CONbits.P1M0 // bit 6
1480 #define P1M1 CCP1CONbits.P1M1 // bit 7
1481
1482 #define CM0 CMCON0bits.CM0 // bit 0
1483 #define CM1 CMCON0bits.CM1 // bit 1
1484 #define CM2 CMCON0bits.CM2 // bit 2
1485 #define CIS CMCON0bits.CIS // bit 3
1486 #define C1INV CMCON0bits.C1INV // bit 4
1487 #define C2INV CMCON0bits.C2INV // bit 5
1488 #define C1OUT CMCON0bits.C1OUT // bit 6
1489 #define C2OUT CMCON0bits.C2OUT // bit 7
1490
1491 #define C2SYNC CMCON1bits.C2SYNC // bit 0
1492 #define T1GSS CMCON1bits.T1GSS // bit 1
1493
1494 #define PSSBD0 ECCPASbits.PSSBD0 // bit 0
1495 #define PSSBD1 ECCPASbits.PSSBD1 // bit 1
1496 #define PSSAC0 ECCPASbits.PSSAC0 // bit 2
1497 #define PSSAC1 ECCPASbits.PSSAC1 // bit 3
1498 #define ECCPAS0 ECCPASbits.ECCPAS0 // bit 4
1499 #define ECCPAS1 ECCPASbits.ECCPAS1 // bit 5
1500 #define ECCPAS2 ECCPASbits.ECCPAS2 // bit 6
1501 #define ECCPASE ECCPASbits.ECCPASE // bit 7
1502
1503 #define RD EECON1bits.RD // bit 0
1504 #define WR EECON1bits.WR // bit 1
1505 #define WREN EECON1bits.WREN // bit 2
1506 #define WRERR EECON1bits.WRERR // bit 3
1507
1508 #define RAIF INTCONbits.RAIF // bit 0
1509 #define INTF INTCONbits.INTF // bit 1
1510 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1511 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1512 #define RAIE INTCONbits.RAIE // bit 3
1513 #define INTE INTCONbits.INTE // bit 4
1514 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1515 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1516 #define PEIE INTCONbits.PEIE // bit 6
1517 #define GIE INTCONbits.GIE // bit 7
1518
1519 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1520 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1521 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1522 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1523 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1524 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1525 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1526 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1527 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1528 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1529 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1530 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1531
1532 #define PS0 OPTION_REGbits.PS0 // bit 0
1533 #define PS1 OPTION_REGbits.PS1 // bit 1
1534 #define PS2 OPTION_REGbits.PS2 // bit 2
1535 #define PSA OPTION_REGbits.PSA // bit 3
1536 #define T0SE OPTION_REGbits.T0SE // bit 4
1537 #define T0CS OPTION_REGbits.T0CS // bit 5
1538 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1539 #define NOT_RAPU OPTION_REGbits.NOT_RAPU // bit 7
1540
1541 #define SCS OSCCONbits.SCS // bit 0
1542 #define LTS OSCCONbits.LTS // bit 1
1543 #define HTS OSCCONbits.HTS // bit 2
1544 #define OSTS OSCCONbits.OSTS // bit 3
1545 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1546 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1547 #define IRCF2 OSCCONbits.IRCF2 // bit 6
1548
1549 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1550 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1551 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1552 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1553 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1554
1555 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1556 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1557 #define NOT_POR PCONbits.NOT_POR // bit 1
1558 #define SBOREN PCONbits.SBOREN // bit 4, shadows bit in PCONbits
1559 #define SBODEN PCONbits.SBODEN // bit 4, shadows bit in PCONbits
1560 #define ULPWUE PCONbits.ULPWUE // bit 5
1561
1562 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1563 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1564 #define TMR2IE PIE1bits.TMR2IE // bit 1, shadows bit in PIE1bits
1565 #define T2IE PIE1bits.T2IE // bit 1, shadows bit in PIE1bits
1566 #define OSFIE PIE1bits.OSFIE // bit 2
1567 #define C1IE PIE1bits.C1IE // bit 3
1568 #define C2IE PIE1bits.C2IE // bit 4
1569 #define CCP1IE PIE1bits.CCP1IE // bit 5, shadows bit in PIE1bits
1570 #define ECCPIE PIE1bits.ECCPIE // bit 5, shadows bit in PIE1bits
1571 #define ADIE PIE1bits.ADIE // bit 6
1572 #define EEIE PIE1bits.EEIE // bit 7
1573
1574 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1575 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1576 #define TMR2IF PIR1bits.TMR2IF // bit 1, shadows bit in PIR1bits
1577 #define T2IF PIR1bits.T2IF // bit 1, shadows bit in PIR1bits
1578 #define OSFIF PIR1bits.OSFIF // bit 2
1579 #define C1IF PIR1bits.C1IF // bit 3
1580 #define C2IF PIR1bits.C2IF // bit 4
1581 #define CCP1IF PIR1bits.CCP1IF // bit 5, shadows bit in PIR1bits
1582 #define ECCPIF PIR1bits.ECCPIF // bit 5, shadows bit in PIR1bits
1583 #define ADIF PIR1bits.ADIF // bit 6
1584 #define EEIF PIR1bits.EEIF // bit 7
1585
1586 #define RA0 PORTAbits.RA0 // bit 0
1587 #define RA1 PORTAbits.RA1 // bit 1
1588 #define RA2 PORTAbits.RA2 // bit 2
1589 #define RA3 PORTAbits.RA3 // bit 3
1590 #define RA4 PORTAbits.RA4 // bit 4
1591 #define RA5 PORTAbits.RA5 // bit 5
1592
1593 #define RC0 PORTCbits.RC0 // bit 0
1594 #define RC1 PORTCbits.RC1 // bit 1
1595 #define RC2 PORTCbits.RC2 // bit 2
1596 #define RC3 PORTCbits.RC3 // bit 3
1597 #define RC4 PORTCbits.RC4 // bit 4
1598 #define RC5 PORTCbits.RC5 // bit 5
1599
1600 #define PDC0 PWM1CONbits.PDC0 // bit 0
1601 #define PDC1 PWM1CONbits.PDC1 // bit 1
1602 #define PDC2 PWM1CONbits.PDC2 // bit 2
1603 #define PDC3 PWM1CONbits.PDC3 // bit 3
1604 #define PDC4 PWM1CONbits.PDC4 // bit 4
1605 #define PDC5 PWM1CONbits.PDC5 // bit 5
1606 #define PDC6 PWM1CONbits.PDC6 // bit 6
1607 #define PRSEN PWM1CONbits.PRSEN // bit 7
1608
1609 #define C STATUSbits.C // bit 0
1610 #define DC STATUSbits.DC // bit 1
1611 #define Z STATUSbits.Z // bit 2
1612 #define NOT_PD STATUSbits.NOT_PD // bit 3
1613 #define NOT_TO STATUSbits.NOT_TO // bit 4
1614 #define RP0 STATUSbits.RP0 // bit 5
1615 #define RP1 STATUSbits.RP1 // bit 6
1616 #define IRP STATUSbits.IRP // bit 7
1617
1618 #define TMR1ON T1CONbits.TMR1ON // bit 0
1619 #define TMR1CS T1CONbits.TMR1CS // bit 1
1620 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1621 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1622 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1623 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1624 #define TMR1GE T1CONbits.TMR1GE // bit 6
1625 #define T1GINV T1CONbits.T1GINV // bit 7
1626
1627 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1628 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1629 #define TMR2ON T2CONbits.TMR2ON // bit 2
1630 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1631 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1632 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1633 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1634
1635 #define TRISA0 TRISAbits.TRISA0 // bit 0
1636 #define TRISA1 TRISAbits.TRISA1 // bit 1
1637 #define TRISA2 TRISAbits.TRISA2 // bit 2
1638 #define TRISA3 TRISAbits.TRISA3 // bit 3
1639 #define TRISA4 TRISAbits.TRISA4 // bit 4
1640 #define TRISA5 TRISAbits.TRISA5 // bit 5
1641
1642 #define TRISC0 TRISCbits.TRISC0 // bit 0
1643 #define TRISC1 TRISCbits.TRISC1 // bit 1
1644 #define TRISC2 TRISCbits.TRISC2 // bit 2
1645 #define TRISC3 TRISCbits.TRISC3 // bit 3
1646 #define TRISC4 TRISCbits.TRISC4 // bit 4
1647 #define TRISC5 TRISCbits.TRISC5 // bit 5
1648
1649 #define VR0 VRCONbits.VR0 // bit 0
1650 #define VR1 VRCONbits.VR1 // bit 1
1651 #define VR2 VRCONbits.VR2 // bit 2
1652 #define VR3 VRCONbits.VR3 // bit 3
1653 #define VRR VRCONbits.VRR // bit 5
1654 #define VREN VRCONbits.VREN // bit 7
1655
1656 #define SWDTEN WDTCONbits.SWDTEN // bit 0
1657 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
1658 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
1659 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
1660 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
1661
1662 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
1663 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
1664 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
1665 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
1666 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
1667 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
1668 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
1669 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
1670 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
1671 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
1672
1673 #endif // #ifndef NO_BIT_DEFINES
1674
1675 #endif // #ifndef __PIC16F684_H__
SDCC git mirror