struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16f688.h
blob1f410d03a20c6c82dc12208955040c492fe16454
1 /*
2 * This declarations of the PIC16F688 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F688_H__
26 #define __PIC16F688_H__
28 //==============================================================================
30 // Register Addresses
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTC_ADDR 0x0007
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define TMR1_ADDR 0x000E
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define BAUDCTL_ADDR 0x0011
51 #define SPBRGH_ADDR 0x0012
52 #define SPBRG_ADDR 0x0013
53 #define RCREG_ADDR 0x0014
54 #define TXREG_ADDR 0x0015
55 #define TXSTA_ADDR 0x0016
56 #define RCSTA_ADDR 0x0017
57 #define WDTCON_ADDR 0x0018
58 #define CMCON0_ADDR 0x0019
59 #define CMCON1_ADDR 0x001A
60 #define ADRESH_ADDR 0x001E
61 #define ADCON0_ADDR 0x001F
62 #define OPTION_REG_ADDR 0x0081
63 #define TRISA_ADDR 0x0085
64 #define TRISC_ADDR 0x0087
65 #define PIE1_ADDR 0x008C
66 #define PCON_ADDR 0x008E
67 #define OSCCON_ADDR 0x008F
68 #define OSCTUNE_ADDR 0x0090
69 #define ANSEL_ADDR 0x0091
70 #define WPU_ADDR 0x0095
71 #define WPUA_ADDR 0x0095
72 #define IOC_ADDR 0x0096
73 #define IOCA_ADDR 0x0096
74 #define EEDATH_ADDR 0x0097
75 #define EEADRH_ADDR 0x0098
76 #define VRCON_ADDR 0x0099
77 #define EEDAT_ADDR 0x009A
78 #define EEDATA_ADDR 0x009A
79 #define EEADR_ADDR 0x009B
80 #define EECON1_ADDR 0x009C
81 #define EECON2_ADDR 0x009D
82 #define ADRESL_ADDR 0x009E
83 #define ADCON1_ADDR 0x009F
85 #endif // #ifndef NO_ADDR_DEFINES
87 //==============================================================================
89 // Register Definitions
91 //==============================================================================
93 extern __at(0x0000) __sfr INDF;
94 extern __at(0x0001) __sfr TMR0;
95 extern __at(0x0002) __sfr PCL;
97 //==============================================================================
98 // STATUS Bits
100 extern __at(0x0003) __sfr STATUS;
102 typedef union
104 struct
106 unsigned C : 1;
107 unsigned DC : 1;
108 unsigned Z : 1;
109 unsigned NOT_PD : 1;
110 unsigned NOT_TO : 1;
111 unsigned RP0 : 1;
112 unsigned RP1 : 1;
113 unsigned IRP : 1;
116 struct
118 unsigned : 5;
119 unsigned RP : 2;
120 unsigned : 1;
122 } __STATUSbits_t;
124 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
126 #define _C 0x01
127 #define _DC 0x02
128 #define _Z 0x04
129 #define _NOT_PD 0x08
130 #define _NOT_TO 0x10
131 #define _RP0 0x20
132 #define _RP1 0x40
133 #define _IRP 0x80
135 //==============================================================================
137 extern __at(0x0004) __sfr FSR;
139 //==============================================================================
140 // PORTA Bits
142 extern __at(0x0005) __sfr PORTA;
144 typedef union
146 struct
148 unsigned RA0 : 1;
149 unsigned RA1 : 1;
150 unsigned RA2 : 1;
151 unsigned RA3 : 1;
152 unsigned RA4 : 1;
153 unsigned RA5 : 1;
154 unsigned : 1;
155 unsigned : 1;
158 struct
160 unsigned RA : 6;
161 unsigned : 2;
163 } __PORTAbits_t;
165 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
167 #define _RA0 0x01
168 #define _RA1 0x02
169 #define _RA2 0x04
170 #define _RA3 0x08
171 #define _RA4 0x10
172 #define _RA5 0x20
174 //==============================================================================
177 //==============================================================================
178 // PORTC Bits
180 extern __at(0x0007) __sfr PORTC;
182 typedef union
184 struct
186 unsigned RC0 : 1;
187 unsigned RC1 : 1;
188 unsigned RC2 : 1;
189 unsigned RC3 : 1;
190 unsigned RC4 : 1;
191 unsigned RC5 : 1;
192 unsigned : 1;
193 unsigned : 1;
196 struct
198 unsigned RC : 6;
199 unsigned : 2;
201 } __PORTCbits_t;
203 extern __at(0x0007) volatile __PORTCbits_t PORTCbits;
205 #define _RC0 0x01
206 #define _RC1 0x02
207 #define _RC2 0x04
208 #define _RC3 0x08
209 #define _RC4 0x10
210 #define _RC5 0x20
212 //==============================================================================
214 extern __at(0x000A) __sfr PCLATH;
216 //==============================================================================
217 // INTCON Bits
219 extern __at(0x000B) __sfr INTCON;
221 typedef union
223 struct
225 unsigned RAIF : 1;
226 unsigned INTF : 1;
227 unsigned T0IF : 1;
228 unsigned RAIE : 1;
229 unsigned INTE : 1;
230 unsigned T0IE : 1;
231 unsigned PEIE : 1;
232 unsigned GIE : 1;
235 struct
237 unsigned : 1;
238 unsigned : 1;
239 unsigned TMR0IF : 1;
240 unsigned : 1;
241 unsigned : 1;
242 unsigned TMR0IE : 1;
243 unsigned : 1;
244 unsigned : 1;
246 } __INTCONbits_t;
248 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
250 #define _RAIF 0x01
251 #define _INTF 0x02
252 #define _T0IF 0x04
253 #define _TMR0IF 0x04
254 #define _RAIE 0x08
255 #define _INTE 0x10
256 #define _T0IE 0x20
257 #define _TMR0IE 0x20
258 #define _PEIE 0x40
259 #define _GIE 0x80
261 //==============================================================================
264 //==============================================================================
265 // PIR1 Bits
267 extern __at(0x000C) __sfr PIR1;
269 typedef union
271 struct
273 unsigned TMR1IF : 1;
274 unsigned TXIF : 1;
275 unsigned OSFIF : 1;
276 unsigned C1IF : 1;
277 unsigned C2IF : 1;
278 unsigned RCIF : 1;
279 unsigned ADIF : 1;
280 unsigned EEIF : 1;
283 struct
285 unsigned T1IF : 1;
286 unsigned : 1;
287 unsigned : 1;
288 unsigned : 1;
289 unsigned : 1;
290 unsigned : 1;
291 unsigned : 1;
292 unsigned : 1;
294 } __PIR1bits_t;
296 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
298 #define _TMR1IF 0x01
299 #define _T1IF 0x01
300 #define _TXIF 0x02
301 #define _OSFIF 0x04
302 #define _C1IF 0x08
303 #define _C2IF 0x10
304 #define _RCIF 0x20
305 #define _ADIF 0x40
306 #define _EEIF 0x80
308 //==============================================================================
310 extern __at(0x000E) __sfr TMR1;
311 extern __at(0x000E) __sfr TMR1L;
312 extern __at(0x000F) __sfr TMR1H;
314 //==============================================================================
315 // T1CON Bits
317 extern __at(0x0010) __sfr T1CON;
319 typedef union
321 struct
323 unsigned TMR1ON : 1;
324 unsigned TMR1CS : 1;
325 unsigned NOT_T1SYNC : 1;
326 unsigned T1OSCEN : 1;
327 unsigned T1CKPS0 : 1;
328 unsigned T1CKPS1 : 1;
329 unsigned TMR1GE : 1;
330 unsigned T1GINV : 1;
333 struct
335 unsigned : 4;
336 unsigned T1CKPS : 2;
337 unsigned : 2;
339 } __T1CONbits_t;
341 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
343 #define _TMR1ON 0x01
344 #define _TMR1CS 0x02
345 #define _NOT_T1SYNC 0x04
346 #define _T1OSCEN 0x08
347 #define _T1CKPS0 0x10
348 #define _T1CKPS1 0x20
349 #define _TMR1GE 0x40
350 #define _T1GINV 0x80
352 //==============================================================================
355 //==============================================================================
356 // BAUDCTL Bits
358 extern __at(0x0011) __sfr BAUDCTL;
360 #define BAUDCON BAUDCTL
362 typedef struct
364 unsigned ABDEN : 1;
365 unsigned WUE : 1;
366 unsigned : 1;
367 unsigned BRG16 : 1;
368 unsigned SCKP : 1;
369 unsigned : 1;
370 unsigned RCIDL : 1;
371 unsigned ABDOVF : 1;
372 } __BAUDCTLbits_t;
374 extern __at(0x0011) volatile __BAUDCTLbits_t BAUDCTLbits;
376 #define BAUDCONbits BAUDCTLbits
378 #define _ABDEN 0x01
379 #define _WUE 0x02
380 #define _BRG16 0x08
381 #define _SCKP 0x10
382 #define _RCIDL 0x40
383 #define _ABDOVF 0x80
385 //==============================================================================
387 extern __at(0x0012) __sfr SPBRGH;
388 extern __at(0x0013) __sfr SPBRG;
389 extern __at(0x0014) __sfr RCREG;
390 extern __at(0x0015) __sfr TXREG;
392 //==============================================================================
393 // TXSTA Bits
395 extern __at(0x0016) __sfr TXSTA;
397 typedef struct
399 unsigned TX9D : 1;
400 unsigned TRMT : 1;
401 unsigned BRGH : 1;
402 unsigned SENDB : 1;
403 unsigned SYNC : 1;
404 unsigned TXEN : 1;
405 unsigned TX9 : 1;
406 unsigned CSRC : 1;
407 } __TXSTAbits_t;
409 extern __at(0x0016) volatile __TXSTAbits_t TXSTAbits;
411 #define _TX9D 0x01
412 #define _TRMT 0x02
413 #define _BRGH 0x04
414 #define _SENDB 0x08
415 #define _SYNC 0x10
416 #define _TXEN 0x20
417 #define _TX9 0x40
418 #define _CSRC 0x80
420 //==============================================================================
423 //==============================================================================
424 // RCSTA Bits
426 extern __at(0x0017) __sfr RCSTA;
428 typedef struct
430 unsigned RX9D : 1;
431 unsigned OERR : 1;
432 unsigned FERR : 1;
433 unsigned ADDEN : 1;
434 unsigned CREN : 1;
435 unsigned SREN : 1;
436 unsigned RX9 : 1;
437 unsigned SPEN : 1;
438 } __RCSTAbits_t;
440 extern __at(0x0017) volatile __RCSTAbits_t RCSTAbits;
442 #define _RX9D 0x01
443 #define _OERR 0x02
444 #define _FERR 0x04
445 #define _ADDEN 0x08
446 #define _CREN 0x10
447 #define _SREN 0x20
448 #define _RX9 0x40
449 #define _SPEN 0x80
451 //==============================================================================
454 //==============================================================================
455 // WDTCON Bits
457 extern __at(0x0018) __sfr WDTCON;
459 typedef union
461 struct
463 unsigned SWDTEN : 1;
464 unsigned WDTPS0 : 1;
465 unsigned WDTPS1 : 1;
466 unsigned WDTPS2 : 1;
467 unsigned WDTPS3 : 1;
468 unsigned : 1;
469 unsigned : 1;
470 unsigned : 1;
473 struct
475 unsigned : 1;
476 unsigned WDTPS : 4;
477 unsigned : 3;
479 } __WDTCONbits_t;
481 extern __at(0x0018) volatile __WDTCONbits_t WDTCONbits;
483 #define _SWDTEN 0x01
484 #define _WDTPS0 0x02
485 #define _WDTPS1 0x04
486 #define _WDTPS2 0x08
487 #define _WDTPS3 0x10
489 //==============================================================================
492 //==============================================================================
493 // CMCON0 Bits
495 extern __at(0x0019) __sfr CMCON0;
497 typedef union
499 struct
501 unsigned CM0 : 1;
502 unsigned CM1 : 1;
503 unsigned CM2 : 1;
504 unsigned CIS : 1;
505 unsigned C1INV : 1;
506 unsigned C2INV : 1;
507 unsigned C1OUT : 1;
508 unsigned C2OUT : 1;
511 struct
513 unsigned CM : 3;
514 unsigned : 5;
516 } __CMCON0bits_t;
518 extern __at(0x0019) volatile __CMCON0bits_t CMCON0bits;
520 #define _CM0 0x01
521 #define _CM1 0x02
522 #define _CM2 0x04
523 #define _CIS 0x08
524 #define _C1INV 0x10
525 #define _C2INV 0x20
526 #define _C1OUT 0x40
527 #define _C2OUT 0x80
529 //==============================================================================
532 //==============================================================================
533 // CMCON1 Bits
535 extern __at(0x001A) __sfr CMCON1;
537 typedef struct
539 unsigned C2SYNC : 1;
540 unsigned T1GSS : 1;
541 unsigned : 1;
542 unsigned : 1;
543 unsigned : 1;
544 unsigned : 1;
545 unsigned : 1;
546 unsigned : 1;
547 } __CMCON1bits_t;
549 extern __at(0x001A) volatile __CMCON1bits_t CMCON1bits;
551 #define _C2SYNC 0x01
552 #define _T1GSS 0x02
554 //==============================================================================
556 extern __at(0x001E) __sfr ADRESH;
558 //==============================================================================
559 // ADCON0 Bits
561 extern __at(0x001F) __sfr ADCON0;
563 typedef union
565 struct
567 unsigned ADON : 1;
568 unsigned GO_NOT_DONE : 1;
569 unsigned CHS0 : 1;
570 unsigned CHS1 : 1;
571 unsigned CHS2 : 1;
572 unsigned : 1;
573 unsigned VCFG : 1;
574 unsigned ADFM : 1;
577 struct
579 unsigned : 1;
580 unsigned GO : 1;
581 unsigned : 1;
582 unsigned : 1;
583 unsigned : 1;
584 unsigned : 1;
585 unsigned : 1;
586 unsigned : 1;
589 struct
591 unsigned : 1;
592 unsigned NOT_DONE : 1;
593 unsigned : 1;
594 unsigned : 1;
595 unsigned : 1;
596 unsigned : 1;
597 unsigned : 1;
598 unsigned : 1;
601 struct
603 unsigned : 1;
604 unsigned GO_DONE : 1;
605 unsigned : 1;
606 unsigned : 1;
607 unsigned : 1;
608 unsigned : 1;
609 unsigned : 1;
610 unsigned : 1;
613 struct
615 unsigned : 2;
616 unsigned CHS : 3;
617 unsigned : 3;
619 } __ADCON0bits_t;
621 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
623 #define _ADON 0x01
624 #define _GO_NOT_DONE 0x02
625 #define _GO 0x02
626 #define _NOT_DONE 0x02
627 #define _GO_DONE 0x02
628 #define _CHS0 0x04
629 #define _CHS1 0x08
630 #define _CHS2 0x10
631 #define _VCFG 0x40
632 #define _ADFM 0x80
634 //==============================================================================
637 //==============================================================================
638 // OPTION_REG Bits
640 extern __at(0x0081) __sfr OPTION_REG;
642 typedef union
644 struct
646 unsigned PS0 : 1;
647 unsigned PS1 : 1;
648 unsigned PS2 : 1;
649 unsigned PSA : 1;
650 unsigned T0SE : 1;
651 unsigned T0CS : 1;
652 unsigned INTEDG : 1;
653 unsigned NOT_RAPU : 1;
656 struct
658 unsigned PS : 3;
659 unsigned : 5;
661 } __OPTION_REGbits_t;
663 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
665 #define _PS0 0x01
666 #define _PS1 0x02
667 #define _PS2 0x04
668 #define _PSA 0x08
669 #define _T0SE 0x10
670 #define _T0CS 0x20
671 #define _INTEDG 0x40
672 #define _NOT_RAPU 0x80
674 //==============================================================================
677 //==============================================================================
678 // TRISA Bits
680 extern __at(0x0085) __sfr TRISA;
682 typedef union
684 struct
686 unsigned TRISA0 : 1;
687 unsigned TRISA1 : 1;
688 unsigned TRISA2 : 1;
689 unsigned TRISA3 : 1;
690 unsigned TRISA4 : 1;
691 unsigned TRISA5 : 1;
692 unsigned : 1;
693 unsigned : 1;
696 struct
698 unsigned TRISA : 6;
699 unsigned : 2;
701 } __TRISAbits_t;
703 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
705 #define _TRISA0 0x01
706 #define _TRISA1 0x02
707 #define _TRISA2 0x04
708 #define _TRISA3 0x08
709 #define _TRISA4 0x10
710 #define _TRISA5 0x20
712 //==============================================================================
715 //==============================================================================
716 // TRISC Bits
718 extern __at(0x0087) __sfr TRISC;
720 typedef union
722 struct
724 unsigned TRISC0 : 1;
725 unsigned TRISC1 : 1;
726 unsigned TRISC2 : 1;
727 unsigned TRISC3 : 1;
728 unsigned TRISC4 : 1;
729 unsigned TRISC5 : 1;
730 unsigned : 1;
731 unsigned : 1;
734 struct
736 unsigned TRISC : 6;
737 unsigned : 2;
739 } __TRISCbits_t;
741 extern __at(0x0087) volatile __TRISCbits_t TRISCbits;
743 #define _TRISC0 0x01
744 #define _TRISC1 0x02
745 #define _TRISC2 0x04
746 #define _TRISC3 0x08
747 #define _TRISC4 0x10
748 #define _TRISC5 0x20
750 //==============================================================================
753 //==============================================================================
754 // PIE1 Bits
756 extern __at(0x008C) __sfr PIE1;
758 typedef union
760 struct
762 unsigned TMR1IE : 1;
763 unsigned TXIE : 1;
764 unsigned OSFIE : 1;
765 unsigned C1IE : 1;
766 unsigned C2IE : 1;
767 unsigned RCIE : 1;
768 unsigned ADIE : 1;
769 unsigned EEIE : 1;
772 struct
774 unsigned T1IE : 1;
775 unsigned : 1;
776 unsigned : 1;
777 unsigned : 1;
778 unsigned : 1;
779 unsigned : 1;
780 unsigned : 1;
781 unsigned : 1;
783 } __PIE1bits_t;
785 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
787 #define _TMR1IE 0x01
788 #define _T1IE 0x01
789 #define _TXIE 0x02
790 #define _OSFIE 0x04
791 #define _C1IE 0x08
792 #define _C2IE 0x10
793 #define _RCIE 0x20
794 #define _ADIE 0x40
795 #define _EEIE 0x80
797 //==============================================================================
800 //==============================================================================
801 // PCON Bits
803 extern __at(0x008E) __sfr PCON;
805 typedef union
807 struct
809 unsigned NOT_BOR : 1;
810 unsigned NOT_POR : 1;
811 unsigned : 1;
812 unsigned : 1;
813 unsigned SBODEN : 1;
814 unsigned ULPWUE : 1;
815 unsigned : 1;
816 unsigned : 1;
819 struct
821 unsigned NOT_BOD : 1;
822 unsigned : 1;
823 unsigned : 1;
824 unsigned : 1;
825 unsigned : 1;
826 unsigned : 1;
827 unsigned : 1;
828 unsigned : 1;
830 } __PCONbits_t;
832 extern __at(0x008E) volatile __PCONbits_t PCONbits;
834 #define _NOT_BOR 0x01
835 #define _NOT_BOD 0x01
836 #define _NOT_POR 0x02
837 #define _SBODEN 0x10
838 #define _ULPWUE 0x20
840 //==============================================================================
843 //==============================================================================
844 // OSCCON Bits
846 extern __at(0x008F) __sfr OSCCON;
848 typedef union
850 struct
852 unsigned SCS : 1;
853 unsigned LTS : 1;
854 unsigned HTS : 1;
855 unsigned OSTS : 1;
856 unsigned IRCF0 : 1;
857 unsigned IRCF1 : 1;
858 unsigned IRCF2 : 1;
859 unsigned : 1;
862 struct
864 unsigned : 4;
865 unsigned IRCF : 3;
866 unsigned : 1;
868 } __OSCCONbits_t;
870 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
872 #define _SCS 0x01
873 #define _LTS 0x02
874 #define _HTS 0x04
875 #define _OSTS 0x08
876 #define _IRCF0 0x10
877 #define _IRCF1 0x20
878 #define _IRCF2 0x40
880 //==============================================================================
883 //==============================================================================
884 // OSCTUNE Bits
886 extern __at(0x0090) __sfr OSCTUNE;
888 typedef union
890 struct
892 unsigned TUN0 : 1;
893 unsigned TUN1 : 1;
894 unsigned TUN2 : 1;
895 unsigned TUN3 : 1;
896 unsigned TUN4 : 1;
897 unsigned : 1;
898 unsigned : 1;
899 unsigned : 1;
902 struct
904 unsigned TUN : 5;
905 unsigned : 3;
907 } __OSCTUNEbits_t;
909 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
911 #define _TUN0 0x01
912 #define _TUN1 0x02
913 #define _TUN2 0x04
914 #define _TUN3 0x08
915 #define _TUN4 0x10
917 //==============================================================================
920 //==============================================================================
921 // ANSEL Bits
923 extern __at(0x0091) __sfr ANSEL;
925 typedef struct
927 unsigned ANS0 : 1;
928 unsigned ANS1 : 1;
929 unsigned ANS2 : 1;
930 unsigned ANS3 : 1;
931 unsigned ANS4 : 1;
932 unsigned ANS5 : 1;
933 unsigned ANS6 : 1;
934 unsigned ANS7 : 1;
935 } __ANSELbits_t;
937 extern __at(0x0091) volatile __ANSELbits_t ANSELbits;
939 #define _ANS0 0x01
940 #define _ANS1 0x02
941 #define _ANS2 0x04
942 #define _ANS3 0x08
943 #define _ANS4 0x10
944 #define _ANS5 0x20
945 #define _ANS6 0x40
946 #define _ANS7 0x80
948 //==============================================================================
951 //==============================================================================
952 // WPU Bits
954 extern __at(0x0095) __sfr WPU;
956 typedef union
958 struct
960 unsigned WPUA0 : 1;
961 unsigned WPUA1 : 1;
962 unsigned WPUA2 : 1;
963 unsigned : 1;
964 unsigned WPUA4 : 1;
965 unsigned WPUA5 : 1;
966 unsigned : 1;
967 unsigned : 1;
970 struct
972 unsigned WPU0 : 1;
973 unsigned WPU1 : 1;
974 unsigned WPU2 : 1;
975 unsigned : 1;
976 unsigned WPU4 : 1;
977 unsigned WPU5 : 1;
978 unsigned : 1;
979 unsigned : 1;
981 } __WPUbits_t;
983 extern __at(0x0095) volatile __WPUbits_t WPUbits;
985 #define _WPUA0 0x01
986 #define _WPU0 0x01
987 #define _WPUA1 0x02
988 #define _WPU1 0x02
989 #define _WPUA2 0x04
990 #define _WPU2 0x04
991 #define _WPUA4 0x10
992 #define _WPU4 0x10
993 #define _WPUA5 0x20
994 #define _WPU5 0x20
996 //==============================================================================
999 //==============================================================================
1000 // WPUA Bits
1002 extern __at(0x0095) __sfr WPUA;
1004 typedef union
1006 struct
1008 unsigned WPUA0 : 1;
1009 unsigned WPUA1 : 1;
1010 unsigned WPUA2 : 1;
1011 unsigned : 1;
1012 unsigned WPUA4 : 1;
1013 unsigned WPUA5 : 1;
1014 unsigned : 1;
1015 unsigned : 1;
1018 struct
1020 unsigned WPU0 : 1;
1021 unsigned WPU1 : 1;
1022 unsigned WPU2 : 1;
1023 unsigned : 1;
1024 unsigned WPU4 : 1;
1025 unsigned WPU5 : 1;
1026 unsigned : 1;
1027 unsigned : 1;
1029 } __WPUAbits_t;
1031 extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
1033 #define _WPUA_WPUA0 0x01
1034 #define _WPUA_WPU0 0x01
1035 #define _WPUA_WPUA1 0x02
1036 #define _WPUA_WPU1 0x02
1037 #define _WPUA_WPUA2 0x04
1038 #define _WPUA_WPU2 0x04
1039 #define _WPUA_WPUA4 0x10
1040 #define _WPUA_WPU4 0x10
1041 #define _WPUA_WPUA5 0x20
1042 #define _WPUA_WPU5 0x20
1044 //==============================================================================
1047 //==============================================================================
1048 // IOC Bits
1050 extern __at(0x0096) __sfr IOC;
1052 typedef union
1054 struct
1056 unsigned IOCA0 : 1;
1057 unsigned IOCA1 : 1;
1058 unsigned IOCA2 : 1;
1059 unsigned IOCA3 : 1;
1060 unsigned IOCA4 : 1;
1061 unsigned IOCA5 : 1;
1062 unsigned : 1;
1063 unsigned : 1;
1066 struct
1068 unsigned IOC0 : 1;
1069 unsigned IOC1 : 1;
1070 unsigned IOC2 : 1;
1071 unsigned IOC3 : 1;
1072 unsigned IOC4 : 1;
1073 unsigned IOC5 : 1;
1074 unsigned : 1;
1075 unsigned : 1;
1078 struct
1080 unsigned IOC : 6;
1081 unsigned : 2;
1084 struct
1086 unsigned IOCA : 6;
1087 unsigned : 2;
1089 } __IOCbits_t;
1091 extern __at(0x0096) volatile __IOCbits_t IOCbits;
1093 #define _IOCA0 0x01
1094 #define _IOC0 0x01
1095 #define _IOCA1 0x02
1096 #define _IOC1 0x02
1097 #define _IOCA2 0x04
1098 #define _IOC2 0x04
1099 #define _IOCA3 0x08
1100 #define _IOC3 0x08
1101 #define _IOCA4 0x10
1102 #define _IOC4 0x10
1103 #define _IOCA5 0x20
1104 #define _IOC5 0x20
1106 //==============================================================================
1109 //==============================================================================
1110 // IOCA Bits
1112 extern __at(0x0096) __sfr IOCA;
1114 typedef union
1116 struct
1118 unsigned IOCA0 : 1;
1119 unsigned IOCA1 : 1;
1120 unsigned IOCA2 : 1;
1121 unsigned IOCA3 : 1;
1122 unsigned IOCA4 : 1;
1123 unsigned IOCA5 : 1;
1124 unsigned : 1;
1125 unsigned : 1;
1128 struct
1130 unsigned IOC0 : 1;
1131 unsigned IOC1 : 1;
1132 unsigned IOC2 : 1;
1133 unsigned IOC3 : 1;
1134 unsigned IOC4 : 1;
1135 unsigned IOC5 : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1140 struct
1142 unsigned IOCA : 6;
1143 unsigned : 2;
1146 struct
1148 unsigned IOC : 6;
1149 unsigned : 2;
1151 } __IOCAbits_t;
1153 extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
1155 #define _IOCA_IOCA0 0x01
1156 #define _IOCA_IOC0 0x01
1157 #define _IOCA_IOCA1 0x02
1158 #define _IOCA_IOC1 0x02
1159 #define _IOCA_IOCA2 0x04
1160 #define _IOCA_IOC2 0x04
1161 #define _IOCA_IOCA3 0x08
1162 #define _IOCA_IOC3 0x08
1163 #define _IOCA_IOCA4 0x10
1164 #define _IOCA_IOC4 0x10
1165 #define _IOCA_IOCA5 0x20
1166 #define _IOCA_IOC5 0x20
1168 //==============================================================================
1170 extern __at(0x0097) __sfr EEDATH;
1171 extern __at(0x0098) __sfr EEADRH;
1173 //==============================================================================
1174 // VRCON Bits
1176 extern __at(0x0099) __sfr VRCON;
1178 typedef union
1180 struct
1182 unsigned VR0 : 1;
1183 unsigned VR1 : 1;
1184 unsigned VR2 : 1;
1185 unsigned VR3 : 1;
1186 unsigned : 1;
1187 unsigned VRR : 1;
1188 unsigned : 1;
1189 unsigned VREN : 1;
1192 struct
1194 unsigned VR : 4;
1195 unsigned : 4;
1197 } __VRCONbits_t;
1199 extern __at(0x0099) volatile __VRCONbits_t VRCONbits;
1201 #define _VR0 0x01
1202 #define _VR1 0x02
1203 #define _VR2 0x04
1204 #define _VR3 0x08
1205 #define _VRR 0x20
1206 #define _VREN 0x80
1208 //==============================================================================
1210 extern __at(0x009A) __sfr EEDAT;
1211 extern __at(0x009A) __sfr EEDATA;
1212 extern __at(0x009B) __sfr EEADR;
1214 //==============================================================================
1215 // EECON1 Bits
1217 extern __at(0x009C) __sfr EECON1;
1219 typedef struct
1221 unsigned RD : 1;
1222 unsigned WR : 1;
1223 unsigned WREN : 1;
1224 unsigned WRERR : 1;
1225 unsigned : 1;
1226 unsigned : 1;
1227 unsigned : 1;
1228 unsigned EEPGD : 1;
1229 } __EECON1bits_t;
1231 extern __at(0x009C) volatile __EECON1bits_t EECON1bits;
1233 #define _RD 0x01
1234 #define _WR 0x02
1235 #define _WREN 0x04
1236 #define _WRERR 0x08
1237 #define _EEPGD 0x80
1239 //==============================================================================
1241 extern __at(0x009D) __sfr EECON2;
1242 extern __at(0x009E) __sfr ADRESL;
1244 //==============================================================================
1245 // ADCON1 Bits
1247 extern __at(0x009F) __sfr ADCON1;
1249 typedef union
1251 struct
1253 unsigned : 1;
1254 unsigned : 1;
1255 unsigned : 1;
1256 unsigned : 1;
1257 unsigned ADCS0 : 1;
1258 unsigned ADCS1 : 1;
1259 unsigned ADCS2 : 1;
1260 unsigned : 1;
1263 struct
1265 unsigned : 4;
1266 unsigned ADCS : 3;
1267 unsigned : 1;
1269 } __ADCON1bits_t;
1271 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits;
1273 #define _ADCS0 0x10
1274 #define _ADCS1 0x20
1275 #define _ADCS2 0x40
1277 //==============================================================================
1280 //==============================================================================
1282 // Configuration Bits
1284 //==============================================================================
1286 #define _CONFIG 0x2007
1288 //----------------------------- CONFIG Options -------------------------------
1290 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1291 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1292 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
1293 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
1294 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1295 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1296 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1297 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1298 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1299 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1300 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1301 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1302 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1303 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1304 #define _FOSC_EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1305 #define _EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1306 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
1307 #define _FOSC_EXTRCCLK 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1308 #define _EXTRC 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1309 #define _EXTRC_OSC_CLKOUT 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
1310 #define _WDTE_OFF 0x3FF7 // WDT disabled.
1311 #define _WDT_OFF 0x3FF7 // WDT disabled.
1312 #define _WDTE_ON 0x3FFF // WDT enabled.
1313 #define _WDT_ON 0x3FFF // WDT enabled.
1314 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1315 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1316 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1317 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1318 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1319 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1320 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
1321 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
1322 #define _BOREN_OFF 0x3CFF // BOR disabled.
1323 #define _BOD_OFF 0x3CFF // BOR disabled.
1324 #define _BOR_OFF 0x3CFF // BOR disabled.
1325 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1326 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1327 #define _BOR_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1328 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1329 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1330 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1331 #define _BOREN_ON 0x3FFF // BOR enabled.
1332 #define _BOD_ON 0x3FFF // BOR enabled.
1333 #define _BOR_ON 0x3FFF // BOR enabled.
1334 #define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled.
1335 #define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled.
1336 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
1337 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
1339 //==============================================================================
1341 #define _DEVID1 0x2006
1343 #define _IDLOC0 0x2000
1344 #define _IDLOC1 0x2001
1345 #define _IDLOC2 0x2002
1346 #define _IDLOC3 0x2003
1348 //==============================================================================
1350 #ifndef NO_BIT_DEFINES
1352 #define ADON ADCON0bits.ADON // bit 0
1353 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1354 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1355 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1356 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1357 #define CHS0 ADCON0bits.CHS0 // bit 2
1358 #define CHS1 ADCON0bits.CHS1 // bit 3
1359 #define CHS2 ADCON0bits.CHS2 // bit 4
1360 #define VCFG ADCON0bits.VCFG // bit 6
1361 #define ADFM ADCON0bits.ADFM // bit 7
1363 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1364 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1365 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1367 #define ANS0 ANSELbits.ANS0 // bit 0
1368 #define ANS1 ANSELbits.ANS1 // bit 1
1369 #define ANS2 ANSELbits.ANS2 // bit 2
1370 #define ANS3 ANSELbits.ANS3 // bit 3
1371 #define ANS4 ANSELbits.ANS4 // bit 4
1372 #define ANS5 ANSELbits.ANS5 // bit 5
1373 #define ANS6 ANSELbits.ANS6 // bit 6
1374 #define ANS7 ANSELbits.ANS7 // bit 7
1376 #define ABDEN BAUDCTLbits.ABDEN // bit 0
1377 #define WUE BAUDCTLbits.WUE // bit 1
1378 #define BRG16 BAUDCTLbits.BRG16 // bit 3
1379 #define SCKP BAUDCTLbits.SCKP // bit 4
1380 #define RCIDL BAUDCTLbits.RCIDL // bit 6
1381 #define ABDOVF BAUDCTLbits.ABDOVF // bit 7
1383 #define CM0 CMCON0bits.CM0 // bit 0
1384 #define CM1 CMCON0bits.CM1 // bit 1
1385 #define CM2 CMCON0bits.CM2 // bit 2
1386 #define CIS CMCON0bits.CIS // bit 3
1387 #define C1INV CMCON0bits.C1INV // bit 4
1388 #define C2INV CMCON0bits.C2INV // bit 5
1389 #define C1OUT CMCON0bits.C1OUT // bit 6
1390 #define C2OUT CMCON0bits.C2OUT // bit 7
1392 #define C2SYNC CMCON1bits.C2SYNC // bit 0
1393 #define T1GSS CMCON1bits.T1GSS // bit 1
1395 #define RD EECON1bits.RD // bit 0
1396 #define WR EECON1bits.WR // bit 1
1397 #define WREN EECON1bits.WREN // bit 2
1398 #define WRERR EECON1bits.WRERR // bit 3
1399 #define EEPGD EECON1bits.EEPGD // bit 7
1401 #define RAIF INTCONbits.RAIF // bit 0
1402 #define INTF INTCONbits.INTF // bit 1
1403 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1404 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1405 #define RAIE INTCONbits.RAIE // bit 3
1406 #define INTE INTCONbits.INTE // bit 4
1407 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1408 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1409 #define PEIE INTCONbits.PEIE // bit 6
1410 #define GIE INTCONbits.GIE // bit 7
1412 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1413 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1414 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1415 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1416 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1417 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1418 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1419 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1420 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1421 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1422 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1423 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1425 #define PS0 OPTION_REGbits.PS0 // bit 0
1426 #define PS1 OPTION_REGbits.PS1 // bit 1
1427 #define PS2 OPTION_REGbits.PS2 // bit 2
1428 #define PSA OPTION_REGbits.PSA // bit 3
1429 #define T0SE OPTION_REGbits.T0SE // bit 4
1430 #define T0CS OPTION_REGbits.T0CS // bit 5
1431 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1432 #define NOT_RAPU OPTION_REGbits.NOT_RAPU // bit 7
1434 #define SCS OSCCONbits.SCS // bit 0
1435 #define LTS OSCCONbits.LTS // bit 1
1436 #define HTS OSCCONbits.HTS // bit 2
1437 #define OSTS OSCCONbits.OSTS // bit 3
1438 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1439 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1440 #define IRCF2 OSCCONbits.IRCF2 // bit 6
1442 #define TUN0 OSCTUNEbits.TUN0 // bit 0
1443 #define TUN1 OSCTUNEbits.TUN1 // bit 1
1444 #define TUN2 OSCTUNEbits.TUN2 // bit 2
1445 #define TUN3 OSCTUNEbits.TUN3 // bit 3
1446 #define TUN4 OSCTUNEbits.TUN4 // bit 4
1448 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1449 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
1450 #define NOT_POR PCONbits.NOT_POR // bit 1
1451 #define SBODEN PCONbits.SBODEN // bit 4
1452 #define ULPWUE PCONbits.ULPWUE // bit 5
1454 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
1455 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
1456 #define TXIE PIE1bits.TXIE // bit 1
1457 #define OSFIE PIE1bits.OSFIE // bit 2
1458 #define C1IE PIE1bits.C1IE // bit 3
1459 #define C2IE PIE1bits.C2IE // bit 4
1460 #define RCIE PIE1bits.RCIE // bit 5
1461 #define ADIE PIE1bits.ADIE // bit 6
1462 #define EEIE PIE1bits.EEIE // bit 7
1464 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
1465 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
1466 #define TXIF PIR1bits.TXIF // bit 1
1467 #define OSFIF PIR1bits.OSFIF // bit 2
1468 #define C1IF PIR1bits.C1IF // bit 3
1469 #define C2IF PIR1bits.C2IF // bit 4
1470 #define RCIF PIR1bits.RCIF // bit 5
1471 #define ADIF PIR1bits.ADIF // bit 6
1472 #define EEIF PIR1bits.EEIF // bit 7
1474 #define RA0 PORTAbits.RA0 // bit 0
1475 #define RA1 PORTAbits.RA1 // bit 1
1476 #define RA2 PORTAbits.RA2 // bit 2
1477 #define RA3 PORTAbits.RA3 // bit 3
1478 #define RA4 PORTAbits.RA4 // bit 4
1479 #define RA5 PORTAbits.RA5 // bit 5
1481 #define RC0 PORTCbits.RC0 // bit 0
1482 #define RC1 PORTCbits.RC1 // bit 1
1483 #define RC2 PORTCbits.RC2 // bit 2
1484 #define RC3 PORTCbits.RC3 // bit 3
1485 #define RC4 PORTCbits.RC4 // bit 4
1486 #define RC5 PORTCbits.RC5 // bit 5
1488 #define RX9D RCSTAbits.RX9D // bit 0
1489 #define OERR RCSTAbits.OERR // bit 1
1490 #define FERR RCSTAbits.FERR // bit 2
1491 #define ADDEN RCSTAbits.ADDEN // bit 3
1492 #define CREN RCSTAbits.CREN // bit 4
1493 #define SREN RCSTAbits.SREN // bit 5
1494 #define RX9 RCSTAbits.RX9 // bit 6
1495 #define SPEN RCSTAbits.SPEN // bit 7
1497 #define C STATUSbits.C // bit 0
1498 #define DC STATUSbits.DC // bit 1
1499 #define Z STATUSbits.Z // bit 2
1500 #define NOT_PD STATUSbits.NOT_PD // bit 3
1501 #define NOT_TO STATUSbits.NOT_TO // bit 4
1502 #define RP0 STATUSbits.RP0 // bit 5
1503 #define RP1 STATUSbits.RP1 // bit 6
1504 #define IRP STATUSbits.IRP // bit 7
1506 #define TMR1ON T1CONbits.TMR1ON // bit 0
1507 #define TMR1CS T1CONbits.TMR1CS // bit 1
1508 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
1509 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1510 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1511 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1512 #define TMR1GE T1CONbits.TMR1GE // bit 6
1513 #define T1GINV T1CONbits.T1GINV // bit 7
1515 #define TRISA0 TRISAbits.TRISA0 // bit 0
1516 #define TRISA1 TRISAbits.TRISA1 // bit 1
1517 #define TRISA2 TRISAbits.TRISA2 // bit 2
1518 #define TRISA3 TRISAbits.TRISA3 // bit 3
1519 #define TRISA4 TRISAbits.TRISA4 // bit 4
1520 #define TRISA5 TRISAbits.TRISA5 // bit 5
1522 #define TRISC0 TRISCbits.TRISC0 // bit 0
1523 #define TRISC1 TRISCbits.TRISC1 // bit 1
1524 #define TRISC2 TRISCbits.TRISC2 // bit 2
1525 #define TRISC3 TRISCbits.TRISC3 // bit 3
1526 #define TRISC4 TRISCbits.TRISC4 // bit 4
1527 #define TRISC5 TRISCbits.TRISC5 // bit 5
1529 #define TX9D TXSTAbits.TX9D // bit 0
1530 #define TRMT TXSTAbits.TRMT // bit 1
1531 #define BRGH TXSTAbits.BRGH // bit 2
1532 #define SENDB TXSTAbits.SENDB // bit 3
1533 #define SYNC TXSTAbits.SYNC // bit 4
1534 #define TXEN TXSTAbits.TXEN // bit 5
1535 #define TX9 TXSTAbits.TX9 // bit 6
1536 #define CSRC TXSTAbits.CSRC // bit 7
1538 #define VR0 VRCONbits.VR0 // bit 0
1539 #define VR1 VRCONbits.VR1 // bit 1
1540 #define VR2 VRCONbits.VR2 // bit 2
1541 #define VR3 VRCONbits.VR3 // bit 3
1542 #define VRR VRCONbits.VRR // bit 5
1543 #define VREN VRCONbits.VREN // bit 7
1545 #define SWDTEN WDTCONbits.SWDTEN // bit 0
1546 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
1547 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
1548 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
1549 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
1551 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
1552 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
1553 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
1554 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
1555 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
1556 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
1557 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
1558 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
1559 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
1560 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
1562 #endif // #ifndef NO_BIT_DEFINES
1564 #endif // #ifndef __PIC16F688_H__