2 * This declarations of the PIC16F689 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16F689_H__
26 #define __PIC16F689_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PCLATH_ADDR 0x000A
45 #define INTCON_ADDR 0x000B
46 #define PIR1_ADDR 0x000C
47 #define PIR2_ADDR 0x000D
48 #define TMR1_ADDR 0x000E
49 #define TMR1L_ADDR 0x000E
50 #define TMR1H_ADDR 0x000F
51 #define T1CON_ADDR 0x0010
52 #define SSPBUF_ADDR 0x0013
53 #define SSPCON_ADDR 0x0014
54 #define RCSTA_ADDR 0x0018
55 #define TXREG_ADDR 0x0019
56 #define RCREG_ADDR 0x001A
57 #define ADRESH_ADDR 0x001E
58 #define ADCON0_ADDR 0x001F
59 #define OPTION_REG_ADDR 0x0081
60 #define TRISA_ADDR 0x0085
61 #define TRISB_ADDR 0x0086
62 #define TRISC_ADDR 0x0087
63 #define PIE1_ADDR 0x008C
64 #define PIE2_ADDR 0x008D
65 #define PCON_ADDR 0x008E
66 #define OSCCON_ADDR 0x008F
67 #define OSCTUNE_ADDR 0x0090
68 #define MSK_ADDR 0x0093
69 #define SSPADD_ADDR 0x0093
70 #define SSPMSK_ADDR 0x0093
71 #define SSPSTAT_ADDR 0x0094
72 #define WPU_ADDR 0x0095
73 #define WPUA_ADDR 0x0095
74 #define IOC_ADDR 0x0096
75 #define IOCA_ADDR 0x0096
76 #define WDTCON_ADDR 0x0097
77 #define TXSTA_ADDR 0x0098
78 #define SPBRG_ADDR 0x0099
79 #define SPBRGH_ADDR 0x009A
80 #define BAUDCTL_ADDR 0x009B
81 #define ADRESL_ADDR 0x009E
82 #define ADCON1_ADDR 0x009F
83 #define EEDAT_ADDR 0x010C
84 #define EEDATA_ADDR 0x010C
85 #define EEADR_ADDR 0x010D
86 #define EEDATH_ADDR 0x010E
87 #define EEADRH_ADDR 0x010F
88 #define WPUB_ADDR 0x0115
89 #define IOCB_ADDR 0x0116
90 #define VRCON_ADDR 0x0118
91 #define CM1CON0_ADDR 0x0119
92 #define CM2CON0_ADDR 0x011A
93 #define CM2CON1_ADDR 0x011B
94 #define ANSEL_ADDR 0x011E
95 #define ANSELH_ADDR 0x011F
96 #define EECON1_ADDR 0x018C
97 #define EECON2_ADDR 0x018D
98 #define SRCON_ADDR 0x019E
100 #endif // #ifndef NO_ADDR_DEFINES
102 //==============================================================================
104 // Register Definitions
106 //==============================================================================
108 extern __at(0x0000) __sfr INDF
;
109 extern __at(0x0001) __sfr TMR0
;
110 extern __at(0x0002) __sfr PCL
;
112 //==============================================================================
115 extern __at(0x0003) __sfr STATUS
;
139 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
150 //==============================================================================
152 extern __at(0x0004) __sfr FSR
;
154 //==============================================================================
157 extern __at(0x0005) __sfr PORTA
;
180 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
189 //==============================================================================
192 //==============================================================================
195 extern __at(0x0006) __sfr PORTB
;
209 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
216 //==============================================================================
219 //==============================================================================
222 extern __at(0x0007) __sfr PORTC
;
236 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
247 //==============================================================================
249 extern __at(0x000A) __sfr PCLATH
;
251 //==============================================================================
254 extern __at(0x000B) __sfr INTCON
;
268 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
279 //==============================================================================
282 //==============================================================================
285 extern __at(0x000C) __sfr PIR1
;
314 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
323 //==============================================================================
326 //==============================================================================
329 extern __at(0x000D) __sfr PIR2
;
343 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
350 //==============================================================================
352 extern __at(0x000E) __sfr TMR1
;
353 extern __at(0x000E) __sfr TMR1L
;
354 extern __at(0x000F) __sfr TMR1H
;
356 //==============================================================================
359 extern __at(0x0010) __sfr T1CON
;
367 unsigned NOT_T1SYNC
: 1;
368 unsigned T1OSCEN
: 1;
369 unsigned T1CKPS0
: 1;
370 unsigned T1CKPS1
: 1;
383 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
387 #define _NOT_T1SYNC 0x04
388 #define _T1OSCEN 0x08
389 #define _T1CKPS0 0x10
390 #define _T1CKPS1 0x20
394 //==============================================================================
396 extern __at(0x0013) __sfr SSPBUF
;
398 //==============================================================================
401 extern __at(0x0014) __sfr SSPCON
;
424 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
435 //==============================================================================
438 //==============================================================================
441 extern __at(0x0018) __sfr RCSTA
;
455 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
466 //==============================================================================
468 extern __at(0x0019) __sfr TXREG
;
469 extern __at(0x001A) __sfr RCREG
;
470 extern __at(0x001E) __sfr ADRESH
;
472 //==============================================================================
475 extern __at(0x001F) __sfr ADCON0
;
482 unsigned GO_NOT_DONE
: 1;
506 unsigned NOT_DONE
: 1;
518 unsigned GO_DONE
: 1;
535 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
538 #define _GO_NOT_DONE 0x02
540 #define _NOT_DONE 0x02
541 #define _GO_DONE 0x02
549 //==============================================================================
552 //==============================================================================
555 extern __at(0x0081) __sfr OPTION_REG
;
568 unsigned NOT_RABPU
: 1;
576 } __OPTION_REGbits_t
;
578 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
587 #define _NOT_RABPU 0x80
589 //==============================================================================
592 //==============================================================================
595 extern __at(0x0085) __sfr TRISA
;
618 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
627 //==============================================================================
630 //==============================================================================
633 extern __at(0x0086) __sfr TRISB
;
647 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
654 //==============================================================================
657 //==============================================================================
660 extern __at(0x0087) __sfr TRISC
;
674 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
685 //==============================================================================
688 //==============================================================================
691 extern __at(0x008C) __sfr PIE1
;
720 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
729 //==============================================================================
732 //==============================================================================
735 extern __at(0x008D) __sfr PIE2
;
749 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
756 //==============================================================================
759 //==============================================================================
762 extern __at(0x008E) __sfr PCON
;
766 unsigned NOT_BOR
: 1;
767 unsigned NOT_POR
: 1;
776 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
778 #define _NOT_BOR 0x01
779 #define _NOT_POR 0x02
783 //==============================================================================
786 //==============================================================================
789 extern __at(0x008F) __sfr OSCCON
;
813 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
823 //==============================================================================
826 //==============================================================================
829 extern __at(0x0090) __sfr OSCTUNE
;
852 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits
;
860 //==============================================================================
863 //==============================================================================
866 extern __at(0x0093) __sfr MSK
;
880 extern __at(0x0093) volatile __MSKbits_t MSKbits
;
891 //==============================================================================
893 extern __at(0x0093) __sfr SSPADD
;
895 //==============================================================================
898 extern __at(0x0093) __sfr SSPMSK
;
912 extern __at(0x0093) volatile __SSPMSKbits_t SSPMSKbits
;
914 #define _SSPMSK_MSK0 0x01
915 #define _SSPMSK_MSK1 0x02
916 #define _SSPMSK_MSK2 0x04
917 #define _SSPMSK_MSK3 0x08
918 #define _SSPMSK_MSK4 0x10
919 #define _SSPMSK_MSK5 0x20
920 #define _SSPMSK_MSK6 0x40
921 #define _SSPMSK_MSK7 0x80
923 //==============================================================================
926 //==============================================================================
929 extern __at(0x0094) __sfr SSPSTAT
;
937 unsigned R_NOT_W
: 1;
940 unsigned D_NOT_A
: 1;
950 unsigned I2C_START
: 1;
951 unsigned I2C_STOP
: 1;
961 unsigned I2C_READ
: 1;
964 unsigned I2C_DATA
: 1;
985 unsigned NOT_WRITE
: 1;
988 unsigned NOT_ADDRESS
: 1;
1009 unsigned READ_WRITE
: 1;
1012 unsigned DATA_ADDRESS
: 1;
1018 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
1022 #define _R_NOT_W 0x04
1024 #define _I2C_READ 0x04
1026 #define _NOT_WRITE 0x04
1028 #define _READ_WRITE 0x04
1030 #define _I2C_START 0x08
1032 #define _I2C_STOP 0x10
1033 #define _D_NOT_A 0x20
1035 #define _I2C_DATA 0x20
1037 #define _NOT_ADDRESS 0x20
1039 #define _DATA_ADDRESS 0x20
1043 //==============================================================================
1046 //==============================================================================
1049 extern __at(0x0095) __sfr WPU
;
1078 extern __at(0x0095) volatile __WPUbits_t WPUbits
;
1091 //==============================================================================
1094 //==============================================================================
1097 extern __at(0x0095) __sfr WPUA
;
1126 extern __at(0x0095) volatile __WPUAbits_t WPUAbits
;
1128 #define _WPUA_WPUA0 0x01
1129 #define _WPUA_WPU0 0x01
1130 #define _WPUA_WPUA1 0x02
1131 #define _WPUA_WPU1 0x02
1132 #define _WPUA_WPUA2 0x04
1133 #define _WPUA_WPU2 0x04
1134 #define _WPUA_WPUA4 0x10
1135 #define _WPUA_WPU4 0x10
1136 #define _WPUA_WPUA5 0x20
1137 #define _WPUA_WPU5 0x20
1139 //==============================================================================
1142 //==============================================================================
1145 extern __at(0x0096) __sfr IOC
;
1186 extern __at(0x0096) volatile __IOCbits_t IOCbits
;
1201 //==============================================================================
1204 //==============================================================================
1207 extern __at(0x0096) __sfr IOCA
;
1248 extern __at(0x0096) volatile __IOCAbits_t IOCAbits
;
1250 #define _IOCA_IOCA0 0x01
1251 #define _IOCA_IOC0 0x01
1252 #define _IOCA_IOCA1 0x02
1253 #define _IOCA_IOC1 0x02
1254 #define _IOCA_IOCA2 0x04
1255 #define _IOCA_IOC2 0x04
1256 #define _IOCA_IOCA3 0x08
1257 #define _IOCA_IOC3 0x08
1258 #define _IOCA_IOCA4 0x10
1259 #define _IOCA_IOC4 0x10
1260 #define _IOCA_IOCA5 0x20
1261 #define _IOCA_IOC5 0x20
1263 //==============================================================================
1266 //==============================================================================
1269 extern __at(0x0097) __sfr WDTCON
;
1275 unsigned SWDTEN
: 1;
1276 unsigned WDTPS0
: 1;
1277 unsigned WDTPS1
: 1;
1278 unsigned WDTPS2
: 1;
1279 unsigned WDTPS3
: 1;
1293 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1295 #define _SWDTEN 0x01
1296 #define _WDTPS0 0x02
1297 #define _WDTPS1 0x04
1298 #define _WDTPS2 0x08
1299 #define _WDTPS3 0x10
1301 //==============================================================================
1304 //==============================================================================
1307 extern __at(0x0098) __sfr TXSTA
;
1336 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
1348 //==============================================================================
1351 //==============================================================================
1354 extern __at(0x0099) __sfr SPBRG
;
1368 extern __at(0x0099) volatile __SPBRGbits_t SPBRGbits
;
1379 //==============================================================================
1382 //==============================================================================
1385 extern __at(0x009A) __sfr SPBRGH
;
1399 extern __at(0x009A) volatile __SPBRGHbits_t SPBRGHbits
;
1410 //==============================================================================
1413 //==============================================================================
1416 extern __at(0x009B) __sfr BAUDCTL
;
1418 #define BAUDCON BAUDCTL
1429 unsigned ABDOVF
: 1;
1432 extern __at(0x009B) volatile __BAUDCTLbits_t BAUDCTLbits
;
1434 #define BAUDCONbits BAUDCTLbits
1441 #define _ABDOVF 0x80
1443 //==============================================================================
1445 extern __at(0x009E) __sfr ADRESL
;
1447 //==============================================================================
1450 extern __at(0x009F) __sfr ADCON1
;
1474 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1480 //==============================================================================
1482 extern __at(0x010C) __sfr EEDAT
;
1483 extern __at(0x010C) __sfr EEDATA
;
1484 extern __at(0x010D) __sfr EEADR
;
1485 extern __at(0x010E) __sfr EEDATH
;
1486 extern __at(0x010F) __sfr EEADRH
;
1488 //==============================================================================
1491 extern __at(0x0115) __sfr WPUB
;
1505 extern __at(0x0115) volatile __WPUBbits_t WPUBbits
;
1512 //==============================================================================
1515 //==============================================================================
1518 extern __at(0x0116) __sfr IOCB
;
1532 extern __at(0x0116) volatile __IOCBbits_t IOCBbits
;
1539 //==============================================================================
1542 //==============================================================================
1545 extern __at(0x0118) __sfr VRCON
;
1557 unsigned C2VREN
: 1;
1558 unsigned C1VREN
: 1;
1568 extern __at(0x0118) volatile __VRCONbits_t VRCONbits
;
1576 #define _C2VREN 0x40
1577 #define _C1VREN 0x80
1579 //==============================================================================
1582 //==============================================================================
1585 extern __at(0x0119) __sfr CM1CON0
;
1608 extern __at(0x0119) volatile __CM1CON0bits_t CM1CON0bits
;
1618 //==============================================================================
1621 //==============================================================================
1624 extern __at(0x011A) __sfr CM2CON0
;
1647 extern __at(0x011A) volatile __CM2CON0bits_t CM2CON0bits
;
1657 //==============================================================================
1660 //==============================================================================
1663 extern __at(0x011B) __sfr CM2CON1
;
1667 unsigned C2SYNC
: 1;
1673 unsigned MC2OUT
: 1;
1674 unsigned MC1OUT
: 1;
1677 extern __at(0x011B) volatile __CM2CON1bits_t CM2CON1bits
;
1679 #define _C2SYNC 0x01
1681 #define _MC2OUT 0x40
1682 #define _MC1OUT 0x80
1684 //==============================================================================
1687 //==============================================================================
1690 extern __at(0x011E) __sfr ANSEL
;
1704 extern __at(0x011E) volatile __ANSELbits_t ANSELbits
;
1715 //==============================================================================
1718 //==============================================================================
1721 extern __at(0x011F) __sfr ANSELH
;
1735 extern __at(0x011F) volatile __ANSELHbits_t ANSELHbits
;
1742 //==============================================================================
1745 //==============================================================================
1748 extern __at(0x018C) __sfr EECON1
;
1762 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
1770 //==============================================================================
1772 extern __at(0x018D) __sfr EECON2
;
1774 //==============================================================================
1777 extern __at(0x019E) __sfr SRCON
;
1800 extern __at(0x019E) volatile __SRCONbits_t SRCONbits
;
1809 //==============================================================================
1812 //==============================================================================
1814 // Configuration Bits
1816 //==============================================================================
1818 #define _CONFIG 0x2007
1820 //----------------------------- CONFIG Options -------------------------------
1822 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1823 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1824 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1825 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1826 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1827 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
1828 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1829 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
1830 #define _FOSC_INTRCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1831 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1832 #define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1833 #define _FOSC_INTRCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1834 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1835 #define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
1836 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1837 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1838 #define _EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1839 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1840 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1841 #define _EXTRC 0x3FFF // RC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, RC on RA5/OSC1/CLKIN.
1842 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1843 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.
1844 #define _WDTE_ON 0x3FFF // WDT enabled.
1845 #define _WDT_ON 0x3FFF // WDT enabled.
1846 #define _PWRTE_ON 0x3FEF // PWRT enabled.
1847 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1848 #define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
1849 #define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
1850 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
1851 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
1852 #define _CPD_ON 0x3F7F // Data memory code protection is enabled.
1853 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
1854 #define _BOREN_OFF 0x3CFF // BOR disabled.
1855 #define _BOD_OFF 0x3CFF // BOR disabled.
1856 #define _BOR_OFF 0x3CFF // BOR disabled.
1857 #define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1858 #define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1859 #define _BOR_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
1860 #define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1861 #define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1862 #define _BOR_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
1863 #define _BOREN_ON 0x3FFF // BOR enabled.
1864 #define _BOD_ON 0x3FFF // BOR enabled.
1865 #define _BOR_ON 0x3FFF // BOR enabled.
1866 #define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled.
1867 #define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled.
1868 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
1869 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
1871 //==============================================================================
1873 #define _DEVID1 0x2006
1875 #define _IDLOC0 0x2000
1876 #define _IDLOC1 0x2001
1877 #define _IDLOC2 0x2002
1878 #define _IDLOC3 0x2003
1880 //==============================================================================
1882 #ifndef NO_BIT_DEFINES
1884 #define ADON ADCON0bits.ADON // bit 0
1885 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
1886 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
1887 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
1888 #define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
1889 #define CHS0 ADCON0bits.CHS0 // bit 2
1890 #define CHS1 ADCON0bits.CHS1 // bit 3
1891 #define CHS2 ADCON0bits.CHS2 // bit 4
1892 #define CHS3 ADCON0bits.CHS3 // bit 5
1893 #define VCFG ADCON0bits.VCFG // bit 6
1894 #define ADFM ADCON0bits.ADFM // bit 7
1896 #define ADCS0 ADCON1bits.ADCS0 // bit 4
1897 #define ADCS1 ADCON1bits.ADCS1 // bit 5
1898 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1900 #define ANS0 ANSELbits.ANS0 // bit 0
1901 #define ANS1 ANSELbits.ANS1 // bit 1
1902 #define ANS2 ANSELbits.ANS2 // bit 2
1903 #define ANS3 ANSELbits.ANS3 // bit 3
1904 #define ANS4 ANSELbits.ANS4 // bit 4
1905 #define ANS5 ANSELbits.ANS5 // bit 5
1906 #define ANS6 ANSELbits.ANS6 // bit 6
1907 #define ANS7 ANSELbits.ANS7 // bit 7
1909 #define ANS8 ANSELHbits.ANS8 // bit 0
1910 #define ANS9 ANSELHbits.ANS9 // bit 1
1911 #define ANS10 ANSELHbits.ANS10 // bit 2
1912 #define ANS11 ANSELHbits.ANS11 // bit 3
1914 #define ABDEN BAUDCTLbits.ABDEN // bit 0
1915 #define WUE BAUDCTLbits.WUE // bit 1
1916 #define BRG16 BAUDCTLbits.BRG16 // bit 3
1917 #define SCKP BAUDCTLbits.SCKP // bit 4
1918 #define RCIDL BAUDCTLbits.RCIDL // bit 6
1919 #define ABDOVF BAUDCTLbits.ABDOVF // bit 7
1921 #define C1CH0 CM1CON0bits.C1CH0 // bit 0
1922 #define C1CH1 CM1CON0bits.C1CH1 // bit 1
1923 #define C1R CM1CON0bits.C1R // bit 2
1924 #define C1POL CM1CON0bits.C1POL // bit 4
1925 #define C1OE CM1CON0bits.C1OE // bit 5
1926 #define C1OUT CM1CON0bits.C1OUT // bit 6
1927 #define C1ON CM1CON0bits.C1ON // bit 7
1929 #define C2CH0 CM2CON0bits.C2CH0 // bit 0
1930 #define C2CH1 CM2CON0bits.C2CH1 // bit 1
1931 #define C2R CM2CON0bits.C2R // bit 2
1932 #define C2POL CM2CON0bits.C2POL // bit 4
1933 #define C2OE CM2CON0bits.C2OE // bit 5
1934 #define C2OUT CM2CON0bits.C2OUT // bit 6
1935 #define C2ON CM2CON0bits.C2ON // bit 7
1937 #define C2SYNC CM2CON1bits.C2SYNC // bit 0
1938 #define T1GSS CM2CON1bits.T1GSS // bit 1
1939 #define MC2OUT CM2CON1bits.MC2OUT // bit 6
1940 #define MC1OUT CM2CON1bits.MC1OUT // bit 7
1942 #define RD EECON1bits.RD // bit 0
1943 #define WR EECON1bits.WR // bit 1
1944 #define WREN EECON1bits.WREN // bit 2
1945 #define WRERR EECON1bits.WRERR // bit 3
1946 #define EEPGD EECON1bits.EEPGD // bit 7
1948 #define RABIF INTCONbits.RABIF // bit 0
1949 #define INTF INTCONbits.INTF // bit 1
1950 #define T0IF INTCONbits.T0IF // bit 2
1951 #define RABIE INTCONbits.RABIE // bit 3
1952 #define INTE INTCONbits.INTE // bit 4
1953 #define T0IE INTCONbits.T0IE // bit 5
1954 #define PEIE INTCONbits.PEIE // bit 6
1955 #define GIE INTCONbits.GIE // bit 7
1957 #define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
1958 #define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
1959 #define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
1960 #define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
1961 #define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
1962 #define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
1963 #define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
1964 #define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
1965 #define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
1966 #define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
1967 #define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
1968 #define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
1970 #define IOCB4 IOCBbits.IOCB4 // bit 4
1971 #define IOCB5 IOCBbits.IOCB5 // bit 5
1972 #define IOCB6 IOCBbits.IOCB6 // bit 6
1973 #define IOCB7 IOCBbits.IOCB7 // bit 7
1975 #define MSK0 MSKbits.MSK0 // bit 0
1976 #define MSK1 MSKbits.MSK1 // bit 1
1977 #define MSK2 MSKbits.MSK2 // bit 2
1978 #define MSK3 MSKbits.MSK3 // bit 3
1979 #define MSK4 MSKbits.MSK4 // bit 4
1980 #define MSK5 MSKbits.MSK5 // bit 5
1981 #define MSK6 MSKbits.MSK6 // bit 6
1982 #define MSK7 MSKbits.MSK7 // bit 7
1984 #define PS0 OPTION_REGbits.PS0 // bit 0
1985 #define PS1 OPTION_REGbits.PS1 // bit 1
1986 #define PS2 OPTION_REGbits.PS2 // bit 2
1987 #define PSA OPTION_REGbits.PSA // bit 3
1988 #define T0SE OPTION_REGbits.T0SE // bit 4
1989 #define T0CS OPTION_REGbits.T0CS // bit 5
1990 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1991 #define NOT_RABPU OPTION_REGbits.NOT_RABPU // bit 7
1993 #define SCS OSCCONbits.SCS // bit 0
1994 #define LTS OSCCONbits.LTS // bit 1
1995 #define HTS OSCCONbits.HTS // bit 2
1996 #define OSTS OSCCONbits.OSTS // bit 3
1997 #define IRCF0 OSCCONbits.IRCF0 // bit 4
1998 #define IRCF1 OSCCONbits.IRCF1 // bit 5
1999 #define IRCF2 OSCCONbits.IRCF2 // bit 6
2001 #define TUN0 OSCTUNEbits.TUN0 // bit 0
2002 #define TUN1 OSCTUNEbits.TUN1 // bit 1
2003 #define TUN2 OSCTUNEbits.TUN2 // bit 2
2004 #define TUN3 OSCTUNEbits.TUN3 // bit 3
2005 #define TUN4 OSCTUNEbits.TUN4 // bit 4
2007 #define NOT_BOR PCONbits.NOT_BOR // bit 0
2008 #define NOT_POR PCONbits.NOT_POR // bit 1
2009 #define SBOREN PCONbits.SBOREN // bit 4
2010 #define ULPWUE PCONbits.ULPWUE // bit 5
2012 #define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
2013 #define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
2014 #define SSPIE PIE1bits.SSPIE // bit 3
2015 #define TXIE PIE1bits.TXIE // bit 4
2016 #define RCIE PIE1bits.RCIE // bit 5
2017 #define ADIE PIE1bits.ADIE // bit 6
2019 #define EEIE PIE2bits.EEIE // bit 4
2020 #define C1IE PIE2bits.C1IE // bit 5
2021 #define C2IE PIE2bits.C2IE // bit 6
2022 #define OSFIE PIE2bits.OSFIE // bit 7
2024 #define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
2025 #define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
2026 #define SSPIF PIR1bits.SSPIF // bit 3
2027 #define TXIF PIR1bits.TXIF // bit 4
2028 #define RCIF PIR1bits.RCIF // bit 5
2029 #define ADIF PIR1bits.ADIF // bit 6
2031 #define EEIF PIR2bits.EEIF // bit 4
2032 #define C1IF PIR2bits.C1IF // bit 5
2033 #define C2IF PIR2bits.C2IF // bit 6
2034 #define OSFIF PIR2bits.OSFIF // bit 7
2036 #define RA0 PORTAbits.RA0 // bit 0
2037 #define RA1 PORTAbits.RA1 // bit 1
2038 #define RA2 PORTAbits.RA2 // bit 2
2039 #define RA3 PORTAbits.RA3 // bit 3
2040 #define RA4 PORTAbits.RA4 // bit 4
2041 #define RA5 PORTAbits.RA5 // bit 5
2043 #define RB4 PORTBbits.RB4 // bit 4
2044 #define RB5 PORTBbits.RB5 // bit 5
2045 #define RB6 PORTBbits.RB6 // bit 6
2046 #define RB7 PORTBbits.RB7 // bit 7
2048 #define RC0 PORTCbits.RC0 // bit 0
2049 #define RC1 PORTCbits.RC1 // bit 1
2050 #define RC2 PORTCbits.RC2 // bit 2
2051 #define RC3 PORTCbits.RC3 // bit 3
2052 #define RC4 PORTCbits.RC4 // bit 4
2053 #define RC5 PORTCbits.RC5 // bit 5
2054 #define RC6 PORTCbits.RC6 // bit 6
2055 #define RC7 PORTCbits.RC7 // bit 7
2057 #define RX9D RCSTAbits.RX9D // bit 0
2058 #define OERR RCSTAbits.OERR // bit 1
2059 #define FERR RCSTAbits.FERR // bit 2
2060 #define ADDEN RCSTAbits.ADDEN // bit 3
2061 #define CREN RCSTAbits.CREN // bit 4
2062 #define SREN RCSTAbits.SREN // bit 5
2063 #define RX9 RCSTAbits.RX9 // bit 6
2064 #define SPEN RCSTAbits.SPEN // bit 7
2066 #define BRG0 SPBRGbits.BRG0 // bit 0
2067 #define BRG1 SPBRGbits.BRG1 // bit 1
2068 #define BRG2 SPBRGbits.BRG2 // bit 2
2069 #define BRG3 SPBRGbits.BRG3 // bit 3
2070 #define BRG4 SPBRGbits.BRG4 // bit 4
2071 #define BRG5 SPBRGbits.BRG5 // bit 5
2072 #define BRG6 SPBRGbits.BRG6 // bit 6
2073 #define BRG7 SPBRGbits.BRG7 // bit 7
2075 #define BRG8 SPBRGHbits.BRG8 // bit 0
2076 #define BRG9 SPBRGHbits.BRG9 // bit 1
2077 #define BRG10 SPBRGHbits.BRG10 // bit 2
2078 #define BRG11 SPBRGHbits.BRG11 // bit 3
2079 #define BRG12 SPBRGHbits.BRG12 // bit 4
2080 #define BRG13 SPBRGHbits.BRG13 // bit 5
2081 #define BRG14 SPBRGHbits.BRG14 // bit 6
2082 #define BRG15 SPBRGHbits.BRG15 // bit 7
2084 #define PULSR SRCONbits.PULSR // bit 2
2085 #define PULSS SRCONbits.PULSS // bit 3
2086 #define C2REN SRCONbits.C2REN // bit 4
2087 #define C1SEN SRCONbits.C1SEN // bit 5
2088 #define SR0 SRCONbits.SR0 // bit 6
2089 #define SR1 SRCONbits.SR1 // bit 7
2091 #define SSPM0 SSPCONbits.SSPM0 // bit 0
2092 #define SSPM1 SSPCONbits.SSPM1 // bit 1
2093 #define SSPM2 SSPCONbits.SSPM2 // bit 2
2094 #define SSPM3 SSPCONbits.SSPM3 // bit 3
2095 #define CKP SSPCONbits.CKP // bit 4
2096 #define SSPEN SSPCONbits.SSPEN // bit 5
2097 #define SSPOV SSPCONbits.SSPOV // bit 6
2098 #define WCOL SSPCONbits.WCOL // bit 7
2100 #define BF SSPSTATbits.BF // bit 0
2101 #define UA SSPSTATbits.UA // bit 1
2102 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
2103 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
2104 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
2105 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
2106 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
2107 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
2108 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
2109 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
2110 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
2111 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
2112 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
2113 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
2114 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
2115 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
2116 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
2117 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
2118 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
2119 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
2120 #define CKE SSPSTATbits.CKE // bit 6
2121 #define SMP SSPSTATbits.SMP // bit 7
2123 #define C STATUSbits.C // bit 0
2124 #define DC STATUSbits.DC // bit 1
2125 #define Z STATUSbits.Z // bit 2
2126 #define NOT_PD STATUSbits.NOT_PD // bit 3
2127 #define NOT_TO STATUSbits.NOT_TO // bit 4
2128 #define RP0 STATUSbits.RP0 // bit 5
2129 #define RP1 STATUSbits.RP1 // bit 6
2130 #define IRP STATUSbits.IRP // bit 7
2132 #define TMR1ON T1CONbits.TMR1ON // bit 0
2133 #define TMR1CS T1CONbits.TMR1CS // bit 1
2134 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
2135 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
2136 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
2137 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
2138 #define TMR1GE T1CONbits.TMR1GE // bit 6
2139 #define T1GINV T1CONbits.T1GINV // bit 7
2141 #define TRISA0 TRISAbits.TRISA0 // bit 0
2142 #define TRISA1 TRISAbits.TRISA1 // bit 1
2143 #define TRISA2 TRISAbits.TRISA2 // bit 2
2144 #define TRISA3 TRISAbits.TRISA3 // bit 3
2145 #define TRISA4 TRISAbits.TRISA4 // bit 4
2146 #define TRISA5 TRISAbits.TRISA5 // bit 5
2148 #define TRISB4 TRISBbits.TRISB4 // bit 4
2149 #define TRISB5 TRISBbits.TRISB5 // bit 5
2150 #define TRISB6 TRISBbits.TRISB6 // bit 6
2151 #define TRISB7 TRISBbits.TRISB7 // bit 7
2153 #define TRISC0 TRISCbits.TRISC0 // bit 0
2154 #define TRISC1 TRISCbits.TRISC1 // bit 1
2155 #define TRISC2 TRISCbits.TRISC2 // bit 2
2156 #define TRISC3 TRISCbits.TRISC3 // bit 3
2157 #define TRISC4 TRISCbits.TRISC4 // bit 4
2158 #define TRISC5 TRISCbits.TRISC5 // bit 5
2159 #define TRISC6 TRISCbits.TRISC6 // bit 6
2160 #define TRISC7 TRISCbits.TRISC7 // bit 7
2162 #define TX9D TXSTAbits.TX9D // bit 0
2163 #define TRMT TXSTAbits.TRMT // bit 1
2164 #define BRGH TXSTAbits.BRGH // bit 2
2165 #define SENDB TXSTAbits.SENDB // bit 3, shadows bit in TXSTAbits
2166 #define SENB TXSTAbits.SENB // bit 3, shadows bit in TXSTAbits
2167 #define SYNC TXSTAbits.SYNC // bit 4
2168 #define TXEN TXSTAbits.TXEN // bit 5
2169 #define TX9 TXSTAbits.TX9 // bit 6
2170 #define CSRC TXSTAbits.CSRC // bit 7
2172 #define VR0 VRCONbits.VR0 // bit 0
2173 #define VR1 VRCONbits.VR1 // bit 1
2174 #define VR2 VRCONbits.VR2 // bit 2
2175 #define VR3 VRCONbits.VR3 // bit 3
2176 #define VP6EN VRCONbits.VP6EN // bit 4
2177 #define VRR VRCONbits.VRR // bit 5
2178 #define C2VREN VRCONbits.C2VREN // bit 6
2179 #define C1VREN VRCONbits.C1VREN // bit 7
2181 #define SWDTEN WDTCONbits.SWDTEN // bit 0
2182 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
2183 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
2184 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
2185 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
2187 #define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
2188 #define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
2189 #define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
2190 #define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
2191 #define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
2192 #define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
2193 #define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
2194 #define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
2195 #define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
2196 #define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
2198 #define WPUB4 WPUBbits.WPUB4 // bit 4
2199 #define WPUB5 WPUBbits.WPUB5 // bit 5
2200 #define WPUB6 WPUBbits.WPUB6 // bit 6
2201 #define WPUB7 WPUBbits.WPUB7 // bit 7
2203 #endif // #ifndef NO_BIT_DEFINES
2205 #endif // #ifndef __PIC16F689_H__