2 * This declarations of the PIC16HV753 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16HV753_H__
26 #define __PIC16HV753_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTC_ADDR 0x0007
43 #define IOCAF_ADDR 0x0008
44 #define IOCCF_ADDR 0x0009
45 #define PCLATH_ADDR 0x000A
46 #define INTCON_ADDR 0x000B
47 #define PIR1_ADDR 0x000C
48 #define PIR2_ADDR 0x000D
49 #define TMR1_ADDR 0x000F
50 #define TMR1L_ADDR 0x000F
51 #define TMR1H_ADDR 0x0010
52 #define T1CON_ADDR 0x0011
53 #define T1GCON_ADDR 0x0012
54 #define CCPR1_ADDR 0x0013
55 #define CCPR1L_ADDR 0x0013
56 #define CCPR1H_ADDR 0x0014
57 #define CCP1CON_ADDR 0x0015
58 #define ADRES_ADDR 0x001C
59 #define ADRESL_ADDR 0x001C
60 #define ADRESH_ADDR 0x001D
61 #define ADCON0_ADDR 0x001E
62 #define ADCON1_ADDR 0x001F
63 #define OPTION_REG_ADDR 0x0081
64 #define TRISA_ADDR 0x0085
65 #define TRISC_ADDR 0x0087
66 #define IOCAP_ADDR 0x0088
67 #define IOCCP_ADDR 0x0089
68 #define PIE1_ADDR 0x008C
69 #define PIE2_ADDR 0x008D
70 #define OSCCON_ADDR 0x008F
71 #define FVR1CON0_ADDR 0x0090
72 #define DAC1CON0_ADDR 0x0091
73 #define DAC1REFL_ADDR 0x0092
74 #define DAC1REFH_ADDR 0x0093
75 #define OPA1CON_ADDR 0x0096
76 #define C2CON0_ADDR 0x009B
77 #define CM2CON0_ADDR 0x009B
78 #define C2CON1_ADDR 0x009C
79 #define CM2CON1_ADDR 0x009C
80 #define C1CON0_ADDR 0x009D
81 #define CM1CON0_ADDR 0x009D
82 #define C1CON1_ADDR 0x009E
83 #define CM1CON1_ADDR 0x009E
84 #define CMOUT_ADDR 0x009F
85 #define MCOUT_ADDR 0x009F
86 #define LATA_ADDR 0x0105
87 #define LATC_ADDR 0x0107
88 #define IOCAN_ADDR 0x0108
89 #define IOCCN_ADDR 0x0109
90 #define WPUA_ADDR 0x010C
91 #define WPUC_ADDR 0x010D
92 #define SLRCONC_ADDR 0x010E
93 #define PCON_ADDR 0x010F
94 #define TMR2_ADDR 0x0110
95 #define PR2_ADDR 0x0111
96 #define T2CON_ADDR 0x0112
97 #define HLTMR1_ADDR 0x0113
98 #define HLTPR1_ADDR 0x0114
99 #define HLT1CON0_ADDR 0x0115
100 #define HLT1CON1_ADDR 0x0116
101 #define HLTMR2_ADDR 0x0117
102 #define HLTPR2_ADDR 0x0118
103 #define HLT2CON0_ADDR 0x0119
104 #define HLT2CON1_ADDR 0x011A
105 #define SLPC1CON0_ADDR 0x011E
106 #define SLPCCON0_ADDR 0x011E
107 #define SLPC1CON1_ADDR 0x011F
108 #define SLPCCON1_ADDR 0x011F
109 #define ANSELA_ADDR 0x0185
110 #define ANSELC_ADDR 0x0187
111 #define APFCON_ADDR 0x0188
112 #define OSCTUNE_ADDR 0x0189
113 #define PMCON1_ADDR 0x018C
114 #define PMCON2_ADDR 0x018D
115 #define PMADR_ADDR 0x018E
116 #define PMADRL_ADDR 0x018E
117 #define PMADRH_ADDR 0x018F
118 #define PMDAT_ADDR 0x0190
119 #define PMDATL_ADDR 0x0190
120 #define PMDATH_ADDR 0x0191
121 #define COG1PHR_ADDR 0x0192
122 #define COG1PHF_ADDR 0x0193
123 #define COG1BKR_ADDR 0x0194
124 #define COG1BKF_ADDR 0x0195
125 #define COG1DBR_ADDR 0x0196
126 #define COG1DBF_ADDR 0x0197
127 #define COG1CON0_ADDR 0x0198
128 #define COG1CON1_ADDR 0x0199
129 #define COG1RIS_ADDR 0x019A
130 #define COG1RSIM_ADDR 0x019B
131 #define COG1FIS_ADDR 0x019C
132 #define COG1FSIM_ADDR 0x019D
133 #define COG1ASD0_ADDR 0x019E
134 #define COG1ASD1_ADDR 0x019F
136 #endif // #ifndef NO_ADDR_DEFINES
138 //==============================================================================
140 // Register Definitions
142 //==============================================================================
144 extern __at(0x0000) __sfr INDF
;
145 extern __at(0x0001) __sfr TMR0
;
146 extern __at(0x0002) __sfr PCL
;
148 //==============================================================================
151 extern __at(0x0003) __sfr STATUS
;
175 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
186 //==============================================================================
188 extern __at(0x0004) __sfr FSR
;
190 //==============================================================================
193 extern __at(0x0005) __sfr PORTA
;
216 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
225 //==============================================================================
228 //==============================================================================
231 extern __at(0x0007) __sfr PORTC
;
254 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
263 //==============================================================================
266 //==============================================================================
269 extern __at(0x0008) __sfr IOCAF
;
292 extern __at(0x0008) volatile __IOCAFbits_t IOCAFbits
;
301 //==============================================================================
304 //==============================================================================
307 extern __at(0x0009) __sfr IOCCF
;
330 extern __at(0x0009) volatile __IOCCFbits_t IOCCFbits
;
339 //==============================================================================
341 extern __at(0x000A) __sfr PCLATH
;
343 //==============================================================================
346 extern __at(0x000B) __sfr INTCON
;
360 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
371 //==============================================================================
374 //==============================================================================
377 extern __at(0x000C) __sfr PIR1
;
383 unsigned HLTMR1IF
: 1;
384 unsigned HLTMR2IF
: 1;
388 unsigned TMR1GIF
: 1;
391 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
395 #define _HLTMR1IF 0x04
396 #define _HLTMR2IF 0x08
398 #define _TMR1GIF 0x80
400 //==============================================================================
403 //==============================================================================
406 extern __at(0x000D) __sfr PIR2
;
420 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
427 //==============================================================================
429 extern __at(0x000F) __sfr TMR1
;
430 extern __at(0x000F) __sfr TMR1L
;
431 extern __at(0x0010) __sfr TMR1H
;
433 //==============================================================================
436 extern __at(0x0011) __sfr T1CON
;
444 unsigned NOT_T1SYNC
: 1;
446 unsigned T1CKPS0
: 1;
447 unsigned T1CKPS1
: 1;
448 unsigned TMR1CS0
: 1;
449 unsigned TMR1CS1
: 1;
466 extern __at(0x0011) volatile __T1CONbits_t T1CONbits
;
469 #define _NOT_T1SYNC 0x04
470 #define _T1CKPS0 0x10
471 #define _T1CKPS1 0x20
472 #define _TMR1CS0 0x40
473 #define _TMR1CS1 0x80
475 //==============================================================================
478 //==============================================================================
481 extern __at(0x0012) __sfr T1GCON
;
490 unsigned T1GGO_NOT_DONE
: 1;
516 extern __at(0x0012) volatile __T1GCONbits_t T1GCONbits
;
521 #define _T1GGO_NOT_DONE 0x08
528 //==============================================================================
530 extern __at(0x0013) __sfr CCPR1
;
531 extern __at(0x0013) __sfr CCPR1L
;
532 extern __at(0x0014) __sfr CCPR1H
;
534 //==============================================================================
537 extern __at(0x0015) __sfr CCP1CON
;
567 extern __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits
;
576 //==============================================================================
578 extern __at(0x001C) __sfr ADRES
;
579 extern __at(0x001C) __sfr ADRESL
;
580 extern __at(0x001D) __sfr ADRESH
;
582 //==============================================================================
585 extern __at(0x001E) __sfr ADCON0
;
592 unsigned GO_NOT_DONE
: 1;
609 extern __at(0x001E) volatile __ADCON0bits_t ADCON0bits
;
612 #define _GO_NOT_DONE 0x02
619 //==============================================================================
622 //==============================================================================
625 extern __at(0x001F) __sfr ADCON1
;
631 unsigned ADPREF1
: 1;
649 extern __at(0x001F) volatile __ADCON1bits_t ADCON1bits
;
651 #define _ADPREF1 0x01
656 //==============================================================================
659 //==============================================================================
662 extern __at(0x0081) __sfr OPTION_REG
;
675 unsigned NOT_RAPU
: 1;
683 } __OPTION_REGbits_t
;
685 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
694 #define _NOT_RAPU 0x80
696 //==============================================================================
699 //==============================================================================
702 extern __at(0x0085) __sfr TRISA
;
725 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
734 //==============================================================================
737 //==============================================================================
740 extern __at(0x0087) __sfr TRISC
;
763 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
772 //==============================================================================
775 //==============================================================================
778 extern __at(0x0088) __sfr IOCAP
;
801 extern __at(0x0088) volatile __IOCAPbits_t IOCAPbits
;
810 //==============================================================================
813 //==============================================================================
816 extern __at(0x0089) __sfr IOCCP
;
839 extern __at(0x0089) volatile __IOCCPbits_t IOCCPbits
;
848 //==============================================================================
851 //==============================================================================
854 extern __at(0x008C) __sfr PIE1
;
860 unsigned HLTMR1IE
: 1;
861 unsigned HLTMR2IE
: 1;
865 unsigned TMR1GIE
: 1;
868 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
872 #define _HLTMR1IE 0x04
873 #define _HLTMR2IE 0x08
875 #define _TMR1GIE 0x80
877 //==============================================================================
880 //==============================================================================
883 extern __at(0x008D) __sfr PIE2
;
897 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
904 //==============================================================================
907 //==============================================================================
910 extern __at(0x008F) __sfr OSCCON
;
934 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits
;
941 //==============================================================================
944 //==============================================================================
947 extern __at(0x0090) __sfr FVR1CON0
;
953 unsigned FVRBUFEN
: 1;
956 unsigned FVRBUSS0
: 1;
957 unsigned FVRBUSS1
: 1;
966 unsigned FVRBUSS
: 2;
971 extern __at(0x0090) volatile __FVR1CON0bits_t FVR1CON0bits
;
973 #define _FVRBUFEN 0x01
974 #define _FVRBUSS0 0x08
975 #define _FVRBUSS1 0x10
980 //==============================================================================
983 //==============================================================================
986 extern __at(0x0091) __sfr DAC1CON0
;
994 unsigned DACPSS0
: 1;
995 unsigned DACPSS1
: 1;
1005 unsigned DACPSS
: 2;
1010 extern __at(0x0091) volatile __DAC1CON0bits_t DAC1CON0bits
;
1012 #define _DACPSS0 0x04
1013 #define _DACPSS1 0x08
1018 //==============================================================================
1020 extern __at(0x0092) __sfr DAC1REFL
;
1021 extern __at(0x0093) __sfr DAC1REFH
;
1023 //==============================================================================
1026 extern __at(0x0096) __sfr OPA1CON
;
1032 unsigned OPA1PCH0
: 1;
1033 unsigned OPA1PCH1
: 1;
1034 unsigned OPA1NCH0
: 1;
1035 unsigned OPA1NCH1
: 1;
1036 unsigned OPAUGM
: 1;
1044 unsigned OPA1PCH
: 2;
1051 unsigned OPA1NCH
: 2;
1056 extern __at(0x0096) volatile __OPA1CONbits_t OPA1CONbits
;
1058 #define _OPA1PCH0 0x01
1059 #define _OPA1PCH1 0x02
1060 #define _OPA1NCH0 0x04
1061 #define _OPA1NCH1 0x08
1062 #define _OPAUGM 0x10
1065 //==============================================================================
1068 //==============================================================================
1071 extern __at(0x009B) __sfr C2CON0
;
1075 unsigned C2SYNC
: 1;
1085 extern __at(0x009B) volatile __C2CON0bits_t C2CON0bits
;
1087 #define _C2SYNC 0x01
1096 //==============================================================================
1099 //==============================================================================
1102 extern __at(0x009B) __sfr CM2CON0
;
1106 unsigned C2SYNC
: 1;
1116 extern __at(0x009B) volatile __CM2CON0bits_t CM2CON0bits
;
1118 #define _CM2CON0_C2SYNC 0x01
1119 #define _CM2CON0_C2HYS 0x02
1120 #define _CM2CON0_C2SP 0x04
1121 #define _CM2CON0_C2ZLF 0x08
1122 #define _CM2CON0_C2POL 0x10
1123 #define _CM2CON0_C2OE 0x20
1124 #define _CM2CON0_C2OUT 0x40
1125 #define _CM2CON0_C2ON 0x80
1127 //==============================================================================
1130 //==============================================================================
1133 extern __at(0x009C) __sfr C2CON1
;
1139 unsigned C2NCH0
: 1;
1140 unsigned C2NCH1
: 1;
1141 unsigned C2NCH2
: 1;
1142 unsigned C2PCH0
: 1;
1143 unsigned C2PCH1
: 1;
1144 unsigned C2PCH2
: 1;
1145 unsigned C2INTN
: 1;
1146 unsigned C2INTP
: 1;
1163 extern __at(0x009C) volatile __C2CON1bits_t C2CON1bits
;
1165 #define _C2NCH0 0x01
1166 #define _C2NCH1 0x02
1167 #define _C2NCH2 0x04
1168 #define _C2PCH0 0x08
1169 #define _C2PCH1 0x10
1170 #define _C2PCH2 0x20
1171 #define _C2INTN 0x40
1172 #define _C2INTP 0x80
1174 //==============================================================================
1177 //==============================================================================
1180 extern __at(0x009C) __sfr CM2CON1
;
1186 unsigned C2NCH0
: 1;
1187 unsigned C2NCH1
: 1;
1188 unsigned C2NCH2
: 1;
1189 unsigned C2PCH0
: 1;
1190 unsigned C2PCH1
: 1;
1191 unsigned C2PCH2
: 1;
1192 unsigned C2INTN
: 1;
1193 unsigned C2INTP
: 1;
1210 extern __at(0x009C) volatile __CM2CON1bits_t CM2CON1bits
;
1212 #define _CM2CON1_C2NCH0 0x01
1213 #define _CM2CON1_C2NCH1 0x02
1214 #define _CM2CON1_C2NCH2 0x04
1215 #define _CM2CON1_C2PCH0 0x08
1216 #define _CM2CON1_C2PCH1 0x10
1217 #define _CM2CON1_C2PCH2 0x20
1218 #define _CM2CON1_C2INTN 0x40
1219 #define _CM2CON1_C2INTP 0x80
1221 //==============================================================================
1224 //==============================================================================
1227 extern __at(0x009D) __sfr C1CON0
;
1231 unsigned C1SYNC
: 1;
1241 extern __at(0x009D) volatile __C1CON0bits_t C1CON0bits
;
1243 #define _C1SYNC 0x01
1252 //==============================================================================
1255 //==============================================================================
1258 extern __at(0x009D) __sfr CM1CON0
;
1262 unsigned C1SYNC
: 1;
1272 extern __at(0x009D) volatile __CM1CON0bits_t CM1CON0bits
;
1274 #define _CM1CON0_C1SYNC 0x01
1275 #define _CM1CON0_C1HYS 0x02
1276 #define _CM1CON0_C1SP 0x04
1277 #define _CM1CON0_C1ZLF 0x08
1278 #define _CM1CON0_C1POL 0x10
1279 #define _CM1CON0_C1OE 0x20
1280 #define _CM1CON0_C1OUT 0x40
1281 #define _CM1CON0_C1ON 0x80
1283 //==============================================================================
1286 //==============================================================================
1289 extern __at(0x009E) __sfr C1CON1
;
1295 unsigned C1NCH0
: 1;
1296 unsigned C1NCH1
: 1;
1297 unsigned C1NCH2
: 1;
1298 unsigned C1PCH0
: 1;
1299 unsigned C1PCH1
: 1;
1300 unsigned C1PCH2
: 1;
1301 unsigned C1INTN
: 1;
1302 unsigned C1INTP
: 1;
1319 extern __at(0x009E) volatile __C1CON1bits_t C1CON1bits
;
1321 #define _C1NCH0 0x01
1322 #define _C1NCH1 0x02
1323 #define _C1NCH2 0x04
1324 #define _C1PCH0 0x08
1325 #define _C1PCH1 0x10
1326 #define _C1PCH2 0x20
1327 #define _C1INTN 0x40
1328 #define _C1INTP 0x80
1330 //==============================================================================
1333 //==============================================================================
1336 extern __at(0x009E) __sfr CM1CON1
;
1342 unsigned C1NCH0
: 1;
1343 unsigned C1NCH1
: 1;
1344 unsigned C1NCH2
: 1;
1345 unsigned C1PCH0
: 1;
1346 unsigned C1PCH1
: 1;
1347 unsigned C1PCH2
: 1;
1348 unsigned C1INTN
: 1;
1349 unsigned C1INTP
: 1;
1366 extern __at(0x009E) volatile __CM1CON1bits_t CM1CON1bits
;
1368 #define _CM1CON1_C1NCH0 0x01
1369 #define _CM1CON1_C1NCH1 0x02
1370 #define _CM1CON1_C1NCH2 0x04
1371 #define _CM1CON1_C1PCH0 0x08
1372 #define _CM1CON1_C1PCH1 0x10
1373 #define _CM1CON1_C1PCH2 0x20
1374 #define _CM1CON1_C1INTN 0x40
1375 #define _CM1CON1_C1INTP 0x80
1377 //==============================================================================
1380 //==============================================================================
1383 extern __at(0x009F) __sfr CMOUT
;
1387 unsigned MCOUT1
: 1;
1388 unsigned MCOUT2
: 1;
1397 extern __at(0x009F) volatile __CMOUTbits_t CMOUTbits
;
1399 #define _MCOUT1 0x01
1400 #define _MCOUT2 0x02
1402 //==============================================================================
1405 //==============================================================================
1408 extern __at(0x009F) __sfr MCOUT
;
1412 unsigned MCOUT1
: 1;
1413 unsigned MCOUT2
: 1;
1422 extern __at(0x009F) volatile __MCOUTbits_t MCOUTbits
;
1424 #define _MCOUT_MCOUT1 0x01
1425 #define _MCOUT_MCOUT2 0x02
1427 //==============================================================================
1430 //==============================================================================
1433 extern __at(0x0105) __sfr LATA
;
1447 extern __at(0x0105) volatile __LATAbits_t LATAbits
;
1455 //==============================================================================
1458 //==============================================================================
1461 extern __at(0x0107) __sfr LATC
;
1484 extern __at(0x0107) volatile __LATCbits_t LATCbits
;
1493 //==============================================================================
1496 //==============================================================================
1499 extern __at(0x0108) __sfr IOCAN
;
1505 unsigned IOCAN0
: 1;
1506 unsigned IOCAN1
: 1;
1507 unsigned IOCAN2
: 1;
1508 unsigned IOCAN3
: 1;
1509 unsigned IOCAN4
: 1;
1510 unsigned IOCAN5
: 1;
1522 extern __at(0x0108) volatile __IOCANbits_t IOCANbits
;
1524 #define _IOCAN0 0x01
1525 #define _IOCAN1 0x02
1526 #define _IOCAN2 0x04
1527 #define _IOCAN3 0x08
1528 #define _IOCAN4 0x10
1529 #define _IOCAN5 0x20
1531 //==============================================================================
1534 //==============================================================================
1537 extern __at(0x0109) __sfr IOCCN
;
1543 unsigned IOCCN0
: 1;
1544 unsigned IOCCN1
: 1;
1545 unsigned IOCCN2
: 1;
1546 unsigned IOCCN3
: 1;
1547 unsigned IOCCN4
: 1;
1548 unsigned IOCCN5
: 1;
1560 extern __at(0x0109) volatile __IOCCNbits_t IOCCNbits
;
1562 #define _IOCCN0 0x01
1563 #define _IOCCN1 0x02
1564 #define _IOCCN2 0x04
1565 #define _IOCCN3 0x08
1566 #define _IOCCN4 0x10
1567 #define _IOCCN5 0x20
1569 //==============================================================================
1572 //==============================================================================
1575 extern __at(0x010C) __sfr WPUA
;
1598 extern __at(0x010C) volatile __WPUAbits_t WPUAbits
;
1607 //==============================================================================
1610 //==============================================================================
1613 extern __at(0x010D) __sfr WPUC
;
1636 extern __at(0x010D) volatile __WPUCbits_t WPUCbits
;
1645 //==============================================================================
1648 //==============================================================================
1651 extern __at(0x010E) __sfr SLRCONC
;
1665 extern __at(0x010E) volatile __SLRCONCbits_t SLRCONCbits
;
1670 //==============================================================================
1673 //==============================================================================
1676 extern __at(0x010F) __sfr PCON
;
1680 unsigned NOT_BOR
: 1;
1681 unsigned NOT_POR
: 1;
1690 extern __at(0x010F) volatile __PCONbits_t PCONbits
;
1692 #define _NOT_BOR 0x01
1693 #define _NOT_POR 0x02
1695 //==============================================================================
1697 extern __at(0x0110) __sfr TMR2
;
1698 extern __at(0x0111) __sfr PR2
;
1700 //==============================================================================
1703 extern __at(0x0112) __sfr T2CON
;
1709 unsigned T2CKPS0
: 1;
1710 unsigned T2CKPS1
: 1;
1711 unsigned TMR2ON
: 1;
1712 unsigned T2OUTPS0
: 1;
1713 unsigned T2OUTPS1
: 1;
1714 unsigned T2OUTPS2
: 1;
1715 unsigned T2OUTPS3
: 1;
1721 unsigned T2CKPS
: 2;
1728 unsigned T2OUTPS
: 4;
1733 extern __at(0x0112) volatile __T2CONbits_t T2CONbits
;
1735 #define _T2CKPS0 0x01
1736 #define _T2CKPS1 0x02
1737 #define _TMR2ON 0x04
1738 #define _T2OUTPS0 0x08
1739 #define _T2OUTPS1 0x10
1740 #define _T2OUTPS2 0x20
1741 #define _T2OUTPS3 0x40
1743 //==============================================================================
1745 extern __at(0x0113) __sfr HLTMR1
;
1746 extern __at(0x0114) __sfr HLTPR1
;
1748 //==============================================================================
1751 extern __at(0x0115) __sfr HLT1CON0
;
1757 unsigned H1CKPS0
: 1;
1758 unsigned H1CKPS1
: 1;
1760 unsigned H1OUTPS0
: 1;
1761 unsigned H1OUTPS1
: 1;
1762 unsigned H1OUTPS2
: 1;
1763 unsigned H1OUTPS3
: 1;
1769 unsigned H1CKPS
: 2;
1776 unsigned H1OUTPS
: 4;
1781 extern __at(0x0115) volatile __HLT1CON0bits_t HLT1CON0bits
;
1783 #define _H1CKPS0 0x01
1784 #define _H1CKPS1 0x02
1786 #define _H1OUTPS0 0x08
1787 #define _H1OUTPS1 0x10
1788 #define _H1OUTPS2 0x20
1789 #define _H1OUTPS3 0x40
1791 //==============================================================================
1794 //==============================================================================
1797 extern __at(0x0116) __sfr HLT1CON1
;
1803 unsigned H1REREN
: 1;
1804 unsigned H1FEREN
: 1;
1805 unsigned H1ERS0
: 1;
1806 unsigned H1ERS1
: 1;
1807 unsigned H1ERS2
: 1;
1821 extern __at(0x0116) volatile __HLT1CON1bits_t HLT1CON1bits
;
1823 #define _H1REREN 0x01
1824 #define _H1FEREN 0x02
1825 #define _H1ERS0 0x04
1826 #define _H1ERS1 0x08
1827 #define _H1ERS2 0x10
1831 //==============================================================================
1833 extern __at(0x0117) __sfr HLTMR2
;
1834 extern __at(0x0118) __sfr HLTPR2
;
1836 //==============================================================================
1839 extern __at(0x0119) __sfr HLT2CON0
;
1845 unsigned H2CKPS0
: 1;
1846 unsigned H2CKPS1
: 1;
1848 unsigned H2OUTPS0
: 1;
1849 unsigned H2OUTPS1
: 1;
1850 unsigned H2OUTPS2
: 1;
1851 unsigned H2OUTPS3
: 1;
1857 unsigned H2CKPS
: 2;
1864 unsigned H2OUTPS
: 4;
1869 extern __at(0x0119) volatile __HLT2CON0bits_t HLT2CON0bits
;
1871 #define _H2CKPS0 0x01
1872 #define _H2CKPS1 0x02
1874 #define _H2OUTPS0 0x08
1875 #define _H2OUTPS1 0x10
1876 #define _H2OUTPS2 0x20
1877 #define _H2OUTPS3 0x40
1879 //==============================================================================
1882 //==============================================================================
1885 extern __at(0x011A) __sfr HLT2CON1
;
1891 unsigned H2REREN
: 1;
1892 unsigned H2FEREN
: 1;
1893 unsigned H2ERS0
: 1;
1894 unsigned H2ERS1
: 1;
1895 unsigned H2ERS2
: 1;
1909 extern __at(0x011A) volatile __HLT2CON1bits_t HLT2CON1bits
;
1911 #define _H2REREN 0x01
1912 #define _H2FEREN 0x02
1913 #define _H2ERS0 0x04
1914 #define _H2ERS1 0x08
1915 #define _H2ERS2 0x10
1919 //==============================================================================
1922 //==============================================================================
1925 extern __at(0x011E) __sfr SLPC1CON0
;
1931 unsigned SC1INS
: 1;
1933 unsigned SCS1TSS0
: 1;
1934 unsigned SCS1TSS1
: 1;
1935 unsigned SC1POL
: 1;
1936 unsigned SC1MRPE
: 1;
1944 unsigned SCS1TSS
: 2;
1947 } __SLPC1CON0bits_t
;
1949 extern __at(0x011E) volatile __SLPC1CON0bits_t SLPC1CON0bits
;
1951 #define _SC1INS 0x01
1952 #define _SCS1TSS0 0x04
1953 #define _SCS1TSS1 0x08
1954 #define _SC1POL 0x10
1955 #define _SC1MRPE 0x20
1958 //==============================================================================
1961 //==============================================================================
1964 extern __at(0x011E) __sfr SLPCCON0
;
1970 unsigned SC1INS
: 1;
1972 unsigned SCS1TSS0
: 1;
1973 unsigned SCS1TSS1
: 1;
1974 unsigned SC1POL
: 1;
1975 unsigned SC1MRPE
: 1;
1983 unsigned SCS1TSS
: 2;
1988 extern __at(0x011E) volatile __SLPCCON0bits_t SLPCCON0bits
;
1990 #define _SLPCCON0_SC1INS 0x01
1991 #define _SLPCCON0_SCS1TSS0 0x04
1992 #define _SLPCCON0_SCS1TSS1 0x08
1993 #define _SLPCCON0_SC1POL 0x10
1994 #define _SLPCCON0_SC1MRPE 0x20
1995 #define _SLPCCON0_SC1EN 0x80
1997 //==============================================================================
2000 //==============================================================================
2003 extern __at(0x011F) __sfr SLPC1CON1
;
2009 unsigned SC1ISET0
: 1;
2010 unsigned SC1ISET1
: 1;
2011 unsigned SC1ISET2
: 1;
2012 unsigned SC1ISET3
: 1;
2013 unsigned SC1RNG
: 1;
2021 unsigned SC1ISET
: 4;
2024 } __SLPC1CON1bits_t
;
2026 extern __at(0x011F) volatile __SLPC1CON1bits_t SLPC1CON1bits
;
2028 #define _SC1ISET0 0x01
2029 #define _SC1ISET1 0x02
2030 #define _SC1ISET2 0x04
2031 #define _SC1ISET3 0x08
2032 #define _SC1RNG 0x10
2034 //==============================================================================
2037 //==============================================================================
2040 extern __at(0x011F) __sfr SLPCCON1
;
2046 unsigned SC1ISET0
: 1;
2047 unsigned SC1ISET1
: 1;
2048 unsigned SC1ISET2
: 1;
2049 unsigned SC1ISET3
: 1;
2050 unsigned SC1RNG
: 1;
2058 unsigned SC1ISET
: 4;
2063 extern __at(0x011F) volatile __SLPCCON1bits_t SLPCCON1bits
;
2065 #define _SLPCCON1_SC1ISET0 0x01
2066 #define _SLPCCON1_SC1ISET1 0x02
2067 #define _SLPCCON1_SC1ISET2 0x04
2068 #define _SLPCCON1_SC1ISET3 0x08
2069 #define _SLPCCON1_SC1RNG 0x10
2071 //==============================================================================
2074 //==============================================================================
2077 extern __at(0x0185) __sfr ANSELA
;
2091 extern __at(0x0185) volatile __ANSELAbits_t ANSELAbits
;
2098 //==============================================================================
2101 //==============================================================================
2104 extern __at(0x0187) __sfr ANSELC
;
2127 extern __at(0x0187) volatile __ANSELCbits_t ANSELCbits
;
2134 //==============================================================================
2137 //==============================================================================
2140 extern __at(0x0188) __sfr APFCON
;
2148 unsigned T1GSEL
: 1;
2154 extern __at(0x0188) volatile __APFCONbits_t APFCONbits
;
2156 #define _T1GSEL 0x10
2158 //==============================================================================
2161 //==============================================================================
2164 extern __at(0x0189) __sfr OSCTUNE
;
2187 extern __at(0x0189) volatile __OSCTUNEbits_t OSCTUNEbits
;
2195 //==============================================================================
2198 //==============================================================================
2201 extern __at(0x018C) __sfr PMCON1
;
2215 extern __at(0x018C) volatile __PMCON1bits_t PMCON1bits
;
2221 //==============================================================================
2223 extern __at(0x018D) __sfr PMCON2
;
2224 extern __at(0x018E) __sfr PMADR
;
2225 extern __at(0x018E) __sfr PMADRL
;
2226 extern __at(0x018F) __sfr PMADRH
;
2227 extern __at(0x0190) __sfr PMDAT
;
2228 extern __at(0x0190) __sfr PMDATL
;
2229 extern __at(0x0191) __sfr PMDATH
;
2231 //==============================================================================
2234 extern __at(0x0192) __sfr COG1PHR
;
2240 unsigned G1PHR0
: 1;
2241 unsigned G1PHR1
: 1;
2242 unsigned G1PHR2
: 1;
2243 unsigned G1PHR3
: 1;
2257 extern __at(0x0192) volatile __COG1PHRbits_t COG1PHRbits
;
2259 #define _G1PHR0 0x01
2260 #define _G1PHR1 0x02
2261 #define _G1PHR2 0x04
2262 #define _G1PHR3 0x08
2264 //==============================================================================
2267 //==============================================================================
2270 extern __at(0x0193) __sfr COG1PHF
;
2276 unsigned G1PHF0
: 1;
2277 unsigned G1PHF1
: 1;
2278 unsigned G1PHF2
: 1;
2279 unsigned G1PHF3
: 1;
2293 extern __at(0x0193) volatile __COG1PHFbits_t COG1PHFbits
;
2295 #define _G1PHF0 0x01
2296 #define _G1PHF1 0x02
2297 #define _G1PHF2 0x04
2298 #define _G1PHF3 0x08
2300 //==============================================================================
2303 //==============================================================================
2306 extern __at(0x0194) __sfr COG1BKR
;
2312 unsigned G1BKR0
: 1;
2313 unsigned G1BKR1
: 1;
2314 unsigned G1BKR2
: 1;
2315 unsigned G1BKR3
: 1;
2329 extern __at(0x0194) volatile __COG1BKRbits_t COG1BKRbits
;
2331 #define _G1BKR0 0x01
2332 #define _G1BKR1 0x02
2333 #define _G1BKR2 0x04
2334 #define _G1BKR3 0x08
2336 //==============================================================================
2339 //==============================================================================
2342 extern __at(0x0195) __sfr COG1BKF
;
2348 unsigned G1BKF0
: 1;
2349 unsigned G1BKF1
: 1;
2350 unsigned G1BKF2
: 1;
2351 unsigned G1BKF3
: 1;
2365 extern __at(0x0195) volatile __COG1BKFbits_t COG1BKFbits
;
2367 #define _G1BKF0 0x01
2368 #define _G1BKF1 0x02
2369 #define _G1BKF2 0x04
2370 #define _G1BKF3 0x08
2372 //==============================================================================
2375 //==============================================================================
2378 extern __at(0x0196) __sfr COG1DBR
;
2384 unsigned G1DBR0
: 1;
2385 unsigned G1DBR1
: 1;
2386 unsigned G1DBR2
: 1;
2387 unsigned G1DBR3
: 1;
2401 extern __at(0x0196) volatile __COG1DBRbits_t COG1DBRbits
;
2403 #define _G1DBR0 0x01
2404 #define _G1DBR1 0x02
2405 #define _G1DBR2 0x04
2406 #define _G1DBR3 0x08
2408 //==============================================================================
2411 //==============================================================================
2414 extern __at(0x0197) __sfr COG1DBF
;
2420 unsigned G1DBF0
: 1;
2421 unsigned G1DBF1
: 1;
2422 unsigned G1DBF2
: 1;
2423 unsigned G1DBF3
: 1;
2437 extern __at(0x0197) volatile __COG1DBFbits_t COG1DBFbits
;
2439 #define _G1DBF0 0x01
2440 #define _G1DBF1 0x02
2441 #define _G1DBF2 0x04
2442 #define _G1DBF3 0x08
2444 //==============================================================================
2447 //==============================================================================
2450 extern __at(0x0198) __sfr COG1CON0
;
2459 unsigned G1POL0
: 1;
2460 unsigned G1POL1
: 1;
2481 extern __at(0x0198) volatile __COG1CON0bits_t COG1CON0bits
;
2485 #define _G1POL0 0x08
2486 #define _G1POL1 0x10
2491 //==============================================================================
2494 //==============================================================================
2497 extern __at(0x0199) __sfr COG1CON1
;
2509 unsigned G1FDBTS
: 1;
2510 unsigned G1RDBTS
: 1;
2520 extern __at(0x0199) volatile __COG1CON1bits_t COG1CON1bits
;
2524 #define _G1FDBTS 0x40
2525 #define _G1RDBTS 0x80
2527 //==============================================================================
2530 //==============================================================================
2533 extern __at(0x019A) __sfr COG1RIS
;
2537 unsigned G1RIC1
: 1;
2538 unsigned G1RIC2
: 1;
2539 unsigned C1RICCP1
: 1;
2540 unsigned G1RIFLT
: 1;
2541 unsigned G1RIT2M
: 1;
2542 unsigned G1R1HLT1
: 1;
2543 unsigned G1RIHLT2
: 1;
2547 extern __at(0x019A) volatile __COG1RISbits_t COG1RISbits
;
2549 #define _G1RIC1 0x01
2550 #define _G1RIC2 0x02
2551 #define _C1RICCP1 0x04
2552 #define _G1RIFLT 0x08
2553 #define _G1RIT2M 0x10
2554 #define _G1R1HLT1 0x20
2555 #define _G1RIHLT2 0x40
2557 //==============================================================================
2560 //==============================================================================
2563 extern __at(0x019B) __sfr COG1RSIM
;
2567 unsigned G1RMC1
: 1;
2568 unsigned G1RMC2
: 1;
2569 unsigned G1RMCCP1
: 1;
2570 unsigned G1RMFLT
: 1;
2571 unsigned G1RTM2M
: 1;
2572 unsigned G1RMHLT1
: 1;
2573 unsigned G1RMHLT2
: 1;
2577 extern __at(0x019B) volatile __COG1RSIMbits_t COG1RSIMbits
;
2579 #define _G1RMC1 0x01
2580 #define _G1RMC2 0x02
2581 #define _G1RMCCP1 0x04
2582 #define _G1RMFLT 0x08
2583 #define _G1RTM2M 0x10
2584 #define _G1RMHLT1 0x20
2585 #define _G1RMHLT2 0x40
2587 //==============================================================================
2590 //==============================================================================
2593 extern __at(0x019C) __sfr COG1FIS
;
2597 unsigned G1FIC1
: 1;
2598 unsigned G1FIC2
: 1;
2599 unsigned G1FICCP1
: 1;
2600 unsigned G1FIFLT
: 1;
2601 unsigned G1FIT2M
: 1;
2602 unsigned G1FIHLT1
: 1;
2603 unsigned G1FIHLT2
: 1;
2607 extern __at(0x019C) volatile __COG1FISbits_t COG1FISbits
;
2609 #define _G1FIC1 0x01
2610 #define _G1FIC2 0x02
2611 #define _G1FICCP1 0x04
2612 #define _G1FIFLT 0x08
2613 #define _G1FIT2M 0x10
2614 #define _G1FIHLT1 0x20
2615 #define _G1FIHLT2 0x40
2617 //==============================================================================
2620 //==============================================================================
2623 extern __at(0x019D) __sfr COG1FSIM
;
2627 unsigned G1FMC1
: 1;
2628 unsigned G1FMC2
: 1;
2629 unsigned G1FMCCP1
: 1;
2630 unsigned G1FMFLT
: 1;
2631 unsigned G1FMT2M
: 1;
2632 unsigned G1FMHLT1
: 1;
2633 unsigned G1FMHLT2
: 1;
2637 extern __at(0x019D) volatile __COG1FSIMbits_t COG1FSIMbits
;
2639 #define _G1FMC1 0x01
2640 #define _G1FMC2 0x02
2641 #define _G1FMCCP1 0x04
2642 #define _G1FMFLT 0x08
2643 #define _G1FMT2M 0x10
2644 #define _G1FMHLT1 0x20
2645 #define _G1FMHLT2 0x40
2647 //==============================================================================
2650 //==============================================================================
2653 extern __at(0x019E) __sfr COG1ASD0
;
2661 unsigned G1ASD0L0
: 1;
2662 unsigned G1ASD0L1
: 1;
2663 unsigned G1ASD1L0
: 1;
2664 unsigned G1ASD1L1
: 1;
2665 unsigned G1ARSEN
: 1;
2666 unsigned G1ASDE
: 1;
2672 unsigned G1ASD0L
: 2;
2679 unsigned G1ASD1L
: 2;
2684 extern __at(0x019E) volatile __COG1ASD0bits_t COG1ASD0bits
;
2686 #define _G1ASD0L0 0x04
2687 #define _G1ASD0L1 0x08
2688 #define _G1ASD1L0 0x10
2689 #define _G1ASD1L1 0x20
2690 #define _G1ARSEN 0x40
2691 #define _G1ASDE 0x80
2693 //==============================================================================
2696 //==============================================================================
2699 extern __at(0x019F) __sfr COG1ASD1
;
2703 unsigned G1ASDSFLT
: 1;
2704 unsigned G1ASDSC1
: 1;
2705 unsigned G1ASDSC2
: 1;
2706 unsigned G1ASDSHLT1
: 1;
2707 unsigned G1ASDSHLT2
: 1;
2713 extern __at(0x019F) volatile __COG1ASD1bits_t COG1ASD1bits
;
2715 #define _G1ASDSFLT 0x01
2716 #define _G1ASDSC1 0x02
2717 #define _G1ASDSC2 0x04
2718 #define _G1ASDSHLT1 0x08
2719 #define _G1ASDSHLT2 0x10
2721 //==============================================================================
2724 //==============================================================================
2726 // Configuration Bits
2728 //==============================================================================
2730 #define _CONFIG 0x2007
2732 //----------------------------- CONFIG Options -------------------------------
2734 #define _FOSC0_INT 0x3FFE // Internal oscillator mode. I/O function on RA5/CLKIN.
2735 #define _FOSC0_EC 0x3FFF // EC oscillator mode. CLKIN function on RA5/CLKIN.
2736 #define _WDTE_OFF 0x3FF7 // Watchdog Timer disabled.
2737 #define _WDTE_ON 0x3FFF // Watchdog Timer enabled.
2738 #define _PWRTE_ON 0x3FEF // Power-up Timer enabled.
2739 #define _PWRTE_OFF 0x3FFF // Power-up Timer disabled.
2740 #define _MCLRE_OFF 0x3FDF // MCLR pin is alternate function.
2741 #define _MCLRE_ON 0x3FFF // MCLR pin is MCLR function with internal weak pullup.
2742 #define _CP_ON 0x3FBF // Program memory code protection is enabled.
2743 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
2744 #define _BOREN_DIS 0x3CFF // BOR disabled.
2745 #define _BOREN_SLEEP_DIS 0x3EFF // BOR enabled during operation and disabled in Sleep.
2746 #define _BOREN_EN 0x3FFF // BOR enabled.
2747 #define _WRT_ALL 0x33FF // 000h to 3FFh self-write protected.
2748 #define _WRT_HALF 0x37FF // 000h to 1FFh self-write protected.
2749 #define _WRT_FOURTH 0x3BFF // 000h to 0FFh self-write protected.
2750 #define _WRT_OFF 0x3FFF // Flash self-write protection off.
2751 #define _CLKOUTEN_ON 0x2FFF // CLKOUT function enabled. CLKOUT pin is CLKOUT.
2752 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function disabled. CLKOUT pin acts as I/O.
2754 //==============================================================================
2756 #define _DEVID1 0x2006
2758 #define _IDLOC0 0x2000
2759 #define _IDLOC1 0x2001
2760 #define _IDLOC2 0x2002
2761 #define _IDLOC3 0x2003
2763 //==============================================================================
2765 #ifndef NO_BIT_DEFINES
2767 #define ADON ADCON0bits.ADON // bit 0
2768 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1
2769 #define CHS0 ADCON0bits.CHS0 // bit 2
2770 #define CHS1 ADCON0bits.CHS1 // bit 3
2771 #define CHS2 ADCON0bits.CHS2 // bit 4
2772 #define CHS3 ADCON0bits.CHS3 // bit 5
2773 #define ADFM ADCON0bits.ADFM // bit 7
2775 #define ADPREF1 ADCON1bits.ADPREF1 // bit 0
2776 #define ADCS0 ADCON1bits.ADCS0 // bit 4
2777 #define ADCS1 ADCON1bits.ADCS1 // bit 5
2778 #define ADCS2 ADCON1bits.ADCS2 // bit 6
2780 #define ANSA0 ANSELAbits.ANSA0 // bit 0
2781 #define ANSA1 ANSELAbits.ANSA1 // bit 1
2782 #define ANSA2 ANSELAbits.ANSA2 // bit 2
2783 #define ANSA4 ANSELAbits.ANSA4 // bit 4
2785 #define ANSC0 ANSELCbits.ANSC0 // bit 0
2786 #define ANSC1 ANSELCbits.ANSC1 // bit 1
2787 #define ANSC2 ANSELCbits.ANSC2 // bit 2
2788 #define ANSC3 ANSELCbits.ANSC3 // bit 3
2790 #define T1GSEL APFCONbits.T1GSEL // bit 4
2792 #define C1SYNC C1CON0bits.C1SYNC // bit 0
2793 #define C1HYS C1CON0bits.C1HYS // bit 1
2794 #define C1SP C1CON0bits.C1SP // bit 2
2795 #define C1ZLF C1CON0bits.C1ZLF // bit 3
2796 #define C1POL C1CON0bits.C1POL // bit 4
2797 #define C1OE C1CON0bits.C1OE // bit 5
2798 #define C1OUT C1CON0bits.C1OUT // bit 6
2799 #define C1ON C1CON0bits.C1ON // bit 7
2801 #define C1NCH0 C1CON1bits.C1NCH0 // bit 0
2802 #define C1NCH1 C1CON1bits.C1NCH1 // bit 1
2803 #define C1NCH2 C1CON1bits.C1NCH2 // bit 2
2804 #define C1PCH0 C1CON1bits.C1PCH0 // bit 3
2805 #define C1PCH1 C1CON1bits.C1PCH1 // bit 4
2806 #define C1PCH2 C1CON1bits.C1PCH2 // bit 5
2807 #define C1INTN C1CON1bits.C1INTN // bit 6
2808 #define C1INTP C1CON1bits.C1INTP // bit 7
2810 #define C2SYNC C2CON0bits.C2SYNC // bit 0
2811 #define C2HYS C2CON0bits.C2HYS // bit 1
2812 #define C2SP C2CON0bits.C2SP // bit 2
2813 #define C2ZLF C2CON0bits.C2ZLF // bit 3
2814 #define C2POL C2CON0bits.C2POL // bit 4
2815 #define C2OE C2CON0bits.C2OE // bit 5
2816 #define C2OUT C2CON0bits.C2OUT // bit 6
2817 #define C2ON C2CON0bits.C2ON // bit 7
2819 #define C2NCH0 C2CON1bits.C2NCH0 // bit 0
2820 #define C2NCH1 C2CON1bits.C2NCH1 // bit 1
2821 #define C2NCH2 C2CON1bits.C2NCH2 // bit 2
2822 #define C2PCH0 C2CON1bits.C2PCH0 // bit 3
2823 #define C2PCH1 C2CON1bits.C2PCH1 // bit 4
2824 #define C2PCH2 C2CON1bits.C2PCH2 // bit 5
2825 #define C2INTN C2CON1bits.C2INTN // bit 6
2826 #define C2INTP C2CON1bits.C2INTP // bit 7
2828 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
2829 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
2830 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
2831 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
2832 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
2833 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
2835 #define MCOUT1 CMOUTbits.MCOUT1 // bit 0
2836 #define MCOUT2 CMOUTbits.MCOUT2 // bit 1
2838 #define G1ASD0L0 COG1ASD0bits.G1ASD0L0 // bit 2
2839 #define G1ASD0L1 COG1ASD0bits.G1ASD0L1 // bit 3
2840 #define G1ASD1L0 COG1ASD0bits.G1ASD1L0 // bit 4
2841 #define G1ASD1L1 COG1ASD0bits.G1ASD1L1 // bit 5
2842 #define G1ARSEN COG1ASD0bits.G1ARSEN // bit 6
2843 #define G1ASDE COG1ASD0bits.G1ASDE // bit 7
2845 #define G1ASDSFLT COG1ASD1bits.G1ASDSFLT // bit 0
2846 #define G1ASDSC1 COG1ASD1bits.G1ASDSC1 // bit 1
2847 #define G1ASDSC2 COG1ASD1bits.G1ASDSC2 // bit 2
2848 #define G1ASDSHLT1 COG1ASD1bits.G1ASDSHLT1 // bit 3
2849 #define G1ASDSHLT2 COG1ASD1bits.G1ASDSHLT2 // bit 4
2851 #define G1BKF0 COG1BKFbits.G1BKF0 // bit 0
2852 #define G1BKF1 COG1BKFbits.G1BKF1 // bit 1
2853 #define G1BKF2 COG1BKFbits.G1BKF2 // bit 2
2854 #define G1BKF3 COG1BKFbits.G1BKF3 // bit 3
2856 #define G1BKR0 COG1BKRbits.G1BKR0 // bit 0
2857 #define G1BKR1 COG1BKRbits.G1BKR1 // bit 1
2858 #define G1BKR2 COG1BKRbits.G1BKR2 // bit 2
2859 #define G1BKR3 COG1BKRbits.G1BKR3 // bit 3
2861 #define G1MD COG1CON0bits.G1MD // bit 0
2862 #define G1LD COG1CON0bits.G1LD // bit 2
2863 #define G1POL0 COG1CON0bits.G1POL0 // bit 3
2864 #define G1POL1 COG1CON0bits.G1POL1 // bit 4
2865 #define G1OE0 COG1CON0bits.G1OE0 // bit 5
2866 #define G1OE1 COG1CON0bits.G1OE1 // bit 6
2867 #define G1EN COG1CON0bits.G1EN // bit 7
2869 #define G1CS0 COG1CON1bits.G1CS0 // bit 0
2870 #define G1CS1 COG1CON1bits.G1CS1 // bit 1
2871 #define G1FDBTS COG1CON1bits.G1FDBTS // bit 6
2872 #define G1RDBTS COG1CON1bits.G1RDBTS // bit 7
2874 #define G1DBF0 COG1DBFbits.G1DBF0 // bit 0
2875 #define G1DBF1 COG1DBFbits.G1DBF1 // bit 1
2876 #define G1DBF2 COG1DBFbits.G1DBF2 // bit 2
2877 #define G1DBF3 COG1DBFbits.G1DBF3 // bit 3
2879 #define G1DBR0 COG1DBRbits.G1DBR0 // bit 0
2880 #define G1DBR1 COG1DBRbits.G1DBR1 // bit 1
2881 #define G1DBR2 COG1DBRbits.G1DBR2 // bit 2
2882 #define G1DBR3 COG1DBRbits.G1DBR3 // bit 3
2884 #define G1FIC1 COG1FISbits.G1FIC1 // bit 0
2885 #define G1FIC2 COG1FISbits.G1FIC2 // bit 1
2886 #define G1FICCP1 COG1FISbits.G1FICCP1 // bit 2
2887 #define G1FIFLT COG1FISbits.G1FIFLT // bit 3
2888 #define G1FIT2M COG1FISbits.G1FIT2M // bit 4
2889 #define G1FIHLT1 COG1FISbits.G1FIHLT1 // bit 5
2890 #define G1FIHLT2 COG1FISbits.G1FIHLT2 // bit 6
2892 #define G1FMC1 COG1FSIMbits.G1FMC1 // bit 0
2893 #define G1FMC2 COG1FSIMbits.G1FMC2 // bit 1
2894 #define G1FMCCP1 COG1FSIMbits.G1FMCCP1 // bit 2
2895 #define G1FMFLT COG1FSIMbits.G1FMFLT // bit 3
2896 #define G1FMT2M COG1FSIMbits.G1FMT2M // bit 4
2897 #define G1FMHLT1 COG1FSIMbits.G1FMHLT1 // bit 5
2898 #define G1FMHLT2 COG1FSIMbits.G1FMHLT2 // bit 6
2900 #define G1PHF0 COG1PHFbits.G1PHF0 // bit 0
2901 #define G1PHF1 COG1PHFbits.G1PHF1 // bit 1
2902 #define G1PHF2 COG1PHFbits.G1PHF2 // bit 2
2903 #define G1PHF3 COG1PHFbits.G1PHF3 // bit 3
2905 #define G1PHR0 COG1PHRbits.G1PHR0 // bit 0
2906 #define G1PHR1 COG1PHRbits.G1PHR1 // bit 1
2907 #define G1PHR2 COG1PHRbits.G1PHR2 // bit 2
2908 #define G1PHR3 COG1PHRbits.G1PHR3 // bit 3
2910 #define G1RIC1 COG1RISbits.G1RIC1 // bit 0
2911 #define G1RIC2 COG1RISbits.G1RIC2 // bit 1
2912 #define C1RICCP1 COG1RISbits.C1RICCP1 // bit 2
2913 #define G1RIFLT COG1RISbits.G1RIFLT // bit 3
2914 #define G1RIT2M COG1RISbits.G1RIT2M // bit 4
2915 #define G1R1HLT1 COG1RISbits.G1R1HLT1 // bit 5
2916 #define G1RIHLT2 COG1RISbits.G1RIHLT2 // bit 6
2918 #define G1RMC1 COG1RSIMbits.G1RMC1 // bit 0
2919 #define G1RMC2 COG1RSIMbits.G1RMC2 // bit 1
2920 #define G1RMCCP1 COG1RSIMbits.G1RMCCP1 // bit 2
2921 #define G1RMFLT COG1RSIMbits.G1RMFLT // bit 3
2922 #define G1RTM2M COG1RSIMbits.G1RTM2M // bit 4
2923 #define G1RMHLT1 COG1RSIMbits.G1RMHLT1 // bit 5
2924 #define G1RMHLT2 COG1RSIMbits.G1RMHLT2 // bit 6
2926 #define DACPSS0 DAC1CON0bits.DACPSS0 // bit 2
2927 #define DACPSS1 DAC1CON0bits.DACPSS1 // bit 3
2928 #define DACOE DAC1CON0bits.DACOE // bit 5
2929 #define DACFM DAC1CON0bits.DACFM // bit 6
2930 #define DACEN DAC1CON0bits.DACEN // bit 7
2932 #define FVRBUFEN FVR1CON0bits.FVRBUFEN // bit 0
2933 #define FVRBUSS0 FVR1CON0bits.FVRBUSS0 // bit 3
2934 #define FVRBUSS1 FVR1CON0bits.FVRBUSS1 // bit 4
2935 #define FVROE FVR1CON0bits.FVROE // bit 5
2936 #define FVRRDY FVR1CON0bits.FVRRDY // bit 6
2937 #define FVREN FVR1CON0bits.FVREN // bit 7
2939 #define H1CKPS0 HLT1CON0bits.H1CKPS0 // bit 0
2940 #define H1CKPS1 HLT1CON0bits.H1CKPS1 // bit 1
2941 #define H1ON HLT1CON0bits.H1ON // bit 2
2942 #define H1OUTPS0 HLT1CON0bits.H1OUTPS0 // bit 3
2943 #define H1OUTPS1 HLT1CON0bits.H1OUTPS1 // bit 4
2944 #define H1OUTPS2 HLT1CON0bits.H1OUTPS2 // bit 5
2945 #define H1OUTPS3 HLT1CON0bits.H1OUTPS3 // bit 6
2947 #define H1REREN HLT1CON1bits.H1REREN // bit 0
2948 #define H1FEREN HLT1CON1bits.H1FEREN // bit 1
2949 #define H1ERS0 HLT1CON1bits.H1ERS0 // bit 2
2950 #define H1ERS1 HLT1CON1bits.H1ERS1 // bit 3
2951 #define H1ERS2 HLT1CON1bits.H1ERS2 // bit 4
2952 #define H1RES HLT1CON1bits.H1RES // bit 6
2953 #define H1FES HLT1CON1bits.H1FES // bit 7
2955 #define H2CKPS0 HLT2CON0bits.H2CKPS0 // bit 0
2956 #define H2CKPS1 HLT2CON0bits.H2CKPS1 // bit 1
2957 #define H2ON HLT2CON0bits.H2ON // bit 2
2958 #define H2OUTPS0 HLT2CON0bits.H2OUTPS0 // bit 3
2959 #define H2OUTPS1 HLT2CON0bits.H2OUTPS1 // bit 4
2960 #define H2OUTPS2 HLT2CON0bits.H2OUTPS2 // bit 5
2961 #define H2OUTPS3 HLT2CON0bits.H2OUTPS3 // bit 6
2963 #define H2REREN HLT2CON1bits.H2REREN // bit 0
2964 #define H2FEREN HLT2CON1bits.H2FEREN // bit 1
2965 #define H2ERS0 HLT2CON1bits.H2ERS0 // bit 2
2966 #define H2ERS1 HLT2CON1bits.H2ERS1 // bit 3
2967 #define H2ERS2 HLT2CON1bits.H2ERS2 // bit 4
2968 #define H2RES HLT2CON1bits.H2RES // bit 6
2969 #define H2FES HLT2CON1bits.H2FES // bit 7
2971 #define IOCIF INTCONbits.IOCIF // bit 0
2972 #define INTF INTCONbits.INTF // bit 1
2973 #define T0IF INTCONbits.T0IF // bit 2
2974 #define IOCIE INTCONbits.IOCIE // bit 3
2975 #define INTE INTCONbits.INTE // bit 4
2976 #define T0IE INTCONbits.T0IE // bit 5
2977 #define PEIE INTCONbits.PEIE // bit 6
2978 #define GIE INTCONbits.GIE // bit 7
2980 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
2981 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
2982 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
2983 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
2984 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
2985 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
2987 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
2988 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
2989 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
2990 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
2991 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
2992 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
2994 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
2995 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
2996 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
2997 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
2998 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
2999 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
3001 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
3002 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
3003 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
3004 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
3005 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
3006 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
3008 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
3009 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
3010 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
3011 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
3012 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
3013 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
3015 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
3016 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
3017 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
3018 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
3019 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
3020 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
3022 #define LATA0 LATAbits.LATA0 // bit 0
3023 #define LATA1 LATAbits.LATA1 // bit 1
3024 #define LATA2 LATAbits.LATA2 // bit 2
3025 #define LATA4 LATAbits.LATA4 // bit 4
3026 #define LATA5 LATAbits.LATA5 // bit 5
3028 #define LATC0 LATCbits.LATC0 // bit 0
3029 #define LATC1 LATCbits.LATC1 // bit 1
3030 #define LATC2 LATCbits.LATC2 // bit 2
3031 #define LATC3 LATCbits.LATC3 // bit 3
3032 #define LATC4 LATCbits.LATC4 // bit 4
3033 #define LATC5 LATCbits.LATC5 // bit 5
3035 #define OPA1PCH0 OPA1CONbits.OPA1PCH0 // bit 0
3036 #define OPA1PCH1 OPA1CONbits.OPA1PCH1 // bit 1
3037 #define OPA1NCH0 OPA1CONbits.OPA1NCH0 // bit 2
3038 #define OPA1NCH1 OPA1CONbits.OPA1NCH1 // bit 3
3039 #define OPAUGM OPA1CONbits.OPAUGM // bit 4
3040 #define OPAEN OPA1CONbits.OPAEN // bit 7
3042 #define PS0 OPTION_REGbits.PS0 // bit 0
3043 #define PS1 OPTION_REGbits.PS1 // bit 1
3044 #define PS2 OPTION_REGbits.PS2 // bit 2
3045 #define PSA OPTION_REGbits.PSA // bit 3
3046 #define T0SE OPTION_REGbits.T0SE // bit 4
3047 #define T0CS OPTION_REGbits.T0CS // bit 5
3048 #define INTEDG OPTION_REGbits.INTEDG // bit 6
3049 #define NOT_RAPU OPTION_REGbits.NOT_RAPU // bit 7
3051 #define LTS OSCCONbits.LTS // bit 1
3052 #define HTS OSCCONbits.HTS // bit 2
3053 #define IRCF0 OSCCONbits.IRCF0 // bit 4
3054 #define IRCF1 OSCCONbits.IRCF1 // bit 5
3056 #define TUN0 OSCTUNEbits.TUN0 // bit 0
3057 #define TUN1 OSCTUNEbits.TUN1 // bit 1
3058 #define TUN2 OSCTUNEbits.TUN2 // bit 2
3059 #define TUN3 OSCTUNEbits.TUN3 // bit 3
3060 #define TUN4 OSCTUNEbits.TUN4 // bit 4
3062 #define NOT_BOR PCONbits.NOT_BOR // bit 0
3063 #define NOT_POR PCONbits.NOT_POR // bit 1
3065 #define TMR1IE PIE1bits.TMR1IE // bit 0
3066 #define TMR2IE PIE1bits.TMR2IE // bit 1
3067 #define HLTMR1IE PIE1bits.HLTMR1IE // bit 2
3068 #define HLTMR2IE PIE1bits.HLTMR2IE // bit 3
3069 #define ADIE PIE1bits.ADIE // bit 6
3070 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
3072 #define CCP1IE PIE2bits.CCP1IE // bit 0
3073 #define COG1IE PIE2bits.COG1IE // bit 2
3074 #define C1IE PIE2bits.C1IE // bit 4
3075 #define C2IE PIE2bits.C2IE // bit 5
3077 #define TMR1IF PIR1bits.TMR1IF // bit 0
3078 #define TMR2IF PIR1bits.TMR2IF // bit 1
3079 #define HLTMR1IF PIR1bits.HLTMR1IF // bit 2
3080 #define HLTMR2IF PIR1bits.HLTMR2IF // bit 3
3081 #define ADIF PIR1bits.ADIF // bit 6
3082 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
3084 #define CCP1IF PIR2bits.CCP1IF // bit 0
3085 #define COG1IF PIR2bits.COG1IF // bit 2
3086 #define C1IF PIR2bits.C1IF // bit 4
3087 #define C2IF PIR2bits.C2IF // bit 5
3089 #define RD PMCON1bits.RD // bit 0
3090 #define WR PMCON1bits.WR // bit 1
3091 #define WREN PMCON1bits.WREN // bit 2
3093 #define RA0 PORTAbits.RA0 // bit 0
3094 #define RA1 PORTAbits.RA1 // bit 1
3095 #define RA2 PORTAbits.RA2 // bit 2
3096 #define RA3 PORTAbits.RA3 // bit 3
3097 #define RA4 PORTAbits.RA4 // bit 4
3098 #define RA5 PORTAbits.RA5 // bit 5
3100 #define RC0 PORTCbits.RC0 // bit 0
3101 #define RC1 PORTCbits.RC1 // bit 1
3102 #define RC2 PORTCbits.RC2 // bit 2
3103 #define RC3 PORTCbits.RC3 // bit 3
3104 #define RC4 PORTCbits.RC4 // bit 4
3105 #define RC5 PORTCbits.RC5 // bit 5
3107 #define SC1INS SLPC1CON0bits.SC1INS // bit 0
3108 #define SCS1TSS0 SLPC1CON0bits.SCS1TSS0 // bit 2
3109 #define SCS1TSS1 SLPC1CON0bits.SCS1TSS1 // bit 3
3110 #define SC1POL SLPC1CON0bits.SC1POL // bit 4
3111 #define SC1MRPE SLPC1CON0bits.SC1MRPE // bit 5
3112 #define SC1EN SLPC1CON0bits.SC1EN // bit 7
3114 #define SC1ISET0 SLPC1CON1bits.SC1ISET0 // bit 0
3115 #define SC1ISET1 SLPC1CON1bits.SC1ISET1 // bit 1
3116 #define SC1ISET2 SLPC1CON1bits.SC1ISET2 // bit 2
3117 #define SC1ISET3 SLPC1CON1bits.SC1ISET3 // bit 3
3118 #define SC1RNG SLPC1CON1bits.SC1RNG // bit 4
3120 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
3121 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
3123 #define C STATUSbits.C // bit 0
3124 #define DC STATUSbits.DC // bit 1
3125 #define Z STATUSbits.Z // bit 2
3126 #define NOT_PD STATUSbits.NOT_PD // bit 3
3127 #define NOT_TO STATUSbits.NOT_TO // bit 4
3128 #define RP0 STATUSbits.RP0 // bit 5
3129 #define RP1 STATUSbits.RP1 // bit 6
3130 #define IRP STATUSbits.IRP // bit 7
3132 #define TMR1ON T1CONbits.TMR1ON // bit 0
3133 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
3134 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
3135 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
3136 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
3137 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
3139 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
3140 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
3141 #define T1GVAL T1GCONbits.T1GVAL // bit 2
3142 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
3143 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
3144 #define T1GSPM T1GCONbits.T1GSPM // bit 4
3145 #define T1GTM T1GCONbits.T1GTM // bit 5
3146 #define T1GPOL T1GCONbits.T1GPOL // bit 6
3147 #define TMR1GE T1GCONbits.TMR1GE // bit 7
3149 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
3150 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
3151 #define TMR2ON T2CONbits.TMR2ON // bit 2
3152 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
3153 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
3154 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
3155 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
3157 #define TRISA0 TRISAbits.TRISA0 // bit 0
3158 #define TRISA1 TRISAbits.TRISA1 // bit 1
3159 #define TRISA2 TRISAbits.TRISA2 // bit 2
3160 #define TRISA3 TRISAbits.TRISA3 // bit 3
3161 #define TRISA4 TRISAbits.TRISA4 // bit 4
3162 #define TRISA5 TRISAbits.TRISA5 // bit 5
3164 #define TRISC0 TRISCbits.TRISC0 // bit 0
3165 #define TRISC1 TRISCbits.TRISC1 // bit 1
3166 #define TRISC2 TRISCbits.TRISC2 // bit 2
3167 #define TRISC3 TRISCbits.TRISC3 // bit 3
3168 #define TRISC4 TRISCbits.TRISC4 // bit 4
3169 #define TRISC5 TRISCbits.TRISC5 // bit 5
3171 #define WPUA0 WPUAbits.WPUA0 // bit 0
3172 #define WPUA1 WPUAbits.WPUA1 // bit 1
3173 #define WPUA2 WPUAbits.WPUA2 // bit 2
3174 #define WPUA3 WPUAbits.WPUA3 // bit 3
3175 #define WPUA4 WPUAbits.WPUA4 // bit 4
3176 #define WPUA5 WPUAbits.WPUA5 // bit 5
3178 #define WPUC0 WPUCbits.WPUC0 // bit 0
3179 #define WPUC1 WPUCbits.WPUC1 // bit 1
3180 #define WPUC2 WPUCbits.WPUC2 // bit 2
3181 #define WPUC3 WPUCbits.WPUC3 // bit 3
3182 #define WPUC4 WPUCbits.WPUC4 // bit 4
3183 #define WPUC5 WPUCbits.WPUC5 // bit 5
3185 #endif // #ifndef NO_BIT_DEFINES
3187 #endif // #ifndef __PIC16HV753_H__