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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16lf1503.h
blob4d6aeb347d253fa4027d7da47e82ff5f7027348b
1 /*
2 * This declarations of the PIC16LF1503 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16LF1503_H__
26 #define __PIC16LF1503_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTC_ADDR 0x000E
52 #define PIR1_ADDR 0x0011
53 #define PIR2_ADDR 0x0012
54 #define PIR3_ADDR 0x0013
55 #define TMR0_ADDR 0x0015
56 #define TMR1_ADDR 0x0016
57 #define TMR1L_ADDR 0x0016
58 #define TMR1H_ADDR 0x0017
59 #define T1CON_ADDR 0x0018
60 #define T1GCON_ADDR 0x0019
61 #define TMR2_ADDR 0x001A
62 #define PR2_ADDR 0x001B
63 #define T2CON_ADDR 0x001C
64 #define TRISA_ADDR 0x008C
65 #define TRISC_ADDR 0x008E
66 #define PIE1_ADDR 0x0091
67 #define PIE2_ADDR 0x0092
68 #define PIE3_ADDR 0x0093
69 #define OPTION_REG_ADDR 0x0095
70 #define PCON_ADDR 0x0096
71 #define WDTCON_ADDR 0x0097
72 #define OSCCON_ADDR 0x0099
73 #define OSCSTAT_ADDR 0x009A
74 #define ADRES_ADDR 0x009B
75 #define ADRESL_ADDR 0x009B
76 #define ADRESH_ADDR 0x009C
77 #define ADCON0_ADDR 0x009D
78 #define ADCON1_ADDR 0x009E
79 #define ADCON2_ADDR 0x009F
80 #define LATA_ADDR 0x010C
81 #define LATC_ADDR 0x010E
82 #define CM1CON0_ADDR 0x0111
83 #define CM1CON1_ADDR 0x0112
84 #define CM2CON0_ADDR 0x0113
85 #define CM2CON1_ADDR 0x0114
86 #define CMOUT_ADDR 0x0115
87 #define BORCON_ADDR 0x0116
88 #define FVRCON_ADDR 0x0117
89 #define DACCON0_ADDR 0x0118
90 #define DACCON1_ADDR 0x0119
91 #define APFCON_ADDR 0x011D
92 #define ANSELA_ADDR 0x018C
93 #define ANSELC_ADDR 0x018E
94 #define PMADR_ADDR 0x0191
95 #define PMADRL_ADDR 0x0191
96 #define PMADRH_ADDR 0x0192
97 #define PMDAT_ADDR 0x0193
98 #define PMDATL_ADDR 0x0193
99 #define PMDATH_ADDR 0x0194
100 #define PMCON1_ADDR 0x0195
101 #define PMCON2_ADDR 0x0196
102 #define WPUA_ADDR 0x020C
103 #define SSP1BUF_ADDR 0x0211
104 #define SSPBUF_ADDR 0x0211
105 #define SSP1ADD_ADDR 0x0212
106 #define SSPADD_ADDR 0x0212
107 #define SSP1MSK_ADDR 0x0213
108 #define SSPMSK_ADDR 0x0213
109 #define SSP1STAT_ADDR 0x0214
110 #define SSPSTAT_ADDR 0x0214
111 #define SSP1CON1_ADDR 0x0215
112 #define SSPCON_ADDR 0x0215
113 #define SSPCON1_ADDR 0x0215
114 #define SSP1CON2_ADDR 0x0216
115 #define SSPCON2_ADDR 0x0216
116 #define SSP1CON3_ADDR 0x0217
117 #define SSPCON3_ADDR 0x0217
118 #define IOCAP_ADDR 0x0391
119 #define IOCAN_ADDR 0x0392
120 #define IOCAF_ADDR 0x0393
121 #define NCO1ACC_ADDR 0x0498
122 #define NCO1ACCL_ADDR 0x0498
123 #define NCO1ACCH_ADDR 0x0499
124 #define NCO1ACCU_ADDR 0x049A
125 #define NCO1INC_ADDR 0x049B
126 #define NCO1INCL_ADDR 0x049B
127 #define NCO1INCH_ADDR 0x049C
128 #define NCO1INCU_ADDR 0x049D
129 #define NCO1CON_ADDR 0x049E
130 #define NCO1CLK_ADDR 0x049F
131 #define PWM1DCL_ADDR 0x0611
132 #define PWM1DCH_ADDR 0x0612
133 #define PWM1CON_ADDR 0x0613
134 #define PWM1CON0_ADDR 0x0613
135 #define PWM2DCL_ADDR 0x0614
136 #define PWM2DCH_ADDR 0x0615
137 #define PWM2CON_ADDR 0x0616
138 #define PWM2CON0_ADDR 0x0616
139 #define PWM3DCL_ADDR 0x0617
140 #define PWM3DCH_ADDR 0x0618
141 #define PWM3CON_ADDR 0x0619
142 #define PWM3CON0_ADDR 0x0619
143 #define PWM4DCL_ADDR 0x061A
144 #define PWM4DCH_ADDR 0x061B
145 #define PWM4CON_ADDR 0x061C
146 #define PWM4CON0_ADDR 0x061C
147 #define CWG1DBR_ADDR 0x0691
148 #define CWG1DBF_ADDR 0x0692
149 #define CWG1CON0_ADDR 0x0693
150 #define CWG1CON1_ADDR 0x0694
151 #define CWG1CON2_ADDR 0x0695
152 #define CLCDATA_ADDR 0x0F0F
153 #define CLC1CON_ADDR 0x0F10
154 #define CLC1POL_ADDR 0x0F11
155 #define CLC1SEL0_ADDR 0x0F12
156 #define CLC1SEL1_ADDR 0x0F13
157 #define CLC1GLS0_ADDR 0x0F14
158 #define CLC1GLS1_ADDR 0x0F15
159 #define CLC1GLS2_ADDR 0x0F16
160 #define CLC1GLS3_ADDR 0x0F17
161 #define CLC2CON_ADDR 0x0F18
162 #define CLC2POL_ADDR 0x0F19
163 #define CLC2SEL0_ADDR 0x0F1A
164 #define CLC2SEL1_ADDR 0x0F1B
165 #define CLC2GLS0_ADDR 0x0F1C
166 #define CLC2GLS1_ADDR 0x0F1D
167 #define CLC2GLS2_ADDR 0x0F1E
168 #define CLC2GLS3_ADDR 0x0F1F
169 #define BSR_ICDSHAD_ADDR 0x0FE3
170 #define STATUS_SHAD_ADDR 0x0FE4
171 #define WREG_SHAD_ADDR 0x0FE5
172 #define BSR_SHAD_ADDR 0x0FE6
173 #define PCLATH_SHAD_ADDR 0x0FE7
174 #define FSR0L_SHAD_ADDR 0x0FE8
175 #define FSR0H_SHAD_ADDR 0x0FE9
176 #define FSR1L_SHAD_ADDR 0x0FEA
177 #define FSR1H_SHAD_ADDR 0x0FEB
178 #define STKPTR_ADDR 0x0FED
179 #define TOSL_ADDR 0x0FEE
180 #define TOSH_ADDR 0x0FEF
181
182 #endif // #ifndef NO_ADDR_DEFINES
183
184 //==============================================================================
185 //
186 // Register Definitions
187 //
188 //==============================================================================
189
190 extern __at(0x0000) __sfr INDF0;
191 extern __at(0x0001) __sfr INDF1;
192 extern __at(0x0002) __sfr PCL;
193
194 //==============================================================================
195 // STATUS Bits
196
197 extern __at(0x0003) __sfr STATUS;
198
199 typedef struct
200 {
201 unsigned C : 1;
202 unsigned DC : 1;
203 unsigned Z : 1;
204 unsigned NOT_PD : 1;
205 unsigned NOT_TO : 1;
206 unsigned : 1;
207 unsigned : 1;
208 unsigned : 1;
209 } __STATUSbits_t;
210
211 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
212
213 #define _C 0x01
214 #define _DC 0x02
215 #define _Z 0x04
216 #define _NOT_PD 0x08
217 #define _NOT_TO 0x10
218
219 //==============================================================================
220
221 extern __at(0x0004) __sfr FSR0;
222 extern __at(0x0004) __sfr FSR0L;
223 extern __at(0x0005) __sfr FSR0H;
224 extern __at(0x0006) __sfr FSR1;
225 extern __at(0x0006) __sfr FSR1L;
226 extern __at(0x0007) __sfr FSR1H;
227
228 //==============================================================================
229 // BSR Bits
230
231 extern __at(0x0008) __sfr BSR;
232
233 typedef union
234 {
235 struct
236 {
237 unsigned BSR0 : 1;
238 unsigned BSR1 : 1;
239 unsigned BSR2 : 1;
240 unsigned BSR3 : 1;
241 unsigned BSR4 : 1;
242 unsigned : 1;
243 unsigned : 1;
244 unsigned : 1;
245 };
246
247 struct
248 {
249 unsigned BSR : 5;
250 unsigned : 3;
251 };
252 } __BSRbits_t;
253
254 extern __at(0x0008) volatile __BSRbits_t BSRbits;
255
256 #define _BSR0 0x01
257 #define _BSR1 0x02
258 #define _BSR2 0x04
259 #define _BSR3 0x08
260 #define _BSR4 0x10
261
262 //==============================================================================
263
264 extern __at(0x0009) __sfr WREG;
265 extern __at(0x000A) __sfr PCLATH;
266
267 //==============================================================================
268 // INTCON Bits
269
270 extern __at(0x000B) __sfr INTCON;
271
272 typedef union
273 {
274 struct
275 {
276 unsigned IOCIF : 1;
277 unsigned INTF : 1;
278 unsigned TMR0IF : 1;
279 unsigned IOCIE : 1;
280 unsigned INTE : 1;
281 unsigned TMR0IE : 1;
282 unsigned PEIE : 1;
283 unsigned GIE : 1;
284 };
285
286 struct
287 {
288 unsigned : 1;
289 unsigned : 1;
290 unsigned T0IF : 1;
291 unsigned : 1;
292 unsigned : 1;
293 unsigned T0IE : 1;
294 unsigned : 1;
295 unsigned : 1;
296 };
297 } __INTCONbits_t;
298
299 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
300
301 #define _IOCIF 0x01
302 #define _INTF 0x02
303 #define _TMR0IF 0x04
304 #define _T0IF 0x04
305 #define _IOCIE 0x08
306 #define _INTE 0x10
307 #define _TMR0IE 0x20
308 #define _T0IE 0x20
309 #define _PEIE 0x40
310 #define _GIE 0x80
311
312 //==============================================================================
313
314
315 //==============================================================================
316 // PORTA Bits
317
318 extern __at(0x000C) __sfr PORTA;
319
320 typedef union
321 {
322 struct
323 {
324 unsigned RA0 : 1;
325 unsigned RA1 : 1;
326 unsigned RA2 : 1;
327 unsigned RA3 : 1;
328 unsigned RA4 : 1;
329 unsigned RA5 : 1;
330 unsigned : 1;
331 unsigned : 1;
332 };
333
334 struct
335 {
336 unsigned RA : 6;
337 unsigned : 2;
338 };
339 } __PORTAbits_t;
340
341 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
342
343 #define _RA0 0x01
344 #define _RA1 0x02
345 #define _RA2 0x04
346 #define _RA3 0x08
347 #define _RA4 0x10
348 #define _RA5 0x20
349
350 //==============================================================================
351
352
353 //==============================================================================
354 // PORTC Bits
355
356 extern __at(0x000E) __sfr PORTC;
357
358 typedef union
359 {
360 struct
361 {
362 unsigned RC0 : 1;
363 unsigned RC1 : 1;
364 unsigned RC2 : 1;
365 unsigned RC3 : 1;
366 unsigned RC4 : 1;
367 unsigned RC5 : 1;
368 unsigned : 1;
369 unsigned : 1;
370 };
371
372 struct
373 {
374 unsigned RC : 6;
375 unsigned : 2;
376 };
377 } __PORTCbits_t;
378
379 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
380
381 #define _RC0 0x01
382 #define _RC1 0x02
383 #define _RC2 0x04
384 #define _RC3 0x08
385 #define _RC4 0x10
386 #define _RC5 0x20
387
388 //==============================================================================
389
390
391 //==============================================================================
392 // PIR1 Bits
393
394 extern __at(0x0011) __sfr PIR1;
395
396 typedef struct
397 {
398 unsigned TMR1IF : 1;
399 unsigned TMR2IF : 1;
400 unsigned : 1;
401 unsigned SSP1IF : 1;
402 unsigned : 1;
403 unsigned : 1;
404 unsigned ADIF : 1;
405 unsigned TMR1GIF : 1;
406 } __PIR1bits_t;
407
408 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
409
410 #define _TMR1IF 0x01
411 #define _TMR2IF 0x02
412 #define _SSP1IF 0x08
413 #define _ADIF 0x40
414 #define _TMR1GIF 0x80
415
416 //==============================================================================
417
418
419 //==============================================================================
420 // PIR2 Bits
421
422 extern __at(0x0012) __sfr PIR2;
423
424 typedef struct
425 {
426 unsigned : 1;
427 unsigned : 1;
428 unsigned NCO1IF : 1;
429 unsigned BCL1IF : 1;
430 unsigned : 1;
431 unsigned C1IF : 1;
432 unsigned C2IF : 1;
433 unsigned : 1;
434 } __PIR2bits_t;
435
436 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
437
438 #define _NCO1IF 0x04
439 #define _BCL1IF 0x08
440 #define _C1IF 0x20
441 #define _C2IF 0x40
442
443 //==============================================================================
444
445
446 //==============================================================================
447 // PIR3 Bits
448
449 extern __at(0x0013) __sfr PIR3;
450
451 typedef struct
452 {
453 unsigned CLC1IF : 1;
454 unsigned CLC2IF : 1;
455 unsigned : 1;
456 unsigned : 1;
457 unsigned : 1;
458 unsigned : 1;
459 unsigned : 1;
460 unsigned : 1;
461 } __PIR3bits_t;
462
463 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
464
465 #define _CLC1IF 0x01
466 #define _CLC2IF 0x02
467
468 //==============================================================================
469
470 extern __at(0x0015) __sfr TMR0;
471 extern __at(0x0016) __sfr TMR1;
472 extern __at(0x0016) __sfr TMR1L;
473 extern __at(0x0017) __sfr TMR1H;
474
475 //==============================================================================
476 // T1CON Bits
477
478 extern __at(0x0018) __sfr T1CON;
479
480 typedef union
481 {
482 struct
483 {
484 unsigned TMR1ON : 1;
485 unsigned : 1;
486 unsigned NOT_T1SYNC : 1;
487 unsigned T1OSCEN : 1;
488 unsigned T1CKPS0 : 1;
489 unsigned T1CKPS1 : 1;
490 unsigned TMR1CS0 : 1;
491 unsigned TMR1CS1 : 1;
492 };
493
494 struct
495 {
496 unsigned : 4;
497 unsigned T1CKPS : 2;
498 unsigned : 2;
499 };
500
501 struct
502 {
503 unsigned : 6;
504 unsigned TMR1CS : 2;
505 };
506 } __T1CONbits_t;
507
508 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
509
510 #define _TMR1ON 0x01
511 #define _NOT_T1SYNC 0x04
512 #define _T1OSCEN 0x08
513 #define _T1CKPS0 0x10
514 #define _T1CKPS1 0x20
515 #define _TMR1CS0 0x40
516 #define _TMR1CS1 0x80
517
518 //==============================================================================
519
520
521 //==============================================================================
522 // T1GCON Bits
523
524 extern __at(0x0019) __sfr T1GCON;
525
526 typedef union
527 {
528 struct
529 {
530 unsigned T1GSS0 : 1;
531 unsigned T1GSS1 : 1;
532 unsigned T1GVAL : 1;
533 unsigned T1GGO_NOT_DONE : 1;
534 unsigned T1GSPM : 1;
535 unsigned T1GTM : 1;
536 unsigned T1GPOL : 1;
537 unsigned TMR1GE : 1;
538 };
539
540 struct
541 {
542 unsigned T1GSS : 2;
543 unsigned : 6;
544 };
545 } __T1GCONbits_t;
546
547 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
548
549 #define _T1GSS0 0x01
550 #define _T1GSS1 0x02
551 #define _T1GVAL 0x04
552 #define _T1GGO_NOT_DONE 0x08
553 #define _T1GSPM 0x10
554 #define _T1GTM 0x20
555 #define _T1GPOL 0x40
556 #define _TMR1GE 0x80
557
558 //==============================================================================
559
560 extern __at(0x001A) __sfr TMR2;
561 extern __at(0x001B) __sfr PR2;
562
563 //==============================================================================
564 // T2CON Bits
565
566 extern __at(0x001C) __sfr T2CON;
567
568 typedef union
569 {
570 struct
571 {
572 unsigned T2CKPS0 : 1;
573 unsigned T2CKPS1 : 1;
574 unsigned TMR2ON : 1;
575 unsigned T2OUTPS0 : 1;
576 unsigned T2OUTPS1 : 1;
577 unsigned T2OUTPS2 : 1;
578 unsigned T2OUTPS3 : 1;
579 unsigned : 1;
580 };
581
582 struct
583 {
584 unsigned T2CKPS : 2;
585 unsigned : 6;
586 };
587
588 struct
589 {
590 unsigned : 3;
591 unsigned T2OUTPS : 4;
592 unsigned : 1;
593 };
594 } __T2CONbits_t;
595
596 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
597
598 #define _T2CKPS0 0x01
599 #define _T2CKPS1 0x02
600 #define _TMR2ON 0x04
601 #define _T2OUTPS0 0x08
602 #define _T2OUTPS1 0x10
603 #define _T2OUTPS2 0x20
604 #define _T2OUTPS3 0x40
605
606 //==============================================================================
607
608
609 //==============================================================================
610 // TRISA Bits
611
612 extern __at(0x008C) __sfr TRISA;
613
614 typedef union
615 {
616 struct
617 {
618 unsigned TRISA0 : 1;
619 unsigned TRISA1 : 1;
620 unsigned TRISA2 : 1;
621 unsigned TRISA3 : 1;
622 unsigned TRISA4 : 1;
623 unsigned TRISA5 : 1;
624 unsigned : 1;
625 unsigned : 1;
626 };
627
628 struct
629 {
630 unsigned TRISA : 6;
631 unsigned : 2;
632 };
633 } __TRISAbits_t;
634
635 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
636
637 #define _TRISA0 0x01
638 #define _TRISA1 0x02
639 #define _TRISA2 0x04
640 #define _TRISA3 0x08
641 #define _TRISA4 0x10
642 #define _TRISA5 0x20
643
644 //==============================================================================
645
646
647 //==============================================================================
648 // TRISC Bits
649
650 extern __at(0x008E) __sfr TRISC;
651
652 typedef union
653 {
654 struct
655 {
656 unsigned TRISC0 : 1;
657 unsigned TRISC1 : 1;
658 unsigned TRISC2 : 1;
659 unsigned TRISC3 : 1;
660 unsigned TRISC4 : 1;
661 unsigned TRISC5 : 1;
662 unsigned : 1;
663 unsigned : 1;
664 };
665
666 struct
667 {
668 unsigned TRISC : 6;
669 unsigned : 2;
670 };
671 } __TRISCbits_t;
672
673 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
674
675 #define _TRISC0 0x01
676 #define _TRISC1 0x02
677 #define _TRISC2 0x04
678 #define _TRISC3 0x08
679 #define _TRISC4 0x10
680 #define _TRISC5 0x20
681
682 //==============================================================================
683
684
685 //==============================================================================
686 // PIE1 Bits
687
688 extern __at(0x0091) __sfr PIE1;
689
690 typedef struct
691 {
692 unsigned TMR1IE : 1;
693 unsigned TMR2IE : 1;
694 unsigned : 1;
695 unsigned SSP1IE : 1;
696 unsigned : 1;
697 unsigned : 1;
698 unsigned ADIE : 1;
699 unsigned TMR1GIE : 1;
700 } __PIE1bits_t;
701
702 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
703
704 #define _TMR1IE 0x01
705 #define _TMR2IE 0x02
706 #define _SSP1IE 0x08
707 #define _ADIE 0x40
708 #define _TMR1GIE 0x80
709
710 //==============================================================================
711
712
713 //==============================================================================
714 // PIE2 Bits
715
716 extern __at(0x0092) __sfr PIE2;
717
718 typedef struct
719 {
720 unsigned : 1;
721 unsigned : 1;
722 unsigned NCO1IE : 1;
723 unsigned BCL1IE : 1;
724 unsigned : 1;
725 unsigned C1IE : 1;
726 unsigned C2IE : 1;
727 unsigned : 1;
728 } __PIE2bits_t;
729
730 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
731
732 #define _NCO1IE 0x04
733 #define _BCL1IE 0x08
734 #define _C1IE 0x20
735 #define _C2IE 0x40
736
737 //==============================================================================
738
739
740 //==============================================================================
741 // PIE3 Bits
742
743 extern __at(0x0093) __sfr PIE3;
744
745 typedef struct
746 {
747 unsigned CLC1IE : 1;
748 unsigned CLC2IE : 1;
749 unsigned : 1;
750 unsigned : 1;
751 unsigned : 1;
752 unsigned : 1;
753 unsigned : 1;
754 unsigned : 1;
755 } __PIE3bits_t;
756
757 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
758
759 #define _CLC1IE 0x01
760 #define _CLC2IE 0x02
761
762 //==============================================================================
763
764
765 //==============================================================================
766 // OPTION_REG Bits
767
768 extern __at(0x0095) __sfr OPTION_REG;
769
770 typedef union
771 {
772 struct
773 {
774 unsigned PS0 : 1;
775 unsigned PS1 : 1;
776 unsigned PS2 : 1;
777 unsigned PSA : 1;
778 unsigned TMR0SE : 1;
779 unsigned TMR0CS : 1;
780 unsigned INTEDG : 1;
781 unsigned NOT_WPUEN : 1;
782 };
783
784 struct
785 {
786 unsigned : 1;
787 unsigned : 1;
788 unsigned : 1;
789 unsigned : 1;
790 unsigned T0SE : 1;
791 unsigned T0CS : 1;
792 unsigned : 1;
793 unsigned : 1;
794 };
795
796 struct
797 {
798 unsigned PS : 3;
799 unsigned : 5;
800 };
801 } __OPTION_REGbits_t;
802
803 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
804
805 #define _PS0 0x01
806 #define _PS1 0x02
807 #define _PS2 0x04
808 #define _PSA 0x08
809 #define _TMR0SE 0x10
810 #define _T0SE 0x10
811 #define _TMR0CS 0x20
812 #define _T0CS 0x20
813 #define _INTEDG 0x40
814 #define _NOT_WPUEN 0x80
815
816 //==============================================================================
817
818
819 //==============================================================================
820 // PCON Bits
821
822 extern __at(0x0096) __sfr PCON;
823
824 typedef struct
825 {
826 unsigned NOT_BOR : 1;
827 unsigned NOT_POR : 1;
828 unsigned NOT_RI : 1;
829 unsigned NOT_RMCLR : 1;
830 unsigned NOT_RWDT : 1;
831 unsigned : 1;
832 unsigned STKUNF : 1;
833 unsigned STKOVF : 1;
834 } __PCONbits_t;
835
836 extern __at(0x0096) volatile __PCONbits_t PCONbits;
837
838 #define _NOT_BOR 0x01
839 #define _NOT_POR 0x02
840 #define _NOT_RI 0x04
841 #define _NOT_RMCLR 0x08
842 #define _NOT_RWDT 0x10
843 #define _STKUNF 0x40
844 #define _STKOVF 0x80
845
846 //==============================================================================
847
848
849 //==============================================================================
850 // WDTCON Bits
851
852 extern __at(0x0097) __sfr WDTCON;
853
854 typedef union
855 {
856 struct
857 {
858 unsigned SWDTEN : 1;
859 unsigned WDTPS0 : 1;
860 unsigned WDTPS1 : 1;
861 unsigned WDTPS2 : 1;
862 unsigned WDTPS3 : 1;
863 unsigned WDTPS4 : 1;
864 unsigned : 1;
865 unsigned : 1;
866 };
867
868 struct
869 {
870 unsigned : 1;
871 unsigned WDTPS : 5;
872 unsigned : 2;
873 };
874 } __WDTCONbits_t;
875
876 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
877
878 #define _SWDTEN 0x01
879 #define _WDTPS0 0x02
880 #define _WDTPS1 0x04
881 #define _WDTPS2 0x08
882 #define _WDTPS3 0x10
883 #define _WDTPS4 0x20
884
885 //==============================================================================
886
887
888 //==============================================================================
889 // OSCCON Bits
890
891 extern __at(0x0099) __sfr OSCCON;
892
893 typedef union
894 {
895 struct
896 {
897 unsigned SCS0 : 1;
898 unsigned SCS1 : 1;
899 unsigned : 1;
900 unsigned IRCF0 : 1;
901 unsigned IRCF1 : 1;
902 unsigned IRCF2 : 1;
903 unsigned IRCF3 : 1;
904 unsigned : 1;
905 };
906
907 struct
908 {
909 unsigned SCS : 2;
910 unsigned : 6;
911 };
912
913 struct
914 {
915 unsigned : 3;
916 unsigned IRCF : 4;
917 unsigned : 1;
918 };
919 } __OSCCONbits_t;
920
921 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
922
923 #define _SCS0 0x01
924 #define _SCS1 0x02
925 #define _IRCF0 0x08
926 #define _IRCF1 0x10
927 #define _IRCF2 0x20
928 #define _IRCF3 0x40
929
930 //==============================================================================
931
932
933 //==============================================================================
934 // OSCSTAT Bits
935
936 extern __at(0x009A) __sfr OSCSTAT;
937
938 typedef struct
939 {
940 unsigned HFIOFS : 1;
941 unsigned LFIOFR : 1;
942 unsigned : 1;
943 unsigned : 1;
944 unsigned HFIOFR : 1;
945 unsigned : 1;
946 unsigned : 1;
947 unsigned : 1;
948 } __OSCSTATbits_t;
949
950 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
951
952 #define _HFIOFS 0x01
953 #define _LFIOFR 0x02
954 #define _HFIOFR 0x10
955
956 //==============================================================================
957
958 extern __at(0x009B) __sfr ADRES;
959 extern __at(0x009B) __sfr ADRESL;
960 extern __at(0x009C) __sfr ADRESH;
961
962 //==============================================================================
963 // ADCON0 Bits
964
965 extern __at(0x009D) __sfr ADCON0;
966
967 typedef union
968 {
969 struct
970 {
971 unsigned ADON : 1;
972 unsigned GO_NOT_DONE : 1;
973 unsigned CHS0 : 1;
974 unsigned CHS1 : 1;
975 unsigned CHS2 : 1;
976 unsigned CHS3 : 1;
977 unsigned CHS4 : 1;
978 unsigned : 1;
979 };
980
981 struct
982 {
983 unsigned : 1;
984 unsigned ADGO : 1;
985 unsigned : 1;
986 unsigned : 1;
987 unsigned : 1;
988 unsigned : 1;
989 unsigned : 1;
990 unsigned : 1;
991 };
992
993 struct
994 {
995 unsigned : 1;
996 unsigned GO : 1;
997 unsigned : 1;
998 unsigned : 1;
999 unsigned : 1;
1000 unsigned : 1;
1001 unsigned : 1;
1002 unsigned : 1;
1003 };
1004
1005 struct
1006 {
1007 unsigned : 2;
1008 unsigned CHS : 5;
1009 unsigned : 1;
1010 };
1011 } __ADCON0bits_t;
1012
1013 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1014
1015 #define _ADON 0x01
1016 #define _GO_NOT_DONE 0x02
1017 #define _ADGO 0x02
1018 #define _GO 0x02
1019 #define _CHS0 0x04
1020 #define _CHS1 0x08
1021 #define _CHS2 0x10
1022 #define _CHS3 0x20
1023 #define _CHS4 0x40
1024
1025 //==============================================================================
1026
1027
1028 //==============================================================================
1029 // ADCON1 Bits
1030
1031 extern __at(0x009E) __sfr ADCON1;
1032
1033 typedef union
1034 {
1035 struct
1036 {
1037 unsigned ADPREF0 : 1;
1038 unsigned ADPREF1 : 1;
1039 unsigned : 1;
1040 unsigned : 1;
1041 unsigned ADCS0 : 1;
1042 unsigned ADCS1 : 1;
1043 unsigned ADCS2 : 1;
1044 unsigned ADFM : 1;
1045 };
1046
1047 struct
1048 {
1049 unsigned ADPREF : 2;
1050 unsigned : 6;
1051 };
1052
1053 struct
1054 {
1055 unsigned : 4;
1056 unsigned ADCS : 3;
1057 unsigned : 1;
1058 };
1059 } __ADCON1bits_t;
1060
1061 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1062
1063 #define _ADPREF0 0x01
1064 #define _ADPREF1 0x02
1065 #define _ADCS0 0x10
1066 #define _ADCS1 0x20
1067 #define _ADCS2 0x40
1068 #define _ADFM 0x80
1069
1070 //==============================================================================
1071
1072
1073 //==============================================================================
1074 // ADCON2 Bits
1075
1076 extern __at(0x009F) __sfr ADCON2;
1077
1078 typedef union
1079 {
1080 struct
1081 {
1082 unsigned : 1;
1083 unsigned : 1;
1084 unsigned : 1;
1085 unsigned : 1;
1086 unsigned TRIGSEL0 : 1;
1087 unsigned TRIGSEL1 : 1;
1088 unsigned TRIGSEL2 : 1;
1089 unsigned TRIGSEL3 : 1;
1090 };
1091
1092 struct
1093 {
1094 unsigned : 4;
1095 unsigned TRIGSEL : 4;
1096 };
1097 } __ADCON2bits_t;
1098
1099 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1100
1101 #define _TRIGSEL0 0x10
1102 #define _TRIGSEL1 0x20
1103 #define _TRIGSEL2 0x40
1104 #define _TRIGSEL3 0x80
1105
1106 //==============================================================================
1107
1108
1109 //==============================================================================
1110 // LATA Bits
1111
1112 extern __at(0x010C) __sfr LATA;
1113
1114 typedef struct
1115 {
1116 unsigned LATA0 : 1;
1117 unsigned LATA1 : 1;
1118 unsigned LATA2 : 1;
1119 unsigned : 1;
1120 unsigned LATA4 : 1;
1121 unsigned LATA5 : 1;
1122 unsigned : 1;
1123 unsigned : 1;
1124 } __LATAbits_t;
1125
1126 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1127
1128 #define _LATA0 0x01
1129 #define _LATA1 0x02
1130 #define _LATA2 0x04
1131 #define _LATA4 0x10
1132 #define _LATA5 0x20
1133
1134 //==============================================================================
1135
1136
1137 //==============================================================================
1138 // LATC Bits
1139
1140 extern __at(0x010E) __sfr LATC;
1141
1142 typedef union
1143 {
1144 struct
1145 {
1146 unsigned LATC0 : 1;
1147 unsigned LATC1 : 1;
1148 unsigned LATC2 : 1;
1149 unsigned LATC3 : 1;
1150 unsigned LATC4 : 1;
1151 unsigned LATC5 : 1;
1152 unsigned : 1;
1153 unsigned : 1;
1154 };
1155
1156 struct
1157 {
1158 unsigned LATC : 6;
1159 unsigned : 2;
1160 };
1161 } __LATCbits_t;
1162
1163 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1164
1165 #define _LATC0 0x01
1166 #define _LATC1 0x02
1167 #define _LATC2 0x04
1168 #define _LATC3 0x08
1169 #define _LATC4 0x10
1170 #define _LATC5 0x20
1171
1172 //==============================================================================
1173
1174
1175 //==============================================================================
1176 // CM1CON0 Bits
1177
1178 extern __at(0x0111) __sfr CM1CON0;
1179
1180 typedef struct
1181 {
1182 unsigned C1SYNC : 1;
1183 unsigned C1HYS : 1;
1184 unsigned C1SP : 1;
1185 unsigned : 1;
1186 unsigned C1POL : 1;
1187 unsigned C1OE : 1;
1188 unsigned C1OUT : 1;
1189 unsigned C1ON : 1;
1190 } __CM1CON0bits_t;
1191
1192 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1193
1194 #define _C1SYNC 0x01
1195 #define _C1HYS 0x02
1196 #define _C1SP 0x04
1197 #define _C1POL 0x10
1198 #define _C1OE 0x20
1199 #define _C1OUT 0x40
1200 #define _C1ON 0x80
1201
1202 //==============================================================================
1203
1204
1205 //==============================================================================
1206 // CM1CON1 Bits
1207
1208 extern __at(0x0112) __sfr CM1CON1;
1209
1210 typedef union
1211 {
1212 struct
1213 {
1214 unsigned C1NCH0 : 1;
1215 unsigned C1NCH1 : 1;
1216 unsigned C1NCH2 : 1;
1217 unsigned : 1;
1218 unsigned C1PCH0 : 1;
1219 unsigned C1PCH1 : 1;
1220 unsigned C1INTN : 1;
1221 unsigned C1INTP : 1;
1222 };
1223
1224 struct
1225 {
1226 unsigned C1NCH : 3;
1227 unsigned : 5;
1228 };
1229
1230 struct
1231 {
1232 unsigned : 4;
1233 unsigned C1PCH : 2;
1234 unsigned : 2;
1235 };
1236 } __CM1CON1bits_t;
1237
1238 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1239
1240 #define _C1NCH0 0x01
1241 #define _C1NCH1 0x02
1242 #define _C1NCH2 0x04
1243 #define _C1PCH0 0x10
1244 #define _C1PCH1 0x20
1245 #define _C1INTN 0x40
1246 #define _C1INTP 0x80
1247
1248 //==============================================================================
1249
1250
1251 //==============================================================================
1252 // CM2CON0 Bits
1253
1254 extern __at(0x0113) __sfr CM2CON0;
1255
1256 typedef struct
1257 {
1258 unsigned C2SYNC : 1;
1259 unsigned C2HYS : 1;
1260 unsigned C2SP : 1;
1261 unsigned : 1;
1262 unsigned C2POL : 1;
1263 unsigned C2OE : 1;
1264 unsigned C2OUT : 1;
1265 unsigned C2ON : 1;
1266 } __CM2CON0bits_t;
1267
1268 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1269
1270 #define _C2SYNC 0x01
1271 #define _C2HYS 0x02
1272 #define _C2SP 0x04
1273 #define _C2POL 0x10
1274 #define _C2OE 0x20
1275 #define _C2OUT 0x40
1276 #define _C2ON 0x80
1277
1278 //==============================================================================
1279
1280
1281 //==============================================================================
1282 // CM2CON1 Bits
1283
1284 extern __at(0x0114) __sfr CM2CON1;
1285
1286 typedef union
1287 {
1288 struct
1289 {
1290 unsigned C2NCH0 : 1;
1291 unsigned C2NCH1 : 1;
1292 unsigned C2NCH2 : 1;
1293 unsigned : 1;
1294 unsigned C2PCH0 : 1;
1295 unsigned C2PCH1 : 1;
1296 unsigned C2INTN : 1;
1297 unsigned C2INTP : 1;
1298 };
1299
1300 struct
1301 {
1302 unsigned C2NCH : 3;
1303 unsigned : 5;
1304 };
1305
1306 struct
1307 {
1308 unsigned : 4;
1309 unsigned C2PCH : 2;
1310 unsigned : 2;
1311 };
1312 } __CM2CON1bits_t;
1313
1314 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1315
1316 #define _C2NCH0 0x01
1317 #define _C2NCH1 0x02
1318 #define _C2NCH2 0x04
1319 #define _C2PCH0 0x10
1320 #define _C2PCH1 0x20
1321 #define _C2INTN 0x40
1322 #define _C2INTP 0x80
1323
1324 //==============================================================================
1325
1326
1327 //==============================================================================
1328 // CMOUT Bits
1329
1330 extern __at(0x0115) __sfr CMOUT;
1331
1332 typedef struct
1333 {
1334 unsigned MC1OUT : 1;
1335 unsigned MC2OUT : 1;
1336 unsigned : 1;
1337 unsigned : 1;
1338 unsigned : 1;
1339 unsigned : 1;
1340 unsigned : 1;
1341 unsigned : 1;
1342 } __CMOUTbits_t;
1343
1344 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1345
1346 #define _MC1OUT 0x01
1347 #define _MC2OUT 0x02
1348
1349 //==============================================================================
1350
1351
1352 //==============================================================================
1353 // BORCON Bits
1354
1355 extern __at(0x0116) __sfr BORCON;
1356
1357 typedef struct
1358 {
1359 unsigned BORRDY : 1;
1360 unsigned : 1;
1361 unsigned : 1;
1362 unsigned : 1;
1363 unsigned : 1;
1364 unsigned : 1;
1365 unsigned BORFS : 1;
1366 unsigned SBOREN : 1;
1367 } __BORCONbits_t;
1368
1369 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1370
1371 #define _BORRDY 0x01
1372 #define _BORFS 0x40
1373 #define _SBOREN 0x80
1374
1375 //==============================================================================
1376
1377
1378 //==============================================================================
1379 // FVRCON Bits
1380
1381 extern __at(0x0117) __sfr FVRCON;
1382
1383 typedef union
1384 {
1385 struct
1386 {
1387 unsigned ADFVR0 : 1;
1388 unsigned ADFVR1 : 1;
1389 unsigned CDAFVR0 : 1;
1390 unsigned CDAFVR1 : 1;
1391 unsigned TSRNG : 1;
1392 unsigned TSEN : 1;
1393 unsigned FVRRDY : 1;
1394 unsigned FVREN : 1;
1395 };
1396
1397 struct
1398 {
1399 unsigned ADFVR : 2;
1400 unsigned : 6;
1401 };
1402
1403 struct
1404 {
1405 unsigned : 2;
1406 unsigned CDAFVR : 2;
1407 unsigned : 4;
1408 };
1409 } __FVRCONbits_t;
1410
1411 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1412
1413 #define _ADFVR0 0x01
1414 #define _ADFVR1 0x02
1415 #define _CDAFVR0 0x04
1416 #define _CDAFVR1 0x08
1417 #define _TSRNG 0x10
1418 #define _TSEN 0x20
1419 #define _FVRRDY 0x40
1420 #define _FVREN 0x80
1421
1422 //==============================================================================
1423
1424
1425 //==============================================================================
1426 // DACCON0 Bits
1427
1428 extern __at(0x0118) __sfr DACCON0;
1429
1430 typedef struct
1431 {
1432 unsigned : 1;
1433 unsigned : 1;
1434 unsigned DACPSS : 1;
1435 unsigned : 1;
1436 unsigned DACOE2 : 1;
1437 unsigned DACOE1 : 1;
1438 unsigned : 1;
1439 unsigned DACEN : 1;
1440 } __DACCON0bits_t;
1441
1442 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1443
1444 #define _DACPSS 0x04
1445 #define _DACOE2 0x10
1446 #define _DACOE1 0x20
1447 #define _DACEN 0x80
1448
1449 //==============================================================================
1450
1451
1452 //==============================================================================
1453 // DACCON1 Bits
1454
1455 extern __at(0x0119) __sfr DACCON1;
1456
1457 typedef union
1458 {
1459 struct
1460 {
1461 unsigned DACR0 : 1;
1462 unsigned DACR1 : 1;
1463 unsigned DACR2 : 1;
1464 unsigned DACR3 : 1;
1465 unsigned DACR4 : 1;
1466 unsigned : 1;
1467 unsigned : 1;
1468 unsigned : 1;
1469 };
1470
1471 struct
1472 {
1473 unsigned DACR : 5;
1474 unsigned : 3;
1475 };
1476 } __DACCON1bits_t;
1477
1478 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1479
1480 #define _DACR0 0x01
1481 #define _DACR1 0x02
1482 #define _DACR2 0x04
1483 #define _DACR3 0x08
1484 #define _DACR4 0x10
1485
1486 //==============================================================================
1487
1488
1489 //==============================================================================
1490 // APFCON Bits
1491
1492 extern __at(0x011D) __sfr APFCON;
1493
1494 typedef struct
1495 {
1496 unsigned NCO1SEL : 1;
1497 unsigned CLC1SEL : 1;
1498 unsigned : 1;
1499 unsigned T1GSEL : 1;
1500 unsigned SSSEL : 1;
1501 unsigned SDOSEL : 1;
1502 unsigned : 1;
1503 unsigned : 1;
1504 } __APFCONbits_t;
1505
1506 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1507
1508 #define _NCO1SEL 0x01
1509 #define _CLC1SEL 0x02
1510 #define _T1GSEL 0x08
1511 #define _SSSEL 0x10
1512 #define _SDOSEL 0x20
1513
1514 //==============================================================================
1515
1516
1517 //==============================================================================
1518 // ANSELA Bits
1519
1520 extern __at(0x018C) __sfr ANSELA;
1521
1522 typedef struct
1523 {
1524 unsigned ANSA0 : 1;
1525 unsigned ANSA1 : 1;
1526 unsigned ANSA2 : 1;
1527 unsigned : 1;
1528 unsigned ANSA4 : 1;
1529 unsigned : 1;
1530 unsigned : 1;
1531 unsigned : 1;
1532 } __ANSELAbits_t;
1533
1534 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1535
1536 #define _ANSA0 0x01
1537 #define _ANSA1 0x02
1538 #define _ANSA2 0x04
1539 #define _ANSA4 0x10
1540
1541 //==============================================================================
1542
1543
1544 //==============================================================================
1545 // ANSELC Bits
1546
1547 extern __at(0x018E) __sfr ANSELC;
1548
1549 typedef union
1550 {
1551 struct
1552 {
1553 unsigned ANSC0 : 1;
1554 unsigned ANSC1 : 1;
1555 unsigned ANSC2 : 1;
1556 unsigned ANSC3 : 1;
1557 unsigned : 1;
1558 unsigned : 1;
1559 unsigned : 1;
1560 unsigned : 1;
1561 };
1562
1563 struct
1564 {
1565 unsigned ANSC : 4;
1566 unsigned : 4;
1567 };
1568 } __ANSELCbits_t;
1569
1570 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1571
1572 #define _ANSC0 0x01
1573 #define _ANSC1 0x02
1574 #define _ANSC2 0x04
1575 #define _ANSC3 0x08
1576
1577 //==============================================================================
1578
1579 extern __at(0x0191) __sfr PMADR;
1580 extern __at(0x0191) __sfr PMADRL;
1581 extern __at(0x0192) __sfr PMADRH;
1582 extern __at(0x0193) __sfr PMDAT;
1583 extern __at(0x0193) __sfr PMDATL;
1584 extern __at(0x0194) __sfr PMDATH;
1585
1586 //==============================================================================
1587 // PMCON1 Bits
1588
1589 extern __at(0x0195) __sfr PMCON1;
1590
1591 typedef struct
1592 {
1593 unsigned RD : 1;
1594 unsigned WR : 1;
1595 unsigned WREN : 1;
1596 unsigned WRERR : 1;
1597 unsigned FREE : 1;
1598 unsigned LWLO : 1;
1599 unsigned CFGS : 1;
1600 unsigned : 1;
1601 } __PMCON1bits_t;
1602
1603 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1604
1605 #define _RD 0x01
1606 #define _WR 0x02
1607 #define _WREN 0x04
1608 #define _WRERR 0x08
1609 #define _FREE 0x10
1610 #define _LWLO 0x20
1611 #define _CFGS 0x40
1612
1613 //==============================================================================
1614
1615 extern __at(0x0196) __sfr PMCON2;
1616
1617 //==============================================================================
1618 // WPUA Bits
1619
1620 extern __at(0x020C) __sfr WPUA;
1621
1622 typedef union
1623 {
1624 struct
1625 {
1626 unsigned WPUA0 : 1;
1627 unsigned WPUA1 : 1;
1628 unsigned WPUA2 : 1;
1629 unsigned WPUA3 : 1;
1630 unsigned WPUA4 : 1;
1631 unsigned WPUA5 : 1;
1632 unsigned : 1;
1633 unsigned : 1;
1634 };
1635
1636 struct
1637 {
1638 unsigned WPUA : 6;
1639 unsigned : 2;
1640 };
1641 } __WPUAbits_t;
1642
1643 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1644
1645 #define _WPUA0 0x01
1646 #define _WPUA1 0x02
1647 #define _WPUA2 0x04
1648 #define _WPUA3 0x08
1649 #define _WPUA4 0x10
1650 #define _WPUA5 0x20
1651
1652 //==============================================================================
1653
1654 extern __at(0x0211) __sfr SSP1BUF;
1655 extern __at(0x0211) __sfr SSPBUF;
1656 extern __at(0x0212) __sfr SSP1ADD;
1657 extern __at(0x0212) __sfr SSPADD;
1658 extern __at(0x0213) __sfr SSP1MSK;
1659 extern __at(0x0213) __sfr SSPMSK;
1660
1661 //==============================================================================
1662 // SSP1STAT Bits
1663
1664 extern __at(0x0214) __sfr SSP1STAT;
1665
1666 typedef struct
1667 {
1668 unsigned BF : 1;
1669 unsigned UA : 1;
1670 unsigned R_NOT_W : 1;
1671 unsigned S : 1;
1672 unsigned P : 1;
1673 unsigned D_NOT_A : 1;
1674 unsigned CKE : 1;
1675 unsigned SMP : 1;
1676 } __SSP1STATbits_t;
1677
1678 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
1679
1680 #define _BF 0x01
1681 #define _UA 0x02
1682 #define _R_NOT_W 0x04
1683 #define _S 0x08
1684 #define _P 0x10
1685 #define _D_NOT_A 0x20
1686 #define _CKE 0x40
1687 #define _SMP 0x80
1688
1689 //==============================================================================
1690
1691
1692 //==============================================================================
1693 // SSPSTAT Bits
1694
1695 extern __at(0x0214) __sfr SSPSTAT;
1696
1697 typedef struct
1698 {
1699 unsigned BF : 1;
1700 unsigned UA : 1;
1701 unsigned R_NOT_W : 1;
1702 unsigned S : 1;
1703 unsigned P : 1;
1704 unsigned D_NOT_A : 1;
1705 unsigned CKE : 1;
1706 unsigned SMP : 1;
1707 } __SSPSTATbits_t;
1708
1709 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
1710
1711 #define _SSPSTAT_BF 0x01
1712 #define _SSPSTAT_UA 0x02
1713 #define _SSPSTAT_R_NOT_W 0x04
1714 #define _SSPSTAT_S 0x08
1715 #define _SSPSTAT_P 0x10
1716 #define _SSPSTAT_D_NOT_A 0x20
1717 #define _SSPSTAT_CKE 0x40
1718 #define _SSPSTAT_SMP 0x80
1719
1720 //==============================================================================
1721
1722
1723 //==============================================================================
1724 // SSP1CON1 Bits
1725
1726 extern __at(0x0215) __sfr SSP1CON1;
1727
1728 typedef union
1729 {
1730 struct
1731 {
1732 unsigned SSPM0 : 1;
1733 unsigned SSPM1 : 1;
1734 unsigned SSPM2 : 1;
1735 unsigned SSPM3 : 1;
1736 unsigned CKP : 1;
1737 unsigned SSPEN : 1;
1738 unsigned SSPOV : 1;
1739 unsigned WCOL : 1;
1740 };
1741
1742 struct
1743 {
1744 unsigned SSPM : 4;
1745 unsigned : 4;
1746 };
1747 } __SSP1CON1bits_t;
1748
1749 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
1750
1751 #define _SSPM0 0x01
1752 #define _SSPM1 0x02
1753 #define _SSPM2 0x04
1754 #define _SSPM3 0x08
1755 #define _CKP 0x10
1756 #define _SSPEN 0x20
1757 #define _SSPOV 0x40
1758 #define _WCOL 0x80
1759
1760 //==============================================================================
1761
1762
1763 //==============================================================================
1764 // SSPCON Bits
1765
1766 extern __at(0x0215) __sfr SSPCON;
1767
1768 typedef union
1769 {
1770 struct
1771 {
1772 unsigned SSPM0 : 1;
1773 unsigned SSPM1 : 1;
1774 unsigned SSPM2 : 1;
1775 unsigned SSPM3 : 1;
1776 unsigned CKP : 1;
1777 unsigned SSPEN : 1;
1778 unsigned SSPOV : 1;
1779 unsigned WCOL : 1;
1780 };
1781
1782 struct
1783 {
1784 unsigned SSPM : 4;
1785 unsigned : 4;
1786 };
1787 } __SSPCONbits_t;
1788
1789 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
1790
1791 #define _SSPCON_SSPM0 0x01
1792 #define _SSPCON_SSPM1 0x02
1793 #define _SSPCON_SSPM2 0x04
1794 #define _SSPCON_SSPM3 0x08
1795 #define _SSPCON_CKP 0x10
1796 #define _SSPCON_SSPEN 0x20
1797 #define _SSPCON_SSPOV 0x40
1798 #define _SSPCON_WCOL 0x80
1799
1800 //==============================================================================
1801
1802
1803 //==============================================================================
1804 // SSPCON1 Bits
1805
1806 extern __at(0x0215) __sfr SSPCON1;
1807
1808 typedef union
1809 {
1810 struct
1811 {
1812 unsigned SSPM0 : 1;
1813 unsigned SSPM1 : 1;
1814 unsigned SSPM2 : 1;
1815 unsigned SSPM3 : 1;
1816 unsigned CKP : 1;
1817 unsigned SSPEN : 1;
1818 unsigned SSPOV : 1;
1819 unsigned WCOL : 1;
1820 };
1821
1822 struct
1823 {
1824 unsigned SSPM : 4;
1825 unsigned : 4;
1826 };
1827 } __SSPCON1bits_t;
1828
1829 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
1830
1831 #define _SSPCON1_SSPM0 0x01
1832 #define _SSPCON1_SSPM1 0x02
1833 #define _SSPCON1_SSPM2 0x04
1834 #define _SSPCON1_SSPM3 0x08
1835 #define _SSPCON1_CKP 0x10
1836 #define _SSPCON1_SSPEN 0x20
1837 #define _SSPCON1_SSPOV 0x40
1838 #define _SSPCON1_WCOL 0x80
1839
1840 //==============================================================================
1841
1842
1843 //==============================================================================
1844 // SSP1CON2 Bits
1845
1846 extern __at(0x0216) __sfr SSP1CON2;
1847
1848 typedef struct
1849 {
1850 unsigned SEN : 1;
1851 unsigned RSEN : 1;
1852 unsigned PEN : 1;
1853 unsigned RCEN : 1;
1854 unsigned ACKEN : 1;
1855 unsigned ACKDT : 1;
1856 unsigned ACKSTAT : 1;
1857 unsigned GCEN : 1;
1858 } __SSP1CON2bits_t;
1859
1860 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
1861
1862 #define _SEN 0x01
1863 #define _RSEN 0x02
1864 #define _PEN 0x04
1865 #define _RCEN 0x08
1866 #define _ACKEN 0x10
1867 #define _ACKDT 0x20
1868 #define _ACKSTAT 0x40
1869 #define _GCEN 0x80
1870
1871 //==============================================================================
1872
1873
1874 //==============================================================================
1875 // SSPCON2 Bits
1876
1877 extern __at(0x0216) __sfr SSPCON2;
1878
1879 typedef struct
1880 {
1881 unsigned SEN : 1;
1882 unsigned RSEN : 1;
1883 unsigned PEN : 1;
1884 unsigned RCEN : 1;
1885 unsigned ACKEN : 1;
1886 unsigned ACKDT : 1;
1887 unsigned ACKSTAT : 1;
1888 unsigned GCEN : 1;
1889 } __SSPCON2bits_t;
1890
1891 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
1892
1893 #define _SSPCON2_SEN 0x01
1894 #define _SSPCON2_RSEN 0x02
1895 #define _SSPCON2_PEN 0x04
1896 #define _SSPCON2_RCEN 0x08
1897 #define _SSPCON2_ACKEN 0x10
1898 #define _SSPCON2_ACKDT 0x20
1899 #define _SSPCON2_ACKSTAT 0x40
1900 #define _SSPCON2_GCEN 0x80
1901
1902 //==============================================================================
1903
1904
1905 //==============================================================================
1906 // SSP1CON3 Bits
1907
1908 extern __at(0x0217) __sfr SSP1CON3;
1909
1910 typedef struct
1911 {
1912 unsigned DHEN : 1;
1913 unsigned AHEN : 1;
1914 unsigned SBCDE : 1;
1915 unsigned SDAHT : 1;
1916 unsigned BOEN : 1;
1917 unsigned SCIE : 1;
1918 unsigned PCIE : 1;
1919 unsigned ACKTIM : 1;
1920 } __SSP1CON3bits_t;
1921
1922 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
1923
1924 #define _DHEN 0x01
1925 #define _AHEN 0x02
1926 #define _SBCDE 0x04
1927 #define _SDAHT 0x08
1928 #define _BOEN 0x10
1929 #define _SCIE 0x20
1930 #define _PCIE 0x40
1931 #define _ACKTIM 0x80
1932
1933 //==============================================================================
1934
1935
1936 //==============================================================================
1937 // SSPCON3 Bits
1938
1939 extern __at(0x0217) __sfr SSPCON3;
1940
1941 typedef struct
1942 {
1943 unsigned DHEN : 1;
1944 unsigned AHEN : 1;
1945 unsigned SBCDE : 1;
1946 unsigned SDAHT : 1;
1947 unsigned BOEN : 1;
1948 unsigned SCIE : 1;
1949 unsigned PCIE : 1;
1950 unsigned ACKTIM : 1;
1951 } __SSPCON3bits_t;
1952
1953 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
1954
1955 #define _SSPCON3_DHEN 0x01
1956 #define _SSPCON3_AHEN 0x02
1957 #define _SSPCON3_SBCDE 0x04
1958 #define _SSPCON3_SDAHT 0x08
1959 #define _SSPCON3_BOEN 0x10
1960 #define _SSPCON3_SCIE 0x20
1961 #define _SSPCON3_PCIE 0x40
1962 #define _SSPCON3_ACKTIM 0x80
1963
1964 //==============================================================================
1965
1966
1967 //==============================================================================
1968 // IOCAP Bits
1969
1970 extern __at(0x0391) __sfr IOCAP;
1971
1972 typedef union
1973 {
1974 struct
1975 {
1976 unsigned IOCAP0 : 1;
1977 unsigned IOCAP1 : 1;
1978 unsigned IOCAP2 : 1;
1979 unsigned IOCAP3 : 1;
1980 unsigned IOCAP4 : 1;
1981 unsigned IOCAP5 : 1;
1982 unsigned : 1;
1983 unsigned : 1;
1984 };
1985
1986 struct
1987 {
1988 unsigned IOCAP : 6;
1989 unsigned : 2;
1990 };
1991 } __IOCAPbits_t;
1992
1993 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
1994
1995 #define _IOCAP0 0x01
1996 #define _IOCAP1 0x02
1997 #define _IOCAP2 0x04
1998 #define _IOCAP3 0x08
1999 #define _IOCAP4 0x10
2000 #define _IOCAP5 0x20
2001
2002 //==============================================================================
2003
2004
2005 //==============================================================================
2006 // IOCAN Bits
2007
2008 extern __at(0x0392) __sfr IOCAN;
2009
2010 typedef union
2011 {
2012 struct
2013 {
2014 unsigned IOCAN0 : 1;
2015 unsigned IOCAN1 : 1;
2016 unsigned IOCAN2 : 1;
2017 unsigned IOCAN3 : 1;
2018 unsigned IOCAN4 : 1;
2019 unsigned IOCAN5 : 1;
2020 unsigned : 1;
2021 unsigned : 1;
2022 };
2023
2024 struct
2025 {
2026 unsigned IOCAN : 6;
2027 unsigned : 2;
2028 };
2029 } __IOCANbits_t;
2030
2031 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2032
2033 #define _IOCAN0 0x01
2034 #define _IOCAN1 0x02
2035 #define _IOCAN2 0x04
2036 #define _IOCAN3 0x08
2037 #define _IOCAN4 0x10
2038 #define _IOCAN5 0x20
2039
2040 //==============================================================================
2041
2042
2043 //==============================================================================
2044 // IOCAF Bits
2045
2046 extern __at(0x0393) __sfr IOCAF;
2047
2048 typedef union
2049 {
2050 struct
2051 {
2052 unsigned IOCAF0 : 1;
2053 unsigned IOCAF1 : 1;
2054 unsigned IOCAF2 : 1;
2055 unsigned IOCAF3 : 1;
2056 unsigned IOCAF4 : 1;
2057 unsigned IOCAF5 : 1;
2058 unsigned : 1;
2059 unsigned : 1;
2060 };
2061
2062 struct
2063 {
2064 unsigned IOCAF : 6;
2065 unsigned : 2;
2066 };
2067 } __IOCAFbits_t;
2068
2069 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2070
2071 #define _IOCAF0 0x01
2072 #define _IOCAF1 0x02
2073 #define _IOCAF2 0x04
2074 #define _IOCAF3 0x08
2075 #define _IOCAF4 0x10
2076 #define _IOCAF5 0x20
2077
2078 //==============================================================================
2079
2080 extern __at(0x0498) __sfr NCO1ACC;
2081
2082 //==============================================================================
2083 // NCO1ACCL Bits
2084
2085 extern __at(0x0498) __sfr NCO1ACCL;
2086
2087 typedef struct
2088 {
2089 unsigned NCO1ACC0 : 1;
2090 unsigned NCO1ACC1 : 1;
2091 unsigned NCO1ACC2 : 1;
2092 unsigned NCO1ACC3 : 1;
2093 unsigned NCO1ACC4 : 1;
2094 unsigned NCO1ACC5 : 1;
2095 unsigned NCO1ACC6 : 1;
2096 unsigned NCO1ACC7 : 1;
2097 } __NCO1ACCLbits_t;
2098
2099 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits;
2100
2101 #define _NCO1ACC0 0x01
2102 #define _NCO1ACC1 0x02
2103 #define _NCO1ACC2 0x04
2104 #define _NCO1ACC3 0x08
2105 #define _NCO1ACC4 0x10
2106 #define _NCO1ACC5 0x20
2107 #define _NCO1ACC6 0x40
2108 #define _NCO1ACC7 0x80
2109
2110 //==============================================================================
2111
2112
2113 //==============================================================================
2114 // NCO1ACCH Bits
2115
2116 extern __at(0x0499) __sfr NCO1ACCH;
2117
2118 typedef struct
2119 {
2120 unsigned NCO1ACC8 : 1;
2121 unsigned NCO1ACC9 : 1;
2122 unsigned NCO1ACC10 : 1;
2123 unsigned NCO1ACC11 : 1;
2124 unsigned NCO1ACC12 : 1;
2125 unsigned NCO1ACC13 : 1;
2126 unsigned NCO1ACC14 : 1;
2127 unsigned NCO1ACC15 : 1;
2128 } __NCO1ACCHbits_t;
2129
2130 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits;
2131
2132 #define _NCO1ACC8 0x01
2133 #define _NCO1ACC9 0x02
2134 #define _NCO1ACC10 0x04
2135 #define _NCO1ACC11 0x08
2136 #define _NCO1ACC12 0x10
2137 #define _NCO1ACC13 0x20
2138 #define _NCO1ACC14 0x40
2139 #define _NCO1ACC15 0x80
2140
2141 //==============================================================================
2142
2143
2144 //==============================================================================
2145 // NCO1ACCU Bits
2146
2147 extern __at(0x049A) __sfr NCO1ACCU;
2148
2149 typedef struct
2150 {
2151 unsigned NCO1ACC16 : 1;
2152 unsigned NCO1ACC17 : 1;
2153 unsigned NCO1ACC18 : 1;
2154 unsigned NCO1ACC19 : 1;
2155 unsigned : 1;
2156 unsigned : 1;
2157 unsigned : 1;
2158 unsigned : 1;
2159 } __NCO1ACCUbits_t;
2160
2161 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits;
2162
2163 #define _NCO1ACC16 0x01
2164 #define _NCO1ACC17 0x02
2165 #define _NCO1ACC18 0x04
2166 #define _NCO1ACC19 0x08
2167
2168 //==============================================================================
2169
2170 extern __at(0x049B) __sfr NCO1INC;
2171
2172 //==============================================================================
2173 // NCO1INCL Bits
2174
2175 extern __at(0x049B) __sfr NCO1INCL;
2176
2177 typedef struct
2178 {
2179 unsigned NCO1INC0 : 1;
2180 unsigned NCO1INC1 : 1;
2181 unsigned NCO1INC2 : 1;
2182 unsigned NCO1INC3 : 1;
2183 unsigned NCO1INC4 : 1;
2184 unsigned NCO1INC5 : 1;
2185 unsigned NCO1INC6 : 1;
2186 unsigned NCO1INC7 : 1;
2187 } __NCO1INCLbits_t;
2188
2189 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits;
2190
2191 #define _NCO1INC0 0x01
2192 #define _NCO1INC1 0x02
2193 #define _NCO1INC2 0x04
2194 #define _NCO1INC3 0x08
2195 #define _NCO1INC4 0x10
2196 #define _NCO1INC5 0x20
2197 #define _NCO1INC6 0x40
2198 #define _NCO1INC7 0x80
2199
2200 //==============================================================================
2201
2202
2203 //==============================================================================
2204 // NCO1INCH Bits
2205
2206 extern __at(0x049C) __sfr NCO1INCH;
2207
2208 typedef struct
2209 {
2210 unsigned NCO1INC8 : 1;
2211 unsigned NCO1INC9 : 1;
2212 unsigned NCO1INC10 : 1;
2213 unsigned NCO1INC11 : 1;
2214 unsigned NCO1INC12 : 1;
2215 unsigned NCO1INC13 : 1;
2216 unsigned NCO1INC14 : 1;
2217 unsigned NCO1INC15 : 1;
2218 } __NCO1INCHbits_t;
2219
2220 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits;
2221
2222 #define _NCO1INC8 0x01
2223 #define _NCO1INC9 0x02
2224 #define _NCO1INC10 0x04
2225 #define _NCO1INC11 0x08
2226 #define _NCO1INC12 0x10
2227 #define _NCO1INC13 0x20
2228 #define _NCO1INC14 0x40
2229 #define _NCO1INC15 0x80
2230
2231 //==============================================================================
2232
2233 extern __at(0x049D) __sfr NCO1INCU;
2234
2235 //==============================================================================
2236 // NCO1CON Bits
2237
2238 extern __at(0x049E) __sfr NCO1CON;
2239
2240 typedef struct
2241 {
2242 unsigned N1PFM : 1;
2243 unsigned : 1;
2244 unsigned : 1;
2245 unsigned : 1;
2246 unsigned N1POL : 1;
2247 unsigned N1OUT : 1;
2248 unsigned N1OE : 1;
2249 unsigned N1EN : 1;
2250 } __NCO1CONbits_t;
2251
2252 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits;
2253
2254 #define _N1PFM 0x01
2255 #define _N1POL 0x10
2256 #define _N1OUT 0x20
2257 #define _N1OE 0x40
2258 #define _N1EN 0x80
2259
2260 //==============================================================================
2261
2262
2263 //==============================================================================
2264 // NCO1CLK Bits
2265
2266 extern __at(0x049F) __sfr NCO1CLK;
2267
2268 typedef union
2269 {
2270 struct
2271 {
2272 unsigned N1CKS0 : 1;
2273 unsigned N1CKS1 : 1;
2274 unsigned : 1;
2275 unsigned : 1;
2276 unsigned : 1;
2277 unsigned N1PWS0 : 1;
2278 unsigned N1PWS1 : 1;
2279 unsigned N1PWS2 : 1;
2280 };
2281
2282 struct
2283 {
2284 unsigned N1CKS : 2;
2285 unsigned : 6;
2286 };
2287
2288 struct
2289 {
2290 unsigned : 5;
2291 unsigned N1PWS : 3;
2292 };
2293 } __NCO1CLKbits_t;
2294
2295 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits;
2296
2297 #define _N1CKS0 0x01
2298 #define _N1CKS1 0x02
2299 #define _N1PWS0 0x20
2300 #define _N1PWS1 0x40
2301 #define _N1PWS2 0x80
2302
2303 //==============================================================================
2304
2305
2306 //==============================================================================
2307 // PWM1DCL Bits
2308
2309 extern __at(0x0611) __sfr PWM1DCL;
2310
2311 typedef union
2312 {
2313 struct
2314 {
2315 unsigned : 1;
2316 unsigned : 1;
2317 unsigned : 1;
2318 unsigned : 1;
2319 unsigned : 1;
2320 unsigned : 1;
2321 unsigned PWM1DCL0 : 1;
2322 unsigned PWM1DCL1 : 1;
2323 };
2324
2325 struct
2326 {
2327 unsigned : 6;
2328 unsigned PWM1DCL : 2;
2329 };
2330 } __PWM1DCLbits_t;
2331
2332 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
2333
2334 #define _PWM1DCL0 0x40
2335 #define _PWM1DCL1 0x80
2336
2337 //==============================================================================
2338
2339
2340 //==============================================================================
2341 // PWM1DCH Bits
2342
2343 extern __at(0x0612) __sfr PWM1DCH;
2344
2345 typedef struct
2346 {
2347 unsigned PWM1DCH0 : 1;
2348 unsigned PWM1DCH1 : 1;
2349 unsigned PWM1DCH2 : 1;
2350 unsigned PWM1DCH3 : 1;
2351 unsigned PWM1DCH4 : 1;
2352 unsigned PWM1DCH5 : 1;
2353 unsigned PWM1DCH6 : 1;
2354 unsigned PWM1DCH7 : 1;
2355 } __PWM1DCHbits_t;
2356
2357 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
2358
2359 #define _PWM1DCH0 0x01
2360 #define _PWM1DCH1 0x02
2361 #define _PWM1DCH2 0x04
2362 #define _PWM1DCH3 0x08
2363 #define _PWM1DCH4 0x10
2364 #define _PWM1DCH5 0x20
2365 #define _PWM1DCH6 0x40
2366 #define _PWM1DCH7 0x80
2367
2368 //==============================================================================
2369
2370
2371 //==============================================================================
2372 // PWM1CON Bits
2373
2374 extern __at(0x0613) __sfr PWM1CON;
2375
2376 typedef struct
2377 {
2378 unsigned : 1;
2379 unsigned : 1;
2380 unsigned : 1;
2381 unsigned : 1;
2382 unsigned PWM1POL : 1;
2383 unsigned PWM1OUT : 1;
2384 unsigned PWM1OE : 1;
2385 unsigned PWM1EN : 1;
2386 } __PWM1CONbits_t;
2387
2388 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
2389
2390 #define _PWM1POL 0x10
2391 #define _PWM1OUT 0x20
2392 #define _PWM1OE 0x40
2393 #define _PWM1EN 0x80
2394
2395 //==============================================================================
2396
2397
2398 //==============================================================================
2399 // PWM1CON0 Bits
2400
2401 extern __at(0x0613) __sfr PWM1CON0;
2402
2403 typedef struct
2404 {
2405 unsigned : 1;
2406 unsigned : 1;
2407 unsigned : 1;
2408 unsigned : 1;
2409 unsigned PWM1POL : 1;
2410 unsigned PWM1OUT : 1;
2411 unsigned PWM1OE : 1;
2412 unsigned PWM1EN : 1;
2413 } __PWM1CON0bits_t;
2414
2415 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
2416
2417 #define _PWM1CON0_PWM1POL 0x10
2418 #define _PWM1CON0_PWM1OUT 0x20
2419 #define _PWM1CON0_PWM1OE 0x40
2420 #define _PWM1CON0_PWM1EN 0x80
2421
2422 //==============================================================================
2423
2424
2425 //==============================================================================
2426 // PWM2DCL Bits
2427
2428 extern __at(0x0614) __sfr PWM2DCL;
2429
2430 typedef union
2431 {
2432 struct
2433 {
2434 unsigned : 1;
2435 unsigned : 1;
2436 unsigned : 1;
2437 unsigned : 1;
2438 unsigned : 1;
2439 unsigned : 1;
2440 unsigned PWM2DCL0 : 1;
2441 unsigned PWM2DCL1 : 1;
2442 };
2443
2444 struct
2445 {
2446 unsigned : 6;
2447 unsigned PWM2DCL : 2;
2448 };
2449 } __PWM2DCLbits_t;
2450
2451 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
2452
2453 #define _PWM2DCL0 0x40
2454 #define _PWM2DCL1 0x80
2455
2456 //==============================================================================
2457
2458
2459 //==============================================================================
2460 // PWM2DCH Bits
2461
2462 extern __at(0x0615) __sfr PWM2DCH;
2463
2464 typedef struct
2465 {
2466 unsigned PWM2DCH0 : 1;
2467 unsigned PWM2DCH1 : 1;
2468 unsigned PWM2DCH2 : 1;
2469 unsigned PWM2DCH3 : 1;
2470 unsigned PWM2DCH4 : 1;
2471 unsigned PWM2DCH5 : 1;
2472 unsigned PWM2DCH6 : 1;
2473 unsigned PWM2DCH7 : 1;
2474 } __PWM2DCHbits_t;
2475
2476 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
2477
2478 #define _PWM2DCH0 0x01
2479 #define _PWM2DCH1 0x02
2480 #define _PWM2DCH2 0x04
2481 #define _PWM2DCH3 0x08
2482 #define _PWM2DCH4 0x10
2483 #define _PWM2DCH5 0x20
2484 #define _PWM2DCH6 0x40
2485 #define _PWM2DCH7 0x80
2486
2487 //==============================================================================
2488
2489
2490 //==============================================================================
2491 // PWM2CON Bits
2492
2493 extern __at(0x0616) __sfr PWM2CON;
2494
2495 typedef struct
2496 {
2497 unsigned : 1;
2498 unsigned : 1;
2499 unsigned : 1;
2500 unsigned : 1;
2501 unsigned PWM2POL : 1;
2502 unsigned PWM2OUT : 1;
2503 unsigned PWM2OE : 1;
2504 unsigned PWM2EN : 1;
2505 } __PWM2CONbits_t;
2506
2507 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
2508
2509 #define _PWM2POL 0x10
2510 #define _PWM2OUT 0x20
2511 #define _PWM2OE 0x40
2512 #define _PWM2EN 0x80
2513
2514 //==============================================================================
2515
2516
2517 //==============================================================================
2518 // PWM2CON0 Bits
2519
2520 extern __at(0x0616) __sfr PWM2CON0;
2521
2522 typedef struct
2523 {
2524 unsigned : 1;
2525 unsigned : 1;
2526 unsigned : 1;
2527 unsigned : 1;
2528 unsigned PWM2POL : 1;
2529 unsigned PWM2OUT : 1;
2530 unsigned PWM2OE : 1;
2531 unsigned PWM2EN : 1;
2532 } __PWM2CON0bits_t;
2533
2534 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
2535
2536 #define _PWM2CON0_PWM2POL 0x10
2537 #define _PWM2CON0_PWM2OUT 0x20
2538 #define _PWM2CON0_PWM2OE 0x40
2539 #define _PWM2CON0_PWM2EN 0x80
2540
2541 //==============================================================================
2542
2543
2544 //==============================================================================
2545 // PWM3DCL Bits
2546
2547 extern __at(0x0617) __sfr PWM3DCL;
2548
2549 typedef union
2550 {
2551 struct
2552 {
2553 unsigned : 1;
2554 unsigned : 1;
2555 unsigned : 1;
2556 unsigned : 1;
2557 unsigned : 1;
2558 unsigned : 1;
2559 unsigned PWM3DCL0 : 1;
2560 unsigned PWM3DCL1 : 1;
2561 };
2562
2563 struct
2564 {
2565 unsigned : 6;
2566 unsigned PWM3DCL : 2;
2567 };
2568 } __PWM3DCLbits_t;
2569
2570 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
2571
2572 #define _PWM3DCL0 0x40
2573 #define _PWM3DCL1 0x80
2574
2575 //==============================================================================
2576
2577
2578 //==============================================================================
2579 // PWM3DCH Bits
2580
2581 extern __at(0x0618) __sfr PWM3DCH;
2582
2583 typedef struct
2584 {
2585 unsigned PWM3DCH0 : 1;
2586 unsigned PWM3DCH1 : 1;
2587 unsigned PWM3DCH2 : 1;
2588 unsigned PWM3DCH3 : 1;
2589 unsigned PWM3DCH4 : 1;
2590 unsigned PWM3DCH5 : 1;
2591 unsigned PWM3DCH6 : 1;
2592 unsigned PWM3DCH7 : 1;
2593 } __PWM3DCHbits_t;
2594
2595 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
2596
2597 #define _PWM3DCH0 0x01
2598 #define _PWM3DCH1 0x02
2599 #define _PWM3DCH2 0x04
2600 #define _PWM3DCH3 0x08
2601 #define _PWM3DCH4 0x10
2602 #define _PWM3DCH5 0x20
2603 #define _PWM3DCH6 0x40
2604 #define _PWM3DCH7 0x80
2605
2606 //==============================================================================
2607
2608
2609 //==============================================================================
2610 // PWM3CON Bits
2611
2612 extern __at(0x0619) __sfr PWM3CON;
2613
2614 typedef struct
2615 {
2616 unsigned : 1;
2617 unsigned : 1;
2618 unsigned : 1;
2619 unsigned : 1;
2620 unsigned PWM3POL : 1;
2621 unsigned PWM3OUT : 1;
2622 unsigned PWM3OE : 1;
2623 unsigned PWM3EN : 1;
2624 } __PWM3CONbits_t;
2625
2626 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
2627
2628 #define _PWM3POL 0x10
2629 #define _PWM3OUT 0x20
2630 #define _PWM3OE 0x40
2631 #define _PWM3EN 0x80
2632
2633 //==============================================================================
2634
2635
2636 //==============================================================================
2637 // PWM3CON0 Bits
2638
2639 extern __at(0x0619) __sfr PWM3CON0;
2640
2641 typedef struct
2642 {
2643 unsigned : 1;
2644 unsigned : 1;
2645 unsigned : 1;
2646 unsigned : 1;
2647 unsigned PWM3POL : 1;
2648 unsigned PWM3OUT : 1;
2649 unsigned PWM3OE : 1;
2650 unsigned PWM3EN : 1;
2651 } __PWM3CON0bits_t;
2652
2653 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
2654
2655 #define _PWM3CON0_PWM3POL 0x10
2656 #define _PWM3CON0_PWM3OUT 0x20
2657 #define _PWM3CON0_PWM3OE 0x40
2658 #define _PWM3CON0_PWM3EN 0x80
2659
2660 //==============================================================================
2661
2662
2663 //==============================================================================
2664 // PWM4DCL Bits
2665
2666 extern __at(0x061A) __sfr PWM4DCL;
2667
2668 typedef union
2669 {
2670 struct
2671 {
2672 unsigned : 1;
2673 unsigned : 1;
2674 unsigned : 1;
2675 unsigned : 1;
2676 unsigned : 1;
2677 unsigned : 1;
2678 unsigned PWM4DCL0 : 1;
2679 unsigned PWM4DCL1 : 1;
2680 };
2681
2682 struct
2683 {
2684 unsigned : 6;
2685 unsigned PWM4DCL : 2;
2686 };
2687 } __PWM4DCLbits_t;
2688
2689 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
2690
2691 #define _PWM4DCL0 0x40
2692 #define _PWM4DCL1 0x80
2693
2694 //==============================================================================
2695
2696
2697 //==============================================================================
2698 // PWM4DCH Bits
2699
2700 extern __at(0x061B) __sfr PWM4DCH;
2701
2702 typedef struct
2703 {
2704 unsigned PWM4DCH0 : 1;
2705 unsigned PWM4DCH1 : 1;
2706 unsigned PWM4DCH2 : 1;
2707 unsigned PWM4DCH3 : 1;
2708 unsigned PWM4DCH4 : 1;
2709 unsigned PWM4DCH5 : 1;
2710 unsigned PWM4DCH6 : 1;
2711 unsigned PWM4DCH7 : 1;
2712 } __PWM4DCHbits_t;
2713
2714 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
2715
2716 #define _PWM4DCH0 0x01
2717 #define _PWM4DCH1 0x02
2718 #define _PWM4DCH2 0x04
2719 #define _PWM4DCH3 0x08
2720 #define _PWM4DCH4 0x10
2721 #define _PWM4DCH5 0x20
2722 #define _PWM4DCH6 0x40
2723 #define _PWM4DCH7 0x80
2724
2725 //==============================================================================
2726
2727
2728 //==============================================================================
2729 // PWM4CON Bits
2730
2731 extern __at(0x061C) __sfr PWM4CON;
2732
2733 typedef struct
2734 {
2735 unsigned : 1;
2736 unsigned : 1;
2737 unsigned : 1;
2738 unsigned : 1;
2739 unsigned PWM4POL : 1;
2740 unsigned PWM4OUT : 1;
2741 unsigned PWM4OE : 1;
2742 unsigned PWM4EN : 1;
2743 } __PWM4CONbits_t;
2744
2745 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
2746
2747 #define _PWM4POL 0x10
2748 #define _PWM4OUT 0x20
2749 #define _PWM4OE 0x40
2750 #define _PWM4EN 0x80
2751
2752 //==============================================================================
2753
2754
2755 //==============================================================================
2756 // PWM4CON0 Bits
2757
2758 extern __at(0x061C) __sfr PWM4CON0;
2759
2760 typedef struct
2761 {
2762 unsigned : 1;
2763 unsigned : 1;
2764 unsigned : 1;
2765 unsigned : 1;
2766 unsigned PWM4POL : 1;
2767 unsigned PWM4OUT : 1;
2768 unsigned PWM4OE : 1;
2769 unsigned PWM4EN : 1;
2770 } __PWM4CON0bits_t;
2771
2772 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
2773
2774 #define _PWM4CON0_PWM4POL 0x10
2775 #define _PWM4CON0_PWM4OUT 0x20
2776 #define _PWM4CON0_PWM4OE 0x40
2777 #define _PWM4CON0_PWM4EN 0x80
2778
2779 //==============================================================================
2780
2781
2782 //==============================================================================
2783 // CWG1DBR Bits
2784
2785 extern __at(0x0691) __sfr CWG1DBR;
2786
2787 typedef union
2788 {
2789 struct
2790 {
2791 unsigned CWG1DBR0 : 1;
2792 unsigned CWG1DBR1 : 1;
2793 unsigned CWG1DBR2 : 1;
2794 unsigned CWG1DBR3 : 1;
2795 unsigned CWG1DBR4 : 1;
2796 unsigned CWG1DBR5 : 1;
2797 unsigned : 1;
2798 unsigned : 1;
2799 };
2800
2801 struct
2802 {
2803 unsigned CWG1DBR : 6;
2804 unsigned : 2;
2805 };
2806 } __CWG1DBRbits_t;
2807
2808 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2809
2810 #define _CWG1DBR0 0x01
2811 #define _CWG1DBR1 0x02
2812 #define _CWG1DBR2 0x04
2813 #define _CWG1DBR3 0x08
2814 #define _CWG1DBR4 0x10
2815 #define _CWG1DBR5 0x20
2816
2817 //==============================================================================
2818
2819
2820 //==============================================================================
2821 // CWG1DBF Bits
2822
2823 extern __at(0x0692) __sfr CWG1DBF;
2824
2825 typedef union
2826 {
2827 struct
2828 {
2829 unsigned CWG1DBF0 : 1;
2830 unsigned CWG1DBF1 : 1;
2831 unsigned CWG1DBF2 : 1;
2832 unsigned CWG1DBF3 : 1;
2833 unsigned CWG1DBF4 : 1;
2834 unsigned CWG1DBF5 : 1;
2835 unsigned : 1;
2836 unsigned : 1;
2837 };
2838
2839 struct
2840 {
2841 unsigned CWG1DBF : 6;
2842 unsigned : 2;
2843 };
2844 } __CWG1DBFbits_t;
2845
2846 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2847
2848 #define _CWG1DBF0 0x01
2849 #define _CWG1DBF1 0x02
2850 #define _CWG1DBF2 0x04
2851 #define _CWG1DBF3 0x08
2852 #define _CWG1DBF4 0x10
2853 #define _CWG1DBF5 0x20
2854
2855 //==============================================================================
2856
2857
2858 //==============================================================================
2859 // CWG1CON0 Bits
2860
2861 extern __at(0x0693) __sfr CWG1CON0;
2862
2863 typedef struct
2864 {
2865 unsigned G1CS0 : 1;
2866 unsigned : 1;
2867 unsigned : 1;
2868 unsigned G1POLA : 1;
2869 unsigned G1POLB : 1;
2870 unsigned G1OEA : 1;
2871 unsigned G1OEB : 1;
2872 unsigned G1EN : 1;
2873 } __CWG1CON0bits_t;
2874
2875 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2876
2877 #define _G1CS0 0x01
2878 #define _G1POLA 0x08
2879 #define _G1POLB 0x10
2880 #define _G1OEA 0x20
2881 #define _G1OEB 0x40
2882 #define _G1EN 0x80
2883
2884 //==============================================================================
2885
2886
2887 //==============================================================================
2888 // CWG1CON1 Bits
2889
2890 extern __at(0x0694) __sfr CWG1CON1;
2891
2892 typedef union
2893 {
2894 struct
2895 {
2896 unsigned G1IS0 : 1;
2897 unsigned G1IS1 : 1;
2898 unsigned G1IS2 : 1;
2899 unsigned : 1;
2900 unsigned G1ASDLA0 : 1;
2901 unsigned G1ASDLA1 : 1;
2902 unsigned G1ASDLB0 : 1;
2903 unsigned G1ASDLB1 : 1;
2904 };
2905
2906 struct
2907 {
2908 unsigned G1IS : 3;
2909 unsigned : 5;
2910 };
2911
2912 struct
2913 {
2914 unsigned : 4;
2915 unsigned G1ASDLA : 2;
2916 unsigned : 2;
2917 };
2918
2919 struct
2920 {
2921 unsigned : 6;
2922 unsigned G1ASDLB : 2;
2923 };
2924 } __CWG1CON1bits_t;
2925
2926 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2927
2928 #define _G1IS0 0x01
2929 #define _G1IS1 0x02
2930 #define _G1IS2 0x04
2931 #define _G1ASDLA0 0x10
2932 #define _G1ASDLA1 0x20
2933 #define _G1ASDLB0 0x40
2934 #define _G1ASDLB1 0x80
2935
2936 //==============================================================================
2937
2938
2939 //==============================================================================
2940 // CWG1CON2 Bits
2941
2942 extern __at(0x0695) __sfr CWG1CON2;
2943
2944 typedef struct
2945 {
2946 unsigned G1ASDSCLC2 : 1;
2947 unsigned G1ASDSFLT : 1;
2948 unsigned G1ASDSC1 : 1;
2949 unsigned G1ASDSC2 : 1;
2950 unsigned : 1;
2951 unsigned : 1;
2952 unsigned G1ARSEN : 1;
2953 unsigned G1ASE : 1;
2954 } __CWG1CON2bits_t;
2955
2956 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2957
2958 #define _G1ASDSCLC2 0x01
2959 #define _G1ASDSFLT 0x02
2960 #define _G1ASDSC1 0x04
2961 #define _G1ASDSC2 0x08
2962 #define _G1ARSEN 0x40
2963 #define _G1ASE 0x80
2964
2965 //==============================================================================
2966
2967
2968 //==============================================================================
2969 // CLCDATA Bits
2970
2971 extern __at(0x0F0F) __sfr CLCDATA;
2972
2973 typedef struct
2974 {
2975 unsigned MCLC1OUT : 1;
2976 unsigned MCLC2OUT : 1;
2977 unsigned : 1;
2978 unsigned : 1;
2979 unsigned : 1;
2980 unsigned : 1;
2981 unsigned : 1;
2982 unsigned : 1;
2983 } __CLCDATAbits_t;
2984
2985 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
2986
2987 #define _MCLC1OUT 0x01
2988 #define _MCLC2OUT 0x02
2989
2990 //==============================================================================
2991
2992
2993 //==============================================================================
2994 // CLC1CON Bits
2995
2996 extern __at(0x0F10) __sfr CLC1CON;
2997
2998 typedef union
2999 {
3000 struct
3001 {
3002 unsigned LC1MODE0 : 1;
3003 unsigned LC1MODE1 : 1;
3004 unsigned LC1MODE2 : 1;
3005 unsigned LC1INTN : 1;
3006 unsigned LC1INTP : 1;
3007 unsigned LC1OUT : 1;
3008 unsigned LC1OE : 1;
3009 unsigned LC1EN : 1;
3010 };
3011
3012 struct
3013 {
3014 unsigned LCMODE0 : 1;
3015 unsigned LCMODE1 : 1;
3016 unsigned LCMODE2 : 1;
3017 unsigned LCINTN : 1;
3018 unsigned LCINTP : 1;
3019 unsigned LCOUT : 1;
3020 unsigned LCOE : 1;
3021 unsigned LCEN : 1;
3022 };
3023
3024 struct
3025 {
3026 unsigned LC1MODE : 3;
3027 unsigned : 5;
3028 };
3029
3030 struct
3031 {
3032 unsigned LCMODE : 3;
3033 unsigned : 5;
3034 };
3035 } __CLC1CONbits_t;
3036
3037 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
3038
3039 #define _LC1MODE0 0x01
3040 #define _LCMODE0 0x01
3041 #define _LC1MODE1 0x02
3042 #define _LCMODE1 0x02
3043 #define _LC1MODE2 0x04
3044 #define _LCMODE2 0x04
3045 #define _LC1INTN 0x08
3046 #define _LCINTN 0x08
3047 #define _LC1INTP 0x10
3048 #define _LCINTP 0x10
3049 #define _LC1OUT 0x20
3050 #define _LCOUT 0x20
3051 #define _LC1OE 0x40
3052 #define _LCOE 0x40
3053 #define _LC1EN 0x80
3054 #define _LCEN 0x80
3055
3056 //==============================================================================
3057
3058
3059 //==============================================================================
3060 // CLC1POL Bits
3061
3062 extern __at(0x0F11) __sfr CLC1POL;
3063
3064 typedef union
3065 {
3066 struct
3067 {
3068 unsigned LC1G1POL : 1;
3069 unsigned LC1G2POL : 1;
3070 unsigned LC1G3POL : 1;
3071 unsigned LC1G4POL : 1;
3072 unsigned : 1;
3073 unsigned : 1;
3074 unsigned : 1;
3075 unsigned LC1POL : 1;
3076 };
3077
3078 struct
3079 {
3080 unsigned G1POL : 1;
3081 unsigned G2POL : 1;
3082 unsigned G3POL : 1;
3083 unsigned G4POL : 1;
3084 unsigned : 1;
3085 unsigned : 1;
3086 unsigned : 1;
3087 unsigned POL : 1;
3088 };
3089 } __CLC1POLbits_t;
3090
3091 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
3092
3093 #define _LC1G1POL 0x01
3094 #define _G1POL 0x01
3095 #define _LC1G2POL 0x02
3096 #define _G2POL 0x02
3097 #define _LC1G3POL 0x04
3098 #define _G3POL 0x04
3099 #define _LC1G4POL 0x08
3100 #define _G4POL 0x08
3101 #define _LC1POL 0x80
3102 #define _POL 0x80
3103
3104 //==============================================================================
3105
3106
3107 //==============================================================================
3108 // CLC1SEL0 Bits
3109
3110 extern __at(0x0F12) __sfr CLC1SEL0;
3111
3112 typedef union
3113 {
3114 struct
3115 {
3116 unsigned LC1D1S0 : 1;
3117 unsigned LC1D1S1 : 1;
3118 unsigned LC1D1S2 : 1;
3119 unsigned : 1;
3120 unsigned LC1D2S0 : 1;
3121 unsigned LC1D2S1 : 1;
3122 unsigned LC1D2S2 : 1;
3123 unsigned : 1;
3124 };
3125
3126 struct
3127 {
3128 unsigned D1S0 : 1;
3129 unsigned D1S1 : 1;
3130 unsigned D1S2 : 1;
3131 unsigned : 1;
3132 unsigned D2S0 : 1;
3133 unsigned D2S1 : 1;
3134 unsigned D2S2 : 1;
3135 unsigned : 1;
3136 };
3137
3138 struct
3139 {
3140 unsigned D1S : 3;
3141 unsigned : 5;
3142 };
3143
3144 struct
3145 {
3146 unsigned LC1D1S : 3;
3147 unsigned : 5;
3148 };
3149
3150 struct
3151 {
3152 unsigned : 4;
3153 unsigned D2S : 3;
3154 unsigned : 1;
3155 };
3156
3157 struct
3158 {
3159 unsigned : 4;
3160 unsigned LC1D2S : 3;
3161 unsigned : 1;
3162 };
3163 } __CLC1SEL0bits_t;
3164
3165 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
3166
3167 #define _LC1D1S0 0x01
3168 #define _D1S0 0x01
3169 #define _LC1D1S1 0x02
3170 #define _D1S1 0x02
3171 #define _LC1D1S2 0x04
3172 #define _D1S2 0x04
3173 #define _LC1D2S0 0x10
3174 #define _D2S0 0x10
3175 #define _LC1D2S1 0x20
3176 #define _D2S1 0x20
3177 #define _LC1D2S2 0x40
3178 #define _D2S2 0x40
3179
3180 //==============================================================================
3181
3182
3183 //==============================================================================
3184 // CLC1SEL1 Bits
3185
3186 extern __at(0x0F13) __sfr CLC1SEL1;
3187
3188 typedef union
3189 {
3190 struct
3191 {
3192 unsigned LC1D3S0 : 1;
3193 unsigned LC1D3S1 : 1;
3194 unsigned LC1D3S2 : 1;
3195 unsigned : 1;
3196 unsigned LC1D4S0 : 1;
3197 unsigned LC1D4S1 : 1;
3198 unsigned LC1D4S2 : 1;
3199 unsigned : 1;
3200 };
3201
3202 struct
3203 {
3204 unsigned D3S0 : 1;
3205 unsigned D3S1 : 1;
3206 unsigned D3S2 : 1;
3207 unsigned : 1;
3208 unsigned D4S0 : 1;
3209 unsigned D4S1 : 1;
3210 unsigned D4S2 : 1;
3211 unsigned : 1;
3212 };
3213
3214 struct
3215 {
3216 unsigned LC1D3S : 3;
3217 unsigned : 5;
3218 };
3219
3220 struct
3221 {
3222 unsigned D3S : 3;
3223 unsigned : 5;
3224 };
3225
3226 struct
3227 {
3228 unsigned : 4;
3229 unsigned D4S : 3;
3230 unsigned : 1;
3231 };
3232
3233 struct
3234 {
3235 unsigned : 4;
3236 unsigned LC1D4S : 3;
3237 unsigned : 1;
3238 };
3239 } __CLC1SEL1bits_t;
3240
3241 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
3242
3243 #define _LC1D3S0 0x01
3244 #define _D3S0 0x01
3245 #define _LC1D3S1 0x02
3246 #define _D3S1 0x02
3247 #define _LC1D3S2 0x04
3248 #define _D3S2 0x04
3249 #define _LC1D4S0 0x10
3250 #define _D4S0 0x10
3251 #define _LC1D4S1 0x20
3252 #define _D4S1 0x20
3253 #define _LC1D4S2 0x40
3254 #define _D4S2 0x40
3255
3256 //==============================================================================
3257
3258
3259 //==============================================================================
3260 // CLC1GLS0 Bits
3261
3262 extern __at(0x0F14) __sfr CLC1GLS0;
3263
3264 typedef union
3265 {
3266 struct
3267 {
3268 unsigned LC1G1D1N : 1;
3269 unsigned LC1G1D1T : 1;
3270 unsigned LC1G1D2N : 1;
3271 unsigned LC1G1D2T : 1;
3272 unsigned LC1G1D3N : 1;
3273 unsigned LC1G1D3T : 1;
3274 unsigned LC1G1D4N : 1;
3275 unsigned LC1G1D4T : 1;
3276 };
3277
3278 struct
3279 {
3280 unsigned D1N : 1;
3281 unsigned D1T : 1;
3282 unsigned D2N : 1;
3283 unsigned D2T : 1;
3284 unsigned D3N : 1;
3285 unsigned D3T : 1;
3286 unsigned D4N : 1;
3287 unsigned D4T : 1;
3288 };
3289 } __CLC1GLS0bits_t;
3290
3291 extern __at(0x0F14) volatile __CLC1GLS0bits_t CLC1GLS0bits;
3292
3293 #define _LC1G1D1N 0x01
3294 #define _D1N 0x01
3295 #define _LC1G1D1T 0x02
3296 #define _D1T 0x02
3297 #define _LC1G1D2N 0x04
3298 #define _D2N 0x04
3299 #define _LC1G1D2T 0x08
3300 #define _D2T 0x08
3301 #define _LC1G1D3N 0x10
3302 #define _D3N 0x10
3303 #define _LC1G1D3T 0x20
3304 #define _D3T 0x20
3305 #define _LC1G1D4N 0x40
3306 #define _D4N 0x40
3307 #define _LC1G1D4T 0x80
3308 #define _D4T 0x80
3309
3310 //==============================================================================
3311
3312
3313 //==============================================================================
3314 // CLC1GLS1 Bits
3315
3316 extern __at(0x0F15) __sfr CLC1GLS1;
3317
3318 typedef union
3319 {
3320 struct
3321 {
3322 unsigned LC1G2D1N : 1;
3323 unsigned LC1G2D1T : 1;
3324 unsigned LC1G2D2N : 1;
3325 unsigned LC1G2D2T : 1;
3326 unsigned LC1G2D3N : 1;
3327 unsigned LC1G2D3T : 1;
3328 unsigned LC1G2D4N : 1;
3329 unsigned LC1G2D4T : 1;
3330 };
3331
3332 struct
3333 {
3334 unsigned D1N : 1;
3335 unsigned D1T : 1;
3336 unsigned D2N : 1;
3337 unsigned D2T : 1;
3338 unsigned D3N : 1;
3339 unsigned D3T : 1;
3340 unsigned D4N : 1;
3341 unsigned D4T : 1;
3342 };
3343 } __CLC1GLS1bits_t;
3344
3345 extern __at(0x0F15) volatile __CLC1GLS1bits_t CLC1GLS1bits;
3346
3347 #define _CLC1GLS1_LC1G2D1N 0x01
3348 #define _CLC1GLS1_D1N 0x01
3349 #define _CLC1GLS1_LC1G2D1T 0x02
3350 #define _CLC1GLS1_D1T 0x02
3351 #define _CLC1GLS1_LC1G2D2N 0x04
3352 #define _CLC1GLS1_D2N 0x04
3353 #define _CLC1GLS1_LC1G2D2T 0x08
3354 #define _CLC1GLS1_D2T 0x08
3355 #define _CLC1GLS1_LC1G2D3N 0x10
3356 #define _CLC1GLS1_D3N 0x10
3357 #define _CLC1GLS1_LC1G2D3T 0x20
3358 #define _CLC1GLS1_D3T 0x20
3359 #define _CLC1GLS1_LC1G2D4N 0x40
3360 #define _CLC1GLS1_D4N 0x40
3361 #define _CLC1GLS1_LC1G2D4T 0x80
3362 #define _CLC1GLS1_D4T 0x80
3363
3364 //==============================================================================
3365
3366
3367 //==============================================================================
3368 // CLC1GLS2 Bits
3369
3370 extern __at(0x0F16) __sfr CLC1GLS2;
3371
3372 typedef union
3373 {
3374 struct
3375 {
3376 unsigned LC1G3D1N : 1;
3377 unsigned LC1G3D1T : 1;
3378 unsigned LC1G3D2N : 1;
3379 unsigned LC1G3D2T : 1;
3380 unsigned LC1G3D3N : 1;
3381 unsigned LC1G3D3T : 1;
3382 unsigned LC1G3D4N : 1;
3383 unsigned LC1G3D4T : 1;
3384 };
3385
3386 struct
3387 {
3388 unsigned D1N : 1;
3389 unsigned D1T : 1;
3390 unsigned D2N : 1;
3391 unsigned D2T : 1;
3392 unsigned D3N : 1;
3393 unsigned D3T : 1;
3394 unsigned D4N : 1;
3395 unsigned D4T : 1;
3396 };
3397 } __CLC1GLS2bits_t;
3398
3399 extern __at(0x0F16) volatile __CLC1GLS2bits_t CLC1GLS2bits;
3400
3401 #define _CLC1GLS2_LC1G3D1N 0x01
3402 #define _CLC1GLS2_D1N 0x01
3403 #define _CLC1GLS2_LC1G3D1T 0x02
3404 #define _CLC1GLS2_D1T 0x02
3405 #define _CLC1GLS2_LC1G3D2N 0x04
3406 #define _CLC1GLS2_D2N 0x04
3407 #define _CLC1GLS2_LC1G3D2T 0x08
3408 #define _CLC1GLS2_D2T 0x08
3409 #define _CLC1GLS2_LC1G3D3N 0x10
3410 #define _CLC1GLS2_D3N 0x10
3411 #define _CLC1GLS2_LC1G3D3T 0x20
3412 #define _CLC1GLS2_D3T 0x20
3413 #define _CLC1GLS2_LC1G3D4N 0x40
3414 #define _CLC1GLS2_D4N 0x40
3415 #define _CLC1GLS2_LC1G3D4T 0x80
3416 #define _CLC1GLS2_D4T 0x80
3417
3418 //==============================================================================
3419
3420
3421 //==============================================================================
3422 // CLC1GLS3 Bits
3423
3424 extern __at(0x0F17) __sfr CLC1GLS3;
3425
3426 typedef union
3427 {
3428 struct
3429 {
3430 unsigned LC1G4D1N : 1;
3431 unsigned LC1G4D1T : 1;
3432 unsigned LC1G4D2N : 1;
3433 unsigned LC1G4D2T : 1;
3434 unsigned LC1G4D3N : 1;
3435 unsigned LC1G4D3T : 1;
3436 unsigned LC1G4D4N : 1;
3437 unsigned LC1G4D4T : 1;
3438 };
3439
3440 struct
3441 {
3442 unsigned G4D1N : 1;
3443 unsigned G4D1T : 1;
3444 unsigned G4D2N : 1;
3445 unsigned G4D2T : 1;
3446 unsigned G4D3N : 1;
3447 unsigned G4D3T : 1;
3448 unsigned G4D4N : 1;
3449 unsigned G4D4T : 1;
3450 };
3451 } __CLC1GLS3bits_t;
3452
3453 extern __at(0x0F17) volatile __CLC1GLS3bits_t CLC1GLS3bits;
3454
3455 #define _LC1G4D1N 0x01
3456 #define _G4D1N 0x01
3457 #define _LC1G4D1T 0x02
3458 #define _G4D1T 0x02
3459 #define _LC1G4D2N 0x04
3460 #define _G4D2N 0x04
3461 #define _LC1G4D2T 0x08
3462 #define _G4D2T 0x08
3463 #define _LC1G4D3N 0x10
3464 #define _G4D3N 0x10
3465 #define _LC1G4D3T 0x20
3466 #define _G4D3T 0x20
3467 #define _LC1G4D4N 0x40
3468 #define _G4D4N 0x40
3469 #define _LC1G4D4T 0x80
3470 #define _G4D4T 0x80
3471
3472 //==============================================================================
3473
3474
3475 //==============================================================================
3476 // CLC2CON Bits
3477
3478 extern __at(0x0F18) __sfr CLC2CON;
3479
3480 typedef union
3481 {
3482 struct
3483 {
3484 unsigned LC2MODE0 : 1;
3485 unsigned LC2MODE1 : 1;
3486 unsigned LC2MODE2 : 1;
3487 unsigned LC2INTN : 1;
3488 unsigned LC2INTP : 1;
3489 unsigned LC2OUT : 1;
3490 unsigned LC2OE : 1;
3491 unsigned LC2EN : 1;
3492 };
3493
3494 struct
3495 {
3496 unsigned LCMODE0 : 1;
3497 unsigned LCMODE1 : 1;
3498 unsigned LCMODE2 : 1;
3499 unsigned LCINTN : 1;
3500 unsigned LCINTP : 1;
3501 unsigned LCOUT : 1;
3502 unsigned LCOE : 1;
3503 unsigned LCEN : 1;
3504 };
3505
3506 struct
3507 {
3508 unsigned LCMODE : 3;
3509 unsigned : 5;
3510 };
3511
3512 struct
3513 {
3514 unsigned LC2MODE : 3;
3515 unsigned : 5;
3516 };
3517 } __CLC2CONbits_t;
3518
3519 extern __at(0x0F18) volatile __CLC2CONbits_t CLC2CONbits;
3520
3521 #define _CLC2CON_LC2MODE0 0x01
3522 #define _CLC2CON_LCMODE0 0x01
3523 #define _CLC2CON_LC2MODE1 0x02
3524 #define _CLC2CON_LCMODE1 0x02
3525 #define _CLC2CON_LC2MODE2 0x04
3526 #define _CLC2CON_LCMODE2 0x04
3527 #define _CLC2CON_LC2INTN 0x08
3528 #define _CLC2CON_LCINTN 0x08
3529 #define _CLC2CON_LC2INTP 0x10
3530 #define _CLC2CON_LCINTP 0x10
3531 #define _CLC2CON_LC2OUT 0x20
3532 #define _CLC2CON_LCOUT 0x20
3533 #define _CLC2CON_LC2OE 0x40
3534 #define _CLC2CON_LCOE 0x40
3535 #define _CLC2CON_LC2EN 0x80
3536 #define _CLC2CON_LCEN 0x80
3537
3538 //==============================================================================
3539
3540
3541 //==============================================================================
3542 // CLC2POL Bits
3543
3544 extern __at(0x0F19) __sfr CLC2POL;
3545
3546 typedef union
3547 {
3548 struct
3549 {
3550 unsigned LC2G1POL : 1;
3551 unsigned LC2G2POL : 1;
3552 unsigned LC2G3POL : 1;
3553 unsigned LC2G4POL : 1;
3554 unsigned : 1;
3555 unsigned : 1;
3556 unsigned : 1;
3557 unsigned LC2POL : 1;
3558 };
3559
3560 struct
3561 {
3562 unsigned G1POL : 1;
3563 unsigned G2POL : 1;
3564 unsigned G3POL : 1;
3565 unsigned G4POL : 1;
3566 unsigned : 1;
3567 unsigned : 1;
3568 unsigned : 1;
3569 unsigned POL : 1;
3570 };
3571 } __CLC2POLbits_t;
3572
3573 extern __at(0x0F19) volatile __CLC2POLbits_t CLC2POLbits;
3574
3575 #define _CLC2POL_LC2G1POL 0x01
3576 #define _CLC2POL_G1POL 0x01
3577 #define _CLC2POL_LC2G2POL 0x02
3578 #define _CLC2POL_G2POL 0x02
3579 #define _CLC2POL_LC2G3POL 0x04
3580 #define _CLC2POL_G3POL 0x04
3581 #define _CLC2POL_LC2G4POL 0x08
3582 #define _CLC2POL_G4POL 0x08
3583 #define _CLC2POL_LC2POL 0x80
3584 #define _CLC2POL_POL 0x80
3585
3586 //==============================================================================
3587
3588
3589 //==============================================================================
3590 // CLC2SEL0 Bits
3591
3592 extern __at(0x0F1A) __sfr CLC2SEL0;
3593
3594 typedef union
3595 {
3596 struct
3597 {
3598 unsigned LC2D1S0 : 1;
3599 unsigned LC2D1S1 : 1;
3600 unsigned LC2D1S2 : 1;
3601 unsigned : 1;
3602 unsigned LC2D2S0 : 1;
3603 unsigned LC2D2S1 : 1;
3604 unsigned LC2D2S2 : 1;
3605 unsigned : 1;
3606 };
3607
3608 struct
3609 {
3610 unsigned D1S0 : 1;
3611 unsigned D1S1 : 1;
3612 unsigned D1S2 : 1;
3613 unsigned : 1;
3614 unsigned D2S0 : 1;
3615 unsigned D2S1 : 1;
3616 unsigned D2S2 : 1;
3617 unsigned : 1;
3618 };
3619
3620 struct
3621 {
3622 unsigned D1S : 3;
3623 unsigned : 5;
3624 };
3625
3626 struct
3627 {
3628 unsigned LC2D1S : 3;
3629 unsigned : 5;
3630 };
3631
3632 struct
3633 {
3634 unsigned : 4;
3635 unsigned D2S : 3;
3636 unsigned : 1;
3637 };
3638
3639 struct
3640 {
3641 unsigned : 4;
3642 unsigned LC2D2S : 3;
3643 unsigned : 1;
3644 };
3645 } __CLC2SEL0bits_t;
3646
3647 extern __at(0x0F1A) volatile __CLC2SEL0bits_t CLC2SEL0bits;
3648
3649 #define _CLC2SEL0_LC2D1S0 0x01
3650 #define _CLC2SEL0_D1S0 0x01
3651 #define _CLC2SEL0_LC2D1S1 0x02
3652 #define _CLC2SEL0_D1S1 0x02
3653 #define _CLC2SEL0_LC2D1S2 0x04
3654 #define _CLC2SEL0_D1S2 0x04
3655 #define _CLC2SEL0_LC2D2S0 0x10
3656 #define _CLC2SEL0_D2S0 0x10
3657 #define _CLC2SEL0_LC2D2S1 0x20
3658 #define _CLC2SEL0_D2S1 0x20
3659 #define _CLC2SEL0_LC2D2S2 0x40
3660 #define _CLC2SEL0_D2S2 0x40
3661
3662 //==============================================================================
3663
3664
3665 //==============================================================================
3666 // CLC2SEL1 Bits
3667
3668 extern __at(0x0F1B) __sfr CLC2SEL1;
3669
3670 typedef union
3671 {
3672 struct
3673 {
3674 unsigned LC2D3S0 : 1;
3675 unsigned LC2D3S1 : 1;
3676 unsigned LC2D3S2 : 1;
3677 unsigned : 1;
3678 unsigned LC2D4S0 : 1;
3679 unsigned LC2D4S1 : 1;
3680 unsigned LC2D4S2 : 1;
3681 unsigned : 1;
3682 };
3683
3684 struct
3685 {
3686 unsigned D3S0 : 1;
3687 unsigned D3S1 : 1;
3688 unsigned D3S2 : 1;
3689 unsigned : 1;
3690 unsigned D4S0 : 1;
3691 unsigned D4S1 : 1;
3692 unsigned D4S2 : 1;
3693 unsigned : 1;
3694 };
3695
3696 struct
3697 {
3698 unsigned D3S : 3;
3699 unsigned : 5;
3700 };
3701
3702 struct
3703 {
3704 unsigned LC2D3S : 3;
3705 unsigned : 5;
3706 };
3707
3708 struct
3709 {
3710 unsigned : 4;
3711 unsigned D4S : 3;
3712 unsigned : 1;
3713 };
3714
3715 struct
3716 {
3717 unsigned : 4;
3718 unsigned LC2D4S : 3;
3719 unsigned : 1;
3720 };
3721 } __CLC2SEL1bits_t;
3722
3723 extern __at(0x0F1B) volatile __CLC2SEL1bits_t CLC2SEL1bits;
3724
3725 #define _CLC2SEL1_LC2D3S0 0x01
3726 #define _CLC2SEL1_D3S0 0x01
3727 #define _CLC2SEL1_LC2D3S1 0x02
3728 #define _CLC2SEL1_D3S1 0x02
3729 #define _CLC2SEL1_LC2D3S2 0x04
3730 #define _CLC2SEL1_D3S2 0x04
3731 #define _CLC2SEL1_LC2D4S0 0x10
3732 #define _CLC2SEL1_D4S0 0x10
3733 #define _CLC2SEL1_LC2D4S1 0x20
3734 #define _CLC2SEL1_D4S1 0x20
3735 #define _CLC2SEL1_LC2D4S2 0x40
3736 #define _CLC2SEL1_D4S2 0x40
3737
3738 //==============================================================================
3739
3740
3741 //==============================================================================
3742 // CLC2GLS0 Bits
3743
3744 extern __at(0x0F1C) __sfr CLC2GLS0;
3745
3746 typedef union
3747 {
3748 struct
3749 {
3750 unsigned LC2G1D1N : 1;
3751 unsigned LC2G1D1T : 1;
3752 unsigned LC2G1D2N : 1;
3753 unsigned LC2G1D2T : 1;
3754 unsigned LC2G1D3N : 1;
3755 unsigned LC2G1D3T : 1;
3756 unsigned LC2G1D4N : 1;
3757 unsigned LC2G1D4T : 1;
3758 };
3759
3760 struct
3761 {
3762 unsigned D1N : 1;
3763 unsigned D1T : 1;
3764 unsigned D2N : 1;
3765 unsigned D2T : 1;
3766 unsigned D3N : 1;
3767 unsigned D3T : 1;
3768 unsigned D4N : 1;
3769 unsigned D4T : 1;
3770 };
3771 } __CLC2GLS0bits_t;
3772
3773 extern __at(0x0F1C) volatile __CLC2GLS0bits_t CLC2GLS0bits;
3774
3775 #define _CLC2GLS0_LC2G1D1N 0x01
3776 #define _CLC2GLS0_D1N 0x01
3777 #define _CLC2GLS0_LC2G1D1T 0x02
3778 #define _CLC2GLS0_D1T 0x02
3779 #define _CLC2GLS0_LC2G1D2N 0x04
3780 #define _CLC2GLS0_D2N 0x04
3781 #define _CLC2GLS0_LC2G1D2T 0x08
3782 #define _CLC2GLS0_D2T 0x08
3783 #define _CLC2GLS0_LC2G1D3N 0x10
3784 #define _CLC2GLS0_D3N 0x10
3785 #define _CLC2GLS0_LC2G1D3T 0x20
3786 #define _CLC2GLS0_D3T 0x20
3787 #define _CLC2GLS0_LC2G1D4N 0x40
3788 #define _CLC2GLS0_D4N 0x40
3789 #define _CLC2GLS0_LC2G1D4T 0x80
3790 #define _CLC2GLS0_D4T 0x80
3791
3792 //==============================================================================
3793
3794
3795 //==============================================================================
3796 // CLC2GLS1 Bits
3797
3798 extern __at(0x0F1D) __sfr CLC2GLS1;
3799
3800 typedef union
3801 {
3802 struct
3803 {
3804 unsigned LC2G2D1N : 1;
3805 unsigned LC2G2D1T : 1;
3806 unsigned LC2G2D2N : 1;
3807 unsigned LC2G2D2T : 1;
3808 unsigned LC2G2D3N : 1;
3809 unsigned LC2G2D3T : 1;
3810 unsigned LC2G2D4N : 1;
3811 unsigned LC2G2D4T : 1;
3812 };
3813
3814 struct
3815 {
3816 unsigned D1N : 1;
3817 unsigned D1T : 1;
3818 unsigned D2N : 1;
3819 unsigned D2T : 1;
3820 unsigned D3N : 1;
3821 unsigned D3T : 1;
3822 unsigned D4N : 1;
3823 unsigned D4T : 1;
3824 };
3825 } __CLC2GLS1bits_t;
3826
3827 extern __at(0x0F1D) volatile __CLC2GLS1bits_t CLC2GLS1bits;
3828
3829 #define _CLC2GLS1_LC2G2D1N 0x01
3830 #define _CLC2GLS1_D1N 0x01
3831 #define _CLC2GLS1_LC2G2D1T 0x02
3832 #define _CLC2GLS1_D1T 0x02
3833 #define _CLC2GLS1_LC2G2D2N 0x04
3834 #define _CLC2GLS1_D2N 0x04
3835 #define _CLC2GLS1_LC2G2D2T 0x08
3836 #define _CLC2GLS1_D2T 0x08
3837 #define _CLC2GLS1_LC2G2D3N 0x10
3838 #define _CLC2GLS1_D3N 0x10
3839 #define _CLC2GLS1_LC2G2D3T 0x20
3840 #define _CLC2GLS1_D3T 0x20
3841 #define _CLC2GLS1_LC2G2D4N 0x40
3842 #define _CLC2GLS1_D4N 0x40
3843 #define _CLC2GLS1_LC2G2D4T 0x80
3844 #define _CLC2GLS1_D4T 0x80
3845
3846 //==============================================================================
3847
3848
3849 //==============================================================================
3850 // CLC2GLS2 Bits
3851
3852 extern __at(0x0F1E) __sfr CLC2GLS2;
3853
3854 typedef union
3855 {
3856 struct
3857 {
3858 unsigned LC2G3D1N : 1;
3859 unsigned LC2G3D1T : 1;
3860 unsigned LC2G3D2N : 1;
3861 unsigned LC2G3D2T : 1;
3862 unsigned LC2G3D3N : 1;
3863 unsigned LC2G3D3T : 1;
3864 unsigned LC2G3D4N : 1;
3865 unsigned LC2G3D4T : 1;
3866 };
3867
3868 struct
3869 {
3870 unsigned D1N : 1;
3871 unsigned D1T : 1;
3872 unsigned D2N : 1;
3873 unsigned D2T : 1;
3874 unsigned D3N : 1;
3875 unsigned D3T : 1;
3876 unsigned D4N : 1;
3877 unsigned D4T : 1;
3878 };
3879 } __CLC2GLS2bits_t;
3880
3881 extern __at(0x0F1E) volatile __CLC2GLS2bits_t CLC2GLS2bits;
3882
3883 #define _CLC2GLS2_LC2G3D1N 0x01
3884 #define _CLC2GLS2_D1N 0x01
3885 #define _CLC2GLS2_LC2G3D1T 0x02
3886 #define _CLC2GLS2_D1T 0x02
3887 #define _CLC2GLS2_LC2G3D2N 0x04
3888 #define _CLC2GLS2_D2N 0x04
3889 #define _CLC2GLS2_LC2G3D2T 0x08
3890 #define _CLC2GLS2_D2T 0x08
3891 #define _CLC2GLS2_LC2G3D3N 0x10
3892 #define _CLC2GLS2_D3N 0x10
3893 #define _CLC2GLS2_LC2G3D3T 0x20
3894 #define _CLC2GLS2_D3T 0x20
3895 #define _CLC2GLS2_LC2G3D4N 0x40
3896 #define _CLC2GLS2_D4N 0x40
3897 #define _CLC2GLS2_LC2G3D4T 0x80
3898 #define _CLC2GLS2_D4T 0x80
3899
3900 //==============================================================================
3901
3902
3903 //==============================================================================
3904 // CLC2GLS3 Bits
3905
3906 extern __at(0x0F1F) __sfr CLC2GLS3;
3907
3908 typedef union
3909 {
3910 struct
3911 {
3912 unsigned LC2G4D1N : 1;
3913 unsigned LC2G4D1T : 1;
3914 unsigned LC2G4D2N : 1;
3915 unsigned LC2G4D2T : 1;
3916 unsigned LC2G4D3N : 1;
3917 unsigned LC2G4D3T : 1;
3918 unsigned LC2G4D4N : 1;
3919 unsigned LC2G4D4T : 1;
3920 };
3921
3922 struct
3923 {
3924 unsigned G4D1N : 1;
3925 unsigned G4D1T : 1;
3926 unsigned G4D2N : 1;
3927 unsigned G4D2T : 1;
3928 unsigned G4D3N : 1;
3929 unsigned G4D3T : 1;
3930 unsigned G4D4N : 1;
3931 unsigned G4D4T : 1;
3932 };
3933 } __CLC2GLS3bits_t;
3934
3935 extern __at(0x0F1F) volatile __CLC2GLS3bits_t CLC2GLS3bits;
3936
3937 #define _CLC2GLS3_LC2G4D1N 0x01
3938 #define _CLC2GLS3_G4D1N 0x01
3939 #define _CLC2GLS3_LC2G4D1T 0x02
3940 #define _CLC2GLS3_G4D1T 0x02
3941 #define _CLC2GLS3_LC2G4D2N 0x04
3942 #define _CLC2GLS3_G4D2N 0x04
3943 #define _CLC2GLS3_LC2G4D2T 0x08
3944 #define _CLC2GLS3_G4D2T 0x08
3945 #define _CLC2GLS3_LC2G4D3N 0x10
3946 #define _CLC2GLS3_G4D3N 0x10
3947 #define _CLC2GLS3_LC2G4D3T 0x20
3948 #define _CLC2GLS3_G4D3T 0x20
3949 #define _CLC2GLS3_LC2G4D4N 0x40
3950 #define _CLC2GLS3_G4D4N 0x40
3951 #define _CLC2GLS3_LC2G4D4T 0x80
3952 #define _CLC2GLS3_G4D4T 0x80
3953
3954 //==============================================================================
3955
3956 extern __at(0x0FE3) __sfr BSR_ICDSHAD;
3957
3958 //==============================================================================
3959 // STATUS_SHAD Bits
3960
3961 extern __at(0x0FE4) __sfr STATUS_SHAD;
3962
3963 typedef struct
3964 {
3965 unsigned C_SHAD : 1;
3966 unsigned DC_SHAD : 1;
3967 unsigned Z_SHAD : 1;
3968 unsigned : 1;
3969 unsigned : 1;
3970 unsigned : 1;
3971 unsigned : 1;
3972 unsigned : 1;
3973 } __STATUS_SHADbits_t;
3974
3975 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
3976
3977 #define _C_SHAD 0x01
3978 #define _DC_SHAD 0x02
3979 #define _Z_SHAD 0x04
3980
3981 //==============================================================================
3982
3983 extern __at(0x0FE5) __sfr WREG_SHAD;
3984 extern __at(0x0FE6) __sfr BSR_SHAD;
3985 extern __at(0x0FE7) __sfr PCLATH_SHAD;
3986 extern __at(0x0FE8) __sfr FSR0L_SHAD;
3987 extern __at(0x0FE9) __sfr FSR0H_SHAD;
3988 extern __at(0x0FEA) __sfr FSR1L_SHAD;
3989 extern __at(0x0FEB) __sfr FSR1H_SHAD;
3990 extern __at(0x0FED) __sfr STKPTR;
3991 extern __at(0x0FEE) __sfr TOSL;
3992 extern __at(0x0FEF) __sfr TOSH;
3993
3994 //==============================================================================
3995 //
3996 // Configuration Bits
3997 //
3998 //==============================================================================
3999
4000 #define _CONFIG1 0x8007
4001 #define _CONFIG2 0x8008
4002
4003 //----------------------------- CONFIG1 Options -------------------------------
4004
4005 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
4006 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin.
4007 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin.
4008 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin.
4009 #define _WDTE_OFF 0x3FE7 // WDT disabled.
4010 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
4011 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
4012 #define _WDTE_ON 0x3FFF // WDT enabled.
4013 #define _PWRTE_ON 0x3FDF // PWRT enabled.
4014 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
4015 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
4016 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
4017 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
4018 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
4019 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
4020 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
4021 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
4022 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
4023 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
4024 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
4025
4026 //----------------------------- CONFIG2 Options -------------------------------
4027
4028 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
4029 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
4030 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
4031 #define _WRT_OFF 0x3FFF // Write protection off.
4032 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
4033 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
4034 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
4035 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
4036 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
4037 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
4038 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
4039 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
4040
4041 //==============================================================================
4042
4043 #define _DEVID1 0x8006
4044
4045 #define _IDLOC0 0x8000
4046 #define _IDLOC1 0x8001
4047 #define _IDLOC2 0x8002
4048 #define _IDLOC3 0x8003
4049
4050 //==============================================================================
4051
4052 #ifndef NO_BIT_DEFINES
4053
4054 #define ADON ADCON0bits.ADON // bit 0
4055 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
4056 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
4057 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
4058 #define CHS0 ADCON0bits.CHS0 // bit 2
4059 #define CHS1 ADCON0bits.CHS1 // bit 3
4060 #define CHS2 ADCON0bits.CHS2 // bit 4
4061 #define CHS3 ADCON0bits.CHS3 // bit 5
4062 #define CHS4 ADCON0bits.CHS4 // bit 6
4063
4064 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
4065 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
4066 #define ADCS0 ADCON1bits.ADCS0 // bit 4
4067 #define ADCS1 ADCON1bits.ADCS1 // bit 5
4068 #define ADCS2 ADCON1bits.ADCS2 // bit 6
4069 #define ADFM ADCON1bits.ADFM // bit 7
4070
4071 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
4072 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
4073 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
4074 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
4075
4076 #define ANSA0 ANSELAbits.ANSA0 // bit 0
4077 #define ANSA1 ANSELAbits.ANSA1 // bit 1
4078 #define ANSA2 ANSELAbits.ANSA2 // bit 2
4079 #define ANSA4 ANSELAbits.ANSA4 // bit 4
4080
4081 #define ANSC0 ANSELCbits.ANSC0 // bit 0
4082 #define ANSC1 ANSELCbits.ANSC1 // bit 1
4083 #define ANSC2 ANSELCbits.ANSC2 // bit 2
4084 #define ANSC3 ANSELCbits.ANSC3 // bit 3
4085
4086 #define NCO1SEL APFCONbits.NCO1SEL // bit 0
4087 #define CLC1SEL APFCONbits.CLC1SEL // bit 1
4088 #define T1GSEL APFCONbits.T1GSEL // bit 3
4089 #define SSSEL APFCONbits.SSSEL // bit 4
4090 #define SDOSEL APFCONbits.SDOSEL // bit 5
4091
4092 #define BORRDY BORCONbits.BORRDY // bit 0
4093 #define BORFS BORCONbits.BORFS // bit 6
4094 #define SBOREN BORCONbits.SBOREN // bit 7
4095
4096 #define BSR0 BSRbits.BSR0 // bit 0
4097 #define BSR1 BSRbits.BSR1 // bit 1
4098 #define BSR2 BSRbits.BSR2 // bit 2
4099 #define BSR3 BSRbits.BSR3 // bit 3
4100 #define BSR4 BSRbits.BSR4 // bit 4
4101
4102 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
4103 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits
4104 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
4105 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits
4106 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
4107 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits
4108 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
4109 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits
4110 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
4111 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits
4112 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
4113 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits
4114 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits
4115 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits
4116 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
4117 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits
4118
4119 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
4120 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
4121 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
4122 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
4123 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
4124 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
4125 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
4126 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
4127 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
4128 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
4129 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
4130 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
4131 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
4132 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
4133 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
4134 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
4135
4136 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
4137 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
4138 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
4139 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
4140 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
4141 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
4142 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
4143 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
4144 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
4145 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
4146 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
4147 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
4148 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
4149 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
4150 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
4151 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
4152
4153 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
4154 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
4155 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
4156 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
4157 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
4158 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
4159 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
4160 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
4161 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
4162 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
4163
4164 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
4165 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
4166 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
4167 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
4168 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
4169 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
4170 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits
4171 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits
4172 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits
4173 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits
4174 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits
4175 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits
4176
4177 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits
4178 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits
4179 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits
4180 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits
4181 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits
4182 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits
4183 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits
4184 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits
4185 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits
4186 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits
4187 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits
4188 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits
4189
4190 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
4191 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
4192
4193 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
4194 #define C1HYS CM1CON0bits.C1HYS // bit 1
4195 #define C1SP CM1CON0bits.C1SP // bit 2
4196 #define C1POL CM1CON0bits.C1POL // bit 4
4197 #define C1OE CM1CON0bits.C1OE // bit 5
4198 #define C1OUT CM1CON0bits.C1OUT // bit 6
4199 #define C1ON CM1CON0bits.C1ON // bit 7
4200
4201 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
4202 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
4203 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
4204 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
4205 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
4206 #define C1INTN CM1CON1bits.C1INTN // bit 6
4207 #define C1INTP CM1CON1bits.C1INTP // bit 7
4208
4209 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
4210 #define C2HYS CM2CON0bits.C2HYS // bit 1
4211 #define C2SP CM2CON0bits.C2SP // bit 2
4212 #define C2POL CM2CON0bits.C2POL // bit 4
4213 #define C2OE CM2CON0bits.C2OE // bit 5
4214 #define C2OUT CM2CON0bits.C2OUT // bit 6
4215 #define C2ON CM2CON0bits.C2ON // bit 7
4216
4217 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
4218 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
4219 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
4220 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
4221 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
4222 #define C2INTN CM2CON1bits.C2INTN // bit 6
4223 #define C2INTP CM2CON1bits.C2INTP // bit 7
4224
4225 #define MC1OUT CMOUTbits.MC1OUT // bit 0
4226 #define MC2OUT CMOUTbits.MC2OUT // bit 1
4227
4228 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
4229 #define G1POLA CWG1CON0bits.G1POLA // bit 3
4230 #define G1POLB CWG1CON0bits.G1POLB // bit 4
4231 #define G1OEA CWG1CON0bits.G1OEA // bit 5
4232 #define G1OEB CWG1CON0bits.G1OEB // bit 6
4233 #define G1EN CWG1CON0bits.G1EN // bit 7
4234
4235 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
4236 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
4237 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
4238 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
4239 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
4240 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
4241 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
4242
4243 #define G1ASDSCLC2 CWG1CON2bits.G1ASDSCLC2 // bit 0
4244 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
4245 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
4246 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
4247 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
4248 #define G1ASE CWG1CON2bits.G1ASE // bit 7
4249
4250 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
4251 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
4252 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
4253 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
4254 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
4255 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
4256
4257 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
4258 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
4259 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
4260 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
4261 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
4262 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
4263
4264 #define DACPSS DACCON0bits.DACPSS // bit 2
4265 #define DACOE2 DACCON0bits.DACOE2 // bit 4
4266 #define DACOE1 DACCON0bits.DACOE1 // bit 5
4267 #define DACEN DACCON0bits.DACEN // bit 7
4268
4269 #define DACR0 DACCON1bits.DACR0 // bit 0
4270 #define DACR1 DACCON1bits.DACR1 // bit 1
4271 #define DACR2 DACCON1bits.DACR2 // bit 2
4272 #define DACR3 DACCON1bits.DACR3 // bit 3
4273 #define DACR4 DACCON1bits.DACR4 // bit 4
4274
4275 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
4276 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
4277 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
4278 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
4279 #define TSRNG FVRCONbits.TSRNG // bit 4
4280 #define TSEN FVRCONbits.TSEN // bit 5
4281 #define FVRRDY FVRCONbits.FVRRDY // bit 6
4282 #define FVREN FVRCONbits.FVREN // bit 7
4283
4284 #define IOCIF INTCONbits.IOCIF // bit 0
4285 #define INTF INTCONbits.INTF // bit 1
4286 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
4287 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
4288 #define IOCIE INTCONbits.IOCIE // bit 3
4289 #define INTE INTCONbits.INTE // bit 4
4290 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
4291 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
4292 #define PEIE INTCONbits.PEIE // bit 6
4293 #define GIE INTCONbits.GIE // bit 7
4294
4295 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
4296 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
4297 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
4298 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
4299 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
4300 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
4301
4302 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
4303 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
4304 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
4305 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
4306 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
4307 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
4308
4309 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
4310 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
4311 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
4312 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
4313 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
4314 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
4315
4316 #define LATA0 LATAbits.LATA0 // bit 0
4317 #define LATA1 LATAbits.LATA1 // bit 1
4318 #define LATA2 LATAbits.LATA2 // bit 2
4319 #define LATA4 LATAbits.LATA4 // bit 4
4320 #define LATA5 LATAbits.LATA5 // bit 5
4321
4322 #define LATC0 LATCbits.LATC0 // bit 0
4323 #define LATC1 LATCbits.LATC1 // bit 1
4324 #define LATC2 LATCbits.LATC2 // bit 2
4325 #define LATC3 LATCbits.LATC3 // bit 3
4326 #define LATC4 LATCbits.LATC4 // bit 4
4327 #define LATC5 LATCbits.LATC5 // bit 5
4328
4329 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
4330 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
4331 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
4332 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
4333 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
4334 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
4335 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
4336 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
4337
4338 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
4339 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
4340 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
4341 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
4342 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
4343 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
4344 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
4345 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
4346
4347 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
4348 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
4349 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
4350 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
4351
4352 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
4353 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
4354 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
4355 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
4356 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
4357
4358 #define N1PFM NCO1CONbits.N1PFM // bit 0
4359 #define N1POL NCO1CONbits.N1POL // bit 4
4360 #define N1OUT NCO1CONbits.N1OUT // bit 5
4361 #define N1OE NCO1CONbits.N1OE // bit 6
4362 #define N1EN NCO1CONbits.N1EN // bit 7
4363
4364 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
4365 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
4366 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
4367 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
4368 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
4369 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
4370 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
4371 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
4372
4373 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
4374 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
4375 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
4376 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
4377 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
4378 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
4379 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
4380 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
4381
4382 #define PS0 OPTION_REGbits.PS0 // bit 0
4383 #define PS1 OPTION_REGbits.PS1 // bit 1
4384 #define PS2 OPTION_REGbits.PS2 // bit 2
4385 #define PSA OPTION_REGbits.PSA // bit 3
4386 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
4387 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
4388 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
4389 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
4390 #define INTEDG OPTION_REGbits.INTEDG // bit 6
4391 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
4392
4393 #define SCS0 OSCCONbits.SCS0 // bit 0
4394 #define SCS1 OSCCONbits.SCS1 // bit 1
4395 #define IRCF0 OSCCONbits.IRCF0 // bit 3
4396 #define IRCF1 OSCCONbits.IRCF1 // bit 4
4397 #define IRCF2 OSCCONbits.IRCF2 // bit 5
4398 #define IRCF3 OSCCONbits.IRCF3 // bit 6
4399
4400 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
4401 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
4402 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
4403
4404 #define NOT_BOR PCONbits.NOT_BOR // bit 0
4405 #define NOT_POR PCONbits.NOT_POR // bit 1
4406 #define NOT_RI PCONbits.NOT_RI // bit 2
4407 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
4408 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
4409 #define STKUNF PCONbits.STKUNF // bit 6
4410 #define STKOVF PCONbits.STKOVF // bit 7
4411
4412 #define TMR1IE PIE1bits.TMR1IE // bit 0
4413 #define TMR2IE PIE1bits.TMR2IE // bit 1
4414 #define SSP1IE PIE1bits.SSP1IE // bit 3
4415 #define ADIE PIE1bits.ADIE // bit 6
4416 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
4417
4418 #define NCO1IE PIE2bits.NCO1IE // bit 2
4419 #define BCL1IE PIE2bits.BCL1IE // bit 3
4420 #define C1IE PIE2bits.C1IE // bit 5
4421 #define C2IE PIE2bits.C2IE // bit 6
4422
4423 #define CLC1IE PIE3bits.CLC1IE // bit 0
4424 #define CLC2IE PIE3bits.CLC2IE // bit 1
4425
4426 #define TMR1IF PIR1bits.TMR1IF // bit 0
4427 #define TMR2IF PIR1bits.TMR2IF // bit 1
4428 #define SSP1IF PIR1bits.SSP1IF // bit 3
4429 #define ADIF PIR1bits.ADIF // bit 6
4430 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
4431
4432 #define NCO1IF PIR2bits.NCO1IF // bit 2
4433 #define BCL1IF PIR2bits.BCL1IF // bit 3
4434 #define C1IF PIR2bits.C1IF // bit 5
4435 #define C2IF PIR2bits.C2IF // bit 6
4436
4437 #define CLC1IF PIR3bits.CLC1IF // bit 0
4438 #define CLC2IF PIR3bits.CLC2IF // bit 1
4439
4440 #define RD PMCON1bits.RD // bit 0
4441 #define WR PMCON1bits.WR // bit 1
4442 #define WREN PMCON1bits.WREN // bit 2
4443 #define WRERR PMCON1bits.WRERR // bit 3
4444 #define FREE PMCON1bits.FREE // bit 4
4445 #define LWLO PMCON1bits.LWLO // bit 5
4446 #define CFGS PMCON1bits.CFGS // bit 6
4447
4448 #define RA0 PORTAbits.RA0 // bit 0
4449 #define RA1 PORTAbits.RA1 // bit 1
4450 #define RA2 PORTAbits.RA2 // bit 2
4451 #define RA3 PORTAbits.RA3 // bit 3
4452 #define RA4 PORTAbits.RA4 // bit 4
4453 #define RA5 PORTAbits.RA5 // bit 5
4454
4455 #define RC0 PORTCbits.RC0 // bit 0
4456 #define RC1 PORTCbits.RC1 // bit 1
4457 #define RC2 PORTCbits.RC2 // bit 2
4458 #define RC3 PORTCbits.RC3 // bit 3
4459 #define RC4 PORTCbits.RC4 // bit 4
4460 #define RC5 PORTCbits.RC5 // bit 5
4461
4462 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
4463 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
4464 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
4465 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
4466
4467 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
4468 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
4469 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
4470 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
4471 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
4472 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
4473 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
4474 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
4475
4476 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
4477 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
4478
4479 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
4480 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
4481 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
4482 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
4483
4484 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
4485 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
4486 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
4487 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
4488 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
4489 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
4490 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
4491 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
4492
4493 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
4494 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
4495
4496 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
4497 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
4498 #define PWM3OE PWM3CONbits.PWM3OE // bit 6
4499 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
4500
4501 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
4502 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
4503 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
4504 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
4505 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
4506 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
4507 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
4508 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
4509
4510 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
4511 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
4512
4513 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
4514 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
4515 #define PWM4OE PWM4CONbits.PWM4OE // bit 6
4516 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
4517
4518 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
4519 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
4520 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
4521 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
4522 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
4523 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
4524 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
4525 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
4526
4527 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
4528 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
4529
4530 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
4531 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
4532 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
4533 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
4534 #define CKP SSP1CON1bits.CKP // bit 4
4535 #define SSPEN SSP1CON1bits.SSPEN // bit 5
4536 #define SSPOV SSP1CON1bits.SSPOV // bit 6
4537 #define WCOL SSP1CON1bits.WCOL // bit 7
4538
4539 #define SEN SSP1CON2bits.SEN // bit 0
4540 #define RSEN SSP1CON2bits.RSEN // bit 1
4541 #define PEN SSP1CON2bits.PEN // bit 2
4542 #define RCEN SSP1CON2bits.RCEN // bit 3
4543 #define ACKEN SSP1CON2bits.ACKEN // bit 4
4544 #define ACKDT SSP1CON2bits.ACKDT // bit 5
4545 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
4546 #define GCEN SSP1CON2bits.GCEN // bit 7
4547
4548 #define DHEN SSP1CON3bits.DHEN // bit 0
4549 #define AHEN SSP1CON3bits.AHEN // bit 1
4550 #define SBCDE SSP1CON3bits.SBCDE // bit 2
4551 #define SDAHT SSP1CON3bits.SDAHT // bit 3
4552 #define BOEN SSP1CON3bits.BOEN // bit 4
4553 #define SCIE SSP1CON3bits.SCIE // bit 5
4554 #define PCIE SSP1CON3bits.PCIE // bit 6
4555 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
4556
4557 #define BF SSP1STATbits.BF // bit 0
4558 #define UA SSP1STATbits.UA // bit 1
4559 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
4560 #define S SSP1STATbits.S // bit 3
4561 #define P SSP1STATbits.P // bit 4
4562 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
4563 #define CKE SSP1STATbits.CKE // bit 6
4564 #define SMP SSP1STATbits.SMP // bit 7
4565
4566 #define C STATUSbits.C // bit 0
4567 #define DC STATUSbits.DC // bit 1
4568 #define Z STATUSbits.Z // bit 2
4569 #define NOT_PD STATUSbits.NOT_PD // bit 3
4570 #define NOT_TO STATUSbits.NOT_TO // bit 4
4571
4572 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
4573 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
4574 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
4575
4576 #define TMR1ON T1CONbits.TMR1ON // bit 0
4577 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
4578 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
4579 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
4580 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
4581 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
4582 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
4583
4584 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
4585 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
4586 #define T1GVAL T1GCONbits.T1GVAL // bit 2
4587 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
4588 #define T1GSPM T1GCONbits.T1GSPM // bit 4
4589 #define T1GTM T1GCONbits.T1GTM // bit 5
4590 #define T1GPOL T1GCONbits.T1GPOL // bit 6
4591 #define TMR1GE T1GCONbits.TMR1GE // bit 7
4592
4593 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
4594 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
4595 #define TMR2ON T2CONbits.TMR2ON // bit 2
4596 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
4597 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
4598 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
4599 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
4600
4601 #define TRISA0 TRISAbits.TRISA0 // bit 0
4602 #define TRISA1 TRISAbits.TRISA1 // bit 1
4603 #define TRISA2 TRISAbits.TRISA2 // bit 2
4604 #define TRISA3 TRISAbits.TRISA3 // bit 3
4605 #define TRISA4 TRISAbits.TRISA4 // bit 4
4606 #define TRISA5 TRISAbits.TRISA5 // bit 5
4607
4608 #define TRISC0 TRISCbits.TRISC0 // bit 0
4609 #define TRISC1 TRISCbits.TRISC1 // bit 1
4610 #define TRISC2 TRISCbits.TRISC2 // bit 2
4611 #define TRISC3 TRISCbits.TRISC3 // bit 3
4612 #define TRISC4 TRISCbits.TRISC4 // bit 4
4613 #define TRISC5 TRISCbits.TRISC5 // bit 5
4614
4615 #define SWDTEN WDTCONbits.SWDTEN // bit 0
4616 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
4617 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
4618 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
4619 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
4620 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
4621
4622 #define WPUA0 WPUAbits.WPUA0 // bit 0
4623 #define WPUA1 WPUAbits.WPUA1 // bit 1
4624 #define WPUA2 WPUAbits.WPUA2 // bit 2
4625 #define WPUA3 WPUAbits.WPUA3 // bit 3
4626 #define WPUA4 WPUAbits.WPUA4 // bit 4
4627 #define WPUA5 WPUAbits.WPUA5 // bit 5
4628
4629 #endif // #ifndef NO_BIT_DEFINES
4630
4631 #endif // #ifndef __PIC16LF1503_H__
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