?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16lf1508.h
blobf613316608e9b16c298575d75114a0b95bc0e59d
1 /*
2 * This declarations of the PIC16LF1508 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:06 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16LF1508_H__
26 #define __PIC16LF1508_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PIR1_ADDR 0x0011
54 #define PIR2_ADDR 0x0012
55 #define PIR3_ADDR 0x0013
56 #define TMR0_ADDR 0x0015
57 #define TMR1_ADDR 0x0016
58 #define TMR1L_ADDR 0x0016
59 #define TMR1H_ADDR 0x0017
60 #define T1CON_ADDR 0x0018
61 #define T1GCON_ADDR 0x0019
62 #define TMR2_ADDR 0x001A
63 #define PR2_ADDR 0x001B
64 #define T2CON_ADDR 0x001C
65 #define TRISA_ADDR 0x008C
66 #define TRISB_ADDR 0x008D
67 #define TRISC_ADDR 0x008E
68 #define PIE1_ADDR 0x0091
69 #define PIE2_ADDR 0x0092
70 #define PIE3_ADDR 0x0093
71 #define OPTION_REG_ADDR 0x0095
72 #define PCON_ADDR 0x0096
73 #define WDTCON_ADDR 0x0097
74 #define OSCCON_ADDR 0x0099
75 #define OSCSTAT_ADDR 0x009A
76 #define ADRES_ADDR 0x009B
77 #define ADRESL_ADDR 0x009B
78 #define ADRESH_ADDR 0x009C
79 #define ADCON0_ADDR 0x009D
80 #define ADCON1_ADDR 0x009E
81 #define ADCON2_ADDR 0x009F
82 #define LATA_ADDR 0x010C
83 #define LATB_ADDR 0x010D
84 #define LATC_ADDR 0x010E
85 #define CM1CON0_ADDR 0x0111
86 #define CM1CON1_ADDR 0x0112
87 #define CM2CON0_ADDR 0x0113
88 #define CM2CON1_ADDR 0x0114
89 #define CMOUT_ADDR 0x0115
90 #define BORCON_ADDR 0x0116
91 #define FVRCON_ADDR 0x0117
92 #define DACCON0_ADDR 0x0118
93 #define DACCON1_ADDR 0x0119
94 #define APFCON_ADDR 0x011D
95 #define ANSELA_ADDR 0x018C
96 #define ANSELB_ADDR 0x018D
97 #define ANSELC_ADDR 0x018E
98 #define PMADR_ADDR 0x0191
99 #define PMADRL_ADDR 0x0191
100 #define PMADRH_ADDR 0x0192
101 #define PMDAT_ADDR 0x0193
102 #define PMDATL_ADDR 0x0193
103 #define PMDATH_ADDR 0x0194
104 #define PMCON1_ADDR 0x0195
105 #define PMCON2_ADDR 0x0196
106 #define RCREG_ADDR 0x0199
107 #define TXREG_ADDR 0x019A
108 #define SPBRG_ADDR 0x019B
109 #define SPBRGL_ADDR 0x019B
110 #define SPBRGH_ADDR 0x019C
111 #define RCSTA_ADDR 0x019D
112 #define TXSTA_ADDR 0x019E
113 #define BAUDCON_ADDR 0x019F
114 #define WPUA_ADDR 0x020C
115 #define WPUB_ADDR 0x020D
116 #define SSP1BUF_ADDR 0x0211
117 #define SSPBUF_ADDR 0x0211
118 #define SSP1ADD_ADDR 0x0212
119 #define SSPADD_ADDR 0x0212
120 #define SSP1MSK_ADDR 0x0213
121 #define SSPMSK_ADDR 0x0213
122 #define SSP1STAT_ADDR 0x0214
123 #define SSPSTAT_ADDR 0x0214
124 #define SSP1CON1_ADDR 0x0215
125 #define SSPCON_ADDR 0x0215
126 #define SSPCON1_ADDR 0x0215
127 #define SSP1CON2_ADDR 0x0216
128 #define SSPCON2_ADDR 0x0216
129 #define SSP1CON3_ADDR 0x0217
130 #define SSPCON3_ADDR 0x0217
131 #define IOCAP_ADDR 0x0391
132 #define IOCAN_ADDR 0x0392
133 #define IOCAF_ADDR 0x0393
134 #define IOCBP_ADDR 0x0394
135 #define IOCBN_ADDR 0x0395
136 #define IOCBF_ADDR 0x0396
137 #define NCO1ACC_ADDR 0x0498
138 #define NCO1ACCL_ADDR 0x0498
139 #define NCO1ACCH_ADDR 0x0499
140 #define NCO1ACCU_ADDR 0x049A
141 #define NCO1INC_ADDR 0x049B
142 #define NCO1INCL_ADDR 0x049B
143 #define NCO1INCH_ADDR 0x049C
144 #define NCO1INCU_ADDR 0x049D
145 #define NCO1CON_ADDR 0x049E
146 #define NCO1CLK_ADDR 0x049F
147 #define PWM1DCL_ADDR 0x0611
148 #define PWM1DCH_ADDR 0x0612
149 #define PWM1CON_ADDR 0x0613
150 #define PWM1CON0_ADDR 0x0613
151 #define PWM2DCL_ADDR 0x0614
152 #define PWM2DCH_ADDR 0x0615
153 #define PWM2CON_ADDR 0x0616
154 #define PWM2CON0_ADDR 0x0616
155 #define PWM3DCL_ADDR 0x0617
156 #define PWM3DCH_ADDR 0x0618
157 #define PWM3CON_ADDR 0x0619
158 #define PWM3CON0_ADDR 0x0619
159 #define PWM4DCL_ADDR 0x061A
160 #define PWM4DCH_ADDR 0x061B
161 #define PWM4CON_ADDR 0x061C
162 #define PWM4CON0_ADDR 0x061C
163 #define CWG1DBR_ADDR 0x0691
164 #define CWG1DBF_ADDR 0x0692
165 #define CWG1CON0_ADDR 0x0693
166 #define CWG1CON1_ADDR 0x0694
167 #define CWG1CON2_ADDR 0x0695
168 #define CLCDATA_ADDR 0x0F0F
169 #define CLC1CON_ADDR 0x0F10
170 #define CLC1POL_ADDR 0x0F11
171 #define CLC1SEL0_ADDR 0x0F12
172 #define CLC1SEL1_ADDR 0x0F13
173 #define CLC1GLS0_ADDR 0x0F14
174 #define CLC1GLS1_ADDR 0x0F15
175 #define CLC1GLS2_ADDR 0x0F16
176 #define CLC1GLS3_ADDR 0x0F17
177 #define CLC2CON_ADDR 0x0F18
178 #define CLC2POL_ADDR 0x0F19
179 #define CLC2SEL0_ADDR 0x0F1A
180 #define CLC2SEL1_ADDR 0x0F1B
181 #define CLC2GLS0_ADDR 0x0F1C
182 #define CLC2GLS1_ADDR 0x0F1D
183 #define CLC2GLS2_ADDR 0x0F1E
184 #define CLC2GLS3_ADDR 0x0F1F
185 #define CLC3CON_ADDR 0x0F20
186 #define CLC3POL_ADDR 0x0F21
187 #define CLC3SEL0_ADDR 0x0F22
188 #define CLC3SEL1_ADDR 0x0F23
189 #define CLC3GLS0_ADDR 0x0F24
190 #define CLC3GLS1_ADDR 0x0F25
191 #define CLC3GLS2_ADDR 0x0F26
192 #define CLC3GLS3_ADDR 0x0F27
193 #define CLC4CON_ADDR 0x0F28
194 #define CLC4POL_ADDR 0x0F29
195 #define CLC4SEL0_ADDR 0x0F2A
196 #define CLC4SEL1_ADDR 0x0F2B
197 #define CLC4GLS0_ADDR 0x0F2C
198 #define CLC4GLS1_ADDR 0x0F2D
199 #define CLC4GLS2_ADDR 0x0F2E
200 #define CLC4GLS3_ADDR 0x0F2F
201 #define ICDIO_ADDR 0x0F8C
202 #define ICDCON0_ADDR 0x0F8D
203 #define ICDSTAT_ADDR 0x0F91
204 #define DEVSEL_ADDR 0x0F95
205 #define ICDINSTL_ADDR 0x0F96
206 #define ICDINSTH_ADDR 0x0F97
207 #define ICDBK0CON_ADDR 0x0F9C
208 #define ICDBK0L_ADDR 0x0F9D
209 #define ICDBK0H_ADDR 0x0F9E
210 #define BSRICDSHAD_ADDR 0x0FE3
211 #define STATUS_SHAD_ADDR 0x0FE4
212 #define WREG_SHAD_ADDR 0x0FE5
213 #define BSR_SHAD_ADDR 0x0FE6
214 #define PCLATH_SHAD_ADDR 0x0FE7
215 #define FSR0L_SHAD_ADDR 0x0FE8
216 #define FSR0H_SHAD_ADDR 0x0FE9
217 #define FSR1L_SHAD_ADDR 0x0FEA
218 #define FSR1H_SHAD_ADDR 0x0FEB
219 #define STKPTR_ADDR 0x0FED
220 #define TOSL_ADDR 0x0FEE
221 #define TOSH_ADDR 0x0FEF
222
223 #endif // #ifndef NO_ADDR_DEFINES
224
225 //==============================================================================
226 //
227 // Register Definitions
228 //
229 //==============================================================================
230
231 extern __at(0x0000) __sfr INDF0;
232 extern __at(0x0001) __sfr INDF1;
233 extern __at(0x0002) __sfr PCL;
234
235 //==============================================================================
236 // STATUS Bits
237
238 extern __at(0x0003) __sfr STATUS;
239
240 typedef struct
241 {
242 unsigned C : 1;
243 unsigned DC : 1;
244 unsigned Z : 1;
245 unsigned NOT_PD : 1;
246 unsigned NOT_TO : 1;
247 unsigned : 1;
248 unsigned : 1;
249 unsigned : 1;
250 } __STATUSbits_t;
251
252 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
253
254 #define _C 0x01
255 #define _DC 0x02
256 #define _Z 0x04
257 #define _NOT_PD 0x08
258 #define _NOT_TO 0x10
259
260 //==============================================================================
261
262 extern __at(0x0004) __sfr FSR0;
263 extern __at(0x0004) __sfr FSR0L;
264 extern __at(0x0005) __sfr FSR0H;
265 extern __at(0x0006) __sfr FSR1;
266 extern __at(0x0006) __sfr FSR1L;
267 extern __at(0x0007) __sfr FSR1H;
268
269 //==============================================================================
270 // BSR Bits
271
272 extern __at(0x0008) __sfr BSR;
273
274 typedef union
275 {
276 struct
277 {
278 unsigned BSR0 : 1;
279 unsigned BSR1 : 1;
280 unsigned BSR2 : 1;
281 unsigned BSR3 : 1;
282 unsigned BSR4 : 1;
283 unsigned : 1;
284 unsigned : 1;
285 unsigned : 1;
286 };
287
288 struct
289 {
290 unsigned BSR : 5;
291 unsigned : 3;
292 };
293 } __BSRbits_t;
294
295 extern __at(0x0008) volatile __BSRbits_t BSRbits;
296
297 #define _BSR0 0x01
298 #define _BSR1 0x02
299 #define _BSR2 0x04
300 #define _BSR3 0x08
301 #define _BSR4 0x10
302
303 //==============================================================================
304
305 extern __at(0x0009) __sfr WREG;
306 extern __at(0x000A) __sfr PCLATH;
307
308 //==============================================================================
309 // INTCON Bits
310
311 extern __at(0x000B) __sfr INTCON;
312
313 typedef union
314 {
315 struct
316 {
317 unsigned IOCIF : 1;
318 unsigned INTF : 1;
319 unsigned TMR0IF : 1;
320 unsigned IOCIE : 1;
321 unsigned INTE : 1;
322 unsigned TMR0IE : 1;
323 unsigned PEIE : 1;
324 unsigned GIE : 1;
325 };
326
327 struct
328 {
329 unsigned : 1;
330 unsigned : 1;
331 unsigned T0IF : 1;
332 unsigned : 1;
333 unsigned : 1;
334 unsigned T0IE : 1;
335 unsigned : 1;
336 unsigned : 1;
337 };
338 } __INTCONbits_t;
339
340 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
341
342 #define _IOCIF 0x01
343 #define _INTF 0x02
344 #define _TMR0IF 0x04
345 #define _T0IF 0x04
346 #define _IOCIE 0x08
347 #define _INTE 0x10
348 #define _TMR0IE 0x20
349 #define _T0IE 0x20
350 #define _PEIE 0x40
351 #define _GIE 0x80
352
353 //==============================================================================
354
355
356 //==============================================================================
357 // PORTA Bits
358
359 extern __at(0x000C) __sfr PORTA;
360
361 typedef union
362 {
363 struct
364 {
365 unsigned RA0 : 1;
366 unsigned RA1 : 1;
367 unsigned RA2 : 1;
368 unsigned RA3 : 1;
369 unsigned RA4 : 1;
370 unsigned RA5 : 1;
371 unsigned : 1;
372 unsigned : 1;
373 };
374
375 struct
376 {
377 unsigned RA : 6;
378 unsigned : 2;
379 };
380 } __PORTAbits_t;
381
382 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
383
384 #define _RA0 0x01
385 #define _RA1 0x02
386 #define _RA2 0x04
387 #define _RA3 0x08
388 #define _RA4 0x10
389 #define _RA5 0x20
390
391 //==============================================================================
392
393
394 //==============================================================================
395 // PORTB Bits
396
397 extern __at(0x000D) __sfr PORTB;
398
399 typedef struct
400 {
401 unsigned : 1;
402 unsigned : 1;
403 unsigned : 1;
404 unsigned : 1;
405 unsigned RB4 : 1;
406 unsigned RB5 : 1;
407 unsigned RB6 : 1;
408 unsigned RB7 : 1;
409 } __PORTBbits_t;
410
411 extern __at(0x000D) volatile __PORTBbits_t PORTBbits;
412
413 #define _RB4 0x10
414 #define _RB5 0x20
415 #define _RB6 0x40
416 #define _RB7 0x80
417
418 //==============================================================================
419
420
421 //==============================================================================
422 // PORTC Bits
423
424 extern __at(0x000E) __sfr PORTC;
425
426 typedef struct
427 {
428 unsigned RC0 : 1;
429 unsigned RC1 : 1;
430 unsigned RC2 : 1;
431 unsigned RC3 : 1;
432 unsigned RC4 : 1;
433 unsigned RC5 : 1;
434 unsigned RC6 : 1;
435 unsigned RC7 : 1;
436 } __PORTCbits_t;
437
438 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
439
440 #define _RC0 0x01
441 #define _RC1 0x02
442 #define _RC2 0x04
443 #define _RC3 0x08
444 #define _RC4 0x10
445 #define _RC5 0x20
446 #define _RC6 0x40
447 #define _RC7 0x80
448
449 //==============================================================================
450
451
452 //==============================================================================
453 // PIR1 Bits
454
455 extern __at(0x0011) __sfr PIR1;
456
457 typedef struct
458 {
459 unsigned TMR1IF : 1;
460 unsigned TMR2IF : 1;
461 unsigned : 1;
462 unsigned SSP1IF : 1;
463 unsigned TXIF : 1;
464 unsigned RCIF : 1;
465 unsigned ADIF : 1;
466 unsigned TMR1GIF : 1;
467 } __PIR1bits_t;
468
469 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
470
471 #define _TMR1IF 0x01
472 #define _TMR2IF 0x02
473 #define _SSP1IF 0x08
474 #define _TXIF 0x10
475 #define _RCIF 0x20
476 #define _ADIF 0x40
477 #define _TMR1GIF 0x80
478
479 //==============================================================================
480
481
482 //==============================================================================
483 // PIR2 Bits
484
485 extern __at(0x0012) __sfr PIR2;
486
487 typedef struct
488 {
489 unsigned : 1;
490 unsigned : 1;
491 unsigned NCO1IF : 1;
492 unsigned BCL1IF : 1;
493 unsigned : 1;
494 unsigned C1IF : 1;
495 unsigned C2IF : 1;
496 unsigned OSFIF : 1;
497 } __PIR2bits_t;
498
499 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
500
501 #define _NCO1IF 0x04
502 #define _BCL1IF 0x08
503 #define _C1IF 0x20
504 #define _C2IF 0x40
505 #define _OSFIF 0x80
506
507 //==============================================================================
508
509
510 //==============================================================================
511 // PIR3 Bits
512
513 extern __at(0x0013) __sfr PIR3;
514
515 typedef struct
516 {
517 unsigned CLC1IF : 1;
518 unsigned CLC2IF : 1;
519 unsigned CLC3IF : 1;
520 unsigned CLC4IF : 1;
521 unsigned : 1;
522 unsigned : 1;
523 unsigned : 1;
524 unsigned : 1;
525 } __PIR3bits_t;
526
527 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
528
529 #define _CLC1IF 0x01
530 #define _CLC2IF 0x02
531 #define _CLC3IF 0x04
532 #define _CLC4IF 0x08
533
534 //==============================================================================
535
536 extern __at(0x0015) __sfr TMR0;
537 extern __at(0x0016) __sfr TMR1;
538 extern __at(0x0016) __sfr TMR1L;
539 extern __at(0x0017) __sfr TMR1H;
540
541 //==============================================================================
542 // T1CON Bits
543
544 extern __at(0x0018) __sfr T1CON;
545
546 typedef union
547 {
548 struct
549 {
550 unsigned TMR1ON : 1;
551 unsigned : 1;
552 unsigned NOT_T1SYNC : 1;
553 unsigned T1OSCEN : 1;
554 unsigned T1CKPS0 : 1;
555 unsigned T1CKPS1 : 1;
556 unsigned TMR1CS0 : 1;
557 unsigned TMR1CS1 : 1;
558 };
559
560 struct
561 {
562 unsigned : 4;
563 unsigned T1CKPS : 2;
564 unsigned : 2;
565 };
566
567 struct
568 {
569 unsigned : 6;
570 unsigned TMR1CS : 2;
571 };
572 } __T1CONbits_t;
573
574 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
575
576 #define _TMR1ON 0x01
577 #define _NOT_T1SYNC 0x04
578 #define _T1OSCEN 0x08
579 #define _T1CKPS0 0x10
580 #define _T1CKPS1 0x20
581 #define _TMR1CS0 0x40
582 #define _TMR1CS1 0x80
583
584 //==============================================================================
585
586
587 //==============================================================================
588 // T1GCON Bits
589
590 extern __at(0x0019) __sfr T1GCON;
591
592 typedef union
593 {
594 struct
595 {
596 unsigned T1GSS0 : 1;
597 unsigned T1GSS1 : 1;
598 unsigned T1GVAL : 1;
599 unsigned T1GGO_NOT_DONE : 1;
600 unsigned T1GSPM : 1;
601 unsigned T1GTM : 1;
602 unsigned T1GPOL : 1;
603 unsigned TMR1GE : 1;
604 };
605
606 struct
607 {
608 unsigned T1GSS : 2;
609 unsigned : 6;
610 };
611 } __T1GCONbits_t;
612
613 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
614
615 #define _T1GSS0 0x01
616 #define _T1GSS1 0x02
617 #define _T1GVAL 0x04
618 #define _T1GGO_NOT_DONE 0x08
619 #define _T1GSPM 0x10
620 #define _T1GTM 0x20
621 #define _T1GPOL 0x40
622 #define _TMR1GE 0x80
623
624 //==============================================================================
625
626 extern __at(0x001A) __sfr TMR2;
627 extern __at(0x001B) __sfr PR2;
628
629 //==============================================================================
630 // T2CON Bits
631
632 extern __at(0x001C) __sfr T2CON;
633
634 typedef union
635 {
636 struct
637 {
638 unsigned T2CKPS0 : 1;
639 unsigned T2CKPS1 : 1;
640 unsigned TMR2ON : 1;
641 unsigned T2OUTPS0 : 1;
642 unsigned T2OUTPS1 : 1;
643 unsigned T2OUTPS2 : 1;
644 unsigned T2OUTPS3 : 1;
645 unsigned : 1;
646 };
647
648 struct
649 {
650 unsigned T2CKPS : 2;
651 unsigned : 6;
652 };
653
654 struct
655 {
656 unsigned : 3;
657 unsigned T2OUTPS : 4;
658 unsigned : 1;
659 };
660 } __T2CONbits_t;
661
662 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
663
664 #define _T2CKPS0 0x01
665 #define _T2CKPS1 0x02
666 #define _TMR2ON 0x04
667 #define _T2OUTPS0 0x08
668 #define _T2OUTPS1 0x10
669 #define _T2OUTPS2 0x20
670 #define _T2OUTPS3 0x40
671
672 //==============================================================================
673
674
675 //==============================================================================
676 // TRISA Bits
677
678 extern __at(0x008C) __sfr TRISA;
679
680 typedef union
681 {
682 struct
683 {
684 unsigned TRISA0 : 1;
685 unsigned TRISA1 : 1;
686 unsigned TRISA2 : 1;
687 unsigned TRISA3 : 1;
688 unsigned TRISA4 : 1;
689 unsigned TRISA5 : 1;
690 unsigned : 1;
691 unsigned : 1;
692 };
693
694 struct
695 {
696 unsigned TRISA : 6;
697 unsigned : 2;
698 };
699 } __TRISAbits_t;
700
701 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
702
703 #define _TRISA0 0x01
704 #define _TRISA1 0x02
705 #define _TRISA2 0x04
706 #define _TRISA3 0x08
707 #define _TRISA4 0x10
708 #define _TRISA5 0x20
709
710 //==============================================================================
711
712
713 //==============================================================================
714 // TRISB Bits
715
716 extern __at(0x008D) __sfr TRISB;
717
718 typedef struct
719 {
720 unsigned : 1;
721 unsigned : 1;
722 unsigned : 1;
723 unsigned : 1;
724 unsigned TRISB4 : 1;
725 unsigned TRISB5 : 1;
726 unsigned TRISB6 : 1;
727 unsigned TRISB7 : 1;
728 } __TRISBbits_t;
729
730 extern __at(0x008D) volatile __TRISBbits_t TRISBbits;
731
732 #define _TRISB4 0x10
733 #define _TRISB5 0x20
734 #define _TRISB6 0x40
735 #define _TRISB7 0x80
736
737 //==============================================================================
738
739
740 //==============================================================================
741 // TRISC Bits
742
743 extern __at(0x008E) __sfr TRISC;
744
745 typedef struct
746 {
747 unsigned TRISC0 : 1;
748 unsigned TRISC1 : 1;
749 unsigned TRISC2 : 1;
750 unsigned TRISC3 : 1;
751 unsigned TRISC4 : 1;
752 unsigned TRISC5 : 1;
753 unsigned TRISC6 : 1;
754 unsigned TRISC7 : 1;
755 } __TRISCbits_t;
756
757 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
758
759 #define _TRISC0 0x01
760 #define _TRISC1 0x02
761 #define _TRISC2 0x04
762 #define _TRISC3 0x08
763 #define _TRISC4 0x10
764 #define _TRISC5 0x20
765 #define _TRISC6 0x40
766 #define _TRISC7 0x80
767
768 //==============================================================================
769
770
771 //==============================================================================
772 // PIE1 Bits
773
774 extern __at(0x0091) __sfr PIE1;
775
776 typedef struct
777 {
778 unsigned TMR1IE : 1;
779 unsigned TMR2IE : 1;
780 unsigned : 1;
781 unsigned SSP1IE : 1;
782 unsigned TXIE : 1;
783 unsigned RCIE : 1;
784 unsigned ADIE : 1;
785 unsigned TMR1GIE : 1;
786 } __PIE1bits_t;
787
788 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
789
790 #define _TMR1IE 0x01
791 #define _TMR2IE 0x02
792 #define _SSP1IE 0x08
793 #define _TXIE 0x10
794 #define _RCIE 0x20
795 #define _ADIE 0x40
796 #define _TMR1GIE 0x80
797
798 //==============================================================================
799
800
801 //==============================================================================
802 // PIE2 Bits
803
804 extern __at(0x0092) __sfr PIE2;
805
806 typedef struct
807 {
808 unsigned : 1;
809 unsigned : 1;
810 unsigned NCO1IE : 1;
811 unsigned BCL1IE : 1;
812 unsigned : 1;
813 unsigned C1IE : 1;
814 unsigned C2IE : 1;
815 unsigned OSFIE : 1;
816 } __PIE2bits_t;
817
818 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
819
820 #define _NCO1IE 0x04
821 #define _BCL1IE 0x08
822 #define _C1IE 0x20
823 #define _C2IE 0x40
824 #define _OSFIE 0x80
825
826 //==============================================================================
827
828
829 //==============================================================================
830 // PIE3 Bits
831
832 extern __at(0x0093) __sfr PIE3;
833
834 typedef struct
835 {
836 unsigned CLC1IE : 1;
837 unsigned CLC2IE : 1;
838 unsigned CLC3IE : 1;
839 unsigned CLC4IE : 1;
840 unsigned : 1;
841 unsigned : 1;
842 unsigned : 1;
843 unsigned : 1;
844 } __PIE3bits_t;
845
846 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
847
848 #define _CLC1IE 0x01
849 #define _CLC2IE 0x02
850 #define _CLC3IE 0x04
851 #define _CLC4IE 0x08
852
853 //==============================================================================
854
855
856 //==============================================================================
857 // OPTION_REG Bits
858
859 extern __at(0x0095) __sfr OPTION_REG;
860
861 typedef union
862 {
863 struct
864 {
865 unsigned PS0 : 1;
866 unsigned PS1 : 1;
867 unsigned PS2 : 1;
868 unsigned PSA : 1;
869 unsigned TMR0SE : 1;
870 unsigned TMR0CS : 1;
871 unsigned INTEDG : 1;
872 unsigned NOT_WPUEN : 1;
873 };
874
875 struct
876 {
877 unsigned : 1;
878 unsigned : 1;
879 unsigned : 1;
880 unsigned : 1;
881 unsigned T0SE : 1;
882 unsigned T0CS : 1;
883 unsigned : 1;
884 unsigned : 1;
885 };
886
887 struct
888 {
889 unsigned PS : 3;
890 unsigned : 5;
891 };
892 } __OPTION_REGbits_t;
893
894 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
895
896 #define _PS0 0x01
897 #define _PS1 0x02
898 #define _PS2 0x04
899 #define _PSA 0x08
900 #define _TMR0SE 0x10
901 #define _T0SE 0x10
902 #define _TMR0CS 0x20
903 #define _T0CS 0x20
904 #define _INTEDG 0x40
905 #define _NOT_WPUEN 0x80
906
907 //==============================================================================
908
909
910 //==============================================================================
911 // PCON Bits
912
913 extern __at(0x0096) __sfr PCON;
914
915 typedef struct
916 {
917 unsigned NOT_BOR : 1;
918 unsigned NOT_POR : 1;
919 unsigned NOT_RI : 1;
920 unsigned NOT_RMCLR : 1;
921 unsigned NOT_RWDT : 1;
922 unsigned : 1;
923 unsigned STKUNF : 1;
924 unsigned STKOVF : 1;
925 } __PCONbits_t;
926
927 extern __at(0x0096) volatile __PCONbits_t PCONbits;
928
929 #define _NOT_BOR 0x01
930 #define _NOT_POR 0x02
931 #define _NOT_RI 0x04
932 #define _NOT_RMCLR 0x08
933 #define _NOT_RWDT 0x10
934 #define _STKUNF 0x40
935 #define _STKOVF 0x80
936
937 //==============================================================================
938
939
940 //==============================================================================
941 // WDTCON Bits
942
943 extern __at(0x0097) __sfr WDTCON;
944
945 typedef union
946 {
947 struct
948 {
949 unsigned SWDTEN : 1;
950 unsigned WDTPS0 : 1;
951 unsigned WDTPS1 : 1;
952 unsigned WDTPS2 : 1;
953 unsigned WDTPS3 : 1;
954 unsigned WDTPS4 : 1;
955 unsigned : 1;
956 unsigned : 1;
957 };
958
959 struct
960 {
961 unsigned : 1;
962 unsigned WDTPS : 5;
963 unsigned : 2;
964 };
965 } __WDTCONbits_t;
966
967 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
968
969 #define _SWDTEN 0x01
970 #define _WDTPS0 0x02
971 #define _WDTPS1 0x04
972 #define _WDTPS2 0x08
973 #define _WDTPS3 0x10
974 #define _WDTPS4 0x20
975
976 //==============================================================================
977
978
979 //==============================================================================
980 // OSCCON Bits
981
982 extern __at(0x0099) __sfr OSCCON;
983
984 typedef union
985 {
986 struct
987 {
988 unsigned SCS0 : 1;
989 unsigned SCS1 : 1;
990 unsigned : 1;
991 unsigned IRCF0 : 1;
992 unsigned IRCF1 : 1;
993 unsigned IRCF2 : 1;
994 unsigned IRCF3 : 1;
995 unsigned : 1;
996 };
997
998 struct
999 {
1000 unsigned SCS : 2;
1001 unsigned : 6;
1002 };
1003
1004 struct
1005 {
1006 unsigned : 3;
1007 unsigned IRCF : 4;
1008 unsigned : 1;
1009 };
1010 } __OSCCONbits_t;
1011
1012 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
1013
1014 #define _SCS0 0x01
1015 #define _SCS1 0x02
1016 #define _IRCF0 0x08
1017 #define _IRCF1 0x10
1018 #define _IRCF2 0x20
1019 #define _IRCF3 0x40
1020
1021 //==============================================================================
1022
1023
1024 //==============================================================================
1025 // OSCSTAT Bits
1026
1027 extern __at(0x009A) __sfr OSCSTAT;
1028
1029 typedef struct
1030 {
1031 unsigned HFIOFS : 1;
1032 unsigned LFIOFR : 1;
1033 unsigned : 1;
1034 unsigned : 1;
1035 unsigned HFIOFR : 1;
1036 unsigned OSTS : 1;
1037 unsigned : 1;
1038 unsigned SOSCR : 1;
1039 } __OSCSTATbits_t;
1040
1041 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
1042
1043 #define _HFIOFS 0x01
1044 #define _LFIOFR 0x02
1045 #define _HFIOFR 0x10
1046 #define _OSTS 0x20
1047 #define _SOSCR 0x80
1048
1049 //==============================================================================
1050
1051 extern __at(0x009B) __sfr ADRES;
1052 extern __at(0x009B) __sfr ADRESL;
1053 extern __at(0x009C) __sfr ADRESH;
1054
1055 //==============================================================================
1056 // ADCON0 Bits
1057
1058 extern __at(0x009D) __sfr ADCON0;
1059
1060 typedef union
1061 {
1062 struct
1063 {
1064 unsigned ADON : 1;
1065 unsigned GO_NOT_DONE : 1;
1066 unsigned CHS0 : 1;
1067 unsigned CHS1 : 1;
1068 unsigned CHS2 : 1;
1069 unsigned CHS3 : 1;
1070 unsigned CHS4 : 1;
1071 unsigned : 1;
1072 };
1073
1074 struct
1075 {
1076 unsigned : 1;
1077 unsigned ADGO : 1;
1078 unsigned : 1;
1079 unsigned : 1;
1080 unsigned : 1;
1081 unsigned : 1;
1082 unsigned : 1;
1083 unsigned : 1;
1084 };
1085
1086 struct
1087 {
1088 unsigned : 1;
1089 unsigned GO : 1;
1090 unsigned : 1;
1091 unsigned : 1;
1092 unsigned : 1;
1093 unsigned : 1;
1094 unsigned : 1;
1095 unsigned : 1;
1096 };
1097
1098 struct
1099 {
1100 unsigned : 2;
1101 unsigned CHS : 5;
1102 unsigned : 1;
1103 };
1104 } __ADCON0bits_t;
1105
1106 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1107
1108 #define _ADON 0x01
1109 #define _GO_NOT_DONE 0x02
1110 #define _ADGO 0x02
1111 #define _GO 0x02
1112 #define _CHS0 0x04
1113 #define _CHS1 0x08
1114 #define _CHS2 0x10
1115 #define _CHS3 0x20
1116 #define _CHS4 0x40
1117
1118 //==============================================================================
1119
1120
1121 //==============================================================================
1122 // ADCON1 Bits
1123
1124 extern __at(0x009E) __sfr ADCON1;
1125
1126 typedef union
1127 {
1128 struct
1129 {
1130 unsigned ADPREF0 : 1;
1131 unsigned ADPREF1 : 1;
1132 unsigned : 1;
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned ADFM : 1;
1138 };
1139
1140 struct
1141 {
1142 unsigned ADPREF : 2;
1143 unsigned : 6;
1144 };
1145 } __ADCON1bits_t;
1146
1147 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1148
1149 #define _ADPREF0 0x01
1150 #define _ADPREF1 0x02
1151 #define _ADFM 0x80
1152
1153 //==============================================================================
1154
1155
1156 //==============================================================================
1157 // ADCON2 Bits
1158
1159 extern __at(0x009F) __sfr ADCON2;
1160
1161 typedef union
1162 {
1163 struct
1164 {
1165 unsigned : 1;
1166 unsigned : 1;
1167 unsigned : 1;
1168 unsigned : 1;
1169 unsigned TRIGSEL0 : 1;
1170 unsigned TRIGSEL1 : 1;
1171 unsigned TRIGSEL2 : 1;
1172 unsigned TRIGSEL3 : 1;
1173 };
1174
1175 struct
1176 {
1177 unsigned : 4;
1178 unsigned TRIGSEL : 4;
1179 };
1180 } __ADCON2bits_t;
1181
1182 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1183
1184 #define _TRIGSEL0 0x10
1185 #define _TRIGSEL1 0x20
1186 #define _TRIGSEL2 0x40
1187 #define _TRIGSEL3 0x80
1188
1189 //==============================================================================
1190
1191
1192 //==============================================================================
1193 // LATA Bits
1194
1195 extern __at(0x010C) __sfr LATA;
1196
1197 typedef struct
1198 {
1199 unsigned LATA0 : 1;
1200 unsigned LATA1 : 1;
1201 unsigned LATA2 : 1;
1202 unsigned : 1;
1203 unsigned LATA4 : 1;
1204 unsigned LATA5 : 1;
1205 unsigned : 1;
1206 unsigned : 1;
1207 } __LATAbits_t;
1208
1209 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1210
1211 #define _LATA0 0x01
1212 #define _LATA1 0x02
1213 #define _LATA2 0x04
1214 #define _LATA4 0x10
1215 #define _LATA5 0x20
1216
1217 //==============================================================================
1218
1219
1220 //==============================================================================
1221 // LATB Bits
1222
1223 extern __at(0x010D) __sfr LATB;
1224
1225 typedef struct
1226 {
1227 unsigned : 1;
1228 unsigned : 1;
1229 unsigned : 1;
1230 unsigned : 1;
1231 unsigned LATB4 : 1;
1232 unsigned LATB5 : 1;
1233 unsigned LATB6 : 1;
1234 unsigned LATB7 : 1;
1235 } __LATBbits_t;
1236
1237 extern __at(0x010D) volatile __LATBbits_t LATBbits;
1238
1239 #define _LATB4 0x10
1240 #define _LATB5 0x20
1241 #define _LATB6 0x40
1242 #define _LATB7 0x80
1243
1244 //==============================================================================
1245
1246
1247 //==============================================================================
1248 // LATC Bits
1249
1250 extern __at(0x010E) __sfr LATC;
1251
1252 typedef struct
1253 {
1254 unsigned LATC0 : 1;
1255 unsigned LATC1 : 1;
1256 unsigned LATC2 : 1;
1257 unsigned LATC3 : 1;
1258 unsigned LATC4 : 1;
1259 unsigned LATC5 : 1;
1260 unsigned LATC6 : 1;
1261 unsigned LATC7 : 1;
1262 } __LATCbits_t;
1263
1264 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1265
1266 #define _LATC0 0x01
1267 #define _LATC1 0x02
1268 #define _LATC2 0x04
1269 #define _LATC3 0x08
1270 #define _LATC4 0x10
1271 #define _LATC5 0x20
1272 #define _LATC6 0x40
1273 #define _LATC7 0x80
1274
1275 //==============================================================================
1276
1277
1278 //==============================================================================
1279 // CM1CON0 Bits
1280
1281 extern __at(0x0111) __sfr CM1CON0;
1282
1283 typedef struct
1284 {
1285 unsigned C1SYNC : 1;
1286 unsigned C1HYS : 1;
1287 unsigned C1SP : 1;
1288 unsigned : 1;
1289 unsigned C1POL : 1;
1290 unsigned C1OE : 1;
1291 unsigned C1OUT : 1;
1292 unsigned C1ON : 1;
1293 } __CM1CON0bits_t;
1294
1295 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1296
1297 #define _C1SYNC 0x01
1298 #define _C1HYS 0x02
1299 #define _C1SP 0x04
1300 #define _C1POL 0x10
1301 #define _C1OE 0x20
1302 #define _C1OUT 0x40
1303 #define _C1ON 0x80
1304
1305 //==============================================================================
1306
1307
1308 //==============================================================================
1309 // CM1CON1 Bits
1310
1311 extern __at(0x0112) __sfr CM1CON1;
1312
1313 typedef union
1314 {
1315 struct
1316 {
1317 unsigned C1NCH0 : 1;
1318 unsigned C1NCH1 : 1;
1319 unsigned C1NCH2 : 1;
1320 unsigned : 1;
1321 unsigned C1PCH0 : 1;
1322 unsigned C1PCH1 : 1;
1323 unsigned C1INTN : 1;
1324 unsigned C1INTP : 1;
1325 };
1326
1327 struct
1328 {
1329 unsigned C1NCH : 3;
1330 unsigned : 5;
1331 };
1332
1333 struct
1334 {
1335 unsigned : 4;
1336 unsigned C1PCH : 2;
1337 unsigned : 2;
1338 };
1339 } __CM1CON1bits_t;
1340
1341 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1342
1343 #define _C1NCH0 0x01
1344 #define _C1NCH1 0x02
1345 #define _C1NCH2 0x04
1346 #define _C1PCH0 0x10
1347 #define _C1PCH1 0x20
1348 #define _C1INTN 0x40
1349 #define _C1INTP 0x80
1350
1351 //==============================================================================
1352
1353
1354 //==============================================================================
1355 // CM2CON0 Bits
1356
1357 extern __at(0x0113) __sfr CM2CON0;
1358
1359 typedef struct
1360 {
1361 unsigned C2SYNC : 1;
1362 unsigned C2HYS : 1;
1363 unsigned C2SP : 1;
1364 unsigned : 1;
1365 unsigned C2POL : 1;
1366 unsigned C2OE : 1;
1367 unsigned C2OUT : 1;
1368 unsigned C2ON : 1;
1369 } __CM2CON0bits_t;
1370
1371 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1372
1373 #define _C2SYNC 0x01
1374 #define _C2HYS 0x02
1375 #define _C2SP 0x04
1376 #define _C2POL 0x10
1377 #define _C2OE 0x20
1378 #define _C2OUT 0x40
1379 #define _C2ON 0x80
1380
1381 //==============================================================================
1382
1383
1384 //==============================================================================
1385 // CM2CON1 Bits
1386
1387 extern __at(0x0114) __sfr CM2CON1;
1388
1389 typedef union
1390 {
1391 struct
1392 {
1393 unsigned C2NCH0 : 1;
1394 unsigned C2NCH1 : 1;
1395 unsigned C2NCH2 : 1;
1396 unsigned : 1;
1397 unsigned C2PCH0 : 1;
1398 unsigned C2PCH1 : 1;
1399 unsigned C2INTN : 1;
1400 unsigned C2INTP : 1;
1401 };
1402
1403 struct
1404 {
1405 unsigned C2NCH : 3;
1406 unsigned : 5;
1407 };
1408
1409 struct
1410 {
1411 unsigned : 4;
1412 unsigned C2PCH : 2;
1413 unsigned : 2;
1414 };
1415 } __CM2CON1bits_t;
1416
1417 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1418
1419 #define _C2NCH0 0x01
1420 #define _C2NCH1 0x02
1421 #define _C2NCH2 0x04
1422 #define _C2PCH0 0x10
1423 #define _C2PCH1 0x20
1424 #define _C2INTN 0x40
1425 #define _C2INTP 0x80
1426
1427 //==============================================================================
1428
1429
1430 //==============================================================================
1431 // CMOUT Bits
1432
1433 extern __at(0x0115) __sfr CMOUT;
1434
1435 typedef struct
1436 {
1437 unsigned MC1OUT : 1;
1438 unsigned MC2OUT : 1;
1439 unsigned : 1;
1440 unsigned : 1;
1441 unsigned : 1;
1442 unsigned : 1;
1443 unsigned : 1;
1444 unsigned : 1;
1445 } __CMOUTbits_t;
1446
1447 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1448
1449 #define _MC1OUT 0x01
1450 #define _MC2OUT 0x02
1451
1452 //==============================================================================
1453
1454
1455 //==============================================================================
1456 // BORCON Bits
1457
1458 extern __at(0x0116) __sfr BORCON;
1459
1460 typedef struct
1461 {
1462 unsigned BORRDY : 1;
1463 unsigned : 1;
1464 unsigned : 1;
1465 unsigned : 1;
1466 unsigned : 1;
1467 unsigned : 1;
1468 unsigned BORFS : 1;
1469 unsigned SBOREN : 1;
1470 } __BORCONbits_t;
1471
1472 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1473
1474 #define _BORRDY 0x01
1475 #define _BORFS 0x40
1476 #define _SBOREN 0x80
1477
1478 //==============================================================================
1479
1480
1481 //==============================================================================
1482 // FVRCON Bits
1483
1484 extern __at(0x0117) __sfr FVRCON;
1485
1486 typedef union
1487 {
1488 struct
1489 {
1490 unsigned ADFVR0 : 1;
1491 unsigned ADFVR1 : 1;
1492 unsigned CDAFVR0 : 1;
1493 unsigned CDAFVR1 : 1;
1494 unsigned TSRNG : 1;
1495 unsigned TSEN : 1;
1496 unsigned FVRRDY : 1;
1497 unsigned FVREN : 1;
1498 };
1499
1500 struct
1501 {
1502 unsigned ADFVR : 2;
1503 unsigned : 6;
1504 };
1505
1506 struct
1507 {
1508 unsigned : 2;
1509 unsigned CDAFVR : 2;
1510 unsigned : 4;
1511 };
1512 } __FVRCONbits_t;
1513
1514 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1515
1516 #define _ADFVR0 0x01
1517 #define _ADFVR1 0x02
1518 #define _CDAFVR0 0x04
1519 #define _CDAFVR1 0x08
1520 #define _TSRNG 0x10
1521 #define _TSEN 0x20
1522 #define _FVRRDY 0x40
1523 #define _FVREN 0x80
1524
1525 //==============================================================================
1526
1527
1528 //==============================================================================
1529 // DACCON0 Bits
1530
1531 extern __at(0x0118) __sfr DACCON0;
1532
1533 typedef struct
1534 {
1535 unsigned : 1;
1536 unsigned : 1;
1537 unsigned DACPSS : 1;
1538 unsigned : 1;
1539 unsigned DACOE2 : 1;
1540 unsigned DACOE1 : 1;
1541 unsigned : 1;
1542 unsigned DACEN : 1;
1543 } __DACCON0bits_t;
1544
1545 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1546
1547 #define _DACPSS 0x04
1548 #define _DACOE2 0x10
1549 #define _DACOE1 0x20
1550 #define _DACEN 0x80
1551
1552 //==============================================================================
1553
1554
1555 //==============================================================================
1556 // DACCON1 Bits
1557
1558 extern __at(0x0119) __sfr DACCON1;
1559
1560 typedef union
1561 {
1562 struct
1563 {
1564 unsigned DACR0 : 1;
1565 unsigned DACR1 : 1;
1566 unsigned DACR2 : 1;
1567 unsigned DACR3 : 1;
1568 unsigned DACR4 : 1;
1569 unsigned : 1;
1570 unsigned : 1;
1571 unsigned : 1;
1572 };
1573
1574 struct
1575 {
1576 unsigned DACR : 5;
1577 unsigned : 3;
1578 };
1579 } __DACCON1bits_t;
1580
1581 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1582
1583 #define _DACR0 0x01
1584 #define _DACR1 0x02
1585 #define _DACR2 0x04
1586 #define _DACR3 0x08
1587 #define _DACR4 0x10
1588
1589 //==============================================================================
1590
1591
1592 //==============================================================================
1593 // APFCON Bits
1594
1595 extern __at(0x011D) __sfr APFCON;
1596
1597 typedef struct
1598 {
1599 unsigned NCO1SEL : 1;
1600 unsigned CLC1SEL : 1;
1601 unsigned : 1;
1602 unsigned T1GSEL : 1;
1603 unsigned SSSEL : 1;
1604 unsigned : 1;
1605 unsigned : 1;
1606 unsigned : 1;
1607 } __APFCONbits_t;
1608
1609 extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
1610
1611 #define _NCO1SEL 0x01
1612 #define _CLC1SEL 0x02
1613 #define _T1GSEL 0x08
1614 #define _SSSEL 0x10
1615
1616 //==============================================================================
1617
1618
1619 //==============================================================================
1620 // ANSELA Bits
1621
1622 extern __at(0x018C) __sfr ANSELA;
1623
1624 typedef struct
1625 {
1626 unsigned ANSA0 : 1;
1627 unsigned ANSA1 : 1;
1628 unsigned ANSA2 : 1;
1629 unsigned : 1;
1630 unsigned ANSA4 : 1;
1631 unsigned : 1;
1632 unsigned : 1;
1633 unsigned : 1;
1634 } __ANSELAbits_t;
1635
1636 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1637
1638 #define _ANSA0 0x01
1639 #define _ANSA1 0x02
1640 #define _ANSA2 0x04
1641 #define _ANSA4 0x10
1642
1643 //==============================================================================
1644
1645
1646 //==============================================================================
1647 // ANSELB Bits
1648
1649 extern __at(0x018D) __sfr ANSELB;
1650
1651 typedef struct
1652 {
1653 unsigned : 1;
1654 unsigned : 1;
1655 unsigned : 1;
1656 unsigned : 1;
1657 unsigned ANSB4 : 1;
1658 unsigned ANSB5 : 1;
1659 unsigned : 1;
1660 unsigned : 1;
1661 } __ANSELBbits_t;
1662
1663 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
1664
1665 #define _ANSB4 0x10
1666 #define _ANSB5 0x20
1667
1668 //==============================================================================
1669
1670
1671 //==============================================================================
1672 // ANSELC Bits
1673
1674 extern __at(0x018E) __sfr ANSELC;
1675
1676 typedef struct
1677 {
1678 unsigned ANSC0 : 1;
1679 unsigned ANSC1 : 1;
1680 unsigned ANSC2 : 1;
1681 unsigned ANSC3 : 1;
1682 unsigned : 1;
1683 unsigned : 1;
1684 unsigned ANSC6 : 1;
1685 unsigned ANSC7 : 1;
1686 } __ANSELCbits_t;
1687
1688 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1689
1690 #define _ANSC0 0x01
1691 #define _ANSC1 0x02
1692 #define _ANSC2 0x04
1693 #define _ANSC3 0x08
1694 #define _ANSC6 0x40
1695 #define _ANSC7 0x80
1696
1697 //==============================================================================
1698
1699 extern __at(0x0191) __sfr PMADR;
1700 extern __at(0x0191) __sfr PMADRL;
1701 extern __at(0x0192) __sfr PMADRH;
1702 extern __at(0x0193) __sfr PMDAT;
1703 extern __at(0x0193) __sfr PMDATL;
1704 extern __at(0x0194) __sfr PMDATH;
1705
1706 //==============================================================================
1707 // PMCON1 Bits
1708
1709 extern __at(0x0195) __sfr PMCON1;
1710
1711 typedef struct
1712 {
1713 unsigned RD : 1;
1714 unsigned WR : 1;
1715 unsigned WREN : 1;
1716 unsigned WRERR : 1;
1717 unsigned FREE : 1;
1718 unsigned LWLO : 1;
1719 unsigned CFGS : 1;
1720 unsigned : 1;
1721 } __PMCON1bits_t;
1722
1723 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1724
1725 #define _RD 0x01
1726 #define _WR 0x02
1727 #define _WREN 0x04
1728 #define _WRERR 0x08
1729 #define _FREE 0x10
1730 #define _LWLO 0x20
1731 #define _CFGS 0x40
1732
1733 //==============================================================================
1734
1735 extern __at(0x0196) __sfr PMCON2;
1736 extern __at(0x0199) __sfr RCREG;
1737 extern __at(0x019A) __sfr TXREG;
1738 extern __at(0x019B) __sfr SPBRG;
1739 extern __at(0x019B) __sfr SPBRGL;
1740 extern __at(0x019C) __sfr SPBRGH;
1741
1742 //==============================================================================
1743 // RCSTA Bits
1744
1745 extern __at(0x019D) __sfr RCSTA;
1746
1747 typedef struct
1748 {
1749 unsigned RX9D : 1;
1750 unsigned OERR : 1;
1751 unsigned FERR : 1;
1752 unsigned ADDEN : 1;
1753 unsigned CREN : 1;
1754 unsigned SREN : 1;
1755 unsigned RX9 : 1;
1756 unsigned SPEN : 1;
1757 } __RCSTAbits_t;
1758
1759 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1760
1761 #define _RX9D 0x01
1762 #define _OERR 0x02
1763 #define _FERR 0x04
1764 #define _ADDEN 0x08
1765 #define _CREN 0x10
1766 #define _SREN 0x20
1767 #define _RX9 0x40
1768 #define _SPEN 0x80
1769
1770 //==============================================================================
1771
1772
1773 //==============================================================================
1774 // TXSTA Bits
1775
1776 extern __at(0x019E) __sfr TXSTA;
1777
1778 typedef struct
1779 {
1780 unsigned TX9D : 1;
1781 unsigned TRMT : 1;
1782 unsigned BRGH : 1;
1783 unsigned SENDB : 1;
1784 unsigned SYNC : 1;
1785 unsigned TXEN : 1;
1786 unsigned TX9 : 1;
1787 unsigned CSRC : 1;
1788 } __TXSTAbits_t;
1789
1790 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1791
1792 #define _TX9D 0x01
1793 #define _TRMT 0x02
1794 #define _BRGH 0x04
1795 #define _SENDB 0x08
1796 #define _SYNC 0x10
1797 #define _TXEN 0x20
1798 #define _TX9 0x40
1799 #define _CSRC 0x80
1800
1801 //==============================================================================
1802
1803
1804 //==============================================================================
1805 // BAUDCON Bits
1806
1807 extern __at(0x019F) __sfr BAUDCON;
1808
1809 typedef struct
1810 {
1811 unsigned ABDEN : 1;
1812 unsigned WUE : 1;
1813 unsigned : 1;
1814 unsigned BRG16 : 1;
1815 unsigned SCKP : 1;
1816 unsigned : 1;
1817 unsigned RCIDL : 1;
1818 unsigned ABDOVF : 1;
1819 } __BAUDCONbits_t;
1820
1821 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1822
1823 #define _ABDEN 0x01
1824 #define _WUE 0x02
1825 #define _BRG16 0x08
1826 #define _SCKP 0x10
1827 #define _RCIDL 0x40
1828 #define _ABDOVF 0x80
1829
1830 //==============================================================================
1831
1832
1833 //==============================================================================
1834 // WPUA Bits
1835
1836 extern __at(0x020C) __sfr WPUA;
1837
1838 typedef union
1839 {
1840 struct
1841 {
1842 unsigned WPUA0 : 1;
1843 unsigned WPUA1 : 1;
1844 unsigned WPUA2 : 1;
1845 unsigned WPUA3 : 1;
1846 unsigned WPUA4 : 1;
1847 unsigned WPUA5 : 1;
1848 unsigned : 1;
1849 unsigned : 1;
1850 };
1851
1852 struct
1853 {
1854 unsigned WPUA : 6;
1855 unsigned : 2;
1856 };
1857 } __WPUAbits_t;
1858
1859 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1860
1861 #define _WPUA0 0x01
1862 #define _WPUA1 0x02
1863 #define _WPUA2 0x04
1864 #define _WPUA3 0x08
1865 #define _WPUA4 0x10
1866 #define _WPUA5 0x20
1867
1868 //==============================================================================
1869
1870
1871 //==============================================================================
1872 // WPUB Bits
1873
1874 extern __at(0x020D) __sfr WPUB;
1875
1876 typedef struct
1877 {
1878 unsigned : 1;
1879 unsigned : 1;
1880 unsigned : 1;
1881 unsigned : 1;
1882 unsigned WPUB4 : 1;
1883 unsigned WPUB5 : 1;
1884 unsigned WPUB6 : 1;
1885 unsigned WPUB7 : 1;
1886 } __WPUBbits_t;
1887
1888 extern __at(0x020D) volatile __WPUBbits_t WPUBbits;
1889
1890 #define _WPUB4 0x10
1891 #define _WPUB5 0x20
1892 #define _WPUB6 0x40
1893 #define _WPUB7 0x80
1894
1895 //==============================================================================
1896
1897 extern __at(0x0211) __sfr SSP1BUF;
1898 extern __at(0x0211) __sfr SSPBUF;
1899 extern __at(0x0212) __sfr SSP1ADD;
1900 extern __at(0x0212) __sfr SSPADD;
1901 extern __at(0x0213) __sfr SSP1MSK;
1902 extern __at(0x0213) __sfr SSPMSK;
1903
1904 //==============================================================================
1905 // SSP1STAT Bits
1906
1907 extern __at(0x0214) __sfr SSP1STAT;
1908
1909 typedef struct
1910 {
1911 unsigned BF : 1;
1912 unsigned UA : 1;
1913 unsigned R_NOT_W : 1;
1914 unsigned S : 1;
1915 unsigned P : 1;
1916 unsigned D_NOT_A : 1;
1917 unsigned CKE : 1;
1918 unsigned SMP : 1;
1919 } __SSP1STATbits_t;
1920
1921 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
1922
1923 #define _BF 0x01
1924 #define _UA 0x02
1925 #define _R_NOT_W 0x04
1926 #define _S 0x08
1927 #define _P 0x10
1928 #define _D_NOT_A 0x20
1929 #define _CKE 0x40
1930 #define _SMP 0x80
1931
1932 //==============================================================================
1933
1934
1935 //==============================================================================
1936 // SSPSTAT Bits
1937
1938 extern __at(0x0214) __sfr SSPSTAT;
1939
1940 typedef struct
1941 {
1942 unsigned BF : 1;
1943 unsigned UA : 1;
1944 unsigned R_NOT_W : 1;
1945 unsigned S : 1;
1946 unsigned P : 1;
1947 unsigned D_NOT_A : 1;
1948 unsigned CKE : 1;
1949 unsigned SMP : 1;
1950 } __SSPSTATbits_t;
1951
1952 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
1953
1954 #define _SSPSTAT_BF 0x01
1955 #define _SSPSTAT_UA 0x02
1956 #define _SSPSTAT_R_NOT_W 0x04
1957 #define _SSPSTAT_S 0x08
1958 #define _SSPSTAT_P 0x10
1959 #define _SSPSTAT_D_NOT_A 0x20
1960 #define _SSPSTAT_CKE 0x40
1961 #define _SSPSTAT_SMP 0x80
1962
1963 //==============================================================================
1964
1965
1966 //==============================================================================
1967 // SSP1CON1 Bits
1968
1969 extern __at(0x0215) __sfr SSP1CON1;
1970
1971 typedef union
1972 {
1973 struct
1974 {
1975 unsigned SSPM0 : 1;
1976 unsigned SSPM1 : 1;
1977 unsigned SSPM2 : 1;
1978 unsigned SSPM3 : 1;
1979 unsigned CKP : 1;
1980 unsigned SSPEN : 1;
1981 unsigned SSPOV : 1;
1982 unsigned WCOL : 1;
1983 };
1984
1985 struct
1986 {
1987 unsigned SSPM : 4;
1988 unsigned : 4;
1989 };
1990 } __SSP1CON1bits_t;
1991
1992 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
1993
1994 #define _SSPM0 0x01
1995 #define _SSPM1 0x02
1996 #define _SSPM2 0x04
1997 #define _SSPM3 0x08
1998 #define _CKP 0x10
1999 #define _SSPEN 0x20
2000 #define _SSPOV 0x40
2001 #define _WCOL 0x80
2002
2003 //==============================================================================
2004
2005
2006 //==============================================================================
2007 // SSPCON Bits
2008
2009 extern __at(0x0215) __sfr SSPCON;
2010
2011 typedef union
2012 {
2013 struct
2014 {
2015 unsigned SSPM0 : 1;
2016 unsigned SSPM1 : 1;
2017 unsigned SSPM2 : 1;
2018 unsigned SSPM3 : 1;
2019 unsigned CKP : 1;
2020 unsigned SSPEN : 1;
2021 unsigned SSPOV : 1;
2022 unsigned WCOL : 1;
2023 };
2024
2025 struct
2026 {
2027 unsigned SSPM : 4;
2028 unsigned : 4;
2029 };
2030 } __SSPCONbits_t;
2031
2032 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
2033
2034 #define _SSPCON_SSPM0 0x01
2035 #define _SSPCON_SSPM1 0x02
2036 #define _SSPCON_SSPM2 0x04
2037 #define _SSPCON_SSPM3 0x08
2038 #define _SSPCON_CKP 0x10
2039 #define _SSPCON_SSPEN 0x20
2040 #define _SSPCON_SSPOV 0x40
2041 #define _SSPCON_WCOL 0x80
2042
2043 //==============================================================================
2044
2045
2046 //==============================================================================
2047 // SSPCON1 Bits
2048
2049 extern __at(0x0215) __sfr SSPCON1;
2050
2051 typedef union
2052 {
2053 struct
2054 {
2055 unsigned SSPM0 : 1;
2056 unsigned SSPM1 : 1;
2057 unsigned SSPM2 : 1;
2058 unsigned SSPM3 : 1;
2059 unsigned CKP : 1;
2060 unsigned SSPEN : 1;
2061 unsigned SSPOV : 1;
2062 unsigned WCOL : 1;
2063 };
2064
2065 struct
2066 {
2067 unsigned SSPM : 4;
2068 unsigned : 4;
2069 };
2070 } __SSPCON1bits_t;
2071
2072 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
2073
2074 #define _SSPCON1_SSPM0 0x01
2075 #define _SSPCON1_SSPM1 0x02
2076 #define _SSPCON1_SSPM2 0x04
2077 #define _SSPCON1_SSPM3 0x08
2078 #define _SSPCON1_CKP 0x10
2079 #define _SSPCON1_SSPEN 0x20
2080 #define _SSPCON1_SSPOV 0x40
2081 #define _SSPCON1_WCOL 0x80
2082
2083 //==============================================================================
2084
2085
2086 //==============================================================================
2087 // SSP1CON2 Bits
2088
2089 extern __at(0x0216) __sfr SSP1CON2;
2090
2091 typedef struct
2092 {
2093 unsigned SEN : 1;
2094 unsigned RSEN : 1;
2095 unsigned PEN : 1;
2096 unsigned RCEN : 1;
2097 unsigned ACKEN : 1;
2098 unsigned ACKDT : 1;
2099 unsigned ACKSTAT : 1;
2100 unsigned GCEN : 1;
2101 } __SSP1CON2bits_t;
2102
2103 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
2104
2105 #define _SEN 0x01
2106 #define _RSEN 0x02
2107 #define _PEN 0x04
2108 #define _RCEN 0x08
2109 #define _ACKEN 0x10
2110 #define _ACKDT 0x20
2111 #define _ACKSTAT 0x40
2112 #define _GCEN 0x80
2113
2114 //==============================================================================
2115
2116
2117 //==============================================================================
2118 // SSPCON2 Bits
2119
2120 extern __at(0x0216) __sfr SSPCON2;
2121
2122 typedef struct
2123 {
2124 unsigned SEN : 1;
2125 unsigned RSEN : 1;
2126 unsigned PEN : 1;
2127 unsigned RCEN : 1;
2128 unsigned ACKEN : 1;
2129 unsigned ACKDT : 1;
2130 unsigned ACKSTAT : 1;
2131 unsigned GCEN : 1;
2132 } __SSPCON2bits_t;
2133
2134 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
2135
2136 #define _SSPCON2_SEN 0x01
2137 #define _SSPCON2_RSEN 0x02
2138 #define _SSPCON2_PEN 0x04
2139 #define _SSPCON2_RCEN 0x08
2140 #define _SSPCON2_ACKEN 0x10
2141 #define _SSPCON2_ACKDT 0x20
2142 #define _SSPCON2_ACKSTAT 0x40
2143 #define _SSPCON2_GCEN 0x80
2144
2145 //==============================================================================
2146
2147
2148 //==============================================================================
2149 // SSP1CON3 Bits
2150
2151 extern __at(0x0217) __sfr SSP1CON3;
2152
2153 typedef struct
2154 {
2155 unsigned DHEN : 1;
2156 unsigned AHEN : 1;
2157 unsigned SBCDE : 1;
2158 unsigned SDAHT : 1;
2159 unsigned BOEN : 1;
2160 unsigned SCIE : 1;
2161 unsigned PCIE : 1;
2162 unsigned ACKTIM : 1;
2163 } __SSP1CON3bits_t;
2164
2165 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
2166
2167 #define _DHEN 0x01
2168 #define _AHEN 0x02
2169 #define _SBCDE 0x04
2170 #define _SDAHT 0x08
2171 #define _BOEN 0x10
2172 #define _SCIE 0x20
2173 #define _PCIE 0x40
2174 #define _ACKTIM 0x80
2175
2176 //==============================================================================
2177
2178
2179 //==============================================================================
2180 // SSPCON3 Bits
2181
2182 extern __at(0x0217) __sfr SSPCON3;
2183
2184 typedef struct
2185 {
2186 unsigned DHEN : 1;
2187 unsigned AHEN : 1;
2188 unsigned SBCDE : 1;
2189 unsigned SDAHT : 1;
2190 unsigned BOEN : 1;
2191 unsigned SCIE : 1;
2192 unsigned PCIE : 1;
2193 unsigned ACKTIM : 1;
2194 } __SSPCON3bits_t;
2195
2196 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
2197
2198 #define _SSPCON3_DHEN 0x01
2199 #define _SSPCON3_AHEN 0x02
2200 #define _SSPCON3_SBCDE 0x04
2201 #define _SSPCON3_SDAHT 0x08
2202 #define _SSPCON3_BOEN 0x10
2203 #define _SSPCON3_SCIE 0x20
2204 #define _SSPCON3_PCIE 0x40
2205 #define _SSPCON3_ACKTIM 0x80
2206
2207 //==============================================================================
2208
2209
2210 //==============================================================================
2211 // IOCAP Bits
2212
2213 extern __at(0x0391) __sfr IOCAP;
2214
2215 typedef union
2216 {
2217 struct
2218 {
2219 unsigned IOCAP0 : 1;
2220 unsigned IOCAP1 : 1;
2221 unsigned IOCAP2 : 1;
2222 unsigned IOCAP3 : 1;
2223 unsigned IOCAP4 : 1;
2224 unsigned IOCAP5 : 1;
2225 unsigned : 1;
2226 unsigned : 1;
2227 };
2228
2229 struct
2230 {
2231 unsigned IOCAP : 6;
2232 unsigned : 2;
2233 };
2234 } __IOCAPbits_t;
2235
2236 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2237
2238 #define _IOCAP0 0x01
2239 #define _IOCAP1 0x02
2240 #define _IOCAP2 0x04
2241 #define _IOCAP3 0x08
2242 #define _IOCAP4 0x10
2243 #define _IOCAP5 0x20
2244
2245 //==============================================================================
2246
2247
2248 //==============================================================================
2249 // IOCAN Bits
2250
2251 extern __at(0x0392) __sfr IOCAN;
2252
2253 typedef union
2254 {
2255 struct
2256 {
2257 unsigned IOCAN0 : 1;
2258 unsigned IOCAN1 : 1;
2259 unsigned IOCAN2 : 1;
2260 unsigned IOCAN3 : 1;
2261 unsigned IOCAN4 : 1;
2262 unsigned IOCAN5 : 1;
2263 unsigned : 1;
2264 unsigned : 1;
2265 };
2266
2267 struct
2268 {
2269 unsigned IOCAN : 6;
2270 unsigned : 2;
2271 };
2272 } __IOCANbits_t;
2273
2274 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2275
2276 #define _IOCAN0 0x01
2277 #define _IOCAN1 0x02
2278 #define _IOCAN2 0x04
2279 #define _IOCAN3 0x08
2280 #define _IOCAN4 0x10
2281 #define _IOCAN5 0x20
2282
2283 //==============================================================================
2284
2285
2286 //==============================================================================
2287 // IOCAF Bits
2288
2289 extern __at(0x0393) __sfr IOCAF;
2290
2291 typedef union
2292 {
2293 struct
2294 {
2295 unsigned IOCAF0 : 1;
2296 unsigned IOCAF1 : 1;
2297 unsigned IOCAF2 : 1;
2298 unsigned IOCAF3 : 1;
2299 unsigned IOCAF4 : 1;
2300 unsigned IOCAF5 : 1;
2301 unsigned : 1;
2302 unsigned : 1;
2303 };
2304
2305 struct
2306 {
2307 unsigned IOCAF : 6;
2308 unsigned : 2;
2309 };
2310 } __IOCAFbits_t;
2311
2312 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2313
2314 #define _IOCAF0 0x01
2315 #define _IOCAF1 0x02
2316 #define _IOCAF2 0x04
2317 #define _IOCAF3 0x08
2318 #define _IOCAF4 0x10
2319 #define _IOCAF5 0x20
2320
2321 //==============================================================================
2322
2323
2324 //==============================================================================
2325 // IOCBP Bits
2326
2327 extern __at(0x0394) __sfr IOCBP;
2328
2329 typedef struct
2330 {
2331 unsigned : 1;
2332 unsigned : 1;
2333 unsigned : 1;
2334 unsigned : 1;
2335 unsigned IOCBP4 : 1;
2336 unsigned IOCBP5 : 1;
2337 unsigned IOCBP6 : 1;
2338 unsigned IOCBP7 : 1;
2339 } __IOCBPbits_t;
2340
2341 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
2342
2343 #define _IOCBP4 0x10
2344 #define _IOCBP5 0x20
2345 #define _IOCBP6 0x40
2346 #define _IOCBP7 0x80
2347
2348 //==============================================================================
2349
2350
2351 //==============================================================================
2352 // IOCBN Bits
2353
2354 extern __at(0x0395) __sfr IOCBN;
2355
2356 typedef struct
2357 {
2358 unsigned : 1;
2359 unsigned : 1;
2360 unsigned : 1;
2361 unsigned : 1;
2362 unsigned IOCBN4 : 1;
2363 unsigned IOCBN5 : 1;
2364 unsigned IOCBN6 : 1;
2365 unsigned IOCBN7 : 1;
2366 } __IOCBNbits_t;
2367
2368 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
2369
2370 #define _IOCBN4 0x10
2371 #define _IOCBN5 0x20
2372 #define _IOCBN6 0x40
2373 #define _IOCBN7 0x80
2374
2375 //==============================================================================
2376
2377
2378 //==============================================================================
2379 // IOCBF Bits
2380
2381 extern __at(0x0396) __sfr IOCBF;
2382
2383 typedef struct
2384 {
2385 unsigned : 1;
2386 unsigned : 1;
2387 unsigned : 1;
2388 unsigned : 1;
2389 unsigned IOCBF4 : 1;
2390 unsigned IOCBF5 : 1;
2391 unsigned IOCBF6 : 1;
2392 unsigned IOCBF7 : 1;
2393 } __IOCBFbits_t;
2394
2395 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
2396
2397 #define _IOCBF4 0x10
2398 #define _IOCBF5 0x20
2399 #define _IOCBF6 0x40
2400 #define _IOCBF7 0x80
2401
2402 //==============================================================================
2403
2404 extern __at(0x0498) __sfr NCO1ACC;
2405
2406 //==============================================================================
2407 // NCO1ACCL Bits
2408
2409 extern __at(0x0498) __sfr NCO1ACCL;
2410
2411 typedef struct
2412 {
2413 unsigned NCO1ACC0 : 1;
2414 unsigned NCO1ACC1 : 1;
2415 unsigned NCO1ACC2 : 1;
2416 unsigned NCO1ACC3 : 1;
2417 unsigned NCO1ACC4 : 1;
2418 unsigned NCO1ACC5 : 1;
2419 unsigned NCO1ACC6 : 1;
2420 unsigned NCO1ACC7 : 1;
2421 } __NCO1ACCLbits_t;
2422
2423 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits;
2424
2425 #define _NCO1ACC0 0x01
2426 #define _NCO1ACC1 0x02
2427 #define _NCO1ACC2 0x04
2428 #define _NCO1ACC3 0x08
2429 #define _NCO1ACC4 0x10
2430 #define _NCO1ACC5 0x20
2431 #define _NCO1ACC6 0x40
2432 #define _NCO1ACC7 0x80
2433
2434 //==============================================================================
2435
2436
2437 //==============================================================================
2438 // NCO1ACCH Bits
2439
2440 extern __at(0x0499) __sfr NCO1ACCH;
2441
2442 typedef struct
2443 {
2444 unsigned NCO1ACC8 : 1;
2445 unsigned NCO1ACC9 : 1;
2446 unsigned NCO1ACC10 : 1;
2447 unsigned NCO1ACC11 : 1;
2448 unsigned NCO1ACC12 : 1;
2449 unsigned NCO1ACC13 : 1;
2450 unsigned NCO1ACC14 : 1;
2451 unsigned NCO1ACC15 : 1;
2452 } __NCO1ACCHbits_t;
2453
2454 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits;
2455
2456 #define _NCO1ACC8 0x01
2457 #define _NCO1ACC9 0x02
2458 #define _NCO1ACC10 0x04
2459 #define _NCO1ACC11 0x08
2460 #define _NCO1ACC12 0x10
2461 #define _NCO1ACC13 0x20
2462 #define _NCO1ACC14 0x40
2463 #define _NCO1ACC15 0x80
2464
2465 //==============================================================================
2466
2467
2468 //==============================================================================
2469 // NCO1ACCU Bits
2470
2471 extern __at(0x049A) __sfr NCO1ACCU;
2472
2473 typedef struct
2474 {
2475 unsigned NCO1ACC16 : 1;
2476 unsigned NCO1ACC17 : 1;
2477 unsigned NCO1ACC18 : 1;
2478 unsigned NCO1ACC19 : 1;
2479 unsigned : 1;
2480 unsigned : 1;
2481 unsigned : 1;
2482 unsigned : 1;
2483 } __NCO1ACCUbits_t;
2484
2485 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits;
2486
2487 #define _NCO1ACC16 0x01
2488 #define _NCO1ACC17 0x02
2489 #define _NCO1ACC18 0x04
2490 #define _NCO1ACC19 0x08
2491
2492 //==============================================================================
2493
2494 extern __at(0x049B) __sfr NCO1INC;
2495
2496 //==============================================================================
2497 // NCO1INCL Bits
2498
2499 extern __at(0x049B) __sfr NCO1INCL;
2500
2501 typedef struct
2502 {
2503 unsigned NCO1INC0 : 1;
2504 unsigned NCO1INC1 : 1;
2505 unsigned NCO1INC2 : 1;
2506 unsigned NCO1INC3 : 1;
2507 unsigned NCO1INC4 : 1;
2508 unsigned NCO1INC5 : 1;
2509 unsigned NCO1INC6 : 1;
2510 unsigned NCO1INC7 : 1;
2511 } __NCO1INCLbits_t;
2512
2513 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits;
2514
2515 #define _NCO1INC0 0x01
2516 #define _NCO1INC1 0x02
2517 #define _NCO1INC2 0x04
2518 #define _NCO1INC3 0x08
2519 #define _NCO1INC4 0x10
2520 #define _NCO1INC5 0x20
2521 #define _NCO1INC6 0x40
2522 #define _NCO1INC7 0x80
2523
2524 //==============================================================================
2525
2526
2527 //==============================================================================
2528 // NCO1INCH Bits
2529
2530 extern __at(0x049C) __sfr NCO1INCH;
2531
2532 typedef struct
2533 {
2534 unsigned NCO1INC8 : 1;
2535 unsigned NCO1INC9 : 1;
2536 unsigned NCO1INC10 : 1;
2537 unsigned NCO1INC11 : 1;
2538 unsigned NCO1INC12 : 1;
2539 unsigned NCO1INC13 : 1;
2540 unsigned NCO1INC14 : 1;
2541 unsigned NCO1INC15 : 1;
2542 } __NCO1INCHbits_t;
2543
2544 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits;
2545
2546 #define _NCO1INC8 0x01
2547 #define _NCO1INC9 0x02
2548 #define _NCO1INC10 0x04
2549 #define _NCO1INC11 0x08
2550 #define _NCO1INC12 0x10
2551 #define _NCO1INC13 0x20
2552 #define _NCO1INC14 0x40
2553 #define _NCO1INC15 0x80
2554
2555 //==============================================================================
2556
2557 extern __at(0x049D) __sfr NCO1INCU;
2558
2559 //==============================================================================
2560 // NCO1CON Bits
2561
2562 extern __at(0x049E) __sfr NCO1CON;
2563
2564 typedef struct
2565 {
2566 unsigned N1PFM : 1;
2567 unsigned : 1;
2568 unsigned : 1;
2569 unsigned : 1;
2570 unsigned N1POL : 1;
2571 unsigned N1OUT : 1;
2572 unsigned N1OE : 1;
2573 unsigned N1EN : 1;
2574 } __NCO1CONbits_t;
2575
2576 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits;
2577
2578 #define _N1PFM 0x01
2579 #define _N1POL 0x10
2580 #define _N1OUT 0x20
2581 #define _N1OE 0x40
2582 #define _N1EN 0x80
2583
2584 //==============================================================================
2585
2586
2587 //==============================================================================
2588 // NCO1CLK Bits
2589
2590 extern __at(0x049F) __sfr NCO1CLK;
2591
2592 typedef union
2593 {
2594 struct
2595 {
2596 unsigned N1CKS0 : 1;
2597 unsigned N1CKS1 : 1;
2598 unsigned : 1;
2599 unsigned : 1;
2600 unsigned : 1;
2601 unsigned N1PWS0 : 1;
2602 unsigned N1PWS1 : 1;
2603 unsigned N1PWS2 : 1;
2604 };
2605
2606 struct
2607 {
2608 unsigned N1CKS : 2;
2609 unsigned : 6;
2610 };
2611
2612 struct
2613 {
2614 unsigned : 5;
2615 unsigned N1PWS : 3;
2616 };
2617 } __NCO1CLKbits_t;
2618
2619 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits;
2620
2621 #define _N1CKS0 0x01
2622 #define _N1CKS1 0x02
2623 #define _N1PWS0 0x20
2624 #define _N1PWS1 0x40
2625 #define _N1PWS2 0x80
2626
2627 //==============================================================================
2628
2629
2630 //==============================================================================
2631 // PWM1DCL Bits
2632
2633 extern __at(0x0611) __sfr PWM1DCL;
2634
2635 typedef union
2636 {
2637 struct
2638 {
2639 unsigned : 1;
2640 unsigned : 1;
2641 unsigned : 1;
2642 unsigned : 1;
2643 unsigned : 1;
2644 unsigned : 1;
2645 unsigned PWM1DCL0 : 1;
2646 unsigned PWM1DCL1 : 1;
2647 };
2648
2649 struct
2650 {
2651 unsigned : 6;
2652 unsigned PWM1DCL : 2;
2653 };
2654 } __PWM1DCLbits_t;
2655
2656 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
2657
2658 #define _PWM1DCL0 0x40
2659 #define _PWM1DCL1 0x80
2660
2661 //==============================================================================
2662
2663
2664 //==============================================================================
2665 // PWM1DCH Bits
2666
2667 extern __at(0x0612) __sfr PWM1DCH;
2668
2669 typedef struct
2670 {
2671 unsigned PWM1DCH0 : 1;
2672 unsigned PWM1DCH1 : 1;
2673 unsigned PWM1DCH2 : 1;
2674 unsigned PWM1DCH3 : 1;
2675 unsigned PWM1DCH4 : 1;
2676 unsigned PWM1DCH5 : 1;
2677 unsigned PWM1DCH6 : 1;
2678 unsigned PWM1DCH7 : 1;
2679 } __PWM1DCHbits_t;
2680
2681 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
2682
2683 #define _PWM1DCH0 0x01
2684 #define _PWM1DCH1 0x02
2685 #define _PWM1DCH2 0x04
2686 #define _PWM1DCH3 0x08
2687 #define _PWM1DCH4 0x10
2688 #define _PWM1DCH5 0x20
2689 #define _PWM1DCH6 0x40
2690 #define _PWM1DCH7 0x80
2691
2692 //==============================================================================
2693
2694
2695 //==============================================================================
2696 // PWM1CON Bits
2697
2698 extern __at(0x0613) __sfr PWM1CON;
2699
2700 typedef struct
2701 {
2702 unsigned : 1;
2703 unsigned : 1;
2704 unsigned : 1;
2705 unsigned : 1;
2706 unsigned PWM1POL : 1;
2707 unsigned PWM1OUT : 1;
2708 unsigned PWM1OE : 1;
2709 unsigned PWM1EN : 1;
2710 } __PWM1CONbits_t;
2711
2712 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
2713
2714 #define _PWM1POL 0x10
2715 #define _PWM1OUT 0x20
2716 #define _PWM1OE 0x40
2717 #define _PWM1EN 0x80
2718
2719 //==============================================================================
2720
2721
2722 //==============================================================================
2723 // PWM1CON0 Bits
2724
2725 extern __at(0x0613) __sfr PWM1CON0;
2726
2727 typedef struct
2728 {
2729 unsigned : 1;
2730 unsigned : 1;
2731 unsigned : 1;
2732 unsigned : 1;
2733 unsigned PWM1POL : 1;
2734 unsigned PWM1OUT : 1;
2735 unsigned PWM1OE : 1;
2736 unsigned PWM1EN : 1;
2737 } __PWM1CON0bits_t;
2738
2739 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
2740
2741 #define _PWM1CON0_PWM1POL 0x10
2742 #define _PWM1CON0_PWM1OUT 0x20
2743 #define _PWM1CON0_PWM1OE 0x40
2744 #define _PWM1CON0_PWM1EN 0x80
2745
2746 //==============================================================================
2747
2748
2749 //==============================================================================
2750 // PWM2DCL Bits
2751
2752 extern __at(0x0614) __sfr PWM2DCL;
2753
2754 typedef union
2755 {
2756 struct
2757 {
2758 unsigned : 1;
2759 unsigned : 1;
2760 unsigned : 1;
2761 unsigned : 1;
2762 unsigned : 1;
2763 unsigned : 1;
2764 unsigned PWM2DCL0 : 1;
2765 unsigned PWM2DCL1 : 1;
2766 };
2767
2768 struct
2769 {
2770 unsigned : 6;
2771 unsigned PWM2DCL : 2;
2772 };
2773 } __PWM2DCLbits_t;
2774
2775 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
2776
2777 #define _PWM2DCL0 0x40
2778 #define _PWM2DCL1 0x80
2779
2780 //==============================================================================
2781
2782
2783 //==============================================================================
2784 // PWM2DCH Bits
2785
2786 extern __at(0x0615) __sfr PWM2DCH;
2787
2788 typedef struct
2789 {
2790 unsigned PWM2DCH0 : 1;
2791 unsigned PWM2DCH1 : 1;
2792 unsigned PWM2DCH2 : 1;
2793 unsigned PWM2DCH3 : 1;
2794 unsigned PWM2DCH4 : 1;
2795 unsigned PWM2DCH5 : 1;
2796 unsigned PWM2DCH6 : 1;
2797 unsigned PWM2DCH7 : 1;
2798 } __PWM2DCHbits_t;
2799
2800 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
2801
2802 #define _PWM2DCH0 0x01
2803 #define _PWM2DCH1 0x02
2804 #define _PWM2DCH2 0x04
2805 #define _PWM2DCH3 0x08
2806 #define _PWM2DCH4 0x10
2807 #define _PWM2DCH5 0x20
2808 #define _PWM2DCH6 0x40
2809 #define _PWM2DCH7 0x80
2810
2811 //==============================================================================
2812
2813
2814 //==============================================================================
2815 // PWM2CON Bits
2816
2817 extern __at(0x0616) __sfr PWM2CON;
2818
2819 typedef struct
2820 {
2821 unsigned : 1;
2822 unsigned : 1;
2823 unsigned : 1;
2824 unsigned : 1;
2825 unsigned PWM2POL : 1;
2826 unsigned PWM2OUT : 1;
2827 unsigned PWM2OE : 1;
2828 unsigned PWM2EN : 1;
2829 } __PWM2CONbits_t;
2830
2831 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
2832
2833 #define _PWM2POL 0x10
2834 #define _PWM2OUT 0x20
2835 #define _PWM2OE 0x40
2836 #define _PWM2EN 0x80
2837
2838 //==============================================================================
2839
2840
2841 //==============================================================================
2842 // PWM2CON0 Bits
2843
2844 extern __at(0x0616) __sfr PWM2CON0;
2845
2846 typedef struct
2847 {
2848 unsigned : 1;
2849 unsigned : 1;
2850 unsigned : 1;
2851 unsigned : 1;
2852 unsigned PWM2POL : 1;
2853 unsigned PWM2OUT : 1;
2854 unsigned PWM2OE : 1;
2855 unsigned PWM2EN : 1;
2856 } __PWM2CON0bits_t;
2857
2858 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
2859
2860 #define _PWM2CON0_PWM2POL 0x10
2861 #define _PWM2CON0_PWM2OUT 0x20
2862 #define _PWM2CON0_PWM2OE 0x40
2863 #define _PWM2CON0_PWM2EN 0x80
2864
2865 //==============================================================================
2866
2867
2868 //==============================================================================
2869 // PWM3DCL Bits
2870
2871 extern __at(0x0617) __sfr PWM3DCL;
2872
2873 typedef union
2874 {
2875 struct
2876 {
2877 unsigned : 1;
2878 unsigned : 1;
2879 unsigned : 1;
2880 unsigned : 1;
2881 unsigned : 1;
2882 unsigned : 1;
2883 unsigned PWM3DCL0 : 1;
2884 unsigned PWM3DCL1 : 1;
2885 };
2886
2887 struct
2888 {
2889 unsigned : 6;
2890 unsigned PWM3DCL : 2;
2891 };
2892 } __PWM3DCLbits_t;
2893
2894 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
2895
2896 #define _PWM3DCL0 0x40
2897 #define _PWM3DCL1 0x80
2898
2899 //==============================================================================
2900
2901
2902 //==============================================================================
2903 // PWM3DCH Bits
2904
2905 extern __at(0x0618) __sfr PWM3DCH;
2906
2907 typedef struct
2908 {
2909 unsigned PWM3DCH0 : 1;
2910 unsigned PWM3DCH1 : 1;
2911 unsigned PWM3DCH2 : 1;
2912 unsigned PWM3DCH3 : 1;
2913 unsigned PWM3DCH4 : 1;
2914 unsigned PWM3DCH5 : 1;
2915 unsigned PWM3DCH6 : 1;
2916 unsigned PWM3DCH7 : 1;
2917 } __PWM3DCHbits_t;
2918
2919 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
2920
2921 #define _PWM3DCH0 0x01
2922 #define _PWM3DCH1 0x02
2923 #define _PWM3DCH2 0x04
2924 #define _PWM3DCH3 0x08
2925 #define _PWM3DCH4 0x10
2926 #define _PWM3DCH5 0x20
2927 #define _PWM3DCH6 0x40
2928 #define _PWM3DCH7 0x80
2929
2930 //==============================================================================
2931
2932
2933 //==============================================================================
2934 // PWM3CON Bits
2935
2936 extern __at(0x0619) __sfr PWM3CON;
2937
2938 typedef struct
2939 {
2940 unsigned : 1;
2941 unsigned : 1;
2942 unsigned : 1;
2943 unsigned : 1;
2944 unsigned PWM3POL : 1;
2945 unsigned PWM3OUT : 1;
2946 unsigned PWM3OE : 1;
2947 unsigned PWM3EN : 1;
2948 } __PWM3CONbits_t;
2949
2950 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
2951
2952 #define _PWM3POL 0x10
2953 #define _PWM3OUT 0x20
2954 #define _PWM3OE 0x40
2955 #define _PWM3EN 0x80
2956
2957 //==============================================================================
2958
2959
2960 //==============================================================================
2961 // PWM3CON0 Bits
2962
2963 extern __at(0x0619) __sfr PWM3CON0;
2964
2965 typedef struct
2966 {
2967 unsigned : 1;
2968 unsigned : 1;
2969 unsigned : 1;
2970 unsigned : 1;
2971 unsigned PWM3POL : 1;
2972 unsigned PWM3OUT : 1;
2973 unsigned PWM3OE : 1;
2974 unsigned PWM3EN : 1;
2975 } __PWM3CON0bits_t;
2976
2977 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
2978
2979 #define _PWM3CON0_PWM3POL 0x10
2980 #define _PWM3CON0_PWM3OUT 0x20
2981 #define _PWM3CON0_PWM3OE 0x40
2982 #define _PWM3CON0_PWM3EN 0x80
2983
2984 //==============================================================================
2985
2986
2987 //==============================================================================
2988 // PWM4DCL Bits
2989
2990 extern __at(0x061A) __sfr PWM4DCL;
2991
2992 typedef union
2993 {
2994 struct
2995 {
2996 unsigned : 1;
2997 unsigned : 1;
2998 unsigned : 1;
2999 unsigned : 1;
3000 unsigned : 1;
3001 unsigned : 1;
3002 unsigned PWM4DCL0 : 1;
3003 unsigned PWM4DCL1 : 1;
3004 };
3005
3006 struct
3007 {
3008 unsigned : 6;
3009 unsigned PWM4DCL : 2;
3010 };
3011 } __PWM4DCLbits_t;
3012
3013 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
3014
3015 #define _PWM4DCL0 0x40
3016 #define _PWM4DCL1 0x80
3017
3018 //==============================================================================
3019
3020
3021 //==============================================================================
3022 // PWM4DCH Bits
3023
3024 extern __at(0x061B) __sfr PWM4DCH;
3025
3026 typedef struct
3027 {
3028 unsigned PWM4DCH0 : 1;
3029 unsigned PWM4DCH1 : 1;
3030 unsigned PWM4DCH2 : 1;
3031 unsigned PWM4DCH3 : 1;
3032 unsigned PWM4DCH4 : 1;
3033 unsigned PWM4DCH5 : 1;
3034 unsigned PWM4DCH6 : 1;
3035 unsigned PWM4DCH7 : 1;
3036 } __PWM4DCHbits_t;
3037
3038 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
3039
3040 #define _PWM4DCH0 0x01
3041 #define _PWM4DCH1 0x02
3042 #define _PWM4DCH2 0x04
3043 #define _PWM4DCH3 0x08
3044 #define _PWM4DCH4 0x10
3045 #define _PWM4DCH5 0x20
3046 #define _PWM4DCH6 0x40
3047 #define _PWM4DCH7 0x80
3048
3049 //==============================================================================
3050
3051
3052 //==============================================================================
3053 // PWM4CON Bits
3054
3055 extern __at(0x061C) __sfr PWM4CON;
3056
3057 typedef struct
3058 {
3059 unsigned : 1;
3060 unsigned : 1;
3061 unsigned : 1;
3062 unsigned : 1;
3063 unsigned PWM4POL : 1;
3064 unsigned PWM4OUT : 1;
3065 unsigned PWM4OE : 1;
3066 unsigned PWM4EN : 1;
3067 } __PWM4CONbits_t;
3068
3069 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
3070
3071 #define _PWM4POL 0x10
3072 #define _PWM4OUT 0x20
3073 #define _PWM4OE 0x40
3074 #define _PWM4EN 0x80
3075
3076 //==============================================================================
3077
3078
3079 //==============================================================================
3080 // PWM4CON0 Bits
3081
3082 extern __at(0x061C) __sfr PWM4CON0;
3083
3084 typedef struct
3085 {
3086 unsigned : 1;
3087 unsigned : 1;
3088 unsigned : 1;
3089 unsigned : 1;
3090 unsigned PWM4POL : 1;
3091 unsigned PWM4OUT : 1;
3092 unsigned PWM4OE : 1;
3093 unsigned PWM4EN : 1;
3094 } __PWM4CON0bits_t;
3095
3096 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
3097
3098 #define _PWM4CON0_PWM4POL 0x10
3099 #define _PWM4CON0_PWM4OUT 0x20
3100 #define _PWM4CON0_PWM4OE 0x40
3101 #define _PWM4CON0_PWM4EN 0x80
3102
3103 //==============================================================================
3104
3105
3106 //==============================================================================
3107 // CWG1DBR Bits
3108
3109 extern __at(0x0691) __sfr CWG1DBR;
3110
3111 typedef union
3112 {
3113 struct
3114 {
3115 unsigned CWG1DBR0 : 1;
3116 unsigned CWG1DBR1 : 1;
3117 unsigned CWG1DBR2 : 1;
3118 unsigned CWG1DBR3 : 1;
3119 unsigned CWG1DBR4 : 1;
3120 unsigned CWG1DBR5 : 1;
3121 unsigned : 1;
3122 unsigned : 1;
3123 };
3124
3125 struct
3126 {
3127 unsigned CWG1DBR : 6;
3128 unsigned : 2;
3129 };
3130 } __CWG1DBRbits_t;
3131
3132 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
3133
3134 #define _CWG1DBR0 0x01
3135 #define _CWG1DBR1 0x02
3136 #define _CWG1DBR2 0x04
3137 #define _CWG1DBR3 0x08
3138 #define _CWG1DBR4 0x10
3139 #define _CWG1DBR5 0x20
3140
3141 //==============================================================================
3142
3143
3144 //==============================================================================
3145 // CWG1DBF Bits
3146
3147 extern __at(0x0692) __sfr CWG1DBF;
3148
3149 typedef union
3150 {
3151 struct
3152 {
3153 unsigned CWG1DBF0 : 1;
3154 unsigned CWG1DBF1 : 1;
3155 unsigned CWG1DBF2 : 1;
3156 unsigned CWG1DBF3 : 1;
3157 unsigned CWG1DBF4 : 1;
3158 unsigned CWG1DBF5 : 1;
3159 unsigned : 1;
3160 unsigned : 1;
3161 };
3162
3163 struct
3164 {
3165 unsigned CWG1DBF : 6;
3166 unsigned : 2;
3167 };
3168 } __CWG1DBFbits_t;
3169
3170 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
3171
3172 #define _CWG1DBF0 0x01
3173 #define _CWG1DBF1 0x02
3174 #define _CWG1DBF2 0x04
3175 #define _CWG1DBF3 0x08
3176 #define _CWG1DBF4 0x10
3177 #define _CWG1DBF5 0x20
3178
3179 //==============================================================================
3180
3181
3182 //==============================================================================
3183 // CWG1CON0 Bits
3184
3185 extern __at(0x0693) __sfr CWG1CON0;
3186
3187 typedef struct
3188 {
3189 unsigned G1CS0 : 1;
3190 unsigned : 1;
3191 unsigned : 1;
3192 unsigned G1POLA : 1;
3193 unsigned G1POLB : 1;
3194 unsigned G1OEA : 1;
3195 unsigned G1OEB : 1;
3196 unsigned G1EN : 1;
3197 } __CWG1CON0bits_t;
3198
3199 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
3200
3201 #define _G1CS0 0x01
3202 #define _G1POLA 0x08
3203 #define _G1POLB 0x10
3204 #define _G1OEA 0x20
3205 #define _G1OEB 0x40
3206 #define _G1EN 0x80
3207
3208 //==============================================================================
3209
3210
3211 //==============================================================================
3212 // CWG1CON1 Bits
3213
3214 extern __at(0x0694) __sfr CWG1CON1;
3215
3216 typedef union
3217 {
3218 struct
3219 {
3220 unsigned G1IS0 : 1;
3221 unsigned G1IS1 : 1;
3222 unsigned G1IS2 : 1;
3223 unsigned : 1;
3224 unsigned G1ASDLA0 : 1;
3225 unsigned G1ASDLA1 : 1;
3226 unsigned G1ASDLB0 : 1;
3227 unsigned G1ASDLB1 : 1;
3228 };
3229
3230 struct
3231 {
3232 unsigned G1IS : 3;
3233 unsigned : 5;
3234 };
3235
3236 struct
3237 {
3238 unsigned : 4;
3239 unsigned G1ASDLA : 2;
3240 unsigned : 2;
3241 };
3242
3243 struct
3244 {
3245 unsigned : 6;
3246 unsigned G1ASDLB : 2;
3247 };
3248 } __CWG1CON1bits_t;
3249
3250 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
3251
3252 #define _G1IS0 0x01
3253 #define _G1IS1 0x02
3254 #define _G1IS2 0x04
3255 #define _G1ASDLA0 0x10
3256 #define _G1ASDLA1 0x20
3257 #define _G1ASDLB0 0x40
3258 #define _G1ASDLB1 0x80
3259
3260 //==============================================================================
3261
3262
3263 //==============================================================================
3264 // CWG1CON2 Bits
3265
3266 extern __at(0x0695) __sfr CWG1CON2;
3267
3268 typedef struct
3269 {
3270 unsigned G1ASDSCLC2 : 1;
3271 unsigned G1ASDSFLT : 1;
3272 unsigned G1ASDSC1 : 1;
3273 unsigned G1ASDSC2 : 1;
3274 unsigned : 1;
3275 unsigned : 1;
3276 unsigned G1ARSEN : 1;
3277 unsigned G1ASE : 1;
3278 } __CWG1CON2bits_t;
3279
3280 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
3281
3282 #define _G1ASDSCLC2 0x01
3283 #define _G1ASDSFLT 0x02
3284 #define _G1ASDSC1 0x04
3285 #define _G1ASDSC2 0x08
3286 #define _G1ARSEN 0x40
3287 #define _G1ASE 0x80
3288
3289 //==============================================================================
3290
3291
3292 //==============================================================================
3293 // CLCDATA Bits
3294
3295 extern __at(0x0F0F) __sfr CLCDATA;
3296
3297 typedef struct
3298 {
3299 unsigned MCLC1OUT : 1;
3300 unsigned MCLC2OUT : 1;
3301 unsigned MCLC3OUT : 1;
3302 unsigned MCLC4OUT : 1;
3303 unsigned : 1;
3304 unsigned : 1;
3305 unsigned : 1;
3306 unsigned : 1;
3307 } __CLCDATAbits_t;
3308
3309 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
3310
3311 #define _MCLC1OUT 0x01
3312 #define _MCLC2OUT 0x02
3313 #define _MCLC3OUT 0x04
3314 #define _MCLC4OUT 0x08
3315
3316 //==============================================================================
3317
3318
3319 //==============================================================================
3320 // CLC1CON Bits
3321
3322 extern __at(0x0F10) __sfr CLC1CON;
3323
3324 typedef union
3325 {
3326 struct
3327 {
3328 unsigned LC1MODE0 : 1;
3329 unsigned LC1MODE1 : 1;
3330 unsigned LC1MODE2 : 1;
3331 unsigned LC1INTN : 1;
3332 unsigned LC1INTP : 1;
3333 unsigned LC1OUT : 1;
3334 unsigned LC1OE : 1;
3335 unsigned LC1EN : 1;
3336 };
3337
3338 struct
3339 {
3340 unsigned LCMODE0 : 1;
3341 unsigned LCMODE1 : 1;
3342 unsigned LCMODE2 : 1;
3343 unsigned LCINTN : 1;
3344 unsigned LCINTP : 1;
3345 unsigned LCOUT : 1;
3346 unsigned LCOE : 1;
3347 unsigned LCEN : 1;
3348 };
3349
3350 struct
3351 {
3352 unsigned LCMODE : 3;
3353 unsigned : 5;
3354 };
3355
3356 struct
3357 {
3358 unsigned LC1MODE : 3;
3359 unsigned : 5;
3360 };
3361 } __CLC1CONbits_t;
3362
3363 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
3364
3365 #define _LC1MODE0 0x01
3366 #define _LCMODE0 0x01
3367 #define _LC1MODE1 0x02
3368 #define _LCMODE1 0x02
3369 #define _LC1MODE2 0x04
3370 #define _LCMODE2 0x04
3371 #define _LC1INTN 0x08
3372 #define _LCINTN 0x08
3373 #define _LC1INTP 0x10
3374 #define _LCINTP 0x10
3375 #define _LC1OUT 0x20
3376 #define _LCOUT 0x20
3377 #define _LC1OE 0x40
3378 #define _LCOE 0x40
3379 #define _LC1EN 0x80
3380 #define _LCEN 0x80
3381
3382 //==============================================================================
3383
3384
3385 //==============================================================================
3386 // CLC1POL Bits
3387
3388 extern __at(0x0F11) __sfr CLC1POL;
3389
3390 typedef union
3391 {
3392 struct
3393 {
3394 unsigned LC1G1POL : 1;
3395 unsigned LC1G2POL : 1;
3396 unsigned LC1G3POL : 1;
3397 unsigned LC1G4POL : 1;
3398 unsigned : 1;
3399 unsigned : 1;
3400 unsigned : 1;
3401 unsigned LC1POL : 1;
3402 };
3403
3404 struct
3405 {
3406 unsigned G1POL : 1;
3407 unsigned G2POL : 1;
3408 unsigned G3POL : 1;
3409 unsigned G4POL : 1;
3410 unsigned : 1;
3411 unsigned : 1;
3412 unsigned : 1;
3413 unsigned POL : 1;
3414 };
3415 } __CLC1POLbits_t;
3416
3417 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
3418
3419 #define _LC1G1POL 0x01
3420 #define _G1POL 0x01
3421 #define _LC1G2POL 0x02
3422 #define _G2POL 0x02
3423 #define _LC1G3POL 0x04
3424 #define _G3POL 0x04
3425 #define _LC1G4POL 0x08
3426 #define _G4POL 0x08
3427 #define _LC1POL 0x80
3428 #define _POL 0x80
3429
3430 //==============================================================================
3431
3432
3433 //==============================================================================
3434 // CLC1SEL0 Bits
3435
3436 extern __at(0x0F12) __sfr CLC1SEL0;
3437
3438 typedef union
3439 {
3440 struct
3441 {
3442 unsigned LC1D1S0 : 1;
3443 unsigned LC1D1S1 : 1;
3444 unsigned LC1D1S2 : 1;
3445 unsigned : 1;
3446 unsigned LC1D2S0 : 1;
3447 unsigned LC1D2S1 : 1;
3448 unsigned LC1D2S2 : 1;
3449 unsigned : 1;
3450 };
3451
3452 struct
3453 {
3454 unsigned D1S0 : 1;
3455 unsigned D1S1 : 1;
3456 unsigned D1S2 : 1;
3457 unsigned : 1;
3458 unsigned D2S0 : 1;
3459 unsigned D2S1 : 1;
3460 unsigned D2S2 : 1;
3461 unsigned : 1;
3462 };
3463
3464 struct
3465 {
3466 unsigned D1S : 3;
3467 unsigned : 5;
3468 };
3469
3470 struct
3471 {
3472 unsigned LC1D1S : 3;
3473 unsigned : 5;
3474 };
3475
3476 struct
3477 {
3478 unsigned : 4;
3479 unsigned D2S : 3;
3480 unsigned : 1;
3481 };
3482
3483 struct
3484 {
3485 unsigned : 4;
3486 unsigned LC1D2S : 3;
3487 unsigned : 1;
3488 };
3489 } __CLC1SEL0bits_t;
3490
3491 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
3492
3493 #define _LC1D1S0 0x01
3494 #define _D1S0 0x01
3495 #define _LC1D1S1 0x02
3496 #define _D1S1 0x02
3497 #define _LC1D1S2 0x04
3498 #define _D1S2 0x04
3499 #define _LC1D2S0 0x10
3500 #define _D2S0 0x10
3501 #define _LC1D2S1 0x20
3502 #define _D2S1 0x20
3503 #define _LC1D2S2 0x40
3504 #define _D2S2 0x40
3505
3506 //==============================================================================
3507
3508
3509 //==============================================================================
3510 // CLC1SEL1 Bits
3511
3512 extern __at(0x0F13) __sfr CLC1SEL1;
3513
3514 typedef union
3515 {
3516 struct
3517 {
3518 unsigned LC1D3S0 : 1;
3519 unsigned LC1D3S1 : 1;
3520 unsigned LC1D3S2 : 1;
3521 unsigned : 1;
3522 unsigned LC1D4S0 : 1;
3523 unsigned LC1D4S1 : 1;
3524 unsigned LC1D4S2 : 1;
3525 unsigned : 1;
3526 };
3527
3528 struct
3529 {
3530 unsigned D3S0 : 1;
3531 unsigned D3S1 : 1;
3532 unsigned D3S2 : 1;
3533 unsigned : 1;
3534 unsigned D4S0 : 1;
3535 unsigned D4S1 : 1;
3536 unsigned D4S2 : 1;
3537 unsigned : 1;
3538 };
3539
3540 struct
3541 {
3542 unsigned D3S : 3;
3543 unsigned : 5;
3544 };
3545
3546 struct
3547 {
3548 unsigned LC1D3S : 3;
3549 unsigned : 5;
3550 };
3551
3552 struct
3553 {
3554 unsigned : 4;
3555 unsigned D4S : 3;
3556 unsigned : 1;
3557 };
3558
3559 struct
3560 {
3561 unsigned : 4;
3562 unsigned LC1D4S : 3;
3563 unsigned : 1;
3564 };
3565 } __CLC1SEL1bits_t;
3566
3567 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
3568
3569 #define _LC1D3S0 0x01
3570 #define _D3S0 0x01
3571 #define _LC1D3S1 0x02
3572 #define _D3S1 0x02
3573 #define _LC1D3S2 0x04
3574 #define _D3S2 0x04
3575 #define _LC1D4S0 0x10
3576 #define _D4S0 0x10
3577 #define _LC1D4S1 0x20
3578 #define _D4S1 0x20
3579 #define _LC1D4S2 0x40
3580 #define _D4S2 0x40
3581
3582 //==============================================================================
3583
3584
3585 //==============================================================================
3586 // CLC1GLS0 Bits
3587
3588 extern __at(0x0F14) __sfr CLC1GLS0;
3589
3590 typedef union
3591 {
3592 struct
3593 {
3594 unsigned LC1G1D1N : 1;
3595 unsigned LC1G1D1T : 1;
3596 unsigned LC1G1D2N : 1;
3597 unsigned LC1G1D2T : 1;
3598 unsigned LC1G1D3N : 1;
3599 unsigned LC1G1D3T : 1;
3600 unsigned LC1G1D4N : 1;
3601 unsigned LC1G1D4T : 1;
3602 };
3603
3604 struct
3605 {
3606 unsigned D1N : 1;
3607 unsigned D1T : 1;
3608 unsigned D2N : 1;
3609 unsigned D2T : 1;
3610 unsigned D3N : 1;
3611 unsigned D3T : 1;
3612 unsigned D4N : 1;
3613 unsigned D4T : 1;
3614 };
3615 } __CLC1GLS0bits_t;
3616
3617 extern __at(0x0F14) volatile __CLC1GLS0bits_t CLC1GLS0bits;
3618
3619 #define _LC1G1D1N 0x01
3620 #define _D1N 0x01
3621 #define _LC1G1D1T 0x02
3622 #define _D1T 0x02
3623 #define _LC1G1D2N 0x04
3624 #define _D2N 0x04
3625 #define _LC1G1D2T 0x08
3626 #define _D2T 0x08
3627 #define _LC1G1D3N 0x10
3628 #define _D3N 0x10
3629 #define _LC1G1D3T 0x20
3630 #define _D3T 0x20
3631 #define _LC1G1D4N 0x40
3632 #define _D4N 0x40
3633 #define _LC1G1D4T 0x80
3634 #define _D4T 0x80
3635
3636 //==============================================================================
3637
3638
3639 //==============================================================================
3640 // CLC1GLS1 Bits
3641
3642 extern __at(0x0F15) __sfr CLC1GLS1;
3643
3644 typedef union
3645 {
3646 struct
3647 {
3648 unsigned LC1G2D1N : 1;
3649 unsigned LC1G2D1T : 1;
3650 unsigned LC1G2D2N : 1;
3651 unsigned LC1G2D2T : 1;
3652 unsigned LC1G2D3N : 1;
3653 unsigned LC1G2D3T : 1;
3654 unsigned LC1G2D4N : 1;
3655 unsigned LC1G2D4T : 1;
3656 };
3657
3658 struct
3659 {
3660 unsigned D1N : 1;
3661 unsigned D1T : 1;
3662 unsigned D2N : 1;
3663 unsigned D2T : 1;
3664 unsigned D3N : 1;
3665 unsigned D3T : 1;
3666 unsigned D4N : 1;
3667 unsigned D4T : 1;
3668 };
3669 } __CLC1GLS1bits_t;
3670
3671 extern __at(0x0F15) volatile __CLC1GLS1bits_t CLC1GLS1bits;
3672
3673 #define _CLC1GLS1_LC1G2D1N 0x01
3674 #define _CLC1GLS1_D1N 0x01
3675 #define _CLC1GLS1_LC1G2D1T 0x02
3676 #define _CLC1GLS1_D1T 0x02
3677 #define _CLC1GLS1_LC1G2D2N 0x04
3678 #define _CLC1GLS1_D2N 0x04
3679 #define _CLC1GLS1_LC1G2D2T 0x08
3680 #define _CLC1GLS1_D2T 0x08
3681 #define _CLC1GLS1_LC1G2D3N 0x10
3682 #define _CLC1GLS1_D3N 0x10
3683 #define _CLC1GLS1_LC1G2D3T 0x20
3684 #define _CLC1GLS1_D3T 0x20
3685 #define _CLC1GLS1_LC1G2D4N 0x40
3686 #define _CLC1GLS1_D4N 0x40
3687 #define _CLC1GLS1_LC1G2D4T 0x80
3688 #define _CLC1GLS1_D4T 0x80
3689
3690 //==============================================================================
3691
3692
3693 //==============================================================================
3694 // CLC1GLS2 Bits
3695
3696 extern __at(0x0F16) __sfr CLC1GLS2;
3697
3698 typedef union
3699 {
3700 struct
3701 {
3702 unsigned LC1G3D1N : 1;
3703 unsigned LC1G3D1T : 1;
3704 unsigned LC1G3D2N : 1;
3705 unsigned LC1G3D2T : 1;
3706 unsigned LC1G3D3N : 1;
3707 unsigned LC1G3D3T : 1;
3708 unsigned LC1G3D4N : 1;
3709 unsigned LC1G3D4T : 1;
3710 };
3711
3712 struct
3713 {
3714 unsigned D1N : 1;
3715 unsigned D1T : 1;
3716 unsigned D2N : 1;
3717 unsigned D2T : 1;
3718 unsigned D3N : 1;
3719 unsigned D3T : 1;
3720 unsigned D4N : 1;
3721 unsigned D4T : 1;
3722 };
3723 } __CLC1GLS2bits_t;
3724
3725 extern __at(0x0F16) volatile __CLC1GLS2bits_t CLC1GLS2bits;
3726
3727 #define _CLC1GLS2_LC1G3D1N 0x01
3728 #define _CLC1GLS2_D1N 0x01
3729 #define _CLC1GLS2_LC1G3D1T 0x02
3730 #define _CLC1GLS2_D1T 0x02
3731 #define _CLC1GLS2_LC1G3D2N 0x04
3732 #define _CLC1GLS2_D2N 0x04
3733 #define _CLC1GLS2_LC1G3D2T 0x08
3734 #define _CLC1GLS2_D2T 0x08
3735 #define _CLC1GLS2_LC1G3D3N 0x10
3736 #define _CLC1GLS2_D3N 0x10
3737 #define _CLC1GLS2_LC1G3D3T 0x20
3738 #define _CLC1GLS2_D3T 0x20
3739 #define _CLC1GLS2_LC1G3D4N 0x40
3740 #define _CLC1GLS2_D4N 0x40
3741 #define _CLC1GLS2_LC1G3D4T 0x80
3742 #define _CLC1GLS2_D4T 0x80
3743
3744 //==============================================================================
3745
3746
3747 //==============================================================================
3748 // CLC1GLS3 Bits
3749
3750 extern __at(0x0F17) __sfr CLC1GLS3;
3751
3752 typedef union
3753 {
3754 struct
3755 {
3756 unsigned LC1G4D1N : 1;
3757 unsigned LC1G4D1T : 1;
3758 unsigned LC1G4D2N : 1;
3759 unsigned LC1G4D2T : 1;
3760 unsigned LC1G4D3N : 1;
3761 unsigned LC1G4D3T : 1;
3762 unsigned LC1G4D4N : 1;
3763 unsigned LC1G4D4T : 1;
3764 };
3765
3766 struct
3767 {
3768 unsigned G4D1N : 1;
3769 unsigned G4D1T : 1;
3770 unsigned G4D2N : 1;
3771 unsigned G4D2T : 1;
3772 unsigned G4D3N : 1;
3773 unsigned G4D3T : 1;
3774 unsigned G4D4N : 1;
3775 unsigned G4D4T : 1;
3776 };
3777 } __CLC1GLS3bits_t;
3778
3779 extern __at(0x0F17) volatile __CLC1GLS3bits_t CLC1GLS3bits;
3780
3781 #define _LC1G4D1N 0x01
3782 #define _G4D1N 0x01
3783 #define _LC1G4D1T 0x02
3784 #define _G4D1T 0x02
3785 #define _LC1G4D2N 0x04
3786 #define _G4D2N 0x04
3787 #define _LC1G4D2T 0x08
3788 #define _G4D2T 0x08
3789 #define _LC1G4D3N 0x10
3790 #define _G4D3N 0x10
3791 #define _LC1G4D3T 0x20
3792 #define _G4D3T 0x20
3793 #define _LC1G4D4N 0x40
3794 #define _G4D4N 0x40
3795 #define _LC1G4D4T 0x80
3796 #define _G4D4T 0x80
3797
3798 //==============================================================================
3799
3800
3801 //==============================================================================
3802 // CLC2CON Bits
3803
3804 extern __at(0x0F18) __sfr CLC2CON;
3805
3806 typedef union
3807 {
3808 struct
3809 {
3810 unsigned LC2MODE0 : 1;
3811 unsigned LC2MODE1 : 1;
3812 unsigned LC2MODE2 : 1;
3813 unsigned LC2INTN : 1;
3814 unsigned LC2INTP : 1;
3815 unsigned LC2OUT : 1;
3816 unsigned LC2OE : 1;
3817 unsigned LC2EN : 1;
3818 };
3819
3820 struct
3821 {
3822 unsigned LCMODE0 : 1;
3823 unsigned LCMODE1 : 1;
3824 unsigned LCMODE2 : 1;
3825 unsigned LCINTN : 1;
3826 unsigned LCINTP : 1;
3827 unsigned LCOUT : 1;
3828 unsigned LCOE : 1;
3829 unsigned LCEN : 1;
3830 };
3831
3832 struct
3833 {
3834 unsigned LCMODE : 3;
3835 unsigned : 5;
3836 };
3837
3838 struct
3839 {
3840 unsigned LC2MODE : 3;
3841 unsigned : 5;
3842 };
3843 } __CLC2CONbits_t;
3844
3845 extern __at(0x0F18) volatile __CLC2CONbits_t CLC2CONbits;
3846
3847 #define _CLC2CON_LC2MODE0 0x01
3848 #define _CLC2CON_LCMODE0 0x01
3849 #define _CLC2CON_LC2MODE1 0x02
3850 #define _CLC2CON_LCMODE1 0x02
3851 #define _CLC2CON_LC2MODE2 0x04
3852 #define _CLC2CON_LCMODE2 0x04
3853 #define _CLC2CON_LC2INTN 0x08
3854 #define _CLC2CON_LCINTN 0x08
3855 #define _CLC2CON_LC2INTP 0x10
3856 #define _CLC2CON_LCINTP 0x10
3857 #define _CLC2CON_LC2OUT 0x20
3858 #define _CLC2CON_LCOUT 0x20
3859 #define _CLC2CON_LC2OE 0x40
3860 #define _CLC2CON_LCOE 0x40
3861 #define _CLC2CON_LC2EN 0x80
3862 #define _CLC2CON_LCEN 0x80
3863
3864 //==============================================================================
3865
3866
3867 //==============================================================================
3868 // CLC2POL Bits
3869
3870 extern __at(0x0F19) __sfr CLC2POL;
3871
3872 typedef union
3873 {
3874 struct
3875 {
3876 unsigned LC2G1POL : 1;
3877 unsigned LC2G2POL : 1;
3878 unsigned LC2G3POL : 1;
3879 unsigned LC2G4POL : 1;
3880 unsigned : 1;
3881 unsigned : 1;
3882 unsigned : 1;
3883 unsigned LC2POL : 1;
3884 };
3885
3886 struct
3887 {
3888 unsigned G1POL : 1;
3889 unsigned G2POL : 1;
3890 unsigned G3POL : 1;
3891 unsigned G4POL : 1;
3892 unsigned : 1;
3893 unsigned : 1;
3894 unsigned : 1;
3895 unsigned POL : 1;
3896 };
3897 } __CLC2POLbits_t;
3898
3899 extern __at(0x0F19) volatile __CLC2POLbits_t CLC2POLbits;
3900
3901 #define _CLC2POL_LC2G1POL 0x01
3902 #define _CLC2POL_G1POL 0x01
3903 #define _CLC2POL_LC2G2POL 0x02
3904 #define _CLC2POL_G2POL 0x02
3905 #define _CLC2POL_LC2G3POL 0x04
3906 #define _CLC2POL_G3POL 0x04
3907 #define _CLC2POL_LC2G4POL 0x08
3908 #define _CLC2POL_G4POL 0x08
3909 #define _CLC2POL_LC2POL 0x80
3910 #define _CLC2POL_POL 0x80
3911
3912 //==============================================================================
3913
3914
3915 //==============================================================================
3916 // CLC2SEL0 Bits
3917
3918 extern __at(0x0F1A) __sfr CLC2SEL0;
3919
3920 typedef union
3921 {
3922 struct
3923 {
3924 unsigned LC2D1S0 : 1;
3925 unsigned LC2D1S1 : 1;
3926 unsigned LC2D1S2 : 1;
3927 unsigned : 1;
3928 unsigned LC2D2S0 : 1;
3929 unsigned LC2D2S1 : 1;
3930 unsigned LC2D2S2 : 1;
3931 unsigned : 1;
3932 };
3933
3934 struct
3935 {
3936 unsigned D1S0 : 1;
3937 unsigned D1S1 : 1;
3938 unsigned D1S2 : 1;
3939 unsigned : 1;
3940 unsigned D2S0 : 1;
3941 unsigned D2S1 : 1;
3942 unsigned D2S2 : 1;
3943 unsigned : 1;
3944 };
3945
3946 struct
3947 {
3948 unsigned D1S : 3;
3949 unsigned : 5;
3950 };
3951
3952 struct
3953 {
3954 unsigned LC2D1S : 3;
3955 unsigned : 5;
3956 };
3957
3958 struct
3959 {
3960 unsigned : 4;
3961 unsigned D2S : 3;
3962 unsigned : 1;
3963 };
3964
3965 struct
3966 {
3967 unsigned : 4;
3968 unsigned LC2D2S : 3;
3969 unsigned : 1;
3970 };
3971 } __CLC2SEL0bits_t;
3972
3973 extern __at(0x0F1A) volatile __CLC2SEL0bits_t CLC2SEL0bits;
3974
3975 #define _CLC2SEL0_LC2D1S0 0x01
3976 #define _CLC2SEL0_D1S0 0x01
3977 #define _CLC2SEL0_LC2D1S1 0x02
3978 #define _CLC2SEL0_D1S1 0x02
3979 #define _CLC2SEL0_LC2D1S2 0x04
3980 #define _CLC2SEL0_D1S2 0x04
3981 #define _CLC2SEL0_LC2D2S0 0x10
3982 #define _CLC2SEL0_D2S0 0x10
3983 #define _CLC2SEL0_LC2D2S1 0x20
3984 #define _CLC2SEL0_D2S1 0x20
3985 #define _CLC2SEL0_LC2D2S2 0x40
3986 #define _CLC2SEL0_D2S2 0x40
3987
3988 //==============================================================================
3989
3990
3991 //==============================================================================
3992 // CLC2SEL1 Bits
3993
3994 extern __at(0x0F1B) __sfr CLC2SEL1;
3995
3996 typedef union
3997 {
3998 struct
3999 {
4000 unsigned LC2D3S0 : 1;
4001 unsigned LC2D3S1 : 1;
4002 unsigned LC2D3S2 : 1;
4003 unsigned : 1;
4004 unsigned LC2D4S0 : 1;
4005 unsigned LC2D4S1 : 1;
4006 unsigned LC2D4S2 : 1;
4007 unsigned : 1;
4008 };
4009
4010 struct
4011 {
4012 unsigned D3S0 : 1;
4013 unsigned D3S1 : 1;
4014 unsigned D3S2 : 1;
4015 unsigned : 1;
4016 unsigned D4S0 : 1;
4017 unsigned D4S1 : 1;
4018 unsigned D4S2 : 1;
4019 unsigned : 1;
4020 };
4021
4022 struct
4023 {
4024 unsigned LC2D3S : 3;
4025 unsigned : 5;
4026 };
4027
4028 struct
4029 {
4030 unsigned D3S : 3;
4031 unsigned : 5;
4032 };
4033
4034 struct
4035 {
4036 unsigned : 4;
4037 unsigned D4S : 3;
4038 unsigned : 1;
4039 };
4040
4041 struct
4042 {
4043 unsigned : 4;
4044 unsigned LC2D4S : 3;
4045 unsigned : 1;
4046 };
4047 } __CLC2SEL1bits_t;
4048
4049 extern __at(0x0F1B) volatile __CLC2SEL1bits_t CLC2SEL1bits;
4050
4051 #define _CLC2SEL1_LC2D3S0 0x01
4052 #define _CLC2SEL1_D3S0 0x01
4053 #define _CLC2SEL1_LC2D3S1 0x02
4054 #define _CLC2SEL1_D3S1 0x02
4055 #define _CLC2SEL1_LC2D3S2 0x04
4056 #define _CLC2SEL1_D3S2 0x04
4057 #define _CLC2SEL1_LC2D4S0 0x10
4058 #define _CLC2SEL1_D4S0 0x10
4059 #define _CLC2SEL1_LC2D4S1 0x20
4060 #define _CLC2SEL1_D4S1 0x20
4061 #define _CLC2SEL1_LC2D4S2 0x40
4062 #define _CLC2SEL1_D4S2 0x40
4063
4064 //==============================================================================
4065
4066
4067 //==============================================================================
4068 // CLC2GLS0 Bits
4069
4070 extern __at(0x0F1C) __sfr CLC2GLS0;
4071
4072 typedef union
4073 {
4074 struct
4075 {
4076 unsigned LC2G1D1N : 1;
4077 unsigned LC2G1D1T : 1;
4078 unsigned LC2G1D2N : 1;
4079 unsigned LC2G1D2T : 1;
4080 unsigned LC2G1D3N : 1;
4081 unsigned LC2G1D3T : 1;
4082 unsigned LC2G1D4N : 1;
4083 unsigned LC2G1D4T : 1;
4084 };
4085
4086 struct
4087 {
4088 unsigned D1N : 1;
4089 unsigned D1T : 1;
4090 unsigned D2N : 1;
4091 unsigned D2T : 1;
4092 unsigned D3N : 1;
4093 unsigned D3T : 1;
4094 unsigned D4N : 1;
4095 unsigned D4T : 1;
4096 };
4097 } __CLC2GLS0bits_t;
4098
4099 extern __at(0x0F1C) volatile __CLC2GLS0bits_t CLC2GLS0bits;
4100
4101 #define _CLC2GLS0_LC2G1D1N 0x01
4102 #define _CLC2GLS0_D1N 0x01
4103 #define _CLC2GLS0_LC2G1D1T 0x02
4104 #define _CLC2GLS0_D1T 0x02
4105 #define _CLC2GLS0_LC2G1D2N 0x04
4106 #define _CLC2GLS0_D2N 0x04
4107 #define _CLC2GLS0_LC2G1D2T 0x08
4108 #define _CLC2GLS0_D2T 0x08
4109 #define _CLC2GLS0_LC2G1D3N 0x10
4110 #define _CLC2GLS0_D3N 0x10
4111 #define _CLC2GLS0_LC2G1D3T 0x20
4112 #define _CLC2GLS0_D3T 0x20
4113 #define _CLC2GLS0_LC2G1D4N 0x40
4114 #define _CLC2GLS0_D4N 0x40
4115 #define _CLC2GLS0_LC2G1D4T 0x80
4116 #define _CLC2GLS0_D4T 0x80
4117
4118 //==============================================================================
4119
4120
4121 //==============================================================================
4122 // CLC2GLS1 Bits
4123
4124 extern __at(0x0F1D) __sfr CLC2GLS1;
4125
4126 typedef union
4127 {
4128 struct
4129 {
4130 unsigned LC2G2D1N : 1;
4131 unsigned LC2G2D1T : 1;
4132 unsigned LC2G2D2N : 1;
4133 unsigned LC2G2D2T : 1;
4134 unsigned LC2G2D3N : 1;
4135 unsigned LC2G2D3T : 1;
4136 unsigned LC2G2D4N : 1;
4137 unsigned LC2G2D4T : 1;
4138 };
4139
4140 struct
4141 {
4142 unsigned D1N : 1;
4143 unsigned D1T : 1;
4144 unsigned D2N : 1;
4145 unsigned D2T : 1;
4146 unsigned D3N : 1;
4147 unsigned D3T : 1;
4148 unsigned D4N : 1;
4149 unsigned D4T : 1;
4150 };
4151 } __CLC2GLS1bits_t;
4152
4153 extern __at(0x0F1D) volatile __CLC2GLS1bits_t CLC2GLS1bits;
4154
4155 #define _CLC2GLS1_LC2G2D1N 0x01
4156 #define _CLC2GLS1_D1N 0x01
4157 #define _CLC2GLS1_LC2G2D1T 0x02
4158 #define _CLC2GLS1_D1T 0x02
4159 #define _CLC2GLS1_LC2G2D2N 0x04
4160 #define _CLC2GLS1_D2N 0x04
4161 #define _CLC2GLS1_LC2G2D2T 0x08
4162 #define _CLC2GLS1_D2T 0x08
4163 #define _CLC2GLS1_LC2G2D3N 0x10
4164 #define _CLC2GLS1_D3N 0x10
4165 #define _CLC2GLS1_LC2G2D3T 0x20
4166 #define _CLC2GLS1_D3T 0x20
4167 #define _CLC2GLS1_LC2G2D4N 0x40
4168 #define _CLC2GLS1_D4N 0x40
4169 #define _CLC2GLS1_LC2G2D4T 0x80
4170 #define _CLC2GLS1_D4T 0x80
4171
4172 //==============================================================================
4173
4174
4175 //==============================================================================
4176 // CLC2GLS2 Bits
4177
4178 extern __at(0x0F1E) __sfr CLC2GLS2;
4179
4180 typedef union
4181 {
4182 struct
4183 {
4184 unsigned LC2G3D1N : 1;
4185 unsigned LC2G3D1T : 1;
4186 unsigned LC2G3D2N : 1;
4187 unsigned LC2G3D2T : 1;
4188 unsigned LC2G3D3N : 1;
4189 unsigned LC2G3D3T : 1;
4190 unsigned LC2G3D4N : 1;
4191 unsigned LC2G3D4T : 1;
4192 };
4193
4194 struct
4195 {
4196 unsigned D1N : 1;
4197 unsigned D1T : 1;
4198 unsigned D2N : 1;
4199 unsigned D2T : 1;
4200 unsigned D3N : 1;
4201 unsigned D3T : 1;
4202 unsigned D4N : 1;
4203 unsigned D4T : 1;
4204 };
4205 } __CLC2GLS2bits_t;
4206
4207 extern __at(0x0F1E) volatile __CLC2GLS2bits_t CLC2GLS2bits;
4208
4209 #define _CLC2GLS2_LC2G3D1N 0x01
4210 #define _CLC2GLS2_D1N 0x01
4211 #define _CLC2GLS2_LC2G3D1T 0x02
4212 #define _CLC2GLS2_D1T 0x02
4213 #define _CLC2GLS2_LC2G3D2N 0x04
4214 #define _CLC2GLS2_D2N 0x04
4215 #define _CLC2GLS2_LC2G3D2T 0x08
4216 #define _CLC2GLS2_D2T 0x08
4217 #define _CLC2GLS2_LC2G3D3N 0x10
4218 #define _CLC2GLS2_D3N 0x10
4219 #define _CLC2GLS2_LC2G3D3T 0x20
4220 #define _CLC2GLS2_D3T 0x20
4221 #define _CLC2GLS2_LC2G3D4N 0x40
4222 #define _CLC2GLS2_D4N 0x40
4223 #define _CLC2GLS2_LC2G3D4T 0x80
4224 #define _CLC2GLS2_D4T 0x80
4225
4226 //==============================================================================
4227
4228
4229 //==============================================================================
4230 // CLC2GLS3 Bits
4231
4232 extern __at(0x0F1F) __sfr CLC2GLS3;
4233
4234 typedef union
4235 {
4236 struct
4237 {
4238 unsigned LC2G4D1N : 1;
4239 unsigned LC2G4D1T : 1;
4240 unsigned LC2G4D2N : 1;
4241 unsigned LC2G4D2T : 1;
4242 unsigned LC2G4D3N : 1;
4243 unsigned LC2G4D3T : 1;
4244 unsigned LC2G4D4N : 1;
4245 unsigned LC2G4D4T : 1;
4246 };
4247
4248 struct
4249 {
4250 unsigned G4D1N : 1;
4251 unsigned G4D1T : 1;
4252 unsigned G4D2N : 1;
4253 unsigned G4D2T : 1;
4254 unsigned G4D3N : 1;
4255 unsigned G4D3T : 1;
4256 unsigned G4D4N : 1;
4257 unsigned G4D4T : 1;
4258 };
4259 } __CLC2GLS3bits_t;
4260
4261 extern __at(0x0F1F) volatile __CLC2GLS3bits_t CLC2GLS3bits;
4262
4263 #define _CLC2GLS3_LC2G4D1N 0x01
4264 #define _CLC2GLS3_G4D1N 0x01
4265 #define _CLC2GLS3_LC2G4D1T 0x02
4266 #define _CLC2GLS3_G4D1T 0x02
4267 #define _CLC2GLS3_LC2G4D2N 0x04
4268 #define _CLC2GLS3_G4D2N 0x04
4269 #define _CLC2GLS3_LC2G4D2T 0x08
4270 #define _CLC2GLS3_G4D2T 0x08
4271 #define _CLC2GLS3_LC2G4D3N 0x10
4272 #define _CLC2GLS3_G4D3N 0x10
4273 #define _CLC2GLS3_LC2G4D3T 0x20
4274 #define _CLC2GLS3_G4D3T 0x20
4275 #define _CLC2GLS3_LC2G4D4N 0x40
4276 #define _CLC2GLS3_G4D4N 0x40
4277 #define _CLC2GLS3_LC2G4D4T 0x80
4278 #define _CLC2GLS3_G4D4T 0x80
4279
4280 //==============================================================================
4281
4282
4283 //==============================================================================
4284 // CLC3CON Bits
4285
4286 extern __at(0x0F20) __sfr CLC3CON;
4287
4288 typedef union
4289 {
4290 struct
4291 {
4292 unsigned LC3MODE0 : 1;
4293 unsigned LC3MODE1 : 1;
4294 unsigned LC3MODE2 : 1;
4295 unsigned LC3INTN : 1;
4296 unsigned LC3INTP : 1;
4297 unsigned LC3OUT : 1;
4298 unsigned LC3OE : 1;
4299 unsigned LC3EN : 1;
4300 };
4301
4302 struct
4303 {
4304 unsigned LCMODE0 : 1;
4305 unsigned LCMODE1 : 1;
4306 unsigned LCMODE2 : 1;
4307 unsigned LCINTN : 1;
4308 unsigned LCINTP : 1;
4309 unsigned LCOUT : 1;
4310 unsigned LCOE : 1;
4311 unsigned LCEN : 1;
4312 };
4313
4314 struct
4315 {
4316 unsigned LC3MODE : 3;
4317 unsigned : 5;
4318 };
4319
4320 struct
4321 {
4322 unsigned LCMODE : 3;
4323 unsigned : 5;
4324 };
4325 } __CLC3CONbits_t;
4326
4327 extern __at(0x0F20) volatile __CLC3CONbits_t CLC3CONbits;
4328
4329 #define _CLC3CON_LC3MODE0 0x01
4330 #define _CLC3CON_LCMODE0 0x01
4331 #define _CLC3CON_LC3MODE1 0x02
4332 #define _CLC3CON_LCMODE1 0x02
4333 #define _CLC3CON_LC3MODE2 0x04
4334 #define _CLC3CON_LCMODE2 0x04
4335 #define _CLC3CON_LC3INTN 0x08
4336 #define _CLC3CON_LCINTN 0x08
4337 #define _CLC3CON_LC3INTP 0x10
4338 #define _CLC3CON_LCINTP 0x10
4339 #define _CLC3CON_LC3OUT 0x20
4340 #define _CLC3CON_LCOUT 0x20
4341 #define _CLC3CON_LC3OE 0x40
4342 #define _CLC3CON_LCOE 0x40
4343 #define _CLC3CON_LC3EN 0x80
4344 #define _CLC3CON_LCEN 0x80
4345
4346 //==============================================================================
4347
4348
4349 //==============================================================================
4350 // CLC3POL Bits
4351
4352 extern __at(0x0F21) __sfr CLC3POL;
4353
4354 typedef union
4355 {
4356 struct
4357 {
4358 unsigned LC3G1POL : 1;
4359 unsigned LC3G2POL : 1;
4360 unsigned LC3G3POL : 1;
4361 unsigned LC3G4POL : 1;
4362 unsigned : 1;
4363 unsigned : 1;
4364 unsigned : 1;
4365 unsigned LC3POL : 1;
4366 };
4367
4368 struct
4369 {
4370 unsigned G1POL : 1;
4371 unsigned G2POL : 1;
4372 unsigned G3POL : 1;
4373 unsigned G4POL : 1;
4374 unsigned : 1;
4375 unsigned : 1;
4376 unsigned : 1;
4377 unsigned POL : 1;
4378 };
4379 } __CLC3POLbits_t;
4380
4381 extern __at(0x0F21) volatile __CLC3POLbits_t CLC3POLbits;
4382
4383 #define _CLC3POL_LC3G1POL 0x01
4384 #define _CLC3POL_G1POL 0x01
4385 #define _CLC3POL_LC3G2POL 0x02
4386 #define _CLC3POL_G2POL 0x02
4387 #define _CLC3POL_LC3G3POL 0x04
4388 #define _CLC3POL_G3POL 0x04
4389 #define _CLC3POL_LC3G4POL 0x08
4390 #define _CLC3POL_G4POL 0x08
4391 #define _CLC3POL_LC3POL 0x80
4392 #define _CLC3POL_POL 0x80
4393
4394 //==============================================================================
4395
4396
4397 //==============================================================================
4398 // CLC3SEL0 Bits
4399
4400 extern __at(0x0F22) __sfr CLC3SEL0;
4401
4402 typedef union
4403 {
4404 struct
4405 {
4406 unsigned LC3D1S0 : 1;
4407 unsigned LC3D1S1 : 1;
4408 unsigned LC3D1S2 : 1;
4409 unsigned : 1;
4410 unsigned LC3D2S0 : 1;
4411 unsigned LC3D2S1 : 1;
4412 unsigned LC3D2S2 : 1;
4413 unsigned : 1;
4414 };
4415
4416 struct
4417 {
4418 unsigned D1S0 : 1;
4419 unsigned D1S1 : 1;
4420 unsigned D1S2 : 1;
4421 unsigned : 1;
4422 unsigned D2S0 : 1;
4423 unsigned D2S1 : 1;
4424 unsigned D2S2 : 1;
4425 unsigned : 1;
4426 };
4427
4428 struct
4429 {
4430 unsigned LC3D1S : 3;
4431 unsigned : 5;
4432 };
4433
4434 struct
4435 {
4436 unsigned D1S : 3;
4437 unsigned : 5;
4438 };
4439
4440 struct
4441 {
4442 unsigned : 4;
4443 unsigned D2S : 3;
4444 unsigned : 1;
4445 };
4446
4447 struct
4448 {
4449 unsigned : 4;
4450 unsigned LC3D2S : 3;
4451 unsigned : 1;
4452 };
4453 } __CLC3SEL0bits_t;
4454
4455 extern __at(0x0F22) volatile __CLC3SEL0bits_t CLC3SEL0bits;
4456
4457 #define _CLC3SEL0_LC3D1S0 0x01
4458 #define _CLC3SEL0_D1S0 0x01
4459 #define _CLC3SEL0_LC3D1S1 0x02
4460 #define _CLC3SEL0_D1S1 0x02
4461 #define _CLC3SEL0_LC3D1S2 0x04
4462 #define _CLC3SEL0_D1S2 0x04
4463 #define _CLC3SEL0_LC3D2S0 0x10
4464 #define _CLC3SEL0_D2S0 0x10
4465 #define _CLC3SEL0_LC3D2S1 0x20
4466 #define _CLC3SEL0_D2S1 0x20
4467 #define _CLC3SEL0_LC3D2S2 0x40
4468 #define _CLC3SEL0_D2S2 0x40
4469
4470 //==============================================================================
4471
4472
4473 //==============================================================================
4474 // CLC3SEL1 Bits
4475
4476 extern __at(0x0F23) __sfr CLC3SEL1;
4477
4478 typedef union
4479 {
4480 struct
4481 {
4482 unsigned LC3D3S0 : 1;
4483 unsigned LC3D3S1 : 1;
4484 unsigned LC3D3S2 : 1;
4485 unsigned : 1;
4486 unsigned LC3D4S0 : 1;
4487 unsigned LC3D4S1 : 1;
4488 unsigned LC3D4S2 : 1;
4489 unsigned : 1;
4490 };
4491
4492 struct
4493 {
4494 unsigned D3S0 : 1;
4495 unsigned D3S1 : 1;
4496 unsigned D3S2 : 1;
4497 unsigned : 1;
4498 unsigned D4S0 : 1;
4499 unsigned D4S1 : 1;
4500 unsigned D4S2 : 1;
4501 unsigned : 1;
4502 };
4503
4504 struct
4505 {
4506 unsigned LC3D3S : 3;
4507 unsigned : 5;
4508 };
4509
4510 struct
4511 {
4512 unsigned D3S : 3;
4513 unsigned : 5;
4514 };
4515
4516 struct
4517 {
4518 unsigned : 4;
4519 unsigned LC3D4S : 3;
4520 unsigned : 1;
4521 };
4522
4523 struct
4524 {
4525 unsigned : 4;
4526 unsigned D4S : 3;
4527 unsigned : 1;
4528 };
4529 } __CLC3SEL1bits_t;
4530
4531 extern __at(0x0F23) volatile __CLC3SEL1bits_t CLC3SEL1bits;
4532
4533 #define _CLC3SEL1_LC3D3S0 0x01
4534 #define _CLC3SEL1_D3S0 0x01
4535 #define _CLC3SEL1_LC3D3S1 0x02
4536 #define _CLC3SEL1_D3S1 0x02
4537 #define _CLC3SEL1_LC3D3S2 0x04
4538 #define _CLC3SEL1_D3S2 0x04
4539 #define _CLC3SEL1_LC3D4S0 0x10
4540 #define _CLC3SEL1_D4S0 0x10
4541 #define _CLC3SEL1_LC3D4S1 0x20
4542 #define _CLC3SEL1_D4S1 0x20
4543 #define _CLC3SEL1_LC3D4S2 0x40
4544 #define _CLC3SEL1_D4S2 0x40
4545
4546 //==============================================================================
4547
4548
4549 //==============================================================================
4550 // CLC3GLS0 Bits
4551
4552 extern __at(0x0F24) __sfr CLC3GLS0;
4553
4554 typedef union
4555 {
4556 struct
4557 {
4558 unsigned LC3G1D1N : 1;
4559 unsigned LC3G1D1T : 1;
4560 unsigned LC3G1D2N : 1;
4561 unsigned LC3G1D2T : 1;
4562 unsigned LC3G1D3N : 1;
4563 unsigned LC3G1D3T : 1;
4564 unsigned LC3G1D4N : 1;
4565 unsigned LC3G1D4T : 1;
4566 };
4567
4568 struct
4569 {
4570 unsigned D1N : 1;
4571 unsigned D1T : 1;
4572 unsigned D2N : 1;
4573 unsigned D2T : 1;
4574 unsigned D3N : 1;
4575 unsigned D3T : 1;
4576 unsigned D4N : 1;
4577 unsigned D4T : 1;
4578 };
4579 } __CLC3GLS0bits_t;
4580
4581 extern __at(0x0F24) volatile __CLC3GLS0bits_t CLC3GLS0bits;
4582
4583 #define _CLC3GLS0_LC3G1D1N 0x01
4584 #define _CLC3GLS0_D1N 0x01
4585 #define _CLC3GLS0_LC3G1D1T 0x02
4586 #define _CLC3GLS0_D1T 0x02
4587 #define _CLC3GLS0_LC3G1D2N 0x04
4588 #define _CLC3GLS0_D2N 0x04
4589 #define _CLC3GLS0_LC3G1D2T 0x08
4590 #define _CLC3GLS0_D2T 0x08
4591 #define _CLC3GLS0_LC3G1D3N 0x10
4592 #define _CLC3GLS0_D3N 0x10
4593 #define _CLC3GLS0_LC3G1D3T 0x20
4594 #define _CLC3GLS0_D3T 0x20
4595 #define _CLC3GLS0_LC3G1D4N 0x40
4596 #define _CLC3GLS0_D4N 0x40
4597 #define _CLC3GLS0_LC3G1D4T 0x80
4598 #define _CLC3GLS0_D4T 0x80
4599
4600 //==============================================================================
4601
4602
4603 //==============================================================================
4604 // CLC3GLS1 Bits
4605
4606 extern __at(0x0F25) __sfr CLC3GLS1;
4607
4608 typedef union
4609 {
4610 struct
4611 {
4612 unsigned LC3G2D1N : 1;
4613 unsigned LC3G2D1T : 1;
4614 unsigned LC3G2D2N : 1;
4615 unsigned LC3G2D2T : 1;
4616 unsigned LC3G2D3N : 1;
4617 unsigned LC3G2D3T : 1;
4618 unsigned LC3G2D4N : 1;
4619 unsigned LC3G2D4T : 1;
4620 };
4621
4622 struct
4623 {
4624 unsigned D1N : 1;
4625 unsigned D1T : 1;
4626 unsigned D2N : 1;
4627 unsigned D2T : 1;
4628 unsigned D3N : 1;
4629 unsigned D3T : 1;
4630 unsigned D4N : 1;
4631 unsigned D4T : 1;
4632 };
4633 } __CLC3GLS1bits_t;
4634
4635 extern __at(0x0F25) volatile __CLC3GLS1bits_t CLC3GLS1bits;
4636
4637 #define _CLC3GLS1_LC3G2D1N 0x01
4638 #define _CLC3GLS1_D1N 0x01
4639 #define _CLC3GLS1_LC3G2D1T 0x02
4640 #define _CLC3GLS1_D1T 0x02
4641 #define _CLC3GLS1_LC3G2D2N 0x04
4642 #define _CLC3GLS1_D2N 0x04
4643 #define _CLC3GLS1_LC3G2D2T 0x08
4644 #define _CLC3GLS1_D2T 0x08
4645 #define _CLC3GLS1_LC3G2D3N 0x10
4646 #define _CLC3GLS1_D3N 0x10
4647 #define _CLC3GLS1_LC3G2D3T 0x20
4648 #define _CLC3GLS1_D3T 0x20
4649 #define _CLC3GLS1_LC3G2D4N 0x40
4650 #define _CLC3GLS1_D4N 0x40
4651 #define _CLC3GLS1_LC3G2D4T 0x80
4652 #define _CLC3GLS1_D4T 0x80
4653
4654 //==============================================================================
4655
4656
4657 //==============================================================================
4658 // CLC3GLS2 Bits
4659
4660 extern __at(0x0F26) __sfr CLC3GLS2;
4661
4662 typedef union
4663 {
4664 struct
4665 {
4666 unsigned LC3G3D1N : 1;
4667 unsigned LC3G3D1T : 1;
4668 unsigned LC3G3D2N : 1;
4669 unsigned LC3G3D2T : 1;
4670 unsigned LC3G3D3N : 1;
4671 unsigned LC3G3D3T : 1;
4672 unsigned LC3G3D4N : 1;
4673 unsigned LC3G3D4T : 1;
4674 };
4675
4676 struct
4677 {
4678 unsigned D1N : 1;
4679 unsigned D1T : 1;
4680 unsigned D2N : 1;
4681 unsigned D2T : 1;
4682 unsigned D3N : 1;
4683 unsigned D3T : 1;
4684 unsigned D4N : 1;
4685 unsigned D4T : 1;
4686 };
4687 } __CLC3GLS2bits_t;
4688
4689 extern __at(0x0F26) volatile __CLC3GLS2bits_t CLC3GLS2bits;
4690
4691 #define _CLC3GLS2_LC3G3D1N 0x01
4692 #define _CLC3GLS2_D1N 0x01
4693 #define _CLC3GLS2_LC3G3D1T 0x02
4694 #define _CLC3GLS2_D1T 0x02
4695 #define _CLC3GLS2_LC3G3D2N 0x04
4696 #define _CLC3GLS2_D2N 0x04
4697 #define _CLC3GLS2_LC3G3D2T 0x08
4698 #define _CLC3GLS2_D2T 0x08
4699 #define _CLC3GLS2_LC3G3D3N 0x10
4700 #define _CLC3GLS2_D3N 0x10
4701 #define _CLC3GLS2_LC3G3D3T 0x20
4702 #define _CLC3GLS2_D3T 0x20
4703 #define _CLC3GLS2_LC3G3D4N 0x40
4704 #define _CLC3GLS2_D4N 0x40
4705 #define _CLC3GLS2_LC3G3D4T 0x80
4706 #define _CLC3GLS2_D4T 0x80
4707
4708 //==============================================================================
4709
4710
4711 //==============================================================================
4712 // CLC3GLS3 Bits
4713
4714 extern __at(0x0F27) __sfr CLC3GLS3;
4715
4716 typedef union
4717 {
4718 struct
4719 {
4720 unsigned LC3G4D1N : 1;
4721 unsigned LC3G4D1T : 1;
4722 unsigned LC3G4D2N : 1;
4723 unsigned LC3G4D2T : 1;
4724 unsigned LC3G4D3N : 1;
4725 unsigned LC3G4D3T : 1;
4726 unsigned LC3G4D4N : 1;
4727 unsigned LC3G4D4T : 1;
4728 };
4729
4730 struct
4731 {
4732 unsigned G4D1N : 1;
4733 unsigned G4D1T : 1;
4734 unsigned G4D2N : 1;
4735 unsigned G4D2T : 1;
4736 unsigned G4D3N : 1;
4737 unsigned G4D3T : 1;
4738 unsigned G4D4N : 1;
4739 unsigned G4D4T : 1;
4740 };
4741 } __CLC3GLS3bits_t;
4742
4743 extern __at(0x0F27) volatile __CLC3GLS3bits_t CLC3GLS3bits;
4744
4745 #define _CLC3GLS3_LC3G4D1N 0x01
4746 #define _CLC3GLS3_G4D1N 0x01
4747 #define _CLC3GLS3_LC3G4D1T 0x02
4748 #define _CLC3GLS3_G4D1T 0x02
4749 #define _CLC3GLS3_LC3G4D2N 0x04
4750 #define _CLC3GLS3_G4D2N 0x04
4751 #define _CLC3GLS3_LC3G4D2T 0x08
4752 #define _CLC3GLS3_G4D2T 0x08
4753 #define _CLC3GLS3_LC3G4D3N 0x10
4754 #define _CLC3GLS3_G4D3N 0x10
4755 #define _CLC3GLS3_LC3G4D3T 0x20
4756 #define _CLC3GLS3_G4D3T 0x20
4757 #define _CLC3GLS3_LC3G4D4N 0x40
4758 #define _CLC3GLS3_G4D4N 0x40
4759 #define _CLC3GLS3_LC3G4D4T 0x80
4760 #define _CLC3GLS3_G4D4T 0x80
4761
4762 //==============================================================================
4763
4764
4765 //==============================================================================
4766 // CLC4CON Bits
4767
4768 extern __at(0x0F28) __sfr CLC4CON;
4769
4770 typedef union
4771 {
4772 struct
4773 {
4774 unsigned LC4MODE0 : 1;
4775 unsigned LC4MODE1 : 1;
4776 unsigned LC4MODE2 : 1;
4777 unsigned LC4INTN : 1;
4778 unsigned LC4INTP : 1;
4779 unsigned LC4OUT : 1;
4780 unsigned LC4OE : 1;
4781 unsigned LC4EN : 1;
4782 };
4783
4784 struct
4785 {
4786 unsigned LCMODE0 : 1;
4787 unsigned LCMODE1 : 1;
4788 unsigned LCMODE2 : 1;
4789 unsigned LCINTN : 1;
4790 unsigned LCINTP : 1;
4791 unsigned LCOUT : 1;
4792 unsigned LCOE : 1;
4793 unsigned LCEN : 1;
4794 };
4795
4796 struct
4797 {
4798 unsigned LC4MODE : 3;
4799 unsigned : 5;
4800 };
4801
4802 struct
4803 {
4804 unsigned LCMODE : 3;
4805 unsigned : 5;
4806 };
4807 } __CLC4CONbits_t;
4808
4809 extern __at(0x0F28) volatile __CLC4CONbits_t CLC4CONbits;
4810
4811 #define _CLC4CON_LC4MODE0 0x01
4812 #define _CLC4CON_LCMODE0 0x01
4813 #define _CLC4CON_LC4MODE1 0x02
4814 #define _CLC4CON_LCMODE1 0x02
4815 #define _CLC4CON_LC4MODE2 0x04
4816 #define _CLC4CON_LCMODE2 0x04
4817 #define _CLC4CON_LC4INTN 0x08
4818 #define _CLC4CON_LCINTN 0x08
4819 #define _CLC4CON_LC4INTP 0x10
4820 #define _CLC4CON_LCINTP 0x10
4821 #define _CLC4CON_LC4OUT 0x20
4822 #define _CLC4CON_LCOUT 0x20
4823 #define _CLC4CON_LC4OE 0x40
4824 #define _CLC4CON_LCOE 0x40
4825 #define _CLC4CON_LC4EN 0x80
4826 #define _CLC4CON_LCEN 0x80
4827
4828 //==============================================================================
4829
4830
4831 //==============================================================================
4832 // CLC4POL Bits
4833
4834 extern __at(0x0F29) __sfr CLC4POL;
4835
4836 typedef union
4837 {
4838 struct
4839 {
4840 unsigned LC4G1POL : 1;
4841 unsigned LC4G2POL : 1;
4842 unsigned LC4G3POL : 1;
4843 unsigned LC4G4POL : 1;
4844 unsigned : 1;
4845 unsigned : 1;
4846 unsigned : 1;
4847 unsigned LC4POL : 1;
4848 };
4849
4850 struct
4851 {
4852 unsigned G1POL : 1;
4853 unsigned G2POL : 1;
4854 unsigned G3POL : 1;
4855 unsigned G4POL : 1;
4856 unsigned : 1;
4857 unsigned : 1;
4858 unsigned : 1;
4859 unsigned POL : 1;
4860 };
4861 } __CLC4POLbits_t;
4862
4863 extern __at(0x0F29) volatile __CLC4POLbits_t CLC4POLbits;
4864
4865 #define _CLC4POL_LC4G1POL 0x01
4866 #define _CLC4POL_G1POL 0x01
4867 #define _CLC4POL_LC4G2POL 0x02
4868 #define _CLC4POL_G2POL 0x02
4869 #define _CLC4POL_LC4G3POL 0x04
4870 #define _CLC4POL_G3POL 0x04
4871 #define _CLC4POL_LC4G4POL 0x08
4872 #define _CLC4POL_G4POL 0x08
4873 #define _CLC4POL_LC4POL 0x80
4874 #define _CLC4POL_POL 0x80
4875
4876 //==============================================================================
4877
4878
4879 //==============================================================================
4880 // CLC4SEL0 Bits
4881
4882 extern __at(0x0F2A) __sfr CLC4SEL0;
4883
4884 typedef union
4885 {
4886 struct
4887 {
4888 unsigned LC4D1S0 : 1;
4889 unsigned LC4D1S1 : 1;
4890 unsigned LC4D1S2 : 1;
4891 unsigned : 1;
4892 unsigned LC4D2S0 : 1;
4893 unsigned LC4D2S1 : 1;
4894 unsigned LC4D2S2 : 1;
4895 unsigned : 1;
4896 };
4897
4898 struct
4899 {
4900 unsigned D1S0 : 1;
4901 unsigned D1S1 : 1;
4902 unsigned D1S2 : 1;
4903 unsigned : 1;
4904 unsigned D2S0 : 1;
4905 unsigned D2S1 : 1;
4906 unsigned D2S2 : 1;
4907 unsigned : 1;
4908 };
4909
4910 struct
4911 {
4912 unsigned LC4D1S : 3;
4913 unsigned : 5;
4914 };
4915
4916 struct
4917 {
4918 unsigned D1S : 3;
4919 unsigned : 5;
4920 };
4921
4922 struct
4923 {
4924 unsigned : 4;
4925 unsigned D2S : 3;
4926 unsigned : 1;
4927 };
4928
4929 struct
4930 {
4931 unsigned : 4;
4932 unsigned LC4D2S : 3;
4933 unsigned : 1;
4934 };
4935 } __CLC4SEL0bits_t;
4936
4937 extern __at(0x0F2A) volatile __CLC4SEL0bits_t CLC4SEL0bits;
4938
4939 #define _CLC4SEL0_LC4D1S0 0x01
4940 #define _CLC4SEL0_D1S0 0x01
4941 #define _CLC4SEL0_LC4D1S1 0x02
4942 #define _CLC4SEL0_D1S1 0x02
4943 #define _CLC4SEL0_LC4D1S2 0x04
4944 #define _CLC4SEL0_D1S2 0x04
4945 #define _CLC4SEL0_LC4D2S0 0x10
4946 #define _CLC4SEL0_D2S0 0x10
4947 #define _CLC4SEL0_LC4D2S1 0x20
4948 #define _CLC4SEL0_D2S1 0x20
4949 #define _CLC4SEL0_LC4D2S2 0x40
4950 #define _CLC4SEL0_D2S2 0x40
4951
4952 //==============================================================================
4953
4954
4955 //==============================================================================
4956 // CLC4SEL1 Bits
4957
4958 extern __at(0x0F2B) __sfr CLC4SEL1;
4959
4960 typedef union
4961 {
4962 struct
4963 {
4964 unsigned LC4D3S0 : 1;
4965 unsigned LC4D3S1 : 1;
4966 unsigned LC4D3S2 : 1;
4967 unsigned : 1;
4968 unsigned LC4D4S0 : 1;
4969 unsigned LC4D4S1 : 1;
4970 unsigned LC4D4S2 : 1;
4971 unsigned : 1;
4972 };
4973
4974 struct
4975 {
4976 unsigned D3S0 : 1;
4977 unsigned D3S1 : 1;
4978 unsigned D3S2 : 1;
4979 unsigned : 1;
4980 unsigned D4S0 : 1;
4981 unsigned D4S1 : 1;
4982 unsigned D4S2 : 1;
4983 unsigned : 1;
4984 };
4985
4986 struct
4987 {
4988 unsigned D3S : 3;
4989 unsigned : 5;
4990 };
4991
4992 struct
4993 {
4994 unsigned LC4D3S : 3;
4995 unsigned : 5;
4996 };
4997
4998 struct
4999 {
5000 unsigned : 4;
5001 unsigned D4S : 3;
5002 unsigned : 1;
5003 };
5004
5005 struct
5006 {
5007 unsigned : 4;
5008 unsigned LC4D4S : 3;
5009 unsigned : 1;
5010 };
5011 } __CLC4SEL1bits_t;
5012
5013 extern __at(0x0F2B) volatile __CLC4SEL1bits_t CLC4SEL1bits;
5014
5015 #define _CLC4SEL1_LC4D3S0 0x01
5016 #define _CLC4SEL1_D3S0 0x01
5017 #define _CLC4SEL1_LC4D3S1 0x02
5018 #define _CLC4SEL1_D3S1 0x02
5019 #define _CLC4SEL1_LC4D3S2 0x04
5020 #define _CLC4SEL1_D3S2 0x04
5021 #define _CLC4SEL1_LC4D4S0 0x10
5022 #define _CLC4SEL1_D4S0 0x10
5023 #define _CLC4SEL1_LC4D4S1 0x20
5024 #define _CLC4SEL1_D4S1 0x20
5025 #define _CLC4SEL1_LC4D4S2 0x40
5026 #define _CLC4SEL1_D4S2 0x40
5027
5028 //==============================================================================
5029
5030
5031 //==============================================================================
5032 // CLC4GLS0 Bits
5033
5034 extern __at(0x0F2C) __sfr CLC4GLS0;
5035
5036 typedef union
5037 {
5038 struct
5039 {
5040 unsigned LC4G1D1N : 1;
5041 unsigned LC4G1D1T : 1;
5042 unsigned LC4G1D2N : 1;
5043 unsigned LC4G1D2T : 1;
5044 unsigned LC4G1D3N : 1;
5045 unsigned LC4G1D3T : 1;
5046 unsigned LC4G1D4N : 1;
5047 unsigned LC4G1D4T : 1;
5048 };
5049
5050 struct
5051 {
5052 unsigned D1N : 1;
5053 unsigned D1T : 1;
5054 unsigned D2N : 1;
5055 unsigned D2T : 1;
5056 unsigned D3N : 1;
5057 unsigned D3T : 1;
5058 unsigned D4N : 1;
5059 unsigned D4T : 1;
5060 };
5061 } __CLC4GLS0bits_t;
5062
5063 extern __at(0x0F2C) volatile __CLC4GLS0bits_t CLC4GLS0bits;
5064
5065 #define _CLC4GLS0_LC4G1D1N 0x01
5066 #define _CLC4GLS0_D1N 0x01
5067 #define _CLC4GLS0_LC4G1D1T 0x02
5068 #define _CLC4GLS0_D1T 0x02
5069 #define _CLC4GLS0_LC4G1D2N 0x04
5070 #define _CLC4GLS0_D2N 0x04
5071 #define _CLC4GLS0_LC4G1D2T 0x08
5072 #define _CLC4GLS0_D2T 0x08
5073 #define _CLC4GLS0_LC4G1D3N 0x10
5074 #define _CLC4GLS0_D3N 0x10
5075 #define _CLC4GLS0_LC4G1D3T 0x20
5076 #define _CLC4GLS0_D3T 0x20
5077 #define _CLC4GLS0_LC4G1D4N 0x40
5078 #define _CLC4GLS0_D4N 0x40
5079 #define _CLC4GLS0_LC4G1D4T 0x80
5080 #define _CLC4GLS0_D4T 0x80
5081
5082 //==============================================================================
5083
5084
5085 //==============================================================================
5086 // CLC4GLS1 Bits
5087
5088 extern __at(0x0F2D) __sfr CLC4GLS1;
5089
5090 typedef union
5091 {
5092 struct
5093 {
5094 unsigned LC4G2D1N : 1;
5095 unsigned LC4G2D1T : 1;
5096 unsigned LC4G2D2N : 1;
5097 unsigned LC4G2D2T : 1;
5098 unsigned LC4G2D3N : 1;
5099 unsigned LC4G2D3T : 1;
5100 unsigned LC4G2D4N : 1;
5101 unsigned LC4G2D4T : 1;
5102 };
5103
5104 struct
5105 {
5106 unsigned D1N : 1;
5107 unsigned D1T : 1;
5108 unsigned D2N : 1;
5109 unsigned D2T : 1;
5110 unsigned D3N : 1;
5111 unsigned D3T : 1;
5112 unsigned D4N : 1;
5113 unsigned D4T : 1;
5114 };
5115 } __CLC4GLS1bits_t;
5116
5117 extern __at(0x0F2D) volatile __CLC4GLS1bits_t CLC4GLS1bits;
5118
5119 #define _CLC4GLS1_LC4G2D1N 0x01
5120 #define _CLC4GLS1_D1N 0x01
5121 #define _CLC4GLS1_LC4G2D1T 0x02
5122 #define _CLC4GLS1_D1T 0x02
5123 #define _CLC4GLS1_LC4G2D2N 0x04
5124 #define _CLC4GLS1_D2N 0x04
5125 #define _CLC4GLS1_LC4G2D2T 0x08
5126 #define _CLC4GLS1_D2T 0x08
5127 #define _CLC4GLS1_LC4G2D3N 0x10
5128 #define _CLC4GLS1_D3N 0x10
5129 #define _CLC4GLS1_LC4G2D3T 0x20
5130 #define _CLC4GLS1_D3T 0x20
5131 #define _CLC4GLS1_LC4G2D4N 0x40
5132 #define _CLC4GLS1_D4N 0x40
5133 #define _CLC4GLS1_LC4G2D4T 0x80
5134 #define _CLC4GLS1_D4T 0x80
5135
5136 //==============================================================================
5137
5138
5139 //==============================================================================
5140 // CLC4GLS2 Bits
5141
5142 extern __at(0x0F2E) __sfr CLC4GLS2;
5143
5144 typedef union
5145 {
5146 struct
5147 {
5148 unsigned LC4G3D1N : 1;
5149 unsigned LC4G3D1T : 1;
5150 unsigned LC4G3D2N : 1;
5151 unsigned LC4G3D2T : 1;
5152 unsigned LC4G3D3N : 1;
5153 unsigned LC4G3D3T : 1;
5154 unsigned LC4G3D4N : 1;
5155 unsigned LC4G3D4T : 1;
5156 };
5157
5158 struct
5159 {
5160 unsigned D1N : 1;
5161 unsigned D1T : 1;
5162 unsigned D2N : 1;
5163 unsigned D2T : 1;
5164 unsigned D3N : 1;
5165 unsigned D3T : 1;
5166 unsigned D4N : 1;
5167 unsigned D4T : 1;
5168 };
5169 } __CLC4GLS2bits_t;
5170
5171 extern __at(0x0F2E) volatile __CLC4GLS2bits_t CLC4GLS2bits;
5172
5173 #define _CLC4GLS2_LC4G3D1N 0x01
5174 #define _CLC4GLS2_D1N 0x01
5175 #define _CLC4GLS2_LC4G3D1T 0x02
5176 #define _CLC4GLS2_D1T 0x02
5177 #define _CLC4GLS2_LC4G3D2N 0x04
5178 #define _CLC4GLS2_D2N 0x04
5179 #define _CLC4GLS2_LC4G3D2T 0x08
5180 #define _CLC4GLS2_D2T 0x08
5181 #define _CLC4GLS2_LC4G3D3N 0x10
5182 #define _CLC4GLS2_D3N 0x10
5183 #define _CLC4GLS2_LC4G3D3T 0x20
5184 #define _CLC4GLS2_D3T 0x20
5185 #define _CLC4GLS2_LC4G3D4N 0x40
5186 #define _CLC4GLS2_D4N 0x40
5187 #define _CLC4GLS2_LC4G3D4T 0x80
5188 #define _CLC4GLS2_D4T 0x80
5189
5190 //==============================================================================
5191
5192
5193 //==============================================================================
5194 // CLC4GLS3 Bits
5195
5196 extern __at(0x0F2F) __sfr CLC4GLS3;
5197
5198 typedef union
5199 {
5200 struct
5201 {
5202 unsigned LC4G4D1N : 1;
5203 unsigned LC4G4D1T : 1;
5204 unsigned LC4G4D2N : 1;
5205 unsigned LC4G4D2T : 1;
5206 unsigned LC4G4D3N : 1;
5207 unsigned LC4G4D3T : 1;
5208 unsigned LC4G4D4N : 1;
5209 unsigned LC4G4D4T : 1;
5210 };
5211
5212 struct
5213 {
5214 unsigned G4D1N : 1;
5215 unsigned G4D1T : 1;
5216 unsigned G4D2N : 1;
5217 unsigned G4D2T : 1;
5218 unsigned G4D3N : 1;
5219 unsigned G4D3T : 1;
5220 unsigned G4D4N : 1;
5221 unsigned G4D4T : 1;
5222 };
5223 } __CLC4GLS3bits_t;
5224
5225 extern __at(0x0F2F) volatile __CLC4GLS3bits_t CLC4GLS3bits;
5226
5227 #define _CLC4GLS3_LC4G4D1N 0x01
5228 #define _CLC4GLS3_G4D1N 0x01
5229 #define _CLC4GLS3_LC4G4D1T 0x02
5230 #define _CLC4GLS3_G4D1T 0x02
5231 #define _CLC4GLS3_LC4G4D2N 0x04
5232 #define _CLC4GLS3_G4D2N 0x04
5233 #define _CLC4GLS3_LC4G4D2T 0x08
5234 #define _CLC4GLS3_G4D2T 0x08
5235 #define _CLC4GLS3_LC4G4D3N 0x10
5236 #define _CLC4GLS3_G4D3N 0x10
5237 #define _CLC4GLS3_LC4G4D3T 0x20
5238 #define _CLC4GLS3_G4D3T 0x20
5239 #define _CLC4GLS3_LC4G4D4N 0x40
5240 #define _CLC4GLS3_G4D4N 0x40
5241 #define _CLC4GLS3_LC4G4D4T 0x80
5242 #define _CLC4GLS3_G4D4T 0x80
5243
5244 //==============================================================================
5245
5246
5247 //==============================================================================
5248 // ICDIO Bits
5249
5250 extern __at(0x0F8C) __sfr ICDIO;
5251
5252 typedef struct
5253 {
5254 unsigned : 1;
5255 unsigned : 1;
5256 unsigned TRIS_ICDCLK : 1;
5257 unsigned TRIS_ICDDAT : 1;
5258 unsigned LAT_ICDCLK : 1;
5259 unsigned LAT_ICDDAT : 1;
5260 unsigned PORT_ICDCLK : 1;
5261 unsigned PORT_ICDDAT : 1;
5262 } __ICDIObits_t;
5263
5264 extern __at(0x0F8C) volatile __ICDIObits_t ICDIObits;
5265
5266 #define _TRIS_ICDCLK 0x04
5267 #define _TRIS_ICDDAT 0x08
5268 #define _LAT_ICDCLK 0x10
5269 #define _LAT_ICDDAT 0x20
5270 #define _PORT_ICDCLK 0x40
5271 #define _PORT_ICDDAT 0x80
5272
5273 //==============================================================================
5274
5275
5276 //==============================================================================
5277 // ICDCON0 Bits
5278
5279 extern __at(0x0F8D) __sfr ICDCON0;
5280
5281 typedef struct
5282 {
5283 unsigned RSTVEC : 1;
5284 unsigned : 1;
5285 unsigned : 1;
5286 unsigned DBGINEX : 1;
5287 unsigned : 1;
5288 unsigned SSTEP : 1;
5289 unsigned FREEZ : 1;
5290 unsigned INBUG : 1;
5291 } __ICDCON0bits_t;
5292
5293 extern __at(0x0F8D) volatile __ICDCON0bits_t ICDCON0bits;
5294
5295 #define _RSTVEC 0x01
5296 #define _DBGINEX 0x08
5297 #define _SSTEP 0x20
5298 #define _FREEZ 0x40
5299 #define _INBUG 0x80
5300
5301 //==============================================================================
5302
5303
5304 //==============================================================================
5305 // ICDSTAT Bits
5306
5307 extern __at(0x0F91) __sfr ICDSTAT;
5308
5309 typedef struct
5310 {
5311 unsigned : 1;
5312 unsigned USRHLTF : 1;
5313 unsigned : 1;
5314 unsigned : 1;
5315 unsigned : 1;
5316 unsigned : 1;
5317 unsigned TRP0HLTF : 1;
5318 unsigned TRP1HLTF : 1;
5319 } __ICDSTATbits_t;
5320
5321 extern __at(0x0F91) volatile __ICDSTATbits_t ICDSTATbits;
5322
5323 #define _USRHLTF 0x02
5324 #define _TRP0HLTF 0x40
5325 #define _TRP1HLTF 0x80
5326
5327 //==============================================================================
5328
5329
5330 //==============================================================================
5331 // DEVSEL Bits
5332
5333 extern __at(0x0F95) __sfr DEVSEL;
5334
5335 typedef union
5336 {
5337 struct
5338 {
5339 unsigned DEVSEL0 : 1;
5340 unsigned DEVSEL1 : 1;
5341 unsigned DEVSEL2 : 1;
5342 unsigned : 1;
5343 unsigned : 1;
5344 unsigned : 1;
5345 unsigned : 1;
5346 unsigned : 1;
5347 };
5348
5349 struct
5350 {
5351 unsigned DEVSEL : 3;
5352 unsigned : 5;
5353 };
5354 } __DEVSELbits_t;
5355
5356 extern __at(0x0F95) volatile __DEVSELbits_t DEVSELbits;
5357
5358 #define _DEVSEL0 0x01
5359 #define _DEVSEL1 0x02
5360 #define _DEVSEL2 0x04
5361
5362 //==============================================================================
5363
5364
5365 //==============================================================================
5366 // ICDINSTL Bits
5367
5368 extern __at(0x0F96) __sfr ICDINSTL;
5369
5370 typedef struct
5371 {
5372 unsigned DBGIN0 : 1;
5373 unsigned DBGIN1 : 1;
5374 unsigned DBGIN2 : 1;
5375 unsigned DBGIN3 : 1;
5376 unsigned DBGIN4 : 1;
5377 unsigned DBGIN5 : 1;
5378 unsigned DBGIN6 : 1;
5379 unsigned DBGIN7 : 1;
5380 } __ICDINSTLbits_t;
5381
5382 extern __at(0x0F96) volatile __ICDINSTLbits_t ICDINSTLbits;
5383
5384 #define _DBGIN0 0x01
5385 #define _DBGIN1 0x02
5386 #define _DBGIN2 0x04
5387 #define _DBGIN3 0x08
5388 #define _DBGIN4 0x10
5389 #define _DBGIN5 0x20
5390 #define _DBGIN6 0x40
5391 #define _DBGIN7 0x80
5392
5393 //==============================================================================
5394
5395
5396 //==============================================================================
5397 // ICDINSTH Bits
5398
5399 extern __at(0x0F97) __sfr ICDINSTH;
5400
5401 typedef struct
5402 {
5403 unsigned DBGIN8 : 1;
5404 unsigned DBGIN9 : 1;
5405 unsigned DBGIN10 : 1;
5406 unsigned DBGIN11 : 1;
5407 unsigned DBGIN12 : 1;
5408 unsigned DBGIN13 : 1;
5409 unsigned : 1;
5410 unsigned : 1;
5411 } __ICDINSTHbits_t;
5412
5413 extern __at(0x0F97) volatile __ICDINSTHbits_t ICDINSTHbits;
5414
5415 #define _DBGIN8 0x01
5416 #define _DBGIN9 0x02
5417 #define _DBGIN10 0x04
5418 #define _DBGIN11 0x08
5419 #define _DBGIN12 0x10
5420 #define _DBGIN13 0x20
5421
5422 //==============================================================================
5423
5424
5425 //==============================================================================
5426 // ICDBK0CON Bits
5427
5428 extern __at(0x0F9C) __sfr ICDBK0CON;
5429
5430 typedef struct
5431 {
5432 unsigned BKHLT : 1;
5433 unsigned : 1;
5434 unsigned : 1;
5435 unsigned : 1;
5436 unsigned : 1;
5437 unsigned : 1;
5438 unsigned : 1;
5439 unsigned BKEN : 1;
5440 } __ICDBK0CONbits_t;
5441
5442 extern __at(0x0F9C) volatile __ICDBK0CONbits_t ICDBK0CONbits;
5443
5444 #define _BKHLT 0x01
5445 #define _BKEN 0x80
5446
5447 //==============================================================================
5448
5449
5450 //==============================================================================
5451 // ICDBK0L Bits
5452
5453 extern __at(0x0F9D) __sfr ICDBK0L;
5454
5455 typedef struct
5456 {
5457 unsigned BKA0 : 1;
5458 unsigned BKA1 : 1;
5459 unsigned BKA2 : 1;
5460 unsigned BKA3 : 1;
5461 unsigned BKA4 : 1;
5462 unsigned BKA5 : 1;
5463 unsigned BKA6 : 1;
5464 unsigned BKA7 : 1;
5465 } __ICDBK0Lbits_t;
5466
5467 extern __at(0x0F9D) volatile __ICDBK0Lbits_t ICDBK0Lbits;
5468
5469 #define _BKA0 0x01
5470 #define _BKA1 0x02
5471 #define _BKA2 0x04
5472 #define _BKA3 0x08
5473 #define _BKA4 0x10
5474 #define _BKA5 0x20
5475 #define _BKA6 0x40
5476 #define _BKA7 0x80
5477
5478 //==============================================================================
5479
5480
5481 //==============================================================================
5482 // ICDBK0H Bits
5483
5484 extern __at(0x0F9E) __sfr ICDBK0H;
5485
5486 typedef struct
5487 {
5488 unsigned BKA8 : 1;
5489 unsigned BKA9 : 1;
5490 unsigned BKA10 : 1;
5491 unsigned BKA11 : 1;
5492 unsigned BKA12 : 1;
5493 unsigned BKA13 : 1;
5494 unsigned BKA14 : 1;
5495 unsigned : 1;
5496 } __ICDBK0Hbits_t;
5497
5498 extern __at(0x0F9E) volatile __ICDBK0Hbits_t ICDBK0Hbits;
5499
5500 #define _BKA8 0x01
5501 #define _BKA9 0x02
5502 #define _BKA10 0x04
5503 #define _BKA11 0x08
5504 #define _BKA12 0x10
5505 #define _BKA13 0x20
5506 #define _BKA14 0x40
5507
5508 //==============================================================================
5509
5510 extern __at(0x0FE3) __sfr BSRICDSHAD;
5511
5512 //==============================================================================
5513 // STATUS_SHAD Bits
5514
5515 extern __at(0x0FE4) __sfr STATUS_SHAD;
5516
5517 typedef struct
5518 {
5519 unsigned C_SHAD : 1;
5520 unsigned DC_SHAD : 1;
5521 unsigned Z_SHAD : 1;
5522 unsigned : 1;
5523 unsigned : 1;
5524 unsigned : 1;
5525 unsigned : 1;
5526 unsigned : 1;
5527 } __STATUS_SHADbits_t;
5528
5529 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
5530
5531 #define _C_SHAD 0x01
5532 #define _DC_SHAD 0x02
5533 #define _Z_SHAD 0x04
5534
5535 //==============================================================================
5536
5537 extern __at(0x0FE5) __sfr WREG_SHAD;
5538 extern __at(0x0FE6) __sfr BSR_SHAD;
5539 extern __at(0x0FE7) __sfr PCLATH_SHAD;
5540 extern __at(0x0FE8) __sfr FSR0L_SHAD;
5541 extern __at(0x0FE9) __sfr FSR0H_SHAD;
5542 extern __at(0x0FEA) __sfr FSR1L_SHAD;
5543 extern __at(0x0FEB) __sfr FSR1H_SHAD;
5544 extern __at(0x0FED) __sfr STKPTR;
5545 extern __at(0x0FEE) __sfr TOSL;
5546 extern __at(0x0FEF) __sfr TOSH;
5547
5548 //==============================================================================
5549 //
5550 // Configuration Bits
5551 //
5552 //==============================================================================
5553
5554 #define _CONFIG1 0x8007
5555 #define _CONFIG2 0x8008
5556
5557 //----------------------------- CONFIG1 Options -------------------------------
5558
5559 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
5560 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
5561 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
5562 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
5563 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
5564 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
5565 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
5566 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
5567 #define _WDTE_OFF 0x3FE7 // WDT disabled.
5568 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
5569 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
5570 #define _WDTE_ON 0x3FFF // WDT enabled.
5571 #define _PWRTE_ON 0x3FDF // PWRT enabled.
5572 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
5573 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
5574 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
5575 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
5576 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
5577 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
5578 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
5579 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
5580 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
5581 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
5582 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
5583 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
5584 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
5585 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
5586 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
5587
5588 //----------------------------- CONFIG2 Options -------------------------------
5589
5590 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
5591 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
5592 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
5593 #define _WRT_OFF 0x3FFF // Write protection off.
5594 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
5595 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
5596 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
5597 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
5598 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
5599 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
5600 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
5601 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
5602 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
5603 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
5604
5605 //==============================================================================
5606
5607 #define _DEVID1 0x8006
5608
5609 #define _IDLOC0 0x8000
5610 #define _IDLOC1 0x8001
5611 #define _IDLOC2 0x8002
5612 #define _IDLOC3 0x8003
5613
5614 //==============================================================================
5615
5616 #ifndef NO_BIT_DEFINES
5617
5618 #define ADON ADCON0bits.ADON // bit 0
5619 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
5620 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
5621 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
5622 #define CHS0 ADCON0bits.CHS0 // bit 2
5623 #define CHS1 ADCON0bits.CHS1 // bit 3
5624 #define CHS2 ADCON0bits.CHS2 // bit 4
5625 #define CHS3 ADCON0bits.CHS3 // bit 5
5626 #define CHS4 ADCON0bits.CHS4 // bit 6
5627
5628 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
5629 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
5630 #define ADFM ADCON1bits.ADFM // bit 7
5631
5632 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
5633 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
5634 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
5635 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
5636
5637 #define ANSA0 ANSELAbits.ANSA0 // bit 0
5638 #define ANSA1 ANSELAbits.ANSA1 // bit 1
5639 #define ANSA2 ANSELAbits.ANSA2 // bit 2
5640 #define ANSA4 ANSELAbits.ANSA4 // bit 4
5641
5642 #define ANSB4 ANSELBbits.ANSB4 // bit 4
5643 #define ANSB5 ANSELBbits.ANSB5 // bit 5
5644
5645 #define ANSC0 ANSELCbits.ANSC0 // bit 0
5646 #define ANSC1 ANSELCbits.ANSC1 // bit 1
5647 #define ANSC2 ANSELCbits.ANSC2 // bit 2
5648 #define ANSC3 ANSELCbits.ANSC3 // bit 3
5649 #define ANSC6 ANSELCbits.ANSC6 // bit 6
5650 #define ANSC7 ANSELCbits.ANSC7 // bit 7
5651
5652 #define NCO1SEL APFCONbits.NCO1SEL // bit 0
5653 #define CLC1SEL APFCONbits.CLC1SEL // bit 1
5654 #define T1GSEL APFCONbits.T1GSEL // bit 3
5655 #define SSSEL APFCONbits.SSSEL // bit 4
5656
5657 #define ABDEN BAUDCONbits.ABDEN // bit 0
5658 #define WUE BAUDCONbits.WUE // bit 1
5659 #define BRG16 BAUDCONbits.BRG16 // bit 3
5660 #define SCKP BAUDCONbits.SCKP // bit 4
5661 #define RCIDL BAUDCONbits.RCIDL // bit 6
5662 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
5663
5664 #define BORRDY BORCONbits.BORRDY // bit 0
5665 #define BORFS BORCONbits.BORFS // bit 6
5666 #define SBOREN BORCONbits.SBOREN // bit 7
5667
5668 #define BSR0 BSRbits.BSR0 // bit 0
5669 #define BSR1 BSRbits.BSR1 // bit 1
5670 #define BSR2 BSRbits.BSR2 // bit 2
5671 #define BSR3 BSRbits.BSR3 // bit 3
5672 #define BSR4 BSRbits.BSR4 // bit 4
5673
5674 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
5675 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits
5676 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
5677 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits
5678 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
5679 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits
5680 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
5681 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits
5682 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
5683 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits
5684 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
5685 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits
5686 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits
5687 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits
5688 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
5689 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits
5690
5691 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
5692 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
5693 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
5694 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
5695 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
5696 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
5697 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
5698 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
5699 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
5700 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
5701 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
5702 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
5703 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
5704 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
5705 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
5706 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
5707
5708 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
5709 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
5710 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
5711 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
5712 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
5713 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
5714 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
5715 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
5716 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
5717 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
5718 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
5719 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
5720 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
5721 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
5722 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
5723 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
5724
5725 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
5726 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
5727 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
5728 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
5729 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
5730 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
5731 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
5732 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
5733 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
5734 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
5735
5736 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
5737 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
5738 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
5739 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
5740 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
5741 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
5742 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits
5743 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits
5744 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits
5745 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits
5746 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits
5747 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits
5748
5749 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits
5750 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits
5751 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits
5752 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits
5753 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits
5754 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits
5755 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits
5756 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits
5757 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits
5758 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits
5759 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits
5760 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits
5761
5762 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
5763 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
5764 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2
5765 #define MCLC4OUT CLCDATAbits.MCLC4OUT // bit 3
5766
5767 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
5768 #define C1HYS CM1CON0bits.C1HYS // bit 1
5769 #define C1SP CM1CON0bits.C1SP // bit 2
5770 #define C1POL CM1CON0bits.C1POL // bit 4
5771 #define C1OE CM1CON0bits.C1OE // bit 5
5772 #define C1OUT CM1CON0bits.C1OUT // bit 6
5773 #define C1ON CM1CON0bits.C1ON // bit 7
5774
5775 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
5776 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
5777 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
5778 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
5779 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
5780 #define C1INTN CM1CON1bits.C1INTN // bit 6
5781 #define C1INTP CM1CON1bits.C1INTP // bit 7
5782
5783 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
5784 #define C2HYS CM2CON0bits.C2HYS // bit 1
5785 #define C2SP CM2CON0bits.C2SP // bit 2
5786 #define C2POL CM2CON0bits.C2POL // bit 4
5787 #define C2OE CM2CON0bits.C2OE // bit 5
5788 #define C2OUT CM2CON0bits.C2OUT // bit 6
5789 #define C2ON CM2CON0bits.C2ON // bit 7
5790
5791 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
5792 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
5793 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
5794 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
5795 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
5796 #define C2INTN CM2CON1bits.C2INTN // bit 6
5797 #define C2INTP CM2CON1bits.C2INTP // bit 7
5798
5799 #define MC1OUT CMOUTbits.MC1OUT // bit 0
5800 #define MC2OUT CMOUTbits.MC2OUT // bit 1
5801
5802 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
5803 #define G1POLA CWG1CON0bits.G1POLA // bit 3
5804 #define G1POLB CWG1CON0bits.G1POLB // bit 4
5805 #define G1OEA CWG1CON0bits.G1OEA // bit 5
5806 #define G1OEB CWG1CON0bits.G1OEB // bit 6
5807 #define G1EN CWG1CON0bits.G1EN // bit 7
5808
5809 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
5810 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
5811 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
5812 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
5813 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
5814 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
5815 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
5816
5817 #define G1ASDSCLC2 CWG1CON2bits.G1ASDSCLC2 // bit 0
5818 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1
5819 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
5820 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
5821 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
5822 #define G1ASE CWG1CON2bits.G1ASE // bit 7
5823
5824 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
5825 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
5826 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
5827 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
5828 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
5829 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
5830
5831 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
5832 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
5833 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
5834 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
5835 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
5836 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
5837
5838 #define DACPSS DACCON0bits.DACPSS // bit 2
5839 #define DACOE2 DACCON0bits.DACOE2 // bit 4
5840 #define DACOE1 DACCON0bits.DACOE1 // bit 5
5841 #define DACEN DACCON0bits.DACEN // bit 7
5842
5843 #define DACR0 DACCON1bits.DACR0 // bit 0
5844 #define DACR1 DACCON1bits.DACR1 // bit 1
5845 #define DACR2 DACCON1bits.DACR2 // bit 2
5846 #define DACR3 DACCON1bits.DACR3 // bit 3
5847 #define DACR4 DACCON1bits.DACR4 // bit 4
5848
5849 #define DEVSEL0 DEVSELbits.DEVSEL0 // bit 0
5850 #define DEVSEL1 DEVSELbits.DEVSEL1 // bit 1
5851 #define DEVSEL2 DEVSELbits.DEVSEL2 // bit 2
5852
5853 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
5854 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
5855 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
5856 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
5857 #define TSRNG FVRCONbits.TSRNG // bit 4
5858 #define TSEN FVRCONbits.TSEN // bit 5
5859 #define FVRRDY FVRCONbits.FVRRDY // bit 6
5860 #define FVREN FVRCONbits.FVREN // bit 7
5861
5862 #define BKHLT ICDBK0CONbits.BKHLT // bit 0
5863 #define BKEN ICDBK0CONbits.BKEN // bit 7
5864
5865 #define BKA8 ICDBK0Hbits.BKA8 // bit 0
5866 #define BKA9 ICDBK0Hbits.BKA9 // bit 1
5867 #define BKA10 ICDBK0Hbits.BKA10 // bit 2
5868 #define BKA11 ICDBK0Hbits.BKA11 // bit 3
5869 #define BKA12 ICDBK0Hbits.BKA12 // bit 4
5870 #define BKA13 ICDBK0Hbits.BKA13 // bit 5
5871 #define BKA14 ICDBK0Hbits.BKA14 // bit 6
5872
5873 #define BKA0 ICDBK0Lbits.BKA0 // bit 0
5874 #define BKA1 ICDBK0Lbits.BKA1 // bit 1
5875 #define BKA2 ICDBK0Lbits.BKA2 // bit 2
5876 #define BKA3 ICDBK0Lbits.BKA3 // bit 3
5877 #define BKA4 ICDBK0Lbits.BKA4 // bit 4
5878 #define BKA5 ICDBK0Lbits.BKA5 // bit 5
5879 #define BKA6 ICDBK0Lbits.BKA6 // bit 6
5880 #define BKA7 ICDBK0Lbits.BKA7 // bit 7
5881
5882 #define RSTVEC ICDCON0bits.RSTVEC // bit 0
5883 #define DBGINEX ICDCON0bits.DBGINEX // bit 3
5884 #define SSTEP ICDCON0bits.SSTEP // bit 5
5885 #define FREEZ ICDCON0bits.FREEZ // bit 6
5886 #define INBUG ICDCON0bits.INBUG // bit 7
5887
5888 #define DBGIN8 ICDINSTHbits.DBGIN8 // bit 0
5889 #define DBGIN9 ICDINSTHbits.DBGIN9 // bit 1
5890 #define DBGIN10 ICDINSTHbits.DBGIN10 // bit 2
5891 #define DBGIN11 ICDINSTHbits.DBGIN11 // bit 3
5892 #define DBGIN12 ICDINSTHbits.DBGIN12 // bit 4
5893 #define DBGIN13 ICDINSTHbits.DBGIN13 // bit 5
5894
5895 #define DBGIN0 ICDINSTLbits.DBGIN0 // bit 0
5896 #define DBGIN1 ICDINSTLbits.DBGIN1 // bit 1
5897 #define DBGIN2 ICDINSTLbits.DBGIN2 // bit 2
5898 #define DBGIN3 ICDINSTLbits.DBGIN3 // bit 3
5899 #define DBGIN4 ICDINSTLbits.DBGIN4 // bit 4
5900 #define DBGIN5 ICDINSTLbits.DBGIN5 // bit 5
5901 #define DBGIN6 ICDINSTLbits.DBGIN6 // bit 6
5902 #define DBGIN7 ICDINSTLbits.DBGIN7 // bit 7
5903
5904 #define TRIS_ICDCLK ICDIObits.TRIS_ICDCLK // bit 2
5905 #define TRIS_ICDDAT ICDIObits.TRIS_ICDDAT // bit 3
5906 #define LAT_ICDCLK ICDIObits.LAT_ICDCLK // bit 4
5907 #define LAT_ICDDAT ICDIObits.LAT_ICDDAT // bit 5
5908 #define PORT_ICDCLK ICDIObits.PORT_ICDCLK // bit 6
5909 #define PORT_ICDDAT ICDIObits.PORT_ICDDAT // bit 7
5910
5911 #define USRHLTF ICDSTATbits.USRHLTF // bit 1
5912 #define TRP0HLTF ICDSTATbits.TRP0HLTF // bit 6
5913 #define TRP1HLTF ICDSTATbits.TRP1HLTF // bit 7
5914
5915 #define IOCIF INTCONbits.IOCIF // bit 0
5916 #define INTF INTCONbits.INTF // bit 1
5917 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
5918 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
5919 #define IOCIE INTCONbits.IOCIE // bit 3
5920 #define INTE INTCONbits.INTE // bit 4
5921 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
5922 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
5923 #define PEIE INTCONbits.PEIE // bit 6
5924 #define GIE INTCONbits.GIE // bit 7
5925
5926 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
5927 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
5928 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
5929 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
5930 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
5931 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
5932
5933 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
5934 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
5935 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
5936 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
5937 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
5938 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
5939
5940 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
5941 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
5942 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
5943 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
5944 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
5945 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
5946
5947 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
5948 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
5949 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
5950 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
5951
5952 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
5953 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
5954 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
5955 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
5956
5957 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
5958 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
5959 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
5960 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
5961
5962 #define LATA0 LATAbits.LATA0 // bit 0
5963 #define LATA1 LATAbits.LATA1 // bit 1
5964 #define LATA2 LATAbits.LATA2 // bit 2
5965 #define LATA4 LATAbits.LATA4 // bit 4
5966 #define LATA5 LATAbits.LATA5 // bit 5
5967
5968 #define LATB4 LATBbits.LATB4 // bit 4
5969 #define LATB5 LATBbits.LATB5 // bit 5
5970 #define LATB6 LATBbits.LATB6 // bit 6
5971 #define LATB7 LATBbits.LATB7 // bit 7
5972
5973 #define LATC0 LATCbits.LATC0 // bit 0
5974 #define LATC1 LATCbits.LATC1 // bit 1
5975 #define LATC2 LATCbits.LATC2 // bit 2
5976 #define LATC3 LATCbits.LATC3 // bit 3
5977 #define LATC4 LATCbits.LATC4 // bit 4
5978 #define LATC5 LATCbits.LATC5 // bit 5
5979 #define LATC6 LATCbits.LATC6 // bit 6
5980 #define LATC7 LATCbits.LATC7 // bit 7
5981
5982 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
5983 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
5984 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
5985 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
5986 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
5987 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
5988 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
5989 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
5990
5991 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
5992 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
5993 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
5994 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
5995 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
5996 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
5997 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
5998 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
5999
6000 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
6001 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
6002 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
6003 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
6004
6005 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
6006 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
6007 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
6008 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
6009 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
6010
6011 #define N1PFM NCO1CONbits.N1PFM // bit 0
6012 #define N1POL NCO1CONbits.N1POL // bit 4
6013 #define N1OUT NCO1CONbits.N1OUT // bit 5
6014 #define N1OE NCO1CONbits.N1OE // bit 6
6015 #define N1EN NCO1CONbits.N1EN // bit 7
6016
6017 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
6018 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
6019 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
6020 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
6021 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
6022 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
6023 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
6024 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
6025
6026 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
6027 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
6028 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
6029 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
6030 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
6031 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
6032 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
6033 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
6034
6035 #define PS0 OPTION_REGbits.PS0 // bit 0
6036 #define PS1 OPTION_REGbits.PS1 // bit 1
6037 #define PS2 OPTION_REGbits.PS2 // bit 2
6038 #define PSA OPTION_REGbits.PSA // bit 3
6039 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6040 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6041 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6042 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6043 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6044 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6045
6046 #define SCS0 OSCCONbits.SCS0 // bit 0
6047 #define SCS1 OSCCONbits.SCS1 // bit 1
6048 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6049 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6050 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6051 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6052
6053 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6054 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6055 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6056 #define OSTS OSCSTATbits.OSTS // bit 5
6057 #define SOSCR OSCSTATbits.SOSCR // bit 7
6058
6059 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6060 #define NOT_POR PCONbits.NOT_POR // bit 1
6061 #define NOT_RI PCONbits.NOT_RI // bit 2
6062 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6063 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
6064 #define STKUNF PCONbits.STKUNF // bit 6
6065 #define STKOVF PCONbits.STKOVF // bit 7
6066
6067 #define TMR1IE PIE1bits.TMR1IE // bit 0
6068 #define TMR2IE PIE1bits.TMR2IE // bit 1
6069 #define SSP1IE PIE1bits.SSP1IE // bit 3
6070 #define TXIE PIE1bits.TXIE // bit 4
6071 #define RCIE PIE1bits.RCIE // bit 5
6072 #define ADIE PIE1bits.ADIE // bit 6
6073 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6074
6075 #define NCO1IE PIE2bits.NCO1IE // bit 2
6076 #define BCL1IE PIE2bits.BCL1IE // bit 3
6077 #define C1IE PIE2bits.C1IE // bit 5
6078 #define C2IE PIE2bits.C2IE // bit 6
6079 #define OSFIE PIE2bits.OSFIE // bit 7
6080
6081 #define CLC1IE PIE3bits.CLC1IE // bit 0
6082 #define CLC2IE PIE3bits.CLC2IE // bit 1
6083 #define CLC3IE PIE3bits.CLC3IE // bit 2
6084 #define CLC4IE PIE3bits.CLC4IE // bit 3
6085
6086 #define TMR1IF PIR1bits.TMR1IF // bit 0
6087 #define TMR2IF PIR1bits.TMR2IF // bit 1
6088 #define SSP1IF PIR1bits.SSP1IF // bit 3
6089 #define TXIF PIR1bits.TXIF // bit 4
6090 #define RCIF PIR1bits.RCIF // bit 5
6091 #define ADIF PIR1bits.ADIF // bit 6
6092 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6093
6094 #define NCO1IF PIR2bits.NCO1IF // bit 2
6095 #define BCL1IF PIR2bits.BCL1IF // bit 3
6096 #define C1IF PIR2bits.C1IF // bit 5
6097 #define C2IF PIR2bits.C2IF // bit 6
6098 #define OSFIF PIR2bits.OSFIF // bit 7
6099
6100 #define CLC1IF PIR3bits.CLC1IF // bit 0
6101 #define CLC2IF PIR3bits.CLC2IF // bit 1
6102 #define CLC3IF PIR3bits.CLC3IF // bit 2
6103 #define CLC4IF PIR3bits.CLC4IF // bit 3
6104
6105 #define RD PMCON1bits.RD // bit 0
6106 #define WR PMCON1bits.WR // bit 1
6107 #define WREN PMCON1bits.WREN // bit 2
6108 #define WRERR PMCON1bits.WRERR // bit 3
6109 #define FREE PMCON1bits.FREE // bit 4
6110 #define LWLO PMCON1bits.LWLO // bit 5
6111 #define CFGS PMCON1bits.CFGS // bit 6
6112
6113 #define RA0 PORTAbits.RA0 // bit 0
6114 #define RA1 PORTAbits.RA1 // bit 1
6115 #define RA2 PORTAbits.RA2 // bit 2
6116 #define RA3 PORTAbits.RA3 // bit 3
6117 #define RA4 PORTAbits.RA4 // bit 4
6118 #define RA5 PORTAbits.RA5 // bit 5
6119
6120 #define RB4 PORTBbits.RB4 // bit 4
6121 #define RB5 PORTBbits.RB5 // bit 5
6122 #define RB6 PORTBbits.RB6 // bit 6
6123 #define RB7 PORTBbits.RB7 // bit 7
6124
6125 #define RC0 PORTCbits.RC0 // bit 0
6126 #define RC1 PORTCbits.RC1 // bit 1
6127 #define RC2 PORTCbits.RC2 // bit 2
6128 #define RC3 PORTCbits.RC3 // bit 3
6129 #define RC4 PORTCbits.RC4 // bit 4
6130 #define RC5 PORTCbits.RC5 // bit 5
6131 #define RC6 PORTCbits.RC6 // bit 6
6132 #define RC7 PORTCbits.RC7 // bit 7
6133
6134 #define PWM1POL PWM1CONbits.PWM1POL // bit 4
6135 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5
6136 #define PWM1OE PWM1CONbits.PWM1OE // bit 6
6137 #define PWM1EN PWM1CONbits.PWM1EN // bit 7
6138
6139 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
6140 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
6141 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
6142 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
6143 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
6144 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
6145 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
6146 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
6147
6148 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6
6149 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7
6150
6151 #define PWM2POL PWM2CONbits.PWM2POL // bit 4
6152 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5
6153 #define PWM2OE PWM2CONbits.PWM2OE // bit 6
6154 #define PWM2EN PWM2CONbits.PWM2EN // bit 7
6155
6156 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
6157 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
6158 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
6159 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
6160 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
6161 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
6162 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
6163 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
6164
6165 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6
6166 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7
6167
6168 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
6169 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
6170 #define PWM3OE PWM3CONbits.PWM3OE // bit 6
6171 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
6172
6173 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
6174 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
6175 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
6176 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
6177 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
6178 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
6179 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
6180 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
6181
6182 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
6183 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
6184
6185 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
6186 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
6187 #define PWM4OE PWM4CONbits.PWM4OE // bit 6
6188 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
6189
6190 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
6191 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
6192 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
6193 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
6194 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
6195 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
6196 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
6197 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
6198
6199 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
6200 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
6201
6202 #define RX9D RCSTAbits.RX9D // bit 0
6203 #define OERR RCSTAbits.OERR // bit 1
6204 #define FERR RCSTAbits.FERR // bit 2
6205 #define ADDEN RCSTAbits.ADDEN // bit 3
6206 #define CREN RCSTAbits.CREN // bit 4
6207 #define SREN RCSTAbits.SREN // bit 5
6208 #define RX9 RCSTAbits.RX9 // bit 6
6209 #define SPEN RCSTAbits.SPEN // bit 7
6210
6211 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
6212 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
6213 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
6214 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
6215 #define CKP SSP1CON1bits.CKP // bit 4
6216 #define SSPEN SSP1CON1bits.SSPEN // bit 5
6217 #define SSPOV SSP1CON1bits.SSPOV // bit 6
6218 #define WCOL SSP1CON1bits.WCOL // bit 7
6219
6220 #define SEN SSP1CON2bits.SEN // bit 0
6221 #define RSEN SSP1CON2bits.RSEN // bit 1
6222 #define PEN SSP1CON2bits.PEN // bit 2
6223 #define RCEN SSP1CON2bits.RCEN // bit 3
6224 #define ACKEN SSP1CON2bits.ACKEN // bit 4
6225 #define ACKDT SSP1CON2bits.ACKDT // bit 5
6226 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
6227 #define GCEN SSP1CON2bits.GCEN // bit 7
6228
6229 #define DHEN SSP1CON3bits.DHEN // bit 0
6230 #define AHEN SSP1CON3bits.AHEN // bit 1
6231 #define SBCDE SSP1CON3bits.SBCDE // bit 2
6232 #define SDAHT SSP1CON3bits.SDAHT // bit 3
6233 #define BOEN SSP1CON3bits.BOEN // bit 4
6234 #define SCIE SSP1CON3bits.SCIE // bit 5
6235 #define PCIE SSP1CON3bits.PCIE // bit 6
6236 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
6237
6238 #define BF SSP1STATbits.BF // bit 0
6239 #define UA SSP1STATbits.UA // bit 1
6240 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
6241 #define S SSP1STATbits.S // bit 3
6242 #define P SSP1STATbits.P // bit 4
6243 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
6244 #define CKE SSP1STATbits.CKE // bit 6
6245 #define SMP SSP1STATbits.SMP // bit 7
6246
6247 #define C STATUSbits.C // bit 0
6248 #define DC STATUSbits.DC // bit 1
6249 #define Z STATUSbits.Z // bit 2
6250 #define NOT_PD STATUSbits.NOT_PD // bit 3
6251 #define NOT_TO STATUSbits.NOT_TO // bit 4
6252
6253 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
6254 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
6255 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
6256
6257 #define TMR1ON T1CONbits.TMR1ON // bit 0
6258 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
6259 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
6260 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
6261 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
6262 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
6263 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
6264
6265 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
6266 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
6267 #define T1GVAL T1GCONbits.T1GVAL // bit 2
6268 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
6269 #define T1GSPM T1GCONbits.T1GSPM // bit 4
6270 #define T1GTM T1GCONbits.T1GTM // bit 5
6271 #define T1GPOL T1GCONbits.T1GPOL // bit 6
6272 #define TMR1GE T1GCONbits.TMR1GE // bit 7
6273
6274 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
6275 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
6276 #define TMR2ON T2CONbits.TMR2ON // bit 2
6277 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
6278 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
6279 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
6280 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
6281
6282 #define TRISA0 TRISAbits.TRISA0 // bit 0
6283 #define TRISA1 TRISAbits.TRISA1 // bit 1
6284 #define TRISA2 TRISAbits.TRISA2 // bit 2
6285 #define TRISA3 TRISAbits.TRISA3 // bit 3
6286 #define TRISA4 TRISAbits.TRISA4 // bit 4
6287 #define TRISA5 TRISAbits.TRISA5 // bit 5
6288
6289 #define TRISB4 TRISBbits.TRISB4 // bit 4
6290 #define TRISB5 TRISBbits.TRISB5 // bit 5
6291 #define TRISB6 TRISBbits.TRISB6 // bit 6
6292 #define TRISB7 TRISBbits.TRISB7 // bit 7
6293
6294 #define TRISC0 TRISCbits.TRISC0 // bit 0
6295 #define TRISC1 TRISCbits.TRISC1 // bit 1
6296 #define TRISC2 TRISCbits.TRISC2 // bit 2
6297 #define TRISC3 TRISCbits.TRISC3 // bit 3
6298 #define TRISC4 TRISCbits.TRISC4 // bit 4
6299 #define TRISC5 TRISCbits.TRISC5 // bit 5
6300 #define TRISC6 TRISCbits.TRISC6 // bit 6
6301 #define TRISC7 TRISCbits.TRISC7 // bit 7
6302
6303 #define TX9D TXSTAbits.TX9D // bit 0
6304 #define TRMT TXSTAbits.TRMT // bit 1
6305 #define BRGH TXSTAbits.BRGH // bit 2
6306 #define SENDB TXSTAbits.SENDB // bit 3
6307 #define SYNC TXSTAbits.SYNC // bit 4
6308 #define TXEN TXSTAbits.TXEN // bit 5
6309 #define TX9 TXSTAbits.TX9 // bit 6
6310 #define CSRC TXSTAbits.CSRC // bit 7
6311
6312 #define SWDTEN WDTCONbits.SWDTEN // bit 0
6313 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
6314 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
6315 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
6316 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
6317 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
6318
6319 #define WPUA0 WPUAbits.WPUA0 // bit 0
6320 #define WPUA1 WPUAbits.WPUA1 // bit 1
6321 #define WPUA2 WPUAbits.WPUA2 // bit 2
6322 #define WPUA3 WPUAbits.WPUA3 // bit 3
6323 #define WPUA4 WPUAbits.WPUA4 // bit 4
6324 #define WPUA5 WPUAbits.WPUA5 // bit 5
6325
6326 #define WPUB4 WPUBbits.WPUB4 // bit 4
6327 #define WPUB5 WPUBbits.WPUB5 // bit 5
6328 #define WPUB6 WPUBbits.WPUB6 // bit 6
6329 #define WPUB7 WPUBbits.WPUB7 // bit 7
6330
6331 #endif // #ifndef NO_BIT_DEFINES
6332
6333 #endif // #ifndef __PIC16LF1508_H__
SDCC git mirror