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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16lf1575.h
blobc065be29be9c9e09ca545339cd8daf707a269fdf
1 /*
2 * This declarations of the PIC16LF1575 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:08 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16LF1575_H__
26 #define __PIC16LF1575_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTC_ADDR 0x000E
52 #define PIR1_ADDR 0x0011
53 #define PIR2_ADDR 0x0012
54 #define PIR3_ADDR 0x0013
55 #define TMR0_ADDR 0x0015
56 #define TMR1_ADDR 0x0016
57 #define TMR1L_ADDR 0x0016
58 #define TMR1H_ADDR 0x0017
59 #define T1CON_ADDR 0x0018
60 #define T1GCON_ADDR 0x0019
61 #define TMR2_ADDR 0x001A
62 #define PR2_ADDR 0x001B
63 #define T2CON_ADDR 0x001C
64 #define TRISA_ADDR 0x008C
65 #define TRISC_ADDR 0x008E
66 #define PIE1_ADDR 0x0091
67 #define PIE2_ADDR 0x0092
68 #define PIE3_ADDR 0x0093
69 #define OPTION_REG_ADDR 0x0095
70 #define PCON_ADDR 0x0096
71 #define WDTCON_ADDR 0x0097
72 #define OSCTUNE_ADDR 0x0098
73 #define OSCCON_ADDR 0x0099
74 #define OSCSTAT_ADDR 0x009A
75 #define ADRES_ADDR 0x009B
76 #define ADRESL_ADDR 0x009B
77 #define ADRESH_ADDR 0x009C
78 #define ADCON0_ADDR 0x009D
79 #define ADCON1_ADDR 0x009E
80 #define ADCON2_ADDR 0x009F
81 #define LATA_ADDR 0x010C
82 #define LATC_ADDR 0x010E
83 #define CM1CON0_ADDR 0x0111
84 #define CM1CON1_ADDR 0x0112
85 #define CM2CON0_ADDR 0x0113
86 #define CM2CON1_ADDR 0x0114
87 #define CMOUT_ADDR 0x0115
88 #define BORCON_ADDR 0x0116
89 #define FVRCON_ADDR 0x0117
90 #define DACCON0_ADDR 0x0118
91 #define DACCON1_ADDR 0x0119
92 #define ANSELA_ADDR 0x018C
93 #define ANSELC_ADDR 0x018E
94 #define PMADR_ADDR 0x0191
95 #define PMADRL_ADDR 0x0191
96 #define PMADRH_ADDR 0x0192
97 #define PMDAT_ADDR 0x0193
98 #define PMDATL_ADDR 0x0193
99 #define PMDATH_ADDR 0x0194
100 #define PMCON1_ADDR 0x0195
101 #define PMCON2_ADDR 0x0196
102 #define RCREG_ADDR 0x0199
103 #define TXREG_ADDR 0x019A
104 #define SPBRG_ADDR 0x019B
105 #define SPBRGL_ADDR 0x019B
106 #define SPBRGH_ADDR 0x019C
107 #define RCSTA_ADDR 0x019D
108 #define TXSTA_ADDR 0x019E
109 #define BAUDCON_ADDR 0x019F
110 #define WPUA_ADDR 0x020C
111 #define WPUC_ADDR 0x020E
112 #define ODCONA_ADDR 0x028C
113 #define ODCONC_ADDR 0x028E
114 #define SLRCONA_ADDR 0x030C
115 #define SLRCONC_ADDR 0x030E
116 #define INLVLA_ADDR 0x038C
117 #define INLVLC_ADDR 0x038E
118 #define IOCAP_ADDR 0x0391
119 #define IOCAN_ADDR 0x0392
120 #define IOCAF_ADDR 0x0393
121 #define IOCCP_ADDR 0x0397
122 #define IOCCN_ADDR 0x0398
123 #define IOCCF_ADDR 0x0399
124 #define CWG1DBR_ADDR 0x0691
125 #define CWG1DBF_ADDR 0x0692
126 #define CWG1CON0_ADDR 0x0693
127 #define CWG1CON1_ADDR 0x0694
128 #define CWG1CON2_ADDR 0x0695
129 #define PWMEN_ADDR 0x0D8E
130 #define PWMLD_ADDR 0x0D8F
131 #define PWMOUT_ADDR 0x0D90
132 #define PWM1PH_ADDR 0x0D91
133 #define PWM1PHL_ADDR 0x0D91
134 #define PWM1PHH_ADDR 0x0D92
135 #define PWM1DC_ADDR 0x0D93
136 #define PWM1DCL_ADDR 0x0D93
137 #define PWM1DCH_ADDR 0x0D94
138 #define PWM1PR_ADDR 0x0D95
139 #define PWM1PRL_ADDR 0x0D95
140 #define PWM1PRH_ADDR 0x0D96
141 #define PWM1OF_ADDR 0x0D97
142 #define PWM1OFL_ADDR 0x0D97
143 #define PWM1OFH_ADDR 0x0D98
144 #define PWM1TMR_ADDR 0x0D99
145 #define PWM1TMRL_ADDR 0x0D99
146 #define PWM1TMRH_ADDR 0x0D9A
147 #define PWM1CON_ADDR 0x0D9B
148 #define PWM1INTCON_ADDR 0x0D9C
149 #define PWM1INTE_ADDR 0x0D9C
150 #define PWM1INTF_ADDR 0x0D9D
151 #define PWM1INTFLG_ADDR 0x0D9D
152 #define PWM1CLKCON_ADDR 0x0D9E
153 #define PWM1LDCON_ADDR 0x0D9F
154 #define PWM1OFCON_ADDR 0x0DA0
155 #define PWM2PH_ADDR 0x0DA1
156 #define PWM2PHL_ADDR 0x0DA1
157 #define PWM2PHH_ADDR 0x0DA2
158 #define PWM2DC_ADDR 0x0DA3
159 #define PWM2DCL_ADDR 0x0DA3
160 #define PWM2DCH_ADDR 0x0DA4
161 #define PWM2PR_ADDR 0x0DA5
162 #define PWM2PRL_ADDR 0x0DA5
163 #define PWM2PRH_ADDR 0x0DA6
164 #define PWM2OF_ADDR 0x0DA7
165 #define PWM2OFL_ADDR 0x0DA7
166 #define PWM2OFH_ADDR 0x0DA8
167 #define PWM2TMR_ADDR 0x0DA9
168 #define PWM2TMRL_ADDR 0x0DA9
169 #define PWM2TMRH_ADDR 0x0DAA
170 #define PWM2CON_ADDR 0x0DAB
171 #define PWM2INTCON_ADDR 0x0DAC
172 #define PWM2INTE_ADDR 0x0DAC
173 #define PWM2INTF_ADDR 0x0DAD
174 #define PWM2INTFLG_ADDR 0x0DAD
175 #define PWM2CLKCON_ADDR 0x0DAE
176 #define PWM2LDCON_ADDR 0x0DAF
177 #define PWM2OFCON_ADDR 0x0DB0
178 #define PWM3PH_ADDR 0x0DB1
179 #define PWM3PHL_ADDR 0x0DB1
180 #define PWM3PHH_ADDR 0x0DB2
181 #define PWM3DC_ADDR 0x0DB3
182 #define PWM3DCL_ADDR 0x0DB3
183 #define PWM3DCH_ADDR 0x0DB4
184 #define PWM3PR_ADDR 0x0DB5
185 #define PWM3PRL_ADDR 0x0DB5
186 #define PWM3PRH_ADDR 0x0DB6
187 #define PWM3OF_ADDR 0x0DB7
188 #define PWM3OFL_ADDR 0x0DB7
189 #define PWM3OFH_ADDR 0x0DB8
190 #define PWM3TMR_ADDR 0x0DB9
191 #define PWM3TMRL_ADDR 0x0DB9
192 #define PWM3TMRH_ADDR 0x0DBA
193 #define PWM3CON_ADDR 0x0DBB
194 #define PWM3INTCON_ADDR 0x0DBC
195 #define PWM3INTE_ADDR 0x0DBC
196 #define PWM3INTF_ADDR 0x0DBD
197 #define PWM3INTFLG_ADDR 0x0DBD
198 #define PWM3CLKCON_ADDR 0x0DBE
199 #define PWM3LDCON_ADDR 0x0DBF
200 #define PWM3OFCON_ADDR 0x0DC0
201 #define PWM4PH_ADDR 0x0DC1
202 #define PWM4PHL_ADDR 0x0DC1
203 #define PWM4PHH_ADDR 0x0DC2
204 #define PWM4DC_ADDR 0x0DC3
205 #define PWM4DCL_ADDR 0x0DC3
206 #define PWM4DCH_ADDR 0x0DC4
207 #define PWM4PR_ADDR 0x0DC5
208 #define PWM4PRL_ADDR 0x0DC5
209 #define PWM4PRH_ADDR 0x0DC6
210 #define PWM4OF_ADDR 0x0DC7
211 #define PWM4OFL_ADDR 0x0DC7
212 #define PWM4OFH_ADDR 0x0DC8
213 #define PWM4TMR_ADDR 0x0DC9
214 #define PWM4TMRL_ADDR 0x0DC9
215 #define PWM4TMRH_ADDR 0x0DCA
216 #define PWM4CON_ADDR 0x0DCB
217 #define PWM4INTCON_ADDR 0x0DCC
218 #define PWM4INTE_ADDR 0x0DCC
219 #define PWM4INTF_ADDR 0x0DCD
220 #define PWM4INTFLG_ADDR 0x0DCD
221 #define PWM4CLKCON_ADDR 0x0DCE
222 #define PWM4LDCON_ADDR 0x0DCF
223 #define PWM4OFCON_ADDR 0x0DD0
224 #define PPSLOCK_ADDR 0x0E0F
225 #define INTPPS_ADDR 0x0E10
226 #define T0CKIPPS_ADDR 0x0E11
227 #define T1CKIPPS_ADDR 0x0E12
228 #define T1GPPS_ADDR 0x0E13
229 #define CWG1INPPS_ADDR 0x0E14
230 #define RXPPS_ADDR 0x0E15
231 #define CKPPS_ADDR 0x0E16
232 #define ADCACTPPS_ADDR 0x0E17
233 #define RA0PPS_ADDR 0x0E90
234 #define RA1PPS_ADDR 0x0E91
235 #define RA2PPS_ADDR 0x0E92
236 #define RA4PPS_ADDR 0x0E94
237 #define RA5PPS_ADDR 0x0E95
238 #define RC0PPS_ADDR 0x0EA0
239 #define RC1PPS_ADDR 0x0EA1
240 #define RC2PPS_ADDR 0x0EA2
241 #define RC3PPS_ADDR 0x0EA3
242 #define RC4PPS_ADDR 0x0EA4
243 #define RC5PPS_ADDR 0x0EA5
244 #define STATUS_SHAD_ADDR 0x0FE4
245 #define WREG_SHAD_ADDR 0x0FE5
246 #define BSR_SHAD_ADDR 0x0FE6
247 #define PCLATH_SHAD_ADDR 0x0FE7
248 #define FSR0L_SHAD_ADDR 0x0FE8
249 #define FSR0_SHAD_ADDR 0x0FE8
250 #define FSR0H_SHAD_ADDR 0x0FE9
251 #define FSR1L_SHAD_ADDR 0x0FEA
252 #define FSR1_SHAD_ADDR 0x0FEA
253 #define FSR1H_SHAD_ADDR 0x0FEB
254 #define STKPTR_ADDR 0x0FED
255 #define TOS_ADDR 0x0FEE
256 #define TOSL_ADDR 0x0FEE
257 #define TOSH_ADDR 0x0FEF
258
259 #endif // #ifndef NO_ADDR_DEFINES
260
261 //==============================================================================
262 //
263 // Register Definitions
264 //
265 //==============================================================================
266
267 extern __at(0x0000) __sfr INDF0;
268 extern __at(0x0001) __sfr INDF1;
269 extern __at(0x0002) __sfr PCL;
270
271 //==============================================================================
272 // STATUS Bits
273
274 extern __at(0x0003) __sfr STATUS;
275
276 typedef struct
277 {
278 unsigned C : 1;
279 unsigned DC : 1;
280 unsigned Z : 1;
281 unsigned NOT_PD : 1;
282 unsigned NOT_TO : 1;
283 unsigned : 1;
284 unsigned : 1;
285 unsigned : 1;
286 } __STATUSbits_t;
287
288 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
289
290 #define _C 0x01
291 #define _DC 0x02
292 #define _Z 0x04
293 #define _NOT_PD 0x08
294 #define _NOT_TO 0x10
295
296 //==============================================================================
297
298 extern __at(0x0004) __sfr FSR0;
299 extern __at(0x0004) __sfr FSR0L;
300 extern __at(0x0005) __sfr FSR0H;
301 extern __at(0x0006) __sfr FSR1;
302 extern __at(0x0006) __sfr FSR1L;
303 extern __at(0x0007) __sfr FSR1H;
304
305 //==============================================================================
306 // BSR Bits
307
308 extern __at(0x0008) __sfr BSR;
309
310 typedef union
311 {
312 struct
313 {
314 unsigned BSR0 : 1;
315 unsigned BSR1 : 1;
316 unsigned BSR2 : 1;
317 unsigned BSR3 : 1;
318 unsigned BSR4 : 1;
319 unsigned : 1;
320 unsigned : 1;
321 unsigned : 1;
322 };
323
324 struct
325 {
326 unsigned BSR : 5;
327 unsigned : 3;
328 };
329 } __BSRbits_t;
330
331 extern __at(0x0008) volatile __BSRbits_t BSRbits;
332
333 #define _BSR0 0x01
334 #define _BSR1 0x02
335 #define _BSR2 0x04
336 #define _BSR3 0x08
337 #define _BSR4 0x10
338
339 //==============================================================================
340
341 extern __at(0x0009) __sfr WREG;
342 extern __at(0x000A) __sfr PCLATH;
343
344 //==============================================================================
345 // INTCON Bits
346
347 extern __at(0x000B) __sfr INTCON;
348
349 typedef union
350 {
351 struct
352 {
353 unsigned IOCIF : 1;
354 unsigned INTF : 1;
355 unsigned TMR0IF : 1;
356 unsigned IOCIE : 1;
357 unsigned INTE : 1;
358 unsigned TMR0IE : 1;
359 unsigned PEIE : 1;
360 unsigned GIE : 1;
361 };
362
363 struct
364 {
365 unsigned : 1;
366 unsigned : 1;
367 unsigned T0IF : 1;
368 unsigned : 1;
369 unsigned : 1;
370 unsigned T0IE : 1;
371 unsigned : 1;
372 unsigned : 1;
373 };
374 } __INTCONbits_t;
375
376 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
377
378 #define _IOCIF 0x01
379 #define _INTF 0x02
380 #define _TMR0IF 0x04
381 #define _T0IF 0x04
382 #define _IOCIE 0x08
383 #define _INTE 0x10
384 #define _TMR0IE 0x20
385 #define _T0IE 0x20
386 #define _PEIE 0x40
387 #define _GIE 0x80
388
389 //==============================================================================
390
391
392 //==============================================================================
393 // PORTA Bits
394
395 extern __at(0x000C) __sfr PORTA;
396
397 typedef union
398 {
399 struct
400 {
401 unsigned RA0 : 1;
402 unsigned RA1 : 1;
403 unsigned RA2 : 1;
404 unsigned RA3 : 1;
405 unsigned RA4 : 1;
406 unsigned RA5 : 1;
407 unsigned : 1;
408 unsigned : 1;
409 };
410
411 struct
412 {
413 unsigned RA : 6;
414 unsigned : 2;
415 };
416 } __PORTAbits_t;
417
418 extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
419
420 #define _RA0 0x01
421 #define _RA1 0x02
422 #define _RA2 0x04
423 #define _RA3 0x08
424 #define _RA4 0x10
425 #define _RA5 0x20
426
427 //==============================================================================
428
429
430 //==============================================================================
431 // PORTC Bits
432
433 extern __at(0x000E) __sfr PORTC;
434
435 typedef union
436 {
437 struct
438 {
439 unsigned RC0 : 1;
440 unsigned RC1 : 1;
441 unsigned RC2 : 1;
442 unsigned RC3 : 1;
443 unsigned RC4 : 1;
444 unsigned RC5 : 1;
445 unsigned : 1;
446 unsigned : 1;
447 };
448
449 struct
450 {
451 unsigned RC : 6;
452 unsigned : 2;
453 };
454 } __PORTCbits_t;
455
456 extern __at(0x000E) volatile __PORTCbits_t PORTCbits;
457
458 #define _RC0 0x01
459 #define _RC1 0x02
460 #define _RC2 0x04
461 #define _RC3 0x08
462 #define _RC4 0x10
463 #define _RC5 0x20
464
465 //==============================================================================
466
467
468 //==============================================================================
469 // PIR1 Bits
470
471 extern __at(0x0011) __sfr PIR1;
472
473 typedef struct
474 {
475 unsigned TMR1IF : 1;
476 unsigned TMR2IF : 1;
477 unsigned : 1;
478 unsigned : 1;
479 unsigned TXIF : 1;
480 unsigned RCIF : 1;
481 unsigned ADIF : 1;
482 unsigned TMR1GIF : 1;
483 } __PIR1bits_t;
484
485 extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
486
487 #define _TMR1IF 0x01
488 #define _TMR2IF 0x02
489 #define _TXIF 0x10
490 #define _RCIF 0x20
491 #define _ADIF 0x40
492 #define _TMR1GIF 0x80
493
494 //==============================================================================
495
496
497 //==============================================================================
498 // PIR2 Bits
499
500 extern __at(0x0012) __sfr PIR2;
501
502 typedef struct
503 {
504 unsigned : 1;
505 unsigned : 1;
506 unsigned : 1;
507 unsigned : 1;
508 unsigned : 1;
509 unsigned C1IF : 1;
510 unsigned C2IF : 1;
511 unsigned : 1;
512 } __PIR2bits_t;
513
514 extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
515
516 #define _C1IF 0x20
517 #define _C2IF 0x40
518
519 //==============================================================================
520
521
522 //==============================================================================
523 // PIR3 Bits
524
525 extern __at(0x0013) __sfr PIR3;
526
527 typedef struct
528 {
529 unsigned : 1;
530 unsigned : 1;
531 unsigned : 1;
532 unsigned : 1;
533 unsigned PWM1IF : 1;
534 unsigned PWM2IF : 1;
535 unsigned PWM3IF : 1;
536 unsigned PWM4IF : 1;
537 } __PIR3bits_t;
538
539 extern __at(0x0013) volatile __PIR3bits_t PIR3bits;
540
541 #define _PWM1IF 0x10
542 #define _PWM2IF 0x20
543 #define _PWM3IF 0x40
544 #define _PWM4IF 0x80
545
546 //==============================================================================
547
548 extern __at(0x0015) __sfr TMR0;
549 extern __at(0x0016) __sfr TMR1;
550 extern __at(0x0016) __sfr TMR1L;
551 extern __at(0x0017) __sfr TMR1H;
552
553 //==============================================================================
554 // T1CON Bits
555
556 extern __at(0x0018) __sfr T1CON;
557
558 typedef union
559 {
560 struct
561 {
562 unsigned TMR1ON : 1;
563 unsigned : 1;
564 unsigned NOT_T1SYNC : 1;
565 unsigned T1OSCEN : 1;
566 unsigned T1CKPS0 : 1;
567 unsigned T1CKPS1 : 1;
568 unsigned TMR1CS0 : 1;
569 unsigned TMR1CS1 : 1;
570 };
571
572 struct
573 {
574 unsigned : 4;
575 unsigned T1CKPS : 2;
576 unsigned : 2;
577 };
578
579 struct
580 {
581 unsigned : 6;
582 unsigned TMR1CS : 2;
583 };
584 } __T1CONbits_t;
585
586 extern __at(0x0018) volatile __T1CONbits_t T1CONbits;
587
588 #define _TMR1ON 0x01
589 #define _NOT_T1SYNC 0x04
590 #define _T1OSCEN 0x08
591 #define _T1CKPS0 0x10
592 #define _T1CKPS1 0x20
593 #define _TMR1CS0 0x40
594 #define _TMR1CS1 0x80
595
596 //==============================================================================
597
598
599 //==============================================================================
600 // T1GCON Bits
601
602 extern __at(0x0019) __sfr T1GCON;
603
604 typedef union
605 {
606 struct
607 {
608 unsigned T1GSS0 : 1;
609 unsigned T1GSS1 : 1;
610 unsigned T1GVAL : 1;
611 unsigned T1GGO_NOT_DONE : 1;
612 unsigned T1GSPM : 1;
613 unsigned T1GTM : 1;
614 unsigned T1GPOL : 1;
615 unsigned TMR1GE : 1;
616 };
617
618 struct
619 {
620 unsigned : 1;
621 unsigned : 1;
622 unsigned : 1;
623 unsigned T1GGO : 1;
624 unsigned : 1;
625 unsigned : 1;
626 unsigned : 1;
627 unsigned : 1;
628 };
629
630 struct
631 {
632 unsigned T1GSS : 2;
633 unsigned : 6;
634 };
635 } __T1GCONbits_t;
636
637 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
638
639 #define _T1GSS0 0x01
640 #define _T1GSS1 0x02
641 #define _T1GVAL 0x04
642 #define _T1GGO_NOT_DONE 0x08
643 #define _T1GGO 0x08
644 #define _T1GSPM 0x10
645 #define _T1GTM 0x20
646 #define _T1GPOL 0x40
647 #define _TMR1GE 0x80
648
649 //==============================================================================
650
651 extern __at(0x001A) __sfr TMR2;
652 extern __at(0x001B) __sfr PR2;
653
654 //==============================================================================
655 // T2CON Bits
656
657 extern __at(0x001C) __sfr T2CON;
658
659 typedef union
660 {
661 struct
662 {
663 unsigned T2CKPS0 : 1;
664 unsigned T2CKPS1 : 1;
665 unsigned TMR2ON : 1;
666 unsigned T2OUTPS0 : 1;
667 unsigned T2OUTPS1 : 1;
668 unsigned T2OUTPS2 : 1;
669 unsigned T2OUTPS3 : 1;
670 unsigned : 1;
671 };
672
673 struct
674 {
675 unsigned T2CKPS : 2;
676 unsigned : 6;
677 };
678
679 struct
680 {
681 unsigned : 3;
682 unsigned T2OUTPS : 4;
683 unsigned : 1;
684 };
685 } __T2CONbits_t;
686
687 extern __at(0x001C) volatile __T2CONbits_t T2CONbits;
688
689 #define _T2CKPS0 0x01
690 #define _T2CKPS1 0x02
691 #define _TMR2ON 0x04
692 #define _T2OUTPS0 0x08
693 #define _T2OUTPS1 0x10
694 #define _T2OUTPS2 0x20
695 #define _T2OUTPS3 0x40
696
697 //==============================================================================
698
699
700 //==============================================================================
701 // TRISA Bits
702
703 extern __at(0x008C) __sfr TRISA;
704
705 typedef union
706 {
707 struct
708 {
709 unsigned TRISA0 : 1;
710 unsigned TRISA1 : 1;
711 unsigned TRISA2 : 1;
712 unsigned TRISA3 : 1;
713 unsigned TRISA4 : 1;
714 unsigned TRISA5 : 1;
715 unsigned : 1;
716 unsigned : 1;
717 };
718
719 struct
720 {
721 unsigned TRISA : 6;
722 unsigned : 2;
723 };
724 } __TRISAbits_t;
725
726 extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
727
728 #define _TRISA0 0x01
729 #define _TRISA1 0x02
730 #define _TRISA2 0x04
731 #define _TRISA3 0x08
732 #define _TRISA4 0x10
733 #define _TRISA5 0x20
734
735 //==============================================================================
736
737
738 //==============================================================================
739 // TRISC Bits
740
741 extern __at(0x008E) __sfr TRISC;
742
743 typedef union
744 {
745 struct
746 {
747 unsigned TRISC0 : 1;
748 unsigned TRISC1 : 1;
749 unsigned TRISC2 : 1;
750 unsigned TRISC3 : 1;
751 unsigned TRISC4 : 1;
752 unsigned TRISC5 : 1;
753 unsigned : 1;
754 unsigned : 1;
755 };
756
757 struct
758 {
759 unsigned TRISC : 6;
760 unsigned : 2;
761 };
762 } __TRISCbits_t;
763
764 extern __at(0x008E) volatile __TRISCbits_t TRISCbits;
765
766 #define _TRISC0 0x01
767 #define _TRISC1 0x02
768 #define _TRISC2 0x04
769 #define _TRISC3 0x08
770 #define _TRISC4 0x10
771 #define _TRISC5 0x20
772
773 //==============================================================================
774
775
776 //==============================================================================
777 // PIE1 Bits
778
779 extern __at(0x0091) __sfr PIE1;
780
781 typedef struct
782 {
783 unsigned TMR1IE : 1;
784 unsigned TMR2IE : 1;
785 unsigned : 1;
786 unsigned : 1;
787 unsigned TXIE : 1;
788 unsigned RCIE : 1;
789 unsigned ADIE : 1;
790 unsigned TMR1GIE : 1;
791 } __PIE1bits_t;
792
793 extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
794
795 #define _TMR1IE 0x01
796 #define _TMR2IE 0x02
797 #define _TXIE 0x10
798 #define _RCIE 0x20
799 #define _ADIE 0x40
800 #define _TMR1GIE 0x80
801
802 //==============================================================================
803
804
805 //==============================================================================
806 // PIE2 Bits
807
808 extern __at(0x0092) __sfr PIE2;
809
810 typedef struct
811 {
812 unsigned : 1;
813 unsigned : 1;
814 unsigned : 1;
815 unsigned : 1;
816 unsigned : 1;
817 unsigned C1IE : 1;
818 unsigned C2IE : 1;
819 unsigned : 1;
820 } __PIE2bits_t;
821
822 extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
823
824 #define _C1IE 0x20
825 #define _C2IE 0x40
826
827 //==============================================================================
828
829
830 //==============================================================================
831 // PIE3 Bits
832
833 extern __at(0x0093) __sfr PIE3;
834
835 typedef struct
836 {
837 unsigned : 1;
838 unsigned : 1;
839 unsigned : 1;
840 unsigned : 1;
841 unsigned PWM1IE : 1;
842 unsigned PWM2IE : 1;
843 unsigned PWM3IE : 1;
844 unsigned PWM4IE : 1;
845 } __PIE3bits_t;
846
847 extern __at(0x0093) volatile __PIE3bits_t PIE3bits;
848
849 #define _PWM1IE 0x10
850 #define _PWM2IE 0x20
851 #define _PWM3IE 0x40
852 #define _PWM4IE 0x80
853
854 //==============================================================================
855
856
857 //==============================================================================
858 // OPTION_REG Bits
859
860 extern __at(0x0095) __sfr OPTION_REG;
861
862 typedef union
863 {
864 struct
865 {
866 unsigned PS0 : 1;
867 unsigned PS1 : 1;
868 unsigned PS2 : 1;
869 unsigned PSA : 1;
870 unsigned TMR0SE : 1;
871 unsigned TMR0CS : 1;
872 unsigned INTEDG : 1;
873 unsigned NOT_WPUEN : 1;
874 };
875
876 struct
877 {
878 unsigned : 1;
879 unsigned : 1;
880 unsigned : 1;
881 unsigned : 1;
882 unsigned T0SE : 1;
883 unsigned T0CS : 1;
884 unsigned : 1;
885 unsigned : 1;
886 };
887
888 struct
889 {
890 unsigned PS : 3;
891 unsigned : 5;
892 };
893 } __OPTION_REGbits_t;
894
895 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
896
897 #define _PS0 0x01
898 #define _PS1 0x02
899 #define _PS2 0x04
900 #define _PSA 0x08
901 #define _TMR0SE 0x10
902 #define _T0SE 0x10
903 #define _TMR0CS 0x20
904 #define _T0CS 0x20
905 #define _INTEDG 0x40
906 #define _NOT_WPUEN 0x80
907
908 //==============================================================================
909
910
911 //==============================================================================
912 // PCON Bits
913
914 extern __at(0x0096) __sfr PCON;
915
916 typedef struct
917 {
918 unsigned NOT_BOR : 1;
919 unsigned NOT_POR : 1;
920 unsigned NOT_RI : 1;
921 unsigned NOT_RMCLR : 1;
922 unsigned NOT_RWDT : 1;
923 unsigned : 1;
924 unsigned STKUNF : 1;
925 unsigned STKOVF : 1;
926 } __PCONbits_t;
927
928 extern __at(0x0096) volatile __PCONbits_t PCONbits;
929
930 #define _NOT_BOR 0x01
931 #define _NOT_POR 0x02
932 #define _NOT_RI 0x04
933 #define _NOT_RMCLR 0x08
934 #define _NOT_RWDT 0x10
935 #define _STKUNF 0x40
936 #define _STKOVF 0x80
937
938 //==============================================================================
939
940
941 //==============================================================================
942 // WDTCON Bits
943
944 extern __at(0x0097) __sfr WDTCON;
945
946 typedef union
947 {
948 struct
949 {
950 unsigned SWDTEN : 1;
951 unsigned WDTPS0 : 1;
952 unsigned WDTPS1 : 1;
953 unsigned WDTPS2 : 1;
954 unsigned WDTPS3 : 1;
955 unsigned WDTPS4 : 1;
956 unsigned : 1;
957 unsigned : 1;
958 };
959
960 struct
961 {
962 unsigned : 1;
963 unsigned WDTPS : 5;
964 unsigned : 2;
965 };
966 } __WDTCONbits_t;
967
968 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
969
970 #define _SWDTEN 0x01
971 #define _WDTPS0 0x02
972 #define _WDTPS1 0x04
973 #define _WDTPS2 0x08
974 #define _WDTPS3 0x10
975 #define _WDTPS4 0x20
976
977 //==============================================================================
978
979
980 //==============================================================================
981 // OSCTUNE Bits
982
983 extern __at(0x0098) __sfr OSCTUNE;
984
985 typedef union
986 {
987 struct
988 {
989 unsigned TUN0 : 1;
990 unsigned TUN1 : 1;
991 unsigned TUN2 : 1;
992 unsigned TUN3 : 1;
993 unsigned TUN4 : 1;
994 unsigned TUN5 : 1;
995 unsigned : 1;
996 unsigned : 1;
997 };
998
999 struct
1000 {
1001 unsigned TUN : 6;
1002 unsigned : 2;
1003 };
1004 } __OSCTUNEbits_t;
1005
1006 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
1007
1008 #define _TUN0 0x01
1009 #define _TUN1 0x02
1010 #define _TUN2 0x04
1011 #define _TUN3 0x08
1012 #define _TUN4 0x10
1013 #define _TUN5 0x20
1014
1015 //==============================================================================
1016
1017
1018 //==============================================================================
1019 // OSCCON Bits
1020
1021 extern __at(0x0099) __sfr OSCCON;
1022
1023 typedef union
1024 {
1025 struct
1026 {
1027 unsigned SCS0 : 1;
1028 unsigned SCS1 : 1;
1029 unsigned : 1;
1030 unsigned IRCF0 : 1;
1031 unsigned IRCF1 : 1;
1032 unsigned IRCF2 : 1;
1033 unsigned IRCF3 : 1;
1034 unsigned SPLLEN : 1;
1035 };
1036
1037 struct
1038 {
1039 unsigned SCS : 2;
1040 unsigned : 6;
1041 };
1042
1043 struct
1044 {
1045 unsigned : 3;
1046 unsigned IRCF : 4;
1047 unsigned : 1;
1048 };
1049 } __OSCCONbits_t;
1050
1051 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
1052
1053 #define _SCS0 0x01
1054 #define _SCS1 0x02
1055 #define _IRCF0 0x08
1056 #define _IRCF1 0x10
1057 #define _IRCF2 0x20
1058 #define _IRCF3 0x40
1059 #define _SPLLEN 0x80
1060
1061 //==============================================================================
1062
1063
1064 //==============================================================================
1065 // OSCSTAT Bits
1066
1067 extern __at(0x009A) __sfr OSCSTAT;
1068
1069 typedef struct
1070 {
1071 unsigned HFIOFS : 1;
1072 unsigned LFIOFR : 1;
1073 unsigned MFIOFR : 1;
1074 unsigned HFIOFL : 1;
1075 unsigned HFIOFR : 1;
1076 unsigned OSTS : 1;
1077 unsigned PLLR : 1;
1078 unsigned : 1;
1079 } __OSCSTATbits_t;
1080
1081 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
1082
1083 #define _HFIOFS 0x01
1084 #define _LFIOFR 0x02
1085 #define _MFIOFR 0x04
1086 #define _HFIOFL 0x08
1087 #define _HFIOFR 0x10
1088 #define _OSTS 0x20
1089 #define _PLLR 0x40
1090
1091 //==============================================================================
1092
1093 extern __at(0x009B) __sfr ADRES;
1094 extern __at(0x009B) __sfr ADRESL;
1095 extern __at(0x009C) __sfr ADRESH;
1096
1097 //==============================================================================
1098 // ADCON0 Bits
1099
1100 extern __at(0x009D) __sfr ADCON0;
1101
1102 typedef union
1103 {
1104 struct
1105 {
1106 unsigned ADON : 1;
1107 unsigned GO_NOT_DONE : 1;
1108 unsigned CHS0 : 1;
1109 unsigned CHS1 : 1;
1110 unsigned CHS2 : 1;
1111 unsigned CHS3 : 1;
1112 unsigned CHS4 : 1;
1113 unsigned : 1;
1114 };
1115
1116 struct
1117 {
1118 unsigned : 1;
1119 unsigned ADGO : 1;
1120 unsigned : 1;
1121 unsigned : 1;
1122 unsigned : 1;
1123 unsigned : 1;
1124 unsigned : 1;
1125 unsigned : 1;
1126 };
1127
1128 struct
1129 {
1130 unsigned : 1;
1131 unsigned GO : 1;
1132 unsigned : 1;
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1138 };
1139
1140 struct
1141 {
1142 unsigned : 1;
1143 unsigned NOT_DONE : 1;
1144 unsigned : 1;
1145 unsigned : 1;
1146 unsigned : 1;
1147 unsigned : 1;
1148 unsigned : 1;
1149 unsigned : 1;
1150 };
1151
1152 struct
1153 {
1154 unsigned : 2;
1155 unsigned CHS : 5;
1156 unsigned : 1;
1157 };
1158 } __ADCON0bits_t;
1159
1160 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
1161
1162 #define _ADON 0x01
1163 #define _GO_NOT_DONE 0x02
1164 #define _ADGO 0x02
1165 #define _GO 0x02
1166 #define _NOT_DONE 0x02
1167 #define _CHS0 0x04
1168 #define _CHS1 0x08
1169 #define _CHS2 0x10
1170 #define _CHS3 0x20
1171 #define _CHS4 0x40
1172
1173 //==============================================================================
1174
1175
1176 //==============================================================================
1177 // ADCON1 Bits
1178
1179 extern __at(0x009E) __sfr ADCON1;
1180
1181 typedef union
1182 {
1183 struct
1184 {
1185 unsigned ADPREF0 : 1;
1186 unsigned ADPREF1 : 1;
1187 unsigned : 1;
1188 unsigned : 1;
1189 unsigned ADCS0 : 1;
1190 unsigned ADCS1 : 1;
1191 unsigned ADCS2 : 1;
1192 unsigned ADFM : 1;
1193 };
1194
1195 struct
1196 {
1197 unsigned ADPREF : 2;
1198 unsigned : 6;
1199 };
1200
1201 struct
1202 {
1203 unsigned : 4;
1204 unsigned ADCS : 3;
1205 unsigned : 1;
1206 };
1207 } __ADCON1bits_t;
1208
1209 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
1210
1211 #define _ADPREF0 0x01
1212 #define _ADPREF1 0x02
1213 #define _ADCS0 0x10
1214 #define _ADCS1 0x20
1215 #define _ADCS2 0x40
1216 #define _ADFM 0x80
1217
1218 //==============================================================================
1219
1220
1221 //==============================================================================
1222 // ADCON2 Bits
1223
1224 extern __at(0x009F) __sfr ADCON2;
1225
1226 typedef union
1227 {
1228 struct
1229 {
1230 unsigned : 1;
1231 unsigned : 1;
1232 unsigned : 1;
1233 unsigned : 1;
1234 unsigned TRIGSEL0 : 1;
1235 unsigned TRIGSEL1 : 1;
1236 unsigned TRIGSEL2 : 1;
1237 unsigned TRIGSEL3 : 1;
1238 };
1239
1240 struct
1241 {
1242 unsigned : 4;
1243 unsigned TRIGSEL : 4;
1244 };
1245 } __ADCON2bits_t;
1246
1247 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
1248
1249 #define _TRIGSEL0 0x10
1250 #define _TRIGSEL1 0x20
1251 #define _TRIGSEL2 0x40
1252 #define _TRIGSEL3 0x80
1253
1254 //==============================================================================
1255
1256
1257 //==============================================================================
1258 // LATA Bits
1259
1260 extern __at(0x010C) __sfr LATA;
1261
1262 typedef struct
1263 {
1264 unsigned LATA0 : 1;
1265 unsigned LATA1 : 1;
1266 unsigned LATA2 : 1;
1267 unsigned : 1;
1268 unsigned LATA4 : 1;
1269 unsigned LATA5 : 1;
1270 unsigned : 1;
1271 unsigned : 1;
1272 } __LATAbits_t;
1273
1274 extern __at(0x010C) volatile __LATAbits_t LATAbits;
1275
1276 #define _LATA0 0x01
1277 #define _LATA1 0x02
1278 #define _LATA2 0x04
1279 #define _LATA4 0x10
1280 #define _LATA5 0x20
1281
1282 //==============================================================================
1283
1284
1285 //==============================================================================
1286 // LATC Bits
1287
1288 extern __at(0x010E) __sfr LATC;
1289
1290 typedef union
1291 {
1292 struct
1293 {
1294 unsigned LATC0 : 1;
1295 unsigned LATC1 : 1;
1296 unsigned LATC2 : 1;
1297 unsigned LATC3 : 1;
1298 unsigned LATC4 : 1;
1299 unsigned LATC5 : 1;
1300 unsigned : 1;
1301 unsigned : 1;
1302 };
1303
1304 struct
1305 {
1306 unsigned LATC : 6;
1307 unsigned : 2;
1308 };
1309 } __LATCbits_t;
1310
1311 extern __at(0x010E) volatile __LATCbits_t LATCbits;
1312
1313 #define _LATC0 0x01
1314 #define _LATC1 0x02
1315 #define _LATC2 0x04
1316 #define _LATC3 0x08
1317 #define _LATC4 0x10
1318 #define _LATC5 0x20
1319
1320 //==============================================================================
1321
1322
1323 //==============================================================================
1324 // CM1CON0 Bits
1325
1326 extern __at(0x0111) __sfr CM1CON0;
1327
1328 typedef struct
1329 {
1330 unsigned C1SYNC : 1;
1331 unsigned C1HYS : 1;
1332 unsigned C1SP : 1;
1333 unsigned : 1;
1334 unsigned C1POL : 1;
1335 unsigned C1OE : 1;
1336 unsigned C1OUT : 1;
1337 unsigned C1ON : 1;
1338 } __CM1CON0bits_t;
1339
1340 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
1341
1342 #define _C1SYNC 0x01
1343 #define _C1HYS 0x02
1344 #define _C1SP 0x04
1345 #define _C1POL 0x10
1346 #define _C1OE 0x20
1347 #define _C1OUT 0x40
1348 #define _C1ON 0x80
1349
1350 //==============================================================================
1351
1352
1353 //==============================================================================
1354 // CM1CON1 Bits
1355
1356 extern __at(0x0112) __sfr CM1CON1;
1357
1358 typedef union
1359 {
1360 struct
1361 {
1362 unsigned C1NCH0 : 1;
1363 unsigned C1NCH1 : 1;
1364 unsigned C1NCH2 : 1;
1365 unsigned : 1;
1366 unsigned C1PCH0 : 1;
1367 unsigned C1PCH1 : 1;
1368 unsigned C1INTN : 1;
1369 unsigned C1INTP : 1;
1370 };
1371
1372 struct
1373 {
1374 unsigned C1NCH : 3;
1375 unsigned : 5;
1376 };
1377
1378 struct
1379 {
1380 unsigned : 4;
1381 unsigned C1PCH : 2;
1382 unsigned : 2;
1383 };
1384 } __CM1CON1bits_t;
1385
1386 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
1387
1388 #define _C1NCH0 0x01
1389 #define _C1NCH1 0x02
1390 #define _C1NCH2 0x04
1391 #define _C1PCH0 0x10
1392 #define _C1PCH1 0x20
1393 #define _C1INTN 0x40
1394 #define _C1INTP 0x80
1395
1396 //==============================================================================
1397
1398
1399 //==============================================================================
1400 // CM2CON0 Bits
1401
1402 extern __at(0x0113) __sfr CM2CON0;
1403
1404 typedef struct
1405 {
1406 unsigned C2SYNC : 1;
1407 unsigned C2HYS : 1;
1408 unsigned C2SP : 1;
1409 unsigned : 1;
1410 unsigned C2POL : 1;
1411 unsigned C2OE : 1;
1412 unsigned C2OUT : 1;
1413 unsigned C2ON : 1;
1414 } __CM2CON0bits_t;
1415
1416 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
1417
1418 #define _C2SYNC 0x01
1419 #define _C2HYS 0x02
1420 #define _C2SP 0x04
1421 #define _C2POL 0x10
1422 #define _C2OE 0x20
1423 #define _C2OUT 0x40
1424 #define _C2ON 0x80
1425
1426 //==============================================================================
1427
1428
1429 //==============================================================================
1430 // CM2CON1 Bits
1431
1432 extern __at(0x0114) __sfr CM2CON1;
1433
1434 typedef union
1435 {
1436 struct
1437 {
1438 unsigned C2NCH0 : 1;
1439 unsigned C2NCH1 : 1;
1440 unsigned C2NCH2 : 1;
1441 unsigned : 1;
1442 unsigned C2PCH0 : 1;
1443 unsigned C2PCH1 : 1;
1444 unsigned C2INTN : 1;
1445 unsigned C2INTP : 1;
1446 };
1447
1448 struct
1449 {
1450 unsigned C2NCH : 3;
1451 unsigned : 5;
1452 };
1453
1454 struct
1455 {
1456 unsigned : 4;
1457 unsigned C2PCH : 2;
1458 unsigned : 2;
1459 };
1460 } __CM2CON1bits_t;
1461
1462 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
1463
1464 #define _C2NCH0 0x01
1465 #define _C2NCH1 0x02
1466 #define _C2NCH2 0x04
1467 #define _C2PCH0 0x10
1468 #define _C2PCH1 0x20
1469 #define _C2INTN 0x40
1470 #define _C2INTP 0x80
1471
1472 //==============================================================================
1473
1474
1475 //==============================================================================
1476 // CMOUT Bits
1477
1478 extern __at(0x0115) __sfr CMOUT;
1479
1480 typedef struct
1481 {
1482 unsigned MC1OUT : 1;
1483 unsigned MC2OUT : 1;
1484 unsigned : 1;
1485 unsigned : 1;
1486 unsigned : 1;
1487 unsigned : 1;
1488 unsigned : 1;
1489 unsigned : 1;
1490 } __CMOUTbits_t;
1491
1492 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
1493
1494 #define _MC1OUT 0x01
1495 #define _MC2OUT 0x02
1496
1497 //==============================================================================
1498
1499
1500 //==============================================================================
1501 // BORCON Bits
1502
1503 extern __at(0x0116) __sfr BORCON;
1504
1505 typedef struct
1506 {
1507 unsigned BORRDY : 1;
1508 unsigned : 1;
1509 unsigned : 1;
1510 unsigned : 1;
1511 unsigned : 1;
1512 unsigned : 1;
1513 unsigned BORFS : 1;
1514 unsigned SBOREN : 1;
1515 } __BORCONbits_t;
1516
1517 extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
1518
1519 #define _BORRDY 0x01
1520 #define _BORFS 0x40
1521 #define _SBOREN 0x80
1522
1523 //==============================================================================
1524
1525
1526 //==============================================================================
1527 // FVRCON Bits
1528
1529 extern __at(0x0117) __sfr FVRCON;
1530
1531 typedef union
1532 {
1533 struct
1534 {
1535 unsigned ADFVR0 : 1;
1536 unsigned ADFVR1 : 1;
1537 unsigned CDAFVR0 : 1;
1538 unsigned CDAFVR1 : 1;
1539 unsigned TSRNG : 1;
1540 unsigned TSEN : 1;
1541 unsigned FVRRDY : 1;
1542 unsigned FVREN : 1;
1543 };
1544
1545 struct
1546 {
1547 unsigned ADFVR : 2;
1548 unsigned : 6;
1549 };
1550
1551 struct
1552 {
1553 unsigned : 2;
1554 unsigned CDAFVR : 2;
1555 unsigned : 4;
1556 };
1557 } __FVRCONbits_t;
1558
1559 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
1560
1561 #define _ADFVR0 0x01
1562 #define _ADFVR1 0x02
1563 #define _CDAFVR0 0x04
1564 #define _CDAFVR1 0x08
1565 #define _TSRNG 0x10
1566 #define _TSEN 0x20
1567 #define _FVRRDY 0x40
1568 #define _FVREN 0x80
1569
1570 //==============================================================================
1571
1572
1573 //==============================================================================
1574 // DACCON0 Bits
1575
1576 extern __at(0x0118) __sfr DACCON0;
1577
1578 typedef union
1579 {
1580 struct
1581 {
1582 unsigned : 1;
1583 unsigned : 1;
1584 unsigned DACPSS0 : 1;
1585 unsigned DACPSS1 : 1;
1586 unsigned : 1;
1587 unsigned DACOE : 1;
1588 unsigned DACLPS : 1;
1589 unsigned DACEN : 1;
1590 };
1591
1592 struct
1593 {
1594 unsigned : 2;
1595 unsigned DACPSS : 2;
1596 unsigned : 4;
1597 };
1598 } __DACCON0bits_t;
1599
1600 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
1601
1602 #define _DACPSS0 0x04
1603 #define _DACPSS1 0x08
1604 #define _DACOE 0x20
1605 #define _DACLPS 0x40
1606 #define _DACEN 0x80
1607
1608 //==============================================================================
1609
1610
1611 //==============================================================================
1612 // DACCON1 Bits
1613
1614 extern __at(0x0119) __sfr DACCON1;
1615
1616 typedef union
1617 {
1618 struct
1619 {
1620 unsigned DACR0 : 1;
1621 unsigned DACR1 : 1;
1622 unsigned DACR2 : 1;
1623 unsigned DACR3 : 1;
1624 unsigned DACR4 : 1;
1625 unsigned : 1;
1626 unsigned : 1;
1627 unsigned : 1;
1628 };
1629
1630 struct
1631 {
1632 unsigned DACR : 5;
1633 unsigned : 3;
1634 };
1635 } __DACCON1bits_t;
1636
1637 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
1638
1639 #define _DACR0 0x01
1640 #define _DACR1 0x02
1641 #define _DACR2 0x04
1642 #define _DACR3 0x08
1643 #define _DACR4 0x10
1644
1645 //==============================================================================
1646
1647
1648 //==============================================================================
1649 // ANSELA Bits
1650
1651 extern __at(0x018C) __sfr ANSELA;
1652
1653 typedef struct
1654 {
1655 unsigned ANSA0 : 1;
1656 unsigned ANSA1 : 1;
1657 unsigned ANSA2 : 1;
1658 unsigned : 1;
1659 unsigned ANSA4 : 1;
1660 unsigned : 1;
1661 unsigned : 1;
1662 unsigned : 1;
1663 } __ANSELAbits_t;
1664
1665 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
1666
1667 #define _ANSA0 0x01
1668 #define _ANSA1 0x02
1669 #define _ANSA2 0x04
1670 #define _ANSA4 0x10
1671
1672 //==============================================================================
1673
1674
1675 //==============================================================================
1676 // ANSELC Bits
1677
1678 extern __at(0x018E) __sfr ANSELC;
1679
1680 typedef union
1681 {
1682 struct
1683 {
1684 unsigned ANSC0 : 1;
1685 unsigned ANSC1 : 1;
1686 unsigned ANSC2 : 1;
1687 unsigned ANSC3 : 1;
1688 unsigned : 1;
1689 unsigned : 1;
1690 unsigned : 1;
1691 unsigned : 1;
1692 };
1693
1694 struct
1695 {
1696 unsigned ANSC : 4;
1697 unsigned : 4;
1698 };
1699 } __ANSELCbits_t;
1700
1701 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
1702
1703 #define _ANSC0 0x01
1704 #define _ANSC1 0x02
1705 #define _ANSC2 0x04
1706 #define _ANSC3 0x08
1707
1708 //==============================================================================
1709
1710 extern __at(0x0191) __sfr PMADR;
1711 extern __at(0x0191) __sfr PMADRL;
1712 extern __at(0x0192) __sfr PMADRH;
1713 extern __at(0x0193) __sfr PMDAT;
1714 extern __at(0x0193) __sfr PMDATL;
1715 extern __at(0x0194) __sfr PMDATH;
1716
1717 //==============================================================================
1718 // PMCON1 Bits
1719
1720 extern __at(0x0195) __sfr PMCON1;
1721
1722 typedef struct
1723 {
1724 unsigned RD : 1;
1725 unsigned WR : 1;
1726 unsigned WREN : 1;
1727 unsigned WRERR : 1;
1728 unsigned FREE : 1;
1729 unsigned LWLO : 1;
1730 unsigned CFGS : 1;
1731 unsigned : 1;
1732 } __PMCON1bits_t;
1733
1734 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
1735
1736 #define _RD 0x01
1737 #define _WR 0x02
1738 #define _WREN 0x04
1739 #define _WRERR 0x08
1740 #define _FREE 0x10
1741 #define _LWLO 0x20
1742 #define _CFGS 0x40
1743
1744 //==============================================================================
1745
1746 extern __at(0x0196) __sfr PMCON2;
1747 extern __at(0x0199) __sfr RCREG;
1748 extern __at(0x019A) __sfr TXREG;
1749 extern __at(0x019B) __sfr SPBRG;
1750 extern __at(0x019B) __sfr SPBRGL;
1751 extern __at(0x019C) __sfr SPBRGH;
1752
1753 //==============================================================================
1754 // RCSTA Bits
1755
1756 extern __at(0x019D) __sfr RCSTA;
1757
1758 typedef struct
1759 {
1760 unsigned RX9D : 1;
1761 unsigned OERR : 1;
1762 unsigned FERR : 1;
1763 unsigned ADDEN : 1;
1764 unsigned CREN : 1;
1765 unsigned SREN : 1;
1766 unsigned RX9 : 1;
1767 unsigned SPEN : 1;
1768 } __RCSTAbits_t;
1769
1770 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
1771
1772 #define _RX9D 0x01
1773 #define _OERR 0x02
1774 #define _FERR 0x04
1775 #define _ADDEN 0x08
1776 #define _CREN 0x10
1777 #define _SREN 0x20
1778 #define _RX9 0x40
1779 #define _SPEN 0x80
1780
1781 //==============================================================================
1782
1783
1784 //==============================================================================
1785 // TXSTA Bits
1786
1787 extern __at(0x019E) __sfr TXSTA;
1788
1789 typedef struct
1790 {
1791 unsigned TX9D : 1;
1792 unsigned TRMT : 1;
1793 unsigned BRGH : 1;
1794 unsigned SENDB : 1;
1795 unsigned SYNC : 1;
1796 unsigned TXEN : 1;
1797 unsigned TX9 : 1;
1798 unsigned CSRC : 1;
1799 } __TXSTAbits_t;
1800
1801 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
1802
1803 #define _TX9D 0x01
1804 #define _TRMT 0x02
1805 #define _BRGH 0x04
1806 #define _SENDB 0x08
1807 #define _SYNC 0x10
1808 #define _TXEN 0x20
1809 #define _TX9 0x40
1810 #define _CSRC 0x80
1811
1812 //==============================================================================
1813
1814
1815 //==============================================================================
1816 // BAUDCON Bits
1817
1818 extern __at(0x019F) __sfr BAUDCON;
1819
1820 typedef struct
1821 {
1822 unsigned ABDEN : 1;
1823 unsigned WUE : 1;
1824 unsigned : 1;
1825 unsigned BRG16 : 1;
1826 unsigned SCKP : 1;
1827 unsigned : 1;
1828 unsigned RCIDL : 1;
1829 unsigned ABDOVF : 1;
1830 } __BAUDCONbits_t;
1831
1832 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
1833
1834 #define _ABDEN 0x01
1835 #define _WUE 0x02
1836 #define _BRG16 0x08
1837 #define _SCKP 0x10
1838 #define _RCIDL 0x40
1839 #define _ABDOVF 0x80
1840
1841 //==============================================================================
1842
1843
1844 //==============================================================================
1845 // WPUA Bits
1846
1847 extern __at(0x020C) __sfr WPUA;
1848
1849 typedef union
1850 {
1851 struct
1852 {
1853 unsigned WPUA0 : 1;
1854 unsigned WPUA1 : 1;
1855 unsigned WPUA2 : 1;
1856 unsigned WPUA3 : 1;
1857 unsigned WPUA4 : 1;
1858 unsigned WPUA5 : 1;
1859 unsigned : 1;
1860 unsigned : 1;
1861 };
1862
1863 struct
1864 {
1865 unsigned WPUA : 6;
1866 unsigned : 2;
1867 };
1868 } __WPUAbits_t;
1869
1870 extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
1871
1872 #define _WPUA0 0x01
1873 #define _WPUA1 0x02
1874 #define _WPUA2 0x04
1875 #define _WPUA3 0x08
1876 #define _WPUA4 0x10
1877 #define _WPUA5 0x20
1878
1879 //==============================================================================
1880
1881
1882 //==============================================================================
1883 // WPUC Bits
1884
1885 extern __at(0x020E) __sfr WPUC;
1886
1887 typedef union
1888 {
1889 struct
1890 {
1891 unsigned WPUC0 : 1;
1892 unsigned WPUC1 : 1;
1893 unsigned WPUC2 : 1;
1894 unsigned WPUC3 : 1;
1895 unsigned WPUC4 : 1;
1896 unsigned WPUC5 : 1;
1897 unsigned : 1;
1898 unsigned : 1;
1899 };
1900
1901 struct
1902 {
1903 unsigned WPUC : 6;
1904 unsigned : 2;
1905 };
1906 } __WPUCbits_t;
1907
1908 extern __at(0x020E) volatile __WPUCbits_t WPUCbits;
1909
1910 #define _WPUC0 0x01
1911 #define _WPUC1 0x02
1912 #define _WPUC2 0x04
1913 #define _WPUC3 0x08
1914 #define _WPUC4 0x10
1915 #define _WPUC5 0x20
1916
1917 //==============================================================================
1918
1919
1920 //==============================================================================
1921 // ODCONA Bits
1922
1923 extern __at(0x028C) __sfr ODCONA;
1924
1925 typedef struct
1926 {
1927 unsigned ODA0 : 1;
1928 unsigned ODA1 : 1;
1929 unsigned ODA2 : 1;
1930 unsigned : 1;
1931 unsigned ODA4 : 1;
1932 unsigned ODA5 : 1;
1933 unsigned : 1;
1934 unsigned : 1;
1935 } __ODCONAbits_t;
1936
1937 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
1938
1939 #define _ODA0 0x01
1940 #define _ODA1 0x02
1941 #define _ODA2 0x04
1942 #define _ODA4 0x10
1943 #define _ODA5 0x20
1944
1945 //==============================================================================
1946
1947
1948 //==============================================================================
1949 // ODCONC Bits
1950
1951 extern __at(0x028E) __sfr ODCONC;
1952
1953 typedef union
1954 {
1955 struct
1956 {
1957 unsigned ODC0 : 1;
1958 unsigned ODC1 : 1;
1959 unsigned ODC2 : 1;
1960 unsigned ODC3 : 1;
1961 unsigned ODC4 : 1;
1962 unsigned ODC5 : 1;
1963 unsigned : 1;
1964 unsigned : 1;
1965 };
1966
1967 struct
1968 {
1969 unsigned ODC : 6;
1970 unsigned : 2;
1971 };
1972 } __ODCONCbits_t;
1973
1974 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits;
1975
1976 #define _ODC0 0x01
1977 #define _ODC1 0x02
1978 #define _ODC2 0x04
1979 #define _ODC3 0x08
1980 #define _ODC4 0x10
1981 #define _ODC5 0x20
1982
1983 //==============================================================================
1984
1985
1986 //==============================================================================
1987 // SLRCONA Bits
1988
1989 extern __at(0x030C) __sfr SLRCONA;
1990
1991 typedef struct
1992 {
1993 unsigned SLRA0 : 1;
1994 unsigned SLRA1 : 1;
1995 unsigned SLRA2 : 1;
1996 unsigned : 1;
1997 unsigned SLRA4 : 1;
1998 unsigned SLRA5 : 1;
1999 unsigned : 1;
2000 unsigned : 1;
2001 } __SLRCONAbits_t;
2002
2003 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
2004
2005 #define _SLRA0 0x01
2006 #define _SLRA1 0x02
2007 #define _SLRA2 0x04
2008 #define _SLRA4 0x10
2009 #define _SLRA5 0x20
2010
2011 //==============================================================================
2012
2013
2014 //==============================================================================
2015 // SLRCONC Bits
2016
2017 extern __at(0x030E) __sfr SLRCONC;
2018
2019 typedef union
2020 {
2021 struct
2022 {
2023 unsigned SLRC0 : 1;
2024 unsigned SLRC1 : 1;
2025 unsigned SLRC2 : 1;
2026 unsigned SLRC3 : 1;
2027 unsigned SLRC4 : 1;
2028 unsigned SLRC5 : 1;
2029 unsigned : 1;
2030 unsigned : 1;
2031 };
2032
2033 struct
2034 {
2035 unsigned SLRC : 6;
2036 unsigned : 2;
2037 };
2038 } __SLRCONCbits_t;
2039
2040 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits;
2041
2042 #define _SLRC0 0x01
2043 #define _SLRC1 0x02
2044 #define _SLRC2 0x04
2045 #define _SLRC3 0x08
2046 #define _SLRC4 0x10
2047 #define _SLRC5 0x20
2048
2049 //==============================================================================
2050
2051
2052 //==============================================================================
2053 // INLVLA Bits
2054
2055 extern __at(0x038C) __sfr INLVLA;
2056
2057 typedef union
2058 {
2059 struct
2060 {
2061 unsigned INLVLA0 : 1;
2062 unsigned INLVLA1 : 1;
2063 unsigned INLVLA2 : 1;
2064 unsigned INLVLA3 : 1;
2065 unsigned INLVLA4 : 1;
2066 unsigned INLVLA5 : 1;
2067 unsigned : 1;
2068 unsigned : 1;
2069 };
2070
2071 struct
2072 {
2073 unsigned INLVLA : 6;
2074 unsigned : 2;
2075 };
2076 } __INLVLAbits_t;
2077
2078 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
2079
2080 #define _INLVLA0 0x01
2081 #define _INLVLA1 0x02
2082 #define _INLVLA2 0x04
2083 #define _INLVLA3 0x08
2084 #define _INLVLA4 0x10
2085 #define _INLVLA5 0x20
2086
2087 //==============================================================================
2088
2089
2090 //==============================================================================
2091 // INLVLC Bits
2092
2093 extern __at(0x038E) __sfr INLVLC;
2094
2095 typedef union
2096 {
2097 struct
2098 {
2099 unsigned INLVLC0 : 1;
2100 unsigned INLVLC1 : 1;
2101 unsigned INLVLC2 : 1;
2102 unsigned INLVLC3 : 1;
2103 unsigned INLVLC4 : 1;
2104 unsigned INLVLC5 : 1;
2105 unsigned : 1;
2106 unsigned : 1;
2107 };
2108
2109 struct
2110 {
2111 unsigned INLVLC : 6;
2112 unsigned : 2;
2113 };
2114 } __INLVLCbits_t;
2115
2116 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits;
2117
2118 #define _INLVLC0 0x01
2119 #define _INLVLC1 0x02
2120 #define _INLVLC2 0x04
2121 #define _INLVLC3 0x08
2122 #define _INLVLC4 0x10
2123 #define _INLVLC5 0x20
2124
2125 //==============================================================================
2126
2127
2128 //==============================================================================
2129 // IOCAP Bits
2130
2131 extern __at(0x0391) __sfr IOCAP;
2132
2133 typedef union
2134 {
2135 struct
2136 {
2137 unsigned IOCAP0 : 1;
2138 unsigned IOCAP1 : 1;
2139 unsigned IOCAP2 : 1;
2140 unsigned IOCAP3 : 1;
2141 unsigned IOCAP4 : 1;
2142 unsigned IOCAP5 : 1;
2143 unsigned : 1;
2144 unsigned : 1;
2145 };
2146
2147 struct
2148 {
2149 unsigned IOCAP : 6;
2150 unsigned : 2;
2151 };
2152 } __IOCAPbits_t;
2153
2154 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
2155
2156 #define _IOCAP0 0x01
2157 #define _IOCAP1 0x02
2158 #define _IOCAP2 0x04
2159 #define _IOCAP3 0x08
2160 #define _IOCAP4 0x10
2161 #define _IOCAP5 0x20
2162
2163 //==============================================================================
2164
2165
2166 //==============================================================================
2167 // IOCAN Bits
2168
2169 extern __at(0x0392) __sfr IOCAN;
2170
2171 typedef union
2172 {
2173 struct
2174 {
2175 unsigned IOCAN0 : 1;
2176 unsigned IOCAN1 : 1;
2177 unsigned IOCAN2 : 1;
2178 unsigned IOCAN3 : 1;
2179 unsigned IOCAN4 : 1;
2180 unsigned IOCAN5 : 1;
2181 unsigned : 1;
2182 unsigned : 1;
2183 };
2184
2185 struct
2186 {
2187 unsigned IOCAN : 6;
2188 unsigned : 2;
2189 };
2190 } __IOCANbits_t;
2191
2192 extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
2193
2194 #define _IOCAN0 0x01
2195 #define _IOCAN1 0x02
2196 #define _IOCAN2 0x04
2197 #define _IOCAN3 0x08
2198 #define _IOCAN4 0x10
2199 #define _IOCAN5 0x20
2200
2201 //==============================================================================
2202
2203
2204 //==============================================================================
2205 // IOCAF Bits
2206
2207 extern __at(0x0393) __sfr IOCAF;
2208
2209 typedef union
2210 {
2211 struct
2212 {
2213 unsigned IOCAF0 : 1;
2214 unsigned IOCAF1 : 1;
2215 unsigned IOCAF2 : 1;
2216 unsigned IOCAF3 : 1;
2217 unsigned IOCAF4 : 1;
2218 unsigned IOCAF5 : 1;
2219 unsigned : 1;
2220 unsigned : 1;
2221 };
2222
2223 struct
2224 {
2225 unsigned IOCAF : 6;
2226 unsigned : 2;
2227 };
2228 } __IOCAFbits_t;
2229
2230 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
2231
2232 #define _IOCAF0 0x01
2233 #define _IOCAF1 0x02
2234 #define _IOCAF2 0x04
2235 #define _IOCAF3 0x08
2236 #define _IOCAF4 0x10
2237 #define _IOCAF5 0x20
2238
2239 //==============================================================================
2240
2241
2242 //==============================================================================
2243 // IOCCP Bits
2244
2245 extern __at(0x0397) __sfr IOCCP;
2246
2247 typedef union
2248 {
2249 struct
2250 {
2251 unsigned IOCCP0 : 1;
2252 unsigned IOCCP1 : 1;
2253 unsigned IOCCP2 : 1;
2254 unsigned IOCCP3 : 1;
2255 unsigned IOCCP4 : 1;
2256 unsigned IOCCP5 : 1;
2257 unsigned : 1;
2258 unsigned : 1;
2259 };
2260
2261 struct
2262 {
2263 unsigned IOCCP : 6;
2264 unsigned : 2;
2265 };
2266 } __IOCCPbits_t;
2267
2268 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits;
2269
2270 #define _IOCCP0 0x01
2271 #define _IOCCP1 0x02
2272 #define _IOCCP2 0x04
2273 #define _IOCCP3 0x08
2274 #define _IOCCP4 0x10
2275 #define _IOCCP5 0x20
2276
2277 //==============================================================================
2278
2279
2280 //==============================================================================
2281 // IOCCN Bits
2282
2283 extern __at(0x0398) __sfr IOCCN;
2284
2285 typedef union
2286 {
2287 struct
2288 {
2289 unsigned IOCCN0 : 1;
2290 unsigned IOCCN1 : 1;
2291 unsigned IOCCN2 : 1;
2292 unsigned IOCCN3 : 1;
2293 unsigned IOCCN4 : 1;
2294 unsigned IOCCN5 : 1;
2295 unsigned : 1;
2296 unsigned : 1;
2297 };
2298
2299 struct
2300 {
2301 unsigned IOCCN : 6;
2302 unsigned : 2;
2303 };
2304 } __IOCCNbits_t;
2305
2306 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits;
2307
2308 #define _IOCCN0 0x01
2309 #define _IOCCN1 0x02
2310 #define _IOCCN2 0x04
2311 #define _IOCCN3 0x08
2312 #define _IOCCN4 0x10
2313 #define _IOCCN5 0x20
2314
2315 //==============================================================================
2316
2317
2318 //==============================================================================
2319 // IOCCF Bits
2320
2321 extern __at(0x0399) __sfr IOCCF;
2322
2323 typedef union
2324 {
2325 struct
2326 {
2327 unsigned IOCCF0 : 1;
2328 unsigned IOCCF1 : 1;
2329 unsigned IOCCF2 : 1;
2330 unsigned IOCCF3 : 1;
2331 unsigned IOCCF4 : 1;
2332 unsigned IOCCF5 : 1;
2333 unsigned : 1;
2334 unsigned : 1;
2335 };
2336
2337 struct
2338 {
2339 unsigned IOCCF : 6;
2340 unsigned : 2;
2341 };
2342 } __IOCCFbits_t;
2343
2344 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits;
2345
2346 #define _IOCCF0 0x01
2347 #define _IOCCF1 0x02
2348 #define _IOCCF2 0x04
2349 #define _IOCCF3 0x08
2350 #define _IOCCF4 0x10
2351 #define _IOCCF5 0x20
2352
2353 //==============================================================================
2354
2355
2356 //==============================================================================
2357 // CWG1DBR Bits
2358
2359 extern __at(0x0691) __sfr CWG1DBR;
2360
2361 typedef union
2362 {
2363 struct
2364 {
2365 unsigned CWG1DBR0 : 1;
2366 unsigned CWG1DBR1 : 1;
2367 unsigned CWG1DBR2 : 1;
2368 unsigned CWG1DBR3 : 1;
2369 unsigned CWG1DBR4 : 1;
2370 unsigned CWG1DBR5 : 1;
2371 unsigned : 1;
2372 unsigned : 1;
2373 };
2374
2375 struct
2376 {
2377 unsigned CWG1DBR : 6;
2378 unsigned : 2;
2379 };
2380 } __CWG1DBRbits_t;
2381
2382 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
2383
2384 #define _CWG1DBR0 0x01
2385 #define _CWG1DBR1 0x02
2386 #define _CWG1DBR2 0x04
2387 #define _CWG1DBR3 0x08
2388 #define _CWG1DBR4 0x10
2389 #define _CWG1DBR5 0x20
2390
2391 //==============================================================================
2392
2393
2394 //==============================================================================
2395 // CWG1DBF Bits
2396
2397 extern __at(0x0692) __sfr CWG1DBF;
2398
2399 typedef union
2400 {
2401 struct
2402 {
2403 unsigned CWG1DBF0 : 1;
2404 unsigned CWG1DBF1 : 1;
2405 unsigned CWG1DBF2 : 1;
2406 unsigned CWG1DBF3 : 1;
2407 unsigned CWG1DBF4 : 1;
2408 unsigned CWG1DBF5 : 1;
2409 unsigned : 1;
2410 unsigned : 1;
2411 };
2412
2413 struct
2414 {
2415 unsigned CWG1DBF : 6;
2416 unsigned : 2;
2417 };
2418 } __CWG1DBFbits_t;
2419
2420 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
2421
2422 #define _CWG1DBF0 0x01
2423 #define _CWG1DBF1 0x02
2424 #define _CWG1DBF2 0x04
2425 #define _CWG1DBF3 0x08
2426 #define _CWG1DBF4 0x10
2427 #define _CWG1DBF5 0x20
2428
2429 //==============================================================================
2430
2431
2432 //==============================================================================
2433 // CWG1CON0 Bits
2434
2435 extern __at(0x0693) __sfr CWG1CON0;
2436
2437 typedef struct
2438 {
2439 unsigned G1CS0 : 1;
2440 unsigned : 1;
2441 unsigned : 1;
2442 unsigned G1POLA : 1;
2443 unsigned G1POLB : 1;
2444 unsigned G1OEA : 1;
2445 unsigned G1OEB : 1;
2446 unsigned G1EN : 1;
2447 } __CWG1CON0bits_t;
2448
2449 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
2450
2451 #define _G1CS0 0x01
2452 #define _G1POLA 0x08
2453 #define _G1POLB 0x10
2454 #define _G1OEA 0x20
2455 #define _G1OEB 0x40
2456 #define _G1EN 0x80
2457
2458 //==============================================================================
2459
2460
2461 //==============================================================================
2462 // CWG1CON1 Bits
2463
2464 extern __at(0x0694) __sfr CWG1CON1;
2465
2466 typedef union
2467 {
2468 struct
2469 {
2470 unsigned G1IS0 : 1;
2471 unsigned G1IS1 : 1;
2472 unsigned G1IS2 : 1;
2473 unsigned : 1;
2474 unsigned G1ASDLA0 : 1;
2475 unsigned G1ASDLA1 : 1;
2476 unsigned G1ASDLB0 : 1;
2477 unsigned G1ASDLB1 : 1;
2478 };
2479
2480 struct
2481 {
2482 unsigned G1IS : 3;
2483 unsigned : 5;
2484 };
2485
2486 struct
2487 {
2488 unsigned : 4;
2489 unsigned G1ASDLA : 2;
2490 unsigned : 2;
2491 };
2492
2493 struct
2494 {
2495 unsigned : 6;
2496 unsigned G1ASDLB : 2;
2497 };
2498 } __CWG1CON1bits_t;
2499
2500 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
2501
2502 #define _G1IS0 0x01
2503 #define _G1IS1 0x02
2504 #define _G1IS2 0x04
2505 #define _G1ASDLA0 0x10
2506 #define _G1ASDLA1 0x20
2507 #define _G1ASDLB0 0x40
2508 #define _G1ASDLB1 0x80
2509
2510 //==============================================================================
2511
2512
2513 //==============================================================================
2514 // CWG1CON2 Bits
2515
2516 extern __at(0x0695) __sfr CWG1CON2;
2517
2518 typedef struct
2519 {
2520 unsigned : 1;
2521 unsigned G1ASDSPPS : 1;
2522 unsigned G1ASDSC1 : 1;
2523 unsigned G1ASDSC2 : 1;
2524 unsigned : 1;
2525 unsigned : 1;
2526 unsigned G1ARSEN : 1;
2527 unsigned G1ASE : 1;
2528 } __CWG1CON2bits_t;
2529
2530 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
2531
2532 #define _G1ASDSPPS 0x02
2533 #define _G1ASDSC1 0x04
2534 #define _G1ASDSC2 0x08
2535 #define _G1ARSEN 0x40
2536 #define _G1ASE 0x80
2537
2538 //==============================================================================
2539
2540
2541 //==============================================================================
2542 // PWMEN Bits
2543
2544 extern __at(0x0D8E) __sfr PWMEN;
2545
2546 typedef union
2547 {
2548 struct
2549 {
2550 unsigned PWM1EN_A : 1;
2551 unsigned PWM2EN_A : 1;
2552 unsigned PWM3EN_A : 1;
2553 unsigned PWM4EN_A : 1;
2554 unsigned : 1;
2555 unsigned : 1;
2556 unsigned : 1;
2557 unsigned : 1;
2558 };
2559
2560 struct
2561 {
2562 unsigned MPWM1EN : 1;
2563 unsigned MPWM2EN : 1;
2564 unsigned MPWM3EN : 1;
2565 unsigned : 1;
2566 unsigned : 1;
2567 unsigned : 1;
2568 unsigned : 1;
2569 unsigned : 1;
2570 };
2571 } __PWMENbits_t;
2572
2573 extern __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
2574
2575 #define _PWM1EN_A 0x01
2576 #define _MPWM1EN 0x01
2577 #define _PWM2EN_A 0x02
2578 #define _MPWM2EN 0x02
2579 #define _PWM3EN_A 0x04
2580 #define _MPWM3EN 0x04
2581 #define _PWM4EN_A 0x08
2582
2583 //==============================================================================
2584
2585
2586 //==============================================================================
2587 // PWMLD Bits
2588
2589 extern __at(0x0D8F) __sfr PWMLD;
2590
2591 typedef union
2592 {
2593 struct
2594 {
2595 unsigned PWM1LDA_A : 1;
2596 unsigned PWM2LDA_A : 1;
2597 unsigned PWM3LDA_A : 1;
2598 unsigned PWM4LDA_A : 1;
2599 unsigned : 1;
2600 unsigned : 1;
2601 unsigned : 1;
2602 unsigned : 1;
2603 };
2604
2605 struct
2606 {
2607 unsigned MPWM1LD : 1;
2608 unsigned MPWM2LD : 1;
2609 unsigned MPWM3LD : 1;
2610 unsigned : 1;
2611 unsigned : 1;
2612 unsigned : 1;
2613 unsigned : 1;
2614 unsigned : 1;
2615 };
2616 } __PWMLDbits_t;
2617
2618 extern __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
2619
2620 #define _PWM1LDA_A 0x01
2621 #define _MPWM1LD 0x01
2622 #define _PWM2LDA_A 0x02
2623 #define _MPWM2LD 0x02
2624 #define _PWM3LDA_A 0x04
2625 #define _MPWM3LD 0x04
2626 #define _PWM4LDA_A 0x08
2627
2628 //==============================================================================
2629
2630
2631 //==============================================================================
2632 // PWMOUT Bits
2633
2634 extern __at(0x0D90) __sfr PWMOUT;
2635
2636 typedef union
2637 {
2638 struct
2639 {
2640 unsigned PWM1OUT_A : 1;
2641 unsigned PWM2OUT_A : 1;
2642 unsigned PWM3OUT_A : 1;
2643 unsigned PWM4OUT_A : 1;
2644 unsigned : 1;
2645 unsigned : 1;
2646 unsigned : 1;
2647 unsigned : 1;
2648 };
2649
2650 struct
2651 {
2652 unsigned MPWM1OUT : 1;
2653 unsigned MPWM2OUT : 1;
2654 unsigned MPWM3OUT : 1;
2655 unsigned : 1;
2656 unsigned : 1;
2657 unsigned : 1;
2658 unsigned : 1;
2659 unsigned : 1;
2660 };
2661 } __PWMOUTbits_t;
2662
2663 extern __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
2664
2665 #define _PWM1OUT_A 0x01
2666 #define _MPWM1OUT 0x01
2667 #define _PWM2OUT_A 0x02
2668 #define _MPWM2OUT 0x02
2669 #define _PWM3OUT_A 0x04
2670 #define _MPWM3OUT 0x04
2671 #define _PWM4OUT_A 0x08
2672
2673 //==============================================================================
2674
2675 extern __at(0x0D91) __sfr PWM1PH;
2676
2677 //==============================================================================
2678 // PWM1PHL Bits
2679
2680 extern __at(0x0D91) __sfr PWM1PHL;
2681
2682 typedef struct
2683 {
2684 unsigned PWM1PHL0 : 1;
2685 unsigned PWM1PHL1 : 1;
2686 unsigned PWM1PHL2 : 1;
2687 unsigned PWM1PHL3 : 1;
2688 unsigned PWM1PHL4 : 1;
2689 unsigned PWM1PHL5 : 1;
2690 unsigned PWM1PHL6 : 1;
2691 unsigned PWM1PHL7 : 1;
2692 } __PWM1PHLbits_t;
2693
2694 extern __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
2695
2696 #define _PWM1PHL0 0x01
2697 #define _PWM1PHL1 0x02
2698 #define _PWM1PHL2 0x04
2699 #define _PWM1PHL3 0x08
2700 #define _PWM1PHL4 0x10
2701 #define _PWM1PHL5 0x20
2702 #define _PWM1PHL6 0x40
2703 #define _PWM1PHL7 0x80
2704
2705 //==============================================================================
2706
2707
2708 //==============================================================================
2709 // PWM1PHH Bits
2710
2711 extern __at(0x0D92) __sfr PWM1PHH;
2712
2713 typedef struct
2714 {
2715 unsigned PWM1PHH0 : 1;
2716 unsigned PWM1PHH1 : 1;
2717 unsigned PWM1PHH2 : 1;
2718 unsigned PWM1PHH3 : 1;
2719 unsigned PWM1PHH4 : 1;
2720 unsigned PWM1PHH5 : 1;
2721 unsigned PWM1PHH6 : 1;
2722 unsigned PWM1PHH7 : 1;
2723 } __PWM1PHHbits_t;
2724
2725 extern __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
2726
2727 #define _PWM1PHH0 0x01
2728 #define _PWM1PHH1 0x02
2729 #define _PWM1PHH2 0x04
2730 #define _PWM1PHH3 0x08
2731 #define _PWM1PHH4 0x10
2732 #define _PWM1PHH5 0x20
2733 #define _PWM1PHH6 0x40
2734 #define _PWM1PHH7 0x80
2735
2736 //==============================================================================
2737
2738 extern __at(0x0D93) __sfr PWM1DC;
2739
2740 //==============================================================================
2741 // PWM1DCL Bits
2742
2743 extern __at(0x0D93) __sfr PWM1DCL;
2744
2745 typedef struct
2746 {
2747 unsigned PWM1DCL0 : 1;
2748 unsigned PWM1DCL1 : 1;
2749 unsigned PWM1DCL2 : 1;
2750 unsigned PWM1DCL3 : 1;
2751 unsigned PWM1DCL4 : 1;
2752 unsigned PWM1DCL5 : 1;
2753 unsigned PWM1DCL6 : 1;
2754 unsigned PWM1DCL7 : 1;
2755 } __PWM1DCLbits_t;
2756
2757 extern __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
2758
2759 #define _PWM1DCL0 0x01
2760 #define _PWM1DCL1 0x02
2761 #define _PWM1DCL2 0x04
2762 #define _PWM1DCL3 0x08
2763 #define _PWM1DCL4 0x10
2764 #define _PWM1DCL5 0x20
2765 #define _PWM1DCL6 0x40
2766 #define _PWM1DCL7 0x80
2767
2768 //==============================================================================
2769
2770
2771 //==============================================================================
2772 // PWM1DCH Bits
2773
2774 extern __at(0x0D94) __sfr PWM1DCH;
2775
2776 typedef struct
2777 {
2778 unsigned PWM1DCH0 : 1;
2779 unsigned PWM1DCH1 : 1;
2780 unsigned PWM1DCH2 : 1;
2781 unsigned PWM1DCH3 : 1;
2782 unsigned PWM1DCH4 : 1;
2783 unsigned PWM1DCH5 : 1;
2784 unsigned PWM1DCH6 : 1;
2785 unsigned PWM1DCH7 : 1;
2786 } __PWM1DCHbits_t;
2787
2788 extern __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
2789
2790 #define _PWM1DCH0 0x01
2791 #define _PWM1DCH1 0x02
2792 #define _PWM1DCH2 0x04
2793 #define _PWM1DCH3 0x08
2794 #define _PWM1DCH4 0x10
2795 #define _PWM1DCH5 0x20
2796 #define _PWM1DCH6 0x40
2797 #define _PWM1DCH7 0x80
2798
2799 //==============================================================================
2800
2801 extern __at(0x0D95) __sfr PWM1PR;
2802
2803 //==============================================================================
2804 // PWM1PRL Bits
2805
2806 extern __at(0x0D95) __sfr PWM1PRL;
2807
2808 typedef struct
2809 {
2810 unsigned PWM1PRL0 : 1;
2811 unsigned PWM1PRL1 : 1;
2812 unsigned PWM1PRL2 : 1;
2813 unsigned PWM1PRL3 : 1;
2814 unsigned PWM1PRL4 : 1;
2815 unsigned PWM1PRL5 : 1;
2816 unsigned PWM1PRL6 : 1;
2817 unsigned PWM1PRL7 : 1;
2818 } __PWM1PRLbits_t;
2819
2820 extern __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
2821
2822 #define _PWM1PRL0 0x01
2823 #define _PWM1PRL1 0x02
2824 #define _PWM1PRL2 0x04
2825 #define _PWM1PRL3 0x08
2826 #define _PWM1PRL4 0x10
2827 #define _PWM1PRL5 0x20
2828 #define _PWM1PRL6 0x40
2829 #define _PWM1PRL7 0x80
2830
2831 //==============================================================================
2832
2833
2834 //==============================================================================
2835 // PWM1PRH Bits
2836
2837 extern __at(0x0D96) __sfr PWM1PRH;
2838
2839 typedef struct
2840 {
2841 unsigned PWM1PRH0 : 1;
2842 unsigned PWM1PRH1 : 1;
2843 unsigned PWM1PRH2 : 1;
2844 unsigned PWM1PRH3 : 1;
2845 unsigned PWM1PRH4 : 1;
2846 unsigned PWM1PRH5 : 1;
2847 unsigned PWM1PRH6 : 1;
2848 unsigned PWM1PRH7 : 1;
2849 } __PWM1PRHbits_t;
2850
2851 extern __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
2852
2853 #define _PWM1PRH0 0x01
2854 #define _PWM1PRH1 0x02
2855 #define _PWM1PRH2 0x04
2856 #define _PWM1PRH3 0x08
2857 #define _PWM1PRH4 0x10
2858 #define _PWM1PRH5 0x20
2859 #define _PWM1PRH6 0x40
2860 #define _PWM1PRH7 0x80
2861
2862 //==============================================================================
2863
2864 extern __at(0x0D97) __sfr PWM1OF;
2865
2866 //==============================================================================
2867 // PWM1OFL Bits
2868
2869 extern __at(0x0D97) __sfr PWM1OFL;
2870
2871 typedef struct
2872 {
2873 unsigned PWM1OFL0 : 1;
2874 unsigned PWM1OFL1 : 1;
2875 unsigned PWM1OFL2 : 1;
2876 unsigned PWM1OFL3 : 1;
2877 unsigned PWM1OFL4 : 1;
2878 unsigned PWM1OFL5 : 1;
2879 unsigned PWM1OFL6 : 1;
2880 unsigned PWM1OFL7 : 1;
2881 } __PWM1OFLbits_t;
2882
2883 extern __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
2884
2885 #define _PWM1OFL0 0x01
2886 #define _PWM1OFL1 0x02
2887 #define _PWM1OFL2 0x04
2888 #define _PWM1OFL3 0x08
2889 #define _PWM1OFL4 0x10
2890 #define _PWM1OFL5 0x20
2891 #define _PWM1OFL6 0x40
2892 #define _PWM1OFL7 0x80
2893
2894 //==============================================================================
2895
2896
2897 //==============================================================================
2898 // PWM1OFH Bits
2899
2900 extern __at(0x0D98) __sfr PWM1OFH;
2901
2902 typedef struct
2903 {
2904 unsigned PWM1OFH0 : 1;
2905 unsigned PWM1OFH1 : 1;
2906 unsigned PWM1OFH2 : 1;
2907 unsigned PWM1OFH3 : 1;
2908 unsigned PWM1OFH4 : 1;
2909 unsigned PWM1OFH5 : 1;
2910 unsigned PWM1OFH6 : 1;
2911 unsigned PWM1OFH7 : 1;
2912 } __PWM1OFHbits_t;
2913
2914 extern __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
2915
2916 #define _PWM1OFH0 0x01
2917 #define _PWM1OFH1 0x02
2918 #define _PWM1OFH2 0x04
2919 #define _PWM1OFH3 0x08
2920 #define _PWM1OFH4 0x10
2921 #define _PWM1OFH5 0x20
2922 #define _PWM1OFH6 0x40
2923 #define _PWM1OFH7 0x80
2924
2925 //==============================================================================
2926
2927 extern __at(0x0D99) __sfr PWM1TMR;
2928
2929 //==============================================================================
2930 // PWM1TMRL Bits
2931
2932 extern __at(0x0D99) __sfr PWM1TMRL;
2933
2934 typedef struct
2935 {
2936 unsigned PWM1TMRL0 : 1;
2937 unsigned PWM1TMRL1 : 1;
2938 unsigned PWM1TMRL2 : 1;
2939 unsigned PWM1TMRL3 : 1;
2940 unsigned PWM1TMRL4 : 1;
2941 unsigned PWM1TMRL5 : 1;
2942 unsigned PWM1TMRL6 : 1;
2943 unsigned PWM1TMRL7 : 1;
2944 } __PWM1TMRLbits_t;
2945
2946 extern __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
2947
2948 #define _PWM1TMRL0 0x01
2949 #define _PWM1TMRL1 0x02
2950 #define _PWM1TMRL2 0x04
2951 #define _PWM1TMRL3 0x08
2952 #define _PWM1TMRL4 0x10
2953 #define _PWM1TMRL5 0x20
2954 #define _PWM1TMRL6 0x40
2955 #define _PWM1TMRL7 0x80
2956
2957 //==============================================================================
2958
2959
2960 //==============================================================================
2961 // PWM1TMRH Bits
2962
2963 extern __at(0x0D9A) __sfr PWM1TMRH;
2964
2965 typedef struct
2966 {
2967 unsigned PWM1TMRH0 : 1;
2968 unsigned PWM1TMRH1 : 1;
2969 unsigned PWM1TMRH2 : 1;
2970 unsigned PWM1TMRH3 : 1;
2971 unsigned PWM1TMRH4 : 1;
2972 unsigned PWM1TMRH5 : 1;
2973 unsigned PWM1TMRH6 : 1;
2974 unsigned PWM1TMRH7 : 1;
2975 } __PWM1TMRHbits_t;
2976
2977 extern __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
2978
2979 #define _PWM1TMRH0 0x01
2980 #define _PWM1TMRH1 0x02
2981 #define _PWM1TMRH2 0x04
2982 #define _PWM1TMRH3 0x08
2983 #define _PWM1TMRH4 0x10
2984 #define _PWM1TMRH5 0x20
2985 #define _PWM1TMRH6 0x40
2986 #define _PWM1TMRH7 0x80
2987
2988 //==============================================================================
2989
2990
2991 //==============================================================================
2992 // PWM1CON Bits
2993
2994 extern __at(0x0D9B) __sfr PWM1CON;
2995
2996 typedef union
2997 {
2998 struct
2999 {
3000 unsigned : 1;
3001 unsigned : 1;
3002 unsigned PWM1MODE0 : 1;
3003 unsigned PWM1MODE1 : 1;
3004 unsigned POL : 1;
3005 unsigned OUT : 1;
3006 unsigned OE : 1;
3007 unsigned EN : 1;
3008 };
3009
3010 struct
3011 {
3012 unsigned : 1;
3013 unsigned : 1;
3014 unsigned MODE0 : 1;
3015 unsigned MODE1 : 1;
3016 unsigned PWM1POL : 1;
3017 unsigned PWM1OUT : 1;
3018 unsigned PWM1OE : 1;
3019 unsigned PWM1EN : 1;
3020 };
3021
3022 struct
3023 {
3024 unsigned : 2;
3025 unsigned PWM1MODE : 2;
3026 unsigned : 4;
3027 };
3028
3029 struct
3030 {
3031 unsigned : 2;
3032 unsigned MODE : 2;
3033 unsigned : 4;
3034 };
3035 } __PWM1CONbits_t;
3036
3037 extern __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
3038
3039 #define _PWM1MODE0 0x04
3040 #define _MODE0 0x04
3041 #define _PWM1MODE1 0x08
3042 #define _MODE1 0x08
3043 #define _POL 0x10
3044 #define _PWM1POL 0x10
3045 #define _OUT 0x20
3046 #define _PWM1OUT 0x20
3047 #define _OE 0x40
3048 #define _PWM1OE 0x40
3049 #define _EN 0x80
3050 #define _PWM1EN 0x80
3051
3052 //==============================================================================
3053
3054
3055 //==============================================================================
3056 // PWM1INTCON Bits
3057
3058 extern __at(0x0D9C) __sfr PWM1INTCON;
3059
3060 typedef union
3061 {
3062 struct
3063 {
3064 unsigned PRIE : 1;
3065 unsigned DCIE : 1;
3066 unsigned PHIE : 1;
3067 unsigned OFIE : 1;
3068 unsigned : 1;
3069 unsigned : 1;
3070 unsigned : 1;
3071 unsigned : 1;
3072 };
3073
3074 struct
3075 {
3076 unsigned PWM1PRIE : 1;
3077 unsigned PWM1DCIE : 1;
3078 unsigned PWM1PHIE : 1;
3079 unsigned PWM1OFIE : 1;
3080 unsigned : 1;
3081 unsigned : 1;
3082 unsigned : 1;
3083 unsigned : 1;
3084 };
3085 } __PWM1INTCONbits_t;
3086
3087 extern __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
3088
3089 #define _PRIE 0x01
3090 #define _PWM1PRIE 0x01
3091 #define _DCIE 0x02
3092 #define _PWM1DCIE 0x02
3093 #define _PHIE 0x04
3094 #define _PWM1PHIE 0x04
3095 #define _OFIE 0x08
3096 #define _PWM1OFIE 0x08
3097
3098 //==============================================================================
3099
3100
3101 //==============================================================================
3102 // PWM1INTE Bits
3103
3104 extern __at(0x0D9C) __sfr PWM1INTE;
3105
3106 typedef union
3107 {
3108 struct
3109 {
3110 unsigned PRIE : 1;
3111 unsigned DCIE : 1;
3112 unsigned PHIE : 1;
3113 unsigned OFIE : 1;
3114 unsigned : 1;
3115 unsigned : 1;
3116 unsigned : 1;
3117 unsigned : 1;
3118 };
3119
3120 struct
3121 {
3122 unsigned PWM1PRIE : 1;
3123 unsigned PWM1DCIE : 1;
3124 unsigned PWM1PHIE : 1;
3125 unsigned PWM1OFIE : 1;
3126 unsigned : 1;
3127 unsigned : 1;
3128 unsigned : 1;
3129 unsigned : 1;
3130 };
3131 } __PWM1INTEbits_t;
3132
3133 extern __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
3134
3135 #define _PWM1INTE_PRIE 0x01
3136 #define _PWM1INTE_PWM1PRIE 0x01
3137 #define _PWM1INTE_DCIE 0x02
3138 #define _PWM1INTE_PWM1DCIE 0x02
3139 #define _PWM1INTE_PHIE 0x04
3140 #define _PWM1INTE_PWM1PHIE 0x04
3141 #define _PWM1INTE_OFIE 0x08
3142 #define _PWM1INTE_PWM1OFIE 0x08
3143
3144 //==============================================================================
3145
3146
3147 //==============================================================================
3148 // PWM1INTF Bits
3149
3150 extern __at(0x0D9D) __sfr PWM1INTF;
3151
3152 typedef union
3153 {
3154 struct
3155 {
3156 unsigned PRIF : 1;
3157 unsigned DCIF : 1;
3158 unsigned PHIF : 1;
3159 unsigned OFIF : 1;
3160 unsigned : 1;
3161 unsigned : 1;
3162 unsigned : 1;
3163 unsigned : 1;
3164 };
3165
3166 struct
3167 {
3168 unsigned PWM1PRIF : 1;
3169 unsigned PWM1DCIF : 1;
3170 unsigned PWM1PHIF : 1;
3171 unsigned PWM1OFIF : 1;
3172 unsigned : 1;
3173 unsigned : 1;
3174 unsigned : 1;
3175 unsigned : 1;
3176 };
3177 } __PWM1INTFbits_t;
3178
3179 extern __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
3180
3181 #define _PRIF 0x01
3182 #define _PWM1PRIF 0x01
3183 #define _DCIF 0x02
3184 #define _PWM1DCIF 0x02
3185 #define _PHIF 0x04
3186 #define _PWM1PHIF 0x04
3187 #define _OFIF 0x08
3188 #define _PWM1OFIF 0x08
3189
3190 //==============================================================================
3191
3192
3193 //==============================================================================
3194 // PWM1INTFLG Bits
3195
3196 extern __at(0x0D9D) __sfr PWM1INTFLG;
3197
3198 typedef union
3199 {
3200 struct
3201 {
3202 unsigned PRIF : 1;
3203 unsigned DCIF : 1;
3204 unsigned PHIF : 1;
3205 unsigned OFIF : 1;
3206 unsigned : 1;
3207 unsigned : 1;
3208 unsigned : 1;
3209 unsigned : 1;
3210 };
3211
3212 struct
3213 {
3214 unsigned PWM1PRIF : 1;
3215 unsigned PWM1DCIF : 1;
3216 unsigned PWM1PHIF : 1;
3217 unsigned PWM1OFIF : 1;
3218 unsigned : 1;
3219 unsigned : 1;
3220 unsigned : 1;
3221 unsigned : 1;
3222 };
3223 } __PWM1INTFLGbits_t;
3224
3225 extern __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
3226
3227 #define _PWM1INTFLG_PRIF 0x01
3228 #define _PWM1INTFLG_PWM1PRIF 0x01
3229 #define _PWM1INTFLG_DCIF 0x02
3230 #define _PWM1INTFLG_PWM1DCIF 0x02
3231 #define _PWM1INTFLG_PHIF 0x04
3232 #define _PWM1INTFLG_PWM1PHIF 0x04
3233 #define _PWM1INTFLG_OFIF 0x08
3234 #define _PWM1INTFLG_PWM1OFIF 0x08
3235
3236 //==============================================================================
3237
3238
3239 //==============================================================================
3240 // PWM1CLKCON Bits
3241
3242 extern __at(0x0D9E) __sfr PWM1CLKCON;
3243
3244 typedef union
3245 {
3246 struct
3247 {
3248 unsigned PWM1CS0 : 1;
3249 unsigned PWM1CS1 : 1;
3250 unsigned : 1;
3251 unsigned : 1;
3252 unsigned PWM1PS0 : 1;
3253 unsigned PWM1PS1 : 1;
3254 unsigned PWM1PS2 : 1;
3255 unsigned : 1;
3256 };
3257
3258 struct
3259 {
3260 unsigned CS0 : 1;
3261 unsigned CS1 : 1;
3262 unsigned : 1;
3263 unsigned : 1;
3264 unsigned PS0 : 1;
3265 unsigned PS1 : 1;
3266 unsigned PS2 : 1;
3267 unsigned : 1;
3268 };
3269
3270 struct
3271 {
3272 unsigned PWM1CS : 2;
3273 unsigned : 6;
3274 };
3275
3276 struct
3277 {
3278 unsigned CS : 2;
3279 unsigned : 6;
3280 };
3281
3282 struct
3283 {
3284 unsigned : 4;
3285 unsigned PS : 3;
3286 unsigned : 1;
3287 };
3288
3289 struct
3290 {
3291 unsigned : 4;
3292 unsigned PWM1PS : 3;
3293 unsigned : 1;
3294 };
3295 } __PWM1CLKCONbits_t;
3296
3297 extern __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
3298
3299 #define _PWM1CLKCON_PWM1CS0 0x01
3300 #define _PWM1CLKCON_CS0 0x01
3301 #define _PWM1CLKCON_PWM1CS1 0x02
3302 #define _PWM1CLKCON_CS1 0x02
3303 #define _PWM1CLKCON_PWM1PS0 0x10
3304 #define _PWM1CLKCON_PS0 0x10
3305 #define _PWM1CLKCON_PWM1PS1 0x20
3306 #define _PWM1CLKCON_PS1 0x20
3307 #define _PWM1CLKCON_PWM1PS2 0x40
3308 #define _PWM1CLKCON_PS2 0x40
3309
3310 //==============================================================================
3311
3312
3313 //==============================================================================
3314 // PWM1LDCON Bits
3315
3316 extern __at(0x0D9F) __sfr PWM1LDCON;
3317
3318 typedef union
3319 {
3320 struct
3321 {
3322 unsigned PWM1LDS0 : 1;
3323 unsigned PWM1LDS1 : 1;
3324 unsigned : 1;
3325 unsigned : 1;
3326 unsigned : 1;
3327 unsigned : 1;
3328 unsigned LDT : 1;
3329 unsigned LDA : 1;
3330 };
3331
3332 struct
3333 {
3334 unsigned LDS0 : 1;
3335 unsigned LDS1 : 1;
3336 unsigned : 1;
3337 unsigned : 1;
3338 unsigned : 1;
3339 unsigned : 1;
3340 unsigned PWM1LDM : 1;
3341 unsigned PWM1LD : 1;
3342 };
3343
3344 struct
3345 {
3346 unsigned LDS : 2;
3347 unsigned : 6;
3348 };
3349
3350 struct
3351 {
3352 unsigned PWM1LDS : 2;
3353 unsigned : 6;
3354 };
3355 } __PWM1LDCONbits_t;
3356
3357 extern __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
3358
3359 #define _PWM1LDS0 0x01
3360 #define _LDS0 0x01
3361 #define _PWM1LDS1 0x02
3362 #define _LDS1 0x02
3363 #define _LDT 0x40
3364 #define _PWM1LDM 0x40
3365 #define _LDA 0x80
3366 #define _PWM1LD 0x80
3367
3368 //==============================================================================
3369
3370
3371 //==============================================================================
3372 // PWM1OFCON Bits
3373
3374 extern __at(0x0DA0) __sfr PWM1OFCON;
3375
3376 typedef union
3377 {
3378 struct
3379 {
3380 unsigned PWM1OFS0 : 1;
3381 unsigned PWM1OFS1 : 1;
3382 unsigned : 1;
3383 unsigned : 1;
3384 unsigned OFO : 1;
3385 unsigned PWM1OFM0 : 1;
3386 unsigned PWM1OFM1 : 1;
3387 unsigned : 1;
3388 };
3389
3390 struct
3391 {
3392 unsigned OFS0 : 1;
3393 unsigned OFS1 : 1;
3394 unsigned : 1;
3395 unsigned : 1;
3396 unsigned PWM1OFMC : 1;
3397 unsigned OFM0 : 1;
3398 unsigned OFM1 : 1;
3399 unsigned : 1;
3400 };
3401
3402 struct
3403 {
3404 unsigned PWM1OFS : 2;
3405 unsigned : 6;
3406 };
3407
3408 struct
3409 {
3410 unsigned OFS : 2;
3411 unsigned : 6;
3412 };
3413
3414 struct
3415 {
3416 unsigned : 5;
3417 unsigned OFM : 2;
3418 unsigned : 1;
3419 };
3420
3421 struct
3422 {
3423 unsigned : 5;
3424 unsigned PWM1OFM : 2;
3425 unsigned : 1;
3426 };
3427 } __PWM1OFCONbits_t;
3428
3429 extern __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
3430
3431 #define _PWM1OFS0 0x01
3432 #define _OFS0 0x01
3433 #define _PWM1OFS1 0x02
3434 #define _OFS1 0x02
3435 #define _OFO 0x10
3436 #define _PWM1OFMC 0x10
3437 #define _PWM1OFM0 0x20
3438 #define _OFM0 0x20
3439 #define _PWM1OFM1 0x40
3440 #define _OFM1 0x40
3441
3442 //==============================================================================
3443
3444 extern __at(0x0DA1) __sfr PWM2PH;
3445
3446 //==============================================================================
3447 // PWM2PHL Bits
3448
3449 extern __at(0x0DA1) __sfr PWM2PHL;
3450
3451 typedef struct
3452 {
3453 unsigned PWM2PHL0 : 1;
3454 unsigned PWM2PHL1 : 1;
3455 unsigned PWM2PHL2 : 1;
3456 unsigned PWM2PHL3 : 1;
3457 unsigned PWM2PHL4 : 1;
3458 unsigned PWM2PHL5 : 1;
3459 unsigned PWM2PHL6 : 1;
3460 unsigned PWM2PHL7 : 1;
3461 } __PWM2PHLbits_t;
3462
3463 extern __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
3464
3465 #define _PWM2PHL0 0x01
3466 #define _PWM2PHL1 0x02
3467 #define _PWM2PHL2 0x04
3468 #define _PWM2PHL3 0x08
3469 #define _PWM2PHL4 0x10
3470 #define _PWM2PHL5 0x20
3471 #define _PWM2PHL6 0x40
3472 #define _PWM2PHL7 0x80
3473
3474 //==============================================================================
3475
3476
3477 //==============================================================================
3478 // PWM2PHH Bits
3479
3480 extern __at(0x0DA2) __sfr PWM2PHH;
3481
3482 typedef struct
3483 {
3484 unsigned PWM2PHH0 : 1;
3485 unsigned PWM2PHH1 : 1;
3486 unsigned PWM2PHH2 : 1;
3487 unsigned PWM2PHH3 : 1;
3488 unsigned PWM2PHH4 : 1;
3489 unsigned PWM2PHH5 : 1;
3490 unsigned PWM2PHH6 : 1;
3491 unsigned PWM2PHH7 : 1;
3492 } __PWM2PHHbits_t;
3493
3494 extern __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
3495
3496 #define _PWM2PHH0 0x01
3497 #define _PWM2PHH1 0x02
3498 #define _PWM2PHH2 0x04
3499 #define _PWM2PHH3 0x08
3500 #define _PWM2PHH4 0x10
3501 #define _PWM2PHH5 0x20
3502 #define _PWM2PHH6 0x40
3503 #define _PWM2PHH7 0x80
3504
3505 //==============================================================================
3506
3507 extern __at(0x0DA3) __sfr PWM2DC;
3508
3509 //==============================================================================
3510 // PWM2DCL Bits
3511
3512 extern __at(0x0DA3) __sfr PWM2DCL;
3513
3514 typedef struct
3515 {
3516 unsigned PWM2DCL0 : 1;
3517 unsigned PWM2DCL1 : 1;
3518 unsigned PWM2DCL2 : 1;
3519 unsigned PWM2DCL3 : 1;
3520 unsigned PWM2DCL4 : 1;
3521 unsigned PWM2DCL5 : 1;
3522 unsigned PWM2DCL6 : 1;
3523 unsigned PWM2DCL7 : 1;
3524 } __PWM2DCLbits_t;
3525
3526 extern __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
3527
3528 #define _PWM2DCL0 0x01
3529 #define _PWM2DCL1 0x02
3530 #define _PWM2DCL2 0x04
3531 #define _PWM2DCL3 0x08
3532 #define _PWM2DCL4 0x10
3533 #define _PWM2DCL5 0x20
3534 #define _PWM2DCL6 0x40
3535 #define _PWM2DCL7 0x80
3536
3537 //==============================================================================
3538
3539
3540 //==============================================================================
3541 // PWM2DCH Bits
3542
3543 extern __at(0x0DA4) __sfr PWM2DCH;
3544
3545 typedef struct
3546 {
3547 unsigned PWM2DCH0 : 1;
3548 unsigned PWM2DCH1 : 1;
3549 unsigned PWM2DCH2 : 1;
3550 unsigned PWM2DCH3 : 1;
3551 unsigned PWM2DCH4 : 1;
3552 unsigned PWM2DCH5 : 1;
3553 unsigned PWM2DCH6 : 1;
3554 unsigned PWM2DCH7 : 1;
3555 } __PWM2DCHbits_t;
3556
3557 extern __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
3558
3559 #define _PWM2DCH0 0x01
3560 #define _PWM2DCH1 0x02
3561 #define _PWM2DCH2 0x04
3562 #define _PWM2DCH3 0x08
3563 #define _PWM2DCH4 0x10
3564 #define _PWM2DCH5 0x20
3565 #define _PWM2DCH6 0x40
3566 #define _PWM2DCH7 0x80
3567
3568 //==============================================================================
3569
3570 extern __at(0x0DA5) __sfr PWM2PR;
3571
3572 //==============================================================================
3573 // PWM2PRL Bits
3574
3575 extern __at(0x0DA5) __sfr PWM2PRL;
3576
3577 typedef struct
3578 {
3579 unsigned PWM2PRL0 : 1;
3580 unsigned PWM2PRL1 : 1;
3581 unsigned PWM2PRL2 : 1;
3582 unsigned PWM2PRL3 : 1;
3583 unsigned PWM2PRL4 : 1;
3584 unsigned PWM2PRL5 : 1;
3585 unsigned PWM2PRL6 : 1;
3586 unsigned PWM2PRL7 : 1;
3587 } __PWM2PRLbits_t;
3588
3589 extern __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
3590
3591 #define _PWM2PRL0 0x01
3592 #define _PWM2PRL1 0x02
3593 #define _PWM2PRL2 0x04
3594 #define _PWM2PRL3 0x08
3595 #define _PWM2PRL4 0x10
3596 #define _PWM2PRL5 0x20
3597 #define _PWM2PRL6 0x40
3598 #define _PWM2PRL7 0x80
3599
3600 //==============================================================================
3601
3602
3603 //==============================================================================
3604 // PWM2PRH Bits
3605
3606 extern __at(0x0DA6) __sfr PWM2PRH;
3607
3608 typedef struct
3609 {
3610 unsigned PWM2PRH0 : 1;
3611 unsigned PWM2PRH1 : 1;
3612 unsigned PWM2PRH2 : 1;
3613 unsigned PWM2PRH3 : 1;
3614 unsigned PWM2PRH4 : 1;
3615 unsigned PWM2PRH5 : 1;
3616 unsigned PWM2PRH6 : 1;
3617 unsigned PWM2PRH7 : 1;
3618 } __PWM2PRHbits_t;
3619
3620 extern __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
3621
3622 #define _PWM2PRH0 0x01
3623 #define _PWM2PRH1 0x02
3624 #define _PWM2PRH2 0x04
3625 #define _PWM2PRH3 0x08
3626 #define _PWM2PRH4 0x10
3627 #define _PWM2PRH5 0x20
3628 #define _PWM2PRH6 0x40
3629 #define _PWM2PRH7 0x80
3630
3631 //==============================================================================
3632
3633 extern __at(0x0DA7) __sfr PWM2OF;
3634
3635 //==============================================================================
3636 // PWM2OFL Bits
3637
3638 extern __at(0x0DA7) __sfr PWM2OFL;
3639
3640 typedef struct
3641 {
3642 unsigned PWM2OFL0 : 1;
3643 unsigned PWM2OFL1 : 1;
3644 unsigned PWM2OFL2 : 1;
3645 unsigned PWM2OFL3 : 1;
3646 unsigned PWM2OFL4 : 1;
3647 unsigned PWM2OFL5 : 1;
3648 unsigned PWM2OFL6 : 1;
3649 unsigned PWM2OFL7 : 1;
3650 } __PWM2OFLbits_t;
3651
3652 extern __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
3653
3654 #define _PWM2OFL0 0x01
3655 #define _PWM2OFL1 0x02
3656 #define _PWM2OFL2 0x04
3657 #define _PWM2OFL3 0x08
3658 #define _PWM2OFL4 0x10
3659 #define _PWM2OFL5 0x20
3660 #define _PWM2OFL6 0x40
3661 #define _PWM2OFL7 0x80
3662
3663 //==============================================================================
3664
3665
3666 //==============================================================================
3667 // PWM2OFH Bits
3668
3669 extern __at(0x0DA8) __sfr PWM2OFH;
3670
3671 typedef struct
3672 {
3673 unsigned PWM2OFH0 : 1;
3674 unsigned PWM2OFH1 : 1;
3675 unsigned PWM2OFH2 : 1;
3676 unsigned PWM2OFH3 : 1;
3677 unsigned PWM2OFH4 : 1;
3678 unsigned PWM2OFH5 : 1;
3679 unsigned PWM2OFH6 : 1;
3680 unsigned PWM2OFH7 : 1;
3681 } __PWM2OFHbits_t;
3682
3683 extern __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
3684
3685 #define _PWM2OFH0 0x01
3686 #define _PWM2OFH1 0x02
3687 #define _PWM2OFH2 0x04
3688 #define _PWM2OFH3 0x08
3689 #define _PWM2OFH4 0x10
3690 #define _PWM2OFH5 0x20
3691 #define _PWM2OFH6 0x40
3692 #define _PWM2OFH7 0x80
3693
3694 //==============================================================================
3695
3696 extern __at(0x0DA9) __sfr PWM2TMR;
3697
3698 //==============================================================================
3699 // PWM2TMRL Bits
3700
3701 extern __at(0x0DA9) __sfr PWM2TMRL;
3702
3703 typedef struct
3704 {
3705 unsigned PWM2TMRL0 : 1;
3706 unsigned PWM2TMRL1 : 1;
3707 unsigned PWM2TMRL2 : 1;
3708 unsigned PWM2TMRL3 : 1;
3709 unsigned PWM2TMRL4 : 1;
3710 unsigned PWM2TMRL5 : 1;
3711 unsigned PWM2TMRL6 : 1;
3712 unsigned PWM2TMRL7 : 1;
3713 } __PWM2TMRLbits_t;
3714
3715 extern __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
3716
3717 #define _PWM2TMRL0 0x01
3718 #define _PWM2TMRL1 0x02
3719 #define _PWM2TMRL2 0x04
3720 #define _PWM2TMRL3 0x08
3721 #define _PWM2TMRL4 0x10
3722 #define _PWM2TMRL5 0x20
3723 #define _PWM2TMRL6 0x40
3724 #define _PWM2TMRL7 0x80
3725
3726 //==============================================================================
3727
3728
3729 //==============================================================================
3730 // PWM2TMRH Bits
3731
3732 extern __at(0x0DAA) __sfr PWM2TMRH;
3733
3734 typedef struct
3735 {
3736 unsigned PWM2TMRH0 : 1;
3737 unsigned PWM2TMRH1 : 1;
3738 unsigned PWM2TMRH2 : 1;
3739 unsigned PWM2TMRH3 : 1;
3740 unsigned PWM2TMRH4 : 1;
3741 unsigned PWM2TMRH5 : 1;
3742 unsigned PWM2TMRH6 : 1;
3743 unsigned PWM2TMRH7 : 1;
3744 } __PWM2TMRHbits_t;
3745
3746 extern __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
3747
3748 #define _PWM2TMRH0 0x01
3749 #define _PWM2TMRH1 0x02
3750 #define _PWM2TMRH2 0x04
3751 #define _PWM2TMRH3 0x08
3752 #define _PWM2TMRH4 0x10
3753 #define _PWM2TMRH5 0x20
3754 #define _PWM2TMRH6 0x40
3755 #define _PWM2TMRH7 0x80
3756
3757 //==============================================================================
3758
3759
3760 //==============================================================================
3761 // PWM2CON Bits
3762
3763 extern __at(0x0DAB) __sfr PWM2CON;
3764
3765 typedef union
3766 {
3767 struct
3768 {
3769 unsigned : 1;
3770 unsigned : 1;
3771 unsigned PWM2MODE0 : 1;
3772 unsigned PWM2MODE1 : 1;
3773 unsigned POL : 1;
3774 unsigned OUT : 1;
3775 unsigned OE : 1;
3776 unsigned EN : 1;
3777 };
3778
3779 struct
3780 {
3781 unsigned : 1;
3782 unsigned : 1;
3783 unsigned MODE0 : 1;
3784 unsigned MODE1 : 1;
3785 unsigned PWM2POL : 1;
3786 unsigned PWM2OUT : 1;
3787 unsigned PWM2OE : 1;
3788 unsigned PWM2EN : 1;
3789 };
3790
3791 struct
3792 {
3793 unsigned : 2;
3794 unsigned PWM2MODE : 2;
3795 unsigned : 4;
3796 };
3797
3798 struct
3799 {
3800 unsigned : 2;
3801 unsigned MODE : 2;
3802 unsigned : 4;
3803 };
3804 } __PWM2CONbits_t;
3805
3806 extern __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
3807
3808 #define _PWM2CON_PWM2MODE0 0x04
3809 #define _PWM2CON_MODE0 0x04
3810 #define _PWM2CON_PWM2MODE1 0x08
3811 #define _PWM2CON_MODE1 0x08
3812 #define _PWM2CON_POL 0x10
3813 #define _PWM2CON_PWM2POL 0x10
3814 #define _PWM2CON_OUT 0x20
3815 #define _PWM2CON_PWM2OUT 0x20
3816 #define _PWM2CON_OE 0x40
3817 #define _PWM2CON_PWM2OE 0x40
3818 #define _PWM2CON_EN 0x80
3819 #define _PWM2CON_PWM2EN 0x80
3820
3821 //==============================================================================
3822
3823
3824 //==============================================================================
3825 // PWM2INTCON Bits
3826
3827 extern __at(0x0DAC) __sfr PWM2INTCON;
3828
3829 typedef union
3830 {
3831 struct
3832 {
3833 unsigned PRIE : 1;
3834 unsigned DCIE : 1;
3835 unsigned PHIE : 1;
3836 unsigned OFIE : 1;
3837 unsigned : 1;
3838 unsigned : 1;
3839 unsigned : 1;
3840 unsigned : 1;
3841 };
3842
3843 struct
3844 {
3845 unsigned PWM2PRIE : 1;
3846 unsigned PWM2DCIE : 1;
3847 unsigned PWM2PHIE : 1;
3848 unsigned PWM2OFIE : 1;
3849 unsigned : 1;
3850 unsigned : 1;
3851 unsigned : 1;
3852 unsigned : 1;
3853 };
3854 } __PWM2INTCONbits_t;
3855
3856 extern __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
3857
3858 #define _PWM2INTCON_PRIE 0x01
3859 #define _PWM2INTCON_PWM2PRIE 0x01
3860 #define _PWM2INTCON_DCIE 0x02
3861 #define _PWM2INTCON_PWM2DCIE 0x02
3862 #define _PWM2INTCON_PHIE 0x04
3863 #define _PWM2INTCON_PWM2PHIE 0x04
3864 #define _PWM2INTCON_OFIE 0x08
3865 #define _PWM2INTCON_PWM2OFIE 0x08
3866
3867 //==============================================================================
3868
3869
3870 //==============================================================================
3871 // PWM2INTE Bits
3872
3873 extern __at(0x0DAC) __sfr PWM2INTE;
3874
3875 typedef union
3876 {
3877 struct
3878 {
3879 unsigned PRIE : 1;
3880 unsigned DCIE : 1;
3881 unsigned PHIE : 1;
3882 unsigned OFIE : 1;
3883 unsigned : 1;
3884 unsigned : 1;
3885 unsigned : 1;
3886 unsigned : 1;
3887 };
3888
3889 struct
3890 {
3891 unsigned PWM2PRIE : 1;
3892 unsigned PWM2DCIE : 1;
3893 unsigned PWM2PHIE : 1;
3894 unsigned PWM2OFIE : 1;
3895 unsigned : 1;
3896 unsigned : 1;
3897 unsigned : 1;
3898 unsigned : 1;
3899 };
3900 } __PWM2INTEbits_t;
3901
3902 extern __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
3903
3904 #define _PWM2INTE_PRIE 0x01
3905 #define _PWM2INTE_PWM2PRIE 0x01
3906 #define _PWM2INTE_DCIE 0x02
3907 #define _PWM2INTE_PWM2DCIE 0x02
3908 #define _PWM2INTE_PHIE 0x04
3909 #define _PWM2INTE_PWM2PHIE 0x04
3910 #define _PWM2INTE_OFIE 0x08
3911 #define _PWM2INTE_PWM2OFIE 0x08
3912
3913 //==============================================================================
3914
3915
3916 //==============================================================================
3917 // PWM2INTF Bits
3918
3919 extern __at(0x0DAD) __sfr PWM2INTF;
3920
3921 typedef union
3922 {
3923 struct
3924 {
3925 unsigned PRIF : 1;
3926 unsigned DCIF : 1;
3927 unsigned PHIF : 1;
3928 unsigned OFIF : 1;
3929 unsigned : 1;
3930 unsigned : 1;
3931 unsigned : 1;
3932 unsigned : 1;
3933 };
3934
3935 struct
3936 {
3937 unsigned PWM2PRIF : 1;
3938 unsigned PWM2DCIF : 1;
3939 unsigned PWM2PHIF : 1;
3940 unsigned PWM2OFIF : 1;
3941 unsigned : 1;
3942 unsigned : 1;
3943 unsigned : 1;
3944 unsigned : 1;
3945 };
3946 } __PWM2INTFbits_t;
3947
3948 extern __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
3949
3950 #define _PWM2INTF_PRIF 0x01
3951 #define _PWM2INTF_PWM2PRIF 0x01
3952 #define _PWM2INTF_DCIF 0x02
3953 #define _PWM2INTF_PWM2DCIF 0x02
3954 #define _PWM2INTF_PHIF 0x04
3955 #define _PWM2INTF_PWM2PHIF 0x04
3956 #define _PWM2INTF_OFIF 0x08
3957 #define _PWM2INTF_PWM2OFIF 0x08
3958
3959 //==============================================================================
3960
3961
3962 //==============================================================================
3963 // PWM2INTFLG Bits
3964
3965 extern __at(0x0DAD) __sfr PWM2INTFLG;
3966
3967 typedef union
3968 {
3969 struct
3970 {
3971 unsigned PRIF : 1;
3972 unsigned DCIF : 1;
3973 unsigned PHIF : 1;
3974 unsigned OFIF : 1;
3975 unsigned : 1;
3976 unsigned : 1;
3977 unsigned : 1;
3978 unsigned : 1;
3979 };
3980
3981 struct
3982 {
3983 unsigned PWM2PRIF : 1;
3984 unsigned PWM2DCIF : 1;
3985 unsigned PWM2PHIF : 1;
3986 unsigned PWM2OFIF : 1;
3987 unsigned : 1;
3988 unsigned : 1;
3989 unsigned : 1;
3990 unsigned : 1;
3991 };
3992 } __PWM2INTFLGbits_t;
3993
3994 extern __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
3995
3996 #define _PWM2INTFLG_PRIF 0x01
3997 #define _PWM2INTFLG_PWM2PRIF 0x01
3998 #define _PWM2INTFLG_DCIF 0x02
3999 #define _PWM2INTFLG_PWM2DCIF 0x02
4000 #define _PWM2INTFLG_PHIF 0x04
4001 #define _PWM2INTFLG_PWM2PHIF 0x04
4002 #define _PWM2INTFLG_OFIF 0x08
4003 #define _PWM2INTFLG_PWM2OFIF 0x08
4004
4005 //==============================================================================
4006
4007
4008 //==============================================================================
4009 // PWM2CLKCON Bits
4010
4011 extern __at(0x0DAE) __sfr PWM2CLKCON;
4012
4013 typedef union
4014 {
4015 struct
4016 {
4017 unsigned PWM2CS0 : 1;
4018 unsigned PWM2CS1 : 1;
4019 unsigned : 1;
4020 unsigned : 1;
4021 unsigned PWM2PS0 : 1;
4022 unsigned PWM2PS1 : 1;
4023 unsigned PWM2PS2 : 1;
4024 unsigned : 1;
4025 };
4026
4027 struct
4028 {
4029 unsigned CS0 : 1;
4030 unsigned CS1 : 1;
4031 unsigned : 1;
4032 unsigned : 1;
4033 unsigned PS0 : 1;
4034 unsigned PS1 : 1;
4035 unsigned PS2 : 1;
4036 unsigned : 1;
4037 };
4038
4039 struct
4040 {
4041 unsigned CS : 2;
4042 unsigned : 6;
4043 };
4044
4045 struct
4046 {
4047 unsigned PWM2CS : 2;
4048 unsigned : 6;
4049 };
4050
4051 struct
4052 {
4053 unsigned : 4;
4054 unsigned PWM2PS : 3;
4055 unsigned : 1;
4056 };
4057
4058 struct
4059 {
4060 unsigned : 4;
4061 unsigned PS : 3;
4062 unsigned : 1;
4063 };
4064 } __PWM2CLKCONbits_t;
4065
4066 extern __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
4067
4068 #define _PWM2CLKCON_PWM2CS0 0x01
4069 #define _PWM2CLKCON_CS0 0x01
4070 #define _PWM2CLKCON_PWM2CS1 0x02
4071 #define _PWM2CLKCON_CS1 0x02
4072 #define _PWM2CLKCON_PWM2PS0 0x10
4073 #define _PWM2CLKCON_PS0 0x10
4074 #define _PWM2CLKCON_PWM2PS1 0x20
4075 #define _PWM2CLKCON_PS1 0x20
4076 #define _PWM2CLKCON_PWM2PS2 0x40
4077 #define _PWM2CLKCON_PS2 0x40
4078
4079 //==============================================================================
4080
4081
4082 //==============================================================================
4083 // PWM2LDCON Bits
4084
4085 extern __at(0x0DAF) __sfr PWM2LDCON;
4086
4087 typedef union
4088 {
4089 struct
4090 {
4091 unsigned PWM2LDS0 : 1;
4092 unsigned PWM2LDS1 : 1;
4093 unsigned : 1;
4094 unsigned : 1;
4095 unsigned : 1;
4096 unsigned : 1;
4097 unsigned LDT : 1;
4098 unsigned LDA : 1;
4099 };
4100
4101 struct
4102 {
4103 unsigned LDS0 : 1;
4104 unsigned LDS1 : 1;
4105 unsigned : 1;
4106 unsigned : 1;
4107 unsigned : 1;
4108 unsigned : 1;
4109 unsigned PWM2LDM : 1;
4110 unsigned PWM2LD : 1;
4111 };
4112
4113 struct
4114 {
4115 unsigned PWM2LDS : 2;
4116 unsigned : 6;
4117 };
4118
4119 struct
4120 {
4121 unsigned LDS : 2;
4122 unsigned : 6;
4123 };
4124 } __PWM2LDCONbits_t;
4125
4126 extern __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
4127
4128 #define _PWM2LDCON_PWM2LDS0 0x01
4129 #define _PWM2LDCON_LDS0 0x01
4130 #define _PWM2LDCON_PWM2LDS1 0x02
4131 #define _PWM2LDCON_LDS1 0x02
4132 #define _PWM2LDCON_LDT 0x40
4133 #define _PWM2LDCON_PWM2LDM 0x40
4134 #define _PWM2LDCON_LDA 0x80
4135 #define _PWM2LDCON_PWM2LD 0x80
4136
4137 //==============================================================================
4138
4139
4140 //==============================================================================
4141 // PWM2OFCON Bits
4142
4143 extern __at(0x0DB0) __sfr PWM2OFCON;
4144
4145 typedef union
4146 {
4147 struct
4148 {
4149 unsigned PWM2OFS0 : 1;
4150 unsigned PWM2OFS1 : 1;
4151 unsigned : 1;
4152 unsigned : 1;
4153 unsigned OFO : 1;
4154 unsigned PWM2OFM0 : 1;
4155 unsigned PWM2OFM1 : 1;
4156 unsigned : 1;
4157 };
4158
4159 struct
4160 {
4161 unsigned OFS0 : 1;
4162 unsigned OFS1 : 1;
4163 unsigned : 1;
4164 unsigned : 1;
4165 unsigned PWM2OFMC : 1;
4166 unsigned OFM0 : 1;
4167 unsigned OFM1 : 1;
4168 unsigned : 1;
4169 };
4170
4171 struct
4172 {
4173 unsigned OFS : 2;
4174 unsigned : 6;
4175 };
4176
4177 struct
4178 {
4179 unsigned PWM2OFS : 2;
4180 unsigned : 6;
4181 };
4182
4183 struct
4184 {
4185 unsigned : 5;
4186 unsigned OFM : 2;
4187 unsigned : 1;
4188 };
4189
4190 struct
4191 {
4192 unsigned : 5;
4193 unsigned PWM2OFM : 2;
4194 unsigned : 1;
4195 };
4196 } __PWM2OFCONbits_t;
4197
4198 extern __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
4199
4200 #define _PWM2OFCON_PWM2OFS0 0x01
4201 #define _PWM2OFCON_OFS0 0x01
4202 #define _PWM2OFCON_PWM2OFS1 0x02
4203 #define _PWM2OFCON_OFS1 0x02
4204 #define _PWM2OFCON_OFO 0x10
4205 #define _PWM2OFCON_PWM2OFMC 0x10
4206 #define _PWM2OFCON_PWM2OFM0 0x20
4207 #define _PWM2OFCON_OFM0 0x20
4208 #define _PWM2OFCON_PWM2OFM1 0x40
4209 #define _PWM2OFCON_OFM1 0x40
4210
4211 //==============================================================================
4212
4213 extern __at(0x0DB1) __sfr PWM3PH;
4214
4215 //==============================================================================
4216 // PWM3PHL Bits
4217
4218 extern __at(0x0DB1) __sfr PWM3PHL;
4219
4220 typedef struct
4221 {
4222 unsigned PWM3PHL0 : 1;
4223 unsigned PWM3PHL1 : 1;
4224 unsigned PWM3PHL2 : 1;
4225 unsigned PWM3PHL3 : 1;
4226 unsigned PWM3PHL4 : 1;
4227 unsigned PWM3PHL5 : 1;
4228 unsigned PWM3PHL6 : 1;
4229 unsigned PWM3PHL7 : 1;
4230 } __PWM3PHLbits_t;
4231
4232 extern __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
4233
4234 #define _PWM3PHL0 0x01
4235 #define _PWM3PHL1 0x02
4236 #define _PWM3PHL2 0x04
4237 #define _PWM3PHL3 0x08
4238 #define _PWM3PHL4 0x10
4239 #define _PWM3PHL5 0x20
4240 #define _PWM3PHL6 0x40
4241 #define _PWM3PHL7 0x80
4242
4243 //==============================================================================
4244
4245
4246 //==============================================================================
4247 // PWM3PHH Bits
4248
4249 extern __at(0x0DB2) __sfr PWM3PHH;
4250
4251 typedef struct
4252 {
4253 unsigned PWM3PHH0 : 1;
4254 unsigned PWM3PHH1 : 1;
4255 unsigned PWM3PHH2 : 1;
4256 unsigned PWM3PHH3 : 1;
4257 unsigned PWM3PHH4 : 1;
4258 unsigned PWM3PHH5 : 1;
4259 unsigned PWM3PHH6 : 1;
4260 unsigned PWM3PHH7 : 1;
4261 } __PWM3PHHbits_t;
4262
4263 extern __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
4264
4265 #define _PWM3PHH0 0x01
4266 #define _PWM3PHH1 0x02
4267 #define _PWM3PHH2 0x04
4268 #define _PWM3PHH3 0x08
4269 #define _PWM3PHH4 0x10
4270 #define _PWM3PHH5 0x20
4271 #define _PWM3PHH6 0x40
4272 #define _PWM3PHH7 0x80
4273
4274 //==============================================================================
4275
4276 extern __at(0x0DB3) __sfr PWM3DC;
4277
4278 //==============================================================================
4279 // PWM3DCL Bits
4280
4281 extern __at(0x0DB3) __sfr PWM3DCL;
4282
4283 typedef struct
4284 {
4285 unsigned PWM3DCL0 : 1;
4286 unsigned PWM3DCL1 : 1;
4287 unsigned PWM3DCL2 : 1;
4288 unsigned PWM3DCL3 : 1;
4289 unsigned PWM3DCL4 : 1;
4290 unsigned PWM3DCL5 : 1;
4291 unsigned PWM3DCL6 : 1;
4292 unsigned PWM3DCL7 : 1;
4293 } __PWM3DCLbits_t;
4294
4295 extern __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
4296
4297 #define _PWM3DCL0 0x01
4298 #define _PWM3DCL1 0x02
4299 #define _PWM3DCL2 0x04
4300 #define _PWM3DCL3 0x08
4301 #define _PWM3DCL4 0x10
4302 #define _PWM3DCL5 0x20
4303 #define _PWM3DCL6 0x40
4304 #define _PWM3DCL7 0x80
4305
4306 //==============================================================================
4307
4308
4309 //==============================================================================
4310 // PWM3DCH Bits
4311
4312 extern __at(0x0DB4) __sfr PWM3DCH;
4313
4314 typedef struct
4315 {
4316 unsigned PWM3DCH0 : 1;
4317 unsigned PWM3DCH1 : 1;
4318 unsigned PWM3DCH2 : 1;
4319 unsigned PWM3DCH3 : 1;
4320 unsigned PWM3DCH4 : 1;
4321 unsigned PWM3DCH5 : 1;
4322 unsigned PWM3DCH6 : 1;
4323 unsigned PWM3DCH7 : 1;
4324 } __PWM3DCHbits_t;
4325
4326 extern __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
4327
4328 #define _PWM3DCH0 0x01
4329 #define _PWM3DCH1 0x02
4330 #define _PWM3DCH2 0x04
4331 #define _PWM3DCH3 0x08
4332 #define _PWM3DCH4 0x10
4333 #define _PWM3DCH5 0x20
4334 #define _PWM3DCH6 0x40
4335 #define _PWM3DCH7 0x80
4336
4337 //==============================================================================
4338
4339 extern __at(0x0DB5) __sfr PWM3PR;
4340
4341 //==============================================================================
4342 // PWM3PRL Bits
4343
4344 extern __at(0x0DB5) __sfr PWM3PRL;
4345
4346 typedef struct
4347 {
4348 unsigned PWM3PRL0 : 1;
4349 unsigned PWM3PRL1 : 1;
4350 unsigned PWM3PRL2 : 1;
4351 unsigned PWM3PRL3 : 1;
4352 unsigned PWM3PRL4 : 1;
4353 unsigned PWM3PRL5 : 1;
4354 unsigned PWM3PRL6 : 1;
4355 unsigned PWM3PRL7 : 1;
4356 } __PWM3PRLbits_t;
4357
4358 extern __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
4359
4360 #define _PWM3PRL0 0x01
4361 #define _PWM3PRL1 0x02
4362 #define _PWM3PRL2 0x04
4363 #define _PWM3PRL3 0x08
4364 #define _PWM3PRL4 0x10
4365 #define _PWM3PRL5 0x20
4366 #define _PWM3PRL6 0x40
4367 #define _PWM3PRL7 0x80
4368
4369 //==============================================================================
4370
4371
4372 //==============================================================================
4373 // PWM3PRH Bits
4374
4375 extern __at(0x0DB6) __sfr PWM3PRH;
4376
4377 typedef struct
4378 {
4379 unsigned PWM3PRH0 : 1;
4380 unsigned PWM3PRH1 : 1;
4381 unsigned PWM3PRH2 : 1;
4382 unsigned PWM3PRH3 : 1;
4383 unsigned PWM3PRH4 : 1;
4384 unsigned PWM3PRH5 : 1;
4385 unsigned PWM3PRH6 : 1;
4386 unsigned PWM3PRH7 : 1;
4387 } __PWM3PRHbits_t;
4388
4389 extern __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
4390
4391 #define _PWM3PRH0 0x01
4392 #define _PWM3PRH1 0x02
4393 #define _PWM3PRH2 0x04
4394 #define _PWM3PRH3 0x08
4395 #define _PWM3PRH4 0x10
4396 #define _PWM3PRH5 0x20
4397 #define _PWM3PRH6 0x40
4398 #define _PWM3PRH7 0x80
4399
4400 //==============================================================================
4401
4402 extern __at(0x0DB7) __sfr PWM3OF;
4403
4404 //==============================================================================
4405 // PWM3OFL Bits
4406
4407 extern __at(0x0DB7) __sfr PWM3OFL;
4408
4409 typedef struct
4410 {
4411 unsigned PWM3OFL0 : 1;
4412 unsigned PWM3OFL1 : 1;
4413 unsigned PWM3OFL2 : 1;
4414 unsigned PWM3OFL3 : 1;
4415 unsigned PWM3OFL4 : 1;
4416 unsigned PWM3OFL5 : 1;
4417 unsigned PWM3OFL6 : 1;
4418 unsigned PWM3OFL7 : 1;
4419 } __PWM3OFLbits_t;
4420
4421 extern __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
4422
4423 #define _PWM3OFL0 0x01
4424 #define _PWM3OFL1 0x02
4425 #define _PWM3OFL2 0x04
4426 #define _PWM3OFL3 0x08
4427 #define _PWM3OFL4 0x10
4428 #define _PWM3OFL5 0x20
4429 #define _PWM3OFL6 0x40
4430 #define _PWM3OFL7 0x80
4431
4432 //==============================================================================
4433
4434
4435 //==============================================================================
4436 // PWM3OFH Bits
4437
4438 extern __at(0x0DB8) __sfr PWM3OFH;
4439
4440 typedef struct
4441 {
4442 unsigned PWM3OFH0 : 1;
4443 unsigned PWM3OFH1 : 1;
4444 unsigned PWM3OFH2 : 1;
4445 unsigned PWM3OFH3 : 1;
4446 unsigned PWM3OFH4 : 1;
4447 unsigned PWM3OFH5 : 1;
4448 unsigned PWM3OFH6 : 1;
4449 unsigned PWM3OFH7 : 1;
4450 } __PWM3OFHbits_t;
4451
4452 extern __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
4453
4454 #define _PWM3OFH0 0x01
4455 #define _PWM3OFH1 0x02
4456 #define _PWM3OFH2 0x04
4457 #define _PWM3OFH3 0x08
4458 #define _PWM3OFH4 0x10
4459 #define _PWM3OFH5 0x20
4460 #define _PWM3OFH6 0x40
4461 #define _PWM3OFH7 0x80
4462
4463 //==============================================================================
4464
4465 extern __at(0x0DB9) __sfr PWM3TMR;
4466
4467 //==============================================================================
4468 // PWM3TMRL Bits
4469
4470 extern __at(0x0DB9) __sfr PWM3TMRL;
4471
4472 typedef struct
4473 {
4474 unsigned PWM3TMRL0 : 1;
4475 unsigned PWM3TMRL1 : 1;
4476 unsigned PWM3TMRL2 : 1;
4477 unsigned PWM3TMRL3 : 1;
4478 unsigned PWM3TMRL4 : 1;
4479 unsigned PWM3TMRL5 : 1;
4480 unsigned PWM3TMRL6 : 1;
4481 unsigned PWM3TMRL7 : 1;
4482 } __PWM3TMRLbits_t;
4483
4484 extern __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
4485
4486 #define _PWM3TMRL0 0x01
4487 #define _PWM3TMRL1 0x02
4488 #define _PWM3TMRL2 0x04
4489 #define _PWM3TMRL3 0x08
4490 #define _PWM3TMRL4 0x10
4491 #define _PWM3TMRL5 0x20
4492 #define _PWM3TMRL6 0x40
4493 #define _PWM3TMRL7 0x80
4494
4495 //==============================================================================
4496
4497
4498 //==============================================================================
4499 // PWM3TMRH Bits
4500
4501 extern __at(0x0DBA) __sfr PWM3TMRH;
4502
4503 typedef struct
4504 {
4505 unsigned PWM3TMRH0 : 1;
4506 unsigned PWM3TMRH1 : 1;
4507 unsigned PWM3TMRH2 : 1;
4508 unsigned PWM3TMRH3 : 1;
4509 unsigned PWM3TMRH4 : 1;
4510 unsigned PWM3TMRH5 : 1;
4511 unsigned PWM3TMRH6 : 1;
4512 unsigned PWM3TMRH7 : 1;
4513 } __PWM3TMRHbits_t;
4514
4515 extern __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
4516
4517 #define _PWM3TMRH0 0x01
4518 #define _PWM3TMRH1 0x02
4519 #define _PWM3TMRH2 0x04
4520 #define _PWM3TMRH3 0x08
4521 #define _PWM3TMRH4 0x10
4522 #define _PWM3TMRH5 0x20
4523 #define _PWM3TMRH6 0x40
4524 #define _PWM3TMRH7 0x80
4525
4526 //==============================================================================
4527
4528
4529 //==============================================================================
4530 // PWM3CON Bits
4531
4532 extern __at(0x0DBB) __sfr PWM3CON;
4533
4534 typedef union
4535 {
4536 struct
4537 {
4538 unsigned : 1;
4539 unsigned : 1;
4540 unsigned PWM3MODE0 : 1;
4541 unsigned PWM3MODE1 : 1;
4542 unsigned POL : 1;
4543 unsigned OUT : 1;
4544 unsigned OE : 1;
4545 unsigned EN : 1;
4546 };
4547
4548 struct
4549 {
4550 unsigned : 1;
4551 unsigned : 1;
4552 unsigned MODE0 : 1;
4553 unsigned MODE1 : 1;
4554 unsigned PWM3POL : 1;
4555 unsigned PWM3OUT : 1;
4556 unsigned PWM3OE : 1;
4557 unsigned PWM3EN : 1;
4558 };
4559
4560 struct
4561 {
4562 unsigned : 2;
4563 unsigned PWM3MODE : 2;
4564 unsigned : 4;
4565 };
4566
4567 struct
4568 {
4569 unsigned : 2;
4570 unsigned MODE : 2;
4571 unsigned : 4;
4572 };
4573 } __PWM3CONbits_t;
4574
4575 extern __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
4576
4577 #define _PWM3CON_PWM3MODE0 0x04
4578 #define _PWM3CON_MODE0 0x04
4579 #define _PWM3CON_PWM3MODE1 0x08
4580 #define _PWM3CON_MODE1 0x08
4581 #define _PWM3CON_POL 0x10
4582 #define _PWM3CON_PWM3POL 0x10
4583 #define _PWM3CON_OUT 0x20
4584 #define _PWM3CON_PWM3OUT 0x20
4585 #define _PWM3CON_OE 0x40
4586 #define _PWM3CON_PWM3OE 0x40
4587 #define _PWM3CON_EN 0x80
4588 #define _PWM3CON_PWM3EN 0x80
4589
4590 //==============================================================================
4591
4592
4593 //==============================================================================
4594 // PWM3INTCON Bits
4595
4596 extern __at(0x0DBC) __sfr PWM3INTCON;
4597
4598 typedef union
4599 {
4600 struct
4601 {
4602 unsigned PRIE : 1;
4603 unsigned DCIE : 1;
4604 unsigned PHIE : 1;
4605 unsigned OFIE : 1;
4606 unsigned : 1;
4607 unsigned : 1;
4608 unsigned : 1;
4609 unsigned : 1;
4610 };
4611
4612 struct
4613 {
4614 unsigned PWM3PRIE : 1;
4615 unsigned PWM3DCIE : 1;
4616 unsigned PWM3PHIE : 1;
4617 unsigned PWM3OFIE : 1;
4618 unsigned : 1;
4619 unsigned : 1;
4620 unsigned : 1;
4621 unsigned : 1;
4622 };
4623 } __PWM3INTCONbits_t;
4624
4625 extern __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
4626
4627 #define _PWM3INTCON_PRIE 0x01
4628 #define _PWM3INTCON_PWM3PRIE 0x01
4629 #define _PWM3INTCON_DCIE 0x02
4630 #define _PWM3INTCON_PWM3DCIE 0x02
4631 #define _PWM3INTCON_PHIE 0x04
4632 #define _PWM3INTCON_PWM3PHIE 0x04
4633 #define _PWM3INTCON_OFIE 0x08
4634 #define _PWM3INTCON_PWM3OFIE 0x08
4635
4636 //==============================================================================
4637
4638
4639 //==============================================================================
4640 // PWM3INTE Bits
4641
4642 extern __at(0x0DBC) __sfr PWM3INTE;
4643
4644 typedef union
4645 {
4646 struct
4647 {
4648 unsigned PRIE : 1;
4649 unsigned DCIE : 1;
4650 unsigned PHIE : 1;
4651 unsigned OFIE : 1;
4652 unsigned : 1;
4653 unsigned : 1;
4654 unsigned : 1;
4655 unsigned : 1;
4656 };
4657
4658 struct
4659 {
4660 unsigned PWM3PRIE : 1;
4661 unsigned PWM3DCIE : 1;
4662 unsigned PWM3PHIE : 1;
4663 unsigned PWM3OFIE : 1;
4664 unsigned : 1;
4665 unsigned : 1;
4666 unsigned : 1;
4667 unsigned : 1;
4668 };
4669 } __PWM3INTEbits_t;
4670
4671 extern __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
4672
4673 #define _PWM3INTE_PRIE 0x01
4674 #define _PWM3INTE_PWM3PRIE 0x01
4675 #define _PWM3INTE_DCIE 0x02
4676 #define _PWM3INTE_PWM3DCIE 0x02
4677 #define _PWM3INTE_PHIE 0x04
4678 #define _PWM3INTE_PWM3PHIE 0x04
4679 #define _PWM3INTE_OFIE 0x08
4680 #define _PWM3INTE_PWM3OFIE 0x08
4681
4682 //==============================================================================
4683
4684
4685 //==============================================================================
4686 // PWM3INTF Bits
4687
4688 extern __at(0x0DBD) __sfr PWM3INTF;
4689
4690 typedef union
4691 {
4692 struct
4693 {
4694 unsigned PRIF : 1;
4695 unsigned DCIF : 1;
4696 unsigned PHIF : 1;
4697 unsigned OFIF : 1;
4698 unsigned : 1;
4699 unsigned : 1;
4700 unsigned : 1;
4701 unsigned : 1;
4702 };
4703
4704 struct
4705 {
4706 unsigned PWM3PRIF : 1;
4707 unsigned PWM3DCIF : 1;
4708 unsigned PWM3PHIF : 1;
4709 unsigned PWM3OFIF : 1;
4710 unsigned : 1;
4711 unsigned : 1;
4712 unsigned : 1;
4713 unsigned : 1;
4714 };
4715 } __PWM3INTFbits_t;
4716
4717 extern __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
4718
4719 #define _PWM3INTF_PRIF 0x01
4720 #define _PWM3INTF_PWM3PRIF 0x01
4721 #define _PWM3INTF_DCIF 0x02
4722 #define _PWM3INTF_PWM3DCIF 0x02
4723 #define _PWM3INTF_PHIF 0x04
4724 #define _PWM3INTF_PWM3PHIF 0x04
4725 #define _PWM3INTF_OFIF 0x08
4726 #define _PWM3INTF_PWM3OFIF 0x08
4727
4728 //==============================================================================
4729
4730
4731 //==============================================================================
4732 // PWM3INTFLG Bits
4733
4734 extern __at(0x0DBD) __sfr PWM3INTFLG;
4735
4736 typedef union
4737 {
4738 struct
4739 {
4740 unsigned PRIF : 1;
4741 unsigned DCIF : 1;
4742 unsigned PHIF : 1;
4743 unsigned OFIF : 1;
4744 unsigned : 1;
4745 unsigned : 1;
4746 unsigned : 1;
4747 unsigned : 1;
4748 };
4749
4750 struct
4751 {
4752 unsigned PWM3PRIF : 1;
4753 unsigned PWM3DCIF : 1;
4754 unsigned PWM3PHIF : 1;
4755 unsigned PWM3OFIF : 1;
4756 unsigned : 1;
4757 unsigned : 1;
4758 unsigned : 1;
4759 unsigned : 1;
4760 };
4761 } __PWM3INTFLGbits_t;
4762
4763 extern __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
4764
4765 #define _PWM3INTFLG_PRIF 0x01
4766 #define _PWM3INTFLG_PWM3PRIF 0x01
4767 #define _PWM3INTFLG_DCIF 0x02
4768 #define _PWM3INTFLG_PWM3DCIF 0x02
4769 #define _PWM3INTFLG_PHIF 0x04
4770 #define _PWM3INTFLG_PWM3PHIF 0x04
4771 #define _PWM3INTFLG_OFIF 0x08
4772 #define _PWM3INTFLG_PWM3OFIF 0x08
4773
4774 //==============================================================================
4775
4776
4777 //==============================================================================
4778 // PWM3CLKCON Bits
4779
4780 extern __at(0x0DBE) __sfr PWM3CLKCON;
4781
4782 typedef union
4783 {
4784 struct
4785 {
4786 unsigned PWM3CS0 : 1;
4787 unsigned PWM3CS1 : 1;
4788 unsigned : 1;
4789 unsigned : 1;
4790 unsigned PWM3PS0 : 1;
4791 unsigned PWM3PS1 : 1;
4792 unsigned PWM3PS2 : 1;
4793 unsigned : 1;
4794 };
4795
4796 struct
4797 {
4798 unsigned CS0 : 1;
4799 unsigned CS1 : 1;
4800 unsigned : 1;
4801 unsigned : 1;
4802 unsigned PS0 : 1;
4803 unsigned PS1 : 1;
4804 unsigned PS2 : 1;
4805 unsigned : 1;
4806 };
4807
4808 struct
4809 {
4810 unsigned CS : 2;
4811 unsigned : 6;
4812 };
4813
4814 struct
4815 {
4816 unsigned PWM3CS : 2;
4817 unsigned : 6;
4818 };
4819
4820 struct
4821 {
4822 unsigned : 4;
4823 unsigned PS : 3;
4824 unsigned : 1;
4825 };
4826
4827 struct
4828 {
4829 unsigned : 4;
4830 unsigned PWM3PS : 3;
4831 unsigned : 1;
4832 };
4833 } __PWM3CLKCONbits_t;
4834
4835 extern __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
4836
4837 #define _PWM3CLKCON_PWM3CS0 0x01
4838 #define _PWM3CLKCON_CS0 0x01
4839 #define _PWM3CLKCON_PWM3CS1 0x02
4840 #define _PWM3CLKCON_CS1 0x02
4841 #define _PWM3CLKCON_PWM3PS0 0x10
4842 #define _PWM3CLKCON_PS0 0x10
4843 #define _PWM3CLKCON_PWM3PS1 0x20
4844 #define _PWM3CLKCON_PS1 0x20
4845 #define _PWM3CLKCON_PWM3PS2 0x40
4846 #define _PWM3CLKCON_PS2 0x40
4847
4848 //==============================================================================
4849
4850
4851 //==============================================================================
4852 // PWM3LDCON Bits
4853
4854 extern __at(0x0DBF) __sfr PWM3LDCON;
4855
4856 typedef union
4857 {
4858 struct
4859 {
4860 unsigned PWM3LDS0 : 1;
4861 unsigned PWM3LDS1 : 1;
4862 unsigned : 1;
4863 unsigned : 1;
4864 unsigned : 1;
4865 unsigned : 1;
4866 unsigned LDT : 1;
4867 unsigned LDA : 1;
4868 };
4869
4870 struct
4871 {
4872 unsigned LDS0 : 1;
4873 unsigned LDS1 : 1;
4874 unsigned : 1;
4875 unsigned : 1;
4876 unsigned : 1;
4877 unsigned : 1;
4878 unsigned PWM3LDM : 1;
4879 unsigned PWM3LD : 1;
4880 };
4881
4882 struct
4883 {
4884 unsigned LDS : 2;
4885 unsigned : 6;
4886 };
4887
4888 struct
4889 {
4890 unsigned PWM3LDS : 2;
4891 unsigned : 6;
4892 };
4893 } __PWM3LDCONbits_t;
4894
4895 extern __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
4896
4897 #define _PWM3LDCON_PWM3LDS0 0x01
4898 #define _PWM3LDCON_LDS0 0x01
4899 #define _PWM3LDCON_PWM3LDS1 0x02
4900 #define _PWM3LDCON_LDS1 0x02
4901 #define _PWM3LDCON_LDT 0x40
4902 #define _PWM3LDCON_PWM3LDM 0x40
4903 #define _PWM3LDCON_LDA 0x80
4904 #define _PWM3LDCON_PWM3LD 0x80
4905
4906 //==============================================================================
4907
4908
4909 //==============================================================================
4910 // PWM3OFCON Bits
4911
4912 extern __at(0x0DC0) __sfr PWM3OFCON;
4913
4914 typedef union
4915 {
4916 struct
4917 {
4918 unsigned PWM3OFS0 : 1;
4919 unsigned PWM3OFS1 : 1;
4920 unsigned : 1;
4921 unsigned : 1;
4922 unsigned OFO : 1;
4923 unsigned PWM3OFM0 : 1;
4924 unsigned PWM3OFM1 : 1;
4925 unsigned : 1;
4926 };
4927
4928 struct
4929 {
4930 unsigned OFS0 : 1;
4931 unsigned OFS1 : 1;
4932 unsigned : 1;
4933 unsigned : 1;
4934 unsigned PWM3OFMC : 1;
4935 unsigned OFM0 : 1;
4936 unsigned OFM1 : 1;
4937 unsigned : 1;
4938 };
4939
4940 struct
4941 {
4942 unsigned PWM3OFS : 2;
4943 unsigned : 6;
4944 };
4945
4946 struct
4947 {
4948 unsigned OFS : 2;
4949 unsigned : 6;
4950 };
4951
4952 struct
4953 {
4954 unsigned : 5;
4955 unsigned PWM3OFM : 2;
4956 unsigned : 1;
4957 };
4958
4959 struct
4960 {
4961 unsigned : 5;
4962 unsigned OFM : 2;
4963 unsigned : 1;
4964 };
4965 } __PWM3OFCONbits_t;
4966
4967 extern __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
4968
4969 #define _PWM3OFCON_PWM3OFS0 0x01
4970 #define _PWM3OFCON_OFS0 0x01
4971 #define _PWM3OFCON_PWM3OFS1 0x02
4972 #define _PWM3OFCON_OFS1 0x02
4973 #define _PWM3OFCON_OFO 0x10
4974 #define _PWM3OFCON_PWM3OFMC 0x10
4975 #define _PWM3OFCON_PWM3OFM0 0x20
4976 #define _PWM3OFCON_OFM0 0x20
4977 #define _PWM3OFCON_PWM3OFM1 0x40
4978 #define _PWM3OFCON_OFM1 0x40
4979
4980 //==============================================================================
4981
4982 extern __at(0x0DC1) __sfr PWM4PH;
4983
4984 //==============================================================================
4985 // PWM4PHL Bits
4986
4987 extern __at(0x0DC1) __sfr PWM4PHL;
4988
4989 typedef struct
4990 {
4991 unsigned PWM4PHL0 : 1;
4992 unsigned PWM4PHL1 : 1;
4993 unsigned PWM4PHL2 : 1;
4994 unsigned PWM4PHL3 : 1;
4995 unsigned PWM4PHL4 : 1;
4996 unsigned PWM4PHL5 : 1;
4997 unsigned PWM4PHL6 : 1;
4998 unsigned PWM4PHL7 : 1;
4999 } __PWM4PHLbits_t;
5000
5001 extern __at(0x0DC1) volatile __PWM4PHLbits_t PWM4PHLbits;
5002
5003 #define _PWM4PHL0 0x01
5004 #define _PWM4PHL1 0x02
5005 #define _PWM4PHL2 0x04
5006 #define _PWM4PHL3 0x08
5007 #define _PWM4PHL4 0x10
5008 #define _PWM4PHL5 0x20
5009 #define _PWM4PHL6 0x40
5010 #define _PWM4PHL7 0x80
5011
5012 //==============================================================================
5013
5014
5015 //==============================================================================
5016 // PWM4PHH Bits
5017
5018 extern __at(0x0DC2) __sfr PWM4PHH;
5019
5020 typedef struct
5021 {
5022 unsigned PWM4PHH0 : 1;
5023 unsigned PWM4PHH1 : 1;
5024 unsigned PWM4PHH2 : 1;
5025 unsigned PWM4PHH3 : 1;
5026 unsigned PWM4PHH4 : 1;
5027 unsigned PWM4PHH5 : 1;
5028 unsigned PWM4PHH6 : 1;
5029 unsigned PWM4PHH7 : 1;
5030 } __PWM4PHHbits_t;
5031
5032 extern __at(0x0DC2) volatile __PWM4PHHbits_t PWM4PHHbits;
5033
5034 #define _PWM4PHH0 0x01
5035 #define _PWM4PHH1 0x02
5036 #define _PWM4PHH2 0x04
5037 #define _PWM4PHH3 0x08
5038 #define _PWM4PHH4 0x10
5039 #define _PWM4PHH5 0x20
5040 #define _PWM4PHH6 0x40
5041 #define _PWM4PHH7 0x80
5042
5043 //==============================================================================
5044
5045 extern __at(0x0DC3) __sfr PWM4DC;
5046
5047 //==============================================================================
5048 // PWM4DCL Bits
5049
5050 extern __at(0x0DC3) __sfr PWM4DCL;
5051
5052 typedef struct
5053 {
5054 unsigned PWM4DCL0 : 1;
5055 unsigned PWM4DCL1 : 1;
5056 unsigned PWM4DCL2 : 1;
5057 unsigned PWM4DCL3 : 1;
5058 unsigned PWM4DCL4 : 1;
5059 unsigned PWM4DCL5 : 1;
5060 unsigned PWM4DCL6 : 1;
5061 unsigned PWM4DCL7 : 1;
5062 } __PWM4DCLbits_t;
5063
5064 extern __at(0x0DC3) volatile __PWM4DCLbits_t PWM4DCLbits;
5065
5066 #define _PWM4DCL0 0x01
5067 #define _PWM4DCL1 0x02
5068 #define _PWM4DCL2 0x04
5069 #define _PWM4DCL3 0x08
5070 #define _PWM4DCL4 0x10
5071 #define _PWM4DCL5 0x20
5072 #define _PWM4DCL6 0x40
5073 #define _PWM4DCL7 0x80
5074
5075 //==============================================================================
5076
5077
5078 //==============================================================================
5079 // PWM4DCH Bits
5080
5081 extern __at(0x0DC4) __sfr PWM4DCH;
5082
5083 typedef struct
5084 {
5085 unsigned PWM4DCH0 : 1;
5086 unsigned PWM4DCH1 : 1;
5087 unsigned PWM4DCH2 : 1;
5088 unsigned PWM4DCH3 : 1;
5089 unsigned PWM4DCH4 : 1;
5090 unsigned PWM4DCH5 : 1;
5091 unsigned PWM4DCH6 : 1;
5092 unsigned PWM4DCH7 : 1;
5093 } __PWM4DCHbits_t;
5094
5095 extern __at(0x0DC4) volatile __PWM4DCHbits_t PWM4DCHbits;
5096
5097 #define _PWM4DCH0 0x01
5098 #define _PWM4DCH1 0x02
5099 #define _PWM4DCH2 0x04
5100 #define _PWM4DCH3 0x08
5101 #define _PWM4DCH4 0x10
5102 #define _PWM4DCH5 0x20
5103 #define _PWM4DCH6 0x40
5104 #define _PWM4DCH7 0x80
5105
5106 //==============================================================================
5107
5108 extern __at(0x0DC5) __sfr PWM4PR;
5109
5110 //==============================================================================
5111 // PWM4PRL Bits
5112
5113 extern __at(0x0DC5) __sfr PWM4PRL;
5114
5115 typedef struct
5116 {
5117 unsigned PWM4PRL0 : 1;
5118 unsigned PWM4PRL1 : 1;
5119 unsigned PWM4PRL2 : 1;
5120 unsigned PWM4PRL3 : 1;
5121 unsigned PWM4PRL4 : 1;
5122 unsigned PWM4PRL5 : 1;
5123 unsigned PWM4PRL6 : 1;
5124 unsigned PWM4PRL7 : 1;
5125 } __PWM4PRLbits_t;
5126
5127 extern __at(0x0DC5) volatile __PWM4PRLbits_t PWM4PRLbits;
5128
5129 #define _PWM4PRL0 0x01
5130 #define _PWM4PRL1 0x02
5131 #define _PWM4PRL2 0x04
5132 #define _PWM4PRL3 0x08
5133 #define _PWM4PRL4 0x10
5134 #define _PWM4PRL5 0x20
5135 #define _PWM4PRL6 0x40
5136 #define _PWM4PRL7 0x80
5137
5138 //==============================================================================
5139
5140
5141 //==============================================================================
5142 // PWM4PRH Bits
5143
5144 extern __at(0x0DC6) __sfr PWM4PRH;
5145
5146 typedef struct
5147 {
5148 unsigned PWM4PRH0 : 1;
5149 unsigned PWM4PRH1 : 1;
5150 unsigned PWM4PRH2 : 1;
5151 unsigned PWM4PRH3 : 1;
5152 unsigned PWM4PRH4 : 1;
5153 unsigned PWM4PRH5 : 1;
5154 unsigned PWM4PRH6 : 1;
5155 unsigned PWM4PRH7 : 1;
5156 } __PWM4PRHbits_t;
5157
5158 extern __at(0x0DC6) volatile __PWM4PRHbits_t PWM4PRHbits;
5159
5160 #define _PWM4PRH0 0x01
5161 #define _PWM4PRH1 0x02
5162 #define _PWM4PRH2 0x04
5163 #define _PWM4PRH3 0x08
5164 #define _PWM4PRH4 0x10
5165 #define _PWM4PRH5 0x20
5166 #define _PWM4PRH6 0x40
5167 #define _PWM4PRH7 0x80
5168
5169 //==============================================================================
5170
5171 extern __at(0x0DC7) __sfr PWM4OF;
5172
5173 //==============================================================================
5174 // PWM4OFL Bits
5175
5176 extern __at(0x0DC7) __sfr PWM4OFL;
5177
5178 typedef struct
5179 {
5180 unsigned PWM4OFL0 : 1;
5181 unsigned PWM4OFL1 : 1;
5182 unsigned PWM4OFL2 : 1;
5183 unsigned PWM4OFL3 : 1;
5184 unsigned PWM4OFL4 : 1;
5185 unsigned PWM4OFL5 : 1;
5186 unsigned PWM4OFL6 : 1;
5187 unsigned PWM4OFL7 : 1;
5188 } __PWM4OFLbits_t;
5189
5190 extern __at(0x0DC7) volatile __PWM4OFLbits_t PWM4OFLbits;
5191
5192 #define _PWM4OFL0 0x01
5193 #define _PWM4OFL1 0x02
5194 #define _PWM4OFL2 0x04
5195 #define _PWM4OFL3 0x08
5196 #define _PWM4OFL4 0x10
5197 #define _PWM4OFL5 0x20
5198 #define _PWM4OFL6 0x40
5199 #define _PWM4OFL7 0x80
5200
5201 //==============================================================================
5202
5203
5204 //==============================================================================
5205 // PWM4OFH Bits
5206
5207 extern __at(0x0DC8) __sfr PWM4OFH;
5208
5209 typedef struct
5210 {
5211 unsigned PWM4OFH0 : 1;
5212 unsigned PWM4OFH1 : 1;
5213 unsigned PWM4OFH2 : 1;
5214 unsigned PWM4OFH3 : 1;
5215 unsigned PWM4OFH4 : 1;
5216 unsigned PWM4OFH5 : 1;
5217 unsigned PWM4OFH6 : 1;
5218 unsigned PWM4OFH7 : 1;
5219 } __PWM4OFHbits_t;
5220
5221 extern __at(0x0DC8) volatile __PWM4OFHbits_t PWM4OFHbits;
5222
5223 #define _PWM4OFH0 0x01
5224 #define _PWM4OFH1 0x02
5225 #define _PWM4OFH2 0x04
5226 #define _PWM4OFH3 0x08
5227 #define _PWM4OFH4 0x10
5228 #define _PWM4OFH5 0x20
5229 #define _PWM4OFH6 0x40
5230 #define _PWM4OFH7 0x80
5231
5232 //==============================================================================
5233
5234 extern __at(0x0DC9) __sfr PWM4TMR;
5235
5236 //==============================================================================
5237 // PWM4TMRL Bits
5238
5239 extern __at(0x0DC9) __sfr PWM4TMRL;
5240
5241 typedef struct
5242 {
5243 unsigned PWM4TMRL0 : 1;
5244 unsigned PWM4TMRL1 : 1;
5245 unsigned PWM4TMRL2 : 1;
5246 unsigned PWM4TMRL3 : 1;
5247 unsigned PWM4TMRL4 : 1;
5248 unsigned PWM4TMRL5 : 1;
5249 unsigned PWM4TMRL6 : 1;
5250 unsigned PWM4TMRL7 : 1;
5251 } __PWM4TMRLbits_t;
5252
5253 extern __at(0x0DC9) volatile __PWM4TMRLbits_t PWM4TMRLbits;
5254
5255 #define _PWM4TMRL0 0x01
5256 #define _PWM4TMRL1 0x02
5257 #define _PWM4TMRL2 0x04
5258 #define _PWM4TMRL3 0x08
5259 #define _PWM4TMRL4 0x10
5260 #define _PWM4TMRL5 0x20
5261 #define _PWM4TMRL6 0x40
5262 #define _PWM4TMRL7 0x80
5263
5264 //==============================================================================
5265
5266
5267 //==============================================================================
5268 // PWM4TMRH Bits
5269
5270 extern __at(0x0DCA) __sfr PWM4TMRH;
5271
5272 typedef struct
5273 {
5274 unsigned PWM4TMRH0 : 1;
5275 unsigned PWM4TMRH1 : 1;
5276 unsigned PWM4TMRH2 : 1;
5277 unsigned PWM4TMRH3 : 1;
5278 unsigned PWM4TMRH4 : 1;
5279 unsigned PWM4TMRH5 : 1;
5280 unsigned PWM4TMRH6 : 1;
5281 unsigned PWM4TMRH7 : 1;
5282 } __PWM4TMRHbits_t;
5283
5284 extern __at(0x0DCA) volatile __PWM4TMRHbits_t PWM4TMRHbits;
5285
5286 #define _PWM4TMRH0 0x01
5287 #define _PWM4TMRH1 0x02
5288 #define _PWM4TMRH2 0x04
5289 #define _PWM4TMRH3 0x08
5290 #define _PWM4TMRH4 0x10
5291 #define _PWM4TMRH5 0x20
5292 #define _PWM4TMRH6 0x40
5293 #define _PWM4TMRH7 0x80
5294
5295 //==============================================================================
5296
5297
5298 //==============================================================================
5299 // PWM4CON Bits
5300
5301 extern __at(0x0DCB) __sfr PWM4CON;
5302
5303 typedef union
5304 {
5305 struct
5306 {
5307 unsigned : 1;
5308 unsigned : 1;
5309 unsigned PWM4MODE0 : 1;
5310 unsigned PWM4MODE1 : 1;
5311 unsigned POL : 1;
5312 unsigned OUT : 1;
5313 unsigned OE : 1;
5314 unsigned EN : 1;
5315 };
5316
5317 struct
5318 {
5319 unsigned : 1;
5320 unsigned : 1;
5321 unsigned MODE0 : 1;
5322 unsigned MODE1 : 1;
5323 unsigned PWM4POL : 1;
5324 unsigned PWM4OUT : 1;
5325 unsigned PWM4OE : 1;
5326 unsigned PWM4EN : 1;
5327 };
5328
5329 struct
5330 {
5331 unsigned : 2;
5332 unsigned MODE : 2;
5333 unsigned : 4;
5334 };
5335
5336 struct
5337 {
5338 unsigned : 2;
5339 unsigned PWM4MODE : 2;
5340 unsigned : 4;
5341 };
5342 } __PWM4CONbits_t;
5343
5344 extern __at(0x0DCB) volatile __PWM4CONbits_t PWM4CONbits;
5345
5346 #define _PWM4CON_PWM4MODE0 0x04
5347 #define _PWM4CON_MODE0 0x04
5348 #define _PWM4CON_PWM4MODE1 0x08
5349 #define _PWM4CON_MODE1 0x08
5350 #define _PWM4CON_POL 0x10
5351 #define _PWM4CON_PWM4POL 0x10
5352 #define _PWM4CON_OUT 0x20
5353 #define _PWM4CON_PWM4OUT 0x20
5354 #define _PWM4CON_OE 0x40
5355 #define _PWM4CON_PWM4OE 0x40
5356 #define _PWM4CON_EN 0x80
5357 #define _PWM4CON_PWM4EN 0x80
5358
5359 //==============================================================================
5360
5361
5362 //==============================================================================
5363 // PWM4INTCON Bits
5364
5365 extern __at(0x0DCC) __sfr PWM4INTCON;
5366
5367 typedef union
5368 {
5369 struct
5370 {
5371 unsigned PRIE : 1;
5372 unsigned DCIE : 1;
5373 unsigned PHIE : 1;
5374 unsigned OFIE : 1;
5375 unsigned : 1;
5376 unsigned : 1;
5377 unsigned : 1;
5378 unsigned : 1;
5379 };
5380
5381 struct
5382 {
5383 unsigned PWM4PRIE : 1;
5384 unsigned PWM4DCIE : 1;
5385 unsigned PWM4PHIE : 1;
5386 unsigned PWM4OFIE : 1;
5387 unsigned : 1;
5388 unsigned : 1;
5389 unsigned : 1;
5390 unsigned : 1;
5391 };
5392 } __PWM4INTCONbits_t;
5393
5394 extern __at(0x0DCC) volatile __PWM4INTCONbits_t PWM4INTCONbits;
5395
5396 #define _PWM4INTCON_PRIE 0x01
5397 #define _PWM4INTCON_PWM4PRIE 0x01
5398 #define _PWM4INTCON_DCIE 0x02
5399 #define _PWM4INTCON_PWM4DCIE 0x02
5400 #define _PWM4INTCON_PHIE 0x04
5401 #define _PWM4INTCON_PWM4PHIE 0x04
5402 #define _PWM4INTCON_OFIE 0x08
5403 #define _PWM4INTCON_PWM4OFIE 0x08
5404
5405 //==============================================================================
5406
5407
5408 //==============================================================================
5409 // PWM4INTE Bits
5410
5411 extern __at(0x0DCC) __sfr PWM4INTE;
5412
5413 typedef union
5414 {
5415 struct
5416 {
5417 unsigned PRIE : 1;
5418 unsigned DCIE : 1;
5419 unsigned PHIE : 1;
5420 unsigned OFIE : 1;
5421 unsigned : 1;
5422 unsigned : 1;
5423 unsigned : 1;
5424 unsigned : 1;
5425 };
5426
5427 struct
5428 {
5429 unsigned PWM4PRIE : 1;
5430 unsigned PWM4DCIE : 1;
5431 unsigned PWM4PHIE : 1;
5432 unsigned PWM4OFIE : 1;
5433 unsigned : 1;
5434 unsigned : 1;
5435 unsigned : 1;
5436 unsigned : 1;
5437 };
5438 } __PWM4INTEbits_t;
5439
5440 extern __at(0x0DCC) volatile __PWM4INTEbits_t PWM4INTEbits;
5441
5442 #define _PWM4INTE_PRIE 0x01
5443 #define _PWM4INTE_PWM4PRIE 0x01
5444 #define _PWM4INTE_DCIE 0x02
5445 #define _PWM4INTE_PWM4DCIE 0x02
5446 #define _PWM4INTE_PHIE 0x04
5447 #define _PWM4INTE_PWM4PHIE 0x04
5448 #define _PWM4INTE_OFIE 0x08
5449 #define _PWM4INTE_PWM4OFIE 0x08
5450
5451 //==============================================================================
5452
5453
5454 //==============================================================================
5455 // PWM4INTF Bits
5456
5457 extern __at(0x0DCD) __sfr PWM4INTF;
5458
5459 typedef union
5460 {
5461 struct
5462 {
5463 unsigned PRIF : 1;
5464 unsigned DCIF : 1;
5465 unsigned PHIF : 1;
5466 unsigned OFIF : 1;
5467 unsigned : 1;
5468 unsigned : 1;
5469 unsigned : 1;
5470 unsigned : 1;
5471 };
5472
5473 struct
5474 {
5475 unsigned PWM4PRIF : 1;
5476 unsigned PWM4DCIF : 1;
5477 unsigned PWM4PHIF : 1;
5478 unsigned PWM4OFIF : 1;
5479 unsigned : 1;
5480 unsigned : 1;
5481 unsigned : 1;
5482 unsigned : 1;
5483 };
5484 } __PWM4INTFbits_t;
5485
5486 extern __at(0x0DCD) volatile __PWM4INTFbits_t PWM4INTFbits;
5487
5488 #define _PWM4INTF_PRIF 0x01
5489 #define _PWM4INTF_PWM4PRIF 0x01
5490 #define _PWM4INTF_DCIF 0x02
5491 #define _PWM4INTF_PWM4DCIF 0x02
5492 #define _PWM4INTF_PHIF 0x04
5493 #define _PWM4INTF_PWM4PHIF 0x04
5494 #define _PWM4INTF_OFIF 0x08
5495 #define _PWM4INTF_PWM4OFIF 0x08
5496
5497 //==============================================================================
5498
5499
5500 //==============================================================================
5501 // PWM4INTFLG Bits
5502
5503 extern __at(0x0DCD) __sfr PWM4INTFLG;
5504
5505 typedef union
5506 {
5507 struct
5508 {
5509 unsigned PRIF : 1;
5510 unsigned DCIF : 1;
5511 unsigned PHIF : 1;
5512 unsigned OFIF : 1;
5513 unsigned : 1;
5514 unsigned : 1;
5515 unsigned : 1;
5516 unsigned : 1;
5517 };
5518
5519 struct
5520 {
5521 unsigned PWM4PRIF : 1;
5522 unsigned PWM4DCIF : 1;
5523 unsigned PWM4PHIF : 1;
5524 unsigned PWM4OFIF : 1;
5525 unsigned : 1;
5526 unsigned : 1;
5527 unsigned : 1;
5528 unsigned : 1;
5529 };
5530 } __PWM4INTFLGbits_t;
5531
5532 extern __at(0x0DCD) volatile __PWM4INTFLGbits_t PWM4INTFLGbits;
5533
5534 #define _PWM4INTFLG_PRIF 0x01
5535 #define _PWM4INTFLG_PWM4PRIF 0x01
5536 #define _PWM4INTFLG_DCIF 0x02
5537 #define _PWM4INTFLG_PWM4DCIF 0x02
5538 #define _PWM4INTFLG_PHIF 0x04
5539 #define _PWM4INTFLG_PWM4PHIF 0x04
5540 #define _PWM4INTFLG_OFIF 0x08
5541 #define _PWM4INTFLG_PWM4OFIF 0x08
5542
5543 //==============================================================================
5544
5545
5546 //==============================================================================
5547 // PWM4CLKCON Bits
5548
5549 extern __at(0x0DCE) __sfr PWM4CLKCON;
5550
5551 typedef union
5552 {
5553 struct
5554 {
5555 unsigned PWM4CS0 : 1;
5556 unsigned PWM4CS1 : 1;
5557 unsigned : 1;
5558 unsigned : 1;
5559 unsigned PWM4PS0 : 1;
5560 unsigned PWM4PS1 : 1;
5561 unsigned PWM4PS2 : 1;
5562 unsigned : 1;
5563 };
5564
5565 struct
5566 {
5567 unsigned CS0 : 1;
5568 unsigned CS1 : 1;
5569 unsigned : 1;
5570 unsigned : 1;
5571 unsigned PS0 : 1;
5572 unsigned PS1 : 1;
5573 unsigned PS2 : 1;
5574 unsigned : 1;
5575 };
5576
5577 struct
5578 {
5579 unsigned CS : 2;
5580 unsigned : 6;
5581 };
5582
5583 struct
5584 {
5585 unsigned PWM4CS : 2;
5586 unsigned : 6;
5587 };
5588
5589 struct
5590 {
5591 unsigned : 4;
5592 unsigned PS : 3;
5593 unsigned : 1;
5594 };
5595
5596 struct
5597 {
5598 unsigned : 4;
5599 unsigned PWM4PS : 3;
5600 unsigned : 1;
5601 };
5602 } __PWM4CLKCONbits_t;
5603
5604 extern __at(0x0DCE) volatile __PWM4CLKCONbits_t PWM4CLKCONbits;
5605
5606 #define _PWM4CLKCON_PWM4CS0 0x01
5607 #define _PWM4CLKCON_CS0 0x01
5608 #define _PWM4CLKCON_PWM4CS1 0x02
5609 #define _PWM4CLKCON_CS1 0x02
5610 #define _PWM4CLKCON_PWM4PS0 0x10
5611 #define _PWM4CLKCON_PS0 0x10
5612 #define _PWM4CLKCON_PWM4PS1 0x20
5613 #define _PWM4CLKCON_PS1 0x20
5614 #define _PWM4CLKCON_PWM4PS2 0x40
5615 #define _PWM4CLKCON_PS2 0x40
5616
5617 //==============================================================================
5618
5619
5620 //==============================================================================
5621 // PWM4LDCON Bits
5622
5623 extern __at(0x0DCF) __sfr PWM4LDCON;
5624
5625 typedef union
5626 {
5627 struct
5628 {
5629 unsigned PWM4LDS0 : 1;
5630 unsigned PWM4LDS1 : 1;
5631 unsigned : 1;
5632 unsigned : 1;
5633 unsigned : 1;
5634 unsigned : 1;
5635 unsigned LDT : 1;
5636 unsigned LDA : 1;
5637 };
5638
5639 struct
5640 {
5641 unsigned LDS0 : 1;
5642 unsigned LDS1 : 1;
5643 unsigned : 1;
5644 unsigned : 1;
5645 unsigned : 1;
5646 unsigned : 1;
5647 unsigned PWM4LDM : 1;
5648 unsigned PWM4LD : 1;
5649 };
5650
5651 struct
5652 {
5653 unsigned LDS : 2;
5654 unsigned : 6;
5655 };
5656
5657 struct
5658 {
5659 unsigned PWM4LDS : 2;
5660 unsigned : 6;
5661 };
5662 } __PWM4LDCONbits_t;
5663
5664 extern __at(0x0DCF) volatile __PWM4LDCONbits_t PWM4LDCONbits;
5665
5666 #define _PWM4LDCON_PWM4LDS0 0x01
5667 #define _PWM4LDCON_LDS0 0x01
5668 #define _PWM4LDCON_PWM4LDS1 0x02
5669 #define _PWM4LDCON_LDS1 0x02
5670 #define _PWM4LDCON_LDT 0x40
5671 #define _PWM4LDCON_PWM4LDM 0x40
5672 #define _PWM4LDCON_LDA 0x80
5673 #define _PWM4LDCON_PWM4LD 0x80
5674
5675 //==============================================================================
5676
5677
5678 //==============================================================================
5679 // PWM4OFCON Bits
5680
5681 extern __at(0x0DD0) __sfr PWM4OFCON;
5682
5683 typedef union
5684 {
5685 struct
5686 {
5687 unsigned PWM4OFS0 : 1;
5688 unsigned PWM4OFS1 : 1;
5689 unsigned : 1;
5690 unsigned : 1;
5691 unsigned OFO : 1;
5692 unsigned PWM4OFM0 : 1;
5693 unsigned PWM4OFM1 : 1;
5694 unsigned : 1;
5695 };
5696
5697 struct
5698 {
5699 unsigned OFS0 : 1;
5700 unsigned OFS1 : 1;
5701 unsigned : 1;
5702 unsigned : 1;
5703 unsigned PWM4OFMC : 1;
5704 unsigned OFM0 : 1;
5705 unsigned OFM1 : 1;
5706 unsigned : 1;
5707 };
5708
5709 struct
5710 {
5711 unsigned OFS : 2;
5712 unsigned : 6;
5713 };
5714
5715 struct
5716 {
5717 unsigned PWM4OFS : 2;
5718 unsigned : 6;
5719 };
5720
5721 struct
5722 {
5723 unsigned : 5;
5724 unsigned OFM : 2;
5725 unsigned : 1;
5726 };
5727
5728 struct
5729 {
5730 unsigned : 5;
5731 unsigned PWM4OFM : 2;
5732 unsigned : 1;
5733 };
5734 } __PWM4OFCONbits_t;
5735
5736 extern __at(0x0DD0) volatile __PWM4OFCONbits_t PWM4OFCONbits;
5737
5738 #define _PWM4OFCON_PWM4OFS0 0x01
5739 #define _PWM4OFCON_OFS0 0x01
5740 #define _PWM4OFCON_PWM4OFS1 0x02
5741 #define _PWM4OFCON_OFS1 0x02
5742 #define _PWM4OFCON_OFO 0x10
5743 #define _PWM4OFCON_PWM4OFMC 0x10
5744 #define _PWM4OFCON_PWM4OFM0 0x20
5745 #define _PWM4OFCON_OFM0 0x20
5746 #define _PWM4OFCON_PWM4OFM1 0x40
5747 #define _PWM4OFCON_OFM1 0x40
5748
5749 //==============================================================================
5750
5751
5752 //==============================================================================
5753 // PPSLOCK Bits
5754
5755 extern __at(0x0E0F) __sfr PPSLOCK;
5756
5757 typedef struct
5758 {
5759 unsigned PPSLOCKED : 1;
5760 unsigned : 1;
5761 unsigned : 1;
5762 unsigned : 1;
5763 unsigned : 1;
5764 unsigned : 1;
5765 unsigned : 1;
5766 unsigned : 1;
5767 } __PPSLOCKbits_t;
5768
5769 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits;
5770
5771 #define _PPSLOCKED 0x01
5772
5773 //==============================================================================
5774
5775
5776 //==============================================================================
5777 // INTPPS Bits
5778
5779 extern __at(0x0E10) __sfr INTPPS;
5780
5781 typedef union
5782 {
5783 struct
5784 {
5785 unsigned INTPPS0 : 1;
5786 unsigned INTPPS1 : 1;
5787 unsigned INTPPS2 : 1;
5788 unsigned INTPPS3 : 1;
5789 unsigned INTPPS4 : 1;
5790 unsigned : 1;
5791 unsigned : 1;
5792 unsigned : 1;
5793 };
5794
5795 struct
5796 {
5797 unsigned INTPPS : 5;
5798 unsigned : 3;
5799 };
5800 } __INTPPSbits_t;
5801
5802 extern __at(0x0E10) volatile __INTPPSbits_t INTPPSbits;
5803
5804 #define _INTPPS0 0x01
5805 #define _INTPPS1 0x02
5806 #define _INTPPS2 0x04
5807 #define _INTPPS3 0x08
5808 #define _INTPPS4 0x10
5809
5810 //==============================================================================
5811
5812
5813 //==============================================================================
5814 // T0CKIPPS Bits
5815
5816 extern __at(0x0E11) __sfr T0CKIPPS;
5817
5818 typedef union
5819 {
5820 struct
5821 {
5822 unsigned T0CKIPPS0 : 1;
5823 unsigned T0CKIPPS1 : 1;
5824 unsigned T0CKIPPS2 : 1;
5825 unsigned T0CKIPPS3 : 1;
5826 unsigned T0CKIPPS4 : 1;
5827 unsigned : 1;
5828 unsigned : 1;
5829 unsigned : 1;
5830 };
5831
5832 struct
5833 {
5834 unsigned T0CKIPPS : 5;
5835 unsigned : 3;
5836 };
5837 } __T0CKIPPSbits_t;
5838
5839 extern __at(0x0E11) volatile __T0CKIPPSbits_t T0CKIPPSbits;
5840
5841 #define _T0CKIPPS0 0x01
5842 #define _T0CKIPPS1 0x02
5843 #define _T0CKIPPS2 0x04
5844 #define _T0CKIPPS3 0x08
5845 #define _T0CKIPPS4 0x10
5846
5847 //==============================================================================
5848
5849
5850 //==============================================================================
5851 // T1CKIPPS Bits
5852
5853 extern __at(0x0E12) __sfr T1CKIPPS;
5854
5855 typedef union
5856 {
5857 struct
5858 {
5859 unsigned T1CKIPPS0 : 1;
5860 unsigned T1CKIPPS1 : 1;
5861 unsigned T1CKIPPS2 : 1;
5862 unsigned T1CKIPPS3 : 1;
5863 unsigned T1CKIPPS4 : 1;
5864 unsigned : 1;
5865 unsigned : 1;
5866 unsigned : 1;
5867 };
5868
5869 struct
5870 {
5871 unsigned T1CKIPPS : 5;
5872 unsigned : 3;
5873 };
5874 } __T1CKIPPSbits_t;
5875
5876 extern __at(0x0E12) volatile __T1CKIPPSbits_t T1CKIPPSbits;
5877
5878 #define _T1CKIPPS0 0x01
5879 #define _T1CKIPPS1 0x02
5880 #define _T1CKIPPS2 0x04
5881 #define _T1CKIPPS3 0x08
5882 #define _T1CKIPPS4 0x10
5883
5884 //==============================================================================
5885
5886
5887 //==============================================================================
5888 // T1GPPS Bits
5889
5890 extern __at(0x0E13) __sfr T1GPPS;
5891
5892 typedef union
5893 {
5894 struct
5895 {
5896 unsigned T1GPPS0 : 1;
5897 unsigned T1GPPS1 : 1;
5898 unsigned T1GPPS2 : 1;
5899 unsigned T1GPPS3 : 1;
5900 unsigned T1GPPS4 : 1;
5901 unsigned : 1;
5902 unsigned : 1;
5903 unsigned : 1;
5904 };
5905
5906 struct
5907 {
5908 unsigned T1GPPS : 5;
5909 unsigned : 3;
5910 };
5911 } __T1GPPSbits_t;
5912
5913 extern __at(0x0E13) volatile __T1GPPSbits_t T1GPPSbits;
5914
5915 #define _T1GPPS0 0x01
5916 #define _T1GPPS1 0x02
5917 #define _T1GPPS2 0x04
5918 #define _T1GPPS3 0x08
5919 #define _T1GPPS4 0x10
5920
5921 //==============================================================================
5922
5923
5924 //==============================================================================
5925 // CWG1INPPS Bits
5926
5927 extern __at(0x0E14) __sfr CWG1INPPS;
5928
5929 typedef union
5930 {
5931 struct
5932 {
5933 unsigned CWG1INPPS0 : 1;
5934 unsigned CWG1INPPS1 : 1;
5935 unsigned CWG1INPPS2 : 1;
5936 unsigned CWG1INPPS3 : 1;
5937 unsigned CWG1INPPS4 : 1;
5938 unsigned : 1;
5939 unsigned : 1;
5940 unsigned : 1;
5941 };
5942
5943 struct
5944 {
5945 unsigned CWG1INPPS : 5;
5946 unsigned : 3;
5947 };
5948 } __CWG1INPPSbits_t;
5949
5950 extern __at(0x0E14) volatile __CWG1INPPSbits_t CWG1INPPSbits;
5951
5952 #define _CWG1INPPS0 0x01
5953 #define _CWG1INPPS1 0x02
5954 #define _CWG1INPPS2 0x04
5955 #define _CWG1INPPS3 0x08
5956 #define _CWG1INPPS4 0x10
5957
5958 //==============================================================================
5959
5960
5961 //==============================================================================
5962 // RXPPS Bits
5963
5964 extern __at(0x0E15) __sfr RXPPS;
5965
5966 typedef union
5967 {
5968 struct
5969 {
5970 unsigned RXPPS0 : 1;
5971 unsigned RXPPS1 : 1;
5972 unsigned RXPPS2 : 1;
5973 unsigned RXPPS3 : 1;
5974 unsigned RXPPS4 : 1;
5975 unsigned : 1;
5976 unsigned : 1;
5977 unsigned : 1;
5978 };
5979
5980 struct
5981 {
5982 unsigned RXPPS : 5;
5983 unsigned : 3;
5984 };
5985 } __RXPPSbits_t;
5986
5987 extern __at(0x0E15) volatile __RXPPSbits_t RXPPSbits;
5988
5989 #define _RXPPS0 0x01
5990 #define _RXPPS1 0x02
5991 #define _RXPPS2 0x04
5992 #define _RXPPS3 0x08
5993 #define _RXPPS4 0x10
5994
5995 //==============================================================================
5996
5997
5998 //==============================================================================
5999 // CKPPS Bits
6000
6001 extern __at(0x0E16) __sfr CKPPS;
6002
6003 typedef union
6004 {
6005 struct
6006 {
6007 unsigned CKPPS0 : 1;
6008 unsigned CKPPS1 : 1;
6009 unsigned CKPPS2 : 1;
6010 unsigned CKPPS3 : 1;
6011 unsigned CKPPS4 : 1;
6012 unsigned : 1;
6013 unsigned : 1;
6014 unsigned : 1;
6015 };
6016
6017 struct
6018 {
6019 unsigned CKPPS : 5;
6020 unsigned : 3;
6021 };
6022 } __CKPPSbits_t;
6023
6024 extern __at(0x0E16) volatile __CKPPSbits_t CKPPSbits;
6025
6026 #define _CKPPS0 0x01
6027 #define _CKPPS1 0x02
6028 #define _CKPPS2 0x04
6029 #define _CKPPS3 0x08
6030 #define _CKPPS4 0x10
6031
6032 //==============================================================================
6033
6034
6035 //==============================================================================
6036 // ADCACTPPS Bits
6037
6038 extern __at(0x0E17) __sfr ADCACTPPS;
6039
6040 typedef union
6041 {
6042 struct
6043 {
6044 unsigned ADCACTPPS0 : 1;
6045 unsigned ADCACTPPS1 : 1;
6046 unsigned ADCACTPPS2 : 1;
6047 unsigned ADCACTPPS3 : 1;
6048 unsigned ADCACTPPS4 : 1;
6049 unsigned : 1;
6050 unsigned : 1;
6051 unsigned : 1;
6052 };
6053
6054 struct
6055 {
6056 unsigned ADCACTPPS : 5;
6057 unsigned : 3;
6058 };
6059 } __ADCACTPPSbits_t;
6060
6061 extern __at(0x0E17) volatile __ADCACTPPSbits_t ADCACTPPSbits;
6062
6063 #define _ADCACTPPS0 0x01
6064 #define _ADCACTPPS1 0x02
6065 #define _ADCACTPPS2 0x04
6066 #define _ADCACTPPS3 0x08
6067 #define _ADCACTPPS4 0x10
6068
6069 //==============================================================================
6070
6071
6072 //==============================================================================
6073 // RA0PPS Bits
6074
6075 extern __at(0x0E90) __sfr RA0PPS;
6076
6077 typedef union
6078 {
6079 struct
6080 {
6081 unsigned RA0PPS0 : 1;
6082 unsigned RA0PPS1 : 1;
6083 unsigned RA0PPS2 : 1;
6084 unsigned RA0PPS3 : 1;
6085 unsigned : 1;
6086 unsigned : 1;
6087 unsigned : 1;
6088 unsigned : 1;
6089 };
6090
6091 struct
6092 {
6093 unsigned RA0PPS : 4;
6094 unsigned : 4;
6095 };
6096 } __RA0PPSbits_t;
6097
6098 extern __at(0x0E90) volatile __RA0PPSbits_t RA0PPSbits;
6099
6100 #define _RA0PPS0 0x01
6101 #define _RA0PPS1 0x02
6102 #define _RA0PPS2 0x04
6103 #define _RA0PPS3 0x08
6104
6105 //==============================================================================
6106
6107
6108 //==============================================================================
6109 // RA1PPS Bits
6110
6111 extern __at(0x0E91) __sfr RA1PPS;
6112
6113 typedef union
6114 {
6115 struct
6116 {
6117 unsigned RA1PPS0 : 1;
6118 unsigned RA1PPS1 : 1;
6119 unsigned RA1PPS2 : 1;
6120 unsigned RA1PPS3 : 1;
6121 unsigned : 1;
6122 unsigned : 1;
6123 unsigned : 1;
6124 unsigned : 1;
6125 };
6126
6127 struct
6128 {
6129 unsigned RA1PPS : 4;
6130 unsigned : 4;
6131 };
6132 } __RA1PPSbits_t;
6133
6134 extern __at(0x0E91) volatile __RA1PPSbits_t RA1PPSbits;
6135
6136 #define _RA1PPS0 0x01
6137 #define _RA1PPS1 0x02
6138 #define _RA1PPS2 0x04
6139 #define _RA1PPS3 0x08
6140
6141 //==============================================================================
6142
6143
6144 //==============================================================================
6145 // RA2PPS Bits
6146
6147 extern __at(0x0E92) __sfr RA2PPS;
6148
6149 typedef union
6150 {
6151 struct
6152 {
6153 unsigned RA2PPS0 : 1;
6154 unsigned RA2PPS1 : 1;
6155 unsigned RA2PPS2 : 1;
6156 unsigned RA2PPS3 : 1;
6157 unsigned : 1;
6158 unsigned : 1;
6159 unsigned : 1;
6160 unsigned : 1;
6161 };
6162
6163 struct
6164 {
6165 unsigned RA2PPS : 4;
6166 unsigned : 4;
6167 };
6168 } __RA2PPSbits_t;
6169
6170 extern __at(0x0E92) volatile __RA2PPSbits_t RA2PPSbits;
6171
6172 #define _RA2PPS0 0x01
6173 #define _RA2PPS1 0x02
6174 #define _RA2PPS2 0x04
6175 #define _RA2PPS3 0x08
6176
6177 //==============================================================================
6178
6179
6180 //==============================================================================
6181 // RA4PPS Bits
6182
6183 extern __at(0x0E94) __sfr RA4PPS;
6184
6185 typedef union
6186 {
6187 struct
6188 {
6189 unsigned RA4PPS0 : 1;
6190 unsigned RA4PPS1 : 1;
6191 unsigned RA4PPS2 : 1;
6192 unsigned RA4PPS3 : 1;
6193 unsigned : 1;
6194 unsigned : 1;
6195 unsigned : 1;
6196 unsigned : 1;
6197 };
6198
6199 struct
6200 {
6201 unsigned RA4PPS : 4;
6202 unsigned : 4;
6203 };
6204 } __RA4PPSbits_t;
6205
6206 extern __at(0x0E94) volatile __RA4PPSbits_t RA4PPSbits;
6207
6208 #define _RA4PPS0 0x01
6209 #define _RA4PPS1 0x02
6210 #define _RA4PPS2 0x04
6211 #define _RA4PPS3 0x08
6212
6213 //==============================================================================
6214
6215
6216 //==============================================================================
6217 // RA5PPS Bits
6218
6219 extern __at(0x0E95) __sfr RA5PPS;
6220
6221 typedef union
6222 {
6223 struct
6224 {
6225 unsigned RA5PPS0 : 1;
6226 unsigned RA5PPS1 : 1;
6227 unsigned RA5PPS2 : 1;
6228 unsigned RA5PPS3 : 1;
6229 unsigned : 1;
6230 unsigned : 1;
6231 unsigned : 1;
6232 unsigned : 1;
6233 };
6234
6235 struct
6236 {
6237 unsigned RA5PPS : 4;
6238 unsigned : 4;
6239 };
6240 } __RA5PPSbits_t;
6241
6242 extern __at(0x0E95) volatile __RA5PPSbits_t RA5PPSbits;
6243
6244 #define _RA5PPS0 0x01
6245 #define _RA5PPS1 0x02
6246 #define _RA5PPS2 0x04
6247 #define _RA5PPS3 0x08
6248
6249 //==============================================================================
6250
6251
6252 //==============================================================================
6253 // RC0PPS Bits
6254
6255 extern __at(0x0EA0) __sfr RC0PPS;
6256
6257 typedef union
6258 {
6259 struct
6260 {
6261 unsigned RC0PPS0 : 1;
6262 unsigned RC0PPS1 : 1;
6263 unsigned RC0PPS2 : 1;
6264 unsigned RC0PPS3 : 1;
6265 unsigned : 1;
6266 unsigned : 1;
6267 unsigned : 1;
6268 unsigned : 1;
6269 };
6270
6271 struct
6272 {
6273 unsigned RC0PPS : 4;
6274 unsigned : 4;
6275 };
6276 } __RC0PPSbits_t;
6277
6278 extern __at(0x0EA0) volatile __RC0PPSbits_t RC0PPSbits;
6279
6280 #define _RC0PPS0 0x01
6281 #define _RC0PPS1 0x02
6282 #define _RC0PPS2 0x04
6283 #define _RC0PPS3 0x08
6284
6285 //==============================================================================
6286
6287
6288 //==============================================================================
6289 // RC1PPS Bits
6290
6291 extern __at(0x0EA1) __sfr RC1PPS;
6292
6293 typedef union
6294 {
6295 struct
6296 {
6297 unsigned RC1PPS0 : 1;
6298 unsigned RC1PPS1 : 1;
6299 unsigned RC1PPS2 : 1;
6300 unsigned RC1PPS3 : 1;
6301 unsigned : 1;
6302 unsigned : 1;
6303 unsigned : 1;
6304 unsigned : 1;
6305 };
6306
6307 struct
6308 {
6309 unsigned RC1PPS : 4;
6310 unsigned : 4;
6311 };
6312 } __RC1PPSbits_t;
6313
6314 extern __at(0x0EA1) volatile __RC1PPSbits_t RC1PPSbits;
6315
6316 #define _RC1PPS0 0x01
6317 #define _RC1PPS1 0x02
6318 #define _RC1PPS2 0x04
6319 #define _RC1PPS3 0x08
6320
6321 //==============================================================================
6322
6323
6324 //==============================================================================
6325 // RC2PPS Bits
6326
6327 extern __at(0x0EA2) __sfr RC2PPS;
6328
6329 typedef union
6330 {
6331 struct
6332 {
6333 unsigned RC1PPS0 : 1;
6334 unsigned RC1PPS1 : 1;
6335 unsigned RC1PPS2 : 1;
6336 unsigned RC1PPS3 : 1;
6337 unsigned : 1;
6338 unsigned : 1;
6339 unsigned : 1;
6340 unsigned : 1;
6341 };
6342
6343 struct
6344 {
6345 unsigned RC1PPS : 4;
6346 unsigned : 4;
6347 };
6348 } __RC2PPSbits_t;
6349
6350 extern __at(0x0EA2) volatile __RC2PPSbits_t RC2PPSbits;
6351
6352 #define _RC2PPS_RC1PPS0 0x01
6353 #define _RC2PPS_RC1PPS1 0x02
6354 #define _RC2PPS_RC1PPS2 0x04
6355 #define _RC2PPS_RC1PPS3 0x08
6356
6357 //==============================================================================
6358
6359
6360 //==============================================================================
6361 // RC3PPS Bits
6362
6363 extern __at(0x0EA3) __sfr RC3PPS;
6364
6365 typedef union
6366 {
6367 struct
6368 {
6369 unsigned RC3PPS0 : 1;
6370 unsigned RC3PPS1 : 1;
6371 unsigned RC3PPS2 : 1;
6372 unsigned RC3PPS3 : 1;
6373 unsigned : 1;
6374 unsigned : 1;
6375 unsigned : 1;
6376 unsigned : 1;
6377 };
6378
6379 struct
6380 {
6381 unsigned RC3PPS : 4;
6382 unsigned : 4;
6383 };
6384 } __RC3PPSbits_t;
6385
6386 extern __at(0x0EA3) volatile __RC3PPSbits_t RC3PPSbits;
6387
6388 #define _RC3PPS0 0x01
6389 #define _RC3PPS1 0x02
6390 #define _RC3PPS2 0x04
6391 #define _RC3PPS3 0x08
6392
6393 //==============================================================================
6394
6395
6396 //==============================================================================
6397 // RC4PPS Bits
6398
6399 extern __at(0x0EA4) __sfr RC4PPS;
6400
6401 typedef union
6402 {
6403 struct
6404 {
6405 unsigned RC4PPS0 : 1;
6406 unsigned RC4PPS1 : 1;
6407 unsigned RC4PPS2 : 1;
6408 unsigned RC4PPS3 : 1;
6409 unsigned : 1;
6410 unsigned : 1;
6411 unsigned : 1;
6412 unsigned : 1;
6413 };
6414
6415 struct
6416 {
6417 unsigned RC4PPS : 4;
6418 unsigned : 4;
6419 };
6420 } __RC4PPSbits_t;
6421
6422 extern __at(0x0EA4) volatile __RC4PPSbits_t RC4PPSbits;
6423
6424 #define _RC4PPS0 0x01
6425 #define _RC4PPS1 0x02
6426 #define _RC4PPS2 0x04
6427 #define _RC4PPS3 0x08
6428
6429 //==============================================================================
6430
6431
6432 //==============================================================================
6433 // RC5PPS Bits
6434
6435 extern __at(0x0EA5) __sfr RC5PPS;
6436
6437 typedef union
6438 {
6439 struct
6440 {
6441 unsigned RC5PPS0 : 1;
6442 unsigned RC5PPS1 : 1;
6443 unsigned RC5PPS2 : 1;
6444 unsigned RC5PPS3 : 1;
6445 unsigned : 1;
6446 unsigned : 1;
6447 unsigned : 1;
6448 unsigned : 1;
6449 };
6450
6451 struct
6452 {
6453 unsigned RC5PPS : 4;
6454 unsigned : 4;
6455 };
6456 } __RC5PPSbits_t;
6457
6458 extern __at(0x0EA5) volatile __RC5PPSbits_t RC5PPSbits;
6459
6460 #define _RC5PPS0 0x01
6461 #define _RC5PPS1 0x02
6462 #define _RC5PPS2 0x04
6463 #define _RC5PPS3 0x08
6464
6465 //==============================================================================
6466
6467
6468 //==============================================================================
6469 // STATUS_SHAD Bits
6470
6471 extern __at(0x0FE4) __sfr STATUS_SHAD;
6472
6473 typedef struct
6474 {
6475 unsigned C_SHAD : 1;
6476 unsigned DC_SHAD : 1;
6477 unsigned Z_SHAD : 1;
6478 unsigned : 1;
6479 unsigned : 1;
6480 unsigned : 1;
6481 unsigned : 1;
6482 unsigned : 1;
6483 } __STATUS_SHADbits_t;
6484
6485 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
6486
6487 #define _C_SHAD 0x01
6488 #define _DC_SHAD 0x02
6489 #define _Z_SHAD 0x04
6490
6491 //==============================================================================
6492
6493 extern __at(0x0FE5) __sfr WREG_SHAD;
6494 extern __at(0x0FE6) __sfr BSR_SHAD;
6495 extern __at(0x0FE7) __sfr PCLATH_SHAD;
6496 extern __at(0x0FE8) __sfr FSR0L_SHAD;
6497 extern __at(0x0FE8) __sfr FSR0_SHAD;
6498 extern __at(0x0FE9) __sfr FSR0H_SHAD;
6499 extern __at(0x0FEA) __sfr FSR1L_SHAD;
6500 extern __at(0x0FEA) __sfr FSR1_SHAD;
6501 extern __at(0x0FEB) __sfr FSR1H_SHAD;
6502 extern __at(0x0FED) __sfr STKPTR;
6503 extern __at(0x0FEE) __sfr TOS;
6504 extern __at(0x0FEE) __sfr TOSL;
6505 extern __at(0x0FEF) __sfr TOSH;
6506
6507 //==============================================================================
6508 //
6509 // Configuration Bits
6510 //
6511 //==============================================================================
6512
6513 #define _CONFIG1 0x8007
6514 #define _CONFIG2 0x8008
6515
6516 //----------------------------- CONFIG1 Options -------------------------------
6517
6518 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator; I/O function on CLKIN pin.
6519 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz); device clock supplied to CLKIN pin.
6520 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz); device clock supplied to CLKIN pin.
6521 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz); device clock supplied to CLKIN pin.
6522 #define _WDTE_OFF 0x3FE7 // WDT disabled.
6523 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
6524 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
6525 #define _WDTE_ON 0x3FFF // WDT enabled.
6526 #define _PWRTE_ON 0x3FDF // PWRT enabled.
6527 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
6528 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
6529 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
6530 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
6531 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
6532 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
6533 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
6534 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
6535 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
6536 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
6537 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
6538
6539 //----------------------------- CONFIG2 Options -------------------------------
6540
6541 #define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by EECON control.
6542 #define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by EECON control.
6543 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by EECON control.
6544 #define _WRT_OFF 0x3FFF // Write protection off.
6545 #define _PPS1WAY_OFF 0x3FFB // PPSLOCKED Bit Can Be Cleared & Set Repeatedly.
6546 #define _PPS1WAY_ON 0x3FFF // PPSLOCKED Bit Can Be Cleared & Set Once.
6547 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
6548 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
6549 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
6550 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
6551 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6552 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6553 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6554 #define _LPBOREN_ON 0x37FF // LPBOR is enabled.
6555 #define _LPBOREN_OFF 0x3FFF // LPBOR is disabled.
6556 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
6557 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
6558 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
6559 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
6560
6561 //==============================================================================
6562
6563 #define _DEVID1 0x8006
6564
6565 #define _IDLOC0 0x8000
6566 #define _IDLOC1 0x8001
6567 #define _IDLOC2 0x8002
6568 #define _IDLOC3 0x8003
6569
6570 //==============================================================================
6571
6572 #ifndef NO_BIT_DEFINES
6573
6574 #define ADCACTPPS0 ADCACTPPSbits.ADCACTPPS0 // bit 0
6575 #define ADCACTPPS1 ADCACTPPSbits.ADCACTPPS1 // bit 1
6576 #define ADCACTPPS2 ADCACTPPSbits.ADCACTPPS2 // bit 2
6577 #define ADCACTPPS3 ADCACTPPSbits.ADCACTPPS3 // bit 3
6578 #define ADCACTPPS4 ADCACTPPSbits.ADCACTPPS4 // bit 4
6579
6580 #define ADON ADCON0bits.ADON // bit 0
6581 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
6582 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
6583 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
6584 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
6585 #define CHS0 ADCON0bits.CHS0 // bit 2
6586 #define CHS1 ADCON0bits.CHS1 // bit 3
6587 #define CHS2 ADCON0bits.CHS2 // bit 4
6588 #define CHS3 ADCON0bits.CHS3 // bit 5
6589 #define CHS4 ADCON0bits.CHS4 // bit 6
6590
6591 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
6592 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
6593 #define ADCS0 ADCON1bits.ADCS0 // bit 4
6594 #define ADCS1 ADCON1bits.ADCS1 // bit 5
6595 #define ADCS2 ADCON1bits.ADCS2 // bit 6
6596 #define ADFM ADCON1bits.ADFM // bit 7
6597
6598 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
6599 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
6600 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
6601 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
6602
6603 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6604 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6605 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6606 #define ANSA4 ANSELAbits.ANSA4 // bit 4
6607
6608 #define ANSC0 ANSELCbits.ANSC0 // bit 0
6609 #define ANSC1 ANSELCbits.ANSC1 // bit 1
6610 #define ANSC2 ANSELCbits.ANSC2 // bit 2
6611 #define ANSC3 ANSELCbits.ANSC3 // bit 3
6612
6613 #define ABDEN BAUDCONbits.ABDEN // bit 0
6614 #define WUE BAUDCONbits.WUE // bit 1
6615 #define BRG16 BAUDCONbits.BRG16 // bit 3
6616 #define SCKP BAUDCONbits.SCKP // bit 4
6617 #define RCIDL BAUDCONbits.RCIDL // bit 6
6618 #define ABDOVF BAUDCONbits.ABDOVF // bit 7
6619
6620 #define BORRDY BORCONbits.BORRDY // bit 0
6621 #define BORFS BORCONbits.BORFS // bit 6
6622 #define SBOREN BORCONbits.SBOREN // bit 7
6623
6624 #define BSR0 BSRbits.BSR0 // bit 0
6625 #define BSR1 BSRbits.BSR1 // bit 1
6626 #define BSR2 BSRbits.BSR2 // bit 2
6627 #define BSR3 BSRbits.BSR3 // bit 3
6628 #define BSR4 BSRbits.BSR4 // bit 4
6629
6630 #define CKPPS0 CKPPSbits.CKPPS0 // bit 0
6631 #define CKPPS1 CKPPSbits.CKPPS1 // bit 1
6632 #define CKPPS2 CKPPSbits.CKPPS2 // bit 2
6633 #define CKPPS3 CKPPSbits.CKPPS3 // bit 3
6634 #define CKPPS4 CKPPSbits.CKPPS4 // bit 4
6635
6636 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6637 #define C1HYS CM1CON0bits.C1HYS // bit 1
6638 #define C1SP CM1CON0bits.C1SP // bit 2
6639 #define C1POL CM1CON0bits.C1POL // bit 4
6640 #define C1OE CM1CON0bits.C1OE // bit 5
6641 #define C1OUT CM1CON0bits.C1OUT // bit 6
6642 #define C1ON CM1CON0bits.C1ON // bit 7
6643
6644 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6645 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6646 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
6647 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
6648 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
6649 #define C1INTN CM1CON1bits.C1INTN // bit 6
6650 #define C1INTP CM1CON1bits.C1INTP // bit 7
6651
6652 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
6653 #define C2HYS CM2CON0bits.C2HYS // bit 1
6654 #define C2SP CM2CON0bits.C2SP // bit 2
6655 #define C2POL CM2CON0bits.C2POL // bit 4
6656 #define C2OE CM2CON0bits.C2OE // bit 5
6657 #define C2OUT CM2CON0bits.C2OUT // bit 6
6658 #define C2ON CM2CON0bits.C2ON // bit 7
6659
6660 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
6661 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
6662 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
6663 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
6664 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
6665 #define C2INTN CM2CON1bits.C2INTN // bit 6
6666 #define C2INTP CM2CON1bits.C2INTP // bit 7
6667
6668 #define MC1OUT CMOUTbits.MC1OUT // bit 0
6669 #define MC2OUT CMOUTbits.MC2OUT // bit 1
6670
6671 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0
6672 #define G1POLA CWG1CON0bits.G1POLA // bit 3
6673 #define G1POLB CWG1CON0bits.G1POLB // bit 4
6674 #define G1OEA CWG1CON0bits.G1OEA // bit 5
6675 #define G1OEB CWG1CON0bits.G1OEB // bit 6
6676 #define G1EN CWG1CON0bits.G1EN // bit 7
6677
6678 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0
6679 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1
6680 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2
6681 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4
6682 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5
6683 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6
6684 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7
6685
6686 #define G1ASDSPPS CWG1CON2bits.G1ASDSPPS // bit 1
6687 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2
6688 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3
6689 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6
6690 #define G1ASE CWG1CON2bits.G1ASE // bit 7
6691
6692 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0
6693 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1
6694 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2
6695 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3
6696 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4
6697 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5
6698
6699 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0
6700 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1
6701 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2
6702 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3
6703 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4
6704 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5
6705
6706 #define CWG1INPPS0 CWG1INPPSbits.CWG1INPPS0 // bit 0
6707 #define CWG1INPPS1 CWG1INPPSbits.CWG1INPPS1 // bit 1
6708 #define CWG1INPPS2 CWG1INPPSbits.CWG1INPPS2 // bit 2
6709 #define CWG1INPPS3 CWG1INPPSbits.CWG1INPPS3 // bit 3
6710 #define CWG1INPPS4 CWG1INPPSbits.CWG1INPPS4 // bit 4
6711
6712 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
6713 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
6714 #define DACOE DACCON0bits.DACOE // bit 5
6715 #define DACLPS DACCON0bits.DACLPS // bit 6
6716 #define DACEN DACCON0bits.DACEN // bit 7
6717
6718 #define DACR0 DACCON1bits.DACR0 // bit 0
6719 #define DACR1 DACCON1bits.DACR1 // bit 1
6720 #define DACR2 DACCON1bits.DACR2 // bit 2
6721 #define DACR3 DACCON1bits.DACR3 // bit 3
6722 #define DACR4 DACCON1bits.DACR4 // bit 4
6723
6724 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
6725 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
6726 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
6727 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
6728 #define TSRNG FVRCONbits.TSRNG // bit 4
6729 #define TSEN FVRCONbits.TSEN // bit 5
6730 #define FVRRDY FVRCONbits.FVRRDY // bit 6
6731 #define FVREN FVRCONbits.FVREN // bit 7
6732
6733 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
6734 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
6735 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
6736 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
6737 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
6738 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
6739
6740 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
6741 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
6742 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
6743 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
6744 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
6745 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
6746
6747 #define IOCIF INTCONbits.IOCIF // bit 0
6748 #define INTF INTCONbits.INTF // bit 1
6749 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
6750 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
6751 #define IOCIE INTCONbits.IOCIE // bit 3
6752 #define INTE INTCONbits.INTE // bit 4
6753 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
6754 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
6755 #define PEIE INTCONbits.PEIE // bit 6
6756 #define GIE INTCONbits.GIE // bit 7
6757
6758 #define INTPPS0 INTPPSbits.INTPPS0 // bit 0
6759 #define INTPPS1 INTPPSbits.INTPPS1 // bit 1
6760 #define INTPPS2 INTPPSbits.INTPPS2 // bit 2
6761 #define INTPPS3 INTPPSbits.INTPPS3 // bit 3
6762 #define INTPPS4 INTPPSbits.INTPPS4 // bit 4
6763
6764 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
6765 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
6766 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
6767 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
6768 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
6769 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
6770
6771 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
6772 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
6773 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
6774 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
6775 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
6776 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
6777
6778 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
6779 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
6780 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
6781 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
6782 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
6783 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
6784
6785 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
6786 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
6787 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
6788 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
6789 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
6790 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
6791
6792 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
6793 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
6794 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
6795 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
6796 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
6797 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
6798
6799 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
6800 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
6801 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
6802 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
6803 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
6804 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
6805
6806 #define LATA0 LATAbits.LATA0 // bit 0
6807 #define LATA1 LATAbits.LATA1 // bit 1
6808 #define LATA2 LATAbits.LATA2 // bit 2
6809 #define LATA4 LATAbits.LATA4 // bit 4
6810 #define LATA5 LATAbits.LATA5 // bit 5
6811
6812 #define LATC0 LATCbits.LATC0 // bit 0
6813 #define LATC1 LATCbits.LATC1 // bit 1
6814 #define LATC2 LATCbits.LATC2 // bit 2
6815 #define LATC3 LATCbits.LATC3 // bit 3
6816 #define LATC4 LATCbits.LATC4 // bit 4
6817 #define LATC5 LATCbits.LATC5 // bit 5
6818
6819 #define ODA0 ODCONAbits.ODA0 // bit 0
6820 #define ODA1 ODCONAbits.ODA1 // bit 1
6821 #define ODA2 ODCONAbits.ODA2 // bit 2
6822 #define ODA4 ODCONAbits.ODA4 // bit 4
6823 #define ODA5 ODCONAbits.ODA5 // bit 5
6824
6825 #define ODC0 ODCONCbits.ODC0 // bit 0
6826 #define ODC1 ODCONCbits.ODC1 // bit 1
6827 #define ODC2 ODCONCbits.ODC2 // bit 2
6828 #define ODC3 ODCONCbits.ODC3 // bit 3
6829 #define ODC4 ODCONCbits.ODC4 // bit 4
6830 #define ODC5 ODCONCbits.ODC5 // bit 5
6831
6832 #define PS0 OPTION_REGbits.PS0 // bit 0
6833 #define PS1 OPTION_REGbits.PS1 // bit 1
6834 #define PS2 OPTION_REGbits.PS2 // bit 2
6835 #define PSA OPTION_REGbits.PSA // bit 3
6836 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6837 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6838 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6839 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6840 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6841 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6842
6843 #define SCS0 OSCCONbits.SCS0 // bit 0
6844 #define SCS1 OSCCONbits.SCS1 // bit 1
6845 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6846 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6847 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6848 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6849 #define SPLLEN OSCCONbits.SPLLEN // bit 7
6850
6851 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6852 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6853 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
6854 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
6855 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6856 #define OSTS OSCSTATbits.OSTS // bit 5
6857 #define PLLR OSCSTATbits.PLLR // bit 6
6858
6859 #define TUN0 OSCTUNEbits.TUN0 // bit 0
6860 #define TUN1 OSCTUNEbits.TUN1 // bit 1
6861 #define TUN2 OSCTUNEbits.TUN2 // bit 2
6862 #define TUN3 OSCTUNEbits.TUN3 // bit 3
6863 #define TUN4 OSCTUNEbits.TUN4 // bit 4
6864 #define TUN5 OSCTUNEbits.TUN5 // bit 5
6865
6866 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6867 #define NOT_POR PCONbits.NOT_POR // bit 1
6868 #define NOT_RI PCONbits.NOT_RI // bit 2
6869 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6870 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
6871 #define STKUNF PCONbits.STKUNF // bit 6
6872 #define STKOVF PCONbits.STKOVF // bit 7
6873
6874 #define TMR1IE PIE1bits.TMR1IE // bit 0
6875 #define TMR2IE PIE1bits.TMR2IE // bit 1
6876 #define TXIE PIE1bits.TXIE // bit 4
6877 #define RCIE PIE1bits.RCIE // bit 5
6878 #define ADIE PIE1bits.ADIE // bit 6
6879 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6880
6881 #define C1IE PIE2bits.C1IE // bit 5
6882 #define C2IE PIE2bits.C2IE // bit 6
6883
6884 #define PWM1IE PIE3bits.PWM1IE // bit 4
6885 #define PWM2IE PIE3bits.PWM2IE // bit 5
6886 #define PWM3IE PIE3bits.PWM3IE // bit 6
6887 #define PWM4IE PIE3bits.PWM4IE // bit 7
6888
6889 #define TMR1IF PIR1bits.TMR1IF // bit 0
6890 #define TMR2IF PIR1bits.TMR2IF // bit 1
6891 #define TXIF PIR1bits.TXIF // bit 4
6892 #define RCIF PIR1bits.RCIF // bit 5
6893 #define ADIF PIR1bits.ADIF // bit 6
6894 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6895
6896 #define C1IF PIR2bits.C1IF // bit 5
6897 #define C2IF PIR2bits.C2IF // bit 6
6898
6899 #define PWM1IF PIR3bits.PWM1IF // bit 4
6900 #define PWM2IF PIR3bits.PWM2IF // bit 5
6901 #define PWM3IF PIR3bits.PWM3IF // bit 6
6902 #define PWM4IF PIR3bits.PWM4IF // bit 7
6903
6904 #define RD PMCON1bits.RD // bit 0
6905 #define WR PMCON1bits.WR // bit 1
6906 #define WREN PMCON1bits.WREN // bit 2
6907 #define WRERR PMCON1bits.WRERR // bit 3
6908 #define FREE PMCON1bits.FREE // bit 4
6909 #define LWLO PMCON1bits.LWLO // bit 5
6910 #define CFGS PMCON1bits.CFGS // bit 6
6911
6912 #define RA0 PORTAbits.RA0 // bit 0
6913 #define RA1 PORTAbits.RA1 // bit 1
6914 #define RA2 PORTAbits.RA2 // bit 2
6915 #define RA3 PORTAbits.RA3 // bit 3
6916 #define RA4 PORTAbits.RA4 // bit 4
6917 #define RA5 PORTAbits.RA5 // bit 5
6918
6919 #define RC0 PORTCbits.RC0 // bit 0
6920 #define RC1 PORTCbits.RC1 // bit 1
6921 #define RC2 PORTCbits.RC2 // bit 2
6922 #define RC3 PORTCbits.RC3 // bit 3
6923 #define RC4 PORTCbits.RC4 // bit 4
6924 #define RC5 PORTCbits.RC5 // bit 5
6925
6926 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
6927
6928 #define PWM1MODE0 PWM1CONbits.PWM1MODE0 // bit 2, shadows bit in PWM1CONbits
6929 #define MODE0 PWM1CONbits.MODE0 // bit 2, shadows bit in PWM1CONbits
6930 #define PWM1MODE1 PWM1CONbits.PWM1MODE1 // bit 3, shadows bit in PWM1CONbits
6931 #define MODE1 PWM1CONbits.MODE1 // bit 3, shadows bit in PWM1CONbits
6932 #define POL PWM1CONbits.POL // bit 4, shadows bit in PWM1CONbits
6933 #define PWM1POL PWM1CONbits.PWM1POL // bit 4, shadows bit in PWM1CONbits
6934 #define OUT PWM1CONbits.OUT // bit 5, shadows bit in PWM1CONbits
6935 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5, shadows bit in PWM1CONbits
6936 #define OE PWM1CONbits.OE // bit 6, shadows bit in PWM1CONbits
6937 #define PWM1OE PWM1CONbits.PWM1OE // bit 6, shadows bit in PWM1CONbits
6938 #define EN PWM1CONbits.EN // bit 7, shadows bit in PWM1CONbits
6939 #define PWM1EN PWM1CONbits.PWM1EN // bit 7, shadows bit in PWM1CONbits
6940
6941 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0
6942 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1
6943 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2
6944 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3
6945 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4
6946 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5
6947 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6
6948 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7
6949
6950 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 0
6951 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 1
6952 #define PWM1DCL2 PWM1DCLbits.PWM1DCL2 // bit 2
6953 #define PWM1DCL3 PWM1DCLbits.PWM1DCL3 // bit 3
6954 #define PWM1DCL4 PWM1DCLbits.PWM1DCL4 // bit 4
6955 #define PWM1DCL5 PWM1DCLbits.PWM1DCL5 // bit 5
6956 #define PWM1DCL6 PWM1DCLbits.PWM1DCL6 // bit 6
6957 #define PWM1DCL7 PWM1DCLbits.PWM1DCL7 // bit 7
6958
6959 #define PRIE PWM1INTCONbits.PRIE // bit 0, shadows bit in PWM1INTCONbits
6960 #define PWM1PRIE PWM1INTCONbits.PWM1PRIE // bit 0, shadows bit in PWM1INTCONbits
6961 #define DCIE PWM1INTCONbits.DCIE // bit 1, shadows bit in PWM1INTCONbits
6962 #define PWM1DCIE PWM1INTCONbits.PWM1DCIE // bit 1, shadows bit in PWM1INTCONbits
6963 #define PHIE PWM1INTCONbits.PHIE // bit 2, shadows bit in PWM1INTCONbits
6964 #define PWM1PHIE PWM1INTCONbits.PWM1PHIE // bit 2, shadows bit in PWM1INTCONbits
6965 #define OFIE PWM1INTCONbits.OFIE // bit 3, shadows bit in PWM1INTCONbits
6966 #define PWM1OFIE PWM1INTCONbits.PWM1OFIE // bit 3, shadows bit in PWM1INTCONbits
6967
6968 #define PRIF PWM1INTFbits.PRIF // bit 0, shadows bit in PWM1INTFbits
6969 #define PWM1PRIF PWM1INTFbits.PWM1PRIF // bit 0, shadows bit in PWM1INTFbits
6970 #define DCIF PWM1INTFbits.DCIF // bit 1, shadows bit in PWM1INTFbits
6971 #define PWM1DCIF PWM1INTFbits.PWM1DCIF // bit 1, shadows bit in PWM1INTFbits
6972 #define PHIF PWM1INTFbits.PHIF // bit 2, shadows bit in PWM1INTFbits
6973 #define PWM1PHIF PWM1INTFbits.PWM1PHIF // bit 2, shadows bit in PWM1INTFbits
6974 #define OFIF PWM1INTFbits.OFIF // bit 3, shadows bit in PWM1INTFbits
6975 #define PWM1OFIF PWM1INTFbits.PWM1OFIF // bit 3, shadows bit in PWM1INTFbits
6976
6977 #define PWM1LDS0 PWM1LDCONbits.PWM1LDS0 // bit 0, shadows bit in PWM1LDCONbits
6978 #define LDS0 PWM1LDCONbits.LDS0 // bit 0, shadows bit in PWM1LDCONbits
6979 #define PWM1LDS1 PWM1LDCONbits.PWM1LDS1 // bit 1, shadows bit in PWM1LDCONbits
6980 #define LDS1 PWM1LDCONbits.LDS1 // bit 1, shadows bit in PWM1LDCONbits
6981 #define LDT PWM1LDCONbits.LDT // bit 6, shadows bit in PWM1LDCONbits
6982 #define PWM1LDM PWM1LDCONbits.PWM1LDM // bit 6, shadows bit in PWM1LDCONbits
6983 #define LDA PWM1LDCONbits.LDA // bit 7, shadows bit in PWM1LDCONbits
6984 #define PWM1LD PWM1LDCONbits.PWM1LD // bit 7, shadows bit in PWM1LDCONbits
6985
6986 #define PWM1OFS0 PWM1OFCONbits.PWM1OFS0 // bit 0, shadows bit in PWM1OFCONbits
6987 #define OFS0 PWM1OFCONbits.OFS0 // bit 0, shadows bit in PWM1OFCONbits
6988 #define PWM1OFS1 PWM1OFCONbits.PWM1OFS1 // bit 1, shadows bit in PWM1OFCONbits
6989 #define OFS1 PWM1OFCONbits.OFS1 // bit 1, shadows bit in PWM1OFCONbits
6990 #define OFO PWM1OFCONbits.OFO // bit 4, shadows bit in PWM1OFCONbits
6991 #define PWM1OFMC PWM1OFCONbits.PWM1OFMC // bit 4, shadows bit in PWM1OFCONbits
6992 #define PWM1OFM0 PWM1OFCONbits.PWM1OFM0 // bit 5, shadows bit in PWM1OFCONbits
6993 #define OFM0 PWM1OFCONbits.OFM0 // bit 5, shadows bit in PWM1OFCONbits
6994 #define PWM1OFM1 PWM1OFCONbits.PWM1OFM1 // bit 6, shadows bit in PWM1OFCONbits
6995 #define OFM1 PWM1OFCONbits.OFM1 // bit 6, shadows bit in PWM1OFCONbits
6996
6997 #define PWM1OFH0 PWM1OFHbits.PWM1OFH0 // bit 0
6998 #define PWM1OFH1 PWM1OFHbits.PWM1OFH1 // bit 1
6999 #define PWM1OFH2 PWM1OFHbits.PWM1OFH2 // bit 2
7000 #define PWM1OFH3 PWM1OFHbits.PWM1OFH3 // bit 3
7001 #define PWM1OFH4 PWM1OFHbits.PWM1OFH4 // bit 4
7002 #define PWM1OFH5 PWM1OFHbits.PWM1OFH5 // bit 5
7003 #define PWM1OFH6 PWM1OFHbits.PWM1OFH6 // bit 6
7004 #define PWM1OFH7 PWM1OFHbits.PWM1OFH7 // bit 7
7005
7006 #define PWM1OFL0 PWM1OFLbits.PWM1OFL0 // bit 0
7007 #define PWM1OFL1 PWM1OFLbits.PWM1OFL1 // bit 1
7008 #define PWM1OFL2 PWM1OFLbits.PWM1OFL2 // bit 2
7009 #define PWM1OFL3 PWM1OFLbits.PWM1OFL3 // bit 3
7010 #define PWM1OFL4 PWM1OFLbits.PWM1OFL4 // bit 4
7011 #define PWM1OFL5 PWM1OFLbits.PWM1OFL5 // bit 5
7012 #define PWM1OFL6 PWM1OFLbits.PWM1OFL6 // bit 6
7013 #define PWM1OFL7 PWM1OFLbits.PWM1OFL7 // bit 7
7014
7015 #define PWM1PHH0 PWM1PHHbits.PWM1PHH0 // bit 0
7016 #define PWM1PHH1 PWM1PHHbits.PWM1PHH1 // bit 1
7017 #define PWM1PHH2 PWM1PHHbits.PWM1PHH2 // bit 2
7018 #define PWM1PHH3 PWM1PHHbits.PWM1PHH3 // bit 3
7019 #define PWM1PHH4 PWM1PHHbits.PWM1PHH4 // bit 4
7020 #define PWM1PHH5 PWM1PHHbits.PWM1PHH5 // bit 5
7021 #define PWM1PHH6 PWM1PHHbits.PWM1PHH6 // bit 6
7022 #define PWM1PHH7 PWM1PHHbits.PWM1PHH7 // bit 7
7023
7024 #define PWM1PHL0 PWM1PHLbits.PWM1PHL0 // bit 0
7025 #define PWM1PHL1 PWM1PHLbits.PWM1PHL1 // bit 1
7026 #define PWM1PHL2 PWM1PHLbits.PWM1PHL2 // bit 2
7027 #define PWM1PHL3 PWM1PHLbits.PWM1PHL3 // bit 3
7028 #define PWM1PHL4 PWM1PHLbits.PWM1PHL4 // bit 4
7029 #define PWM1PHL5 PWM1PHLbits.PWM1PHL5 // bit 5
7030 #define PWM1PHL6 PWM1PHLbits.PWM1PHL6 // bit 6
7031 #define PWM1PHL7 PWM1PHLbits.PWM1PHL7 // bit 7
7032
7033 #define PWM1PRH0 PWM1PRHbits.PWM1PRH0 // bit 0
7034 #define PWM1PRH1 PWM1PRHbits.PWM1PRH1 // bit 1
7035 #define PWM1PRH2 PWM1PRHbits.PWM1PRH2 // bit 2
7036 #define PWM1PRH3 PWM1PRHbits.PWM1PRH3 // bit 3
7037 #define PWM1PRH4 PWM1PRHbits.PWM1PRH4 // bit 4
7038 #define PWM1PRH5 PWM1PRHbits.PWM1PRH5 // bit 5
7039 #define PWM1PRH6 PWM1PRHbits.PWM1PRH6 // bit 6
7040 #define PWM1PRH7 PWM1PRHbits.PWM1PRH7 // bit 7
7041
7042 #define PWM1PRL0 PWM1PRLbits.PWM1PRL0 // bit 0
7043 #define PWM1PRL1 PWM1PRLbits.PWM1PRL1 // bit 1
7044 #define PWM1PRL2 PWM1PRLbits.PWM1PRL2 // bit 2
7045 #define PWM1PRL3 PWM1PRLbits.PWM1PRL3 // bit 3
7046 #define PWM1PRL4 PWM1PRLbits.PWM1PRL4 // bit 4
7047 #define PWM1PRL5 PWM1PRLbits.PWM1PRL5 // bit 5
7048 #define PWM1PRL6 PWM1PRLbits.PWM1PRL6 // bit 6
7049 #define PWM1PRL7 PWM1PRLbits.PWM1PRL7 // bit 7
7050
7051 #define PWM1TMRH0 PWM1TMRHbits.PWM1TMRH0 // bit 0
7052 #define PWM1TMRH1 PWM1TMRHbits.PWM1TMRH1 // bit 1
7053 #define PWM1TMRH2 PWM1TMRHbits.PWM1TMRH2 // bit 2
7054 #define PWM1TMRH3 PWM1TMRHbits.PWM1TMRH3 // bit 3
7055 #define PWM1TMRH4 PWM1TMRHbits.PWM1TMRH4 // bit 4
7056 #define PWM1TMRH5 PWM1TMRHbits.PWM1TMRH5 // bit 5
7057 #define PWM1TMRH6 PWM1TMRHbits.PWM1TMRH6 // bit 6
7058 #define PWM1TMRH7 PWM1TMRHbits.PWM1TMRH7 // bit 7
7059
7060 #define PWM1TMRL0 PWM1TMRLbits.PWM1TMRL0 // bit 0
7061 #define PWM1TMRL1 PWM1TMRLbits.PWM1TMRL1 // bit 1
7062 #define PWM1TMRL2 PWM1TMRLbits.PWM1TMRL2 // bit 2
7063 #define PWM1TMRL3 PWM1TMRLbits.PWM1TMRL3 // bit 3
7064 #define PWM1TMRL4 PWM1TMRLbits.PWM1TMRL4 // bit 4
7065 #define PWM1TMRL5 PWM1TMRLbits.PWM1TMRL5 // bit 5
7066 #define PWM1TMRL6 PWM1TMRLbits.PWM1TMRL6 // bit 6
7067 #define PWM1TMRL7 PWM1TMRLbits.PWM1TMRL7 // bit 7
7068
7069 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0
7070 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1
7071 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2
7072 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3
7073 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4
7074 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5
7075 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6
7076 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7
7077
7078 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 0
7079 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 1
7080 #define PWM2DCL2 PWM2DCLbits.PWM2DCL2 // bit 2
7081 #define PWM2DCL3 PWM2DCLbits.PWM2DCL3 // bit 3
7082 #define PWM2DCL4 PWM2DCLbits.PWM2DCL4 // bit 4
7083 #define PWM2DCL5 PWM2DCLbits.PWM2DCL5 // bit 5
7084 #define PWM2DCL6 PWM2DCLbits.PWM2DCL6 // bit 6
7085 #define PWM2DCL7 PWM2DCLbits.PWM2DCL7 // bit 7
7086
7087 #define PWM2OFH0 PWM2OFHbits.PWM2OFH0 // bit 0
7088 #define PWM2OFH1 PWM2OFHbits.PWM2OFH1 // bit 1
7089 #define PWM2OFH2 PWM2OFHbits.PWM2OFH2 // bit 2
7090 #define PWM2OFH3 PWM2OFHbits.PWM2OFH3 // bit 3
7091 #define PWM2OFH4 PWM2OFHbits.PWM2OFH4 // bit 4
7092 #define PWM2OFH5 PWM2OFHbits.PWM2OFH5 // bit 5
7093 #define PWM2OFH6 PWM2OFHbits.PWM2OFH6 // bit 6
7094 #define PWM2OFH7 PWM2OFHbits.PWM2OFH7 // bit 7
7095
7096 #define PWM2OFL0 PWM2OFLbits.PWM2OFL0 // bit 0
7097 #define PWM2OFL1 PWM2OFLbits.PWM2OFL1 // bit 1
7098 #define PWM2OFL2 PWM2OFLbits.PWM2OFL2 // bit 2
7099 #define PWM2OFL3 PWM2OFLbits.PWM2OFL3 // bit 3
7100 #define PWM2OFL4 PWM2OFLbits.PWM2OFL4 // bit 4
7101 #define PWM2OFL5 PWM2OFLbits.PWM2OFL5 // bit 5
7102 #define PWM2OFL6 PWM2OFLbits.PWM2OFL6 // bit 6
7103 #define PWM2OFL7 PWM2OFLbits.PWM2OFL7 // bit 7
7104
7105 #define PWM2PHH0 PWM2PHHbits.PWM2PHH0 // bit 0
7106 #define PWM2PHH1 PWM2PHHbits.PWM2PHH1 // bit 1
7107 #define PWM2PHH2 PWM2PHHbits.PWM2PHH2 // bit 2
7108 #define PWM2PHH3 PWM2PHHbits.PWM2PHH3 // bit 3
7109 #define PWM2PHH4 PWM2PHHbits.PWM2PHH4 // bit 4
7110 #define PWM2PHH5 PWM2PHHbits.PWM2PHH5 // bit 5
7111 #define PWM2PHH6 PWM2PHHbits.PWM2PHH6 // bit 6
7112 #define PWM2PHH7 PWM2PHHbits.PWM2PHH7 // bit 7
7113
7114 #define PWM2PHL0 PWM2PHLbits.PWM2PHL0 // bit 0
7115 #define PWM2PHL1 PWM2PHLbits.PWM2PHL1 // bit 1
7116 #define PWM2PHL2 PWM2PHLbits.PWM2PHL2 // bit 2
7117 #define PWM2PHL3 PWM2PHLbits.PWM2PHL3 // bit 3
7118 #define PWM2PHL4 PWM2PHLbits.PWM2PHL4 // bit 4
7119 #define PWM2PHL5 PWM2PHLbits.PWM2PHL5 // bit 5
7120 #define PWM2PHL6 PWM2PHLbits.PWM2PHL6 // bit 6
7121 #define PWM2PHL7 PWM2PHLbits.PWM2PHL7 // bit 7
7122
7123 #define PWM2PRH0 PWM2PRHbits.PWM2PRH0 // bit 0
7124 #define PWM2PRH1 PWM2PRHbits.PWM2PRH1 // bit 1
7125 #define PWM2PRH2 PWM2PRHbits.PWM2PRH2 // bit 2
7126 #define PWM2PRH3 PWM2PRHbits.PWM2PRH3 // bit 3
7127 #define PWM2PRH4 PWM2PRHbits.PWM2PRH4 // bit 4
7128 #define PWM2PRH5 PWM2PRHbits.PWM2PRH5 // bit 5
7129 #define PWM2PRH6 PWM2PRHbits.PWM2PRH6 // bit 6
7130 #define PWM2PRH7 PWM2PRHbits.PWM2PRH7 // bit 7
7131
7132 #define PWM2PRL0 PWM2PRLbits.PWM2PRL0 // bit 0
7133 #define PWM2PRL1 PWM2PRLbits.PWM2PRL1 // bit 1
7134 #define PWM2PRL2 PWM2PRLbits.PWM2PRL2 // bit 2
7135 #define PWM2PRL3 PWM2PRLbits.PWM2PRL3 // bit 3
7136 #define PWM2PRL4 PWM2PRLbits.PWM2PRL4 // bit 4
7137 #define PWM2PRL5 PWM2PRLbits.PWM2PRL5 // bit 5
7138 #define PWM2PRL6 PWM2PRLbits.PWM2PRL6 // bit 6
7139 #define PWM2PRL7 PWM2PRLbits.PWM2PRL7 // bit 7
7140
7141 #define PWM2TMRH0 PWM2TMRHbits.PWM2TMRH0 // bit 0
7142 #define PWM2TMRH1 PWM2TMRHbits.PWM2TMRH1 // bit 1
7143 #define PWM2TMRH2 PWM2TMRHbits.PWM2TMRH2 // bit 2
7144 #define PWM2TMRH3 PWM2TMRHbits.PWM2TMRH3 // bit 3
7145 #define PWM2TMRH4 PWM2TMRHbits.PWM2TMRH4 // bit 4
7146 #define PWM2TMRH5 PWM2TMRHbits.PWM2TMRH5 // bit 5
7147 #define PWM2TMRH6 PWM2TMRHbits.PWM2TMRH6 // bit 6
7148 #define PWM2TMRH7 PWM2TMRHbits.PWM2TMRH7 // bit 7
7149
7150 #define PWM2TMRL0 PWM2TMRLbits.PWM2TMRL0 // bit 0
7151 #define PWM2TMRL1 PWM2TMRLbits.PWM2TMRL1 // bit 1
7152 #define PWM2TMRL2 PWM2TMRLbits.PWM2TMRL2 // bit 2
7153 #define PWM2TMRL3 PWM2TMRLbits.PWM2TMRL3 // bit 3
7154 #define PWM2TMRL4 PWM2TMRLbits.PWM2TMRL4 // bit 4
7155 #define PWM2TMRL5 PWM2TMRLbits.PWM2TMRL5 // bit 5
7156 #define PWM2TMRL6 PWM2TMRLbits.PWM2TMRL6 // bit 6
7157 #define PWM2TMRL7 PWM2TMRLbits.PWM2TMRL7 // bit 7
7158
7159 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
7160 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
7161 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
7162 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
7163 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
7164 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
7165 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
7166 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
7167
7168 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 0
7169 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 1
7170 #define PWM3DCL2 PWM3DCLbits.PWM3DCL2 // bit 2
7171 #define PWM3DCL3 PWM3DCLbits.PWM3DCL3 // bit 3
7172 #define PWM3DCL4 PWM3DCLbits.PWM3DCL4 // bit 4
7173 #define PWM3DCL5 PWM3DCLbits.PWM3DCL5 // bit 5
7174 #define PWM3DCL6 PWM3DCLbits.PWM3DCL6 // bit 6
7175 #define PWM3DCL7 PWM3DCLbits.PWM3DCL7 // bit 7
7176
7177 #define PWM3OFH0 PWM3OFHbits.PWM3OFH0 // bit 0
7178 #define PWM3OFH1 PWM3OFHbits.PWM3OFH1 // bit 1
7179 #define PWM3OFH2 PWM3OFHbits.PWM3OFH2 // bit 2
7180 #define PWM3OFH3 PWM3OFHbits.PWM3OFH3 // bit 3
7181 #define PWM3OFH4 PWM3OFHbits.PWM3OFH4 // bit 4
7182 #define PWM3OFH5 PWM3OFHbits.PWM3OFH5 // bit 5
7183 #define PWM3OFH6 PWM3OFHbits.PWM3OFH6 // bit 6
7184 #define PWM3OFH7 PWM3OFHbits.PWM3OFH7 // bit 7
7185
7186 #define PWM3OFL0 PWM3OFLbits.PWM3OFL0 // bit 0
7187 #define PWM3OFL1 PWM3OFLbits.PWM3OFL1 // bit 1
7188 #define PWM3OFL2 PWM3OFLbits.PWM3OFL2 // bit 2
7189 #define PWM3OFL3 PWM3OFLbits.PWM3OFL3 // bit 3
7190 #define PWM3OFL4 PWM3OFLbits.PWM3OFL4 // bit 4
7191 #define PWM3OFL5 PWM3OFLbits.PWM3OFL5 // bit 5
7192 #define PWM3OFL6 PWM3OFLbits.PWM3OFL6 // bit 6
7193 #define PWM3OFL7 PWM3OFLbits.PWM3OFL7 // bit 7
7194
7195 #define PWM3PHH0 PWM3PHHbits.PWM3PHH0 // bit 0
7196 #define PWM3PHH1 PWM3PHHbits.PWM3PHH1 // bit 1
7197 #define PWM3PHH2 PWM3PHHbits.PWM3PHH2 // bit 2
7198 #define PWM3PHH3 PWM3PHHbits.PWM3PHH3 // bit 3
7199 #define PWM3PHH4 PWM3PHHbits.PWM3PHH4 // bit 4
7200 #define PWM3PHH5 PWM3PHHbits.PWM3PHH5 // bit 5
7201 #define PWM3PHH6 PWM3PHHbits.PWM3PHH6 // bit 6
7202 #define PWM3PHH7 PWM3PHHbits.PWM3PHH7 // bit 7
7203
7204 #define PWM3PHL0 PWM3PHLbits.PWM3PHL0 // bit 0
7205 #define PWM3PHL1 PWM3PHLbits.PWM3PHL1 // bit 1
7206 #define PWM3PHL2 PWM3PHLbits.PWM3PHL2 // bit 2
7207 #define PWM3PHL3 PWM3PHLbits.PWM3PHL3 // bit 3
7208 #define PWM3PHL4 PWM3PHLbits.PWM3PHL4 // bit 4
7209 #define PWM3PHL5 PWM3PHLbits.PWM3PHL5 // bit 5
7210 #define PWM3PHL6 PWM3PHLbits.PWM3PHL6 // bit 6
7211 #define PWM3PHL7 PWM3PHLbits.PWM3PHL7 // bit 7
7212
7213 #define PWM3PRH0 PWM3PRHbits.PWM3PRH0 // bit 0
7214 #define PWM3PRH1 PWM3PRHbits.PWM3PRH1 // bit 1
7215 #define PWM3PRH2 PWM3PRHbits.PWM3PRH2 // bit 2
7216 #define PWM3PRH3 PWM3PRHbits.PWM3PRH3 // bit 3
7217 #define PWM3PRH4 PWM3PRHbits.PWM3PRH4 // bit 4
7218 #define PWM3PRH5 PWM3PRHbits.PWM3PRH5 // bit 5
7219 #define PWM3PRH6 PWM3PRHbits.PWM3PRH6 // bit 6
7220 #define PWM3PRH7 PWM3PRHbits.PWM3PRH7 // bit 7
7221
7222 #define PWM3PRL0 PWM3PRLbits.PWM3PRL0 // bit 0
7223 #define PWM3PRL1 PWM3PRLbits.PWM3PRL1 // bit 1
7224 #define PWM3PRL2 PWM3PRLbits.PWM3PRL2 // bit 2
7225 #define PWM3PRL3 PWM3PRLbits.PWM3PRL3 // bit 3
7226 #define PWM3PRL4 PWM3PRLbits.PWM3PRL4 // bit 4
7227 #define PWM3PRL5 PWM3PRLbits.PWM3PRL5 // bit 5
7228 #define PWM3PRL6 PWM3PRLbits.PWM3PRL6 // bit 6
7229 #define PWM3PRL7 PWM3PRLbits.PWM3PRL7 // bit 7
7230
7231 #define PWM3TMRH0 PWM3TMRHbits.PWM3TMRH0 // bit 0
7232 #define PWM3TMRH1 PWM3TMRHbits.PWM3TMRH1 // bit 1
7233 #define PWM3TMRH2 PWM3TMRHbits.PWM3TMRH2 // bit 2
7234 #define PWM3TMRH3 PWM3TMRHbits.PWM3TMRH3 // bit 3
7235 #define PWM3TMRH4 PWM3TMRHbits.PWM3TMRH4 // bit 4
7236 #define PWM3TMRH5 PWM3TMRHbits.PWM3TMRH5 // bit 5
7237 #define PWM3TMRH6 PWM3TMRHbits.PWM3TMRH6 // bit 6
7238 #define PWM3TMRH7 PWM3TMRHbits.PWM3TMRH7 // bit 7
7239
7240 #define PWM3TMRL0 PWM3TMRLbits.PWM3TMRL0 // bit 0
7241 #define PWM3TMRL1 PWM3TMRLbits.PWM3TMRL1 // bit 1
7242 #define PWM3TMRL2 PWM3TMRLbits.PWM3TMRL2 // bit 2
7243 #define PWM3TMRL3 PWM3TMRLbits.PWM3TMRL3 // bit 3
7244 #define PWM3TMRL4 PWM3TMRLbits.PWM3TMRL4 // bit 4
7245 #define PWM3TMRL5 PWM3TMRLbits.PWM3TMRL5 // bit 5
7246 #define PWM3TMRL6 PWM3TMRLbits.PWM3TMRL6 // bit 6
7247 #define PWM3TMRL7 PWM3TMRLbits.PWM3TMRL7 // bit 7
7248
7249 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
7250 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
7251 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
7252 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
7253 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
7254 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
7255 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
7256 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
7257
7258 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 0
7259 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 1
7260 #define PWM4DCL2 PWM4DCLbits.PWM4DCL2 // bit 2
7261 #define PWM4DCL3 PWM4DCLbits.PWM4DCL3 // bit 3
7262 #define PWM4DCL4 PWM4DCLbits.PWM4DCL4 // bit 4
7263 #define PWM4DCL5 PWM4DCLbits.PWM4DCL5 // bit 5
7264 #define PWM4DCL6 PWM4DCLbits.PWM4DCL6 // bit 6
7265 #define PWM4DCL7 PWM4DCLbits.PWM4DCL7 // bit 7
7266
7267 #define PWM4OFH0 PWM4OFHbits.PWM4OFH0 // bit 0
7268 #define PWM4OFH1 PWM4OFHbits.PWM4OFH1 // bit 1
7269 #define PWM4OFH2 PWM4OFHbits.PWM4OFH2 // bit 2
7270 #define PWM4OFH3 PWM4OFHbits.PWM4OFH3 // bit 3
7271 #define PWM4OFH4 PWM4OFHbits.PWM4OFH4 // bit 4
7272 #define PWM4OFH5 PWM4OFHbits.PWM4OFH5 // bit 5
7273 #define PWM4OFH6 PWM4OFHbits.PWM4OFH6 // bit 6
7274 #define PWM4OFH7 PWM4OFHbits.PWM4OFH7 // bit 7
7275
7276 #define PWM4OFL0 PWM4OFLbits.PWM4OFL0 // bit 0
7277 #define PWM4OFL1 PWM4OFLbits.PWM4OFL1 // bit 1
7278 #define PWM4OFL2 PWM4OFLbits.PWM4OFL2 // bit 2
7279 #define PWM4OFL3 PWM4OFLbits.PWM4OFL3 // bit 3
7280 #define PWM4OFL4 PWM4OFLbits.PWM4OFL4 // bit 4
7281 #define PWM4OFL5 PWM4OFLbits.PWM4OFL5 // bit 5
7282 #define PWM4OFL6 PWM4OFLbits.PWM4OFL6 // bit 6
7283 #define PWM4OFL7 PWM4OFLbits.PWM4OFL7 // bit 7
7284
7285 #define PWM4PHH0 PWM4PHHbits.PWM4PHH0 // bit 0
7286 #define PWM4PHH1 PWM4PHHbits.PWM4PHH1 // bit 1
7287 #define PWM4PHH2 PWM4PHHbits.PWM4PHH2 // bit 2
7288 #define PWM4PHH3 PWM4PHHbits.PWM4PHH3 // bit 3
7289 #define PWM4PHH4 PWM4PHHbits.PWM4PHH4 // bit 4
7290 #define PWM4PHH5 PWM4PHHbits.PWM4PHH5 // bit 5
7291 #define PWM4PHH6 PWM4PHHbits.PWM4PHH6 // bit 6
7292 #define PWM4PHH7 PWM4PHHbits.PWM4PHH7 // bit 7
7293
7294 #define PWM4PHL0 PWM4PHLbits.PWM4PHL0 // bit 0
7295 #define PWM4PHL1 PWM4PHLbits.PWM4PHL1 // bit 1
7296 #define PWM4PHL2 PWM4PHLbits.PWM4PHL2 // bit 2
7297 #define PWM4PHL3 PWM4PHLbits.PWM4PHL3 // bit 3
7298 #define PWM4PHL4 PWM4PHLbits.PWM4PHL4 // bit 4
7299 #define PWM4PHL5 PWM4PHLbits.PWM4PHL5 // bit 5
7300 #define PWM4PHL6 PWM4PHLbits.PWM4PHL6 // bit 6
7301 #define PWM4PHL7 PWM4PHLbits.PWM4PHL7 // bit 7
7302
7303 #define PWM4PRH0 PWM4PRHbits.PWM4PRH0 // bit 0
7304 #define PWM4PRH1 PWM4PRHbits.PWM4PRH1 // bit 1
7305 #define PWM4PRH2 PWM4PRHbits.PWM4PRH2 // bit 2
7306 #define PWM4PRH3 PWM4PRHbits.PWM4PRH3 // bit 3
7307 #define PWM4PRH4 PWM4PRHbits.PWM4PRH4 // bit 4
7308 #define PWM4PRH5 PWM4PRHbits.PWM4PRH5 // bit 5
7309 #define PWM4PRH6 PWM4PRHbits.PWM4PRH6 // bit 6
7310 #define PWM4PRH7 PWM4PRHbits.PWM4PRH7 // bit 7
7311
7312 #define PWM4PRL0 PWM4PRLbits.PWM4PRL0 // bit 0
7313 #define PWM4PRL1 PWM4PRLbits.PWM4PRL1 // bit 1
7314 #define PWM4PRL2 PWM4PRLbits.PWM4PRL2 // bit 2
7315 #define PWM4PRL3 PWM4PRLbits.PWM4PRL3 // bit 3
7316 #define PWM4PRL4 PWM4PRLbits.PWM4PRL4 // bit 4
7317 #define PWM4PRL5 PWM4PRLbits.PWM4PRL5 // bit 5
7318 #define PWM4PRL6 PWM4PRLbits.PWM4PRL6 // bit 6
7319 #define PWM4PRL7 PWM4PRLbits.PWM4PRL7 // bit 7
7320
7321 #define PWM4TMRH0 PWM4TMRHbits.PWM4TMRH0 // bit 0
7322 #define PWM4TMRH1 PWM4TMRHbits.PWM4TMRH1 // bit 1
7323 #define PWM4TMRH2 PWM4TMRHbits.PWM4TMRH2 // bit 2
7324 #define PWM4TMRH3 PWM4TMRHbits.PWM4TMRH3 // bit 3
7325 #define PWM4TMRH4 PWM4TMRHbits.PWM4TMRH4 // bit 4
7326 #define PWM4TMRH5 PWM4TMRHbits.PWM4TMRH5 // bit 5
7327 #define PWM4TMRH6 PWM4TMRHbits.PWM4TMRH6 // bit 6
7328 #define PWM4TMRH7 PWM4TMRHbits.PWM4TMRH7 // bit 7
7329
7330 #define PWM4TMRL0 PWM4TMRLbits.PWM4TMRL0 // bit 0
7331 #define PWM4TMRL1 PWM4TMRLbits.PWM4TMRL1 // bit 1
7332 #define PWM4TMRL2 PWM4TMRLbits.PWM4TMRL2 // bit 2
7333 #define PWM4TMRL3 PWM4TMRLbits.PWM4TMRL3 // bit 3
7334 #define PWM4TMRL4 PWM4TMRLbits.PWM4TMRL4 // bit 4
7335 #define PWM4TMRL5 PWM4TMRLbits.PWM4TMRL5 // bit 5
7336 #define PWM4TMRL6 PWM4TMRLbits.PWM4TMRL6 // bit 6
7337 #define PWM4TMRL7 PWM4TMRLbits.PWM4TMRL7 // bit 7
7338
7339 #define PWM1EN_A PWMENbits.PWM1EN_A // bit 0, shadows bit in PWMENbits
7340 #define MPWM1EN PWMENbits.MPWM1EN // bit 0, shadows bit in PWMENbits
7341 #define PWM2EN_A PWMENbits.PWM2EN_A // bit 1, shadows bit in PWMENbits
7342 #define MPWM2EN PWMENbits.MPWM2EN // bit 1, shadows bit in PWMENbits
7343 #define PWM3EN_A PWMENbits.PWM3EN_A // bit 2, shadows bit in PWMENbits
7344 #define MPWM3EN PWMENbits.MPWM3EN // bit 2, shadows bit in PWMENbits
7345 #define PWM4EN_A PWMENbits.PWM4EN_A // bit 3
7346
7347 #define PWM1LDA_A PWMLDbits.PWM1LDA_A // bit 0, shadows bit in PWMLDbits
7348 #define MPWM1LD PWMLDbits.MPWM1LD // bit 0, shadows bit in PWMLDbits
7349 #define PWM2LDA_A PWMLDbits.PWM2LDA_A // bit 1, shadows bit in PWMLDbits
7350 #define MPWM2LD PWMLDbits.MPWM2LD // bit 1, shadows bit in PWMLDbits
7351 #define PWM3LDA_A PWMLDbits.PWM3LDA_A // bit 2, shadows bit in PWMLDbits
7352 #define MPWM3LD PWMLDbits.MPWM3LD // bit 2, shadows bit in PWMLDbits
7353 #define PWM4LDA_A PWMLDbits.PWM4LDA_A // bit 3
7354
7355 #define PWM1OUT_A PWMOUTbits.PWM1OUT_A // bit 0, shadows bit in PWMOUTbits
7356 #define MPWM1OUT PWMOUTbits.MPWM1OUT // bit 0, shadows bit in PWMOUTbits
7357 #define PWM2OUT_A PWMOUTbits.PWM2OUT_A // bit 1, shadows bit in PWMOUTbits
7358 #define MPWM2OUT PWMOUTbits.MPWM2OUT // bit 1, shadows bit in PWMOUTbits
7359 #define PWM3OUT_A PWMOUTbits.PWM3OUT_A // bit 2, shadows bit in PWMOUTbits
7360 #define MPWM3OUT PWMOUTbits.MPWM3OUT // bit 2, shadows bit in PWMOUTbits
7361 #define PWM4OUT_A PWMOUTbits.PWM4OUT_A // bit 3
7362
7363 #define RA0PPS0 RA0PPSbits.RA0PPS0 // bit 0
7364 #define RA0PPS1 RA0PPSbits.RA0PPS1 // bit 1
7365 #define RA0PPS2 RA0PPSbits.RA0PPS2 // bit 2
7366 #define RA0PPS3 RA0PPSbits.RA0PPS3 // bit 3
7367
7368 #define RA1PPS0 RA1PPSbits.RA1PPS0 // bit 0
7369 #define RA1PPS1 RA1PPSbits.RA1PPS1 // bit 1
7370 #define RA1PPS2 RA1PPSbits.RA1PPS2 // bit 2
7371 #define RA1PPS3 RA1PPSbits.RA1PPS3 // bit 3
7372
7373 #define RA2PPS0 RA2PPSbits.RA2PPS0 // bit 0
7374 #define RA2PPS1 RA2PPSbits.RA2PPS1 // bit 1
7375 #define RA2PPS2 RA2PPSbits.RA2PPS2 // bit 2
7376 #define RA2PPS3 RA2PPSbits.RA2PPS3 // bit 3
7377
7378 #define RA4PPS0 RA4PPSbits.RA4PPS0 // bit 0
7379 #define RA4PPS1 RA4PPSbits.RA4PPS1 // bit 1
7380 #define RA4PPS2 RA4PPSbits.RA4PPS2 // bit 2
7381 #define RA4PPS3 RA4PPSbits.RA4PPS3 // bit 3
7382
7383 #define RA5PPS0 RA5PPSbits.RA5PPS0 // bit 0
7384 #define RA5PPS1 RA5PPSbits.RA5PPS1 // bit 1
7385 #define RA5PPS2 RA5PPSbits.RA5PPS2 // bit 2
7386 #define RA5PPS3 RA5PPSbits.RA5PPS3 // bit 3
7387
7388 #define RC0PPS0 RC0PPSbits.RC0PPS0 // bit 0
7389 #define RC0PPS1 RC0PPSbits.RC0PPS1 // bit 1
7390 #define RC0PPS2 RC0PPSbits.RC0PPS2 // bit 2
7391 #define RC0PPS3 RC0PPSbits.RC0PPS3 // bit 3
7392
7393 #define RC1PPS0 RC1PPSbits.RC1PPS0 // bit 0
7394 #define RC1PPS1 RC1PPSbits.RC1PPS1 // bit 1
7395 #define RC1PPS2 RC1PPSbits.RC1PPS2 // bit 2
7396 #define RC1PPS3 RC1PPSbits.RC1PPS3 // bit 3
7397
7398 #define RC3PPS0 RC3PPSbits.RC3PPS0 // bit 0
7399 #define RC3PPS1 RC3PPSbits.RC3PPS1 // bit 1
7400 #define RC3PPS2 RC3PPSbits.RC3PPS2 // bit 2
7401 #define RC3PPS3 RC3PPSbits.RC3PPS3 // bit 3
7402
7403 #define RC4PPS0 RC4PPSbits.RC4PPS0 // bit 0
7404 #define RC4PPS1 RC4PPSbits.RC4PPS1 // bit 1
7405 #define RC4PPS2 RC4PPSbits.RC4PPS2 // bit 2
7406 #define RC4PPS3 RC4PPSbits.RC4PPS3 // bit 3
7407
7408 #define RC5PPS0 RC5PPSbits.RC5PPS0 // bit 0
7409 #define RC5PPS1 RC5PPSbits.RC5PPS1 // bit 1
7410 #define RC5PPS2 RC5PPSbits.RC5PPS2 // bit 2
7411 #define RC5PPS3 RC5PPSbits.RC5PPS3 // bit 3
7412
7413 #define RX9D RCSTAbits.RX9D // bit 0
7414 #define OERR RCSTAbits.OERR // bit 1
7415 #define FERR RCSTAbits.FERR // bit 2
7416 #define ADDEN RCSTAbits.ADDEN // bit 3
7417 #define CREN RCSTAbits.CREN // bit 4
7418 #define SREN RCSTAbits.SREN // bit 5
7419 #define RX9 RCSTAbits.RX9 // bit 6
7420 #define SPEN RCSTAbits.SPEN // bit 7
7421
7422 #define RXPPS0 RXPPSbits.RXPPS0 // bit 0
7423 #define RXPPS1 RXPPSbits.RXPPS1 // bit 1
7424 #define RXPPS2 RXPPSbits.RXPPS2 // bit 2
7425 #define RXPPS3 RXPPSbits.RXPPS3 // bit 3
7426 #define RXPPS4 RXPPSbits.RXPPS4 // bit 4
7427
7428 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
7429 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
7430 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
7431 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
7432 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
7433
7434 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
7435 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
7436 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
7437 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
7438 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
7439 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
7440
7441 #define C STATUSbits.C // bit 0
7442 #define DC STATUSbits.DC // bit 1
7443 #define Z STATUSbits.Z // bit 2
7444 #define NOT_PD STATUSbits.NOT_PD // bit 3
7445 #define NOT_TO STATUSbits.NOT_TO // bit 4
7446
7447 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
7448 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
7449 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
7450
7451 #define T0CKIPPS0 T0CKIPPSbits.T0CKIPPS0 // bit 0
7452 #define T0CKIPPS1 T0CKIPPSbits.T0CKIPPS1 // bit 1
7453 #define T0CKIPPS2 T0CKIPPSbits.T0CKIPPS2 // bit 2
7454 #define T0CKIPPS3 T0CKIPPSbits.T0CKIPPS3 // bit 3
7455 #define T0CKIPPS4 T0CKIPPSbits.T0CKIPPS4 // bit 4
7456
7457 #define T1CKIPPS0 T1CKIPPSbits.T1CKIPPS0 // bit 0
7458 #define T1CKIPPS1 T1CKIPPSbits.T1CKIPPS1 // bit 1
7459 #define T1CKIPPS2 T1CKIPPSbits.T1CKIPPS2 // bit 2
7460 #define T1CKIPPS3 T1CKIPPSbits.T1CKIPPS3 // bit 3
7461 #define T1CKIPPS4 T1CKIPPSbits.T1CKIPPS4 // bit 4
7462
7463 #define TMR1ON T1CONbits.TMR1ON // bit 0
7464 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
7465 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
7466 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
7467 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
7468 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
7469 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
7470
7471 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
7472 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
7473 #define T1GVAL T1GCONbits.T1GVAL // bit 2
7474 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
7475 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
7476 #define T1GSPM T1GCONbits.T1GSPM // bit 4
7477 #define T1GTM T1GCONbits.T1GTM // bit 5
7478 #define T1GPOL T1GCONbits.T1GPOL // bit 6
7479 #define TMR1GE T1GCONbits.TMR1GE // bit 7
7480
7481 #define T1GPPS0 T1GPPSbits.T1GPPS0 // bit 0
7482 #define T1GPPS1 T1GPPSbits.T1GPPS1 // bit 1
7483 #define T1GPPS2 T1GPPSbits.T1GPPS2 // bit 2
7484 #define T1GPPS3 T1GPPSbits.T1GPPS3 // bit 3
7485 #define T1GPPS4 T1GPPSbits.T1GPPS4 // bit 4
7486
7487 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
7488 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
7489 #define TMR2ON T2CONbits.TMR2ON // bit 2
7490 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
7491 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
7492 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
7493 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
7494
7495 #define TRISA0 TRISAbits.TRISA0 // bit 0
7496 #define TRISA1 TRISAbits.TRISA1 // bit 1
7497 #define TRISA2 TRISAbits.TRISA2 // bit 2
7498 #define TRISA3 TRISAbits.TRISA3 // bit 3
7499 #define TRISA4 TRISAbits.TRISA4 // bit 4
7500 #define TRISA5 TRISAbits.TRISA5 // bit 5
7501
7502 #define TRISC0 TRISCbits.TRISC0 // bit 0
7503 #define TRISC1 TRISCbits.TRISC1 // bit 1
7504 #define TRISC2 TRISCbits.TRISC2 // bit 2
7505 #define TRISC3 TRISCbits.TRISC3 // bit 3
7506 #define TRISC4 TRISCbits.TRISC4 // bit 4
7507 #define TRISC5 TRISCbits.TRISC5 // bit 5
7508
7509 #define TX9D TXSTAbits.TX9D // bit 0
7510 #define TRMT TXSTAbits.TRMT // bit 1
7511 #define BRGH TXSTAbits.BRGH // bit 2
7512 #define SENDB TXSTAbits.SENDB // bit 3
7513 #define SYNC TXSTAbits.SYNC // bit 4
7514 #define TXEN TXSTAbits.TXEN // bit 5
7515 #define TX9 TXSTAbits.TX9 // bit 6
7516 #define CSRC TXSTAbits.CSRC // bit 7
7517
7518 #define SWDTEN WDTCONbits.SWDTEN // bit 0
7519 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
7520 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
7521 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
7522 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
7523 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
7524
7525 #define WPUA0 WPUAbits.WPUA0 // bit 0
7526 #define WPUA1 WPUAbits.WPUA1 // bit 1
7527 #define WPUA2 WPUAbits.WPUA2 // bit 2
7528 #define WPUA3 WPUAbits.WPUA3 // bit 3
7529 #define WPUA4 WPUAbits.WPUA4 // bit 4
7530 #define WPUA5 WPUAbits.WPUA5 // bit 5
7531
7532 #define WPUC0 WPUCbits.WPUC0 // bit 0
7533 #define WPUC1 WPUCbits.WPUC1 // bit 1
7534 #define WPUC2 WPUCbits.WPUC2 // bit 2
7535 #define WPUC3 WPUCbits.WPUC3 // bit 3
7536 #define WPUC4 WPUCbits.WPUC4 // bit 4
7537 #define WPUC5 WPUCbits.WPUC5 // bit 5
7538
7539 #endif // #ifndef NO_BIT_DEFINES
7540
7541 #endif // #ifndef __PIC16LF1575_H__
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