2 * This declarations of the PIC16LF1708 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:11 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF1708_H__
26 #define __PIC16LF1708_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PIR1_ADDR 0x0011
54 #define PIR2_ADDR 0x0012
55 #define PIR3_ADDR 0x0013
56 #define TMR0_ADDR 0x0015
57 #define TMR1_ADDR 0x0016
58 #define TMR1L_ADDR 0x0016
59 #define TMR1H_ADDR 0x0017
60 #define T1CON_ADDR 0x0018
61 #define T1GCON_ADDR 0x0019
62 #define TMR2_ADDR 0x001A
63 #define PR2_ADDR 0x001B
64 #define T2CON_ADDR 0x001C
65 #define TRISA_ADDR 0x008C
66 #define TRISB_ADDR 0x008D
67 #define TRISC_ADDR 0x008E
68 #define PIE1_ADDR 0x0091
69 #define PIE2_ADDR 0x0092
70 #define PIE3_ADDR 0x0093
71 #define OPTION_REG_ADDR 0x0095
72 #define PCON_ADDR 0x0096
73 #define WDTCON_ADDR 0x0097
74 #define OSCTUNE_ADDR 0x0098
75 #define OSCCON_ADDR 0x0099
76 #define OSCSTAT_ADDR 0x009A
77 #define ADRES_ADDR 0x009B
78 #define ADRESL_ADDR 0x009B
79 #define ADRESH_ADDR 0x009C
80 #define ADCON0_ADDR 0x009D
81 #define ADCON1_ADDR 0x009E
82 #define ADCON2_ADDR 0x009F
83 #define LATA_ADDR 0x010C
84 #define LATB_ADDR 0x010D
85 #define LATC_ADDR 0x010E
86 #define CM1CON0_ADDR 0x0111
87 #define CM1CON1_ADDR 0x0112
88 #define CM2CON0_ADDR 0x0113
89 #define CM2CON1_ADDR 0x0114
90 #define CMOUT_ADDR 0x0115
91 #define BORCON_ADDR 0x0116
92 #define FVRCON_ADDR 0x0117
93 #define DAC1CON0_ADDR 0x0118
94 #define DAC1CON1_ADDR 0x0119
95 #define ZCD1CON_ADDR 0x011C
96 #define ANSELA_ADDR 0x018C
97 #define ANSELB_ADDR 0x018D
98 #define ANSELC_ADDR 0x018E
99 #define PMADR_ADDR 0x0191
100 #define PMADRL_ADDR 0x0191
101 #define PMADRH_ADDR 0x0192
102 #define PMDAT_ADDR 0x0193
103 #define PMDATL_ADDR 0x0193
104 #define PMDATH_ADDR 0x0194
105 #define PMCON1_ADDR 0x0195
106 #define PMCON2_ADDR 0x0196
107 #define RC1REG_ADDR 0x0199
108 #define RCREG_ADDR 0x0199
109 #define RCREG1_ADDR 0x0199
110 #define TX1REG_ADDR 0x019A
111 #define TXREG_ADDR 0x019A
112 #define TXREG1_ADDR 0x019A
113 #define SP1BRG_ADDR 0x019B
114 #define SP1BRGL_ADDR 0x019B
115 #define SPBRG_ADDR 0x019B
116 #define SPBRG1_ADDR 0x019B
117 #define SPBRGL_ADDR 0x019B
118 #define SP1BRGH_ADDR 0x019C
119 #define SPBRGH_ADDR 0x019C
120 #define SPBRGH1_ADDR 0x019C
121 #define RC1STA_ADDR 0x019D
122 #define RCSTA_ADDR 0x019D
123 #define RCSTA1_ADDR 0x019D
124 #define TX1STA_ADDR 0x019E
125 #define TXSTA_ADDR 0x019E
126 #define TXSTA1_ADDR 0x019E
127 #define BAUD1CON_ADDR 0x019F
128 #define BAUDCON_ADDR 0x019F
129 #define BAUDCON1_ADDR 0x019F
130 #define BAUDCTL_ADDR 0x019F
131 #define BAUDCTL1_ADDR 0x019F
132 #define WPUA_ADDR 0x020C
133 #define WPUB_ADDR 0x020D
134 #define WPUC_ADDR 0x020E
135 #define SSP1BUF_ADDR 0x0211
136 #define SSPBUF_ADDR 0x0211
137 #define SSP1ADD_ADDR 0x0212
138 #define SSPADD_ADDR 0x0212
139 #define SSP1MSK_ADDR 0x0213
140 #define SSPMSK_ADDR 0x0213
141 #define SSP1STAT_ADDR 0x0214
142 #define SSPSTAT_ADDR 0x0214
143 #define SSP1CON_ADDR 0x0215
144 #define SSP1CON1_ADDR 0x0215
145 #define SSPCON_ADDR 0x0215
146 #define SSPCON1_ADDR 0x0215
147 #define SSP1CON2_ADDR 0x0216
148 #define SSPCON2_ADDR 0x0216
149 #define SSP1CON3_ADDR 0x0217
150 #define SSPCON3_ADDR 0x0217
151 #define ODCONA_ADDR 0x028C
152 #define ODCONB_ADDR 0x028D
153 #define ODCONC_ADDR 0x028E
154 #define CCPR1_ADDR 0x0291
155 #define CCPR1L_ADDR 0x0291
156 #define CCPR1H_ADDR 0x0292
157 #define CCP1CON_ADDR 0x0293
158 #define ECCP1CON_ADDR 0x0293
159 #define CCPR2_ADDR 0x0298
160 #define CCPR2L_ADDR 0x0298
161 #define CCPR2H_ADDR 0x0299
162 #define CCP2CON_ADDR 0x029A
163 #define ECCP2CON_ADDR 0x029A
164 #define CCPTMRS_ADDR 0x029E
165 #define SLRCONA_ADDR 0x030C
166 #define SLRCONB_ADDR 0x030D
167 #define SLRCONC_ADDR 0x030E
168 #define INLVLA_ADDR 0x038C
169 #define INLVLB_ADDR 0x038D
170 #define INLVLC_ADDR 0x038E
171 #define IOCAP_ADDR 0x0391
172 #define IOCAN_ADDR 0x0392
173 #define IOCAF_ADDR 0x0393
174 #define IOCBP_ADDR 0x0394
175 #define IOCBN_ADDR 0x0395
176 #define IOCBF_ADDR 0x0396
177 #define IOCCP_ADDR 0x0397
178 #define IOCCN_ADDR 0x0398
179 #define IOCCF_ADDR 0x0399
180 #define TMR4_ADDR 0x0415
181 #define PR4_ADDR 0x0416
182 #define T4CON_ADDR 0x0417
183 #define TMR6_ADDR 0x041C
184 #define PR6_ADDR 0x041D
185 #define T6CON_ADDR 0x041E
186 #define OPA1CON_ADDR 0x0511
187 #define OPA2CON_ADDR 0x0515
188 #define PWM3DCL_ADDR 0x0617
189 #define PWM3DCH_ADDR 0x0618
190 #define PWM3CON_ADDR 0x0619
191 #define PWM3CON0_ADDR 0x0619
192 #define PWM4DCL_ADDR 0x061A
193 #define PWM4DCH_ADDR 0x061B
194 #define PWM4CON_ADDR 0x061C
195 #define PWM4CON0_ADDR 0x061C
196 #define COG1PHR_ADDR 0x0691
197 #define COG1PHF_ADDR 0x0692
198 #define COG1BLKR_ADDR 0x0693
199 #define COG1BLKF_ADDR 0x0694
200 #define COG1DBR_ADDR 0x0695
201 #define COG1DBF_ADDR 0x0696
202 #define COG1CON0_ADDR 0x0697
203 #define COG1CON1_ADDR 0x0698
204 #define COG1RIS_ADDR 0x0699
205 #define COG1RSIM_ADDR 0x069A
206 #define COG1FIS_ADDR 0x069B
207 #define COG1FSIM_ADDR 0x069C
208 #define COG1ASD0_ADDR 0x069D
209 #define COG1ASD1_ADDR 0x069E
210 #define COG1STR_ADDR 0x069F
211 #define PPSLOCK_ADDR 0x0E0F
212 #define INTPPS_ADDR 0x0E10
213 #define T0CKIPPS_ADDR 0x0E11
214 #define T1CKIPPS_ADDR 0x0E12
215 #define T1GPPS_ADDR 0x0E13
216 #define CCP1PPS_ADDR 0x0E14
217 #define CCP2PPS_ADDR 0x0E15
218 #define COGINPPS_ADDR 0x0E17
219 #define SSPCLKPPS_ADDR 0x0E20
220 #define SSPDATPPS_ADDR 0x0E21
221 #define SSPSSPPS_ADDR 0x0E22
222 #define RXPPS_ADDR 0x0E24
223 #define CKPPS_ADDR 0x0E25
224 #define CLCIN0PPS_ADDR 0x0E28
225 #define CLCIN1PPS_ADDR 0x0E29
226 #define CLCIN2PPS_ADDR 0x0E2A
227 #define CLCIN3PPS_ADDR 0x0E2B
228 #define RA0PPS_ADDR 0x0E90
229 #define RA1PPS_ADDR 0x0E91
230 #define RA2PPS_ADDR 0x0E92
231 #define RA4PPS_ADDR 0x0E94
232 #define RA5PPS_ADDR 0x0E95
233 #define RB4PPS_ADDR 0x0E9C
234 #define RB5PPS_ADDR 0x0E9D
235 #define RB6PPS_ADDR 0x0E9E
236 #define RB7PPS_ADDR 0x0E9F
237 #define RC0PPS_ADDR 0x0EA0
238 #define RC1PPS_ADDR 0x0EA1
239 #define RC2PPS_ADDR 0x0EA2
240 #define RC3PPS_ADDR 0x0EA3
241 #define RC4PPS_ADDR 0x0EA4
242 #define RC5PPS_ADDR 0x0EA5
243 #define RC6PPS_ADDR 0x0EA6
244 #define RC7PPS_ADDR 0x0EA7
245 #define CLCDATA_ADDR 0x0F0F
246 #define CLC1CON_ADDR 0x0F10
247 #define CLC1POL_ADDR 0x0F11
248 #define CLC1SEL0_ADDR 0x0F12
249 #define CLC1SEL1_ADDR 0x0F13
250 #define CLC1SEL2_ADDR 0x0F14
251 #define CLC1SEL3_ADDR 0x0F15
252 #define CLC1GLS0_ADDR 0x0F16
253 #define CLC1GLS1_ADDR 0x0F17
254 #define CLC1GLS2_ADDR 0x0F18
255 #define CLC1GLS3_ADDR 0x0F19
256 #define CLC2CON_ADDR 0x0F1A
257 #define CLC2POL_ADDR 0x0F1B
258 #define CLC2SEL0_ADDR 0x0F1C
259 #define CLC2SEL1_ADDR 0x0F1D
260 #define CLC2SEL2_ADDR 0x0F1E
261 #define CLC2SEL3_ADDR 0x0F1F
262 #define CLC2GLS0_ADDR 0x0F20
263 #define CLC2GLS1_ADDR 0x0F21
264 #define CLC2GLS2_ADDR 0x0F22
265 #define CLC2GLS3_ADDR 0x0F23
266 #define CLC3CON_ADDR 0x0F24
267 #define CLC3POL_ADDR 0x0F25
268 #define CLC3SEL0_ADDR 0x0F26
269 #define CLC3SEL1_ADDR 0x0F27
270 #define CLC3SEL2_ADDR 0x0F28
271 #define CLC3SEL3_ADDR 0x0F29
272 #define CLC3GLS0_ADDR 0x0F2A
273 #define CLC3GLS1_ADDR 0x0F2B
274 #define CLC3GLS2_ADDR 0x0F2C
275 #define CLC3GLS3_ADDR 0x0F2D
276 #define STATUS_SHAD_ADDR 0x0FE4
277 #define WREG_SHAD_ADDR 0x0FE5
278 #define BSR_SHAD_ADDR 0x0FE6
279 #define PCLATH_SHAD_ADDR 0x0FE7
280 #define FSR0L_SHAD_ADDR 0x0FE8
281 #define FSR0H_SHAD_ADDR 0x0FE9
282 #define FSR1L_SHAD_ADDR 0x0FEA
283 #define FSR1H_SHAD_ADDR 0x0FEB
284 #define STKPTR_ADDR 0x0FED
285 #define TOSL_ADDR 0x0FEE
286 #define TOSH_ADDR 0x0FEF
288 #endif // #ifndef NO_ADDR_DEFINES
290 //==============================================================================
292 // Register Definitions
294 //==============================================================================
296 extern __at(0x0000) __sfr INDF0
;
297 extern __at(0x0001) __sfr INDF1
;
298 extern __at(0x0002) __sfr PCL
;
300 //==============================================================================
303 extern __at(0x0003) __sfr STATUS
;
317 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
325 //==============================================================================
327 extern __at(0x0004) __sfr FSR0
;
328 extern __at(0x0004) __sfr FSR0L
;
329 extern __at(0x0005) __sfr FSR0H
;
330 extern __at(0x0006) __sfr FSR1
;
331 extern __at(0x0006) __sfr FSR1L
;
332 extern __at(0x0007) __sfr FSR1H
;
334 //==============================================================================
337 extern __at(0x0008) __sfr BSR
;
360 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
368 //==============================================================================
370 extern __at(0x0009) __sfr WREG
;
371 extern __at(0x000A) __sfr PCLATH
;
373 //==============================================================================
376 extern __at(0x000B) __sfr INTCON
;
405 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
418 //==============================================================================
421 //==============================================================================
424 extern __at(0x000C) __sfr PORTA
;
447 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
456 //==============================================================================
459 //==============================================================================
462 extern __at(0x000D) __sfr PORTB
;
476 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
483 //==============================================================================
486 //==============================================================================
489 extern __at(0x000E) __sfr PORTC
;
503 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
514 //==============================================================================
517 //==============================================================================
520 extern __at(0x0011) __sfr PIR1
;
533 unsigned TMR1GIF
: 1;
549 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
559 #define _TMR1GIF 0x80
561 //==============================================================================
564 //==============================================================================
567 extern __at(0x0012) __sfr PIR2
;
581 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
591 //==============================================================================
594 //==============================================================================
597 extern __at(0x0013) __sfr PIR3
;
611 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
619 //==============================================================================
621 extern __at(0x0015) __sfr TMR0
;
622 extern __at(0x0016) __sfr TMR1
;
623 extern __at(0x0016) __sfr TMR1L
;
624 extern __at(0x0017) __sfr TMR1H
;
626 //==============================================================================
629 extern __at(0x0018) __sfr T1CON
;
637 unsigned NOT_T1SYNC
: 1;
638 unsigned T1OSCEN
: 1;
639 unsigned T1CKPS0
: 1;
640 unsigned T1CKPS1
: 1;
641 unsigned TMR1CS0
: 1;
642 unsigned TMR1CS1
: 1;
659 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
662 #define _NOT_T1SYNC 0x04
663 #define _T1OSCEN 0x08
664 #define _T1CKPS0 0x10
665 #define _T1CKPS1 0x20
666 #define _TMR1CS0 0x40
667 #define _TMR1CS1 0x80
669 //==============================================================================
672 //==============================================================================
675 extern __at(0x0019) __sfr T1GCON
;
684 unsigned T1GGO_NOT_DONE
: 1;
698 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
703 #define _T1GGO_NOT_DONE 0x08
709 //==============================================================================
711 extern __at(0x001A) __sfr TMR2
;
712 extern __at(0x001B) __sfr PR2
;
714 //==============================================================================
717 extern __at(0x001C) __sfr T2CON
;
723 unsigned T2CKPS0
: 1;
724 unsigned T2CKPS1
: 1;
726 unsigned T2OUTPS0
: 1;
727 unsigned T2OUTPS1
: 1;
728 unsigned T2OUTPS2
: 1;
729 unsigned T2OUTPS3
: 1;
742 unsigned T2OUTPS
: 4;
747 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
749 #define _T2CKPS0 0x01
750 #define _T2CKPS1 0x02
752 #define _T2OUTPS0 0x08
753 #define _T2OUTPS1 0x10
754 #define _T2OUTPS2 0x20
755 #define _T2OUTPS3 0x40
757 //==============================================================================
760 //==============================================================================
763 extern __at(0x008C) __sfr TRISA
;
777 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
785 //==============================================================================
788 //==============================================================================
791 extern __at(0x008D) __sfr TRISB
;
805 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
812 //==============================================================================
815 //==============================================================================
818 extern __at(0x008E) __sfr TRISC
;
832 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
843 //==============================================================================
846 //==============================================================================
849 extern __at(0x0091) __sfr PIE1
;
862 unsigned TMR1GIE
: 1;
878 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
888 #define _TMR1GIE 0x80
890 //==============================================================================
893 //==============================================================================
896 extern __at(0x0092) __sfr PIE2
;
910 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
920 //==============================================================================
923 //==============================================================================
926 extern __at(0x0093) __sfr PIE3
;
940 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
948 //==============================================================================
951 //==============================================================================
954 extern __at(0x0095) __sfr OPTION_REG
;
967 unsigned NOT_WPUEN
: 1;
987 } __OPTION_REGbits_t
;
989 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1000 #define _NOT_WPUEN 0x80
1002 //==============================================================================
1005 //==============================================================================
1008 extern __at(0x0096) __sfr PCON
;
1012 unsigned NOT_BOR
: 1;
1013 unsigned NOT_POR
: 1;
1014 unsigned NOT_RI
: 1;
1015 unsigned NOT_RMCLR
: 1;
1016 unsigned NOT_RWDT
: 1;
1018 unsigned STKUNF
: 1;
1019 unsigned STKOVF
: 1;
1022 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1024 #define _NOT_BOR 0x01
1025 #define _NOT_POR 0x02
1026 #define _NOT_RI 0x04
1027 #define _NOT_RMCLR 0x08
1028 #define _NOT_RWDT 0x10
1029 #define _STKUNF 0x40
1030 #define _STKOVF 0x80
1032 //==============================================================================
1035 //==============================================================================
1038 extern __at(0x0097) __sfr WDTCON
;
1044 unsigned SWDTEN
: 1;
1045 unsigned WDTPS0
: 1;
1046 unsigned WDTPS1
: 1;
1047 unsigned WDTPS2
: 1;
1048 unsigned WDTPS3
: 1;
1049 unsigned WDTPS4
: 1;
1062 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1064 #define _SWDTEN 0x01
1065 #define _WDTPS0 0x02
1066 #define _WDTPS1 0x04
1067 #define _WDTPS2 0x08
1068 #define _WDTPS3 0x10
1069 #define _WDTPS4 0x20
1071 //==============================================================================
1074 //==============================================================================
1077 extern __at(0x0098) __sfr OSCTUNE
;
1100 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1109 //==============================================================================
1112 //==============================================================================
1115 extern __at(0x0099) __sfr OSCCON
;
1128 unsigned SPLLEN
: 1;
1145 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1153 #define _SPLLEN 0x80
1155 //==============================================================================
1158 //==============================================================================
1161 extern __at(0x009A) __sfr OSCSTAT
;
1165 unsigned HFIOFS
: 1;
1166 unsigned LFIOFR
: 1;
1167 unsigned MFIOFR
: 1;
1168 unsigned HFIOFL
: 1;
1169 unsigned HFIOFR
: 1;
1175 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1177 #define _HFIOFS 0x01
1178 #define _LFIOFR 0x02
1179 #define _MFIOFR 0x04
1180 #define _HFIOFL 0x08
1181 #define _HFIOFR 0x10
1186 //==============================================================================
1188 extern __at(0x009B) __sfr ADRES
;
1189 extern __at(0x009B) __sfr ADRESL
;
1190 extern __at(0x009C) __sfr ADRESH
;
1192 //==============================================================================
1195 extern __at(0x009D) __sfr ADCON0
;
1202 unsigned GO_NOT_DONE
: 1;
1243 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1246 #define _GO_NOT_DONE 0x02
1255 //==============================================================================
1258 //==============================================================================
1261 extern __at(0x009E) __sfr ADCON1
;
1267 unsigned ADPREF0
: 1;
1268 unsigned ADPREF1
: 1;
1269 unsigned ADNREF
: 1;
1279 unsigned ADPREF
: 2;
1291 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1293 #define _ADPREF0 0x01
1294 #define _ADPREF1 0x02
1295 #define _ADNREF 0x04
1301 //==============================================================================
1304 //==============================================================================
1307 extern __at(0x009F) __sfr ADCON2
;
1317 unsigned TRIGSEL0
: 1;
1318 unsigned TRIGSEL1
: 1;
1319 unsigned TRIGSEL2
: 1;
1320 unsigned TRIGSEL3
: 1;
1326 unsigned TRIGSEL
: 4;
1330 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1332 #define _TRIGSEL0 0x10
1333 #define _TRIGSEL1 0x20
1334 #define _TRIGSEL2 0x40
1335 #define _TRIGSEL3 0x80
1337 //==============================================================================
1340 //==============================================================================
1343 extern __at(0x010C) __sfr LATA
;
1357 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1365 //==============================================================================
1368 //==============================================================================
1371 extern __at(0x010D) __sfr LATB
;
1385 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
1392 //==============================================================================
1395 //==============================================================================
1398 extern __at(0x010E) __sfr LATC
;
1412 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1423 //==============================================================================
1426 //==============================================================================
1429 extern __at(0x0111) __sfr CM1CON0
;
1433 unsigned C1SYNC
: 1;
1443 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1445 #define _C1SYNC 0x01
1453 //==============================================================================
1456 //==============================================================================
1459 extern __at(0x0112) __sfr CM1CON1
;
1465 unsigned C1NCH0
: 1;
1466 unsigned C1NCH1
: 1;
1467 unsigned C1NCH2
: 1;
1468 unsigned C1PCH0
: 1;
1469 unsigned C1PCH1
: 1;
1470 unsigned C1PCH2
: 1;
1471 unsigned C1INTN
: 1;
1472 unsigned C1INTP
: 1;
1489 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1491 #define _C1NCH0 0x01
1492 #define _C1NCH1 0x02
1493 #define _C1NCH2 0x04
1494 #define _C1PCH0 0x08
1495 #define _C1PCH1 0x10
1496 #define _C1PCH2 0x20
1497 #define _C1INTN 0x40
1498 #define _C1INTP 0x80
1500 //==============================================================================
1503 //==============================================================================
1506 extern __at(0x0113) __sfr CM2CON0
;
1510 unsigned C2SYNC
: 1;
1520 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
1522 #define _C2SYNC 0x01
1530 //==============================================================================
1533 //==============================================================================
1536 extern __at(0x0114) __sfr CM2CON1
;
1542 unsigned C2NCH0
: 1;
1543 unsigned C2NCH1
: 1;
1544 unsigned C2NCH2
: 1;
1545 unsigned C2PCH0
: 1;
1546 unsigned C2PCH1
: 1;
1547 unsigned C2PCH2
: 1;
1548 unsigned C2INTN
: 1;
1549 unsigned C2INTP
: 1;
1566 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
1568 #define _C2NCH0 0x01
1569 #define _C2NCH1 0x02
1570 #define _C2NCH2 0x04
1571 #define _C2PCH0 0x08
1572 #define _C2PCH1 0x10
1573 #define _C2PCH2 0x20
1574 #define _C2INTN 0x40
1575 #define _C2INTP 0x80
1577 //==============================================================================
1580 //==============================================================================
1583 extern __at(0x0115) __sfr CMOUT
;
1587 unsigned MC1OUT
: 1;
1588 unsigned MC2OUT
: 1;
1597 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1599 #define _MC1OUT 0x01
1600 #define _MC2OUT 0x02
1602 //==============================================================================
1605 //==============================================================================
1608 extern __at(0x0116) __sfr BORCON
;
1612 unsigned BORRDY
: 1;
1619 unsigned SBOREN
: 1;
1622 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1624 #define _BORRDY 0x01
1626 #define _SBOREN 0x80
1628 //==============================================================================
1631 //==============================================================================
1634 extern __at(0x0117) __sfr FVRCON
;
1640 unsigned ADFVR0
: 1;
1641 unsigned ADFVR1
: 1;
1642 unsigned CDAFVR0
: 1;
1643 unsigned CDAFVR1
: 1;
1646 unsigned FVRRDY
: 1;
1659 unsigned CDAFVR
: 2;
1664 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1666 #define _ADFVR0 0x01
1667 #define _ADFVR1 0x02
1668 #define _CDAFVR0 0x04
1669 #define _CDAFVR1 0x08
1672 #define _FVRRDY 0x40
1675 //==============================================================================
1678 //==============================================================================
1681 extern __at(0x0118) __sfr DAC1CON0
;
1687 unsigned DAC1NSS
: 1;
1689 unsigned DAC1PSS0
: 1;
1690 unsigned DAC1PSS1
: 1;
1691 unsigned DAC1OE2
: 1;
1692 unsigned DAC1OE1
: 1;
1694 unsigned DAC1EN
: 1;
1699 unsigned DACNSS
: 1;
1701 unsigned DACPSS0
: 1;
1702 unsigned DACPSS1
: 1;
1703 unsigned DACOE0
: 1;
1704 unsigned DACOE1
: 1;
1712 unsigned DACPSS
: 2;
1719 unsigned DAC1PSS
: 2;
1731 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1733 #define _DAC1NSS 0x01
1734 #define _DACNSS 0x01
1735 #define _DAC1PSS0 0x04
1736 #define _DACPSS0 0x04
1737 #define _DAC1PSS1 0x08
1738 #define _DACPSS1 0x08
1739 #define _DAC1OE2 0x10
1740 #define _DACOE0 0x10
1741 #define _DAC1OE1 0x20
1742 #define _DACOE1 0x20
1743 #define _DAC1EN 0x80
1746 //==============================================================================
1749 //==============================================================================
1752 extern __at(0x0119) __sfr DAC1CON1
;
1758 unsigned DAC1R0
: 1;
1759 unsigned DAC1R1
: 1;
1760 unsigned DAC1R2
: 1;
1761 unsigned DAC1R3
: 1;
1762 unsigned DAC1R4
: 1;
1763 unsigned DAC1R5
: 1;
1764 unsigned DAC1R6
: 1;
1765 unsigned DAC1R7
: 1;
1781 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
1783 #define _DAC1R0 0x01
1785 #define _DAC1R1 0x02
1787 #define _DAC1R2 0x04
1789 #define _DAC1R3 0x08
1791 #define _DAC1R4 0x10
1793 #define _DAC1R5 0x20
1795 #define _DAC1R6 0x40
1797 #define _DAC1R7 0x80
1800 //==============================================================================
1803 //==============================================================================
1806 extern __at(0x011C) __sfr ZCD1CON
;
1810 unsigned ZCD1INTN
: 1;
1811 unsigned ZCD1INTP
: 1;
1814 unsigned ZCD1POL
: 1;
1815 unsigned ZCD1OUT
: 1;
1817 unsigned ZCD1EN
: 1;
1820 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
1822 #define _ZCD1INTN 0x01
1823 #define _ZCD1INTP 0x02
1824 #define _ZCD1POL 0x10
1825 #define _ZCD1OUT 0x20
1826 #define _ZCD1EN 0x80
1828 //==============================================================================
1831 //==============================================================================
1834 extern __at(0x018C) __sfr ANSELA
;
1848 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
1856 //==============================================================================
1859 //==============================================================================
1862 extern __at(0x018D) __sfr ANSELB
;
1876 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits
;
1883 //==============================================================================
1886 //==============================================================================
1889 extern __at(0x018E) __sfr ANSELC
;
1903 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits
;
1912 //==============================================================================
1914 extern __at(0x0191) __sfr PMADR
;
1915 extern __at(0x0191) __sfr PMADRL
;
1916 extern __at(0x0192) __sfr PMADRH
;
1917 extern __at(0x0193) __sfr PMDAT
;
1918 extern __at(0x0193) __sfr PMDATL
;
1919 extern __at(0x0194) __sfr PMDATH
;
1921 //==============================================================================
1924 extern __at(0x0195) __sfr PMCON1
;
1938 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
1948 //==============================================================================
1950 extern __at(0x0196) __sfr PMCON2
;
1951 extern __at(0x0199) __sfr RC1REG
;
1952 extern __at(0x0199) __sfr RCREG
;
1953 extern __at(0x0199) __sfr RCREG1
;
1954 extern __at(0x019A) __sfr TX1REG
;
1955 extern __at(0x019A) __sfr TXREG
;
1956 extern __at(0x019A) __sfr TXREG1
;
1957 extern __at(0x019B) __sfr SP1BRG
;
1958 extern __at(0x019B) __sfr SP1BRGL
;
1959 extern __at(0x019B) __sfr SPBRG
;
1960 extern __at(0x019B) __sfr SPBRG1
;
1961 extern __at(0x019B) __sfr SPBRGL
;
1962 extern __at(0x019C) __sfr SP1BRGH
;
1963 extern __at(0x019C) __sfr SPBRGH
;
1964 extern __at(0x019C) __sfr SPBRGH1
;
1966 //==============================================================================
1969 extern __at(0x019D) __sfr RC1STA
;
1983 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
1994 //==============================================================================
1997 //==============================================================================
2000 extern __at(0x019D) __sfr RCSTA
;
2014 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
2016 #define _RCSTA_RX9D 0x01
2017 #define _RCSTA_OERR 0x02
2018 #define _RCSTA_FERR 0x04
2019 #define _RCSTA_ADDEN 0x08
2020 #define _RCSTA_CREN 0x10
2021 #define _RCSTA_SREN 0x20
2022 #define _RCSTA_RX9 0x40
2023 #define _RCSTA_SPEN 0x80
2025 //==============================================================================
2028 //==============================================================================
2031 extern __at(0x019D) __sfr RCSTA1
;
2045 extern __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits
;
2047 #define _RCSTA1_RX9D 0x01
2048 #define _RCSTA1_OERR 0x02
2049 #define _RCSTA1_FERR 0x04
2050 #define _RCSTA1_ADDEN 0x08
2051 #define _RCSTA1_CREN 0x10
2052 #define _RCSTA1_SREN 0x20
2053 #define _RCSTA1_RX9 0x40
2054 #define _RCSTA1_SPEN 0x80
2056 //==============================================================================
2059 //==============================================================================
2062 extern __at(0x019E) __sfr TX1STA
;
2076 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
2087 //==============================================================================
2090 //==============================================================================
2093 extern __at(0x019E) __sfr TXSTA
;
2107 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
2109 #define _TXSTA_TX9D 0x01
2110 #define _TXSTA_TRMT 0x02
2111 #define _TXSTA_BRGH 0x04
2112 #define _TXSTA_SENDB 0x08
2113 #define _TXSTA_SYNC 0x10
2114 #define _TXSTA_TXEN 0x20
2115 #define _TXSTA_TX9 0x40
2116 #define _TXSTA_CSRC 0x80
2118 //==============================================================================
2121 //==============================================================================
2124 extern __at(0x019E) __sfr TXSTA1
;
2138 extern __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits
;
2140 #define _TXSTA1_TX9D 0x01
2141 #define _TXSTA1_TRMT 0x02
2142 #define _TXSTA1_BRGH 0x04
2143 #define _TXSTA1_SENDB 0x08
2144 #define _TXSTA1_SYNC 0x10
2145 #define _TXSTA1_TXEN 0x20
2146 #define _TXSTA1_TX9 0x40
2147 #define _TXSTA1_CSRC 0x80
2149 //==============================================================================
2152 //==============================================================================
2155 extern __at(0x019F) __sfr BAUD1CON
;
2166 unsigned ABDOVF
: 1;
2169 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2176 #define _ABDOVF 0x80
2178 //==============================================================================
2181 //==============================================================================
2184 extern __at(0x019F) __sfr BAUDCON
;
2195 unsigned ABDOVF
: 1;
2198 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits
;
2200 #define _BAUDCON_ABDEN 0x01
2201 #define _BAUDCON_WUE 0x02
2202 #define _BAUDCON_BRG16 0x08
2203 #define _BAUDCON_SCKP 0x10
2204 #define _BAUDCON_RCIDL 0x40
2205 #define _BAUDCON_ABDOVF 0x80
2207 //==============================================================================
2210 //==============================================================================
2213 extern __at(0x019F) __sfr BAUDCON1
;
2224 unsigned ABDOVF
: 1;
2227 extern __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits
;
2229 #define _BAUDCON1_ABDEN 0x01
2230 #define _BAUDCON1_WUE 0x02
2231 #define _BAUDCON1_BRG16 0x08
2232 #define _BAUDCON1_SCKP 0x10
2233 #define _BAUDCON1_RCIDL 0x40
2234 #define _BAUDCON1_ABDOVF 0x80
2236 //==============================================================================
2239 //==============================================================================
2242 extern __at(0x019F) __sfr BAUDCTL
;
2253 unsigned ABDOVF
: 1;
2256 extern __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits
;
2258 #define _BAUDCTL_ABDEN 0x01
2259 #define _BAUDCTL_WUE 0x02
2260 #define _BAUDCTL_BRG16 0x08
2261 #define _BAUDCTL_SCKP 0x10
2262 #define _BAUDCTL_RCIDL 0x40
2263 #define _BAUDCTL_ABDOVF 0x80
2265 //==============================================================================
2268 //==============================================================================
2271 extern __at(0x019F) __sfr BAUDCTL1
;
2282 unsigned ABDOVF
: 1;
2285 extern __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
2287 #define _BAUDCTL1_ABDEN 0x01
2288 #define _BAUDCTL1_WUE 0x02
2289 #define _BAUDCTL1_BRG16 0x08
2290 #define _BAUDCTL1_SCKP 0x10
2291 #define _BAUDCTL1_RCIDL 0x40
2292 #define _BAUDCTL1_ABDOVF 0x80
2294 //==============================================================================
2297 //==============================================================================
2300 extern __at(0x020C) __sfr WPUA
;
2323 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
2332 //==============================================================================
2335 //==============================================================================
2338 extern __at(0x020D) __sfr WPUB
;
2352 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
2359 //==============================================================================
2362 //==============================================================================
2365 extern __at(0x020E) __sfr WPUC
;
2379 extern __at(0x020E) volatile __WPUCbits_t WPUCbits
;
2390 //==============================================================================
2393 //==============================================================================
2396 extern __at(0x0211) __sfr SSP1BUF
;
2402 unsigned SSP1BUF0
: 1;
2403 unsigned SSP1BUF1
: 1;
2404 unsigned SSP1BUF2
: 1;
2405 unsigned SSP1BUF3
: 1;
2406 unsigned SSP1BUF4
: 1;
2407 unsigned SSP1BUF5
: 1;
2408 unsigned SSP1BUF6
: 1;
2409 unsigned SSP1BUF7
: 1;
2425 extern __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits
;
2427 #define _SSP1BUF0 0x01
2429 #define _SSP1BUF1 0x02
2431 #define _SSP1BUF2 0x04
2433 #define _SSP1BUF3 0x08
2435 #define _SSP1BUF4 0x10
2437 #define _SSP1BUF5 0x20
2439 #define _SSP1BUF6 0x40
2441 #define _SSP1BUF7 0x80
2444 //==============================================================================
2447 //==============================================================================
2450 extern __at(0x0211) __sfr SSPBUF
;
2456 unsigned SSP1BUF0
: 1;
2457 unsigned SSP1BUF1
: 1;
2458 unsigned SSP1BUF2
: 1;
2459 unsigned SSP1BUF3
: 1;
2460 unsigned SSP1BUF4
: 1;
2461 unsigned SSP1BUF5
: 1;
2462 unsigned SSP1BUF6
: 1;
2463 unsigned SSP1BUF7
: 1;
2479 extern __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits
;
2481 #define _SSPBUF_SSP1BUF0 0x01
2482 #define _SSPBUF_BUF0 0x01
2483 #define _SSPBUF_SSP1BUF1 0x02
2484 #define _SSPBUF_BUF1 0x02
2485 #define _SSPBUF_SSP1BUF2 0x04
2486 #define _SSPBUF_BUF2 0x04
2487 #define _SSPBUF_SSP1BUF3 0x08
2488 #define _SSPBUF_BUF3 0x08
2489 #define _SSPBUF_SSP1BUF4 0x10
2490 #define _SSPBUF_BUF4 0x10
2491 #define _SSPBUF_SSP1BUF5 0x20
2492 #define _SSPBUF_BUF5 0x20
2493 #define _SSPBUF_SSP1BUF6 0x40
2494 #define _SSPBUF_BUF6 0x40
2495 #define _SSPBUF_SSP1BUF7 0x80
2496 #define _SSPBUF_BUF7 0x80
2498 //==============================================================================
2501 //==============================================================================
2504 extern __at(0x0212) __sfr SSP1ADD
;
2510 unsigned SSP1ADD0
: 1;
2511 unsigned SSP1ADD1
: 1;
2512 unsigned SSP1ADD2
: 1;
2513 unsigned SSP1ADD3
: 1;
2514 unsigned SSP1ADD4
: 1;
2515 unsigned SSP1ADD5
: 1;
2516 unsigned SSP1ADD6
: 1;
2517 unsigned SSP1ADD7
: 1;
2533 extern __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits
;
2535 #define _SSP1ADD0 0x01
2537 #define _SSP1ADD1 0x02
2539 #define _SSP1ADD2 0x04
2541 #define _SSP1ADD3 0x08
2543 #define _SSP1ADD4 0x10
2545 #define _SSP1ADD5 0x20
2547 #define _SSP1ADD6 0x40
2549 #define _SSP1ADD7 0x80
2552 //==============================================================================
2555 //==============================================================================
2558 extern __at(0x0212) __sfr SSPADD
;
2564 unsigned SSP1ADD0
: 1;
2565 unsigned SSP1ADD1
: 1;
2566 unsigned SSP1ADD2
: 1;
2567 unsigned SSP1ADD3
: 1;
2568 unsigned SSP1ADD4
: 1;
2569 unsigned SSP1ADD5
: 1;
2570 unsigned SSP1ADD6
: 1;
2571 unsigned SSP1ADD7
: 1;
2587 extern __at(0x0212) volatile __SSPADDbits_t SSPADDbits
;
2589 #define _SSPADD_SSP1ADD0 0x01
2590 #define _SSPADD_ADD0 0x01
2591 #define _SSPADD_SSP1ADD1 0x02
2592 #define _SSPADD_ADD1 0x02
2593 #define _SSPADD_SSP1ADD2 0x04
2594 #define _SSPADD_ADD2 0x04
2595 #define _SSPADD_SSP1ADD3 0x08
2596 #define _SSPADD_ADD3 0x08
2597 #define _SSPADD_SSP1ADD4 0x10
2598 #define _SSPADD_ADD4 0x10
2599 #define _SSPADD_SSP1ADD5 0x20
2600 #define _SSPADD_ADD5 0x20
2601 #define _SSPADD_SSP1ADD6 0x40
2602 #define _SSPADD_ADD6 0x40
2603 #define _SSPADD_SSP1ADD7 0x80
2604 #define _SSPADD_ADD7 0x80
2606 //==============================================================================
2609 //==============================================================================
2612 extern __at(0x0213) __sfr SSP1MSK
;
2618 unsigned SSP1MSK0
: 1;
2619 unsigned SSP1MSK1
: 1;
2620 unsigned SSP1MSK2
: 1;
2621 unsigned SSP1MSK3
: 1;
2622 unsigned SSP1MSK4
: 1;
2623 unsigned SSP1MSK5
: 1;
2624 unsigned SSP1MSK6
: 1;
2625 unsigned SSP1MSK7
: 1;
2641 extern __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits
;
2643 #define _SSP1MSK0 0x01
2645 #define _SSP1MSK1 0x02
2647 #define _SSP1MSK2 0x04
2649 #define _SSP1MSK3 0x08
2651 #define _SSP1MSK4 0x10
2653 #define _SSP1MSK5 0x20
2655 #define _SSP1MSK6 0x40
2657 #define _SSP1MSK7 0x80
2660 //==============================================================================
2663 //==============================================================================
2666 extern __at(0x0213) __sfr SSPMSK
;
2672 unsigned SSP1MSK0
: 1;
2673 unsigned SSP1MSK1
: 1;
2674 unsigned SSP1MSK2
: 1;
2675 unsigned SSP1MSK3
: 1;
2676 unsigned SSP1MSK4
: 1;
2677 unsigned SSP1MSK5
: 1;
2678 unsigned SSP1MSK6
: 1;
2679 unsigned SSP1MSK7
: 1;
2695 extern __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits
;
2697 #define _SSPMSK_SSP1MSK0 0x01
2698 #define _SSPMSK_MSK0 0x01
2699 #define _SSPMSK_SSP1MSK1 0x02
2700 #define _SSPMSK_MSK1 0x02
2701 #define _SSPMSK_SSP1MSK2 0x04
2702 #define _SSPMSK_MSK2 0x04
2703 #define _SSPMSK_SSP1MSK3 0x08
2704 #define _SSPMSK_MSK3 0x08
2705 #define _SSPMSK_SSP1MSK4 0x10
2706 #define _SSPMSK_MSK4 0x10
2707 #define _SSPMSK_SSP1MSK5 0x20
2708 #define _SSPMSK_MSK5 0x20
2709 #define _SSPMSK_SSP1MSK6 0x40
2710 #define _SSPMSK_MSK6 0x40
2711 #define _SSPMSK_SSP1MSK7 0x80
2712 #define _SSPMSK_MSK7 0x80
2714 //==============================================================================
2717 //==============================================================================
2720 extern __at(0x0214) __sfr SSP1STAT
;
2726 unsigned R_NOT_W
: 1;
2729 unsigned D_NOT_A
: 1;
2734 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
2738 #define _R_NOT_W 0x04
2741 #define _D_NOT_A 0x20
2745 //==============================================================================
2748 //==============================================================================
2751 extern __at(0x0214) __sfr SSPSTAT
;
2757 unsigned R_NOT_W
: 1;
2760 unsigned D_NOT_A
: 1;
2765 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
2767 #define _SSPSTAT_BF 0x01
2768 #define _SSPSTAT_UA 0x02
2769 #define _SSPSTAT_R_NOT_W 0x04
2770 #define _SSPSTAT_S 0x08
2771 #define _SSPSTAT_P 0x10
2772 #define _SSPSTAT_D_NOT_A 0x20
2773 #define _SSPSTAT_CKE 0x40
2774 #define _SSPSTAT_SMP 0x80
2776 //==============================================================================
2779 //==============================================================================
2782 extern __at(0x0215) __sfr SSP1CON
;
2805 extern __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits
;
2816 //==============================================================================
2819 //==============================================================================
2822 extern __at(0x0215) __sfr SSP1CON1
;
2845 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
2847 #define _SSP1CON1_SSPM0 0x01
2848 #define _SSP1CON1_SSPM1 0x02
2849 #define _SSP1CON1_SSPM2 0x04
2850 #define _SSP1CON1_SSPM3 0x08
2851 #define _SSP1CON1_CKP 0x10
2852 #define _SSP1CON1_SSPEN 0x20
2853 #define _SSP1CON1_SSPOV 0x40
2854 #define _SSP1CON1_WCOL 0x80
2856 //==============================================================================
2859 //==============================================================================
2862 extern __at(0x0215) __sfr SSPCON
;
2885 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
2887 #define _SSPCON_SSPM0 0x01
2888 #define _SSPCON_SSPM1 0x02
2889 #define _SSPCON_SSPM2 0x04
2890 #define _SSPCON_SSPM3 0x08
2891 #define _SSPCON_CKP 0x10
2892 #define _SSPCON_SSPEN 0x20
2893 #define _SSPCON_SSPOV 0x40
2894 #define _SSPCON_WCOL 0x80
2896 //==============================================================================
2899 //==============================================================================
2902 extern __at(0x0215) __sfr SSPCON1
;
2925 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
2927 #define _SSPCON1_SSPM0 0x01
2928 #define _SSPCON1_SSPM1 0x02
2929 #define _SSPCON1_SSPM2 0x04
2930 #define _SSPCON1_SSPM3 0x08
2931 #define _SSPCON1_CKP 0x10
2932 #define _SSPCON1_SSPEN 0x20
2933 #define _SSPCON1_SSPOV 0x40
2934 #define _SSPCON1_WCOL 0x80
2936 //==============================================================================
2939 //==============================================================================
2942 extern __at(0x0216) __sfr SSP1CON2
;
2952 unsigned ACKSTAT
: 1;
2956 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
2964 #define _ACKSTAT 0x40
2967 //==============================================================================
2970 //==============================================================================
2973 extern __at(0x0216) __sfr SSPCON2
;
2983 unsigned ACKSTAT
: 1;
2987 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
2989 #define _SSPCON2_SEN 0x01
2990 #define _SSPCON2_RSEN 0x02
2991 #define _SSPCON2_PEN 0x04
2992 #define _SSPCON2_RCEN 0x08
2993 #define _SSPCON2_ACKEN 0x10
2994 #define _SSPCON2_ACKDT 0x20
2995 #define _SSPCON2_ACKSTAT 0x40
2996 #define _SSPCON2_GCEN 0x80
2998 //==============================================================================
3001 //==============================================================================
3004 extern __at(0x0217) __sfr SSP1CON3
;
3015 unsigned ACKTIM
: 1;
3018 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
3027 #define _ACKTIM 0x80
3029 //==============================================================================
3032 //==============================================================================
3035 extern __at(0x0217) __sfr SSPCON3
;
3046 unsigned ACKTIM
: 1;
3049 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
3051 #define _SSPCON3_DHEN 0x01
3052 #define _SSPCON3_AHEN 0x02
3053 #define _SSPCON3_SBCDE 0x04
3054 #define _SSPCON3_SDAHT 0x08
3055 #define _SSPCON3_BOEN 0x10
3056 #define _SSPCON3_SCIE 0x20
3057 #define _SSPCON3_PCIE 0x40
3058 #define _SSPCON3_ACKTIM 0x80
3060 //==============================================================================
3063 //==============================================================================
3066 extern __at(0x028C) __sfr ODCONA
;
3080 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
3088 //==============================================================================
3091 //==============================================================================
3094 extern __at(0x028D) __sfr ODCONB
;
3108 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits
;
3115 //==============================================================================
3118 //==============================================================================
3121 extern __at(0x028E) __sfr ODCONC
;
3135 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits
;
3146 //==============================================================================
3148 extern __at(0x0291) __sfr CCPR1
;
3149 extern __at(0x0291) __sfr CCPR1L
;
3150 extern __at(0x0292) __sfr CCPR1H
;
3152 //==============================================================================
3155 extern __at(0x0293) __sfr CCP1CON
;
3161 unsigned CCP1M0
: 1;
3162 unsigned CCP1M1
: 1;
3163 unsigned CCP1M2
: 1;
3164 unsigned CCP1M3
: 1;
3197 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
3199 #define _CCP1M0 0x01
3200 #define _CCP1M1 0x02
3201 #define _CCP1M2 0x04
3202 #define _CCP1M3 0x08
3208 //==============================================================================
3211 //==============================================================================
3214 extern __at(0x0293) __sfr ECCP1CON
;
3220 unsigned CCP1M0
: 1;
3221 unsigned CCP1M1
: 1;
3222 unsigned CCP1M2
: 1;
3223 unsigned CCP1M3
: 1;
3256 extern __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits
;
3258 #define _ECCP1CON_CCP1M0 0x01
3259 #define _ECCP1CON_CCP1M1 0x02
3260 #define _ECCP1CON_CCP1M2 0x04
3261 #define _ECCP1CON_CCP1M3 0x08
3262 #define _ECCP1CON_DC1B0 0x10
3263 #define _ECCP1CON_CCP1Y 0x10
3264 #define _ECCP1CON_DC1B1 0x20
3265 #define _ECCP1CON_CCP1X 0x20
3267 //==============================================================================
3269 extern __at(0x0298) __sfr CCPR2
;
3270 extern __at(0x0298) __sfr CCPR2L
;
3271 extern __at(0x0299) __sfr CCPR2H
;
3273 //==============================================================================
3276 extern __at(0x029A) __sfr CCP2CON
;
3282 unsigned CCP2M0
: 1;
3283 unsigned CCP2M1
: 1;
3284 unsigned CCP2M2
: 1;
3285 unsigned CCP2M3
: 1;
3318 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
3320 #define _CCP2M0 0x01
3321 #define _CCP2M1 0x02
3322 #define _CCP2M2 0x04
3323 #define _CCP2M3 0x08
3329 //==============================================================================
3332 //==============================================================================
3335 extern __at(0x029A) __sfr ECCP2CON
;
3341 unsigned CCP2M0
: 1;
3342 unsigned CCP2M1
: 1;
3343 unsigned CCP2M2
: 1;
3344 unsigned CCP2M3
: 1;
3377 extern __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits
;
3379 #define _ECCP2CON_CCP2M0 0x01
3380 #define _ECCP2CON_CCP2M1 0x02
3381 #define _ECCP2CON_CCP2M2 0x04
3382 #define _ECCP2CON_CCP2M3 0x08
3383 #define _ECCP2CON_DC2B0 0x10
3384 #define _ECCP2CON_CCP2Y 0x10
3385 #define _ECCP2CON_DC2B1 0x20
3386 #define _ECCP2CON_CCP2X 0x20
3388 //==============================================================================
3391 //==============================================================================
3394 extern __at(0x029E) __sfr CCPTMRS
;
3400 unsigned C1TSEL0
: 1;
3401 unsigned C1TSEL1
: 1;
3402 unsigned C2TSEL0
: 1;
3403 unsigned C2TSEL1
: 1;
3404 unsigned P3TSEL0
: 1;
3405 unsigned P3TSEL1
: 1;
3406 unsigned P4TSEL0
: 1;
3407 unsigned P4TSEL1
: 1;
3412 unsigned C1TSEL
: 2;
3419 unsigned C2TSEL
: 2;
3426 unsigned P3TSEL
: 2;
3433 unsigned P4TSEL
: 2;
3437 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
3439 #define _C1TSEL0 0x01
3440 #define _C1TSEL1 0x02
3441 #define _C2TSEL0 0x04
3442 #define _C2TSEL1 0x08
3443 #define _P3TSEL0 0x10
3444 #define _P3TSEL1 0x20
3445 #define _P4TSEL0 0x40
3446 #define _P4TSEL1 0x80
3448 //==============================================================================
3451 //==============================================================================
3454 extern __at(0x030C) __sfr SLRCONA
;
3468 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
3476 //==============================================================================
3479 //==============================================================================
3482 extern __at(0x030D) __sfr SLRCONB
;
3496 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits
;
3503 //==============================================================================
3506 //==============================================================================
3509 extern __at(0x030E) __sfr SLRCONC
;
3523 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits
;
3534 //==============================================================================
3537 //==============================================================================
3540 extern __at(0x038C) __sfr INLVLA
;
3546 unsigned INLVLA0
: 1;
3547 unsigned INLVLA1
: 1;
3548 unsigned INLVLA2
: 1;
3549 unsigned INLVLA3
: 1;
3550 unsigned INLVLA4
: 1;
3551 unsigned INLVLA5
: 1;
3558 unsigned INLVLA
: 6;
3563 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
3565 #define _INLVLA0 0x01
3566 #define _INLVLA1 0x02
3567 #define _INLVLA2 0x04
3568 #define _INLVLA3 0x08
3569 #define _INLVLA4 0x10
3570 #define _INLVLA5 0x20
3572 //==============================================================================
3575 //==============================================================================
3578 extern __at(0x038D) __sfr INLVLB
;
3586 unsigned INLVLB4
: 1;
3587 unsigned INLVLB5
: 1;
3588 unsigned INLVLB6
: 1;
3589 unsigned INLVLB7
: 1;
3592 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits
;
3594 #define _INLVLB4 0x10
3595 #define _INLVLB5 0x20
3596 #define _INLVLB6 0x40
3597 #define _INLVLB7 0x80
3599 //==============================================================================
3602 //==============================================================================
3605 extern __at(0x038E) __sfr INLVLC
;
3609 unsigned INLVLC0
: 1;
3610 unsigned INLVLC1
: 1;
3611 unsigned INLVLC2
: 1;
3612 unsigned INLVLC3
: 1;
3613 unsigned INLVLC4
: 1;
3614 unsigned INLVLC5
: 1;
3615 unsigned INLVLC6
: 1;
3616 unsigned INLVLC7
: 1;
3619 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits
;
3621 #define _INLVLC0 0x01
3622 #define _INLVLC1 0x02
3623 #define _INLVLC2 0x04
3624 #define _INLVLC3 0x08
3625 #define _INLVLC4 0x10
3626 #define _INLVLC5 0x20
3627 #define _INLVLC6 0x40
3628 #define _INLVLC7 0x80
3630 //==============================================================================
3633 //==============================================================================
3636 extern __at(0x0391) __sfr IOCAP
;
3642 unsigned IOCAP0
: 1;
3643 unsigned IOCAP1
: 1;
3644 unsigned IOCAP2
: 1;
3645 unsigned IOCAP3
: 1;
3646 unsigned IOCAP4
: 1;
3647 unsigned IOCAP5
: 1;
3659 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits
;
3661 #define _IOCAP0 0x01
3662 #define _IOCAP1 0x02
3663 #define _IOCAP2 0x04
3664 #define _IOCAP3 0x08
3665 #define _IOCAP4 0x10
3666 #define _IOCAP5 0x20
3668 //==============================================================================
3671 //==============================================================================
3674 extern __at(0x0392) __sfr IOCAN
;
3680 unsigned IOCAN0
: 1;
3681 unsigned IOCAN1
: 1;
3682 unsigned IOCAN2
: 1;
3683 unsigned IOCAN3
: 1;
3684 unsigned IOCAN4
: 1;
3685 unsigned IOCAN5
: 1;
3697 extern __at(0x0392) volatile __IOCANbits_t IOCANbits
;
3699 #define _IOCAN0 0x01
3700 #define _IOCAN1 0x02
3701 #define _IOCAN2 0x04
3702 #define _IOCAN3 0x08
3703 #define _IOCAN4 0x10
3704 #define _IOCAN5 0x20
3706 //==============================================================================
3709 //==============================================================================
3712 extern __at(0x0393) __sfr IOCAF
;
3718 unsigned IOCAF0
: 1;
3719 unsigned IOCAF1
: 1;
3720 unsigned IOCAF2
: 1;
3721 unsigned IOCAF3
: 1;
3722 unsigned IOCAF4
: 1;
3723 unsigned IOCAF5
: 1;
3735 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits
;
3737 #define _IOCAF0 0x01
3738 #define _IOCAF1 0x02
3739 #define _IOCAF2 0x04
3740 #define _IOCAF3 0x08
3741 #define _IOCAF4 0x10
3742 #define _IOCAF5 0x20
3744 //==============================================================================
3747 //==============================================================================
3750 extern __at(0x0394) __sfr IOCBP
;
3758 unsigned IOCBP4
: 1;
3759 unsigned IOCBP5
: 1;
3760 unsigned IOCBP6
: 1;
3761 unsigned IOCBP7
: 1;
3764 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
3766 #define _IOCBP4 0x10
3767 #define _IOCBP5 0x20
3768 #define _IOCBP6 0x40
3769 #define _IOCBP7 0x80
3771 //==============================================================================
3774 //==============================================================================
3777 extern __at(0x0395) __sfr IOCBN
;
3785 unsigned IOCBN4
: 1;
3786 unsigned IOCBN5
: 1;
3787 unsigned IOCBN6
: 1;
3788 unsigned IOCBN7
: 1;
3791 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
3793 #define _IOCBN4 0x10
3794 #define _IOCBN5 0x20
3795 #define _IOCBN6 0x40
3796 #define _IOCBN7 0x80
3798 //==============================================================================
3801 //==============================================================================
3804 extern __at(0x0396) __sfr IOCBF
;
3812 unsigned IOCBF4
: 1;
3813 unsigned IOCBF5
: 1;
3814 unsigned IOCBF6
: 1;
3815 unsigned IOCBF7
: 1;
3818 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
3820 #define _IOCBF4 0x10
3821 #define _IOCBF5 0x20
3822 #define _IOCBF6 0x40
3823 #define _IOCBF7 0x80
3825 //==============================================================================
3828 //==============================================================================
3831 extern __at(0x0397) __sfr IOCCP
;
3835 unsigned IOCCP0
: 1;
3836 unsigned IOCCP1
: 1;
3837 unsigned IOCCP2
: 1;
3838 unsigned IOCCP3
: 1;
3839 unsigned IOCCP4
: 1;
3840 unsigned IOCCP5
: 1;
3841 unsigned IOCCP6
: 1;
3842 unsigned IOCCP7
: 1;
3845 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits
;
3847 #define _IOCCP0 0x01
3848 #define _IOCCP1 0x02
3849 #define _IOCCP2 0x04
3850 #define _IOCCP3 0x08
3851 #define _IOCCP4 0x10
3852 #define _IOCCP5 0x20
3853 #define _IOCCP6 0x40
3854 #define _IOCCP7 0x80
3856 //==============================================================================
3859 //==============================================================================
3862 extern __at(0x0398) __sfr IOCCN
;
3866 unsigned IOCCN0
: 1;
3867 unsigned IOCCN1
: 1;
3868 unsigned IOCCN2
: 1;
3869 unsigned IOCCN3
: 1;
3870 unsigned IOCCN4
: 1;
3871 unsigned IOCCN5
: 1;
3872 unsigned IOCCN6
: 1;
3873 unsigned IOCCN7
: 1;
3876 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits
;
3878 #define _IOCCN0 0x01
3879 #define _IOCCN1 0x02
3880 #define _IOCCN2 0x04
3881 #define _IOCCN3 0x08
3882 #define _IOCCN4 0x10
3883 #define _IOCCN5 0x20
3884 #define _IOCCN6 0x40
3885 #define _IOCCN7 0x80
3887 //==============================================================================
3890 //==============================================================================
3893 extern __at(0x0399) __sfr IOCCF
;
3897 unsigned IOCCF0
: 1;
3898 unsigned IOCCF1
: 1;
3899 unsigned IOCCF2
: 1;
3900 unsigned IOCCF3
: 1;
3901 unsigned IOCCF4
: 1;
3902 unsigned IOCCF5
: 1;
3903 unsigned IOCCF6
: 1;
3904 unsigned IOCCF7
: 1;
3907 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits
;
3909 #define _IOCCF0 0x01
3910 #define _IOCCF1 0x02
3911 #define _IOCCF2 0x04
3912 #define _IOCCF3 0x08
3913 #define _IOCCF4 0x10
3914 #define _IOCCF5 0x20
3915 #define _IOCCF6 0x40
3916 #define _IOCCF7 0x80
3918 //==============================================================================
3920 extern __at(0x0415) __sfr TMR4
;
3921 extern __at(0x0416) __sfr PR4
;
3923 //==============================================================================
3926 extern __at(0x0417) __sfr T4CON
;
3932 unsigned T4CKPS0
: 1;
3933 unsigned T4CKPS1
: 1;
3934 unsigned TMR4ON
: 1;
3935 unsigned T4OUTPS0
: 1;
3936 unsigned T4OUTPS1
: 1;
3937 unsigned T4OUTPS2
: 1;
3938 unsigned T4OUTPS3
: 1;
3944 unsigned T4CKPS
: 2;
3951 unsigned T4OUTPS
: 4;
3956 extern __at(0x0417) volatile __T4CONbits_t T4CONbits
;
3958 #define _T4CKPS0 0x01
3959 #define _T4CKPS1 0x02
3960 #define _TMR4ON 0x04
3961 #define _T4OUTPS0 0x08
3962 #define _T4OUTPS1 0x10
3963 #define _T4OUTPS2 0x20
3964 #define _T4OUTPS3 0x40
3966 //==============================================================================
3968 extern __at(0x041C) __sfr TMR6
;
3969 extern __at(0x041D) __sfr PR6
;
3971 //==============================================================================
3974 extern __at(0x041E) __sfr T6CON
;
3980 unsigned T6CKPS0
: 1;
3981 unsigned T6CKPS1
: 1;
3982 unsigned TMR6ON
: 1;
3983 unsigned T6OUTPS0
: 1;
3984 unsigned T6OUTPS1
: 1;
3985 unsigned T6OUTPS2
: 1;
3986 unsigned T6OUTPS3
: 1;
3992 unsigned T6CKPS
: 2;
3999 unsigned T6OUTPS
: 4;
4004 extern __at(0x041E) volatile __T6CONbits_t T6CONbits
;
4006 #define _T6CKPS0 0x01
4007 #define _T6CKPS1 0x02
4008 #define _TMR6ON 0x04
4009 #define _T6OUTPS0 0x08
4010 #define _T6OUTPS1 0x10
4011 #define _T6OUTPS2 0x20
4012 #define _T6OUTPS3 0x40
4014 //==============================================================================
4017 //==============================================================================
4020 extern __at(0x0511) __sfr OPA1CON
;
4026 unsigned OPA1PCH0
: 1;
4027 unsigned OPA1PCH1
: 1;
4030 unsigned OPA1UG
: 1;
4032 unsigned OPA1SP
: 1;
4033 unsigned OPA1EN
: 1;
4038 unsigned OPA1PCH
: 2;
4043 extern __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits
;
4045 #define _OPA1PCH0 0x01
4046 #define _OPA1PCH1 0x02
4047 #define _OPA1UG 0x10
4048 #define _OPA1SP 0x40
4049 #define _OPA1EN 0x80
4051 //==============================================================================
4054 //==============================================================================
4057 extern __at(0x0515) __sfr OPA2CON
;
4063 unsigned OPA2PCH0
: 1;
4064 unsigned OPA2PCH1
: 1;
4067 unsigned OPA2UG
: 1;
4069 unsigned OPA2SP
: 1;
4070 unsigned OPA2EN
: 1;
4075 unsigned OPA2PCH
: 2;
4080 extern __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits
;
4082 #define _OPA2PCH0 0x01
4083 #define _OPA2PCH1 0x02
4084 #define _OPA2UG 0x10
4085 #define _OPA2SP 0x40
4086 #define _OPA2EN 0x80
4088 //==============================================================================
4091 //==============================================================================
4094 extern __at(0x0617) __sfr PWM3DCL
;
4106 unsigned PWM3DCL0
: 1;
4107 unsigned PWM3DCL1
: 1;
4113 unsigned PWM3DCL
: 2;
4117 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits
;
4119 #define _PWM3DCL0 0x40
4120 #define _PWM3DCL1 0x80
4122 //==============================================================================
4125 //==============================================================================
4128 extern __at(0x0618) __sfr PWM3DCH
;
4132 unsigned PWM3DCH0
: 1;
4133 unsigned PWM3DCH1
: 1;
4134 unsigned PWM3DCH2
: 1;
4135 unsigned PWM3DCH3
: 1;
4136 unsigned PWM3DCH4
: 1;
4137 unsigned PWM3DCH5
: 1;
4138 unsigned PWM3DCH6
: 1;
4139 unsigned PWM3DCH7
: 1;
4142 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits
;
4144 #define _PWM3DCH0 0x01
4145 #define _PWM3DCH1 0x02
4146 #define _PWM3DCH2 0x04
4147 #define _PWM3DCH3 0x08
4148 #define _PWM3DCH4 0x10
4149 #define _PWM3DCH5 0x20
4150 #define _PWM3DCH6 0x40
4151 #define _PWM3DCH7 0x80
4153 //==============================================================================
4156 //==============================================================================
4159 extern __at(0x0619) __sfr PWM3CON
;
4167 unsigned PWM3POL
: 1;
4168 unsigned PWM3OUT
: 1;
4170 unsigned PWM3EN
: 1;
4173 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits
;
4175 #define _PWM3POL 0x10
4176 #define _PWM3OUT 0x20
4177 #define _PWM3EN 0x80
4179 //==============================================================================
4182 //==============================================================================
4185 extern __at(0x0619) __sfr PWM3CON0
;
4193 unsigned PWM3POL
: 1;
4194 unsigned PWM3OUT
: 1;
4196 unsigned PWM3EN
: 1;
4199 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits
;
4201 #define _PWM3CON0_PWM3POL 0x10
4202 #define _PWM3CON0_PWM3OUT 0x20
4203 #define _PWM3CON0_PWM3EN 0x80
4205 //==============================================================================
4208 //==============================================================================
4211 extern __at(0x061A) __sfr PWM4DCL
;
4223 unsigned PWM4DCL0
: 1;
4224 unsigned PWM4DCL1
: 1;
4230 unsigned PWM4DCL
: 2;
4234 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits
;
4236 #define _PWM4DCL0 0x40
4237 #define _PWM4DCL1 0x80
4239 //==============================================================================
4242 //==============================================================================
4245 extern __at(0x061B) __sfr PWM4DCH
;
4249 unsigned PWM4DCH0
: 1;
4250 unsigned PWM4DCH1
: 1;
4251 unsigned PWM4DCH2
: 1;
4252 unsigned PWM4DCH3
: 1;
4253 unsigned PWM4DCH4
: 1;
4254 unsigned PWM4DCH5
: 1;
4255 unsigned PWM4DCH6
: 1;
4256 unsigned PWM4DCH7
: 1;
4259 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits
;
4261 #define _PWM4DCH0 0x01
4262 #define _PWM4DCH1 0x02
4263 #define _PWM4DCH2 0x04
4264 #define _PWM4DCH3 0x08
4265 #define _PWM4DCH4 0x10
4266 #define _PWM4DCH5 0x20
4267 #define _PWM4DCH6 0x40
4268 #define _PWM4DCH7 0x80
4270 //==============================================================================
4273 //==============================================================================
4276 extern __at(0x061C) __sfr PWM4CON
;
4284 unsigned PWM4POL
: 1;
4285 unsigned PWM4OUT
: 1;
4287 unsigned PWM4EN
: 1;
4290 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits
;
4292 #define _PWM4POL 0x10
4293 #define _PWM4OUT 0x20
4294 #define _PWM4EN 0x80
4296 //==============================================================================
4299 //==============================================================================
4302 extern __at(0x061C) __sfr PWM4CON0
;
4310 unsigned PWM4POL
: 1;
4311 unsigned PWM4OUT
: 1;
4313 unsigned PWM4EN
: 1;
4316 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits
;
4318 #define _PWM4CON0_PWM4POL 0x10
4319 #define _PWM4CON0_PWM4OUT 0x20
4320 #define _PWM4CON0_PWM4EN 0x80
4322 //==============================================================================
4325 //==============================================================================
4328 extern __at(0x0691) __sfr COG1PHR
;
4334 unsigned G1PHR0
: 1;
4335 unsigned G1PHR1
: 1;
4336 unsigned G1PHR2
: 1;
4337 unsigned G1PHR3
: 1;
4338 unsigned G1PHR4
: 1;
4339 unsigned G1PHR5
: 1;
4351 extern __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits
;
4353 #define _G1PHR0 0x01
4354 #define _G1PHR1 0x02
4355 #define _G1PHR2 0x04
4356 #define _G1PHR3 0x08
4357 #define _G1PHR4 0x10
4358 #define _G1PHR5 0x20
4360 //==============================================================================
4363 //==============================================================================
4366 extern __at(0x0692) __sfr COG1PHF
;
4372 unsigned G1PHF0
: 1;
4373 unsigned G1PHF1
: 1;
4374 unsigned G1PHF2
: 1;
4375 unsigned G1PHF3
: 1;
4376 unsigned G1PHF4
: 1;
4377 unsigned G1PHF5
: 1;
4389 extern __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits
;
4391 #define _G1PHF0 0x01
4392 #define _G1PHF1 0x02
4393 #define _G1PHF2 0x04
4394 #define _G1PHF3 0x08
4395 #define _G1PHF4 0x10
4396 #define _G1PHF5 0x20
4398 //==============================================================================
4401 //==============================================================================
4404 extern __at(0x0693) __sfr COG1BLKR
;
4410 unsigned G1BLKR0
: 1;
4411 unsigned G1BLKR1
: 1;
4412 unsigned G1BLKR2
: 1;
4413 unsigned G1BLKR3
: 1;
4414 unsigned G1BLKR4
: 1;
4415 unsigned G1BLKR5
: 1;
4422 unsigned G1BLKR
: 6;
4427 extern __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits
;
4429 #define _G1BLKR0 0x01
4430 #define _G1BLKR1 0x02
4431 #define _G1BLKR2 0x04
4432 #define _G1BLKR3 0x08
4433 #define _G1BLKR4 0x10
4434 #define _G1BLKR5 0x20
4436 //==============================================================================
4439 //==============================================================================
4442 extern __at(0x0694) __sfr COG1BLKF
;
4448 unsigned G1BLKF0
: 1;
4449 unsigned G1BLKF1
: 1;
4450 unsigned G1BLKF2
: 1;
4451 unsigned G1BLKF3
: 1;
4452 unsigned G1BLKF4
: 1;
4453 unsigned G1BLKF5
: 1;
4460 unsigned G1BLKF
: 6;
4465 extern __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits
;
4467 #define _G1BLKF0 0x01
4468 #define _G1BLKF1 0x02
4469 #define _G1BLKF2 0x04
4470 #define _G1BLKF3 0x08
4471 #define _G1BLKF4 0x10
4472 #define _G1BLKF5 0x20
4474 //==============================================================================
4477 //==============================================================================
4480 extern __at(0x0695) __sfr COG1DBR
;
4486 unsigned G1DBR0
: 1;
4487 unsigned G1DBR1
: 1;
4488 unsigned G1DBR2
: 1;
4489 unsigned G1DBR3
: 1;
4490 unsigned G1DBR4
: 1;
4491 unsigned G1DBR5
: 1;
4503 extern __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits
;
4505 #define _G1DBR0 0x01
4506 #define _G1DBR1 0x02
4507 #define _G1DBR2 0x04
4508 #define _G1DBR3 0x08
4509 #define _G1DBR4 0x10
4510 #define _G1DBR5 0x20
4512 //==============================================================================
4515 //==============================================================================
4518 extern __at(0x0696) __sfr COG1DBF
;
4524 unsigned G1DBF0
: 1;
4525 unsigned G1DBF1
: 1;
4526 unsigned G1DBF2
: 1;
4527 unsigned G1DBF3
: 1;
4528 unsigned G1DBF4
: 1;
4529 unsigned G1DBF5
: 1;
4541 extern __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits
;
4543 #define _G1DBF0 0x01
4544 #define _G1DBF1 0x02
4545 #define _G1DBF2 0x04
4546 #define _G1DBF3 0x08
4547 #define _G1DBF4 0x10
4548 #define _G1DBF5 0x20
4550 //==============================================================================
4553 //==============================================================================
4556 extern __at(0x0697) __sfr COG1CON0
;
4586 extern __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits
;
4596 //==============================================================================
4599 //==============================================================================
4602 extern __at(0x0698) __sfr COG1CON1
;
4606 unsigned G1POLA
: 1;
4607 unsigned G1POLB
: 1;
4608 unsigned G1POLC
: 1;
4609 unsigned G1POLD
: 1;
4612 unsigned G1FDBS
: 1;
4613 unsigned G1RDBS
: 1;
4616 extern __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits
;
4618 #define _G1POLA 0x01
4619 #define _G1POLB 0x02
4620 #define _G1POLC 0x04
4621 #define _G1POLD 0x08
4622 #define _G1FDBS 0x40
4623 #define _G1RDBS 0x80
4625 //==============================================================================
4628 //==============================================================================
4631 extern __at(0x0699) __sfr COG1RIS
;
4637 unsigned G1RIS0
: 1;
4638 unsigned G1RIS1
: 1;
4639 unsigned G1RIS2
: 1;
4640 unsigned G1RIS3
: 1;
4641 unsigned G1RIS4
: 1;
4642 unsigned G1RIS5
: 1;
4643 unsigned G1RIS6
: 1;
4654 extern __at(0x0699) volatile __COG1RISbits_t COG1RISbits
;
4656 #define _G1RIS0 0x01
4657 #define _G1RIS1 0x02
4658 #define _G1RIS2 0x04
4659 #define _G1RIS3 0x08
4660 #define _G1RIS4 0x10
4661 #define _G1RIS5 0x20
4662 #define _G1RIS6 0x40
4664 //==============================================================================
4667 //==============================================================================
4670 extern __at(0x069A) __sfr COG1RSIM
;
4676 unsigned G1RSIM0
: 1;
4677 unsigned G1RSIM1
: 1;
4678 unsigned G1RSIM2
: 1;
4679 unsigned G1RSIM3
: 1;
4680 unsigned G1RSIM4
: 1;
4681 unsigned G1RSIM5
: 1;
4682 unsigned G1RSIM6
: 1;
4688 unsigned G1RSIM
: 7;
4693 extern __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits
;
4695 #define _G1RSIM0 0x01
4696 #define _G1RSIM1 0x02
4697 #define _G1RSIM2 0x04
4698 #define _G1RSIM3 0x08
4699 #define _G1RSIM4 0x10
4700 #define _G1RSIM5 0x20
4701 #define _G1RSIM6 0x40
4703 //==============================================================================
4706 //==============================================================================
4709 extern __at(0x069B) __sfr COG1FIS
;
4715 unsigned G1FIS0
: 1;
4716 unsigned G1FIS1
: 1;
4717 unsigned G1FIS2
: 1;
4718 unsigned G1FIS3
: 1;
4719 unsigned G1FIS4
: 1;
4720 unsigned G1FIS5
: 1;
4721 unsigned G1FIS6
: 1;
4732 extern __at(0x069B) volatile __COG1FISbits_t COG1FISbits
;
4734 #define _G1FIS0 0x01
4735 #define _G1FIS1 0x02
4736 #define _G1FIS2 0x04
4737 #define _G1FIS3 0x08
4738 #define _G1FIS4 0x10
4739 #define _G1FIS5 0x20
4740 #define _G1FIS6 0x40
4742 //==============================================================================
4745 //==============================================================================
4748 extern __at(0x069C) __sfr COG1FSIM
;
4754 unsigned G1FSIM0
: 1;
4755 unsigned G1FSIM1
: 1;
4756 unsigned G1FSIM2
: 1;
4757 unsigned G1FSIM3
: 1;
4758 unsigned G1FSIM4
: 1;
4759 unsigned G1FSIM5
: 1;
4760 unsigned G1FSIM6
: 1;
4766 unsigned G1FSIM
: 7;
4771 extern __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits
;
4773 #define _G1FSIM0 0x01
4774 #define _G1FSIM1 0x02
4775 #define _G1FSIM2 0x04
4776 #define _G1FSIM3 0x08
4777 #define _G1FSIM4 0x10
4778 #define _G1FSIM5 0x20
4779 #define _G1FSIM6 0x40
4781 //==============================================================================
4784 //==============================================================================
4787 extern __at(0x069D) __sfr COG1ASD0
;
4795 unsigned G1ASDAC0
: 1;
4796 unsigned G1ASDAC1
: 1;
4797 unsigned G1ASDBD0
: 1;
4798 unsigned G1ASDBD1
: 1;
4799 unsigned G1ARSEN
: 1;
4806 unsigned G1ASDAC
: 2;
4813 unsigned G1ASDBD
: 2;
4818 extern __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits
;
4820 #define _G1ASDAC0 0x04
4821 #define _G1ASDAC1 0x08
4822 #define _G1ASDBD0 0x10
4823 #define _G1ASDBD1 0x20
4824 #define _G1ARSEN 0x40
4827 //==============================================================================
4830 //==============================================================================
4833 extern __at(0x069E) __sfr COG1ASD1
;
4837 unsigned G1AS0E
: 1;
4838 unsigned G1AS1E
: 1;
4839 unsigned G1AS2E
: 1;
4840 unsigned G1AS3E
: 1;
4847 extern __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits
;
4849 #define _G1AS0E 0x01
4850 #define _G1AS1E 0x02
4851 #define _G1AS2E 0x04
4852 #define _G1AS3E 0x08
4854 //==============================================================================
4857 //==============================================================================
4860 extern __at(0x069F) __sfr COG1STR
;
4864 unsigned G1STRA
: 1;
4865 unsigned G1STRB
: 1;
4866 unsigned G1STRC
: 1;
4867 unsigned G1STRD
: 1;
4868 unsigned G1SDATA
: 1;
4869 unsigned G1SDATB
: 1;
4870 unsigned G1SDATC
: 1;
4871 unsigned G1SDATD
: 1;
4874 extern __at(0x069F) volatile __COG1STRbits_t COG1STRbits
;
4876 #define _G1STRA 0x01
4877 #define _G1STRB 0x02
4878 #define _G1STRC 0x04
4879 #define _G1STRD 0x08
4880 #define _G1SDATA 0x10
4881 #define _G1SDATB 0x20
4882 #define _G1SDATC 0x40
4883 #define _G1SDATD 0x80
4885 //==============================================================================
4888 //==============================================================================
4891 extern __at(0x0E0F) __sfr PPSLOCK
;
4895 unsigned PPSLOCKED
: 1;
4905 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits
;
4907 #define _PPSLOCKED 0x01
4909 //==============================================================================
4911 extern __at(0x0E10) __sfr INTPPS
;
4912 extern __at(0x0E11) __sfr T0CKIPPS
;
4913 extern __at(0x0E12) __sfr T1CKIPPS
;
4914 extern __at(0x0E13) __sfr T1GPPS
;
4915 extern __at(0x0E14) __sfr CCP1PPS
;
4916 extern __at(0x0E15) __sfr CCP2PPS
;
4917 extern __at(0x0E17) __sfr COGINPPS
;
4918 extern __at(0x0E20) __sfr SSPCLKPPS
;
4919 extern __at(0x0E21) __sfr SSPDATPPS
;
4920 extern __at(0x0E22) __sfr SSPSSPPS
;
4921 extern __at(0x0E24) __sfr RXPPS
;
4922 extern __at(0x0E25) __sfr CKPPS
;
4923 extern __at(0x0E28) __sfr CLCIN0PPS
;
4924 extern __at(0x0E29) __sfr CLCIN1PPS
;
4925 extern __at(0x0E2A) __sfr CLCIN2PPS
;
4926 extern __at(0x0E2B) __sfr CLCIN3PPS
;
4927 extern __at(0x0E90) __sfr RA0PPS
;
4928 extern __at(0x0E91) __sfr RA1PPS
;
4929 extern __at(0x0E92) __sfr RA2PPS
;
4930 extern __at(0x0E94) __sfr RA4PPS
;
4931 extern __at(0x0E95) __sfr RA5PPS
;
4932 extern __at(0x0E9C) __sfr RB4PPS
;
4933 extern __at(0x0E9D) __sfr RB5PPS
;
4934 extern __at(0x0E9E) __sfr RB6PPS
;
4935 extern __at(0x0E9F) __sfr RB7PPS
;
4936 extern __at(0x0EA0) __sfr RC0PPS
;
4937 extern __at(0x0EA1) __sfr RC1PPS
;
4938 extern __at(0x0EA2) __sfr RC2PPS
;
4939 extern __at(0x0EA3) __sfr RC3PPS
;
4940 extern __at(0x0EA4) __sfr RC4PPS
;
4941 extern __at(0x0EA5) __sfr RC5PPS
;
4942 extern __at(0x0EA6) __sfr RC6PPS
;
4943 extern __at(0x0EA7) __sfr RC7PPS
;
4945 //==============================================================================
4948 extern __at(0x0F0F) __sfr CLCDATA
;
4952 unsigned MCLC1OUT
: 1;
4953 unsigned MCLC2OUT
: 1;
4954 unsigned MCLC3OUT
: 1;
4962 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits
;
4964 #define _MCLC1OUT 0x01
4965 #define _MCLC2OUT 0x02
4966 #define _MCLC3OUT 0x04
4968 //==============================================================================
4971 //==============================================================================
4974 extern __at(0x0F10) __sfr CLC1CON
;
4980 unsigned LC1MODE0
: 1;
4981 unsigned LC1MODE1
: 1;
4982 unsigned LC1MODE2
: 1;
4983 unsigned LC1INTN
: 1;
4984 unsigned LC1INTP
: 1;
4985 unsigned LC1OUT
: 1;
5004 unsigned LC1MODE
: 3;
5015 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits
;
5017 #define _LC1MODE0 0x01
5019 #define _LC1MODE1 0x02
5021 #define _LC1MODE2 0x04
5023 #define _LC1INTN 0x08
5025 #define _LC1INTP 0x10
5027 #define _LC1OUT 0x20
5032 //==============================================================================
5035 //==============================================================================
5038 extern __at(0x0F11) __sfr CLC1POL
;
5044 unsigned LC1G1POL
: 1;
5045 unsigned LC1G2POL
: 1;
5046 unsigned LC1G3POL
: 1;
5047 unsigned LC1G4POL
: 1;
5051 unsigned LC1POL
: 1;
5067 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits
;
5069 #define _LC1G1POL 0x01
5071 #define _LC1G2POL 0x02
5073 #define _LC1G3POL 0x04
5075 #define _LC1G4POL 0x08
5077 #define _LC1POL 0x80
5080 //==============================================================================
5083 //==============================================================================
5086 extern __at(0x0F12) __sfr CLC1SEL0
;
5092 unsigned LC1D1S0
: 1;
5093 unsigned LC1D1S1
: 1;
5094 unsigned LC1D1S2
: 1;
5095 unsigned LC1D1S3
: 1;
5096 unsigned LC1D1S4
: 1;
5116 unsigned LC1D1S
: 5;
5127 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
5129 #define _LC1D1S0 0x01
5131 #define _LC1D1S1 0x02
5133 #define _LC1D1S2 0x04
5135 #define _LC1D1S3 0x08
5137 #define _LC1D1S4 0x10
5140 //==============================================================================
5143 //==============================================================================
5146 extern __at(0x0F13) __sfr CLC1SEL1
;
5152 unsigned LC1D2S0
: 1;
5153 unsigned LC1D2S1
: 1;
5154 unsigned LC1D2S2
: 1;
5155 unsigned LC1D2S3
: 1;
5156 unsigned LC1D2S4
: 1;
5176 unsigned LC1D2S
: 5;
5187 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
5189 #define _LC1D2S0 0x01
5191 #define _LC1D2S1 0x02
5193 #define _LC1D2S2 0x04
5195 #define _LC1D2S3 0x08
5197 #define _LC1D2S4 0x10
5200 //==============================================================================
5203 //==============================================================================
5206 extern __at(0x0F14) __sfr CLC1SEL2
;
5212 unsigned LC1D3S0
: 1;
5213 unsigned LC1D3S1
: 1;
5214 unsigned LC1D3S2
: 1;
5215 unsigned LC1D3S3
: 1;
5216 unsigned LC1D3S4
: 1;
5236 unsigned LC1D3S
: 5;
5247 extern __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
5249 #define _LC1D3S0 0x01
5251 #define _LC1D3S1 0x02
5253 #define _LC1D3S2 0x04
5255 #define _LC1D3S3 0x08
5257 #define _LC1D3S4 0x10
5260 //==============================================================================
5263 //==============================================================================
5266 extern __at(0x0F15) __sfr CLC1SEL3
;
5272 unsigned LC1D4S0
: 1;
5273 unsigned LC1D4S1
: 1;
5274 unsigned LC1D4S2
: 1;
5275 unsigned LC1D4S3
: 1;
5276 unsigned LC1D4S4
: 1;
5296 unsigned LC1D4S
: 5;
5307 extern __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
5309 #define _LC1D4S0 0x01
5311 #define _LC1D4S1 0x02
5313 #define _LC1D4S2 0x04
5315 #define _LC1D4S3 0x08
5317 #define _LC1D4S4 0x10
5320 //==============================================================================
5323 //==============================================================================
5326 extern __at(0x0F16) __sfr CLC1GLS0
;
5332 unsigned LC1G1D1N
: 1;
5333 unsigned LC1G1D1T
: 1;
5334 unsigned LC1G1D2N
: 1;
5335 unsigned LC1G1D2T
: 1;
5336 unsigned LC1G1D3N
: 1;
5337 unsigned LC1G1D3T
: 1;
5338 unsigned LC1G1D4N
: 1;
5339 unsigned LC1G1D4T
: 1;
5355 extern __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
5357 #define _LC1G1D1N 0x01
5359 #define _LC1G1D1T 0x02
5361 #define _LC1G1D2N 0x04
5363 #define _LC1G1D2T 0x08
5365 #define _LC1G1D3N 0x10
5367 #define _LC1G1D3T 0x20
5369 #define _LC1G1D4N 0x40
5371 #define _LC1G1D4T 0x80
5374 //==============================================================================
5377 //==============================================================================
5380 extern __at(0x0F17) __sfr CLC1GLS1
;
5386 unsigned LC1G2D1N
: 1;
5387 unsigned LC1G2D1T
: 1;
5388 unsigned LC1G2D2N
: 1;
5389 unsigned LC1G2D2T
: 1;
5390 unsigned LC1G2D3N
: 1;
5391 unsigned LC1G2D3T
: 1;
5392 unsigned LC1G2D4N
: 1;
5393 unsigned LC1G2D4T
: 1;
5409 extern __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
5411 #define _CLC1GLS1_LC1G2D1N 0x01
5412 #define _CLC1GLS1_D1N 0x01
5413 #define _CLC1GLS1_LC1G2D1T 0x02
5414 #define _CLC1GLS1_D1T 0x02
5415 #define _CLC1GLS1_LC1G2D2N 0x04
5416 #define _CLC1GLS1_D2N 0x04
5417 #define _CLC1GLS1_LC1G2D2T 0x08
5418 #define _CLC1GLS1_D2T 0x08
5419 #define _CLC1GLS1_LC1G2D3N 0x10
5420 #define _CLC1GLS1_D3N 0x10
5421 #define _CLC1GLS1_LC1G2D3T 0x20
5422 #define _CLC1GLS1_D3T 0x20
5423 #define _CLC1GLS1_LC1G2D4N 0x40
5424 #define _CLC1GLS1_D4N 0x40
5425 #define _CLC1GLS1_LC1G2D4T 0x80
5426 #define _CLC1GLS1_D4T 0x80
5428 //==============================================================================
5431 //==============================================================================
5434 extern __at(0x0F18) __sfr CLC1GLS2
;
5440 unsigned LC1G3D1N
: 1;
5441 unsigned LC1G3D1T
: 1;
5442 unsigned LC1G3D2N
: 1;
5443 unsigned LC1G3D2T
: 1;
5444 unsigned LC1G3D3N
: 1;
5445 unsigned LC1G3D3T
: 1;
5446 unsigned LC1G3D4N
: 1;
5447 unsigned LC1G3D4T
: 1;
5463 extern __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
5465 #define _CLC1GLS2_LC1G3D1N 0x01
5466 #define _CLC1GLS2_D1N 0x01
5467 #define _CLC1GLS2_LC1G3D1T 0x02
5468 #define _CLC1GLS2_D1T 0x02
5469 #define _CLC1GLS2_LC1G3D2N 0x04
5470 #define _CLC1GLS2_D2N 0x04
5471 #define _CLC1GLS2_LC1G3D2T 0x08
5472 #define _CLC1GLS2_D2T 0x08
5473 #define _CLC1GLS2_LC1G3D3N 0x10
5474 #define _CLC1GLS2_D3N 0x10
5475 #define _CLC1GLS2_LC1G3D3T 0x20
5476 #define _CLC1GLS2_D3T 0x20
5477 #define _CLC1GLS2_LC1G3D4N 0x40
5478 #define _CLC1GLS2_D4N 0x40
5479 #define _CLC1GLS2_LC1G3D4T 0x80
5480 #define _CLC1GLS2_D4T 0x80
5482 //==============================================================================
5485 //==============================================================================
5488 extern __at(0x0F19) __sfr CLC1GLS3
;
5494 unsigned LC1G4D1N
: 1;
5495 unsigned LC1G4D1T
: 1;
5496 unsigned LC1G4D2N
: 1;
5497 unsigned LC1G4D2T
: 1;
5498 unsigned LC1G4D3N
: 1;
5499 unsigned LC1G4D3T
: 1;
5500 unsigned LC1G4D4N
: 1;
5501 unsigned LC1G4D4T
: 1;
5517 extern __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
5519 #define _LC1G4D1N 0x01
5521 #define _LC1G4D1T 0x02
5523 #define _LC1G4D2N 0x04
5525 #define _LC1G4D2T 0x08
5527 #define _LC1G4D3N 0x10
5529 #define _LC1G4D3T 0x20
5531 #define _LC1G4D4N 0x40
5533 #define _LC1G4D4T 0x80
5536 //==============================================================================
5539 //==============================================================================
5542 extern __at(0x0F1A) __sfr CLC2CON
;
5548 unsigned LC2MODE0
: 1;
5549 unsigned LC2MODE1
: 1;
5550 unsigned LC2MODE2
: 1;
5551 unsigned LC2INTN
: 1;
5552 unsigned LC2INTP
: 1;
5553 unsigned LC2OUT
: 1;
5572 unsigned LC2MODE
: 3;
5583 extern __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits
;
5585 #define _CLC2CON_LC2MODE0 0x01
5586 #define _CLC2CON_MODE0 0x01
5587 #define _CLC2CON_LC2MODE1 0x02
5588 #define _CLC2CON_MODE1 0x02
5589 #define _CLC2CON_LC2MODE2 0x04
5590 #define _CLC2CON_MODE2 0x04
5591 #define _CLC2CON_LC2INTN 0x08
5592 #define _CLC2CON_INTN 0x08
5593 #define _CLC2CON_LC2INTP 0x10
5594 #define _CLC2CON_INTP 0x10
5595 #define _CLC2CON_LC2OUT 0x20
5596 #define _CLC2CON_OUT 0x20
5597 #define _CLC2CON_LC2EN 0x80
5598 #define _CLC2CON_EN 0x80
5600 //==============================================================================
5603 //==============================================================================
5606 extern __at(0x0F1B) __sfr CLC2POL
;
5612 unsigned LC2G1POL
: 1;
5613 unsigned LC2G2POL
: 1;
5614 unsigned LC2G3POL
: 1;
5615 unsigned LC2G4POL
: 1;
5619 unsigned LC2POL
: 1;
5635 extern __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits
;
5637 #define _CLC2POL_LC2G1POL 0x01
5638 #define _CLC2POL_G1POL 0x01
5639 #define _CLC2POL_LC2G2POL 0x02
5640 #define _CLC2POL_G2POL 0x02
5641 #define _CLC2POL_LC2G3POL 0x04
5642 #define _CLC2POL_G3POL 0x04
5643 #define _CLC2POL_LC2G4POL 0x08
5644 #define _CLC2POL_G4POL 0x08
5645 #define _CLC2POL_LC2POL 0x80
5646 #define _CLC2POL_POL 0x80
5648 //==============================================================================
5651 //==============================================================================
5654 extern __at(0x0F1C) __sfr CLC2SEL0
;
5660 unsigned LC2D1S0
: 1;
5661 unsigned LC2D1S1
: 1;
5662 unsigned LC2D1S2
: 1;
5663 unsigned LC2D1S3
: 1;
5664 unsigned LC2D1S4
: 1;
5684 unsigned LC2D1S
: 5;
5695 extern __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
5697 #define _CLC2SEL0_LC2D1S0 0x01
5698 #define _CLC2SEL0_D1S0 0x01
5699 #define _CLC2SEL0_LC2D1S1 0x02
5700 #define _CLC2SEL0_D1S1 0x02
5701 #define _CLC2SEL0_LC2D1S2 0x04
5702 #define _CLC2SEL0_D1S2 0x04
5703 #define _CLC2SEL0_LC2D1S3 0x08
5704 #define _CLC2SEL0_D1S3 0x08
5705 #define _CLC2SEL0_LC2D1S4 0x10
5706 #define _CLC2SEL0_D1S4 0x10
5708 //==============================================================================
5711 //==============================================================================
5714 extern __at(0x0F1D) __sfr CLC2SEL1
;
5720 unsigned LC2D2S0
: 1;
5721 unsigned LC2D2S1
: 1;
5722 unsigned LC2D2S2
: 1;
5723 unsigned LC2D2S3
: 1;
5724 unsigned LC2D2S4
: 1;
5744 unsigned LC2D2S
: 5;
5755 extern __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
5757 #define _CLC2SEL1_LC2D2S0 0x01
5758 #define _CLC2SEL1_D2S0 0x01
5759 #define _CLC2SEL1_LC2D2S1 0x02
5760 #define _CLC2SEL1_D2S1 0x02
5761 #define _CLC2SEL1_LC2D2S2 0x04
5762 #define _CLC2SEL1_D2S2 0x04
5763 #define _CLC2SEL1_LC2D2S3 0x08
5764 #define _CLC2SEL1_D2S3 0x08
5765 #define _CLC2SEL1_LC2D2S4 0x10
5766 #define _CLC2SEL1_D2S4 0x10
5768 //==============================================================================
5771 //==============================================================================
5774 extern __at(0x0F1E) __sfr CLC2SEL2
;
5780 unsigned LC2D3S0
: 1;
5781 unsigned LC2D3S1
: 1;
5782 unsigned LC2D3S2
: 1;
5783 unsigned LC2D3S3
: 1;
5784 unsigned LC2D3S4
: 1;
5810 unsigned LC2D3S
: 5;
5815 extern __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
5817 #define _CLC2SEL2_LC2D3S0 0x01
5818 #define _CLC2SEL2_D3S0 0x01
5819 #define _CLC2SEL2_LC2D3S1 0x02
5820 #define _CLC2SEL2_D3S1 0x02
5821 #define _CLC2SEL2_LC2D3S2 0x04
5822 #define _CLC2SEL2_D3S2 0x04
5823 #define _CLC2SEL2_LC2D3S3 0x08
5824 #define _CLC2SEL2_D3S3 0x08
5825 #define _CLC2SEL2_LC2D3S4 0x10
5826 #define _CLC2SEL2_D3S4 0x10
5828 //==============================================================================
5831 //==============================================================================
5834 extern __at(0x0F1F) __sfr CLC2SEL3
;
5840 unsigned LC2D4S0
: 1;
5841 unsigned LC2D4S1
: 1;
5842 unsigned LC2D4S2
: 1;
5843 unsigned LC2D4S3
: 1;
5844 unsigned LC2D4S4
: 1;
5864 unsigned LC2D4S
: 5;
5875 extern __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
5877 #define _CLC2SEL3_LC2D4S0 0x01
5878 #define _CLC2SEL3_D4S0 0x01
5879 #define _CLC2SEL3_LC2D4S1 0x02
5880 #define _CLC2SEL3_D4S1 0x02
5881 #define _CLC2SEL3_LC2D4S2 0x04
5882 #define _CLC2SEL3_D4S2 0x04
5883 #define _CLC2SEL3_LC2D4S3 0x08
5884 #define _CLC2SEL3_D4S3 0x08
5885 #define _CLC2SEL3_LC2D4S4 0x10
5886 #define _CLC2SEL3_D4S4 0x10
5888 //==============================================================================
5891 //==============================================================================
5894 extern __at(0x0F20) __sfr CLC2GLS0
;
5900 unsigned LC2G1D1N
: 1;
5901 unsigned LC2G1D1T
: 1;
5902 unsigned LC2G1D2N
: 1;
5903 unsigned LC2G1D2T
: 1;
5904 unsigned LC2G1D3N
: 1;
5905 unsigned LC2G1D3T
: 1;
5906 unsigned LC2G1D4N
: 1;
5907 unsigned LC2G1D4T
: 1;
5923 extern __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
5925 #define _CLC2GLS0_LC2G1D1N 0x01
5926 #define _CLC2GLS0_D1N 0x01
5927 #define _CLC2GLS0_LC2G1D1T 0x02
5928 #define _CLC2GLS0_D1T 0x02
5929 #define _CLC2GLS0_LC2G1D2N 0x04
5930 #define _CLC2GLS0_D2N 0x04
5931 #define _CLC2GLS0_LC2G1D2T 0x08
5932 #define _CLC2GLS0_D2T 0x08
5933 #define _CLC2GLS0_LC2G1D3N 0x10
5934 #define _CLC2GLS0_D3N 0x10
5935 #define _CLC2GLS0_LC2G1D3T 0x20
5936 #define _CLC2GLS0_D3T 0x20
5937 #define _CLC2GLS0_LC2G1D4N 0x40
5938 #define _CLC2GLS0_D4N 0x40
5939 #define _CLC2GLS0_LC2G1D4T 0x80
5940 #define _CLC2GLS0_D4T 0x80
5942 //==============================================================================
5945 //==============================================================================
5948 extern __at(0x0F21) __sfr CLC2GLS1
;
5954 unsigned LC2G2D1N
: 1;
5955 unsigned LC2G2D1T
: 1;
5956 unsigned LC2G2D2N
: 1;
5957 unsigned LC2G2D2T
: 1;
5958 unsigned LC2G2D3N
: 1;
5959 unsigned LC2G2D3T
: 1;
5960 unsigned LC2G2D4N
: 1;
5961 unsigned LC2G2D4T
: 1;
5977 extern __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
5979 #define _CLC2GLS1_LC2G2D1N 0x01
5980 #define _CLC2GLS1_D1N 0x01
5981 #define _CLC2GLS1_LC2G2D1T 0x02
5982 #define _CLC2GLS1_D1T 0x02
5983 #define _CLC2GLS1_LC2G2D2N 0x04
5984 #define _CLC2GLS1_D2N 0x04
5985 #define _CLC2GLS1_LC2G2D2T 0x08
5986 #define _CLC2GLS1_D2T 0x08
5987 #define _CLC2GLS1_LC2G2D3N 0x10
5988 #define _CLC2GLS1_D3N 0x10
5989 #define _CLC2GLS1_LC2G2D3T 0x20
5990 #define _CLC2GLS1_D3T 0x20
5991 #define _CLC2GLS1_LC2G2D4N 0x40
5992 #define _CLC2GLS1_D4N 0x40
5993 #define _CLC2GLS1_LC2G2D4T 0x80
5994 #define _CLC2GLS1_D4T 0x80
5996 //==============================================================================
5999 //==============================================================================
6002 extern __at(0x0F22) __sfr CLC2GLS2
;
6008 unsigned LC2G3D1N
: 1;
6009 unsigned LC2G3D1T
: 1;
6010 unsigned LC2G3D2N
: 1;
6011 unsigned LC2G3D2T
: 1;
6012 unsigned LC2G3D3N
: 1;
6013 unsigned LC2G3D3T
: 1;
6014 unsigned LC2G3D4N
: 1;
6015 unsigned LC2G3D4T
: 1;
6031 extern __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
6033 #define _CLC2GLS2_LC2G3D1N 0x01
6034 #define _CLC2GLS2_D1N 0x01
6035 #define _CLC2GLS2_LC2G3D1T 0x02
6036 #define _CLC2GLS2_D1T 0x02
6037 #define _CLC2GLS2_LC2G3D2N 0x04
6038 #define _CLC2GLS2_D2N 0x04
6039 #define _CLC2GLS2_LC2G3D2T 0x08
6040 #define _CLC2GLS2_D2T 0x08
6041 #define _CLC2GLS2_LC2G3D3N 0x10
6042 #define _CLC2GLS2_D3N 0x10
6043 #define _CLC2GLS2_LC2G3D3T 0x20
6044 #define _CLC2GLS2_D3T 0x20
6045 #define _CLC2GLS2_LC2G3D4N 0x40
6046 #define _CLC2GLS2_D4N 0x40
6047 #define _CLC2GLS2_LC2G3D4T 0x80
6048 #define _CLC2GLS2_D4T 0x80
6050 //==============================================================================
6053 //==============================================================================
6056 extern __at(0x0F23) __sfr CLC2GLS3
;
6062 unsigned LC2G4D1N
: 1;
6063 unsigned LC2G4D1T
: 1;
6064 unsigned LC2G4D2N
: 1;
6065 unsigned LC2G4D2T
: 1;
6066 unsigned LC2G4D3N
: 1;
6067 unsigned LC2G4D3T
: 1;
6068 unsigned LC2G4D4N
: 1;
6069 unsigned LC2G4D4T
: 1;
6085 extern __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
6087 #define _CLC2GLS3_LC2G4D1N 0x01
6088 #define _CLC2GLS3_G4D1N 0x01
6089 #define _CLC2GLS3_LC2G4D1T 0x02
6090 #define _CLC2GLS3_G4D1T 0x02
6091 #define _CLC2GLS3_LC2G4D2N 0x04
6092 #define _CLC2GLS3_G4D2N 0x04
6093 #define _CLC2GLS3_LC2G4D2T 0x08
6094 #define _CLC2GLS3_G4D2T 0x08
6095 #define _CLC2GLS3_LC2G4D3N 0x10
6096 #define _CLC2GLS3_G4D3N 0x10
6097 #define _CLC2GLS3_LC2G4D3T 0x20
6098 #define _CLC2GLS3_G4D3T 0x20
6099 #define _CLC2GLS3_LC2G4D4N 0x40
6100 #define _CLC2GLS3_G4D4N 0x40
6101 #define _CLC2GLS3_LC2G4D4T 0x80
6102 #define _CLC2GLS3_G4D4T 0x80
6104 //==============================================================================
6107 //==============================================================================
6110 extern __at(0x0F24) __sfr CLC3CON
;
6116 unsigned LC3MODE0
: 1;
6117 unsigned LC3MODE1
: 1;
6118 unsigned LC3MODE2
: 1;
6119 unsigned LC3INTN
: 1;
6120 unsigned LC3INTP
: 1;
6121 unsigned LC3OUT
: 1;
6146 unsigned LC3MODE
: 3;
6151 extern __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits
;
6153 #define _CLC3CON_LC3MODE0 0x01
6154 #define _CLC3CON_MODE0 0x01
6155 #define _CLC3CON_LC3MODE1 0x02
6156 #define _CLC3CON_MODE1 0x02
6157 #define _CLC3CON_LC3MODE2 0x04
6158 #define _CLC3CON_MODE2 0x04
6159 #define _CLC3CON_LC3INTN 0x08
6160 #define _CLC3CON_INTN 0x08
6161 #define _CLC3CON_LC3INTP 0x10
6162 #define _CLC3CON_INTP 0x10
6163 #define _CLC3CON_LC3OUT 0x20
6164 #define _CLC3CON_OUT 0x20
6165 #define _CLC3CON_LC3EN 0x80
6166 #define _CLC3CON_EN 0x80
6168 //==============================================================================
6171 //==============================================================================
6174 extern __at(0x0F25) __sfr CLC3POL
;
6180 unsigned LC3G1POL
: 1;
6181 unsigned LC3G2POL
: 1;
6182 unsigned LC3G3POL
: 1;
6183 unsigned LC3G4POL
: 1;
6187 unsigned LC3POL
: 1;
6203 extern __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits
;
6205 #define _CLC3POL_LC3G1POL 0x01
6206 #define _CLC3POL_G1POL 0x01
6207 #define _CLC3POL_LC3G2POL 0x02
6208 #define _CLC3POL_G2POL 0x02
6209 #define _CLC3POL_LC3G3POL 0x04
6210 #define _CLC3POL_G3POL 0x04
6211 #define _CLC3POL_LC3G4POL 0x08
6212 #define _CLC3POL_G4POL 0x08
6213 #define _CLC3POL_LC3POL 0x80
6214 #define _CLC3POL_POL 0x80
6216 //==============================================================================
6219 //==============================================================================
6222 extern __at(0x0F26) __sfr CLC3SEL0
;
6228 unsigned LC3D1S0
: 1;
6229 unsigned LC3D1S1
: 1;
6230 unsigned LC3D1S2
: 1;
6231 unsigned LC3D1S3
: 1;
6232 unsigned LC3D1S4
: 1;
6252 unsigned LC3D1S
: 5;
6263 extern __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
6265 #define _CLC3SEL0_LC3D1S0 0x01
6266 #define _CLC3SEL0_D1S0 0x01
6267 #define _CLC3SEL0_LC3D1S1 0x02
6268 #define _CLC3SEL0_D1S1 0x02
6269 #define _CLC3SEL0_LC3D1S2 0x04
6270 #define _CLC3SEL0_D1S2 0x04
6271 #define _CLC3SEL0_LC3D1S3 0x08
6272 #define _CLC3SEL0_D1S3 0x08
6273 #define _CLC3SEL0_LC3D1S4 0x10
6274 #define _CLC3SEL0_D1S4 0x10
6276 //==============================================================================
6279 //==============================================================================
6282 extern __at(0x0F27) __sfr CLC3SEL1
;
6288 unsigned LC3D2S0
: 1;
6289 unsigned LC3D2S1
: 1;
6290 unsigned LC3D2S2
: 1;
6291 unsigned LC3D2S3
: 1;
6292 unsigned LC3D2S4
: 1;
6312 unsigned LC3D2S
: 5;
6323 extern __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
6325 #define _CLC3SEL1_LC3D2S0 0x01
6326 #define _CLC3SEL1_D2S0 0x01
6327 #define _CLC3SEL1_LC3D2S1 0x02
6328 #define _CLC3SEL1_D2S1 0x02
6329 #define _CLC3SEL1_LC3D2S2 0x04
6330 #define _CLC3SEL1_D2S2 0x04
6331 #define _CLC3SEL1_LC3D2S3 0x08
6332 #define _CLC3SEL1_D2S3 0x08
6333 #define _CLC3SEL1_LC3D2S4 0x10
6334 #define _CLC3SEL1_D2S4 0x10
6336 //==============================================================================
6339 //==============================================================================
6342 extern __at(0x0F28) __sfr CLC3SEL2
;
6348 unsigned LC3D3S0
: 1;
6349 unsigned LC3D3S1
: 1;
6350 unsigned LC3D3S2
: 1;
6351 unsigned LC3D3S3
: 1;
6352 unsigned LC3D3S4
: 1;
6372 unsigned LC3D3S
: 5;
6383 extern __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
6385 #define _CLC3SEL2_LC3D3S0 0x01
6386 #define _CLC3SEL2_D3S0 0x01
6387 #define _CLC3SEL2_LC3D3S1 0x02
6388 #define _CLC3SEL2_D3S1 0x02
6389 #define _CLC3SEL2_LC3D3S2 0x04
6390 #define _CLC3SEL2_D3S2 0x04
6391 #define _CLC3SEL2_LC3D3S3 0x08
6392 #define _CLC3SEL2_D3S3 0x08
6393 #define _CLC3SEL2_LC3D3S4 0x10
6394 #define _CLC3SEL2_D3S4 0x10
6396 //==============================================================================
6399 //==============================================================================
6402 extern __at(0x0F29) __sfr CLC3SEL3
;
6408 unsigned LC3D4S0
: 1;
6409 unsigned LC3D4S1
: 1;
6410 unsigned LC3D4S2
: 1;
6411 unsigned LC3D4S3
: 1;
6412 unsigned LC3D4S4
: 1;
6438 unsigned LC3D4S
: 5;
6443 extern __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
6445 #define _CLC3SEL3_LC3D4S0 0x01
6446 #define _CLC3SEL3_D4S0 0x01
6447 #define _CLC3SEL3_LC3D4S1 0x02
6448 #define _CLC3SEL3_D4S1 0x02
6449 #define _CLC3SEL3_LC3D4S2 0x04
6450 #define _CLC3SEL3_D4S2 0x04
6451 #define _CLC3SEL3_LC3D4S3 0x08
6452 #define _CLC3SEL3_D4S3 0x08
6453 #define _CLC3SEL3_LC3D4S4 0x10
6454 #define _CLC3SEL3_D4S4 0x10
6456 //==============================================================================
6459 //==============================================================================
6462 extern __at(0x0F2A) __sfr CLC3GLS0
;
6468 unsigned LC3G1D1N
: 1;
6469 unsigned LC3G1D1T
: 1;
6470 unsigned LC3G1D2N
: 1;
6471 unsigned LC3G1D2T
: 1;
6472 unsigned LC3G1D3N
: 1;
6473 unsigned LC3G1D3T
: 1;
6474 unsigned LC3G1D4N
: 1;
6475 unsigned LC3G1D4T
: 1;
6491 extern __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
6493 #define _CLC3GLS0_LC3G1D1N 0x01
6494 #define _CLC3GLS0_D1N 0x01
6495 #define _CLC3GLS0_LC3G1D1T 0x02
6496 #define _CLC3GLS0_D1T 0x02
6497 #define _CLC3GLS0_LC3G1D2N 0x04
6498 #define _CLC3GLS0_D2N 0x04
6499 #define _CLC3GLS0_LC3G1D2T 0x08
6500 #define _CLC3GLS0_D2T 0x08
6501 #define _CLC3GLS0_LC3G1D3N 0x10
6502 #define _CLC3GLS0_D3N 0x10
6503 #define _CLC3GLS0_LC3G1D3T 0x20
6504 #define _CLC3GLS0_D3T 0x20
6505 #define _CLC3GLS0_LC3G1D4N 0x40
6506 #define _CLC3GLS0_D4N 0x40
6507 #define _CLC3GLS0_LC3G1D4T 0x80
6508 #define _CLC3GLS0_D4T 0x80
6510 //==============================================================================
6513 //==============================================================================
6516 extern __at(0x0F2B) __sfr CLC3GLS1
;
6522 unsigned LC3G2D1N
: 1;
6523 unsigned LC3G2D1T
: 1;
6524 unsigned LC3G2D2N
: 1;
6525 unsigned LC3G2D2T
: 1;
6526 unsigned LC3G2D3N
: 1;
6527 unsigned LC3G2D3T
: 1;
6528 unsigned LC3G2D4N
: 1;
6529 unsigned LC3G2D4T
: 1;
6545 extern __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
6547 #define _CLC3GLS1_LC3G2D1N 0x01
6548 #define _CLC3GLS1_D1N 0x01
6549 #define _CLC3GLS1_LC3G2D1T 0x02
6550 #define _CLC3GLS1_D1T 0x02
6551 #define _CLC3GLS1_LC3G2D2N 0x04
6552 #define _CLC3GLS1_D2N 0x04
6553 #define _CLC3GLS1_LC3G2D2T 0x08
6554 #define _CLC3GLS1_D2T 0x08
6555 #define _CLC3GLS1_LC3G2D3N 0x10
6556 #define _CLC3GLS1_D3N 0x10
6557 #define _CLC3GLS1_LC3G2D3T 0x20
6558 #define _CLC3GLS1_D3T 0x20
6559 #define _CLC3GLS1_LC3G2D4N 0x40
6560 #define _CLC3GLS1_D4N 0x40
6561 #define _CLC3GLS1_LC3G2D4T 0x80
6562 #define _CLC3GLS1_D4T 0x80
6564 //==============================================================================
6567 //==============================================================================
6570 extern __at(0x0F2C) __sfr CLC3GLS2
;
6576 unsigned LC3G3D1N
: 1;
6577 unsigned LC3G3D1T
: 1;
6578 unsigned LC3G3D2N
: 1;
6579 unsigned LC3G3D2T
: 1;
6580 unsigned LC3G3D3N
: 1;
6581 unsigned LC3G3D3T
: 1;
6582 unsigned LC3G3D4N
: 1;
6583 unsigned LC3G3D4T
: 1;
6599 extern __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
6601 #define _CLC3GLS2_LC3G3D1N 0x01
6602 #define _CLC3GLS2_D1N 0x01
6603 #define _CLC3GLS2_LC3G3D1T 0x02
6604 #define _CLC3GLS2_D1T 0x02
6605 #define _CLC3GLS2_LC3G3D2N 0x04
6606 #define _CLC3GLS2_D2N 0x04
6607 #define _CLC3GLS2_LC3G3D2T 0x08
6608 #define _CLC3GLS2_D2T 0x08
6609 #define _CLC3GLS2_LC3G3D3N 0x10
6610 #define _CLC3GLS2_D3N 0x10
6611 #define _CLC3GLS2_LC3G3D3T 0x20
6612 #define _CLC3GLS2_D3T 0x20
6613 #define _CLC3GLS2_LC3G3D4N 0x40
6614 #define _CLC3GLS2_D4N 0x40
6615 #define _CLC3GLS2_LC3G3D4T 0x80
6616 #define _CLC3GLS2_D4T 0x80
6618 //==============================================================================
6621 //==============================================================================
6624 extern __at(0x0F2D) __sfr CLC3GLS3
;
6630 unsigned LC3G4D1N
: 1;
6631 unsigned LC3G4D1T
: 1;
6632 unsigned LC3G4D2N
: 1;
6633 unsigned LC3G4D2T
: 1;
6634 unsigned LC3G4D3N
: 1;
6635 unsigned LC3G4D3T
: 1;
6636 unsigned LC3G4D4N
: 1;
6637 unsigned LC3G4D4T
: 1;
6653 extern __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
6655 #define _CLC3GLS3_LC3G4D1N 0x01
6656 #define _CLC3GLS3_G4D1N 0x01
6657 #define _CLC3GLS3_LC3G4D1T 0x02
6658 #define _CLC3GLS3_G4D1T 0x02
6659 #define _CLC3GLS3_LC3G4D2N 0x04
6660 #define _CLC3GLS3_G4D2N 0x04
6661 #define _CLC3GLS3_LC3G4D2T 0x08
6662 #define _CLC3GLS3_G4D2T 0x08
6663 #define _CLC3GLS3_LC3G4D3N 0x10
6664 #define _CLC3GLS3_G4D3N 0x10
6665 #define _CLC3GLS3_LC3G4D3T 0x20
6666 #define _CLC3GLS3_G4D3T 0x20
6667 #define _CLC3GLS3_LC3G4D4N 0x40
6668 #define _CLC3GLS3_G4D4N 0x40
6669 #define _CLC3GLS3_LC3G4D4T 0x80
6670 #define _CLC3GLS3_G4D4T 0x80
6672 //==============================================================================
6675 //==============================================================================
6678 extern __at(0x0FE4) __sfr STATUS_SHAD
;
6682 unsigned C_SHAD
: 1;
6683 unsigned DC_SHAD
: 1;
6684 unsigned Z_SHAD
: 1;
6690 } __STATUS_SHADbits_t
;
6692 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
6694 #define _C_SHAD 0x01
6695 #define _DC_SHAD 0x02
6696 #define _Z_SHAD 0x04
6698 //==============================================================================
6700 extern __at(0x0FE5) __sfr WREG_SHAD
;
6701 extern __at(0x0FE6) __sfr BSR_SHAD
;
6702 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
6703 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
6704 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
6705 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
6706 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
6707 extern __at(0x0FED) __sfr STKPTR
;
6708 extern __at(0x0FEE) __sfr TOSL
;
6709 extern __at(0x0FEF) __sfr TOSH
;
6711 //==============================================================================
6713 // Configuration Bits
6715 //==============================================================================
6717 #define _CONFIG1 0x8007
6718 #define _CONFIG2 0x8008
6720 //----------------------------- CONFIG1 Options -------------------------------
6722 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
6723 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
6724 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
6725 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
6726 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
6727 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
6728 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
6729 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
6730 #define _WDTE_OFF 0x3FE7 // WDT disabled.
6731 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
6732 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
6733 #define _WDTE_ON 0x3FFF // WDT enabled.
6734 #define _PWRTE_ON 0x3FDF // PWRT enabled.
6735 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
6736 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
6737 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
6738 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
6739 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
6740 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
6741 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
6742 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
6743 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
6744 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
6745 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
6746 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
6747 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
6748 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
6749 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
6751 //----------------------------- CONFIG2 Options -------------------------------
6753 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control.
6754 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
6755 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control.
6756 #define _WRT_OFF 0x3FFF // Write protection off.
6757 #define _PPS1WAY_OFF 0x3FFB // The PPSLOCK bit can be set and cleared repeatedly by software.
6758 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit cannot be cleared once it is set by software.
6759 #define _ZCDDIS_OFF 0x3F7F // Zero-cross detect circuit is enabled at POR.
6760 #define _ZCDDIS_ON 0x3FFF // Zero-cross detect circuit is disabled at POR.
6761 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
6762 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
6763 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
6764 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
6765 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6766 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6767 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
6768 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
6769 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
6770 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
6771 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
6772 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
6774 //==============================================================================
6776 #define _DEVID1 0x8006
6778 #define _IDLOC0 0x8000
6779 #define _IDLOC1 0x8001
6780 #define _IDLOC2 0x8002
6781 #define _IDLOC3 0x8003
6783 //==============================================================================
6785 #ifndef NO_BIT_DEFINES
6787 #define ADON ADCON0bits.ADON // bit 0
6788 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
6789 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
6790 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
6791 #define CHS0 ADCON0bits.CHS0 // bit 2
6792 #define CHS1 ADCON0bits.CHS1 // bit 3
6793 #define CHS2 ADCON0bits.CHS2 // bit 4
6794 #define CHS3 ADCON0bits.CHS3 // bit 5
6795 #define CHS4 ADCON0bits.CHS4 // bit 6
6797 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
6798 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
6799 #define ADNREF ADCON1bits.ADNREF // bit 2
6800 #define ADCS0 ADCON1bits.ADCS0 // bit 4
6801 #define ADCS1 ADCON1bits.ADCS1 // bit 5
6802 #define ADCS2 ADCON1bits.ADCS2 // bit 6
6803 #define ADFM ADCON1bits.ADFM // bit 7
6805 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
6806 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
6807 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
6808 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
6810 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6811 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6812 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6813 #define ANSA4 ANSELAbits.ANSA4 // bit 4
6814 #define ANS5 ANSELAbits.ANS5 // bit 5
6816 #define ANSB4 ANSELBbits.ANSB4 // bit 4
6817 #define ANSB5 ANSELBbits.ANSB5 // bit 5
6818 #define ANSB6 ANSELBbits.ANSB6 // bit 6
6819 #define ANSB7 ANSELBbits.ANSB7 // bit 7
6821 #define ANSC0 ANSELCbits.ANSC0 // bit 0
6822 #define ANSC1 ANSELCbits.ANSC1 // bit 1
6823 #define ANSC2 ANSELCbits.ANSC2 // bit 2
6824 #define ANSC3 ANSELCbits.ANSC3 // bit 3
6825 #define ANSC6 ANSELCbits.ANSC6 // bit 6
6826 #define ANSC7 ANSELCbits.ANSC7 // bit 7
6828 #define ABDEN BAUD1CONbits.ABDEN // bit 0
6829 #define WUE BAUD1CONbits.WUE // bit 1
6830 #define BRG16 BAUD1CONbits.BRG16 // bit 3
6831 #define SCKP BAUD1CONbits.SCKP // bit 4
6832 #define RCIDL BAUD1CONbits.RCIDL // bit 6
6833 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
6835 #define BORRDY BORCONbits.BORRDY // bit 0
6836 #define BORFS BORCONbits.BORFS // bit 6
6837 #define SBOREN BORCONbits.SBOREN // bit 7
6839 #define BSR0 BSRbits.BSR0 // bit 0
6840 #define BSR1 BSRbits.BSR1 // bit 1
6841 #define BSR2 BSRbits.BSR2 // bit 2
6842 #define BSR3 BSRbits.BSR3 // bit 3
6843 #define BSR4 BSRbits.BSR4 // bit 4
6845 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
6846 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
6847 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
6848 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
6849 #define DC1B0 CCP1CONbits.DC1B0 // bit 4, shadows bit in CCP1CONbits
6850 #define CCP1Y CCP1CONbits.CCP1Y // bit 4, shadows bit in CCP1CONbits
6851 #define DC1B1 CCP1CONbits.DC1B1 // bit 5, shadows bit in CCP1CONbits
6852 #define CCP1X CCP1CONbits.CCP1X // bit 5, shadows bit in CCP1CONbits
6854 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
6855 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
6856 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
6857 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
6858 #define DC2B0 CCP2CONbits.DC2B0 // bit 4, shadows bit in CCP2CONbits
6859 #define CCP2Y CCP2CONbits.CCP2Y // bit 4, shadows bit in CCP2CONbits
6860 #define DC2B1 CCP2CONbits.DC2B1 // bit 5, shadows bit in CCP2CONbits
6861 #define CCP2X CCP2CONbits.CCP2X // bit 5, shadows bit in CCP2CONbits
6863 #define C1TSEL0 CCPTMRSbits.C1TSEL0 // bit 0
6864 #define C1TSEL1 CCPTMRSbits.C1TSEL1 // bit 1
6865 #define C2TSEL0 CCPTMRSbits.C2TSEL0 // bit 2
6866 #define C2TSEL1 CCPTMRSbits.C2TSEL1 // bit 3
6867 #define P3TSEL0 CCPTMRSbits.P3TSEL0 // bit 4
6868 #define P3TSEL1 CCPTMRSbits.P3TSEL1 // bit 5
6869 #define P4TSEL0 CCPTMRSbits.P4TSEL0 // bit 6
6870 #define P4TSEL1 CCPTMRSbits.P4TSEL1 // bit 7
6872 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
6873 #define MODE0 CLC1CONbits.MODE0 // bit 0, shadows bit in CLC1CONbits
6874 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
6875 #define MODE1 CLC1CONbits.MODE1 // bit 1, shadows bit in CLC1CONbits
6876 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
6877 #define MODE2 CLC1CONbits.MODE2 // bit 2, shadows bit in CLC1CONbits
6878 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
6879 #define INTN CLC1CONbits.INTN // bit 3, shadows bit in CLC1CONbits
6880 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
6881 #define INTP CLC1CONbits.INTP // bit 4, shadows bit in CLC1CONbits
6882 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
6883 #define OUT CLC1CONbits.OUT // bit 5, shadows bit in CLC1CONbits
6884 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
6885 #define EN CLC1CONbits.EN // bit 7, shadows bit in CLC1CONbits
6887 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
6888 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
6889 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
6890 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
6891 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
6892 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
6893 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
6894 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
6895 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
6896 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
6897 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
6898 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
6899 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
6900 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
6901 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
6902 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
6904 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
6905 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
6906 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
6907 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
6908 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
6909 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
6910 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
6911 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
6912 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
6913 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
6914 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
6915 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
6916 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
6917 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
6918 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
6919 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
6921 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
6922 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
6923 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
6924 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
6925 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
6926 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
6927 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
6928 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
6929 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
6930 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
6932 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
6933 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
6934 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
6935 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
6936 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
6937 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
6938 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
6939 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
6940 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
6941 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
6943 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
6944 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
6945 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
6946 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
6947 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
6948 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
6949 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
6950 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
6951 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
6952 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
6954 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
6955 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
6956 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
6957 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
6958 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
6959 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
6960 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
6961 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
6962 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
6963 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
6965 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
6966 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
6967 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
6968 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
6969 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
6970 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
6971 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
6972 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
6973 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
6974 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
6976 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0
6977 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1
6978 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2
6980 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6981 #define C1HYS CM1CON0bits.C1HYS // bit 1
6982 #define C1SP CM1CON0bits.C1SP // bit 2
6983 #define C1ZLF CM1CON0bits.C1ZLF // bit 3
6984 #define C1POL CM1CON0bits.C1POL // bit 4
6985 #define C1OUT CM1CON0bits.C1OUT // bit 6
6986 #define C1ON CM1CON0bits.C1ON // bit 7
6988 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6989 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6990 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
6991 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 3
6992 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 4
6993 #define C1PCH2 CM1CON1bits.C1PCH2 // bit 5
6994 #define C1INTN CM1CON1bits.C1INTN // bit 6
6995 #define C1INTP CM1CON1bits.C1INTP // bit 7
6997 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
6998 #define C2HYS CM2CON0bits.C2HYS // bit 1
6999 #define C2SP CM2CON0bits.C2SP // bit 2
7000 #define C2ZLF CM2CON0bits.C2ZLF // bit 3
7001 #define C2POL CM2CON0bits.C2POL // bit 4
7002 #define C2OUT CM2CON0bits.C2OUT // bit 6
7003 #define C2ON CM2CON0bits.C2ON // bit 7
7005 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
7006 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
7007 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
7008 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 3
7009 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 4
7010 #define C2PCH2 CM2CON1bits.C2PCH2 // bit 5
7011 #define C2INTN CM2CON1bits.C2INTN // bit 6
7012 #define C2INTP CM2CON1bits.C2INTP // bit 7
7014 #define MC1OUT CMOUTbits.MC1OUT // bit 0
7015 #define MC2OUT CMOUTbits.MC2OUT // bit 1
7017 #define G1ASDAC0 COG1ASD0bits.G1ASDAC0 // bit 2
7018 #define G1ASDAC1 COG1ASD0bits.G1ASDAC1 // bit 3
7019 #define G1ASDBD0 COG1ASD0bits.G1ASDBD0 // bit 4
7020 #define G1ASDBD1 COG1ASD0bits.G1ASDBD1 // bit 5
7021 #define G1ARSEN COG1ASD0bits.G1ARSEN // bit 6
7022 #define G1ASE COG1ASD0bits.G1ASE // bit 7
7024 #define G1AS0E COG1ASD1bits.G1AS0E // bit 0
7025 #define G1AS1E COG1ASD1bits.G1AS1E // bit 1
7026 #define G1AS2E COG1ASD1bits.G1AS2E // bit 2
7027 #define G1AS3E COG1ASD1bits.G1AS3E // bit 3
7029 #define G1BLKF0 COG1BLKFbits.G1BLKF0 // bit 0
7030 #define G1BLKF1 COG1BLKFbits.G1BLKF1 // bit 1
7031 #define G1BLKF2 COG1BLKFbits.G1BLKF2 // bit 2
7032 #define G1BLKF3 COG1BLKFbits.G1BLKF3 // bit 3
7033 #define G1BLKF4 COG1BLKFbits.G1BLKF4 // bit 4
7034 #define G1BLKF5 COG1BLKFbits.G1BLKF5 // bit 5
7036 #define G1BLKR0 COG1BLKRbits.G1BLKR0 // bit 0
7037 #define G1BLKR1 COG1BLKRbits.G1BLKR1 // bit 1
7038 #define G1BLKR2 COG1BLKRbits.G1BLKR2 // bit 2
7039 #define G1BLKR3 COG1BLKRbits.G1BLKR3 // bit 3
7040 #define G1BLKR4 COG1BLKRbits.G1BLKR4 // bit 4
7041 #define G1BLKR5 COG1BLKRbits.G1BLKR5 // bit 5
7043 #define G1MD0 COG1CON0bits.G1MD0 // bit 0
7044 #define G1MD1 COG1CON0bits.G1MD1 // bit 1
7045 #define G1MD2 COG1CON0bits.G1MD2 // bit 2
7046 #define G1CS0 COG1CON0bits.G1CS0 // bit 3
7047 #define G1CS1 COG1CON0bits.G1CS1 // bit 4
7048 #define G1LD COG1CON0bits.G1LD // bit 6
7049 #define G1EN COG1CON0bits.G1EN // bit 7
7051 #define G1POLA COG1CON1bits.G1POLA // bit 0
7052 #define G1POLB COG1CON1bits.G1POLB // bit 1
7053 #define G1POLC COG1CON1bits.G1POLC // bit 2
7054 #define G1POLD COG1CON1bits.G1POLD // bit 3
7055 #define G1FDBS COG1CON1bits.G1FDBS // bit 6
7056 #define G1RDBS COG1CON1bits.G1RDBS // bit 7
7058 #define G1DBF0 COG1DBFbits.G1DBF0 // bit 0
7059 #define G1DBF1 COG1DBFbits.G1DBF1 // bit 1
7060 #define G1DBF2 COG1DBFbits.G1DBF2 // bit 2
7061 #define G1DBF3 COG1DBFbits.G1DBF3 // bit 3
7062 #define G1DBF4 COG1DBFbits.G1DBF4 // bit 4
7063 #define G1DBF5 COG1DBFbits.G1DBF5 // bit 5
7065 #define G1DBR0 COG1DBRbits.G1DBR0 // bit 0
7066 #define G1DBR1 COG1DBRbits.G1DBR1 // bit 1
7067 #define G1DBR2 COG1DBRbits.G1DBR2 // bit 2
7068 #define G1DBR3 COG1DBRbits.G1DBR3 // bit 3
7069 #define G1DBR4 COG1DBRbits.G1DBR4 // bit 4
7070 #define G1DBR5 COG1DBRbits.G1DBR5 // bit 5
7072 #define G1FIS0 COG1FISbits.G1FIS0 // bit 0
7073 #define G1FIS1 COG1FISbits.G1FIS1 // bit 1
7074 #define G1FIS2 COG1FISbits.G1FIS2 // bit 2
7075 #define G1FIS3 COG1FISbits.G1FIS3 // bit 3
7076 #define G1FIS4 COG1FISbits.G1FIS4 // bit 4
7077 #define G1FIS5 COG1FISbits.G1FIS5 // bit 5
7078 #define G1FIS6 COG1FISbits.G1FIS6 // bit 6
7080 #define G1FSIM0 COG1FSIMbits.G1FSIM0 // bit 0
7081 #define G1FSIM1 COG1FSIMbits.G1FSIM1 // bit 1
7082 #define G1FSIM2 COG1FSIMbits.G1FSIM2 // bit 2
7083 #define G1FSIM3 COG1FSIMbits.G1FSIM3 // bit 3
7084 #define G1FSIM4 COG1FSIMbits.G1FSIM4 // bit 4
7085 #define G1FSIM5 COG1FSIMbits.G1FSIM5 // bit 5
7086 #define G1FSIM6 COG1FSIMbits.G1FSIM6 // bit 6
7088 #define G1PHF0 COG1PHFbits.G1PHF0 // bit 0
7089 #define G1PHF1 COG1PHFbits.G1PHF1 // bit 1
7090 #define G1PHF2 COG1PHFbits.G1PHF2 // bit 2
7091 #define G1PHF3 COG1PHFbits.G1PHF3 // bit 3
7092 #define G1PHF4 COG1PHFbits.G1PHF4 // bit 4
7093 #define G1PHF5 COG1PHFbits.G1PHF5 // bit 5
7095 #define G1PHR0 COG1PHRbits.G1PHR0 // bit 0
7096 #define G1PHR1 COG1PHRbits.G1PHR1 // bit 1
7097 #define G1PHR2 COG1PHRbits.G1PHR2 // bit 2
7098 #define G1PHR3 COG1PHRbits.G1PHR3 // bit 3
7099 #define G1PHR4 COG1PHRbits.G1PHR4 // bit 4
7100 #define G1PHR5 COG1PHRbits.G1PHR5 // bit 5
7102 #define G1RIS0 COG1RISbits.G1RIS0 // bit 0
7103 #define G1RIS1 COG1RISbits.G1RIS1 // bit 1
7104 #define G1RIS2 COG1RISbits.G1RIS2 // bit 2
7105 #define G1RIS3 COG1RISbits.G1RIS3 // bit 3
7106 #define G1RIS4 COG1RISbits.G1RIS4 // bit 4
7107 #define G1RIS5 COG1RISbits.G1RIS5 // bit 5
7108 #define G1RIS6 COG1RISbits.G1RIS6 // bit 6
7110 #define G1RSIM0 COG1RSIMbits.G1RSIM0 // bit 0
7111 #define G1RSIM1 COG1RSIMbits.G1RSIM1 // bit 1
7112 #define G1RSIM2 COG1RSIMbits.G1RSIM2 // bit 2
7113 #define G1RSIM3 COG1RSIMbits.G1RSIM3 // bit 3
7114 #define G1RSIM4 COG1RSIMbits.G1RSIM4 // bit 4
7115 #define G1RSIM5 COG1RSIMbits.G1RSIM5 // bit 5
7116 #define G1RSIM6 COG1RSIMbits.G1RSIM6 // bit 6
7118 #define G1STRA COG1STRbits.G1STRA // bit 0
7119 #define G1STRB COG1STRbits.G1STRB // bit 1
7120 #define G1STRC COG1STRbits.G1STRC // bit 2
7121 #define G1STRD COG1STRbits.G1STRD // bit 3
7122 #define G1SDATA COG1STRbits.G1SDATA // bit 4
7123 #define G1SDATB COG1STRbits.G1SDATB // bit 5
7124 #define G1SDATC COG1STRbits.G1SDATC // bit 6
7125 #define G1SDATD COG1STRbits.G1SDATD // bit 7
7127 #define DAC1NSS DAC1CON0bits.DAC1NSS // bit 0, shadows bit in DAC1CON0bits
7128 #define DACNSS DAC1CON0bits.DACNSS // bit 0, shadows bit in DAC1CON0bits
7129 #define DAC1PSS0 DAC1CON0bits.DAC1PSS0 // bit 2, shadows bit in DAC1CON0bits
7130 #define DACPSS0 DAC1CON0bits.DACPSS0 // bit 2, shadows bit in DAC1CON0bits
7131 #define DAC1PSS1 DAC1CON0bits.DAC1PSS1 // bit 3, shadows bit in DAC1CON0bits
7132 #define DACPSS1 DAC1CON0bits.DACPSS1 // bit 3, shadows bit in DAC1CON0bits
7133 #define DAC1OE2 DAC1CON0bits.DAC1OE2 // bit 4, shadows bit in DAC1CON0bits
7134 #define DACOE0 DAC1CON0bits.DACOE0 // bit 4, shadows bit in DAC1CON0bits
7135 #define DAC1OE1 DAC1CON0bits.DAC1OE1 // bit 5, shadows bit in DAC1CON0bits
7136 #define DACOE1 DAC1CON0bits.DACOE1 // bit 5, shadows bit in DAC1CON0bits
7137 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7, shadows bit in DAC1CON0bits
7138 #define DACEN DAC1CON0bits.DACEN // bit 7, shadows bit in DAC1CON0bits
7140 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0, shadows bit in DAC1CON1bits
7141 #define DACR0 DAC1CON1bits.DACR0 // bit 0, shadows bit in DAC1CON1bits
7142 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1, shadows bit in DAC1CON1bits
7143 #define DACR1 DAC1CON1bits.DACR1 // bit 1, shadows bit in DAC1CON1bits
7144 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2, shadows bit in DAC1CON1bits
7145 #define DACR2 DAC1CON1bits.DACR2 // bit 2, shadows bit in DAC1CON1bits
7146 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3, shadows bit in DAC1CON1bits
7147 #define DACR3 DAC1CON1bits.DACR3 // bit 3, shadows bit in DAC1CON1bits
7148 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4, shadows bit in DAC1CON1bits
7149 #define DACR4 DAC1CON1bits.DACR4 // bit 4, shadows bit in DAC1CON1bits
7150 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5, shadows bit in DAC1CON1bits
7151 #define DACR5 DAC1CON1bits.DACR5 // bit 5, shadows bit in DAC1CON1bits
7152 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6, shadows bit in DAC1CON1bits
7153 #define DACR6 DAC1CON1bits.DACR6 // bit 6, shadows bit in DAC1CON1bits
7154 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7, shadows bit in DAC1CON1bits
7155 #define DACR7 DAC1CON1bits.DACR7 // bit 7, shadows bit in DAC1CON1bits
7157 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
7158 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
7159 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
7160 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
7161 #define TSRNG FVRCONbits.TSRNG // bit 4
7162 #define TSEN FVRCONbits.TSEN // bit 5
7163 #define FVRRDY FVRCONbits.FVRRDY // bit 6
7164 #define FVREN FVRCONbits.FVREN // bit 7
7166 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
7167 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
7168 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
7169 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
7170 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
7171 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
7173 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
7174 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
7175 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
7176 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
7178 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
7179 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
7180 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
7181 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
7182 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
7183 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
7184 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
7185 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
7187 #define IOCIF INTCONbits.IOCIF // bit 0
7188 #define INTF INTCONbits.INTF // bit 1
7189 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
7190 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
7191 #define IOCIE INTCONbits.IOCIE // bit 3
7192 #define INTE INTCONbits.INTE // bit 4
7193 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
7194 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
7195 #define PEIE INTCONbits.PEIE // bit 6
7196 #define GIE INTCONbits.GIE // bit 7
7198 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
7199 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
7200 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
7201 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
7202 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
7203 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
7205 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
7206 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
7207 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
7208 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
7209 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
7210 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
7212 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
7213 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
7214 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
7215 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
7216 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
7217 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
7219 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
7220 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
7221 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
7222 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
7224 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
7225 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
7226 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
7227 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
7229 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
7230 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
7231 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
7232 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
7234 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
7235 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
7236 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
7237 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
7238 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
7239 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
7240 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
7241 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
7243 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
7244 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
7245 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
7246 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
7247 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
7248 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
7249 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
7250 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
7252 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
7253 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
7254 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
7255 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
7256 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
7257 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
7258 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
7259 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
7261 #define LATA0 LATAbits.LATA0 // bit 0
7262 #define LATA1 LATAbits.LATA1 // bit 1
7263 #define LATA2 LATAbits.LATA2 // bit 2
7264 #define LATA4 LATAbits.LATA4 // bit 4
7265 #define LATA5 LATAbits.LATA5 // bit 5
7267 #define LATB4 LATBbits.LATB4 // bit 4
7268 #define LATB5 LATBbits.LATB5 // bit 5
7269 #define LATB6 LATBbits.LATB6 // bit 6
7270 #define LATB7 LATBbits.LATB7 // bit 7
7272 #define LATC0 LATCbits.LATC0 // bit 0
7273 #define LATC1 LATCbits.LATC1 // bit 1
7274 #define LATC2 LATCbits.LATC2 // bit 2
7275 #define LATC3 LATCbits.LATC3 // bit 3
7276 #define LATC4 LATCbits.LATC4 // bit 4
7277 #define LATC5 LATCbits.LATC5 // bit 5
7278 #define LATC6 LATCbits.LATC6 // bit 6
7279 #define LATC7 LATCbits.LATC7 // bit 7
7281 #define ODA0 ODCONAbits.ODA0 // bit 0
7282 #define ODA1 ODCONAbits.ODA1 // bit 1
7283 #define ODA2 ODCONAbits.ODA2 // bit 2
7284 #define ODA4 ODCONAbits.ODA4 // bit 4
7285 #define ODA5 ODCONAbits.ODA5 // bit 5
7287 #define ODB4 ODCONBbits.ODB4 // bit 4
7288 #define ODB5 ODCONBbits.ODB5 // bit 5
7289 #define ODB6 ODCONBbits.ODB6 // bit 6
7290 #define ODB7 ODCONBbits.ODB7 // bit 7
7292 #define ODC0 ODCONCbits.ODC0 // bit 0
7293 #define ODC1 ODCONCbits.ODC1 // bit 1
7294 #define ODC2 ODCONCbits.ODC2 // bit 2
7295 #define ODC3 ODCONCbits.ODC3 // bit 3
7296 #define ODC4 ODCONCbits.ODC4 // bit 4
7297 #define ODC5 ODCONCbits.ODC5 // bit 5
7298 #define ODC6 ODCONCbits.ODC6 // bit 6
7299 #define ODC7 ODCONCbits.ODC7 // bit 7
7301 #define OPA1PCH0 OPA1CONbits.OPA1PCH0 // bit 0
7302 #define OPA1PCH1 OPA1CONbits.OPA1PCH1 // bit 1
7303 #define OPA1UG OPA1CONbits.OPA1UG // bit 4
7304 #define OPA1SP OPA1CONbits.OPA1SP // bit 6
7305 #define OPA1EN OPA1CONbits.OPA1EN // bit 7
7307 #define OPA2PCH0 OPA2CONbits.OPA2PCH0 // bit 0
7308 #define OPA2PCH1 OPA2CONbits.OPA2PCH1 // bit 1
7309 #define OPA2UG OPA2CONbits.OPA2UG // bit 4
7310 #define OPA2SP OPA2CONbits.OPA2SP // bit 6
7311 #define OPA2EN OPA2CONbits.OPA2EN // bit 7
7313 #define PS0 OPTION_REGbits.PS0 // bit 0
7314 #define PS1 OPTION_REGbits.PS1 // bit 1
7315 #define PS2 OPTION_REGbits.PS2 // bit 2
7316 #define PSA OPTION_REGbits.PSA // bit 3
7317 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
7318 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
7319 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
7320 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
7321 #define INTEDG OPTION_REGbits.INTEDG // bit 6
7322 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
7324 #define SCS0 OSCCONbits.SCS0 // bit 0
7325 #define SCS1 OSCCONbits.SCS1 // bit 1
7326 #define IRCF0 OSCCONbits.IRCF0 // bit 3
7327 #define IRCF1 OSCCONbits.IRCF1 // bit 4
7328 #define IRCF2 OSCCONbits.IRCF2 // bit 5
7329 #define IRCF3 OSCCONbits.IRCF3 // bit 6
7330 #define SPLLEN OSCCONbits.SPLLEN // bit 7
7332 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
7333 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
7334 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
7335 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
7336 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
7337 #define OSTS OSCSTATbits.OSTS // bit 5
7338 #define PLLR OSCSTATbits.PLLR // bit 6
7339 #define SOSCR OSCSTATbits.SOSCR // bit 7
7341 #define TUN0 OSCTUNEbits.TUN0 // bit 0
7342 #define TUN1 OSCTUNEbits.TUN1 // bit 1
7343 #define TUN2 OSCTUNEbits.TUN2 // bit 2
7344 #define TUN3 OSCTUNEbits.TUN3 // bit 3
7345 #define TUN4 OSCTUNEbits.TUN4 // bit 4
7346 #define TUN5 OSCTUNEbits.TUN5 // bit 5
7348 #define NOT_BOR PCONbits.NOT_BOR // bit 0
7349 #define NOT_POR PCONbits.NOT_POR // bit 1
7350 #define NOT_RI PCONbits.NOT_RI // bit 2
7351 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
7352 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
7353 #define STKUNF PCONbits.STKUNF // bit 6
7354 #define STKOVF PCONbits.STKOVF // bit 7
7356 #define TMR1IE PIE1bits.TMR1IE // bit 0
7357 #define TMR2IE PIE1bits.TMR2IE // bit 1
7358 #define CCP1IE PIE1bits.CCP1IE // bit 2, shadows bit in PIE1bits
7359 #define CCPIE PIE1bits.CCPIE // bit 2, shadows bit in PIE1bits
7360 #define SSP1IE PIE1bits.SSP1IE // bit 3
7361 #define TXIE PIE1bits.TXIE // bit 4
7362 #define RCIE PIE1bits.RCIE // bit 5
7363 #define ADIE PIE1bits.ADIE // bit 6
7364 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
7366 #define CCP2IE PIE2bits.CCP2IE // bit 0
7367 #define TMR4IE PIE2bits.TMR4IE // bit 1
7368 #define TMR6IE PIE2bits.TMR6IE // bit 2
7369 #define BCL1IE PIE2bits.BCL1IE // bit 3
7370 #define C1IE PIE2bits.C1IE // bit 5
7371 #define C2IE PIE2bits.C2IE // bit 6
7372 #define OSFIE PIE2bits.OSFIE // bit 7
7374 #define CLC1IE PIE3bits.CLC1IE // bit 0
7375 #define CLC2IE PIE3bits.CLC2IE // bit 1
7376 #define CLC3IE PIE3bits.CLC3IE // bit 2
7377 #define ZCDIE PIE3bits.ZCDIE // bit 4
7378 #define COGIE PIE3bits.COGIE // bit 5
7380 #define TMR1IF PIR1bits.TMR1IF // bit 0
7381 #define TMR2IF PIR1bits.TMR2IF // bit 1
7382 #define CCP1IF PIR1bits.CCP1IF // bit 2, shadows bit in PIR1bits
7383 #define CCPIF PIR1bits.CCPIF // bit 2, shadows bit in PIR1bits
7384 #define SSP1IF PIR1bits.SSP1IF // bit 3
7385 #define TXIF PIR1bits.TXIF // bit 4
7386 #define RCIF PIR1bits.RCIF // bit 5
7387 #define ADIF PIR1bits.ADIF // bit 6
7388 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
7390 #define CCP2IF PIR2bits.CCP2IF // bit 0
7391 #define TMR4IF PIR2bits.TMR4IF // bit 1
7392 #define TMR6IF PIR2bits.TMR6IF // bit 2
7393 #define BCL1IF PIR2bits.BCL1IF // bit 3
7394 #define C1IF PIR2bits.C1IF // bit 5
7395 #define C2IF PIR2bits.C2IF // bit 6
7396 #define OSFIF PIR2bits.OSFIF // bit 7
7398 #define CLC1IF PIR3bits.CLC1IF // bit 0
7399 #define CLC2IF PIR3bits.CLC2IF // bit 1
7400 #define CLC3IF PIR3bits.CLC3IF // bit 2
7401 #define ZCDIF PIR3bits.ZCDIF // bit 4
7402 #define COGIF PIR3bits.COGIF // bit 5
7404 #define RD PMCON1bits.RD // bit 0
7405 #define WR PMCON1bits.WR // bit 1
7406 #define WREN PMCON1bits.WREN // bit 2
7407 #define WRERR PMCON1bits.WRERR // bit 3
7408 #define FREE PMCON1bits.FREE // bit 4
7409 #define LWLO PMCON1bits.LWLO // bit 5
7410 #define CFGS PMCON1bits.CFGS // bit 6
7412 #define RA0 PORTAbits.RA0 // bit 0
7413 #define RA1 PORTAbits.RA1 // bit 1
7414 #define RA2 PORTAbits.RA2 // bit 2
7415 #define RA3 PORTAbits.RA3 // bit 3
7416 #define RA4 PORTAbits.RA4 // bit 4
7417 #define RA5 PORTAbits.RA5 // bit 5
7419 #define RB4 PORTBbits.RB4 // bit 4
7420 #define RB5 PORTBbits.RB5 // bit 5
7421 #define RB6 PORTBbits.RB6 // bit 6
7422 #define RB7 PORTBbits.RB7 // bit 7
7424 #define RC0 PORTCbits.RC0 // bit 0
7425 #define RC1 PORTCbits.RC1 // bit 1
7426 #define RC2 PORTCbits.RC2 // bit 2
7427 #define RC3 PORTCbits.RC3 // bit 3
7428 #define RC4 PORTCbits.RC4 // bit 4
7429 #define RC5 PORTCbits.RC5 // bit 5
7430 #define RC6 PORTCbits.RC6 // bit 6
7431 #define RC7 PORTCbits.RC7 // bit 7
7433 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
7435 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
7436 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
7437 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
7439 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
7440 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
7441 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
7442 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
7443 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
7444 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
7445 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
7446 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
7448 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
7449 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
7451 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
7452 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
7453 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
7455 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
7456 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
7457 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
7458 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
7459 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
7460 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
7461 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
7462 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
7464 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
7465 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
7467 #define RX9D RC1STAbits.RX9D // bit 0
7468 #define OERR RC1STAbits.OERR // bit 1
7469 #define FERR RC1STAbits.FERR // bit 2
7470 #define ADDEN RC1STAbits.ADDEN // bit 3
7471 #define CREN RC1STAbits.CREN // bit 4
7472 #define SREN RC1STAbits.SREN // bit 5
7473 #define RX9 RC1STAbits.RX9 // bit 6
7474 #define SPEN RC1STAbits.SPEN // bit 7
7476 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
7477 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
7478 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
7479 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
7480 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
7482 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
7483 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
7484 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
7485 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
7487 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
7488 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
7489 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
7490 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
7491 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
7492 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
7493 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
7494 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
7496 #define SSP1ADD0 SSP1ADDbits.SSP1ADD0 // bit 0, shadows bit in SSP1ADDbits
7497 #define ADD0 SSP1ADDbits.ADD0 // bit 0, shadows bit in SSP1ADDbits
7498 #define SSP1ADD1 SSP1ADDbits.SSP1ADD1 // bit 1, shadows bit in SSP1ADDbits
7499 #define ADD1 SSP1ADDbits.ADD1 // bit 1, shadows bit in SSP1ADDbits
7500 #define SSP1ADD2 SSP1ADDbits.SSP1ADD2 // bit 2, shadows bit in SSP1ADDbits
7501 #define ADD2 SSP1ADDbits.ADD2 // bit 2, shadows bit in SSP1ADDbits
7502 #define SSP1ADD3 SSP1ADDbits.SSP1ADD3 // bit 3, shadows bit in SSP1ADDbits
7503 #define ADD3 SSP1ADDbits.ADD3 // bit 3, shadows bit in SSP1ADDbits
7504 #define SSP1ADD4 SSP1ADDbits.SSP1ADD4 // bit 4, shadows bit in SSP1ADDbits
7505 #define ADD4 SSP1ADDbits.ADD4 // bit 4, shadows bit in SSP1ADDbits
7506 #define SSP1ADD5 SSP1ADDbits.SSP1ADD5 // bit 5, shadows bit in SSP1ADDbits
7507 #define ADD5 SSP1ADDbits.ADD5 // bit 5, shadows bit in SSP1ADDbits
7508 #define SSP1ADD6 SSP1ADDbits.SSP1ADD6 // bit 6, shadows bit in SSP1ADDbits
7509 #define ADD6 SSP1ADDbits.ADD6 // bit 6, shadows bit in SSP1ADDbits
7510 #define SSP1ADD7 SSP1ADDbits.SSP1ADD7 // bit 7, shadows bit in SSP1ADDbits
7511 #define ADD7 SSP1ADDbits.ADD7 // bit 7, shadows bit in SSP1ADDbits
7513 #define SSP1BUF0 SSP1BUFbits.SSP1BUF0 // bit 0, shadows bit in SSP1BUFbits
7514 #define BUF0 SSP1BUFbits.BUF0 // bit 0, shadows bit in SSP1BUFbits
7515 #define SSP1BUF1 SSP1BUFbits.SSP1BUF1 // bit 1, shadows bit in SSP1BUFbits
7516 #define BUF1 SSP1BUFbits.BUF1 // bit 1, shadows bit in SSP1BUFbits
7517 #define SSP1BUF2 SSP1BUFbits.SSP1BUF2 // bit 2, shadows bit in SSP1BUFbits
7518 #define BUF2 SSP1BUFbits.BUF2 // bit 2, shadows bit in SSP1BUFbits
7519 #define SSP1BUF3 SSP1BUFbits.SSP1BUF3 // bit 3, shadows bit in SSP1BUFbits
7520 #define BUF3 SSP1BUFbits.BUF3 // bit 3, shadows bit in SSP1BUFbits
7521 #define SSP1BUF4 SSP1BUFbits.SSP1BUF4 // bit 4, shadows bit in SSP1BUFbits
7522 #define BUF4 SSP1BUFbits.BUF4 // bit 4, shadows bit in SSP1BUFbits
7523 #define SSP1BUF5 SSP1BUFbits.SSP1BUF5 // bit 5, shadows bit in SSP1BUFbits
7524 #define BUF5 SSP1BUFbits.BUF5 // bit 5, shadows bit in SSP1BUFbits
7525 #define SSP1BUF6 SSP1BUFbits.SSP1BUF6 // bit 6, shadows bit in SSP1BUFbits
7526 #define BUF6 SSP1BUFbits.BUF6 // bit 6, shadows bit in SSP1BUFbits
7527 #define SSP1BUF7 SSP1BUFbits.SSP1BUF7 // bit 7, shadows bit in SSP1BUFbits
7528 #define BUF7 SSP1BUFbits.BUF7 // bit 7, shadows bit in SSP1BUFbits
7530 #define SSPM0 SSP1CONbits.SSPM0 // bit 0
7531 #define SSPM1 SSP1CONbits.SSPM1 // bit 1
7532 #define SSPM2 SSP1CONbits.SSPM2 // bit 2
7533 #define SSPM3 SSP1CONbits.SSPM3 // bit 3
7534 #define CKP SSP1CONbits.CKP // bit 4
7535 #define SSPEN SSP1CONbits.SSPEN // bit 5
7536 #define SSPOV SSP1CONbits.SSPOV // bit 6
7537 #define WCOL SSP1CONbits.WCOL // bit 7
7539 #define SEN SSP1CON2bits.SEN // bit 0
7540 #define RSEN SSP1CON2bits.RSEN // bit 1
7541 #define PEN SSP1CON2bits.PEN // bit 2
7542 #define RCEN SSP1CON2bits.RCEN // bit 3
7543 #define ACKEN SSP1CON2bits.ACKEN // bit 4
7544 #define ACKDT SSP1CON2bits.ACKDT // bit 5
7545 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
7546 #define GCEN SSP1CON2bits.GCEN // bit 7
7548 #define DHEN SSP1CON3bits.DHEN // bit 0
7549 #define AHEN SSP1CON3bits.AHEN // bit 1
7550 #define SBCDE SSP1CON3bits.SBCDE // bit 2
7551 #define SDAHT SSP1CON3bits.SDAHT // bit 3
7552 #define BOEN SSP1CON3bits.BOEN // bit 4
7553 #define SCIE SSP1CON3bits.SCIE // bit 5
7554 #define PCIE SSP1CON3bits.PCIE // bit 6
7555 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
7557 #define SSP1MSK0 SSP1MSKbits.SSP1MSK0 // bit 0, shadows bit in SSP1MSKbits
7558 #define MSK0 SSP1MSKbits.MSK0 // bit 0, shadows bit in SSP1MSKbits
7559 #define SSP1MSK1 SSP1MSKbits.SSP1MSK1 // bit 1, shadows bit in SSP1MSKbits
7560 #define MSK1 SSP1MSKbits.MSK1 // bit 1, shadows bit in SSP1MSKbits
7561 #define SSP1MSK2 SSP1MSKbits.SSP1MSK2 // bit 2, shadows bit in SSP1MSKbits
7562 #define MSK2 SSP1MSKbits.MSK2 // bit 2, shadows bit in SSP1MSKbits
7563 #define SSP1MSK3 SSP1MSKbits.SSP1MSK3 // bit 3, shadows bit in SSP1MSKbits
7564 #define MSK3 SSP1MSKbits.MSK3 // bit 3, shadows bit in SSP1MSKbits
7565 #define SSP1MSK4 SSP1MSKbits.SSP1MSK4 // bit 4, shadows bit in SSP1MSKbits
7566 #define MSK4 SSP1MSKbits.MSK4 // bit 4, shadows bit in SSP1MSKbits
7567 #define SSP1MSK5 SSP1MSKbits.SSP1MSK5 // bit 5, shadows bit in SSP1MSKbits
7568 #define MSK5 SSP1MSKbits.MSK5 // bit 5, shadows bit in SSP1MSKbits
7569 #define SSP1MSK6 SSP1MSKbits.SSP1MSK6 // bit 6, shadows bit in SSP1MSKbits
7570 #define MSK6 SSP1MSKbits.MSK6 // bit 6, shadows bit in SSP1MSKbits
7571 #define SSP1MSK7 SSP1MSKbits.SSP1MSK7 // bit 7, shadows bit in SSP1MSKbits
7572 #define MSK7 SSP1MSKbits.MSK7 // bit 7, shadows bit in SSP1MSKbits
7574 #define BF SSP1STATbits.BF // bit 0
7575 #define UA SSP1STATbits.UA // bit 1
7576 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
7577 #define S SSP1STATbits.S // bit 3
7578 #define P SSP1STATbits.P // bit 4
7579 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
7580 #define CKE SSP1STATbits.CKE // bit 6
7581 #define SMP SSP1STATbits.SMP // bit 7
7583 #define C STATUSbits.C // bit 0
7584 #define DC STATUSbits.DC // bit 1
7585 #define Z STATUSbits.Z // bit 2
7586 #define NOT_PD STATUSbits.NOT_PD // bit 3
7587 #define NOT_TO STATUSbits.NOT_TO // bit 4
7589 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
7590 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
7591 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
7593 #define TMR1ON T1CONbits.TMR1ON // bit 0
7594 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
7595 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
7596 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
7597 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
7598 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
7599 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
7601 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
7602 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
7603 #define T1GVAL T1GCONbits.T1GVAL // bit 2
7604 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
7605 #define T1GSPM T1GCONbits.T1GSPM // bit 4
7606 #define T1GTM T1GCONbits.T1GTM // bit 5
7607 #define T1GPOL T1GCONbits.T1GPOL // bit 6
7608 #define TMR1GE T1GCONbits.TMR1GE // bit 7
7610 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
7611 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
7612 #define TMR2ON T2CONbits.TMR2ON // bit 2
7613 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
7614 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
7615 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
7616 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
7618 #define T4CKPS0 T4CONbits.T4CKPS0 // bit 0
7619 #define T4CKPS1 T4CONbits.T4CKPS1 // bit 1
7620 #define TMR4ON T4CONbits.TMR4ON // bit 2
7621 #define T4OUTPS0 T4CONbits.T4OUTPS0 // bit 3
7622 #define T4OUTPS1 T4CONbits.T4OUTPS1 // bit 4
7623 #define T4OUTPS2 T4CONbits.T4OUTPS2 // bit 5
7624 #define T4OUTPS3 T4CONbits.T4OUTPS3 // bit 6
7626 #define T6CKPS0 T6CONbits.T6CKPS0 // bit 0
7627 #define T6CKPS1 T6CONbits.T6CKPS1 // bit 1
7628 #define TMR6ON T6CONbits.TMR6ON // bit 2
7629 #define T6OUTPS0 T6CONbits.T6OUTPS0 // bit 3
7630 #define T6OUTPS1 T6CONbits.T6OUTPS1 // bit 4
7631 #define T6OUTPS2 T6CONbits.T6OUTPS2 // bit 5
7632 #define T6OUTPS3 T6CONbits.T6OUTPS3 // bit 6
7634 #define TRISA0 TRISAbits.TRISA0 // bit 0
7635 #define TRISA1 TRISAbits.TRISA1 // bit 1
7636 #define TRISA2 TRISAbits.TRISA2 // bit 2
7637 #define TRISA4 TRISAbits.TRISA4 // bit 4
7638 #define TRISA5 TRISAbits.TRISA5 // bit 5
7640 #define TRISB4 TRISBbits.TRISB4 // bit 4
7641 #define TRISB5 TRISBbits.TRISB5 // bit 5
7642 #define TRISB6 TRISBbits.TRISB6 // bit 6
7643 #define TRISB7 TRISBbits.TRISB7 // bit 7
7645 #define TRISC0 TRISCbits.TRISC0 // bit 0
7646 #define TRISC1 TRISCbits.TRISC1 // bit 1
7647 #define TRISC2 TRISCbits.TRISC2 // bit 2
7648 #define TRISC3 TRISCbits.TRISC3 // bit 3
7649 #define TRISC4 TRISCbits.TRISC4 // bit 4
7650 #define TRISC5 TRISCbits.TRISC5 // bit 5
7651 #define TRISC6 TRISCbits.TRISC6 // bit 6
7652 #define TRISC7 TRISCbits.TRISC7 // bit 7
7654 #define TX9D TX1STAbits.TX9D // bit 0
7655 #define TRMT TX1STAbits.TRMT // bit 1
7656 #define BRGH TX1STAbits.BRGH // bit 2
7657 #define SENDB TX1STAbits.SENDB // bit 3
7658 #define SYNC TX1STAbits.SYNC // bit 4
7659 #define TXEN TX1STAbits.TXEN // bit 5
7660 #define TX9 TX1STAbits.TX9 // bit 6
7661 #define CSRC TX1STAbits.CSRC // bit 7
7663 #define SWDTEN WDTCONbits.SWDTEN // bit 0
7664 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
7665 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
7666 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
7667 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
7668 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
7670 #define WPUA0 WPUAbits.WPUA0 // bit 0
7671 #define WPUA1 WPUAbits.WPUA1 // bit 1
7672 #define WPUA2 WPUAbits.WPUA2 // bit 2
7673 #define WPUA3 WPUAbits.WPUA3 // bit 3
7674 #define WPUA4 WPUAbits.WPUA4 // bit 4
7675 #define WPUA5 WPUAbits.WPUA5 // bit 5
7677 #define WPUB4 WPUBbits.WPUB4 // bit 4
7678 #define WPUB5 WPUBbits.WPUB5 // bit 5
7679 #define WPUB6 WPUBbits.WPUB6 // bit 6
7680 #define WPUB7 WPUBbits.WPUB7 // bit 7
7682 #define WPUC0 WPUCbits.WPUC0 // bit 0
7683 #define WPUC1 WPUCbits.WPUC1 // bit 1
7684 #define WPUC2 WPUCbits.WPUC2 // bit 2
7685 #define WPUC3 WPUCbits.WPUC3 // bit 3
7686 #define WPUC4 WPUCbits.WPUC4 // bit 4
7687 #define WPUC5 WPUCbits.WPUC5 // bit 5
7688 #define WPUC6 WPUCbits.WPUC6 // bit 6
7689 #define WPUC7 WPUCbits.WPUC7 // bit 7
7691 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
7692 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
7693 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
7694 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
7695 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
7697 #endif // #ifndef NO_BIT_DEFINES
7699 #endif // #ifndef __PIC16LF1708_H__