2 * This declarations of the PIC16LF1719 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:13 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF1719_H__
26 #define __PIC16LF1719_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTD_ADDR 0x000F
54 #define PORTE_ADDR 0x0010
55 #define PIR1_ADDR 0x0011
56 #define PIR2_ADDR 0x0012
57 #define PIR3_ADDR 0x0013
58 #define TMR0_ADDR 0x0015
59 #define TMR1_ADDR 0x0016
60 #define TMR1L_ADDR 0x0016
61 #define TMR1H_ADDR 0x0017
62 #define T1CON_ADDR 0x0018
63 #define T1GCON_ADDR 0x0019
64 #define TMR2_ADDR 0x001A
65 #define PR2_ADDR 0x001B
66 #define T2CON_ADDR 0x001C
67 #define TRISA_ADDR 0x008C
68 #define TRISB_ADDR 0x008D
69 #define TRISC_ADDR 0x008E
70 #define TRISD_ADDR 0x008F
71 #define TRISE_ADDR 0x0090
72 #define PIE1_ADDR 0x0091
73 #define PIE2_ADDR 0x0092
74 #define PIE3_ADDR 0x0093
75 #define OPTION_REG_ADDR 0x0095
76 #define PCON_ADDR 0x0096
77 #define WDTCON_ADDR 0x0097
78 #define OSCTUNE_ADDR 0x0098
79 #define OSCCON_ADDR 0x0099
80 #define OSCSTAT_ADDR 0x009A
81 #define ADRES_ADDR 0x009B
82 #define ADRESL_ADDR 0x009B
83 #define ADRESH_ADDR 0x009C
84 #define ADCON0_ADDR 0x009D
85 #define ADCON1_ADDR 0x009E
86 #define ADCON2_ADDR 0x009F
87 #define LATA_ADDR 0x010C
88 #define LATB_ADDR 0x010D
89 #define LATC_ADDR 0x010E
90 #define LATD_ADDR 0x010F
91 #define LATE_ADDR 0x0110
92 #define CM1CON0_ADDR 0x0111
93 #define CM1CON1_ADDR 0x0112
94 #define CM2CON0_ADDR 0x0113
95 #define CM2CON1_ADDR 0x0114
96 #define CMOUT_ADDR 0x0115
97 #define BORCON_ADDR 0x0116
98 #define FVRCON_ADDR 0x0117
99 #define DAC1CON0_ADDR 0x0118
100 #define DAC1CON1_ADDR 0x0119
101 #define DAC2CON0_ADDR 0x011A
102 #define DAC2CON1_ADDR 0x011B
103 #define DAC2REF_ADDR 0x011B
104 #define ZCD1CON_ADDR 0x011C
105 #define ANSELA_ADDR 0x018C
106 #define ANSELB_ADDR 0x018D
107 #define ANSELC_ADDR 0x018E
108 #define ANSELD_ADDR 0x018F
109 #define ANSELE_ADDR 0x0190
110 #define PMADR_ADDR 0x0191
111 #define PMADRL_ADDR 0x0191
112 #define PMADRH_ADDR 0x0192
113 #define PMDAT_ADDR 0x0193
114 #define PMDATL_ADDR 0x0193
115 #define PMDATH_ADDR 0x0194
116 #define PMCON1_ADDR 0x0195
117 #define PMCON2_ADDR 0x0196
118 #define RC1REG_ADDR 0x0199
119 #define RCREG_ADDR 0x0199
120 #define RCREG1_ADDR 0x0199
121 #define TX1REG_ADDR 0x019A
122 #define TXREG_ADDR 0x019A
123 #define TXREG1_ADDR 0x019A
124 #define SP1BRG_ADDR 0x019B
125 #define SP1BRGL_ADDR 0x019B
126 #define SPBRG_ADDR 0x019B
127 #define SPBRG1_ADDR 0x019B
128 #define SPBRGL_ADDR 0x019B
129 #define SP1BRGH_ADDR 0x019C
130 #define SPBRGH_ADDR 0x019C
131 #define SPBRGH1_ADDR 0x019C
132 #define RC1STA_ADDR 0x019D
133 #define RCSTA_ADDR 0x019D
134 #define RCSTA1_ADDR 0x019D
135 #define TX1STA_ADDR 0x019E
136 #define TXSTA_ADDR 0x019E
137 #define TXSTA1_ADDR 0x019E
138 #define BAUD1CON_ADDR 0x019F
139 #define BAUDCON_ADDR 0x019F
140 #define BAUDCON1_ADDR 0x019F
141 #define BAUDCTL_ADDR 0x019F
142 #define BAUDCTL1_ADDR 0x019F
143 #define WPUA_ADDR 0x020C
144 #define WPUB_ADDR 0x020D
145 #define WPUC_ADDR 0x020E
146 #define WPUD_ADDR 0x020F
147 #define WPUE_ADDR 0x0210
148 #define SSP1BUF_ADDR 0x0211
149 #define SSPBUF_ADDR 0x0211
150 #define SSP1ADD_ADDR 0x0212
151 #define SSPADD_ADDR 0x0212
152 #define SSP1MSK_ADDR 0x0213
153 #define SSPMSK_ADDR 0x0213
154 #define SSP1STAT_ADDR 0x0214
155 #define SSPSTAT_ADDR 0x0214
156 #define SSP1CON_ADDR 0x0215
157 #define SSP1CON1_ADDR 0x0215
158 #define SSPCON_ADDR 0x0215
159 #define SSPCON1_ADDR 0x0215
160 #define SSP1CON2_ADDR 0x0216
161 #define SSPCON2_ADDR 0x0216
162 #define SSP1CON3_ADDR 0x0217
163 #define SSPCON3_ADDR 0x0217
164 #define ODCONA_ADDR 0x028C
165 #define ODCONB_ADDR 0x028D
166 #define ODCONC_ADDR 0x028E
167 #define ODCOND_ADDR 0x028F
168 #define ODCONE_ADDR 0x0290
169 #define CCPR1_ADDR 0x0291
170 #define CCPR1L_ADDR 0x0291
171 #define CCPR1H_ADDR 0x0292
172 #define CCP1CON_ADDR 0x0293
173 #define ECCP1CON_ADDR 0x0293
174 #define CCPR2_ADDR 0x0298
175 #define CCPR2L_ADDR 0x0298
176 #define CCPR2H_ADDR 0x0299
177 #define CCP2CON_ADDR 0x029A
178 #define ECCP2CON_ADDR 0x029A
179 #define CCPTMRS_ADDR 0x029E
180 #define SLRCONA_ADDR 0x030C
181 #define SLRCONB_ADDR 0x030D
182 #define SLRCONC_ADDR 0x030E
183 #define SLRCOND_ADDR 0x030F
184 #define SLRCONE_ADDR 0x0310
185 #define INLVLA_ADDR 0x038C
186 #define INLVLB_ADDR 0x038D
187 #define INLVLC_ADDR 0x038E
188 #define INLVLD_ADDR 0x038F
189 #define INLVLE_ADDR 0x0390
190 #define IOCAP_ADDR 0x0391
191 #define IOCAN_ADDR 0x0392
192 #define IOCAF_ADDR 0x0393
193 #define IOCBP_ADDR 0x0394
194 #define IOCBN_ADDR 0x0395
195 #define IOCBF_ADDR 0x0396
196 #define IOCCP_ADDR 0x0397
197 #define IOCCN_ADDR 0x0398
198 #define IOCCF_ADDR 0x0399
199 #define IOCEP_ADDR 0x039D
200 #define IOCEN_ADDR 0x039E
201 #define IOCEF_ADDR 0x039F
202 #define TMR4_ADDR 0x0415
203 #define PR4_ADDR 0x0416
204 #define T4CON_ADDR 0x0417
205 #define TMR6_ADDR 0x041C
206 #define PR6_ADDR 0x041D
207 #define T6CON_ADDR 0x041E
208 #define NCO1ACC_ADDR 0x0498
209 #define NCO1ACCL_ADDR 0x0498
210 #define NCO1ACCH_ADDR 0x0499
211 #define NCO1ACCU_ADDR 0x049A
212 #define NCO1INC_ADDR 0x049B
213 #define NCO1INCL_ADDR 0x049B
214 #define NCO1INCH_ADDR 0x049C
215 #define NCO1INCU_ADDR 0x049D
216 #define NCO1CON_ADDR 0x049E
217 #define NCO1CLK_ADDR 0x049F
218 #define OPA1CON_ADDR 0x0511
219 #define OPA2CON_ADDR 0x0515
220 #define PWM3DCL_ADDR 0x0617
221 #define PWM3DCH_ADDR 0x0618
222 #define PWM3CON_ADDR 0x0619
223 #define PWM3CON0_ADDR 0x0619
224 #define PWM4DCL_ADDR 0x061A
225 #define PWM4DCH_ADDR 0x061B
226 #define PWM4CON_ADDR 0x061C
227 #define PWM4CON0_ADDR 0x061C
228 #define COG1PHR_ADDR 0x0691
229 #define COG1PHF_ADDR 0x0692
230 #define COG1BLKR_ADDR 0x0693
231 #define COG1BLKF_ADDR 0x0694
232 #define COG1DBR_ADDR 0x0695
233 #define COG1DBF_ADDR 0x0696
234 #define COG1CON0_ADDR 0x0697
235 #define COG1CON1_ADDR 0x0698
236 #define COG1RIS_ADDR 0x0699
237 #define COG1RSIM_ADDR 0x069A
238 #define COG1FIS_ADDR 0x069B
239 #define COG1FSIM_ADDR 0x069C
240 #define COG1ASD0_ADDR 0x069D
241 #define COG1ASD1_ADDR 0x069E
242 #define COG1STR_ADDR 0x069F
243 #define PPSLOCK_ADDR 0x0E0F
244 #define INTPPS_ADDR 0x0E10
245 #define T0CKIPPS_ADDR 0x0E11
246 #define T1CKIPPS_ADDR 0x0E12
247 #define T1GPPS_ADDR 0x0E13
248 #define CCP1PPS_ADDR 0x0E14
249 #define CCP2PPS_ADDR 0x0E15
250 #define COGINPPS_ADDR 0x0E17
251 #define SSPCLKPPS_ADDR 0x0E20
252 #define SSPDATPPS_ADDR 0x0E21
253 #define SSPSSPPS_ADDR 0x0E22
254 #define RXPPS_ADDR 0x0E24
255 #define CKPPS_ADDR 0x0E25
256 #define CLCIN0PPS_ADDR 0x0E28
257 #define CLCIN1PPS_ADDR 0x0E29
258 #define CLCIN2PPS_ADDR 0x0E2A
259 #define CLCIN3PPS_ADDR 0x0E2B
260 #define RA0PPS_ADDR 0x0E90
261 #define RA1PPS_ADDR 0x0E91
262 #define RA2PPS_ADDR 0x0E92
263 #define RA3PPS_ADDR 0x0E93
264 #define RA4PPS_ADDR 0x0E94
265 #define RA5PPS_ADDR 0x0E95
266 #define RA6PPS_ADDR 0x0E96
267 #define RA7PPS_ADDR 0x0E97
268 #define RB0PPS_ADDR 0x0E98
269 #define RB1PPS_ADDR 0x0E99
270 #define RB2PPS_ADDR 0x0E9A
271 #define RB3PPS_ADDR 0x0E9B
272 #define RB4PPS_ADDR 0x0E9C
273 #define RB5PPS_ADDR 0x0E9D
274 #define RB6PPS_ADDR 0x0E9E
275 #define RB7PPS_ADDR 0x0E9F
276 #define RC0PPS_ADDR 0x0EA0
277 #define RC1PPS_ADDR 0x0EA1
278 #define RC2PPS_ADDR 0x0EA2
279 #define RC3PPS_ADDR 0x0EA3
280 #define RC4PPS_ADDR 0x0EA4
281 #define RC5PPS_ADDR 0x0EA5
282 #define RC6PPS_ADDR 0x0EA6
283 #define RC7PPS_ADDR 0x0EA7
284 #define RD0PPS_ADDR 0x0EA8
285 #define RD1PPS_ADDR 0x0EA9
286 #define RD2PPS_ADDR 0x0EAA
287 #define RD3PPS_ADDR 0x0EAB
288 #define RD4PPS_ADDR 0x0EAC
289 #define RD5PPS_ADDR 0x0EAD
290 #define RD6PPS_ADDR 0x0EAE
291 #define RD7PPS_ADDR 0x0EAF
292 #define RE0PPS_ADDR 0x0EB0
293 #define RE1PPS_ADDR 0x0EB1
294 #define RE2PPS_ADDR 0x0EB2
295 #define CLCDATA_ADDR 0x0F0F
296 #define CLC1CON_ADDR 0x0F10
297 #define CLC1POL_ADDR 0x0F11
298 #define CLC1SEL0_ADDR 0x0F12
299 #define CLC1SEL1_ADDR 0x0F13
300 #define CLC1SEL2_ADDR 0x0F14
301 #define CLC1SEL3_ADDR 0x0F15
302 #define CLC1GLS0_ADDR 0x0F16
303 #define CLC1GLS1_ADDR 0x0F17
304 #define CLC1GLS2_ADDR 0x0F18
305 #define CLC1GLS3_ADDR 0x0F19
306 #define CLC2CON_ADDR 0x0F1A
307 #define CLC2POL_ADDR 0x0F1B
308 #define CLC2SEL0_ADDR 0x0F1C
309 #define CLC2SEL1_ADDR 0x0F1D
310 #define CLC2SEL2_ADDR 0x0F1E
311 #define CLC2SEL3_ADDR 0x0F1F
312 #define CLC2GLS0_ADDR 0x0F20
313 #define CLC2GLS1_ADDR 0x0F21
314 #define CLC2GLS2_ADDR 0x0F22
315 #define CLC2GLS3_ADDR 0x0F23
316 #define CLC3CON_ADDR 0x0F24
317 #define CLC3POL_ADDR 0x0F25
318 #define CLC3SEL0_ADDR 0x0F26
319 #define CLC3SEL1_ADDR 0x0F27
320 #define CLC3SEL2_ADDR 0x0F28
321 #define CLC3SEL3_ADDR 0x0F29
322 #define CLC3GLS0_ADDR 0x0F2A
323 #define CLC3GLS1_ADDR 0x0F2B
324 #define CLC3GLS2_ADDR 0x0F2C
325 #define CLC3GLS3_ADDR 0x0F2D
326 #define CLC4CON_ADDR 0x0F2E
327 #define CLC4POL_ADDR 0x0F2F
328 #define CLC4SEL0_ADDR 0x0F30
329 #define CLC4SEL1_ADDR 0x0F31
330 #define CLC4SEL2_ADDR 0x0F32
331 #define CLC4SEL3_ADDR 0x0F33
332 #define CLC4GLS0_ADDR 0x0F34
333 #define CLC4GLS1_ADDR 0x0F35
334 #define CLC4GLS2_ADDR 0x0F36
335 #define CLC4GLS3_ADDR 0x0F37
336 #define STATUS_SHAD_ADDR 0x0FE4
337 #define WREG_SHAD_ADDR 0x0FE5
338 #define BSR_SHAD_ADDR 0x0FE6
339 #define PCLATH_SHAD_ADDR 0x0FE7
340 #define FSR0L_SHAD_ADDR 0x0FE8
341 #define FSR0H_SHAD_ADDR 0x0FE9
342 #define FSR1L_SHAD_ADDR 0x0FEA
343 #define FSR1H_SHAD_ADDR 0x0FEB
344 #define STKPTR_ADDR 0x0FED
345 #define TOSL_ADDR 0x0FEE
346 #define TOSH_ADDR 0x0FEF
348 #endif // #ifndef NO_ADDR_DEFINES
350 //==============================================================================
352 // Register Definitions
354 //==============================================================================
356 extern __at(0x0000) __sfr INDF0
;
357 extern __at(0x0001) __sfr INDF1
;
358 extern __at(0x0002) __sfr PCL
;
360 //==============================================================================
363 extern __at(0x0003) __sfr STATUS
;
377 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
385 //==============================================================================
387 extern __at(0x0004) __sfr FSR0
;
388 extern __at(0x0004) __sfr FSR0L
;
389 extern __at(0x0005) __sfr FSR0H
;
390 extern __at(0x0006) __sfr FSR1
;
391 extern __at(0x0006) __sfr FSR1L
;
392 extern __at(0x0007) __sfr FSR1H
;
394 //==============================================================================
397 extern __at(0x0008) __sfr BSR
;
420 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
428 //==============================================================================
430 extern __at(0x0009) __sfr WREG
;
431 extern __at(0x000A) __sfr PCLATH
;
433 //==============================================================================
436 extern __at(0x000B) __sfr INTCON
;
465 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
478 //==============================================================================
481 //==============================================================================
484 extern __at(0x000C) __sfr PORTA
;
498 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
509 //==============================================================================
512 //==============================================================================
515 extern __at(0x000D) __sfr PORTB
;
529 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
540 //==============================================================================
543 //==============================================================================
546 extern __at(0x000E) __sfr PORTC
;
560 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
571 //==============================================================================
574 //==============================================================================
577 extern __at(0x000F) __sfr PORTD
;
591 extern __at(0x000F) volatile __PORTDbits_t PORTDbits
;
602 //==============================================================================
605 //==============================================================================
608 extern __at(0x0010) __sfr PORTE
;
631 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
638 //==============================================================================
641 //==============================================================================
644 extern __at(0x0011) __sfr PIR1
;
655 unsigned TMR1GIF
: 1;
658 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
667 #define _TMR1GIF 0x80
669 //==============================================================================
672 //==============================================================================
675 extern __at(0x0012) __sfr PIR2
;
689 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
699 //==============================================================================
702 //==============================================================================
705 extern __at(0x0013) __sfr PIR3
;
719 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
729 //==============================================================================
731 extern __at(0x0015) __sfr TMR0
;
732 extern __at(0x0016) __sfr TMR1
;
733 extern __at(0x0016) __sfr TMR1L
;
734 extern __at(0x0017) __sfr TMR1H
;
736 //==============================================================================
739 extern __at(0x0018) __sfr T1CON
;
747 unsigned NOT_T1SYNC
: 1;
748 unsigned T1OSCEN
: 1;
749 unsigned T1CKPS0
: 1;
750 unsigned T1CKPS1
: 1;
751 unsigned TMR1CS0
: 1;
752 unsigned TMR1CS1
: 1;
769 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
772 #define _NOT_T1SYNC 0x04
773 #define _T1OSCEN 0x08
774 #define _T1CKPS0 0x10
775 #define _T1CKPS1 0x20
776 #define _TMR1CS0 0x40
777 #define _TMR1CS1 0x80
779 //==============================================================================
782 //==============================================================================
785 extern __at(0x0019) __sfr T1GCON
;
794 unsigned T1GGO_NOT_DONE
: 1;
808 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
813 #define _T1GGO_NOT_DONE 0x08
819 //==============================================================================
821 extern __at(0x001A) __sfr TMR2
;
822 extern __at(0x001B) __sfr PR2
;
824 //==============================================================================
827 extern __at(0x001C) __sfr T2CON
;
833 unsigned T2CKPS0
: 1;
834 unsigned T2CKPS1
: 1;
836 unsigned T2OUTPS0
: 1;
837 unsigned T2OUTPS1
: 1;
838 unsigned T2OUTPS2
: 1;
839 unsigned T2OUTPS3
: 1;
852 unsigned T2OUTPS
: 4;
857 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
859 #define _T2CKPS0 0x01
860 #define _T2CKPS1 0x02
862 #define _T2OUTPS0 0x08
863 #define _T2OUTPS1 0x10
864 #define _T2OUTPS2 0x20
865 #define _T2OUTPS3 0x40
867 //==============================================================================
870 //==============================================================================
873 extern __at(0x008C) __sfr TRISA
;
887 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
898 //==============================================================================
901 //==============================================================================
904 extern __at(0x008D) __sfr TRISB
;
918 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
929 //==============================================================================
932 //==============================================================================
935 extern __at(0x008E) __sfr TRISC
;
949 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
960 //==============================================================================
963 //==============================================================================
966 extern __at(0x008F) __sfr TRISD
;
980 extern __at(0x008F) volatile __TRISDbits_t TRISDbits
;
991 //==============================================================================
994 //==============================================================================
997 extern __at(0x0090) __sfr TRISE
;
1003 unsigned TRISE0
: 1;
1004 unsigned TRISE1
: 1;
1005 unsigned TRISE2
: 1;
1006 unsigned TRISE3
: 1;
1020 extern __at(0x0090) volatile __TRISEbits_t TRISEbits
;
1022 #define _TRISE0 0x01
1023 #define _TRISE1 0x02
1024 #define _TRISE2 0x04
1025 #define _TRISE3 0x08
1027 //==============================================================================
1030 //==============================================================================
1033 extern __at(0x0091) __sfr PIE1
;
1037 unsigned TMR1IE
: 1;
1038 unsigned TMR2IE
: 1;
1039 unsigned CCP1IE
: 1;
1040 unsigned SSP1IE
: 1;
1044 unsigned TMR1GIE
: 1;
1047 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
1049 #define _TMR1IE 0x01
1050 #define _TMR2IE 0x02
1051 #define _CCP1IE 0x04
1052 #define _SSP1IE 0x08
1056 #define _TMR1GIE 0x80
1058 //==============================================================================
1061 //==============================================================================
1064 extern __at(0x0092) __sfr PIE2
;
1068 unsigned CCP2IE
: 1;
1069 unsigned TMR4IE
: 1;
1070 unsigned TMR6IE
: 1;
1071 unsigned BCL1IE
: 1;
1078 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
1080 #define _CCP2IE 0x01
1081 #define _TMR4IE 0x02
1082 #define _TMR6IE 0x04
1083 #define _BCL1IE 0x08
1088 //==============================================================================
1091 //==============================================================================
1094 extern __at(0x0093) __sfr PIE3
;
1098 unsigned CLC1IE
: 1;
1099 unsigned CLC2IE
: 1;
1100 unsigned CLC3IE
: 1;
1101 unsigned CLC4IE
: 1;
1108 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1110 #define _CLC1IE 0x01
1111 #define _CLC2IE 0x02
1112 #define _CLC3IE 0x04
1113 #define _CLC4IE 0x08
1118 //==============================================================================
1121 //==============================================================================
1124 extern __at(0x0095) __sfr OPTION_REG
;
1134 unsigned TMR0SE
: 1;
1135 unsigned TMR0CS
: 1;
1136 unsigned INTEDG
: 1;
1137 unsigned NOT_WPUEN
: 1;
1157 } __OPTION_REGbits_t
;
1159 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1165 #define _TMR0SE 0x10
1167 #define _TMR0CS 0x20
1169 #define _INTEDG 0x40
1170 #define _NOT_WPUEN 0x80
1172 //==============================================================================
1175 //==============================================================================
1178 extern __at(0x0096) __sfr PCON
;
1182 unsigned NOT_BOR
: 1;
1183 unsigned NOT_POR
: 1;
1184 unsigned NOT_RI
: 1;
1185 unsigned NOT_RMCLR
: 1;
1186 unsigned NOT_RWDT
: 1;
1188 unsigned STKUNF
: 1;
1189 unsigned STKOVF
: 1;
1192 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1194 #define _NOT_BOR 0x01
1195 #define _NOT_POR 0x02
1196 #define _NOT_RI 0x04
1197 #define _NOT_RMCLR 0x08
1198 #define _NOT_RWDT 0x10
1199 #define _STKUNF 0x40
1200 #define _STKOVF 0x80
1202 //==============================================================================
1205 //==============================================================================
1208 extern __at(0x0097) __sfr WDTCON
;
1214 unsigned SWDTEN
: 1;
1215 unsigned WDTPS0
: 1;
1216 unsigned WDTPS1
: 1;
1217 unsigned WDTPS2
: 1;
1218 unsigned WDTPS3
: 1;
1219 unsigned WDTPS4
: 1;
1232 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1234 #define _SWDTEN 0x01
1235 #define _WDTPS0 0x02
1236 #define _WDTPS1 0x04
1237 #define _WDTPS2 0x08
1238 #define _WDTPS3 0x10
1239 #define _WDTPS4 0x20
1241 //==============================================================================
1244 //==============================================================================
1247 extern __at(0x0098) __sfr OSCTUNE
;
1270 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1279 //==============================================================================
1282 //==============================================================================
1285 extern __at(0x0099) __sfr OSCCON
;
1298 unsigned SPLLEN
: 1;
1315 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1323 #define _SPLLEN 0x80
1325 //==============================================================================
1328 //==============================================================================
1331 extern __at(0x009A) __sfr OSCSTAT
;
1335 unsigned HFIOFS
: 1;
1336 unsigned LFIOFR
: 1;
1337 unsigned MFIOFR
: 1;
1338 unsigned HFIOFL
: 1;
1339 unsigned HFIOFR
: 1;
1345 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1347 #define _HFIOFS 0x01
1348 #define _LFIOFR 0x02
1349 #define _MFIOFR 0x04
1350 #define _HFIOFL 0x08
1351 #define _HFIOFR 0x10
1356 //==============================================================================
1358 extern __at(0x009B) __sfr ADRES
;
1359 extern __at(0x009B) __sfr ADRESL
;
1360 extern __at(0x009C) __sfr ADRESH
;
1362 //==============================================================================
1365 extern __at(0x009D) __sfr ADCON0
;
1372 unsigned GO_NOT_DONE
: 1;
1413 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1416 #define _GO_NOT_DONE 0x02
1425 //==============================================================================
1428 //==============================================================================
1431 extern __at(0x009E) __sfr ADCON1
;
1437 unsigned ADPREF0
: 1;
1438 unsigned ADPREF1
: 1;
1439 unsigned ADNREF
: 1;
1449 unsigned ADPREF
: 2;
1454 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1456 #define _ADPREF0 0x01
1457 #define _ADPREF1 0x02
1458 #define _ADNREF 0x04
1461 //==============================================================================
1464 //==============================================================================
1467 extern __at(0x009F) __sfr ADCON2
;
1477 unsigned TRIGSEL0
: 1;
1478 unsigned TRIGSEL1
: 1;
1479 unsigned TRIGSEL2
: 1;
1480 unsigned TRIGSEL3
: 1;
1486 unsigned TRIGSEL
: 4;
1490 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits
;
1492 #define _TRIGSEL0 0x10
1493 #define _TRIGSEL1 0x20
1494 #define _TRIGSEL2 0x40
1495 #define _TRIGSEL3 0x80
1497 //==============================================================================
1500 //==============================================================================
1503 extern __at(0x010C) __sfr LATA
;
1517 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1528 //==============================================================================
1531 //==============================================================================
1534 extern __at(0x010D) __sfr LATB
;
1548 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
1559 //==============================================================================
1562 //==============================================================================
1565 extern __at(0x010E) __sfr LATC
;
1579 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1590 //==============================================================================
1593 //==============================================================================
1596 extern __at(0x010F) __sfr LATD
;
1610 extern __at(0x010F) volatile __LATDbits_t LATDbits
;
1621 //==============================================================================
1624 //==============================================================================
1627 extern __at(0x0110) __sfr LATE
;
1650 extern __at(0x0110) volatile __LATEbits_t LATEbits
;
1656 //==============================================================================
1659 //==============================================================================
1662 extern __at(0x0111) __sfr CM1CON0
;
1666 unsigned C1SYNC
: 1;
1676 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
1678 #define _C1SYNC 0x01
1686 //==============================================================================
1689 //==============================================================================
1692 extern __at(0x0112) __sfr CM1CON1
;
1698 unsigned C1NCH0
: 1;
1699 unsigned C1NCH1
: 1;
1700 unsigned C1NCH2
: 1;
1701 unsigned C1PCH0
: 1;
1702 unsigned C1PCH1
: 1;
1703 unsigned C1PCH2
: 1;
1704 unsigned C1INTN
: 1;
1705 unsigned C1INTP
: 1;
1722 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
1724 #define _C1NCH0 0x01
1725 #define _C1NCH1 0x02
1726 #define _C1NCH2 0x04
1727 #define _C1PCH0 0x08
1728 #define _C1PCH1 0x10
1729 #define _C1PCH2 0x20
1730 #define _C1INTN 0x40
1731 #define _C1INTP 0x80
1733 //==============================================================================
1736 //==============================================================================
1739 extern __at(0x0113) __sfr CM2CON0
;
1743 unsigned C2SYNC
: 1;
1753 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
1755 #define _C2SYNC 0x01
1763 //==============================================================================
1766 //==============================================================================
1769 extern __at(0x0114) __sfr CM2CON1
;
1775 unsigned C2NCH0
: 1;
1776 unsigned C2NCH1
: 1;
1777 unsigned C2NCH2
: 1;
1778 unsigned C2PCH0
: 1;
1779 unsigned C2PCH1
: 1;
1780 unsigned C2PCH2
: 1;
1781 unsigned C2INTN
: 1;
1782 unsigned C2INTP
: 1;
1799 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
1801 #define _C2NCH0 0x01
1802 #define _C2NCH1 0x02
1803 #define _C2NCH2 0x04
1804 #define _C2PCH0 0x08
1805 #define _C2PCH1 0x10
1806 #define _C2PCH2 0x20
1807 #define _C2INTN 0x40
1808 #define _C2INTP 0x80
1810 //==============================================================================
1813 //==============================================================================
1816 extern __at(0x0115) __sfr CMOUT
;
1820 unsigned MC1OUT
: 1;
1821 unsigned MC2OUT
: 1;
1830 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
1832 #define _MC1OUT 0x01
1833 #define _MC2OUT 0x02
1835 //==============================================================================
1838 //==============================================================================
1841 extern __at(0x0116) __sfr BORCON
;
1845 unsigned BORRDY
: 1;
1852 unsigned SBOREN
: 1;
1855 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
1857 #define _BORRDY 0x01
1859 #define _SBOREN 0x80
1861 //==============================================================================
1864 //==============================================================================
1867 extern __at(0x0117) __sfr FVRCON
;
1873 unsigned ADFVR0
: 1;
1874 unsigned ADFVR1
: 1;
1875 unsigned CDAFVR0
: 1;
1876 unsigned CDAFVR1
: 1;
1879 unsigned FVRRDY
: 1;
1892 unsigned CDAFVR
: 2;
1897 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
1899 #define _ADFVR0 0x01
1900 #define _ADFVR1 0x02
1901 #define _CDAFVR0 0x04
1902 #define _CDAFVR1 0x08
1905 #define _FVRRDY 0x40
1908 //==============================================================================
1911 //==============================================================================
1914 extern __at(0x0118) __sfr DAC1CON0
;
1920 unsigned DAC1NSS
: 1;
1922 unsigned DAC1PSS0
: 1;
1923 unsigned DAC1PSS1
: 1;
1924 unsigned DAC1OE2
: 1;
1925 unsigned DAC1OE1
: 1;
1927 unsigned DAC1EN
: 1;
1932 unsigned DACNSS
: 1;
1934 unsigned DACPSS0
: 1;
1935 unsigned DACPSS1
: 1;
1936 unsigned DACOE0
: 1;
1937 unsigned DACOE1
: 1;
1945 unsigned DAC1PSS
: 2;
1952 unsigned DACPSS
: 2;
1964 extern __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits
;
1966 #define _DAC1NSS 0x01
1967 #define _DACNSS 0x01
1968 #define _DAC1PSS0 0x04
1969 #define _DACPSS0 0x04
1970 #define _DAC1PSS1 0x08
1971 #define _DACPSS1 0x08
1972 #define _DAC1OE2 0x10
1973 #define _DACOE0 0x10
1974 #define _DAC1OE1 0x20
1975 #define _DACOE1 0x20
1976 #define _DAC1EN 0x80
1979 //==============================================================================
1982 //==============================================================================
1985 extern __at(0x0119) __sfr DAC1CON1
;
1991 unsigned DAC1R0
: 1;
1992 unsigned DAC1R1
: 1;
1993 unsigned DAC1R2
: 1;
1994 unsigned DAC1R3
: 1;
1995 unsigned DAC1R4
: 1;
1996 unsigned DAC1R5
: 1;
1997 unsigned DAC1R6
: 1;
1998 unsigned DAC1R7
: 1;
2014 extern __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits
;
2016 #define _DAC1R0 0x01
2018 #define _DAC1R1 0x02
2020 #define _DAC1R2 0x04
2022 #define _DAC1R3 0x08
2024 #define _DAC1R4 0x10
2026 #define _DAC1R5 0x20
2028 #define _DAC1R6 0x40
2030 #define _DAC1R7 0x80
2033 //==============================================================================
2036 //==============================================================================
2039 extern __at(0x011A) __sfr DAC2CON0
;
2057 unsigned DACNSS
: 1;
2059 unsigned DACPSS0
: 1;
2060 unsigned DACPSS1
: 1;
2061 unsigned DACOE2
: 1;
2062 unsigned DACOE1
: 1;
2069 unsigned DAC2NSS
: 1;
2071 unsigned DAC2PSS0
: 1;
2072 unsigned DAC2PSS1
: 1;
2073 unsigned DAC2OE2
: 1;
2074 unsigned DAC2OE1
: 1;
2076 unsigned DAC2EN
: 1;
2082 unsigned DAC2PSS
: 2;
2096 unsigned DACPSS
: 2;
2101 extern __at(0x011A) volatile __DAC2CON0bits_t DAC2CON0bits
;
2103 #define _DAC2CON0_NSS 0x01
2104 #define _DAC2CON0_DACNSS 0x01
2105 #define _DAC2CON0_DAC2NSS 0x01
2106 #define _DAC2CON0_PSS0 0x04
2107 #define _DAC2CON0_DACPSS0 0x04
2108 #define _DAC2CON0_DAC2PSS0 0x04
2109 #define _DAC2CON0_PSS1 0x08
2110 #define _DAC2CON0_DACPSS1 0x08
2111 #define _DAC2CON0_DAC2PSS1 0x08
2112 #define _DAC2CON0_OE2 0x10
2113 #define _DAC2CON0_DACOE2 0x10
2114 #define _DAC2CON0_DAC2OE2 0x10
2115 #define _DAC2CON0_OE1 0x20
2116 #define _DAC2CON0_DACOE1 0x20
2117 #define _DAC2CON0_DAC2OE1 0x20
2118 #define _DAC2CON0_EN 0x80
2119 #define _DAC2CON0_DACEN 0x80
2120 #define _DAC2CON0_DAC2EN 0x80
2122 //==============================================================================
2125 //==============================================================================
2128 extern __at(0x011B) __sfr DAC2CON1
;
2151 unsigned DAC2REF5
: 1;
2158 unsigned DAC2R0
: 1;
2159 unsigned DAC2R1
: 1;
2160 unsigned DAC2R2
: 1;
2161 unsigned DAC2R3
: 1;
2162 unsigned DAC2R4
: 1;
2182 unsigned DAC2REF0
: 1;
2183 unsigned DAC2REF1
: 1;
2184 unsigned DAC2REF2
: 1;
2185 unsigned DAC2REF3
: 1;
2186 unsigned DAC2REF4
: 1;
2218 unsigned DAC2REF
: 6;
2223 extern __at(0x011B) volatile __DAC2CON1bits_t DAC2CON1bits
;
2225 #define _DAC2CON1_DACR0 0x01
2226 #define _DAC2CON1_R0 0x01
2227 #define _DAC2CON1_DAC2R0 0x01
2228 #define _DAC2CON1_REF0 0x01
2229 #define _DAC2CON1_DAC2REF0 0x01
2230 #define _DAC2CON1_DACR1 0x02
2231 #define _DAC2CON1_R1 0x02
2232 #define _DAC2CON1_DAC2R1 0x02
2233 #define _DAC2CON1_REF1 0x02
2234 #define _DAC2CON1_DAC2REF1 0x02
2235 #define _DAC2CON1_DACR2 0x04
2236 #define _DAC2CON1_R2 0x04
2237 #define _DAC2CON1_DAC2R2 0x04
2238 #define _DAC2CON1_REF2 0x04
2239 #define _DAC2CON1_DAC2REF2 0x04
2240 #define _DAC2CON1_DACR3 0x08
2241 #define _DAC2CON1_R3 0x08
2242 #define _DAC2CON1_DAC2R3 0x08
2243 #define _DAC2CON1_REF3 0x08
2244 #define _DAC2CON1_DAC2REF3 0x08
2245 #define _DAC2CON1_DACR4 0x10
2246 #define _DAC2CON1_R4 0x10
2247 #define _DAC2CON1_DAC2R4 0x10
2248 #define _DAC2CON1_REF4 0x10
2249 #define _DAC2CON1_DAC2REF4 0x10
2250 #define _DAC2CON1_REF5 0x20
2251 #define _DAC2CON1_DAC2REF5 0x20
2253 //==============================================================================
2256 //==============================================================================
2259 extern __at(0x011B) __sfr DAC2REF
;
2282 unsigned DAC2REF5
: 1;
2289 unsigned DAC2R0
: 1;
2290 unsigned DAC2R1
: 1;
2291 unsigned DAC2R2
: 1;
2292 unsigned DAC2R3
: 1;
2293 unsigned DAC2R4
: 1;
2313 unsigned DAC2REF0
: 1;
2314 unsigned DAC2REF1
: 1;
2315 unsigned DAC2REF2
: 1;
2316 unsigned DAC2REF3
: 1;
2317 unsigned DAC2REF4
: 1;
2331 unsigned DAC2REF
: 6;
2354 extern __at(0x011B) volatile __DAC2REFbits_t DAC2REFbits
;
2356 #define _DAC2REF_DACR0 0x01
2357 #define _DAC2REF_R0 0x01
2358 #define _DAC2REF_DAC2R0 0x01
2359 #define _DAC2REF_REF0 0x01
2360 #define _DAC2REF_DAC2REF0 0x01
2361 #define _DAC2REF_DACR1 0x02
2362 #define _DAC2REF_R1 0x02
2363 #define _DAC2REF_DAC2R1 0x02
2364 #define _DAC2REF_REF1 0x02
2365 #define _DAC2REF_DAC2REF1 0x02
2366 #define _DAC2REF_DACR2 0x04
2367 #define _DAC2REF_R2 0x04
2368 #define _DAC2REF_DAC2R2 0x04
2369 #define _DAC2REF_REF2 0x04
2370 #define _DAC2REF_DAC2REF2 0x04
2371 #define _DAC2REF_DACR3 0x08
2372 #define _DAC2REF_R3 0x08
2373 #define _DAC2REF_DAC2R3 0x08
2374 #define _DAC2REF_REF3 0x08
2375 #define _DAC2REF_DAC2REF3 0x08
2376 #define _DAC2REF_DACR4 0x10
2377 #define _DAC2REF_R4 0x10
2378 #define _DAC2REF_DAC2R4 0x10
2379 #define _DAC2REF_REF4 0x10
2380 #define _DAC2REF_DAC2REF4 0x10
2381 #define _DAC2REF_REF5 0x20
2382 #define _DAC2REF_DAC2REF5 0x20
2384 //==============================================================================
2387 //==============================================================================
2390 extern __at(0x011C) __sfr ZCD1CON
;
2394 unsigned ZCD1INTN
: 1;
2395 unsigned ZCD1INTP
: 1;
2398 unsigned ZCD1POL
: 1;
2399 unsigned ZCD1OUT
: 1;
2401 unsigned ZCD1EN
: 1;
2404 extern __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits
;
2406 #define _ZCD1INTN 0x01
2407 #define _ZCD1INTP 0x02
2408 #define _ZCD1POL 0x10
2409 #define _ZCD1OUT 0x20
2410 #define _ZCD1EN 0x80
2412 //==============================================================================
2415 //==============================================================================
2418 extern __at(0x018C) __sfr ANSELA
;
2441 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
2450 //==============================================================================
2453 //==============================================================================
2456 extern __at(0x018D) __sfr ANSELB
;
2479 extern __at(0x018D) volatile __ANSELBbits_t ANSELBbits
;
2488 //==============================================================================
2491 //==============================================================================
2494 extern __at(0x018E) __sfr ANSELC
;
2508 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits
;
2517 //==============================================================================
2520 //==============================================================================
2523 extern __at(0x018F) __sfr ANSELD
;
2537 extern __at(0x018F) volatile __ANSELDbits_t ANSELDbits
;
2548 //==============================================================================
2551 //==============================================================================
2554 extern __at(0x0190) __sfr ANSELE
;
2577 extern __at(0x0190) volatile __ANSELEbits_t ANSELEbits
;
2583 //==============================================================================
2585 extern __at(0x0191) __sfr PMADR
;
2586 extern __at(0x0191) __sfr PMADRL
;
2587 extern __at(0x0192) __sfr PMADRH
;
2588 extern __at(0x0193) __sfr PMDAT
;
2589 extern __at(0x0193) __sfr PMDATL
;
2590 extern __at(0x0194) __sfr PMDATH
;
2592 //==============================================================================
2595 extern __at(0x0195) __sfr PMCON1
;
2609 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits
;
2619 //==============================================================================
2621 extern __at(0x0196) __sfr PMCON2
;
2622 extern __at(0x0199) __sfr RC1REG
;
2623 extern __at(0x0199) __sfr RCREG
;
2624 extern __at(0x0199) __sfr RCREG1
;
2625 extern __at(0x019A) __sfr TX1REG
;
2626 extern __at(0x019A) __sfr TXREG
;
2627 extern __at(0x019A) __sfr TXREG1
;
2628 extern __at(0x019B) __sfr SP1BRG
;
2629 extern __at(0x019B) __sfr SP1BRGL
;
2630 extern __at(0x019B) __sfr SPBRG
;
2631 extern __at(0x019B) __sfr SPBRG1
;
2632 extern __at(0x019B) __sfr SPBRGL
;
2633 extern __at(0x019C) __sfr SP1BRGH
;
2634 extern __at(0x019C) __sfr SPBRGH
;
2635 extern __at(0x019C) __sfr SPBRGH1
;
2637 //==============================================================================
2640 extern __at(0x019D) __sfr RC1STA
;
2654 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
2665 //==============================================================================
2668 //==============================================================================
2671 extern __at(0x019D) __sfr RCSTA
;
2685 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
2687 #define _RCSTA_RX9D 0x01
2688 #define _RCSTA_OERR 0x02
2689 #define _RCSTA_FERR 0x04
2690 #define _RCSTA_ADDEN 0x08
2691 #define _RCSTA_CREN 0x10
2692 #define _RCSTA_SREN 0x20
2693 #define _RCSTA_RX9 0x40
2694 #define _RCSTA_SPEN 0x80
2696 //==============================================================================
2699 //==============================================================================
2702 extern __at(0x019D) __sfr RCSTA1
;
2716 extern __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits
;
2718 #define _RCSTA1_RX9D 0x01
2719 #define _RCSTA1_OERR 0x02
2720 #define _RCSTA1_FERR 0x04
2721 #define _RCSTA1_ADDEN 0x08
2722 #define _RCSTA1_CREN 0x10
2723 #define _RCSTA1_SREN 0x20
2724 #define _RCSTA1_RX9 0x40
2725 #define _RCSTA1_SPEN 0x80
2727 //==============================================================================
2730 //==============================================================================
2733 extern __at(0x019E) __sfr TX1STA
;
2747 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
2758 //==============================================================================
2761 //==============================================================================
2764 extern __at(0x019E) __sfr TXSTA
;
2778 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
2780 #define _TXSTA_TX9D 0x01
2781 #define _TXSTA_TRMT 0x02
2782 #define _TXSTA_BRGH 0x04
2783 #define _TXSTA_SENDB 0x08
2784 #define _TXSTA_SYNC 0x10
2785 #define _TXSTA_TXEN 0x20
2786 #define _TXSTA_TX9 0x40
2787 #define _TXSTA_CSRC 0x80
2789 //==============================================================================
2792 //==============================================================================
2795 extern __at(0x019E) __sfr TXSTA1
;
2809 extern __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits
;
2811 #define _TXSTA1_TX9D 0x01
2812 #define _TXSTA1_TRMT 0x02
2813 #define _TXSTA1_BRGH 0x04
2814 #define _TXSTA1_SENDB 0x08
2815 #define _TXSTA1_SYNC 0x10
2816 #define _TXSTA1_TXEN 0x20
2817 #define _TXSTA1_TX9 0x40
2818 #define _TXSTA1_CSRC 0x80
2820 //==============================================================================
2823 //==============================================================================
2826 extern __at(0x019F) __sfr BAUD1CON
;
2837 unsigned ABDOVF
: 1;
2840 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2847 #define _ABDOVF 0x80
2849 //==============================================================================
2852 //==============================================================================
2855 extern __at(0x019F) __sfr BAUDCON
;
2866 unsigned ABDOVF
: 1;
2869 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits
;
2871 #define _BAUDCON_ABDEN 0x01
2872 #define _BAUDCON_WUE 0x02
2873 #define _BAUDCON_BRG16 0x08
2874 #define _BAUDCON_SCKP 0x10
2875 #define _BAUDCON_RCIDL 0x40
2876 #define _BAUDCON_ABDOVF 0x80
2878 //==============================================================================
2881 //==============================================================================
2884 extern __at(0x019F) __sfr BAUDCON1
;
2895 unsigned ABDOVF
: 1;
2898 extern __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits
;
2900 #define _BAUDCON1_ABDEN 0x01
2901 #define _BAUDCON1_WUE 0x02
2902 #define _BAUDCON1_BRG16 0x08
2903 #define _BAUDCON1_SCKP 0x10
2904 #define _BAUDCON1_RCIDL 0x40
2905 #define _BAUDCON1_ABDOVF 0x80
2907 //==============================================================================
2910 //==============================================================================
2913 extern __at(0x019F) __sfr BAUDCTL
;
2924 unsigned ABDOVF
: 1;
2927 extern __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits
;
2929 #define _BAUDCTL_ABDEN 0x01
2930 #define _BAUDCTL_WUE 0x02
2931 #define _BAUDCTL_BRG16 0x08
2932 #define _BAUDCTL_SCKP 0x10
2933 #define _BAUDCTL_RCIDL 0x40
2934 #define _BAUDCTL_ABDOVF 0x80
2936 //==============================================================================
2939 //==============================================================================
2942 extern __at(0x019F) __sfr BAUDCTL1
;
2953 unsigned ABDOVF
: 1;
2956 extern __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
2958 #define _BAUDCTL1_ABDEN 0x01
2959 #define _BAUDCTL1_WUE 0x02
2960 #define _BAUDCTL1_BRG16 0x08
2961 #define _BAUDCTL1_SCKP 0x10
2962 #define _BAUDCTL1_RCIDL 0x40
2963 #define _BAUDCTL1_ABDOVF 0x80
2965 //==============================================================================
2968 //==============================================================================
2971 extern __at(0x020C) __sfr WPUA
;
2985 extern __at(0x020C) volatile __WPUAbits_t WPUAbits
;
2996 //==============================================================================
2999 //==============================================================================
3002 extern __at(0x020D) __sfr WPUB
;
3016 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
3027 //==============================================================================
3030 //==============================================================================
3033 extern __at(0x020E) __sfr WPUC
;
3047 extern __at(0x020E) volatile __WPUCbits_t WPUCbits
;
3058 //==============================================================================
3061 //==============================================================================
3064 extern __at(0x020F) __sfr WPUD
;
3078 extern __at(0x020F) volatile __WPUDbits_t WPUDbits
;
3089 //==============================================================================
3092 //==============================================================================
3095 extern __at(0x0210) __sfr WPUE
;
3118 extern __at(0x0210) volatile __WPUEbits_t WPUEbits
;
3125 //==============================================================================
3128 //==============================================================================
3131 extern __at(0x0211) __sfr SSP1BUF
;
3137 unsigned SSP1BUF0
: 1;
3138 unsigned SSP1BUF1
: 1;
3139 unsigned SSP1BUF2
: 1;
3140 unsigned SSP1BUF3
: 1;
3141 unsigned SSP1BUF4
: 1;
3142 unsigned SSP1BUF5
: 1;
3143 unsigned SSP1BUF6
: 1;
3144 unsigned SSP1BUF7
: 1;
3160 extern __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits
;
3162 #define _SSP1BUF0 0x01
3164 #define _SSP1BUF1 0x02
3166 #define _SSP1BUF2 0x04
3168 #define _SSP1BUF3 0x08
3170 #define _SSP1BUF4 0x10
3172 #define _SSP1BUF5 0x20
3174 #define _SSP1BUF6 0x40
3176 #define _SSP1BUF7 0x80
3179 //==============================================================================
3182 //==============================================================================
3185 extern __at(0x0211) __sfr SSPBUF
;
3191 unsigned SSP1BUF0
: 1;
3192 unsigned SSP1BUF1
: 1;
3193 unsigned SSP1BUF2
: 1;
3194 unsigned SSP1BUF3
: 1;
3195 unsigned SSP1BUF4
: 1;
3196 unsigned SSP1BUF5
: 1;
3197 unsigned SSP1BUF6
: 1;
3198 unsigned SSP1BUF7
: 1;
3214 extern __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits
;
3216 #define _SSPBUF_SSP1BUF0 0x01
3217 #define _SSPBUF_BUF0 0x01
3218 #define _SSPBUF_SSP1BUF1 0x02
3219 #define _SSPBUF_BUF1 0x02
3220 #define _SSPBUF_SSP1BUF2 0x04
3221 #define _SSPBUF_BUF2 0x04
3222 #define _SSPBUF_SSP1BUF3 0x08
3223 #define _SSPBUF_BUF3 0x08
3224 #define _SSPBUF_SSP1BUF4 0x10
3225 #define _SSPBUF_BUF4 0x10
3226 #define _SSPBUF_SSP1BUF5 0x20
3227 #define _SSPBUF_BUF5 0x20
3228 #define _SSPBUF_SSP1BUF6 0x40
3229 #define _SSPBUF_BUF6 0x40
3230 #define _SSPBUF_SSP1BUF7 0x80
3231 #define _SSPBUF_BUF7 0x80
3233 //==============================================================================
3236 //==============================================================================
3239 extern __at(0x0212) __sfr SSP1ADD
;
3245 unsigned SSP1ADD0
: 1;
3246 unsigned SSP1ADD1
: 1;
3247 unsigned SSP1ADD2
: 1;
3248 unsigned SSP1ADD3
: 1;
3249 unsigned SSP1ADD4
: 1;
3250 unsigned SSP1ADD5
: 1;
3251 unsigned SSP1ADD6
: 1;
3252 unsigned SSP1ADD7
: 1;
3268 extern __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits
;
3270 #define _SSP1ADD0 0x01
3272 #define _SSP1ADD1 0x02
3274 #define _SSP1ADD2 0x04
3276 #define _SSP1ADD3 0x08
3278 #define _SSP1ADD4 0x10
3280 #define _SSP1ADD5 0x20
3282 #define _SSP1ADD6 0x40
3284 #define _SSP1ADD7 0x80
3287 //==============================================================================
3290 //==============================================================================
3293 extern __at(0x0212) __sfr SSPADD
;
3299 unsigned SSP1ADD0
: 1;
3300 unsigned SSP1ADD1
: 1;
3301 unsigned SSP1ADD2
: 1;
3302 unsigned SSP1ADD3
: 1;
3303 unsigned SSP1ADD4
: 1;
3304 unsigned SSP1ADD5
: 1;
3305 unsigned SSP1ADD6
: 1;
3306 unsigned SSP1ADD7
: 1;
3322 extern __at(0x0212) volatile __SSPADDbits_t SSPADDbits
;
3324 #define _SSPADD_SSP1ADD0 0x01
3325 #define _SSPADD_ADD0 0x01
3326 #define _SSPADD_SSP1ADD1 0x02
3327 #define _SSPADD_ADD1 0x02
3328 #define _SSPADD_SSP1ADD2 0x04
3329 #define _SSPADD_ADD2 0x04
3330 #define _SSPADD_SSP1ADD3 0x08
3331 #define _SSPADD_ADD3 0x08
3332 #define _SSPADD_SSP1ADD4 0x10
3333 #define _SSPADD_ADD4 0x10
3334 #define _SSPADD_SSP1ADD5 0x20
3335 #define _SSPADD_ADD5 0x20
3336 #define _SSPADD_SSP1ADD6 0x40
3337 #define _SSPADD_ADD6 0x40
3338 #define _SSPADD_SSP1ADD7 0x80
3339 #define _SSPADD_ADD7 0x80
3341 //==============================================================================
3344 //==============================================================================
3347 extern __at(0x0213) __sfr SSP1MSK
;
3353 unsigned SSP1MSK0
: 1;
3354 unsigned SSP1MSK1
: 1;
3355 unsigned SSP1MSK2
: 1;
3356 unsigned SSP1MSK3
: 1;
3357 unsigned SSP1MSK4
: 1;
3358 unsigned SSP1MSK5
: 1;
3359 unsigned SSP1MSK6
: 1;
3360 unsigned SSP1MSK7
: 1;
3376 extern __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits
;
3378 #define _SSP1MSK0 0x01
3380 #define _SSP1MSK1 0x02
3382 #define _SSP1MSK2 0x04
3384 #define _SSP1MSK3 0x08
3386 #define _SSP1MSK4 0x10
3388 #define _SSP1MSK5 0x20
3390 #define _SSP1MSK6 0x40
3392 #define _SSP1MSK7 0x80
3395 //==============================================================================
3398 //==============================================================================
3401 extern __at(0x0213) __sfr SSPMSK
;
3407 unsigned SSP1MSK0
: 1;
3408 unsigned SSP1MSK1
: 1;
3409 unsigned SSP1MSK2
: 1;
3410 unsigned SSP1MSK3
: 1;
3411 unsigned SSP1MSK4
: 1;
3412 unsigned SSP1MSK5
: 1;
3413 unsigned SSP1MSK6
: 1;
3414 unsigned SSP1MSK7
: 1;
3430 extern __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits
;
3432 #define _SSPMSK_SSP1MSK0 0x01
3433 #define _SSPMSK_MSK0 0x01
3434 #define _SSPMSK_SSP1MSK1 0x02
3435 #define _SSPMSK_MSK1 0x02
3436 #define _SSPMSK_SSP1MSK2 0x04
3437 #define _SSPMSK_MSK2 0x04
3438 #define _SSPMSK_SSP1MSK3 0x08
3439 #define _SSPMSK_MSK3 0x08
3440 #define _SSPMSK_SSP1MSK4 0x10
3441 #define _SSPMSK_MSK4 0x10
3442 #define _SSPMSK_SSP1MSK5 0x20
3443 #define _SSPMSK_MSK5 0x20
3444 #define _SSPMSK_SSP1MSK6 0x40
3445 #define _SSPMSK_MSK6 0x40
3446 #define _SSPMSK_SSP1MSK7 0x80
3447 #define _SSPMSK_MSK7 0x80
3449 //==============================================================================
3452 //==============================================================================
3455 extern __at(0x0214) __sfr SSP1STAT
;
3461 unsigned R_NOT_W
: 1;
3464 unsigned D_NOT_A
: 1;
3469 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
3473 #define _R_NOT_W 0x04
3476 #define _D_NOT_A 0x20
3480 //==============================================================================
3483 //==============================================================================
3486 extern __at(0x0214) __sfr SSPSTAT
;
3492 unsigned R_NOT_W
: 1;
3495 unsigned D_NOT_A
: 1;
3500 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
3502 #define _SSPSTAT_BF 0x01
3503 #define _SSPSTAT_UA 0x02
3504 #define _SSPSTAT_R_NOT_W 0x04
3505 #define _SSPSTAT_S 0x08
3506 #define _SSPSTAT_P 0x10
3507 #define _SSPSTAT_D_NOT_A 0x20
3508 #define _SSPSTAT_CKE 0x40
3509 #define _SSPSTAT_SMP 0x80
3511 //==============================================================================
3514 //==============================================================================
3517 extern __at(0x0215) __sfr SSP1CON
;
3540 extern __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits
;
3551 //==============================================================================
3554 //==============================================================================
3557 extern __at(0x0215) __sfr SSP1CON1
;
3580 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
3582 #define _SSP1CON1_SSPM0 0x01
3583 #define _SSP1CON1_SSPM1 0x02
3584 #define _SSP1CON1_SSPM2 0x04
3585 #define _SSP1CON1_SSPM3 0x08
3586 #define _SSP1CON1_CKP 0x10
3587 #define _SSP1CON1_SSPEN 0x20
3588 #define _SSP1CON1_SSPOV 0x40
3589 #define _SSP1CON1_WCOL 0x80
3591 //==============================================================================
3594 //==============================================================================
3597 extern __at(0x0215) __sfr SSPCON
;
3620 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
3622 #define _SSPCON_SSPM0 0x01
3623 #define _SSPCON_SSPM1 0x02
3624 #define _SSPCON_SSPM2 0x04
3625 #define _SSPCON_SSPM3 0x08
3626 #define _SSPCON_CKP 0x10
3627 #define _SSPCON_SSPEN 0x20
3628 #define _SSPCON_SSPOV 0x40
3629 #define _SSPCON_WCOL 0x80
3631 //==============================================================================
3634 //==============================================================================
3637 extern __at(0x0215) __sfr SSPCON1
;
3660 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
3662 #define _SSPCON1_SSPM0 0x01
3663 #define _SSPCON1_SSPM1 0x02
3664 #define _SSPCON1_SSPM2 0x04
3665 #define _SSPCON1_SSPM3 0x08
3666 #define _SSPCON1_CKP 0x10
3667 #define _SSPCON1_SSPEN 0x20
3668 #define _SSPCON1_SSPOV 0x40
3669 #define _SSPCON1_WCOL 0x80
3671 //==============================================================================
3674 //==============================================================================
3677 extern __at(0x0216) __sfr SSP1CON2
;
3687 unsigned ACKSTAT
: 1;
3691 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
3699 #define _ACKSTAT 0x40
3702 //==============================================================================
3705 //==============================================================================
3708 extern __at(0x0216) __sfr SSPCON2
;
3718 unsigned ACKSTAT
: 1;
3722 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
3724 #define _SSPCON2_SEN 0x01
3725 #define _SSPCON2_RSEN 0x02
3726 #define _SSPCON2_PEN 0x04
3727 #define _SSPCON2_RCEN 0x08
3728 #define _SSPCON2_ACKEN 0x10
3729 #define _SSPCON2_ACKDT 0x20
3730 #define _SSPCON2_ACKSTAT 0x40
3731 #define _SSPCON2_GCEN 0x80
3733 //==============================================================================
3736 //==============================================================================
3739 extern __at(0x0217) __sfr SSP1CON3
;
3750 unsigned ACKTIM
: 1;
3753 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
3762 #define _ACKTIM 0x80
3764 //==============================================================================
3767 //==============================================================================
3770 extern __at(0x0217) __sfr SSPCON3
;
3781 unsigned ACKTIM
: 1;
3784 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
3786 #define _SSPCON3_DHEN 0x01
3787 #define _SSPCON3_AHEN 0x02
3788 #define _SSPCON3_SBCDE 0x04
3789 #define _SSPCON3_SDAHT 0x08
3790 #define _SSPCON3_BOEN 0x10
3791 #define _SSPCON3_SCIE 0x20
3792 #define _SSPCON3_PCIE 0x40
3793 #define _SSPCON3_ACKTIM 0x80
3795 //==============================================================================
3798 //==============================================================================
3801 extern __at(0x028C) __sfr ODCONA
;
3815 extern __at(0x028C) volatile __ODCONAbits_t ODCONAbits
;
3826 //==============================================================================
3829 //==============================================================================
3832 extern __at(0x028D) __sfr ODCONB
;
3846 extern __at(0x028D) volatile __ODCONBbits_t ODCONBbits
;
3857 //==============================================================================
3860 //==============================================================================
3863 extern __at(0x028E) __sfr ODCONC
;
3877 extern __at(0x028E) volatile __ODCONCbits_t ODCONCbits
;
3888 //==============================================================================
3891 //==============================================================================
3894 extern __at(0x028F) __sfr ODCOND
;
3908 extern __at(0x028F) volatile __ODCONDbits_t ODCONDbits
;
3919 //==============================================================================
3922 //==============================================================================
3925 extern __at(0x0290) __sfr ODCONE
;
3948 extern __at(0x0290) volatile __ODCONEbits_t ODCONEbits
;
3954 //==============================================================================
3956 extern __at(0x0291) __sfr CCPR1
;
3957 extern __at(0x0291) __sfr CCPR1L
;
3958 extern __at(0x0292) __sfr CCPR1H
;
3960 //==============================================================================
3963 extern __at(0x0293) __sfr CCP1CON
;
3969 unsigned CCP1M0
: 1;
3970 unsigned CCP1M1
: 1;
3971 unsigned CCP1M2
: 1;
3972 unsigned CCP1M3
: 1;
4005 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
4007 #define _CCP1M0 0x01
4008 #define _CCP1M1 0x02
4009 #define _CCP1M2 0x04
4010 #define _CCP1M3 0x08
4016 //==============================================================================
4019 //==============================================================================
4022 extern __at(0x0293) __sfr ECCP1CON
;
4028 unsigned CCP1M0
: 1;
4029 unsigned CCP1M1
: 1;
4030 unsigned CCP1M2
: 1;
4031 unsigned CCP1M3
: 1;
4064 extern __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits
;
4066 #define _ECCP1CON_CCP1M0 0x01
4067 #define _ECCP1CON_CCP1M1 0x02
4068 #define _ECCP1CON_CCP1M2 0x04
4069 #define _ECCP1CON_CCP1M3 0x08
4070 #define _ECCP1CON_DC1B0 0x10
4071 #define _ECCP1CON_CCP1Y 0x10
4072 #define _ECCP1CON_DC1B1 0x20
4073 #define _ECCP1CON_CCP1X 0x20
4075 //==============================================================================
4077 extern __at(0x0298) __sfr CCPR2
;
4078 extern __at(0x0298) __sfr CCPR2L
;
4079 extern __at(0x0299) __sfr CCPR2H
;
4081 //==============================================================================
4084 extern __at(0x029A) __sfr CCP2CON
;
4090 unsigned CCP2M0
: 1;
4091 unsigned CCP2M1
: 1;
4092 unsigned CCP2M2
: 1;
4093 unsigned CCP2M3
: 1;
4126 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
4128 #define _CCP2M0 0x01
4129 #define _CCP2M1 0x02
4130 #define _CCP2M2 0x04
4131 #define _CCP2M3 0x08
4137 //==============================================================================
4140 //==============================================================================
4143 extern __at(0x029A) __sfr ECCP2CON
;
4149 unsigned CCP2M0
: 1;
4150 unsigned CCP2M1
: 1;
4151 unsigned CCP2M2
: 1;
4152 unsigned CCP2M3
: 1;
4185 extern __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits
;
4187 #define _ECCP2CON_CCP2M0 0x01
4188 #define _ECCP2CON_CCP2M1 0x02
4189 #define _ECCP2CON_CCP2M2 0x04
4190 #define _ECCP2CON_CCP2M3 0x08
4191 #define _ECCP2CON_DC2B0 0x10
4192 #define _ECCP2CON_CCP2Y 0x10
4193 #define _ECCP2CON_DC2B1 0x20
4194 #define _ECCP2CON_CCP2X 0x20
4196 //==============================================================================
4199 //==============================================================================
4202 extern __at(0x029E) __sfr CCPTMRS
;
4208 unsigned C1TSEL0
: 1;
4209 unsigned C1TSEL1
: 1;
4210 unsigned C2TSEL0
: 1;
4211 unsigned C2TSEL1
: 1;
4212 unsigned P3TSEL0
: 1;
4213 unsigned P3TSEL1
: 1;
4214 unsigned P4TSEL0
: 1;
4215 unsigned P4TSEL1
: 1;
4220 unsigned C1TSEL
: 2;
4227 unsigned C2TSEL
: 2;
4234 unsigned P3TSEL
: 2;
4241 unsigned P4TSEL
: 2;
4245 extern __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits
;
4247 #define _C1TSEL0 0x01
4248 #define _C1TSEL1 0x02
4249 #define _C2TSEL0 0x04
4250 #define _C2TSEL1 0x08
4251 #define _P3TSEL0 0x10
4252 #define _P3TSEL1 0x20
4253 #define _P4TSEL0 0x40
4254 #define _P4TSEL1 0x80
4256 //==============================================================================
4259 //==============================================================================
4262 extern __at(0x030C) __sfr SLRCONA
;
4276 extern __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits
;
4287 //==============================================================================
4290 //==============================================================================
4293 extern __at(0x030D) __sfr SLRCONB
;
4307 extern __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits
;
4318 //==============================================================================
4321 //==============================================================================
4324 extern __at(0x030E) __sfr SLRCONC
;
4338 extern __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits
;
4349 //==============================================================================
4352 //==============================================================================
4355 extern __at(0x030F) __sfr SLRCOND
;
4369 extern __at(0x030F) volatile __SLRCONDbits_t SLRCONDbits
;
4380 //==============================================================================
4383 //==============================================================================
4386 extern __at(0x0310) __sfr SLRCONE
;
4409 extern __at(0x0310) volatile __SLRCONEbits_t SLRCONEbits
;
4415 //==============================================================================
4418 //==============================================================================
4421 extern __at(0x038C) __sfr INLVLA
;
4425 unsigned INLVLA0
: 1;
4426 unsigned INLVLA1
: 1;
4427 unsigned INLVLA2
: 1;
4428 unsigned INLVLA3
: 1;
4429 unsigned INLVLA4
: 1;
4430 unsigned INLVLA5
: 1;
4431 unsigned INLVLA6
: 1;
4432 unsigned INLVLA7
: 1;
4435 extern __at(0x038C) volatile __INLVLAbits_t INLVLAbits
;
4437 #define _INLVLA0 0x01
4438 #define _INLVLA1 0x02
4439 #define _INLVLA2 0x04
4440 #define _INLVLA3 0x08
4441 #define _INLVLA4 0x10
4442 #define _INLVLA5 0x20
4443 #define _INLVLA6 0x40
4444 #define _INLVLA7 0x80
4446 //==============================================================================
4449 //==============================================================================
4452 extern __at(0x038D) __sfr INLVLB
;
4456 unsigned INLVLB0
: 1;
4457 unsigned INLVLB1
: 1;
4458 unsigned INLVLB2
: 1;
4459 unsigned INLVLB3
: 1;
4460 unsigned INLVLB4
: 1;
4461 unsigned INLVLB5
: 1;
4462 unsigned INLVLB6
: 1;
4463 unsigned INLVLB7
: 1;
4466 extern __at(0x038D) volatile __INLVLBbits_t INLVLBbits
;
4468 #define _INLVLB0 0x01
4469 #define _INLVLB1 0x02
4470 #define _INLVLB2 0x04
4471 #define _INLVLB3 0x08
4472 #define _INLVLB4 0x10
4473 #define _INLVLB5 0x20
4474 #define _INLVLB6 0x40
4475 #define _INLVLB7 0x80
4477 //==============================================================================
4480 //==============================================================================
4483 extern __at(0x038E) __sfr INLVLC
;
4487 unsigned INLVLC0
: 1;
4488 unsigned INLVLC1
: 1;
4489 unsigned INLVLC2
: 1;
4490 unsigned INLVLC3
: 1;
4491 unsigned INLVLC4
: 1;
4492 unsigned INLVLC5
: 1;
4493 unsigned INLVLC6
: 1;
4494 unsigned INLVLC7
: 1;
4497 extern __at(0x038E) volatile __INLVLCbits_t INLVLCbits
;
4499 #define _INLVLC0 0x01
4500 #define _INLVLC1 0x02
4501 #define _INLVLC2 0x04
4502 #define _INLVLC3 0x08
4503 #define _INLVLC4 0x10
4504 #define _INLVLC5 0x20
4505 #define _INLVLC6 0x40
4506 #define _INLVLC7 0x80
4508 //==============================================================================
4511 //==============================================================================
4514 extern __at(0x038F) __sfr INLVLD
;
4518 unsigned INLVLD0
: 1;
4519 unsigned INLVLD1
: 1;
4520 unsigned INLVLD2
: 1;
4521 unsigned INLVLD3
: 1;
4522 unsigned INLVLD4
: 1;
4523 unsigned INLVLD5
: 1;
4524 unsigned INLVLD6
: 1;
4525 unsigned INLVLD7
: 1;
4528 extern __at(0x038F) volatile __INLVLDbits_t INLVLDbits
;
4530 #define _INLVLD0 0x01
4531 #define _INLVLD1 0x02
4532 #define _INLVLD2 0x04
4533 #define _INLVLD3 0x08
4534 #define _INLVLD4 0x10
4535 #define _INLVLD5 0x20
4536 #define _INLVLD6 0x40
4537 #define _INLVLD7 0x80
4539 //==============================================================================
4542 //==============================================================================
4545 extern __at(0x0390) __sfr INLVLE
;
4551 unsigned INLVLE0
: 1;
4552 unsigned INLVLE1
: 1;
4553 unsigned INLVLE2
: 1;
4554 unsigned INLVLE3
: 1;
4563 unsigned INLVLE
: 4;
4568 extern __at(0x0390) volatile __INLVLEbits_t INLVLEbits
;
4570 #define _INLVLE0 0x01
4571 #define _INLVLE1 0x02
4572 #define _INLVLE2 0x04
4573 #define _INLVLE3 0x08
4575 //==============================================================================
4578 //==============================================================================
4581 extern __at(0x0391) __sfr IOCAP
;
4585 unsigned IOCAP0
: 1;
4586 unsigned IOCAP1
: 1;
4587 unsigned IOCAP2
: 1;
4588 unsigned IOCAP3
: 1;
4589 unsigned IOCAP4
: 1;
4590 unsigned IOCAP5
: 1;
4591 unsigned IOCAP6
: 1;
4592 unsigned IOCAP7
: 1;
4595 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits
;
4597 #define _IOCAP0 0x01
4598 #define _IOCAP1 0x02
4599 #define _IOCAP2 0x04
4600 #define _IOCAP3 0x08
4601 #define _IOCAP4 0x10
4602 #define _IOCAP5 0x20
4603 #define _IOCAP6 0x40
4604 #define _IOCAP7 0x80
4606 //==============================================================================
4609 //==============================================================================
4612 extern __at(0x0392) __sfr IOCAN
;
4616 unsigned IOCAN0
: 1;
4617 unsigned IOCAN1
: 1;
4618 unsigned IOCAN2
: 1;
4619 unsigned IOCAN3
: 1;
4620 unsigned IOCAN4
: 1;
4621 unsigned IOCAN5
: 1;
4622 unsigned IOCAN6
: 1;
4623 unsigned IOCAN7
: 1;
4626 extern __at(0x0392) volatile __IOCANbits_t IOCANbits
;
4628 #define _IOCAN0 0x01
4629 #define _IOCAN1 0x02
4630 #define _IOCAN2 0x04
4631 #define _IOCAN3 0x08
4632 #define _IOCAN4 0x10
4633 #define _IOCAN5 0x20
4634 #define _IOCAN6 0x40
4635 #define _IOCAN7 0x80
4637 //==============================================================================
4640 //==============================================================================
4643 extern __at(0x0393) __sfr IOCAF
;
4647 unsigned IOCAF0
: 1;
4648 unsigned IOCAF1
: 1;
4649 unsigned IOCAF2
: 1;
4650 unsigned IOCAF3
: 1;
4651 unsigned IOCAF4
: 1;
4652 unsigned IOCAF5
: 1;
4653 unsigned IOCAF6
: 1;
4654 unsigned IOCAF7
: 1;
4657 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits
;
4659 #define _IOCAF0 0x01
4660 #define _IOCAF1 0x02
4661 #define _IOCAF2 0x04
4662 #define _IOCAF3 0x08
4663 #define _IOCAF4 0x10
4664 #define _IOCAF5 0x20
4665 #define _IOCAF6 0x40
4666 #define _IOCAF7 0x80
4668 //==============================================================================
4671 //==============================================================================
4674 extern __at(0x0394) __sfr IOCBP
;
4678 unsigned IOCBP0
: 1;
4679 unsigned IOCBP1
: 1;
4680 unsigned IOCBP2
: 1;
4681 unsigned IOCBP3
: 1;
4682 unsigned IOCBP4
: 1;
4683 unsigned IOCBP5
: 1;
4684 unsigned IOCBP6
: 1;
4685 unsigned IOCBP7
: 1;
4688 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
4690 #define _IOCBP0 0x01
4691 #define _IOCBP1 0x02
4692 #define _IOCBP2 0x04
4693 #define _IOCBP3 0x08
4694 #define _IOCBP4 0x10
4695 #define _IOCBP5 0x20
4696 #define _IOCBP6 0x40
4697 #define _IOCBP7 0x80
4699 //==============================================================================
4702 //==============================================================================
4705 extern __at(0x0395) __sfr IOCBN
;
4709 unsigned IOCBN0
: 1;
4710 unsigned IOCBN1
: 1;
4711 unsigned IOCBN2
: 1;
4712 unsigned IOCBN3
: 1;
4713 unsigned IOCBN4
: 1;
4714 unsigned IOCBN5
: 1;
4715 unsigned IOCBN6
: 1;
4716 unsigned IOCBN7
: 1;
4719 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
4721 #define _IOCBN0 0x01
4722 #define _IOCBN1 0x02
4723 #define _IOCBN2 0x04
4724 #define _IOCBN3 0x08
4725 #define _IOCBN4 0x10
4726 #define _IOCBN5 0x20
4727 #define _IOCBN6 0x40
4728 #define _IOCBN7 0x80
4730 //==============================================================================
4733 //==============================================================================
4736 extern __at(0x0396) __sfr IOCBF
;
4740 unsigned IOCBF0
: 1;
4741 unsigned IOCBF1
: 1;
4742 unsigned IOCBF2
: 1;
4743 unsigned IOCBF3
: 1;
4744 unsigned IOCBF4
: 1;
4745 unsigned IOCBF5
: 1;
4746 unsigned IOCBF6
: 1;
4747 unsigned IOCBF7
: 1;
4750 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
4752 #define _IOCBF0 0x01
4753 #define _IOCBF1 0x02
4754 #define _IOCBF2 0x04
4755 #define _IOCBF3 0x08
4756 #define _IOCBF4 0x10
4757 #define _IOCBF5 0x20
4758 #define _IOCBF6 0x40
4759 #define _IOCBF7 0x80
4761 //==============================================================================
4764 //==============================================================================
4767 extern __at(0x0397) __sfr IOCCP
;
4771 unsigned IOCCP0
: 1;
4772 unsigned IOCCP1
: 1;
4773 unsigned IOCCP2
: 1;
4774 unsigned IOCCP3
: 1;
4775 unsigned IOCCP4
: 1;
4776 unsigned IOCCP5
: 1;
4777 unsigned IOCCP6
: 1;
4778 unsigned IOCCP7
: 1;
4781 extern __at(0x0397) volatile __IOCCPbits_t IOCCPbits
;
4783 #define _IOCCP0 0x01
4784 #define _IOCCP1 0x02
4785 #define _IOCCP2 0x04
4786 #define _IOCCP3 0x08
4787 #define _IOCCP4 0x10
4788 #define _IOCCP5 0x20
4789 #define _IOCCP6 0x40
4790 #define _IOCCP7 0x80
4792 //==============================================================================
4795 //==============================================================================
4798 extern __at(0x0398) __sfr IOCCN
;
4802 unsigned IOCCN0
: 1;
4803 unsigned IOCCN1
: 1;
4804 unsigned IOCCN2
: 1;
4805 unsigned IOCCN3
: 1;
4806 unsigned IOCCN4
: 1;
4807 unsigned IOCCN5
: 1;
4808 unsigned IOCCN6
: 1;
4809 unsigned IOCCN7
: 1;
4812 extern __at(0x0398) volatile __IOCCNbits_t IOCCNbits
;
4814 #define _IOCCN0 0x01
4815 #define _IOCCN1 0x02
4816 #define _IOCCN2 0x04
4817 #define _IOCCN3 0x08
4818 #define _IOCCN4 0x10
4819 #define _IOCCN5 0x20
4820 #define _IOCCN6 0x40
4821 #define _IOCCN7 0x80
4823 //==============================================================================
4826 //==============================================================================
4829 extern __at(0x0399) __sfr IOCCF
;
4833 unsigned IOCCF0
: 1;
4834 unsigned IOCCF1
: 1;
4835 unsigned IOCCF2
: 1;
4836 unsigned IOCCF3
: 1;
4837 unsigned IOCCF4
: 1;
4838 unsigned IOCCF5
: 1;
4839 unsigned IOCCF6
: 1;
4840 unsigned IOCCF7
: 1;
4843 extern __at(0x0399) volatile __IOCCFbits_t IOCCFbits
;
4845 #define _IOCCF0 0x01
4846 #define _IOCCF1 0x02
4847 #define _IOCCF2 0x04
4848 #define _IOCCF3 0x08
4849 #define _IOCCF4 0x10
4850 #define _IOCCF5 0x20
4851 #define _IOCCF6 0x40
4852 #define _IOCCF7 0x80
4854 //==============================================================================
4857 //==============================================================================
4860 extern __at(0x039D) __sfr IOCEP
;
4867 unsigned IOCEP3
: 1;
4874 extern __at(0x039D) volatile __IOCEPbits_t IOCEPbits
;
4876 #define _IOCEP3 0x08
4878 //==============================================================================
4881 //==============================================================================
4884 extern __at(0x039E) __sfr IOCEN
;
4891 unsigned IOCEN3
: 1;
4898 extern __at(0x039E) volatile __IOCENbits_t IOCENbits
;
4900 #define _IOCEN3 0x08
4902 //==============================================================================
4905 //==============================================================================
4908 extern __at(0x039F) __sfr IOCEF
;
4915 unsigned IOCEF3
: 1;
4922 extern __at(0x039F) volatile __IOCEFbits_t IOCEFbits
;
4924 #define _IOCEF3 0x08
4926 //==============================================================================
4928 extern __at(0x0415) __sfr TMR4
;
4929 extern __at(0x0416) __sfr PR4
;
4931 //==============================================================================
4934 extern __at(0x0417) __sfr T4CON
;
4940 unsigned T4CKPS0
: 1;
4941 unsigned T4CKPS1
: 1;
4942 unsigned TMR4ON
: 1;
4943 unsigned T4OUTPS0
: 1;
4944 unsigned T4OUTPS1
: 1;
4945 unsigned T4OUTPS2
: 1;
4946 unsigned T4OUTPS3
: 1;
4952 unsigned T4CKPS
: 2;
4959 unsigned T4OUTPS
: 4;
4964 extern __at(0x0417) volatile __T4CONbits_t T4CONbits
;
4966 #define _T4CKPS0 0x01
4967 #define _T4CKPS1 0x02
4968 #define _TMR4ON 0x04
4969 #define _T4OUTPS0 0x08
4970 #define _T4OUTPS1 0x10
4971 #define _T4OUTPS2 0x20
4972 #define _T4OUTPS3 0x40
4974 //==============================================================================
4976 extern __at(0x041C) __sfr TMR6
;
4977 extern __at(0x041D) __sfr PR6
;
4979 //==============================================================================
4982 extern __at(0x041E) __sfr T6CON
;
4988 unsigned T6CKPS0
: 1;
4989 unsigned T6CKPS1
: 1;
4990 unsigned TMR6ON
: 1;
4991 unsigned T6OUTPS0
: 1;
4992 unsigned T6OUTPS1
: 1;
4993 unsigned T6OUTPS2
: 1;
4994 unsigned T6OUTPS3
: 1;
5000 unsigned T6CKPS
: 2;
5007 unsigned T6OUTPS
: 4;
5012 extern __at(0x041E) volatile __T6CONbits_t T6CONbits
;
5014 #define _T6CKPS0 0x01
5015 #define _T6CKPS1 0x02
5016 #define _TMR6ON 0x04
5017 #define _T6OUTPS0 0x08
5018 #define _T6OUTPS1 0x10
5019 #define _T6OUTPS2 0x20
5020 #define _T6OUTPS3 0x40
5022 //==============================================================================
5024 extern __at(0x0498) __sfr NCO1ACC
;
5026 //==============================================================================
5029 extern __at(0x0498) __sfr NCO1ACCL
;
5033 unsigned NCO1ACC0
: 1;
5034 unsigned NCO1ACC1
: 1;
5035 unsigned NCO1ACC2
: 1;
5036 unsigned NCO1ACC3
: 1;
5037 unsigned NCO1ACC4
: 1;
5038 unsigned NCO1ACC5
: 1;
5039 unsigned NCO1ACC6
: 1;
5040 unsigned NCO1ACC7
: 1;
5043 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits
;
5045 #define _NCO1ACC0 0x01
5046 #define _NCO1ACC1 0x02
5047 #define _NCO1ACC2 0x04
5048 #define _NCO1ACC3 0x08
5049 #define _NCO1ACC4 0x10
5050 #define _NCO1ACC5 0x20
5051 #define _NCO1ACC6 0x40
5052 #define _NCO1ACC7 0x80
5054 //==============================================================================
5057 //==============================================================================
5060 extern __at(0x0499) __sfr NCO1ACCH
;
5064 unsigned NCO1ACC8
: 1;
5065 unsigned NCO1ACC9
: 1;
5066 unsigned NCO1ACC10
: 1;
5067 unsigned NCO1ACC11
: 1;
5068 unsigned NCO1ACC12
: 1;
5069 unsigned NCO1ACC13
: 1;
5070 unsigned NCO1ACC14
: 1;
5071 unsigned NCO1ACC15
: 1;
5074 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits
;
5076 #define _NCO1ACC8 0x01
5077 #define _NCO1ACC9 0x02
5078 #define _NCO1ACC10 0x04
5079 #define _NCO1ACC11 0x08
5080 #define _NCO1ACC12 0x10
5081 #define _NCO1ACC13 0x20
5082 #define _NCO1ACC14 0x40
5083 #define _NCO1ACC15 0x80
5085 //==============================================================================
5088 //==============================================================================
5091 extern __at(0x049A) __sfr NCO1ACCU
;
5095 unsigned NCO1ACC16
: 1;
5096 unsigned NCO1ACC17
: 1;
5097 unsigned NCO1ACC18
: 1;
5098 unsigned NCO1ACC19
: 1;
5105 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits
;
5107 #define _NCO1ACC16 0x01
5108 #define _NCO1ACC17 0x02
5109 #define _NCO1ACC18 0x04
5110 #define _NCO1ACC19 0x08
5112 //==============================================================================
5114 extern __at(0x049B) __sfr NCO1INC
;
5116 //==============================================================================
5119 extern __at(0x049B) __sfr NCO1INCL
;
5123 unsigned NCO1INC0
: 1;
5124 unsigned NCO1INC1
: 1;
5125 unsigned NCO1INC2
: 1;
5126 unsigned NCO1INC3
: 1;
5127 unsigned NCO1INC4
: 1;
5128 unsigned NCO1INC5
: 1;
5129 unsigned NCO1INC6
: 1;
5130 unsigned NCO1INC7
: 1;
5133 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits
;
5135 #define _NCO1INC0 0x01
5136 #define _NCO1INC1 0x02
5137 #define _NCO1INC2 0x04
5138 #define _NCO1INC3 0x08
5139 #define _NCO1INC4 0x10
5140 #define _NCO1INC5 0x20
5141 #define _NCO1INC6 0x40
5142 #define _NCO1INC7 0x80
5144 //==============================================================================
5147 //==============================================================================
5150 extern __at(0x049C) __sfr NCO1INCH
;
5154 unsigned NCO1INC8
: 1;
5155 unsigned NCO1INC9
: 1;
5156 unsigned NCO1INC10
: 1;
5157 unsigned NCO1INC11
: 1;
5158 unsigned NCO1INC12
: 1;
5159 unsigned NCO1INC13
: 1;
5160 unsigned NCO1INC14
: 1;
5161 unsigned NCO1INC15
: 1;
5164 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits
;
5166 #define _NCO1INC8 0x01
5167 #define _NCO1INC9 0x02
5168 #define _NCO1INC10 0x04
5169 #define _NCO1INC11 0x08
5170 #define _NCO1INC12 0x10
5171 #define _NCO1INC13 0x20
5172 #define _NCO1INC14 0x40
5173 #define _NCO1INC15 0x80
5175 //==============================================================================
5178 //==============================================================================
5181 extern __at(0x049D) __sfr NCO1INCU
;
5185 unsigned NCO1INC16
: 1;
5186 unsigned NCO1INC17
: 1;
5187 unsigned NCO1INC18
: 1;
5188 unsigned NCO1INC19
: 1;
5195 extern __at(0x049D) volatile __NCO1INCUbits_t NCO1INCUbits
;
5197 #define _NCO1INC16 0x01
5198 #define _NCO1INC17 0x02
5199 #define _NCO1INC18 0x04
5200 #define _NCO1INC19 0x08
5202 //==============================================================================
5205 //==============================================================================
5208 extern __at(0x049E) __sfr NCO1CON
;
5222 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits
;
5229 //==============================================================================
5232 //==============================================================================
5235 extern __at(0x049F) __sfr NCO1CLK
;
5241 unsigned N1CKS0
: 1;
5242 unsigned N1CKS1
: 1;
5246 unsigned N1PWS0
: 1;
5247 unsigned N1PWS1
: 1;
5248 unsigned N1PWS2
: 1;
5264 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits
;
5266 #define _N1CKS0 0x01
5267 #define _N1CKS1 0x02
5268 #define _N1PWS0 0x20
5269 #define _N1PWS1 0x40
5270 #define _N1PWS2 0x80
5272 //==============================================================================
5275 //==============================================================================
5278 extern __at(0x0511) __sfr OPA1CON
;
5284 unsigned OPA1PCH0
: 1;
5285 unsigned OPA1PCH1
: 1;
5288 unsigned OPA1UG
: 1;
5290 unsigned OPA1SP
: 1;
5291 unsigned OPA1EN
: 1;
5296 unsigned OPA1PCH
: 2;
5301 extern __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits
;
5303 #define _OPA1PCH0 0x01
5304 #define _OPA1PCH1 0x02
5305 #define _OPA1UG 0x10
5306 #define _OPA1SP 0x40
5307 #define _OPA1EN 0x80
5309 //==============================================================================
5312 //==============================================================================
5315 extern __at(0x0515) __sfr OPA2CON
;
5321 unsigned OPA2PCH0
: 1;
5322 unsigned OPA2PCH1
: 1;
5325 unsigned OPA2UG
: 1;
5327 unsigned OPA2SP
: 1;
5328 unsigned OPA2EN
: 1;
5333 unsigned OPA2PCH
: 2;
5338 extern __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits
;
5340 #define _OPA2PCH0 0x01
5341 #define _OPA2PCH1 0x02
5342 #define _OPA2UG 0x10
5343 #define _OPA2SP 0x40
5344 #define _OPA2EN 0x80
5346 //==============================================================================
5349 //==============================================================================
5352 extern __at(0x0617) __sfr PWM3DCL
;
5364 unsigned PWM3DCL0
: 1;
5365 unsigned PWM3DCL1
: 1;
5371 unsigned PWM3DCL
: 2;
5375 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits
;
5377 #define _PWM3DCL0 0x40
5378 #define _PWM3DCL1 0x80
5380 //==============================================================================
5383 //==============================================================================
5386 extern __at(0x0618) __sfr PWM3DCH
;
5390 unsigned PWM3DCH0
: 1;
5391 unsigned PWM3DCH1
: 1;
5392 unsigned PWM3DCH2
: 1;
5393 unsigned PWM3DCH3
: 1;
5394 unsigned PWM3DCH4
: 1;
5395 unsigned PWM3DCH5
: 1;
5396 unsigned PWM3DCH6
: 1;
5397 unsigned PWM3DCH7
: 1;
5400 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits
;
5402 #define _PWM3DCH0 0x01
5403 #define _PWM3DCH1 0x02
5404 #define _PWM3DCH2 0x04
5405 #define _PWM3DCH3 0x08
5406 #define _PWM3DCH4 0x10
5407 #define _PWM3DCH5 0x20
5408 #define _PWM3DCH6 0x40
5409 #define _PWM3DCH7 0x80
5411 //==============================================================================
5414 //==============================================================================
5417 extern __at(0x0619) __sfr PWM3CON
;
5425 unsigned PWM3POL
: 1;
5426 unsigned PWM3OUT
: 1;
5428 unsigned PWM3EN
: 1;
5431 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits
;
5433 #define _PWM3POL 0x10
5434 #define _PWM3OUT 0x20
5435 #define _PWM3EN 0x80
5437 //==============================================================================
5440 //==============================================================================
5443 extern __at(0x0619) __sfr PWM3CON0
;
5451 unsigned PWM3POL
: 1;
5452 unsigned PWM3OUT
: 1;
5454 unsigned PWM3EN
: 1;
5457 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits
;
5459 #define _PWM3CON0_PWM3POL 0x10
5460 #define _PWM3CON0_PWM3OUT 0x20
5461 #define _PWM3CON0_PWM3EN 0x80
5463 //==============================================================================
5466 //==============================================================================
5469 extern __at(0x061A) __sfr PWM4DCL
;
5481 unsigned PWM4DCL0
: 1;
5482 unsigned PWM4DCL1
: 1;
5488 unsigned PWM4DCL
: 2;
5492 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits
;
5494 #define _PWM4DCL0 0x40
5495 #define _PWM4DCL1 0x80
5497 //==============================================================================
5500 //==============================================================================
5503 extern __at(0x061B) __sfr PWM4DCH
;
5507 unsigned PWM4DCH0
: 1;
5508 unsigned PWM4DCH1
: 1;
5509 unsigned PWM4DCH2
: 1;
5510 unsigned PWM4DCH3
: 1;
5511 unsigned PWM4DCH4
: 1;
5512 unsigned PWM4DCH5
: 1;
5513 unsigned PWM4DCH6
: 1;
5514 unsigned PWM4DCH7
: 1;
5517 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits
;
5519 #define _PWM4DCH0 0x01
5520 #define _PWM4DCH1 0x02
5521 #define _PWM4DCH2 0x04
5522 #define _PWM4DCH3 0x08
5523 #define _PWM4DCH4 0x10
5524 #define _PWM4DCH5 0x20
5525 #define _PWM4DCH6 0x40
5526 #define _PWM4DCH7 0x80
5528 //==============================================================================
5531 //==============================================================================
5534 extern __at(0x061C) __sfr PWM4CON
;
5542 unsigned PWM4POL
: 1;
5543 unsigned PWM4OUT
: 1;
5545 unsigned PWM4EN
: 1;
5548 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits
;
5550 #define _PWM4POL 0x10
5551 #define _PWM4OUT 0x20
5552 #define _PWM4EN 0x80
5554 //==============================================================================
5557 //==============================================================================
5560 extern __at(0x061C) __sfr PWM4CON0
;
5568 unsigned PWM4POL
: 1;
5569 unsigned PWM4OUT
: 1;
5571 unsigned PWM4EN
: 1;
5574 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits
;
5576 #define _PWM4CON0_PWM4POL 0x10
5577 #define _PWM4CON0_PWM4OUT 0x20
5578 #define _PWM4CON0_PWM4EN 0x80
5580 //==============================================================================
5583 //==============================================================================
5586 extern __at(0x0691) __sfr COG1PHR
;
5592 unsigned G1PHR0
: 1;
5593 unsigned G1PHR1
: 1;
5594 unsigned G1PHR2
: 1;
5595 unsigned G1PHR3
: 1;
5596 unsigned G1PHR4
: 1;
5597 unsigned G1PHR5
: 1;
5609 extern __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits
;
5611 #define _G1PHR0 0x01
5612 #define _G1PHR1 0x02
5613 #define _G1PHR2 0x04
5614 #define _G1PHR3 0x08
5615 #define _G1PHR4 0x10
5616 #define _G1PHR5 0x20
5618 //==============================================================================
5621 //==============================================================================
5624 extern __at(0x0692) __sfr COG1PHF
;
5630 unsigned G1PHF0
: 1;
5631 unsigned G1PHF1
: 1;
5632 unsigned G1PHF2
: 1;
5633 unsigned G1PHF3
: 1;
5634 unsigned G1PHF4
: 1;
5635 unsigned G1PHF5
: 1;
5647 extern __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits
;
5649 #define _G1PHF0 0x01
5650 #define _G1PHF1 0x02
5651 #define _G1PHF2 0x04
5652 #define _G1PHF3 0x08
5653 #define _G1PHF4 0x10
5654 #define _G1PHF5 0x20
5656 //==============================================================================
5659 //==============================================================================
5662 extern __at(0x0693) __sfr COG1BLKR
;
5668 unsigned G1BLKR0
: 1;
5669 unsigned G1BLKR1
: 1;
5670 unsigned G1BLKR2
: 1;
5671 unsigned G1BLKR3
: 1;
5672 unsigned G1BLKR4
: 1;
5673 unsigned G1BLKR5
: 1;
5680 unsigned G1BLKR
: 6;
5685 extern __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits
;
5687 #define _G1BLKR0 0x01
5688 #define _G1BLKR1 0x02
5689 #define _G1BLKR2 0x04
5690 #define _G1BLKR3 0x08
5691 #define _G1BLKR4 0x10
5692 #define _G1BLKR5 0x20
5694 //==============================================================================
5697 //==============================================================================
5700 extern __at(0x0694) __sfr COG1BLKF
;
5706 unsigned G1BLKF0
: 1;
5707 unsigned G1BLKF1
: 1;
5708 unsigned G1BLKF2
: 1;
5709 unsigned G1BLKF3
: 1;
5710 unsigned G1BLKF4
: 1;
5711 unsigned G1BLKF5
: 1;
5718 unsigned G1BLKF
: 6;
5723 extern __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits
;
5725 #define _G1BLKF0 0x01
5726 #define _G1BLKF1 0x02
5727 #define _G1BLKF2 0x04
5728 #define _G1BLKF3 0x08
5729 #define _G1BLKF4 0x10
5730 #define _G1BLKF5 0x20
5732 //==============================================================================
5735 //==============================================================================
5738 extern __at(0x0695) __sfr COG1DBR
;
5744 unsigned G1DBR0
: 1;
5745 unsigned G1DBR1
: 1;
5746 unsigned G1DBR2
: 1;
5747 unsigned G1DBR3
: 1;
5748 unsigned G1DBR4
: 1;
5749 unsigned G1DBR5
: 1;
5761 extern __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits
;
5763 #define _G1DBR0 0x01
5764 #define _G1DBR1 0x02
5765 #define _G1DBR2 0x04
5766 #define _G1DBR3 0x08
5767 #define _G1DBR4 0x10
5768 #define _G1DBR5 0x20
5770 //==============================================================================
5773 //==============================================================================
5776 extern __at(0x0696) __sfr COG1DBF
;
5782 unsigned G1DBF0
: 1;
5783 unsigned G1DBF1
: 1;
5784 unsigned G1DBF2
: 1;
5785 unsigned G1DBF3
: 1;
5786 unsigned G1DBF4
: 1;
5787 unsigned G1DBF5
: 1;
5799 extern __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits
;
5801 #define _G1DBF0 0x01
5802 #define _G1DBF1 0x02
5803 #define _G1DBF2 0x04
5804 #define _G1DBF3 0x08
5805 #define _G1DBF4 0x10
5806 #define _G1DBF5 0x20
5808 //==============================================================================
5811 //==============================================================================
5814 extern __at(0x0697) __sfr COG1CON0
;
5844 extern __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits
;
5854 //==============================================================================
5857 //==============================================================================
5860 extern __at(0x0698) __sfr COG1CON1
;
5864 unsigned G1POLA
: 1;
5865 unsigned G1POLB
: 1;
5866 unsigned G1POLC
: 1;
5867 unsigned G1POLD
: 1;
5870 unsigned G1FDBS
: 1;
5871 unsigned G1RDBS
: 1;
5874 extern __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits
;
5876 #define _G1POLA 0x01
5877 #define _G1POLB 0x02
5878 #define _G1POLC 0x04
5879 #define _G1POLD 0x08
5880 #define _G1FDBS 0x40
5881 #define _G1RDBS 0x80
5883 //==============================================================================
5886 //==============================================================================
5889 extern __at(0x0699) __sfr COG1RIS
;
5893 unsigned G1RIS0
: 1;
5894 unsigned G1RIS1
: 1;
5895 unsigned G1RIS2
: 1;
5896 unsigned G1RIS3
: 1;
5897 unsigned G1RIS4
: 1;
5898 unsigned G1RIS5
: 1;
5899 unsigned G1RIS6
: 1;
5900 unsigned G1RIS7
: 1;
5903 extern __at(0x0699) volatile __COG1RISbits_t COG1RISbits
;
5905 #define _G1RIS0 0x01
5906 #define _G1RIS1 0x02
5907 #define _G1RIS2 0x04
5908 #define _G1RIS3 0x08
5909 #define _G1RIS4 0x10
5910 #define _G1RIS5 0x20
5911 #define _G1RIS6 0x40
5912 #define _G1RIS7 0x80
5914 //==============================================================================
5917 //==============================================================================
5920 extern __at(0x069A) __sfr COG1RSIM
;
5924 unsigned G1RSIM0
: 1;
5925 unsigned G1RSIM1
: 1;
5926 unsigned G1RSIM2
: 1;
5927 unsigned G1RSIM3
: 1;
5928 unsigned G1RSIM4
: 1;
5929 unsigned G1RSIM5
: 1;
5930 unsigned G1RSIM6
: 1;
5931 unsigned G1RSIM7
: 1;
5934 extern __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits
;
5936 #define _G1RSIM0 0x01
5937 #define _G1RSIM1 0x02
5938 #define _G1RSIM2 0x04
5939 #define _G1RSIM3 0x08
5940 #define _G1RSIM4 0x10
5941 #define _G1RSIM5 0x20
5942 #define _G1RSIM6 0x40
5943 #define _G1RSIM7 0x80
5945 //==============================================================================
5948 //==============================================================================
5951 extern __at(0x069B) __sfr COG1FIS
;
5955 unsigned G1FIS0
: 1;
5956 unsigned G1FIS1
: 1;
5957 unsigned G1FIS2
: 1;
5958 unsigned G1FIS3
: 1;
5959 unsigned G1FIS4
: 1;
5960 unsigned G1FIS5
: 1;
5961 unsigned G1FIS6
: 1;
5962 unsigned G1FIS7
: 1;
5965 extern __at(0x069B) volatile __COG1FISbits_t COG1FISbits
;
5967 #define _G1FIS0 0x01
5968 #define _G1FIS1 0x02
5969 #define _G1FIS2 0x04
5970 #define _G1FIS3 0x08
5971 #define _G1FIS4 0x10
5972 #define _G1FIS5 0x20
5973 #define _G1FIS6 0x40
5974 #define _G1FIS7 0x80
5976 //==============================================================================
5979 //==============================================================================
5982 extern __at(0x069C) __sfr COG1FSIM
;
5986 unsigned G1FSIM0
: 1;
5987 unsigned G1FSIM1
: 1;
5988 unsigned G1FSIM2
: 1;
5989 unsigned G1FSIM3
: 1;
5990 unsigned G1FSIM4
: 1;
5991 unsigned G1FSIM5
: 1;
5992 unsigned G1FSIM6
: 1;
5993 unsigned G1FSIM7
: 1;
5996 extern __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits
;
5998 #define _G1FSIM0 0x01
5999 #define _G1FSIM1 0x02
6000 #define _G1FSIM2 0x04
6001 #define _G1FSIM3 0x08
6002 #define _G1FSIM4 0x10
6003 #define _G1FSIM5 0x20
6004 #define _G1FSIM6 0x40
6005 #define _G1FSIM7 0x80
6007 //==============================================================================
6010 //==============================================================================
6013 extern __at(0x069D) __sfr COG1ASD0
;
6021 unsigned G1ASDAC0
: 1;
6022 unsigned G1ASDAC1
: 1;
6023 unsigned G1ASDBD0
: 1;
6024 unsigned G1ASDBD1
: 1;
6025 unsigned G1ARSEN
: 1;
6032 unsigned G1ASDAC
: 2;
6039 unsigned G1ASDBD
: 2;
6044 extern __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits
;
6046 #define _G1ASDAC0 0x04
6047 #define _G1ASDAC1 0x08
6048 #define _G1ASDBD0 0x10
6049 #define _G1ASDBD1 0x20
6050 #define _G1ARSEN 0x40
6053 //==============================================================================
6056 //==============================================================================
6059 extern __at(0x069E) __sfr COG1ASD1
;
6063 unsigned G1AS0E
: 1;
6064 unsigned G1AS1E
: 1;
6065 unsigned G1AS2E
: 1;
6066 unsigned G1AS3E
: 1;
6073 extern __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits
;
6075 #define _G1AS0E 0x01
6076 #define _G1AS1E 0x02
6077 #define _G1AS2E 0x04
6078 #define _G1AS3E 0x08
6080 //==============================================================================
6083 //==============================================================================
6086 extern __at(0x069F) __sfr COG1STR
;
6090 unsigned G1STRA
: 1;
6091 unsigned G1STRB
: 1;
6092 unsigned G1STRC
: 1;
6093 unsigned G1STRD
: 1;
6094 unsigned G1SDATA
: 1;
6095 unsigned G1SDATB
: 1;
6096 unsigned G1SDATC
: 1;
6097 unsigned G1SDATD
: 1;
6100 extern __at(0x069F) volatile __COG1STRbits_t COG1STRbits
;
6102 #define _G1STRA 0x01
6103 #define _G1STRB 0x02
6104 #define _G1STRC 0x04
6105 #define _G1STRD 0x08
6106 #define _G1SDATA 0x10
6107 #define _G1SDATB 0x20
6108 #define _G1SDATC 0x40
6109 #define _G1SDATD 0x80
6111 //==============================================================================
6114 //==============================================================================
6117 extern __at(0x0E0F) __sfr PPSLOCK
;
6121 unsigned PPSLOCKED
: 1;
6131 extern __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits
;
6133 #define _PPSLOCKED 0x01
6135 //==============================================================================
6137 extern __at(0x0E10) __sfr INTPPS
;
6138 extern __at(0x0E11) __sfr T0CKIPPS
;
6139 extern __at(0x0E12) __sfr T1CKIPPS
;
6140 extern __at(0x0E13) __sfr T1GPPS
;
6141 extern __at(0x0E14) __sfr CCP1PPS
;
6142 extern __at(0x0E15) __sfr CCP2PPS
;
6143 extern __at(0x0E17) __sfr COGINPPS
;
6144 extern __at(0x0E20) __sfr SSPCLKPPS
;
6145 extern __at(0x0E21) __sfr SSPDATPPS
;
6146 extern __at(0x0E22) __sfr SSPSSPPS
;
6147 extern __at(0x0E24) __sfr RXPPS
;
6148 extern __at(0x0E25) __sfr CKPPS
;
6149 extern __at(0x0E28) __sfr CLCIN0PPS
;
6150 extern __at(0x0E29) __sfr CLCIN1PPS
;
6151 extern __at(0x0E2A) __sfr CLCIN2PPS
;
6152 extern __at(0x0E2B) __sfr CLCIN3PPS
;
6153 extern __at(0x0E90) __sfr RA0PPS
;
6154 extern __at(0x0E91) __sfr RA1PPS
;
6155 extern __at(0x0E92) __sfr RA2PPS
;
6156 extern __at(0x0E93) __sfr RA3PPS
;
6157 extern __at(0x0E94) __sfr RA4PPS
;
6158 extern __at(0x0E95) __sfr RA5PPS
;
6159 extern __at(0x0E96) __sfr RA6PPS
;
6160 extern __at(0x0E97) __sfr RA7PPS
;
6161 extern __at(0x0E98) __sfr RB0PPS
;
6162 extern __at(0x0E99) __sfr RB1PPS
;
6163 extern __at(0x0E9A) __sfr RB2PPS
;
6164 extern __at(0x0E9B) __sfr RB3PPS
;
6165 extern __at(0x0E9C) __sfr RB4PPS
;
6166 extern __at(0x0E9D) __sfr RB5PPS
;
6167 extern __at(0x0E9E) __sfr RB6PPS
;
6168 extern __at(0x0E9F) __sfr RB7PPS
;
6169 extern __at(0x0EA0) __sfr RC0PPS
;
6170 extern __at(0x0EA1) __sfr RC1PPS
;
6171 extern __at(0x0EA2) __sfr RC2PPS
;
6172 extern __at(0x0EA3) __sfr RC3PPS
;
6173 extern __at(0x0EA4) __sfr RC4PPS
;
6174 extern __at(0x0EA5) __sfr RC5PPS
;
6175 extern __at(0x0EA6) __sfr RC6PPS
;
6176 extern __at(0x0EA7) __sfr RC7PPS
;
6177 extern __at(0x0EA8) __sfr RD0PPS
;
6178 extern __at(0x0EA9) __sfr RD1PPS
;
6179 extern __at(0x0EAA) __sfr RD2PPS
;
6180 extern __at(0x0EAB) __sfr RD3PPS
;
6181 extern __at(0x0EAC) __sfr RD4PPS
;
6182 extern __at(0x0EAD) __sfr RD5PPS
;
6183 extern __at(0x0EAE) __sfr RD6PPS
;
6184 extern __at(0x0EAF) __sfr RD7PPS
;
6185 extern __at(0x0EB0) __sfr RE0PPS
;
6186 extern __at(0x0EB1) __sfr RE1PPS
;
6187 extern __at(0x0EB2) __sfr RE2PPS
;
6189 //==============================================================================
6192 extern __at(0x0F0F) __sfr CLCDATA
;
6198 unsigned MLC1OUT
: 1;
6199 unsigned MLC2OUT
: 1;
6200 unsigned MLC3OUT
: 1;
6201 unsigned MLC4OUT
: 1;
6210 unsigned MCLC1OUT
: 1;
6211 unsigned MCLC2OUT
: 1;
6212 unsigned MCLC3OUT
: 1;
6213 unsigned MCLC4OUT
: 1;
6221 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits
;
6223 #define _MLC1OUT 0x01
6224 #define _MCLC1OUT 0x01
6225 #define _MLC2OUT 0x02
6226 #define _MCLC2OUT 0x02
6227 #define _MLC3OUT 0x04
6228 #define _MCLC3OUT 0x04
6229 #define _MLC4OUT 0x08
6230 #define _MCLC4OUT 0x08
6232 //==============================================================================
6235 //==============================================================================
6238 extern __at(0x0F10) __sfr CLC1CON
;
6244 unsigned LC1MODE0
: 1;
6245 unsigned LC1MODE1
: 1;
6246 unsigned LC1MODE2
: 1;
6247 unsigned LC1INTN
: 1;
6248 unsigned LC1INTP
: 1;
6249 unsigned LC1OUT
: 1;
6268 unsigned LC1MODE
: 3;
6279 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits
;
6281 #define _LC1MODE0 0x01
6283 #define _LC1MODE1 0x02
6285 #define _LC1MODE2 0x04
6287 #define _LC1INTN 0x08
6289 #define _LC1INTP 0x10
6291 #define _LC1OUT 0x20
6296 //==============================================================================
6299 //==============================================================================
6302 extern __at(0x0F11) __sfr CLC1POL
;
6308 unsigned LC1G1POL
: 1;
6309 unsigned LC1G2POL
: 1;
6310 unsigned LC1G3POL
: 1;
6311 unsigned LC1G4POL
: 1;
6315 unsigned LC1POL
: 1;
6331 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits
;
6333 #define _LC1G1POL 0x01
6335 #define _LC1G2POL 0x02
6337 #define _LC1G3POL 0x04
6339 #define _LC1G4POL 0x08
6341 #define _LC1POL 0x80
6344 //==============================================================================
6347 //==============================================================================
6350 extern __at(0x0F12) __sfr CLC1SEL0
;
6356 unsigned LC1D1S0
: 1;
6357 unsigned LC1D1S1
: 1;
6358 unsigned LC1D1S2
: 1;
6359 unsigned LC1D1S3
: 1;
6360 unsigned LC1D1S4
: 1;
6380 unsigned LC1D1S
: 5;
6391 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
6393 #define _LC1D1S0 0x01
6395 #define _LC1D1S1 0x02
6397 #define _LC1D1S2 0x04
6399 #define _LC1D1S3 0x08
6401 #define _LC1D1S4 0x10
6404 //==============================================================================
6407 //==============================================================================
6410 extern __at(0x0F13) __sfr CLC1SEL1
;
6416 unsigned LC1D2S0
: 1;
6417 unsigned LC1D2S1
: 1;
6418 unsigned LC1D2S2
: 1;
6419 unsigned LC1D2S3
: 1;
6420 unsigned LC1D2S4
: 1;
6440 unsigned LC1D2S
: 5;
6451 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
6453 #define _LC1D2S0 0x01
6455 #define _LC1D2S1 0x02
6457 #define _LC1D2S2 0x04
6459 #define _LC1D2S3 0x08
6461 #define _LC1D2S4 0x10
6464 //==============================================================================
6467 //==============================================================================
6470 extern __at(0x0F14) __sfr CLC1SEL2
;
6476 unsigned LC1D3S0
: 1;
6477 unsigned LC1D3S1
: 1;
6478 unsigned LC1D3S2
: 1;
6479 unsigned LC1D3S3
: 1;
6480 unsigned LC1D3S4
: 1;
6500 unsigned LC1D3S
: 5;
6511 extern __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
6513 #define _LC1D3S0 0x01
6515 #define _LC1D3S1 0x02
6517 #define _LC1D3S2 0x04
6519 #define _LC1D3S3 0x08
6521 #define _LC1D3S4 0x10
6524 //==============================================================================
6527 //==============================================================================
6530 extern __at(0x0F15) __sfr CLC1SEL3
;
6536 unsigned LC1D4S0
: 1;
6537 unsigned LC1D4S1
: 1;
6538 unsigned LC1D4S2
: 1;
6539 unsigned LC1D4S3
: 1;
6540 unsigned LC1D4S4
: 1;
6566 unsigned LC1D4S
: 5;
6571 extern __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
6573 #define _LC1D4S0 0x01
6575 #define _LC1D4S1 0x02
6577 #define _LC1D4S2 0x04
6579 #define _LC1D4S3 0x08
6581 #define _LC1D4S4 0x10
6584 //==============================================================================
6587 //==============================================================================
6590 extern __at(0x0F16) __sfr CLC1GLS0
;
6596 unsigned LC1G1D1N
: 1;
6597 unsigned LC1G1D1T
: 1;
6598 unsigned LC1G1D2N
: 1;
6599 unsigned LC1G1D2T
: 1;
6600 unsigned LC1G1D3N
: 1;
6601 unsigned LC1G1D3T
: 1;
6602 unsigned LC1G1D4N
: 1;
6603 unsigned LC1G1D4T
: 1;
6619 extern __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
6621 #define _LC1G1D1N 0x01
6623 #define _LC1G1D1T 0x02
6625 #define _LC1G1D2N 0x04
6627 #define _LC1G1D2T 0x08
6629 #define _LC1G1D3N 0x10
6631 #define _LC1G1D3T 0x20
6633 #define _LC1G1D4N 0x40
6635 #define _LC1G1D4T 0x80
6638 //==============================================================================
6641 //==============================================================================
6644 extern __at(0x0F17) __sfr CLC1GLS1
;
6650 unsigned LC1G2D1N
: 1;
6651 unsigned LC1G2D1T
: 1;
6652 unsigned LC1G2D2N
: 1;
6653 unsigned LC1G2D2T
: 1;
6654 unsigned LC1G2D3N
: 1;
6655 unsigned LC1G2D3T
: 1;
6656 unsigned LC1G2D4N
: 1;
6657 unsigned LC1G2D4T
: 1;
6673 extern __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
6675 #define _CLC1GLS1_LC1G2D1N 0x01
6676 #define _CLC1GLS1_D1N 0x01
6677 #define _CLC1GLS1_LC1G2D1T 0x02
6678 #define _CLC1GLS1_D1T 0x02
6679 #define _CLC1GLS1_LC1G2D2N 0x04
6680 #define _CLC1GLS1_D2N 0x04
6681 #define _CLC1GLS1_LC1G2D2T 0x08
6682 #define _CLC1GLS1_D2T 0x08
6683 #define _CLC1GLS1_LC1G2D3N 0x10
6684 #define _CLC1GLS1_D3N 0x10
6685 #define _CLC1GLS1_LC1G2D3T 0x20
6686 #define _CLC1GLS1_D3T 0x20
6687 #define _CLC1GLS1_LC1G2D4N 0x40
6688 #define _CLC1GLS1_D4N 0x40
6689 #define _CLC1GLS1_LC1G2D4T 0x80
6690 #define _CLC1GLS1_D4T 0x80
6692 //==============================================================================
6695 //==============================================================================
6698 extern __at(0x0F18) __sfr CLC1GLS2
;
6704 unsigned LC1G3D1N
: 1;
6705 unsigned LC1G3D1T
: 1;
6706 unsigned LC1G3D2N
: 1;
6707 unsigned LC1G3D2T
: 1;
6708 unsigned LC1G3D3N
: 1;
6709 unsigned LC1G3D3T
: 1;
6710 unsigned LC1G3D4N
: 1;
6711 unsigned LC1G3D4T
: 1;
6727 extern __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
6729 #define _CLC1GLS2_LC1G3D1N 0x01
6730 #define _CLC1GLS2_D1N 0x01
6731 #define _CLC1GLS2_LC1G3D1T 0x02
6732 #define _CLC1GLS2_D1T 0x02
6733 #define _CLC1GLS2_LC1G3D2N 0x04
6734 #define _CLC1GLS2_D2N 0x04
6735 #define _CLC1GLS2_LC1G3D2T 0x08
6736 #define _CLC1GLS2_D2T 0x08
6737 #define _CLC1GLS2_LC1G3D3N 0x10
6738 #define _CLC1GLS2_D3N 0x10
6739 #define _CLC1GLS2_LC1G3D3T 0x20
6740 #define _CLC1GLS2_D3T 0x20
6741 #define _CLC1GLS2_LC1G3D4N 0x40
6742 #define _CLC1GLS2_D4N 0x40
6743 #define _CLC1GLS2_LC1G3D4T 0x80
6744 #define _CLC1GLS2_D4T 0x80
6746 //==============================================================================
6749 //==============================================================================
6752 extern __at(0x0F19) __sfr CLC1GLS3
;
6758 unsigned LC1G4D1N
: 1;
6759 unsigned LC1G4D1T
: 1;
6760 unsigned LC1G4D2N
: 1;
6761 unsigned LC1G4D2T
: 1;
6762 unsigned LC1G4D3N
: 1;
6763 unsigned LC1G4D3T
: 1;
6764 unsigned LC1G4D4N
: 1;
6765 unsigned LC1G4D4T
: 1;
6781 extern __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
6783 #define _LC1G4D1N 0x01
6785 #define _LC1G4D1T 0x02
6787 #define _LC1G4D2N 0x04
6789 #define _LC1G4D2T 0x08
6791 #define _LC1G4D3N 0x10
6793 #define _LC1G4D3T 0x20
6795 #define _LC1G4D4N 0x40
6797 #define _LC1G4D4T 0x80
6800 //==============================================================================
6803 //==============================================================================
6806 extern __at(0x0F1A) __sfr CLC2CON
;
6812 unsigned LC2MODE0
: 1;
6813 unsigned LC2MODE1
: 1;
6814 unsigned LC2MODE2
: 1;
6815 unsigned LC2INTN
: 1;
6816 unsigned LC2INTP
: 1;
6817 unsigned LC2OUT
: 1;
6836 unsigned LC2MODE
: 3;
6847 extern __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits
;
6849 #define _CLC2CON_LC2MODE0 0x01
6850 #define _CLC2CON_MODE0 0x01
6851 #define _CLC2CON_LC2MODE1 0x02
6852 #define _CLC2CON_MODE1 0x02
6853 #define _CLC2CON_LC2MODE2 0x04
6854 #define _CLC2CON_MODE2 0x04
6855 #define _CLC2CON_LC2INTN 0x08
6856 #define _CLC2CON_INTN 0x08
6857 #define _CLC2CON_LC2INTP 0x10
6858 #define _CLC2CON_INTP 0x10
6859 #define _CLC2CON_LC2OUT 0x20
6860 #define _CLC2CON_OUT 0x20
6861 #define _CLC2CON_LC2EN 0x80
6862 #define _CLC2CON_EN 0x80
6864 //==============================================================================
6867 //==============================================================================
6870 extern __at(0x0F1B) __sfr CLC2POL
;
6876 unsigned LC2G1POL
: 1;
6877 unsigned LC2G2POL
: 1;
6878 unsigned LC2G3POL
: 1;
6879 unsigned LC2G4POL
: 1;
6883 unsigned LC2POL
: 1;
6899 extern __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits
;
6901 #define _CLC2POL_LC2G1POL 0x01
6902 #define _CLC2POL_G1POL 0x01
6903 #define _CLC2POL_LC2G2POL 0x02
6904 #define _CLC2POL_G2POL 0x02
6905 #define _CLC2POL_LC2G3POL 0x04
6906 #define _CLC2POL_G3POL 0x04
6907 #define _CLC2POL_LC2G4POL 0x08
6908 #define _CLC2POL_G4POL 0x08
6909 #define _CLC2POL_LC2POL 0x80
6910 #define _CLC2POL_POL 0x80
6912 //==============================================================================
6915 //==============================================================================
6918 extern __at(0x0F1C) __sfr CLC2SEL0
;
6924 unsigned LC2D1S0
: 1;
6925 unsigned LC2D1S1
: 1;
6926 unsigned LC2D1S2
: 1;
6927 unsigned LC2D1S3
: 1;
6928 unsigned LC2D1S4
: 1;
6948 unsigned LC2D1S
: 5;
6959 extern __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
6961 #define _CLC2SEL0_LC2D1S0 0x01
6962 #define _CLC2SEL0_D1S0 0x01
6963 #define _CLC2SEL0_LC2D1S1 0x02
6964 #define _CLC2SEL0_D1S1 0x02
6965 #define _CLC2SEL0_LC2D1S2 0x04
6966 #define _CLC2SEL0_D1S2 0x04
6967 #define _CLC2SEL0_LC2D1S3 0x08
6968 #define _CLC2SEL0_D1S3 0x08
6969 #define _CLC2SEL0_LC2D1S4 0x10
6970 #define _CLC2SEL0_D1S4 0x10
6972 //==============================================================================
6975 //==============================================================================
6978 extern __at(0x0F1D) __sfr CLC2SEL1
;
6984 unsigned LC2D2S0
: 1;
6985 unsigned LC2D2S1
: 1;
6986 unsigned LC2D2S2
: 1;
6987 unsigned LC2D2S3
: 1;
6988 unsigned LC2D2S4
: 1;
7014 unsigned LC2D2S
: 5;
7019 extern __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
7021 #define _CLC2SEL1_LC2D2S0 0x01
7022 #define _CLC2SEL1_D2S0 0x01
7023 #define _CLC2SEL1_LC2D2S1 0x02
7024 #define _CLC2SEL1_D2S1 0x02
7025 #define _CLC2SEL1_LC2D2S2 0x04
7026 #define _CLC2SEL1_D2S2 0x04
7027 #define _CLC2SEL1_LC2D2S3 0x08
7028 #define _CLC2SEL1_D2S3 0x08
7029 #define _CLC2SEL1_LC2D2S4 0x10
7030 #define _CLC2SEL1_D2S4 0x10
7032 //==============================================================================
7035 //==============================================================================
7038 extern __at(0x0F1E) __sfr CLC2SEL2
;
7044 unsigned LC2D3S0
: 1;
7045 unsigned LC2D3S1
: 1;
7046 unsigned LC2D3S2
: 1;
7047 unsigned LC2D3S3
: 1;
7048 unsigned LC2D3S4
: 1;
7068 unsigned LC2D3S
: 5;
7079 extern __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
7081 #define _CLC2SEL2_LC2D3S0 0x01
7082 #define _CLC2SEL2_D3S0 0x01
7083 #define _CLC2SEL2_LC2D3S1 0x02
7084 #define _CLC2SEL2_D3S1 0x02
7085 #define _CLC2SEL2_LC2D3S2 0x04
7086 #define _CLC2SEL2_D3S2 0x04
7087 #define _CLC2SEL2_LC2D3S3 0x08
7088 #define _CLC2SEL2_D3S3 0x08
7089 #define _CLC2SEL2_LC2D3S4 0x10
7090 #define _CLC2SEL2_D3S4 0x10
7092 //==============================================================================
7095 //==============================================================================
7098 extern __at(0x0F1F) __sfr CLC2SEL3
;
7104 unsigned LC2D4S0
: 1;
7105 unsigned LC2D4S1
: 1;
7106 unsigned LC2D4S2
: 1;
7107 unsigned LC2D4S3
: 1;
7108 unsigned LC2D4S4
: 1;
7134 unsigned LC2D4S
: 5;
7139 extern __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
7141 #define _CLC2SEL3_LC2D4S0 0x01
7142 #define _CLC2SEL3_D4S0 0x01
7143 #define _CLC2SEL3_LC2D4S1 0x02
7144 #define _CLC2SEL3_D4S1 0x02
7145 #define _CLC2SEL3_LC2D4S2 0x04
7146 #define _CLC2SEL3_D4S2 0x04
7147 #define _CLC2SEL3_LC2D4S3 0x08
7148 #define _CLC2SEL3_D4S3 0x08
7149 #define _CLC2SEL3_LC2D4S4 0x10
7150 #define _CLC2SEL3_D4S4 0x10
7152 //==============================================================================
7155 //==============================================================================
7158 extern __at(0x0F20) __sfr CLC2GLS0
;
7164 unsigned LC2G1D1N
: 1;
7165 unsigned LC2G1D1T
: 1;
7166 unsigned LC2G1D2N
: 1;
7167 unsigned LC2G1D2T
: 1;
7168 unsigned LC2G1D3N
: 1;
7169 unsigned LC2G1D3T
: 1;
7170 unsigned LC2G1D4N
: 1;
7171 unsigned LC2G1D4T
: 1;
7187 extern __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
7189 #define _CLC2GLS0_LC2G1D1N 0x01
7190 #define _CLC2GLS0_D1N 0x01
7191 #define _CLC2GLS0_LC2G1D1T 0x02
7192 #define _CLC2GLS0_D1T 0x02
7193 #define _CLC2GLS0_LC2G1D2N 0x04
7194 #define _CLC2GLS0_D2N 0x04
7195 #define _CLC2GLS0_LC2G1D2T 0x08
7196 #define _CLC2GLS0_D2T 0x08
7197 #define _CLC2GLS0_LC2G1D3N 0x10
7198 #define _CLC2GLS0_D3N 0x10
7199 #define _CLC2GLS0_LC2G1D3T 0x20
7200 #define _CLC2GLS0_D3T 0x20
7201 #define _CLC2GLS0_LC2G1D4N 0x40
7202 #define _CLC2GLS0_D4N 0x40
7203 #define _CLC2GLS0_LC2G1D4T 0x80
7204 #define _CLC2GLS0_D4T 0x80
7206 //==============================================================================
7209 //==============================================================================
7212 extern __at(0x0F21) __sfr CLC2GLS1
;
7218 unsigned LC2G2D1N
: 1;
7219 unsigned LC2G2D1T
: 1;
7220 unsigned LC2G2D2N
: 1;
7221 unsigned LC2G2D2T
: 1;
7222 unsigned LC2G2D3N
: 1;
7223 unsigned LC2G2D3T
: 1;
7224 unsigned LC2G2D4N
: 1;
7225 unsigned LC2G2D4T
: 1;
7241 extern __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
7243 #define _CLC2GLS1_LC2G2D1N 0x01
7244 #define _CLC2GLS1_D1N 0x01
7245 #define _CLC2GLS1_LC2G2D1T 0x02
7246 #define _CLC2GLS1_D1T 0x02
7247 #define _CLC2GLS1_LC2G2D2N 0x04
7248 #define _CLC2GLS1_D2N 0x04
7249 #define _CLC2GLS1_LC2G2D2T 0x08
7250 #define _CLC2GLS1_D2T 0x08
7251 #define _CLC2GLS1_LC2G2D3N 0x10
7252 #define _CLC2GLS1_D3N 0x10
7253 #define _CLC2GLS1_LC2G2D3T 0x20
7254 #define _CLC2GLS1_D3T 0x20
7255 #define _CLC2GLS1_LC2G2D4N 0x40
7256 #define _CLC2GLS1_D4N 0x40
7257 #define _CLC2GLS1_LC2G2D4T 0x80
7258 #define _CLC2GLS1_D4T 0x80
7260 //==============================================================================
7263 //==============================================================================
7266 extern __at(0x0F22) __sfr CLC2GLS2
;
7272 unsigned LC2G3D1N
: 1;
7273 unsigned LC2G3D1T
: 1;
7274 unsigned LC2G3D2N
: 1;
7275 unsigned LC2G3D2T
: 1;
7276 unsigned LC2G3D3N
: 1;
7277 unsigned LC2G3D3T
: 1;
7278 unsigned LC2G3D4N
: 1;
7279 unsigned LC2G3D4T
: 1;
7295 extern __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
7297 #define _CLC2GLS2_LC2G3D1N 0x01
7298 #define _CLC2GLS2_D1N 0x01
7299 #define _CLC2GLS2_LC2G3D1T 0x02
7300 #define _CLC2GLS2_D1T 0x02
7301 #define _CLC2GLS2_LC2G3D2N 0x04
7302 #define _CLC2GLS2_D2N 0x04
7303 #define _CLC2GLS2_LC2G3D2T 0x08
7304 #define _CLC2GLS2_D2T 0x08
7305 #define _CLC2GLS2_LC2G3D3N 0x10
7306 #define _CLC2GLS2_D3N 0x10
7307 #define _CLC2GLS2_LC2G3D3T 0x20
7308 #define _CLC2GLS2_D3T 0x20
7309 #define _CLC2GLS2_LC2G3D4N 0x40
7310 #define _CLC2GLS2_D4N 0x40
7311 #define _CLC2GLS2_LC2G3D4T 0x80
7312 #define _CLC2GLS2_D4T 0x80
7314 //==============================================================================
7317 //==============================================================================
7320 extern __at(0x0F23) __sfr CLC2GLS3
;
7326 unsigned LC2G4D1N
: 1;
7327 unsigned LC2G4D1T
: 1;
7328 unsigned LC2G4D2N
: 1;
7329 unsigned LC2G4D2T
: 1;
7330 unsigned LC2G4D3N
: 1;
7331 unsigned LC2G4D3T
: 1;
7332 unsigned LC2G4D4N
: 1;
7333 unsigned LC2G4D4T
: 1;
7349 extern __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
7351 #define _CLC2GLS3_LC2G4D1N 0x01
7352 #define _CLC2GLS3_G4D1N 0x01
7353 #define _CLC2GLS3_LC2G4D1T 0x02
7354 #define _CLC2GLS3_G4D1T 0x02
7355 #define _CLC2GLS3_LC2G4D2N 0x04
7356 #define _CLC2GLS3_G4D2N 0x04
7357 #define _CLC2GLS3_LC2G4D2T 0x08
7358 #define _CLC2GLS3_G4D2T 0x08
7359 #define _CLC2GLS3_LC2G4D3N 0x10
7360 #define _CLC2GLS3_G4D3N 0x10
7361 #define _CLC2GLS3_LC2G4D3T 0x20
7362 #define _CLC2GLS3_G4D3T 0x20
7363 #define _CLC2GLS3_LC2G4D4N 0x40
7364 #define _CLC2GLS3_G4D4N 0x40
7365 #define _CLC2GLS3_LC2G4D4T 0x80
7366 #define _CLC2GLS3_G4D4T 0x80
7368 //==============================================================================
7371 //==============================================================================
7374 extern __at(0x0F24) __sfr CLC3CON
;
7380 unsigned LC3MODE0
: 1;
7381 unsigned LC3MODE1
: 1;
7382 unsigned LC3MODE2
: 1;
7383 unsigned LC3INTN
: 1;
7384 unsigned LC3INTP
: 1;
7385 unsigned LC3OUT
: 1;
7410 unsigned LC3MODE
: 3;
7415 extern __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits
;
7417 #define _CLC3CON_LC3MODE0 0x01
7418 #define _CLC3CON_MODE0 0x01
7419 #define _CLC3CON_LC3MODE1 0x02
7420 #define _CLC3CON_MODE1 0x02
7421 #define _CLC3CON_LC3MODE2 0x04
7422 #define _CLC3CON_MODE2 0x04
7423 #define _CLC3CON_LC3INTN 0x08
7424 #define _CLC3CON_INTN 0x08
7425 #define _CLC3CON_LC3INTP 0x10
7426 #define _CLC3CON_INTP 0x10
7427 #define _CLC3CON_LC3OUT 0x20
7428 #define _CLC3CON_OUT 0x20
7429 #define _CLC3CON_LC3EN 0x80
7430 #define _CLC3CON_EN 0x80
7432 //==============================================================================
7435 //==============================================================================
7438 extern __at(0x0F25) __sfr CLC3POL
;
7444 unsigned LC3G1POL
: 1;
7445 unsigned LC3G2POL
: 1;
7446 unsigned LC3G3POL
: 1;
7447 unsigned LC3G4POL
: 1;
7451 unsigned LC3POL
: 1;
7467 extern __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits
;
7469 #define _CLC3POL_LC3G1POL 0x01
7470 #define _CLC3POL_G1POL 0x01
7471 #define _CLC3POL_LC3G2POL 0x02
7472 #define _CLC3POL_G2POL 0x02
7473 #define _CLC3POL_LC3G3POL 0x04
7474 #define _CLC3POL_G3POL 0x04
7475 #define _CLC3POL_LC3G4POL 0x08
7476 #define _CLC3POL_G4POL 0x08
7477 #define _CLC3POL_LC3POL 0x80
7478 #define _CLC3POL_POL 0x80
7480 //==============================================================================
7483 //==============================================================================
7486 extern __at(0x0F26) __sfr CLC3SEL0
;
7492 unsigned LC3D1S0
: 1;
7493 unsigned LC3D1S1
: 1;
7494 unsigned LC3D1S2
: 1;
7495 unsigned LC3D1S3
: 1;
7496 unsigned LC3D1S4
: 1;
7516 unsigned LC3D1S
: 5;
7527 extern __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
7529 #define _CLC3SEL0_LC3D1S0 0x01
7530 #define _CLC3SEL0_D1S0 0x01
7531 #define _CLC3SEL0_LC3D1S1 0x02
7532 #define _CLC3SEL0_D1S1 0x02
7533 #define _CLC3SEL0_LC3D1S2 0x04
7534 #define _CLC3SEL0_D1S2 0x04
7535 #define _CLC3SEL0_LC3D1S3 0x08
7536 #define _CLC3SEL0_D1S3 0x08
7537 #define _CLC3SEL0_LC3D1S4 0x10
7538 #define _CLC3SEL0_D1S4 0x10
7540 //==============================================================================
7543 //==============================================================================
7546 extern __at(0x0F27) __sfr CLC3SEL1
;
7552 unsigned LC3D2S0
: 1;
7553 unsigned LC3D2S1
: 1;
7554 unsigned LC3D2S2
: 1;
7555 unsigned LC3D2S3
: 1;
7556 unsigned LC3D2S4
: 1;
7582 unsigned LC3D2S
: 5;
7587 extern __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
7589 #define _CLC3SEL1_LC3D2S0 0x01
7590 #define _CLC3SEL1_D2S0 0x01
7591 #define _CLC3SEL1_LC3D2S1 0x02
7592 #define _CLC3SEL1_D2S1 0x02
7593 #define _CLC3SEL1_LC3D2S2 0x04
7594 #define _CLC3SEL1_D2S2 0x04
7595 #define _CLC3SEL1_LC3D2S3 0x08
7596 #define _CLC3SEL1_D2S3 0x08
7597 #define _CLC3SEL1_LC3D2S4 0x10
7598 #define _CLC3SEL1_D2S4 0x10
7600 //==============================================================================
7603 //==============================================================================
7606 extern __at(0x0F28) __sfr CLC3SEL2
;
7612 unsigned LC3D3S0
: 1;
7613 unsigned LC3D3S1
: 1;
7614 unsigned LC3D3S2
: 1;
7615 unsigned LC3D3S3
: 1;
7616 unsigned LC3D3S4
: 1;
7636 unsigned LC3D3S
: 5;
7647 extern __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
7649 #define _CLC3SEL2_LC3D3S0 0x01
7650 #define _CLC3SEL2_D3S0 0x01
7651 #define _CLC3SEL2_LC3D3S1 0x02
7652 #define _CLC3SEL2_D3S1 0x02
7653 #define _CLC3SEL2_LC3D3S2 0x04
7654 #define _CLC3SEL2_D3S2 0x04
7655 #define _CLC3SEL2_LC3D3S3 0x08
7656 #define _CLC3SEL2_D3S3 0x08
7657 #define _CLC3SEL2_LC3D3S4 0x10
7658 #define _CLC3SEL2_D3S4 0x10
7660 //==============================================================================
7663 //==============================================================================
7666 extern __at(0x0F29) __sfr CLC3SEL3
;
7672 unsigned LC3D4S0
: 1;
7673 unsigned LC3D4S1
: 1;
7674 unsigned LC3D4S2
: 1;
7675 unsigned LC3D4S3
: 1;
7676 unsigned LC3D4S4
: 1;
7696 unsigned LC3D4S
: 5;
7707 extern __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
7709 #define _CLC3SEL3_LC3D4S0 0x01
7710 #define _CLC3SEL3_D4S0 0x01
7711 #define _CLC3SEL3_LC3D4S1 0x02
7712 #define _CLC3SEL3_D4S1 0x02
7713 #define _CLC3SEL3_LC3D4S2 0x04
7714 #define _CLC3SEL3_D4S2 0x04
7715 #define _CLC3SEL3_LC3D4S3 0x08
7716 #define _CLC3SEL3_D4S3 0x08
7717 #define _CLC3SEL3_LC3D4S4 0x10
7718 #define _CLC3SEL3_D4S4 0x10
7720 //==============================================================================
7723 //==============================================================================
7726 extern __at(0x0F2A) __sfr CLC3GLS0
;
7732 unsigned LC3G1D1N
: 1;
7733 unsigned LC3G1D1T
: 1;
7734 unsigned LC3G1D2N
: 1;
7735 unsigned LC3G1D2T
: 1;
7736 unsigned LC3G1D3N
: 1;
7737 unsigned LC3G1D3T
: 1;
7738 unsigned LC3G1D4N
: 1;
7739 unsigned LC3G1D4T
: 1;
7755 extern __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
7757 #define _CLC3GLS0_LC3G1D1N 0x01
7758 #define _CLC3GLS0_D1N 0x01
7759 #define _CLC3GLS0_LC3G1D1T 0x02
7760 #define _CLC3GLS0_D1T 0x02
7761 #define _CLC3GLS0_LC3G1D2N 0x04
7762 #define _CLC3GLS0_D2N 0x04
7763 #define _CLC3GLS0_LC3G1D2T 0x08
7764 #define _CLC3GLS0_D2T 0x08
7765 #define _CLC3GLS0_LC3G1D3N 0x10
7766 #define _CLC3GLS0_D3N 0x10
7767 #define _CLC3GLS0_LC3G1D3T 0x20
7768 #define _CLC3GLS0_D3T 0x20
7769 #define _CLC3GLS0_LC3G1D4N 0x40
7770 #define _CLC3GLS0_D4N 0x40
7771 #define _CLC3GLS0_LC3G1D4T 0x80
7772 #define _CLC3GLS0_D4T 0x80
7774 //==============================================================================
7777 //==============================================================================
7780 extern __at(0x0F2B) __sfr CLC3GLS1
;
7786 unsigned LC3G2D1N
: 1;
7787 unsigned LC3G2D1T
: 1;
7788 unsigned LC3G2D2N
: 1;
7789 unsigned LC3G2D2T
: 1;
7790 unsigned LC3G2D3N
: 1;
7791 unsigned LC3G2D3T
: 1;
7792 unsigned LC3G2D4N
: 1;
7793 unsigned LC3G2D4T
: 1;
7809 extern __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
7811 #define _CLC3GLS1_LC3G2D1N 0x01
7812 #define _CLC3GLS1_D1N 0x01
7813 #define _CLC3GLS1_LC3G2D1T 0x02
7814 #define _CLC3GLS1_D1T 0x02
7815 #define _CLC3GLS1_LC3G2D2N 0x04
7816 #define _CLC3GLS1_D2N 0x04
7817 #define _CLC3GLS1_LC3G2D2T 0x08
7818 #define _CLC3GLS1_D2T 0x08
7819 #define _CLC3GLS1_LC3G2D3N 0x10
7820 #define _CLC3GLS1_D3N 0x10
7821 #define _CLC3GLS1_LC3G2D3T 0x20
7822 #define _CLC3GLS1_D3T 0x20
7823 #define _CLC3GLS1_LC3G2D4N 0x40
7824 #define _CLC3GLS1_D4N 0x40
7825 #define _CLC3GLS1_LC3G2D4T 0x80
7826 #define _CLC3GLS1_D4T 0x80
7828 //==============================================================================
7831 //==============================================================================
7834 extern __at(0x0F2C) __sfr CLC3GLS2
;
7840 unsigned LC3G3D1N
: 1;
7841 unsigned LC3G3D1T
: 1;
7842 unsigned LC3G3D2N
: 1;
7843 unsigned LC3G3D2T
: 1;
7844 unsigned LC3G3D3N
: 1;
7845 unsigned LC3G3D3T
: 1;
7846 unsigned LC3G3D4N
: 1;
7847 unsigned LC3G3D4T
: 1;
7863 extern __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
7865 #define _CLC3GLS2_LC3G3D1N 0x01
7866 #define _CLC3GLS2_D1N 0x01
7867 #define _CLC3GLS2_LC3G3D1T 0x02
7868 #define _CLC3GLS2_D1T 0x02
7869 #define _CLC3GLS2_LC3G3D2N 0x04
7870 #define _CLC3GLS2_D2N 0x04
7871 #define _CLC3GLS2_LC3G3D2T 0x08
7872 #define _CLC3GLS2_D2T 0x08
7873 #define _CLC3GLS2_LC3G3D3N 0x10
7874 #define _CLC3GLS2_D3N 0x10
7875 #define _CLC3GLS2_LC3G3D3T 0x20
7876 #define _CLC3GLS2_D3T 0x20
7877 #define _CLC3GLS2_LC3G3D4N 0x40
7878 #define _CLC3GLS2_D4N 0x40
7879 #define _CLC3GLS2_LC3G3D4T 0x80
7880 #define _CLC3GLS2_D4T 0x80
7882 //==============================================================================
7885 //==============================================================================
7888 extern __at(0x0F2D) __sfr CLC3GLS3
;
7894 unsigned LC3G4D1N
: 1;
7895 unsigned LC3G4D1T
: 1;
7896 unsigned LC3G4D2N
: 1;
7897 unsigned LC3G4D2T
: 1;
7898 unsigned LC3G4D3N
: 1;
7899 unsigned LC3G4D3T
: 1;
7900 unsigned LC3G4D4N
: 1;
7901 unsigned LC3G4D4T
: 1;
7917 extern __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
7919 #define _CLC3GLS3_LC3G4D1N 0x01
7920 #define _CLC3GLS3_G4D1N 0x01
7921 #define _CLC3GLS3_LC3G4D1T 0x02
7922 #define _CLC3GLS3_G4D1T 0x02
7923 #define _CLC3GLS3_LC3G4D2N 0x04
7924 #define _CLC3GLS3_G4D2N 0x04
7925 #define _CLC3GLS3_LC3G4D2T 0x08
7926 #define _CLC3GLS3_G4D2T 0x08
7927 #define _CLC3GLS3_LC3G4D3N 0x10
7928 #define _CLC3GLS3_G4D3N 0x10
7929 #define _CLC3GLS3_LC3G4D3T 0x20
7930 #define _CLC3GLS3_G4D3T 0x20
7931 #define _CLC3GLS3_LC3G4D4N 0x40
7932 #define _CLC3GLS3_G4D4N 0x40
7933 #define _CLC3GLS3_LC3G4D4T 0x80
7934 #define _CLC3GLS3_G4D4T 0x80
7936 //==============================================================================
7939 //==============================================================================
7942 extern __at(0x0F2E) __sfr CLC4CON
;
7948 unsigned LC4MODE0
: 1;
7949 unsigned LC4MODE1
: 1;
7950 unsigned LC4MODE2
: 1;
7951 unsigned LC4INTN
: 1;
7952 unsigned LC4INTP
: 1;
7953 unsigned LC4OUT
: 1;
7978 unsigned LC4MODE
: 3;
7983 extern __at(0x0F2E) volatile __CLC4CONbits_t CLC4CONbits
;
7985 #define _CLC4CON_LC4MODE0 0x01
7986 #define _CLC4CON_MODE0 0x01
7987 #define _CLC4CON_LC4MODE1 0x02
7988 #define _CLC4CON_MODE1 0x02
7989 #define _CLC4CON_LC4MODE2 0x04
7990 #define _CLC4CON_MODE2 0x04
7991 #define _CLC4CON_LC4INTN 0x08
7992 #define _CLC4CON_INTN 0x08
7993 #define _CLC4CON_LC4INTP 0x10
7994 #define _CLC4CON_INTP 0x10
7995 #define _CLC4CON_LC4OUT 0x20
7996 #define _CLC4CON_OUT 0x20
7997 #define _CLC4CON_LC4EN 0x80
7998 #define _CLC4CON_EN 0x80
8000 //==============================================================================
8003 //==============================================================================
8006 extern __at(0x0F2F) __sfr CLC4POL
;
8012 unsigned LC4G1POL
: 1;
8013 unsigned LC4G2POL
: 1;
8014 unsigned LC4G3POL
: 1;
8015 unsigned LC4G4POL
: 1;
8019 unsigned LC4POL
: 1;
8035 extern __at(0x0F2F) volatile __CLC4POLbits_t CLC4POLbits
;
8037 #define _CLC4POL_LC4G1POL 0x01
8038 #define _CLC4POL_G1POL 0x01
8039 #define _CLC4POL_LC4G2POL 0x02
8040 #define _CLC4POL_G2POL 0x02
8041 #define _CLC4POL_LC4G3POL 0x04
8042 #define _CLC4POL_G3POL 0x04
8043 #define _CLC4POL_LC4G4POL 0x08
8044 #define _CLC4POL_G4POL 0x08
8045 #define _CLC4POL_LC4POL 0x80
8046 #define _CLC4POL_POL 0x80
8048 //==============================================================================
8051 //==============================================================================
8054 extern __at(0x0F30) __sfr CLC4SEL0
;
8060 unsigned LC4D1S0
: 1;
8061 unsigned LC4D1S1
: 1;
8062 unsigned LC4D1S2
: 1;
8063 unsigned LC4D1S3
: 1;
8064 unsigned LC4D1S4
: 1;
8084 unsigned LC4D1S
: 5;
8095 extern __at(0x0F30) volatile __CLC4SEL0bits_t CLC4SEL0bits
;
8097 #define _CLC4SEL0_LC4D1S0 0x01
8098 #define _CLC4SEL0_D1S0 0x01
8099 #define _CLC4SEL0_LC4D1S1 0x02
8100 #define _CLC4SEL0_D1S1 0x02
8101 #define _CLC4SEL0_LC4D1S2 0x04
8102 #define _CLC4SEL0_D1S2 0x04
8103 #define _CLC4SEL0_LC4D1S3 0x08
8104 #define _CLC4SEL0_D1S3 0x08
8105 #define _CLC4SEL0_LC4D1S4 0x10
8106 #define _CLC4SEL0_D1S4 0x10
8108 //==============================================================================
8111 //==============================================================================
8114 extern __at(0x0F31) __sfr CLC4SEL1
;
8120 unsigned LC4D2S0
: 1;
8121 unsigned LC4D2S1
: 1;
8122 unsigned LC4D2S2
: 1;
8123 unsigned LC4D2S3
: 1;
8124 unsigned LC4D2S4
: 1;
8150 unsigned LC4D2S
: 5;
8155 extern __at(0x0F31) volatile __CLC4SEL1bits_t CLC4SEL1bits
;
8157 #define _CLC4SEL1_LC4D2S0 0x01
8158 #define _CLC4SEL1_D2S0 0x01
8159 #define _CLC4SEL1_LC4D2S1 0x02
8160 #define _CLC4SEL1_D2S1 0x02
8161 #define _CLC4SEL1_LC4D2S2 0x04
8162 #define _CLC4SEL1_D2S2 0x04
8163 #define _CLC4SEL1_LC4D2S3 0x08
8164 #define _CLC4SEL1_D2S3 0x08
8165 #define _CLC4SEL1_LC4D2S4 0x10
8166 #define _CLC4SEL1_D2S4 0x10
8168 //==============================================================================
8171 //==============================================================================
8174 extern __at(0x0F32) __sfr CLC4SEL2
;
8180 unsigned LC4D3S0
: 1;
8181 unsigned LC4D3S1
: 1;
8182 unsigned LC4D3S2
: 1;
8183 unsigned LC4D3S3
: 1;
8184 unsigned LC4D3S4
: 1;
8210 unsigned LC4D3S
: 5;
8215 extern __at(0x0F32) volatile __CLC4SEL2bits_t CLC4SEL2bits
;
8217 #define _CLC4SEL2_LC4D3S0 0x01
8218 #define _CLC4SEL2_D3S0 0x01
8219 #define _CLC4SEL2_LC4D3S1 0x02
8220 #define _CLC4SEL2_D3S1 0x02
8221 #define _CLC4SEL2_LC4D3S2 0x04
8222 #define _CLC4SEL2_D3S2 0x04
8223 #define _CLC4SEL2_LC4D3S3 0x08
8224 #define _CLC4SEL2_D3S3 0x08
8225 #define _CLC4SEL2_LC4D3S4 0x10
8226 #define _CLC4SEL2_D3S4 0x10
8228 //==============================================================================
8231 //==============================================================================
8234 extern __at(0x0F33) __sfr CLC4SEL3
;
8240 unsigned LC4D4S0
: 1;
8241 unsigned LC4D4S1
: 1;
8242 unsigned LC4D4S2
: 1;
8243 unsigned LC4D4S3
: 1;
8244 unsigned LC4D4S4
: 1;
8264 unsigned LC4D4S
: 5;
8275 extern __at(0x0F33) volatile __CLC4SEL3bits_t CLC4SEL3bits
;
8277 #define _CLC4SEL3_LC4D4S0 0x01
8278 #define _CLC4SEL3_D4S0 0x01
8279 #define _CLC4SEL3_LC4D4S1 0x02
8280 #define _CLC4SEL3_D4S1 0x02
8281 #define _CLC4SEL3_LC4D4S2 0x04
8282 #define _CLC4SEL3_D4S2 0x04
8283 #define _CLC4SEL3_LC4D4S3 0x08
8284 #define _CLC4SEL3_D4S3 0x08
8285 #define _CLC4SEL3_LC4D4S4 0x10
8286 #define _CLC4SEL3_D4S4 0x10
8288 //==============================================================================
8291 //==============================================================================
8294 extern __at(0x0F34) __sfr CLC4GLS0
;
8300 unsigned LC4G1D1N
: 1;
8301 unsigned LC4G1D1T
: 1;
8302 unsigned LC4G1D2N
: 1;
8303 unsigned LC4G1D2T
: 1;
8304 unsigned LC4G1D3N
: 1;
8305 unsigned LC4G1D3T
: 1;
8306 unsigned LC4G1D4N
: 1;
8307 unsigned LC4G1D4T
: 1;
8323 extern __at(0x0F34) volatile __CLC4GLS0bits_t CLC4GLS0bits
;
8325 #define _CLC4GLS0_LC4G1D1N 0x01
8326 #define _CLC4GLS0_D1N 0x01
8327 #define _CLC4GLS0_LC4G1D1T 0x02
8328 #define _CLC4GLS0_D1T 0x02
8329 #define _CLC4GLS0_LC4G1D2N 0x04
8330 #define _CLC4GLS0_D2N 0x04
8331 #define _CLC4GLS0_LC4G1D2T 0x08
8332 #define _CLC4GLS0_D2T 0x08
8333 #define _CLC4GLS0_LC4G1D3N 0x10
8334 #define _CLC4GLS0_D3N 0x10
8335 #define _CLC4GLS0_LC4G1D3T 0x20
8336 #define _CLC4GLS0_D3T 0x20
8337 #define _CLC4GLS0_LC4G1D4N 0x40
8338 #define _CLC4GLS0_D4N 0x40
8339 #define _CLC4GLS0_LC4G1D4T 0x80
8340 #define _CLC4GLS0_D4T 0x80
8342 //==============================================================================
8345 //==============================================================================
8348 extern __at(0x0F35) __sfr CLC4GLS1
;
8354 unsigned LC4G2D1N
: 1;
8355 unsigned LC4G2D1T
: 1;
8356 unsigned LC4G2D2N
: 1;
8357 unsigned LC4G2D2T
: 1;
8358 unsigned LC4G2D3N
: 1;
8359 unsigned LC4G2D3T
: 1;
8360 unsigned LC4G2D4N
: 1;
8361 unsigned LC4G2D4T
: 1;
8377 extern __at(0x0F35) volatile __CLC4GLS1bits_t CLC4GLS1bits
;
8379 #define _CLC4GLS1_LC4G2D1N 0x01
8380 #define _CLC4GLS1_D1N 0x01
8381 #define _CLC4GLS1_LC4G2D1T 0x02
8382 #define _CLC4GLS1_D1T 0x02
8383 #define _CLC4GLS1_LC4G2D2N 0x04
8384 #define _CLC4GLS1_D2N 0x04
8385 #define _CLC4GLS1_LC4G2D2T 0x08
8386 #define _CLC4GLS1_D2T 0x08
8387 #define _CLC4GLS1_LC4G2D3N 0x10
8388 #define _CLC4GLS1_D3N 0x10
8389 #define _CLC4GLS1_LC4G2D3T 0x20
8390 #define _CLC4GLS1_D3T 0x20
8391 #define _CLC4GLS1_LC4G2D4N 0x40
8392 #define _CLC4GLS1_D4N 0x40
8393 #define _CLC4GLS1_LC4G2D4T 0x80
8394 #define _CLC4GLS1_D4T 0x80
8396 //==============================================================================
8399 //==============================================================================
8402 extern __at(0x0F36) __sfr CLC4GLS2
;
8408 unsigned LC4G3D1N
: 1;
8409 unsigned LC4G3D1T
: 1;
8410 unsigned LC4G3D2N
: 1;
8411 unsigned LC4G3D2T
: 1;
8412 unsigned LC4G3D3N
: 1;
8413 unsigned LC4G3D3T
: 1;
8414 unsigned LC4G3D4N
: 1;
8415 unsigned LC4G3D4T
: 1;
8431 extern __at(0x0F36) volatile __CLC4GLS2bits_t CLC4GLS2bits
;
8433 #define _CLC4GLS2_LC4G3D1N 0x01
8434 #define _CLC4GLS2_D1N 0x01
8435 #define _CLC4GLS2_LC4G3D1T 0x02
8436 #define _CLC4GLS2_D1T 0x02
8437 #define _CLC4GLS2_LC4G3D2N 0x04
8438 #define _CLC4GLS2_D2N 0x04
8439 #define _CLC4GLS2_LC4G3D2T 0x08
8440 #define _CLC4GLS2_D2T 0x08
8441 #define _CLC4GLS2_LC4G3D3N 0x10
8442 #define _CLC4GLS2_D3N 0x10
8443 #define _CLC4GLS2_LC4G3D3T 0x20
8444 #define _CLC4GLS2_D3T 0x20
8445 #define _CLC4GLS2_LC4G3D4N 0x40
8446 #define _CLC4GLS2_D4N 0x40
8447 #define _CLC4GLS2_LC4G3D4T 0x80
8448 #define _CLC4GLS2_D4T 0x80
8450 //==============================================================================
8453 //==============================================================================
8456 extern __at(0x0F37) __sfr CLC4GLS3
;
8462 unsigned LC4G4D1N
: 1;
8463 unsigned LC4G4D1T
: 1;
8464 unsigned LC4G4D2N
: 1;
8465 unsigned LC4G4D2T
: 1;
8466 unsigned LC4G4D3N
: 1;
8467 unsigned LC4G4D3T
: 1;
8468 unsigned LC4G4D4N
: 1;
8469 unsigned LC4G4D4T
: 1;
8485 extern __at(0x0F37) volatile __CLC4GLS3bits_t CLC4GLS3bits
;
8487 #define _CLC4GLS3_LC4G4D1N 0x01
8488 #define _CLC4GLS3_G4D1N 0x01
8489 #define _CLC4GLS3_LC4G4D1T 0x02
8490 #define _CLC4GLS3_G4D1T 0x02
8491 #define _CLC4GLS3_LC4G4D2N 0x04
8492 #define _CLC4GLS3_G4D2N 0x04
8493 #define _CLC4GLS3_LC4G4D2T 0x08
8494 #define _CLC4GLS3_G4D2T 0x08
8495 #define _CLC4GLS3_LC4G4D3N 0x10
8496 #define _CLC4GLS3_G4D3N 0x10
8497 #define _CLC4GLS3_LC4G4D3T 0x20
8498 #define _CLC4GLS3_G4D3T 0x20
8499 #define _CLC4GLS3_LC4G4D4N 0x40
8500 #define _CLC4GLS3_G4D4N 0x40
8501 #define _CLC4GLS3_LC4G4D4T 0x80
8502 #define _CLC4GLS3_G4D4T 0x80
8504 //==============================================================================
8507 //==============================================================================
8510 extern __at(0x0FE4) __sfr STATUS_SHAD
;
8514 unsigned C_SHAD
: 1;
8515 unsigned DC_SHAD
: 1;
8516 unsigned Z_SHAD
: 1;
8522 } __STATUS_SHADbits_t
;
8524 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
8526 #define _C_SHAD 0x01
8527 #define _DC_SHAD 0x02
8528 #define _Z_SHAD 0x04
8530 //==============================================================================
8532 extern __at(0x0FE5) __sfr WREG_SHAD
;
8533 extern __at(0x0FE6) __sfr BSR_SHAD
;
8534 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
8535 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
8536 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
8537 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
8538 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
8539 extern __at(0x0FED) __sfr STKPTR
;
8540 extern __at(0x0FEE) __sfr TOSL
;
8541 extern __at(0x0FEF) __sfr TOSH
;
8543 //==============================================================================
8545 // Configuration Bits
8547 //==============================================================================
8549 #define _CONFIG1 0x8007
8550 #define _CONFIG2 0x8008
8552 //----------------------------- CONFIG1 Options -------------------------------
8554 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
8555 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
8556 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
8557 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
8558 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
8559 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins.
8560 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins.
8561 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins.
8562 #define _WDTE_OFF 0x3FE7 // WDT disabled.
8563 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
8564 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
8565 #define _WDTE_ON 0x3FFF // WDT enabled.
8566 #define _PWRTE_ON 0x3FDF // PWRT enabled.
8567 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
8568 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input if LVP bit is also 0.
8569 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
8570 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
8571 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
8572 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
8573 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
8574 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
8575 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
8576 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
8577 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
8578 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled.
8579 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled.
8580 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
8581 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
8583 //----------------------------- CONFIG2 Options -------------------------------
8585 #define _WRT_ALL 0x3FFC // 0000h to 1FFFh write protected, no addresses may be modified by EECON control.
8586 #define _WRT_HALF 0x3FFD // 0000h to 0FFFh write protected, 1000h to 1FFFh may be modified by EECON control.
8587 #define _WRT_BOOT 0x3FFE // 0000h to 03FFh write protected, 0400h to 1FFFh may be modified by EECON control.
8588 #define _WRT_OFF 0x3FFF // Write protection off.
8589 #define _PPS1WAY_OFF 0x3FFB // The PPSLOCK bit can be set and cleared repeatedly by software.
8590 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit cannot be cleared once it is set by software.
8591 #define _ZCDDIS_OFF 0x3F7F // Zero-cross detect circuit is always enabled.
8592 #define _ZCDDIS_ON 0x3FFF // Zero-cross detect circuit is disabled at POR and can be enabled with ZCDSEN bit.
8593 #define _PLLEN_OFF 0x3EFF // 4x PLL is enabled when software sets the SPLLEN bit.
8594 #define _PLLEN_ON 0x3FFF // 4x PLL is always enabled.
8595 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
8596 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
8597 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
8598 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
8599 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
8600 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
8601 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
8602 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
8603 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
8604 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
8606 //==============================================================================
8608 #define _DEVID1 0x8006
8610 #define _IDLOC0 0x8000
8611 #define _IDLOC1 0x8001
8612 #define _IDLOC2 0x8002
8613 #define _IDLOC3 0x8003
8615 //==============================================================================
8617 #ifndef NO_BIT_DEFINES
8619 #define ADON ADCON0bits.ADON // bit 0
8620 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
8621 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
8622 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
8623 #define CHS0 ADCON0bits.CHS0 // bit 2
8624 #define CHS1 ADCON0bits.CHS1 // bit 3
8625 #define CHS2 ADCON0bits.CHS2 // bit 4
8626 #define CHS3 ADCON0bits.CHS3 // bit 5
8627 #define CHS4 ADCON0bits.CHS4 // bit 6
8629 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
8630 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
8631 #define ADNREF ADCON1bits.ADNREF // bit 2
8632 #define ADFM ADCON1bits.ADFM // bit 7
8634 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4
8635 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5
8636 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6
8637 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7
8639 #define ANSA0 ANSELAbits.ANSA0 // bit 0
8640 #define ANSA1 ANSELAbits.ANSA1 // bit 1
8641 #define ANSA2 ANSELAbits.ANSA2 // bit 2
8642 #define ANSA3 ANSELAbits.ANSA3 // bit 3
8643 #define ANSA4 ANSELAbits.ANSA4 // bit 4
8644 #define ANSA5 ANSELAbits.ANSA5 // bit 5
8646 #define ANSB0 ANSELBbits.ANSB0 // bit 0
8647 #define ANSB1 ANSELBbits.ANSB1 // bit 1
8648 #define ANSB2 ANSELBbits.ANSB2 // bit 2
8649 #define ANSB3 ANSELBbits.ANSB3 // bit 3
8650 #define ANSB4 ANSELBbits.ANSB4 // bit 4
8651 #define ANSB5 ANSELBbits.ANSB5 // bit 5
8653 #define ANSC2 ANSELCbits.ANSC2 // bit 2
8654 #define ANSC3 ANSELCbits.ANSC3 // bit 3
8655 #define ANSC4 ANSELCbits.ANSC4 // bit 4
8656 #define ANSC5 ANSELCbits.ANSC5 // bit 5
8657 #define ANSC6 ANSELCbits.ANSC6 // bit 6
8658 #define ANSC7 ANSELCbits.ANSC7 // bit 7
8660 #define ANSD0 ANSELDbits.ANSD0 // bit 0
8661 #define ANSD1 ANSELDbits.ANSD1 // bit 1
8662 #define ANSD2 ANSELDbits.ANSD2 // bit 2
8663 #define ANSD3 ANSELDbits.ANSD3 // bit 3
8664 #define ANSD4 ANSELDbits.ANSD4 // bit 4
8665 #define ANSD5 ANSELDbits.ANSD5 // bit 5
8666 #define ANSD6 ANSELDbits.ANSD6 // bit 6
8667 #define ANSD7 ANSELDbits.ANSD7 // bit 7
8669 #define ANSE0 ANSELEbits.ANSE0 // bit 0
8670 #define ANSE1 ANSELEbits.ANSE1 // bit 1
8671 #define ANSE2 ANSELEbits.ANSE2 // bit 2
8673 #define ABDEN BAUD1CONbits.ABDEN // bit 0
8674 #define WUE BAUD1CONbits.WUE // bit 1
8675 #define BRG16 BAUD1CONbits.BRG16 // bit 3
8676 #define SCKP BAUD1CONbits.SCKP // bit 4
8677 #define RCIDL BAUD1CONbits.RCIDL // bit 6
8678 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
8680 #define BORRDY BORCONbits.BORRDY // bit 0
8681 #define BORFS BORCONbits.BORFS // bit 6
8682 #define SBOREN BORCONbits.SBOREN // bit 7
8684 #define BSR0 BSRbits.BSR0 // bit 0
8685 #define BSR1 BSRbits.BSR1 // bit 1
8686 #define BSR2 BSRbits.BSR2 // bit 2
8687 #define BSR3 BSRbits.BSR3 // bit 3
8688 #define BSR4 BSRbits.BSR4 // bit 4
8690 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
8691 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
8692 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
8693 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
8694 #define DC1B0 CCP1CONbits.DC1B0 // bit 4, shadows bit in CCP1CONbits
8695 #define CCP1Y CCP1CONbits.CCP1Y // bit 4, shadows bit in CCP1CONbits
8696 #define DC1B1 CCP1CONbits.DC1B1 // bit 5, shadows bit in CCP1CONbits
8697 #define CCP1X CCP1CONbits.CCP1X // bit 5, shadows bit in CCP1CONbits
8699 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
8700 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
8701 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
8702 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
8703 #define DC2B0 CCP2CONbits.DC2B0 // bit 4, shadows bit in CCP2CONbits
8704 #define CCP2Y CCP2CONbits.CCP2Y // bit 4, shadows bit in CCP2CONbits
8705 #define DC2B1 CCP2CONbits.DC2B1 // bit 5, shadows bit in CCP2CONbits
8706 #define CCP2X CCP2CONbits.CCP2X // bit 5, shadows bit in CCP2CONbits
8708 #define C1TSEL0 CCPTMRSbits.C1TSEL0 // bit 0
8709 #define C1TSEL1 CCPTMRSbits.C1TSEL1 // bit 1
8710 #define C2TSEL0 CCPTMRSbits.C2TSEL0 // bit 2
8711 #define C2TSEL1 CCPTMRSbits.C2TSEL1 // bit 3
8712 #define P3TSEL0 CCPTMRSbits.P3TSEL0 // bit 4
8713 #define P3TSEL1 CCPTMRSbits.P3TSEL1 // bit 5
8714 #define P4TSEL0 CCPTMRSbits.P4TSEL0 // bit 6
8715 #define P4TSEL1 CCPTMRSbits.P4TSEL1 // bit 7
8717 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits
8718 #define MODE0 CLC1CONbits.MODE0 // bit 0, shadows bit in CLC1CONbits
8719 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits
8720 #define MODE1 CLC1CONbits.MODE1 // bit 1, shadows bit in CLC1CONbits
8721 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits
8722 #define MODE2 CLC1CONbits.MODE2 // bit 2, shadows bit in CLC1CONbits
8723 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits
8724 #define INTN CLC1CONbits.INTN // bit 3, shadows bit in CLC1CONbits
8725 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits
8726 #define INTP CLC1CONbits.INTP // bit 4, shadows bit in CLC1CONbits
8727 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits
8728 #define OUT CLC1CONbits.OUT // bit 5, shadows bit in CLC1CONbits
8729 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits
8730 #define EN CLC1CONbits.EN // bit 7, shadows bit in CLC1CONbits
8732 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
8733 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
8734 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
8735 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
8736 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
8737 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
8738 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
8739 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
8740 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
8741 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
8742 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
8743 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
8744 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
8745 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
8746 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
8747 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
8749 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
8750 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
8751 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
8752 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
8753 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
8754 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
8755 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
8756 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
8757 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
8758 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
8759 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
8760 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
8761 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
8762 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
8763 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
8764 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
8766 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
8767 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
8768 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
8769 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
8770 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
8771 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
8772 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
8773 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
8774 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
8775 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
8777 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
8778 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
8779 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
8780 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
8781 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
8782 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
8783 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
8784 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
8785 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
8786 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
8788 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
8789 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
8790 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
8791 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
8792 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
8793 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
8794 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
8795 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
8796 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
8797 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
8799 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
8800 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
8801 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
8802 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
8803 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
8804 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
8805 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
8806 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
8807 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
8808 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
8810 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
8811 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
8812 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
8813 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
8814 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
8815 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
8816 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
8817 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
8818 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
8819 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
8821 #define MLC1OUT CLCDATAbits.MLC1OUT // bit 0, shadows bit in CLCDATAbits
8822 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0, shadows bit in CLCDATAbits
8823 #define MLC2OUT CLCDATAbits.MLC2OUT // bit 1, shadows bit in CLCDATAbits
8824 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1, shadows bit in CLCDATAbits
8825 #define MLC3OUT CLCDATAbits.MLC3OUT // bit 2, shadows bit in CLCDATAbits
8826 #define MCLC3OUT CLCDATAbits.MCLC3OUT // bit 2, shadows bit in CLCDATAbits
8827 #define MLC4OUT CLCDATAbits.MLC4OUT // bit 3, shadows bit in CLCDATAbits
8828 #define MCLC4OUT CLCDATAbits.MCLC4OUT // bit 3, shadows bit in CLCDATAbits
8830 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
8831 #define C1HYS CM1CON0bits.C1HYS // bit 1
8832 #define C1SP CM1CON0bits.C1SP // bit 2
8833 #define C1ZLF CM1CON0bits.C1ZLF // bit 3
8834 #define C1POL CM1CON0bits.C1POL // bit 4
8835 #define C1OUT CM1CON0bits.C1OUT // bit 6
8836 #define C1ON CM1CON0bits.C1ON // bit 7
8838 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
8839 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
8840 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2
8841 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 3
8842 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 4
8843 #define C1PCH2 CM1CON1bits.C1PCH2 // bit 5
8844 #define C1INTN CM1CON1bits.C1INTN // bit 6
8845 #define C1INTP CM1CON1bits.C1INTP // bit 7
8847 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
8848 #define C2HYS CM2CON0bits.C2HYS // bit 1
8849 #define C2SP CM2CON0bits.C2SP // bit 2
8850 #define C2ZLF CM2CON0bits.C2ZLF // bit 3
8851 #define C2POL CM2CON0bits.C2POL // bit 4
8852 #define C2OUT CM2CON0bits.C2OUT // bit 6
8853 #define C2ON CM2CON0bits.C2ON // bit 7
8855 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
8856 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
8857 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2
8858 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 3
8859 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 4
8860 #define C2PCH2 CM2CON1bits.C2PCH2 // bit 5
8861 #define C2INTN CM2CON1bits.C2INTN // bit 6
8862 #define C2INTP CM2CON1bits.C2INTP // bit 7
8864 #define MC1OUT CMOUTbits.MC1OUT // bit 0
8865 #define MC2OUT CMOUTbits.MC2OUT // bit 1
8867 #define G1ASDAC0 COG1ASD0bits.G1ASDAC0 // bit 2
8868 #define G1ASDAC1 COG1ASD0bits.G1ASDAC1 // bit 3
8869 #define G1ASDBD0 COG1ASD0bits.G1ASDBD0 // bit 4
8870 #define G1ASDBD1 COG1ASD0bits.G1ASDBD1 // bit 5
8871 #define G1ARSEN COG1ASD0bits.G1ARSEN // bit 6
8872 #define G1ASE COG1ASD0bits.G1ASE // bit 7
8874 #define G1AS0E COG1ASD1bits.G1AS0E // bit 0
8875 #define G1AS1E COG1ASD1bits.G1AS1E // bit 1
8876 #define G1AS2E COG1ASD1bits.G1AS2E // bit 2
8877 #define G1AS3E COG1ASD1bits.G1AS3E // bit 3
8879 #define G1BLKF0 COG1BLKFbits.G1BLKF0 // bit 0
8880 #define G1BLKF1 COG1BLKFbits.G1BLKF1 // bit 1
8881 #define G1BLKF2 COG1BLKFbits.G1BLKF2 // bit 2
8882 #define G1BLKF3 COG1BLKFbits.G1BLKF3 // bit 3
8883 #define G1BLKF4 COG1BLKFbits.G1BLKF4 // bit 4
8884 #define G1BLKF5 COG1BLKFbits.G1BLKF5 // bit 5
8886 #define G1BLKR0 COG1BLKRbits.G1BLKR0 // bit 0
8887 #define G1BLKR1 COG1BLKRbits.G1BLKR1 // bit 1
8888 #define G1BLKR2 COG1BLKRbits.G1BLKR2 // bit 2
8889 #define G1BLKR3 COG1BLKRbits.G1BLKR3 // bit 3
8890 #define G1BLKR4 COG1BLKRbits.G1BLKR4 // bit 4
8891 #define G1BLKR5 COG1BLKRbits.G1BLKR5 // bit 5
8893 #define G1MD0 COG1CON0bits.G1MD0 // bit 0
8894 #define G1MD1 COG1CON0bits.G1MD1 // bit 1
8895 #define G1MD2 COG1CON0bits.G1MD2 // bit 2
8896 #define G1CS0 COG1CON0bits.G1CS0 // bit 3
8897 #define G1CS1 COG1CON0bits.G1CS1 // bit 4
8898 #define G1LD COG1CON0bits.G1LD // bit 6
8899 #define G1EN COG1CON0bits.G1EN // bit 7
8901 #define G1POLA COG1CON1bits.G1POLA // bit 0
8902 #define G1POLB COG1CON1bits.G1POLB // bit 1
8903 #define G1POLC COG1CON1bits.G1POLC // bit 2
8904 #define G1POLD COG1CON1bits.G1POLD // bit 3
8905 #define G1FDBS COG1CON1bits.G1FDBS // bit 6
8906 #define G1RDBS COG1CON1bits.G1RDBS // bit 7
8908 #define G1DBF0 COG1DBFbits.G1DBF0 // bit 0
8909 #define G1DBF1 COG1DBFbits.G1DBF1 // bit 1
8910 #define G1DBF2 COG1DBFbits.G1DBF2 // bit 2
8911 #define G1DBF3 COG1DBFbits.G1DBF3 // bit 3
8912 #define G1DBF4 COG1DBFbits.G1DBF4 // bit 4
8913 #define G1DBF5 COG1DBFbits.G1DBF5 // bit 5
8915 #define G1DBR0 COG1DBRbits.G1DBR0 // bit 0
8916 #define G1DBR1 COG1DBRbits.G1DBR1 // bit 1
8917 #define G1DBR2 COG1DBRbits.G1DBR2 // bit 2
8918 #define G1DBR3 COG1DBRbits.G1DBR3 // bit 3
8919 #define G1DBR4 COG1DBRbits.G1DBR4 // bit 4
8920 #define G1DBR5 COG1DBRbits.G1DBR5 // bit 5
8922 #define G1FIS0 COG1FISbits.G1FIS0 // bit 0
8923 #define G1FIS1 COG1FISbits.G1FIS1 // bit 1
8924 #define G1FIS2 COG1FISbits.G1FIS2 // bit 2
8925 #define G1FIS3 COG1FISbits.G1FIS3 // bit 3
8926 #define G1FIS4 COG1FISbits.G1FIS4 // bit 4
8927 #define G1FIS5 COG1FISbits.G1FIS5 // bit 5
8928 #define G1FIS6 COG1FISbits.G1FIS6 // bit 6
8929 #define G1FIS7 COG1FISbits.G1FIS7 // bit 7
8931 #define G1FSIM0 COG1FSIMbits.G1FSIM0 // bit 0
8932 #define G1FSIM1 COG1FSIMbits.G1FSIM1 // bit 1
8933 #define G1FSIM2 COG1FSIMbits.G1FSIM2 // bit 2
8934 #define G1FSIM3 COG1FSIMbits.G1FSIM3 // bit 3
8935 #define G1FSIM4 COG1FSIMbits.G1FSIM4 // bit 4
8936 #define G1FSIM5 COG1FSIMbits.G1FSIM5 // bit 5
8937 #define G1FSIM6 COG1FSIMbits.G1FSIM6 // bit 6
8938 #define G1FSIM7 COG1FSIMbits.G1FSIM7 // bit 7
8940 #define G1PHF0 COG1PHFbits.G1PHF0 // bit 0
8941 #define G1PHF1 COG1PHFbits.G1PHF1 // bit 1
8942 #define G1PHF2 COG1PHFbits.G1PHF2 // bit 2
8943 #define G1PHF3 COG1PHFbits.G1PHF3 // bit 3
8944 #define G1PHF4 COG1PHFbits.G1PHF4 // bit 4
8945 #define G1PHF5 COG1PHFbits.G1PHF5 // bit 5
8947 #define G1PHR0 COG1PHRbits.G1PHR0 // bit 0
8948 #define G1PHR1 COG1PHRbits.G1PHR1 // bit 1
8949 #define G1PHR2 COG1PHRbits.G1PHR2 // bit 2
8950 #define G1PHR3 COG1PHRbits.G1PHR3 // bit 3
8951 #define G1PHR4 COG1PHRbits.G1PHR4 // bit 4
8952 #define G1PHR5 COG1PHRbits.G1PHR5 // bit 5
8954 #define G1RIS0 COG1RISbits.G1RIS0 // bit 0
8955 #define G1RIS1 COG1RISbits.G1RIS1 // bit 1
8956 #define G1RIS2 COG1RISbits.G1RIS2 // bit 2
8957 #define G1RIS3 COG1RISbits.G1RIS3 // bit 3
8958 #define G1RIS4 COG1RISbits.G1RIS4 // bit 4
8959 #define G1RIS5 COG1RISbits.G1RIS5 // bit 5
8960 #define G1RIS6 COG1RISbits.G1RIS6 // bit 6
8961 #define G1RIS7 COG1RISbits.G1RIS7 // bit 7
8963 #define G1RSIM0 COG1RSIMbits.G1RSIM0 // bit 0
8964 #define G1RSIM1 COG1RSIMbits.G1RSIM1 // bit 1
8965 #define G1RSIM2 COG1RSIMbits.G1RSIM2 // bit 2
8966 #define G1RSIM3 COG1RSIMbits.G1RSIM3 // bit 3
8967 #define G1RSIM4 COG1RSIMbits.G1RSIM4 // bit 4
8968 #define G1RSIM5 COG1RSIMbits.G1RSIM5 // bit 5
8969 #define G1RSIM6 COG1RSIMbits.G1RSIM6 // bit 6
8970 #define G1RSIM7 COG1RSIMbits.G1RSIM7 // bit 7
8972 #define G1STRA COG1STRbits.G1STRA // bit 0
8973 #define G1STRB COG1STRbits.G1STRB // bit 1
8974 #define G1STRC COG1STRbits.G1STRC // bit 2
8975 #define G1STRD COG1STRbits.G1STRD // bit 3
8976 #define G1SDATA COG1STRbits.G1SDATA // bit 4
8977 #define G1SDATB COG1STRbits.G1SDATB // bit 5
8978 #define G1SDATC COG1STRbits.G1SDATC // bit 6
8979 #define G1SDATD COG1STRbits.G1SDATD // bit 7
8981 #define DAC1NSS DAC1CON0bits.DAC1NSS // bit 0, shadows bit in DAC1CON0bits
8982 #define DACNSS DAC1CON0bits.DACNSS // bit 0, shadows bit in DAC1CON0bits
8983 #define DAC1PSS0 DAC1CON0bits.DAC1PSS0 // bit 2, shadows bit in DAC1CON0bits
8984 #define DACPSS0 DAC1CON0bits.DACPSS0 // bit 2, shadows bit in DAC1CON0bits
8985 #define DAC1PSS1 DAC1CON0bits.DAC1PSS1 // bit 3, shadows bit in DAC1CON0bits
8986 #define DACPSS1 DAC1CON0bits.DACPSS1 // bit 3, shadows bit in DAC1CON0bits
8987 #define DAC1OE2 DAC1CON0bits.DAC1OE2 // bit 4, shadows bit in DAC1CON0bits
8988 #define DACOE0 DAC1CON0bits.DACOE0 // bit 4, shadows bit in DAC1CON0bits
8989 #define DAC1OE1 DAC1CON0bits.DAC1OE1 // bit 5, shadows bit in DAC1CON0bits
8990 #define DACOE1 DAC1CON0bits.DACOE1 // bit 5, shadows bit in DAC1CON0bits
8991 #define DAC1EN DAC1CON0bits.DAC1EN // bit 7, shadows bit in DAC1CON0bits
8992 #define DACEN DAC1CON0bits.DACEN // bit 7, shadows bit in DAC1CON0bits
8994 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0, shadows bit in DAC1CON1bits
8995 #define DACR0 DAC1CON1bits.DACR0 // bit 0, shadows bit in DAC1CON1bits
8996 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1, shadows bit in DAC1CON1bits
8997 #define DACR1 DAC1CON1bits.DACR1 // bit 1, shadows bit in DAC1CON1bits
8998 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2, shadows bit in DAC1CON1bits
8999 #define DACR2 DAC1CON1bits.DACR2 // bit 2, shadows bit in DAC1CON1bits
9000 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3, shadows bit in DAC1CON1bits
9001 #define DACR3 DAC1CON1bits.DACR3 // bit 3, shadows bit in DAC1CON1bits
9002 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4, shadows bit in DAC1CON1bits
9003 #define DACR4 DAC1CON1bits.DACR4 // bit 4, shadows bit in DAC1CON1bits
9004 #define DAC1R5 DAC1CON1bits.DAC1R5 // bit 5, shadows bit in DAC1CON1bits
9005 #define DACR5 DAC1CON1bits.DACR5 // bit 5, shadows bit in DAC1CON1bits
9006 #define DAC1R6 DAC1CON1bits.DAC1R6 // bit 6, shadows bit in DAC1CON1bits
9007 #define DACR6 DAC1CON1bits.DACR6 // bit 6, shadows bit in DAC1CON1bits
9008 #define DAC1R7 DAC1CON1bits.DAC1R7 // bit 7, shadows bit in DAC1CON1bits
9009 #define DACR7 DAC1CON1bits.DACR7 // bit 7, shadows bit in DAC1CON1bits
9011 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
9012 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
9013 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
9014 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
9015 #define TSRNG FVRCONbits.TSRNG // bit 4
9016 #define TSEN FVRCONbits.TSEN // bit 5
9017 #define FVRRDY FVRCONbits.FVRRDY // bit 6
9018 #define FVREN FVRCONbits.FVREN // bit 7
9020 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
9021 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
9022 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
9023 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
9024 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
9025 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
9026 #define INLVLA6 INLVLAbits.INLVLA6 // bit 6
9027 #define INLVLA7 INLVLAbits.INLVLA7 // bit 7
9029 #define INLVLB0 INLVLBbits.INLVLB0 // bit 0
9030 #define INLVLB1 INLVLBbits.INLVLB1 // bit 1
9031 #define INLVLB2 INLVLBbits.INLVLB2 // bit 2
9032 #define INLVLB3 INLVLBbits.INLVLB3 // bit 3
9033 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
9034 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
9035 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
9036 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
9038 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
9039 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
9040 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
9041 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
9042 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
9043 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
9044 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
9045 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
9047 #define INLVLD0 INLVLDbits.INLVLD0 // bit 0
9048 #define INLVLD1 INLVLDbits.INLVLD1 // bit 1
9049 #define INLVLD2 INLVLDbits.INLVLD2 // bit 2
9050 #define INLVLD3 INLVLDbits.INLVLD3 // bit 3
9051 #define INLVLD4 INLVLDbits.INLVLD4 // bit 4
9052 #define INLVLD5 INLVLDbits.INLVLD5 // bit 5
9053 #define INLVLD6 INLVLDbits.INLVLD6 // bit 6
9054 #define INLVLD7 INLVLDbits.INLVLD7 // bit 7
9056 #define INLVLE0 INLVLEbits.INLVLE0 // bit 0
9057 #define INLVLE1 INLVLEbits.INLVLE1 // bit 1
9058 #define INLVLE2 INLVLEbits.INLVLE2 // bit 2
9059 #define INLVLE3 INLVLEbits.INLVLE3 // bit 3
9061 #define IOCIF INTCONbits.IOCIF // bit 0
9062 #define INTF INTCONbits.INTF // bit 1
9063 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
9064 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
9065 #define IOCIE INTCONbits.IOCIE // bit 3
9066 #define INTE INTCONbits.INTE // bit 4
9067 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
9068 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
9069 #define PEIE INTCONbits.PEIE // bit 6
9070 #define GIE INTCONbits.GIE // bit 7
9072 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
9073 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
9074 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
9075 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
9076 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
9077 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
9078 #define IOCAF6 IOCAFbits.IOCAF6 // bit 6
9079 #define IOCAF7 IOCAFbits.IOCAF7 // bit 7
9081 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
9082 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
9083 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
9084 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
9085 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
9086 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
9087 #define IOCAN6 IOCANbits.IOCAN6 // bit 6
9088 #define IOCAN7 IOCANbits.IOCAN7 // bit 7
9090 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
9091 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
9092 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
9093 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
9094 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
9095 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
9096 #define IOCAP6 IOCAPbits.IOCAP6 // bit 6
9097 #define IOCAP7 IOCAPbits.IOCAP7 // bit 7
9099 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
9100 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
9101 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
9102 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
9103 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
9104 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
9105 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
9106 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
9108 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
9109 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
9110 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
9111 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
9112 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
9113 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
9114 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
9115 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
9117 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
9118 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
9119 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
9120 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
9121 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
9122 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
9123 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
9124 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
9126 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
9127 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
9128 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
9129 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
9130 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
9131 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
9132 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
9133 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
9135 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
9136 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
9137 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
9138 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
9139 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
9140 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
9141 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
9142 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
9144 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
9145 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
9146 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
9147 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
9148 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
9149 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
9150 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
9151 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
9153 #define IOCEF3 IOCEFbits.IOCEF3 // bit 3
9155 #define IOCEN3 IOCENbits.IOCEN3 // bit 3
9157 #define IOCEP3 IOCEPbits.IOCEP3 // bit 3
9159 #define LATA0 LATAbits.LATA0 // bit 0
9160 #define LATA1 LATAbits.LATA1 // bit 1
9161 #define LATA2 LATAbits.LATA2 // bit 2
9162 #define LATA3 LATAbits.LATA3 // bit 3
9163 #define LATA4 LATAbits.LATA4 // bit 4
9164 #define LATA5 LATAbits.LATA5 // bit 5
9165 #define LATA6 LATAbits.LATA6 // bit 6
9166 #define LATA7 LATAbits.LATA7 // bit 7
9168 #define LATB0 LATBbits.LATB0 // bit 0
9169 #define LATB1 LATBbits.LATB1 // bit 1
9170 #define LATB2 LATBbits.LATB2 // bit 2
9171 #define LATB3 LATBbits.LATB3 // bit 3
9172 #define LATB4 LATBbits.LATB4 // bit 4
9173 #define LATB5 LATBbits.LATB5 // bit 5
9174 #define LATB6 LATBbits.LATB6 // bit 6
9175 #define LATB7 LATBbits.LATB7 // bit 7
9177 #define LATC0 LATCbits.LATC0 // bit 0
9178 #define LATC1 LATCbits.LATC1 // bit 1
9179 #define LATC2 LATCbits.LATC2 // bit 2
9180 #define LATC3 LATCbits.LATC3 // bit 3
9181 #define LATC4 LATCbits.LATC4 // bit 4
9182 #define LATC5 LATCbits.LATC5 // bit 5
9183 #define LATC6 LATCbits.LATC6 // bit 6
9184 #define LATC7 LATCbits.LATC7 // bit 7
9186 #define LATD0 LATDbits.LATD0 // bit 0
9187 #define LATD1 LATDbits.LATD1 // bit 1
9188 #define LATD2 LATDbits.LATD2 // bit 2
9189 #define LATD3 LATDbits.LATD3 // bit 3
9190 #define LATD4 LATDbits.LATD4 // bit 4
9191 #define LATD5 LATDbits.LATD5 // bit 5
9192 #define LATD6 LATDbits.LATD6 // bit 6
9193 #define LATD7 LATDbits.LATD7 // bit 7
9195 #define LATE0 LATEbits.LATE0 // bit 0
9196 #define LATE1 LATEbits.LATE1 // bit 1
9197 #define LATE2 LATEbits.LATE2 // bit 2
9199 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
9200 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
9201 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
9202 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
9203 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
9204 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
9205 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
9206 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
9208 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
9209 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
9210 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
9211 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
9212 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
9213 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
9214 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
9215 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
9217 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
9218 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
9219 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
9220 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
9222 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
9223 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
9224 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
9225 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
9226 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
9228 #define N1PFM NCO1CONbits.N1PFM // bit 0
9229 #define N1POL NCO1CONbits.N1POL // bit 4
9230 #define N1OUT NCO1CONbits.N1OUT // bit 5
9231 #define N1EN NCO1CONbits.N1EN // bit 7
9233 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
9234 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
9235 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
9236 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
9237 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
9238 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
9239 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
9240 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
9242 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
9243 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
9244 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
9245 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
9246 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
9247 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
9248 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
9249 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
9251 #define NCO1INC16 NCO1INCUbits.NCO1INC16 // bit 0
9252 #define NCO1INC17 NCO1INCUbits.NCO1INC17 // bit 1
9253 #define NCO1INC18 NCO1INCUbits.NCO1INC18 // bit 2
9254 #define NCO1INC19 NCO1INCUbits.NCO1INC19 // bit 3
9256 #define ODA0 ODCONAbits.ODA0 // bit 0
9257 #define ODA1 ODCONAbits.ODA1 // bit 1
9258 #define ODA2 ODCONAbits.ODA2 // bit 2
9259 #define ODA3 ODCONAbits.ODA3 // bit 3
9260 #define ODA4 ODCONAbits.ODA4 // bit 4
9261 #define ODA5 ODCONAbits.ODA5 // bit 5
9262 #define ODA6 ODCONAbits.ODA6 // bit 6
9263 #define ODA7 ODCONAbits.ODA7 // bit 7
9265 #define ODB0 ODCONBbits.ODB0 // bit 0
9266 #define ODB1 ODCONBbits.ODB1 // bit 1
9267 #define ODB2 ODCONBbits.ODB2 // bit 2
9268 #define ODB3 ODCONBbits.ODB3 // bit 3
9269 #define ODB4 ODCONBbits.ODB4 // bit 4
9270 #define ODB5 ODCONBbits.ODB5 // bit 5
9271 #define ODB6 ODCONBbits.ODB6 // bit 6
9272 #define ODB7 ODCONBbits.ODB7 // bit 7
9274 #define ODC0 ODCONCbits.ODC0 // bit 0
9275 #define ODC1 ODCONCbits.ODC1 // bit 1
9276 #define ODC2 ODCONCbits.ODC2 // bit 2
9277 #define ODC3 ODCONCbits.ODC3 // bit 3
9278 #define ODC4 ODCONCbits.ODC4 // bit 4
9279 #define ODC5 ODCONCbits.ODC5 // bit 5
9280 #define ODC6 ODCONCbits.ODC6 // bit 6
9281 #define ODC7 ODCONCbits.ODC7 // bit 7
9283 #define ODD0 ODCONDbits.ODD0 // bit 0
9284 #define ODD1 ODCONDbits.ODD1 // bit 1
9285 #define ODD2 ODCONDbits.ODD2 // bit 2
9286 #define ODD3 ODCONDbits.ODD3 // bit 3
9287 #define ODD4 ODCONDbits.ODD4 // bit 4
9288 #define ODD5 ODCONDbits.ODD5 // bit 5
9289 #define ODD6 ODCONDbits.ODD6 // bit 6
9290 #define ODD7 ODCONDbits.ODD7 // bit 7
9292 #define ODE0 ODCONEbits.ODE0 // bit 0
9293 #define ODE1 ODCONEbits.ODE1 // bit 1
9294 #define ODE2 ODCONEbits.ODE2 // bit 2
9296 #define OPA1PCH0 OPA1CONbits.OPA1PCH0 // bit 0
9297 #define OPA1PCH1 OPA1CONbits.OPA1PCH1 // bit 1
9298 #define OPA1UG OPA1CONbits.OPA1UG // bit 4
9299 #define OPA1SP OPA1CONbits.OPA1SP // bit 6
9300 #define OPA1EN OPA1CONbits.OPA1EN // bit 7
9302 #define OPA2PCH0 OPA2CONbits.OPA2PCH0 // bit 0
9303 #define OPA2PCH1 OPA2CONbits.OPA2PCH1 // bit 1
9304 #define OPA2UG OPA2CONbits.OPA2UG // bit 4
9305 #define OPA2SP OPA2CONbits.OPA2SP // bit 6
9306 #define OPA2EN OPA2CONbits.OPA2EN // bit 7
9308 #define PS0 OPTION_REGbits.PS0 // bit 0
9309 #define PS1 OPTION_REGbits.PS1 // bit 1
9310 #define PS2 OPTION_REGbits.PS2 // bit 2
9311 #define PSA OPTION_REGbits.PSA // bit 3
9312 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
9313 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
9314 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
9315 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
9316 #define INTEDG OPTION_REGbits.INTEDG // bit 6
9317 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
9319 #define SCS0 OSCCONbits.SCS0 // bit 0
9320 #define SCS1 OSCCONbits.SCS1 // bit 1
9321 #define IRCF0 OSCCONbits.IRCF0 // bit 3
9322 #define IRCF1 OSCCONbits.IRCF1 // bit 4
9323 #define IRCF2 OSCCONbits.IRCF2 // bit 5
9324 #define IRCF3 OSCCONbits.IRCF3 // bit 6
9325 #define SPLLEN OSCCONbits.SPLLEN // bit 7
9327 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
9328 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
9329 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
9330 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
9331 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
9332 #define OSTS OSCSTATbits.OSTS // bit 5
9333 #define PLLR OSCSTATbits.PLLR // bit 6
9334 #define SOSCR OSCSTATbits.SOSCR // bit 7
9336 #define TUN0 OSCTUNEbits.TUN0 // bit 0
9337 #define TUN1 OSCTUNEbits.TUN1 // bit 1
9338 #define TUN2 OSCTUNEbits.TUN2 // bit 2
9339 #define TUN3 OSCTUNEbits.TUN3 // bit 3
9340 #define TUN4 OSCTUNEbits.TUN4 // bit 4
9341 #define TUN5 OSCTUNEbits.TUN5 // bit 5
9343 #define NOT_BOR PCONbits.NOT_BOR // bit 0
9344 #define NOT_POR PCONbits.NOT_POR // bit 1
9345 #define NOT_RI PCONbits.NOT_RI // bit 2
9346 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
9347 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4
9348 #define STKUNF PCONbits.STKUNF // bit 6
9349 #define STKOVF PCONbits.STKOVF // bit 7
9351 #define TMR1IE PIE1bits.TMR1IE // bit 0
9352 #define TMR2IE PIE1bits.TMR2IE // bit 1
9353 #define CCP1IE PIE1bits.CCP1IE // bit 2
9354 #define SSP1IE PIE1bits.SSP1IE // bit 3
9355 #define TXIE PIE1bits.TXIE // bit 4
9356 #define RCIE PIE1bits.RCIE // bit 5
9357 #define ADIE PIE1bits.ADIE // bit 6
9358 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
9360 #define CCP2IE PIE2bits.CCP2IE // bit 0
9361 #define TMR4IE PIE2bits.TMR4IE // bit 1
9362 #define TMR6IE PIE2bits.TMR6IE // bit 2
9363 #define BCL1IE PIE2bits.BCL1IE // bit 3
9364 #define C1IE PIE2bits.C1IE // bit 5
9365 #define C2IE PIE2bits.C2IE // bit 6
9366 #define OSFIE PIE2bits.OSFIE // bit 7
9368 #define CLC1IE PIE3bits.CLC1IE // bit 0
9369 #define CLC2IE PIE3bits.CLC2IE // bit 1
9370 #define CLC3IE PIE3bits.CLC3IE // bit 2
9371 #define CLC4IE PIE3bits.CLC4IE // bit 3
9372 #define ZCDIE PIE3bits.ZCDIE // bit 4
9373 #define COGIE PIE3bits.COGIE // bit 5
9374 #define NCOIE PIE3bits.NCOIE // bit 6
9376 #define TMR1IF PIR1bits.TMR1IF // bit 0
9377 #define TMR2IF PIR1bits.TMR2IF // bit 1
9378 #define CCP1IF PIR1bits.CCP1IF // bit 2
9379 #define SSP1IF PIR1bits.SSP1IF // bit 3
9380 #define TXIF PIR1bits.TXIF // bit 4
9381 #define RCIF PIR1bits.RCIF // bit 5
9382 #define ADIF PIR1bits.ADIF // bit 6
9383 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
9385 #define CCP2IF PIR2bits.CCP2IF // bit 0
9386 #define TMR4IF PIR2bits.TMR4IF // bit 1
9387 #define TMR6IF PIR2bits.TMR6IF // bit 2
9388 #define BCL1IF PIR2bits.BCL1IF // bit 3
9389 #define C1IF PIR2bits.C1IF // bit 5
9390 #define C2IF PIR2bits.C2IF // bit 6
9391 #define OSFIF PIR2bits.OSFIF // bit 7
9393 #define CLC1IF PIR3bits.CLC1IF // bit 0
9394 #define CLC2IF PIR3bits.CLC2IF // bit 1
9395 #define CLC3IF PIR3bits.CLC3IF // bit 2
9396 #define CLC4IF PIR3bits.CLC4IF // bit 3
9397 #define ZCDIF PIR3bits.ZCDIF // bit 4
9398 #define COGIF PIR3bits.COGIF // bit 5
9399 #define NCOIF PIR3bits.NCOIF // bit 6
9401 #define RD PMCON1bits.RD // bit 0
9402 #define WR PMCON1bits.WR // bit 1
9403 #define WREN PMCON1bits.WREN // bit 2
9404 #define WRERR PMCON1bits.WRERR // bit 3
9405 #define FREE PMCON1bits.FREE // bit 4
9406 #define LWLO PMCON1bits.LWLO // bit 5
9407 #define CFGS PMCON1bits.CFGS // bit 6
9409 #define RA0 PORTAbits.RA0 // bit 0
9410 #define RA1 PORTAbits.RA1 // bit 1
9411 #define RA2 PORTAbits.RA2 // bit 2
9412 #define RA3 PORTAbits.RA3 // bit 3
9413 #define RA4 PORTAbits.RA4 // bit 4
9414 #define RA5 PORTAbits.RA5 // bit 5
9415 #define RA6 PORTAbits.RA6 // bit 6
9416 #define RA7 PORTAbits.RA7 // bit 7
9418 #define RB0 PORTBbits.RB0 // bit 0
9419 #define RB1 PORTBbits.RB1 // bit 1
9420 #define RB2 PORTBbits.RB2 // bit 2
9421 #define RB3 PORTBbits.RB3 // bit 3
9422 #define RB4 PORTBbits.RB4 // bit 4
9423 #define RB5 PORTBbits.RB5 // bit 5
9424 #define RB6 PORTBbits.RB6 // bit 6
9425 #define RB7 PORTBbits.RB7 // bit 7
9427 #define RC0 PORTCbits.RC0 // bit 0
9428 #define RC1 PORTCbits.RC1 // bit 1
9429 #define RC2 PORTCbits.RC2 // bit 2
9430 #define RC3 PORTCbits.RC3 // bit 3
9431 #define RC4 PORTCbits.RC4 // bit 4
9432 #define RC5 PORTCbits.RC5 // bit 5
9433 #define RC6 PORTCbits.RC6 // bit 6
9434 #define RC7 PORTCbits.RC7 // bit 7
9436 #define RD0 PORTDbits.RD0 // bit 0
9437 #define RD1 PORTDbits.RD1 // bit 1
9438 #define RD2 PORTDbits.RD2 // bit 2
9439 #define RD3 PORTDbits.RD3 // bit 3
9440 #define RD4 PORTDbits.RD4 // bit 4
9441 #define RD5 PORTDbits.RD5 // bit 5
9442 #define RD6 PORTDbits.RD6 // bit 6
9443 #define RD7 PORTDbits.RD7 // bit 7
9445 #define RE0 PORTEbits.RE0 // bit 0
9446 #define RE1 PORTEbits.RE1 // bit 1
9447 #define RE2 PORTEbits.RE2 // bit 2
9448 #define RE3 PORTEbits.RE3 // bit 3
9450 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
9452 #define PWM3POL PWM3CONbits.PWM3POL // bit 4
9453 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5
9454 #define PWM3EN PWM3CONbits.PWM3EN // bit 7
9456 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0
9457 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1
9458 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2
9459 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3
9460 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4
9461 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5
9462 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6
9463 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7
9465 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6
9466 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7
9468 #define PWM4POL PWM4CONbits.PWM4POL // bit 4
9469 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5
9470 #define PWM4EN PWM4CONbits.PWM4EN // bit 7
9472 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0
9473 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1
9474 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2
9475 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3
9476 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4
9477 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5
9478 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6
9479 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7
9481 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6
9482 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7
9484 #define RX9D RC1STAbits.RX9D // bit 0
9485 #define OERR RC1STAbits.OERR // bit 1
9486 #define FERR RC1STAbits.FERR // bit 2
9487 #define ADDEN RC1STAbits.ADDEN // bit 3
9488 #define CREN RC1STAbits.CREN // bit 4
9489 #define SREN RC1STAbits.SREN // bit 5
9490 #define RX9 RC1STAbits.RX9 // bit 6
9491 #define SPEN RC1STAbits.SPEN // bit 7
9493 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
9494 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
9495 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
9496 #define SLRA3 SLRCONAbits.SLRA3 // bit 3
9497 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
9498 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
9499 #define SLRA6 SLRCONAbits.SLRA6 // bit 6
9500 #define SLRA7 SLRCONAbits.SLRA7 // bit 7
9502 #define SLRB0 SLRCONBbits.SLRB0 // bit 0
9503 #define SLRB1 SLRCONBbits.SLRB1 // bit 1
9504 #define SLRB2 SLRCONBbits.SLRB2 // bit 2
9505 #define SLRB3 SLRCONBbits.SLRB3 // bit 3
9506 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
9507 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
9508 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
9509 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
9511 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
9512 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
9513 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
9514 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
9515 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
9516 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
9517 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
9518 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
9520 #define SLRD0 SLRCONDbits.SLRD0 // bit 0
9521 #define SLRD1 SLRCONDbits.SLRD1 // bit 1
9522 #define SLRD2 SLRCONDbits.SLRD2 // bit 2
9523 #define SLRD3 SLRCONDbits.SLRD3 // bit 3
9524 #define SLRD4 SLRCONDbits.SLRD4 // bit 4
9525 #define SLRD5 SLRCONDbits.SLRD5 // bit 5
9526 #define SLRD6 SLRCONDbits.SLRD6 // bit 6
9527 #define SLRD7 SLRCONDbits.SLRD7 // bit 7
9529 #define SLRE0 SLRCONEbits.SLRE0 // bit 0
9530 #define SLRE1 SLRCONEbits.SLRE1 // bit 1
9531 #define SLRE2 SLRCONEbits.SLRE2 // bit 2
9533 #define SSP1ADD0 SSP1ADDbits.SSP1ADD0 // bit 0, shadows bit in SSP1ADDbits
9534 #define ADD0 SSP1ADDbits.ADD0 // bit 0, shadows bit in SSP1ADDbits
9535 #define SSP1ADD1 SSP1ADDbits.SSP1ADD1 // bit 1, shadows bit in SSP1ADDbits
9536 #define ADD1 SSP1ADDbits.ADD1 // bit 1, shadows bit in SSP1ADDbits
9537 #define SSP1ADD2 SSP1ADDbits.SSP1ADD2 // bit 2, shadows bit in SSP1ADDbits
9538 #define ADD2 SSP1ADDbits.ADD2 // bit 2, shadows bit in SSP1ADDbits
9539 #define SSP1ADD3 SSP1ADDbits.SSP1ADD3 // bit 3, shadows bit in SSP1ADDbits
9540 #define ADD3 SSP1ADDbits.ADD3 // bit 3, shadows bit in SSP1ADDbits
9541 #define SSP1ADD4 SSP1ADDbits.SSP1ADD4 // bit 4, shadows bit in SSP1ADDbits
9542 #define ADD4 SSP1ADDbits.ADD4 // bit 4, shadows bit in SSP1ADDbits
9543 #define SSP1ADD5 SSP1ADDbits.SSP1ADD5 // bit 5, shadows bit in SSP1ADDbits
9544 #define ADD5 SSP1ADDbits.ADD5 // bit 5, shadows bit in SSP1ADDbits
9545 #define SSP1ADD6 SSP1ADDbits.SSP1ADD6 // bit 6, shadows bit in SSP1ADDbits
9546 #define ADD6 SSP1ADDbits.ADD6 // bit 6, shadows bit in SSP1ADDbits
9547 #define SSP1ADD7 SSP1ADDbits.SSP1ADD7 // bit 7, shadows bit in SSP1ADDbits
9548 #define ADD7 SSP1ADDbits.ADD7 // bit 7, shadows bit in SSP1ADDbits
9550 #define SSP1BUF0 SSP1BUFbits.SSP1BUF0 // bit 0, shadows bit in SSP1BUFbits
9551 #define BUF0 SSP1BUFbits.BUF0 // bit 0, shadows bit in SSP1BUFbits
9552 #define SSP1BUF1 SSP1BUFbits.SSP1BUF1 // bit 1, shadows bit in SSP1BUFbits
9553 #define BUF1 SSP1BUFbits.BUF1 // bit 1, shadows bit in SSP1BUFbits
9554 #define SSP1BUF2 SSP1BUFbits.SSP1BUF2 // bit 2, shadows bit in SSP1BUFbits
9555 #define BUF2 SSP1BUFbits.BUF2 // bit 2, shadows bit in SSP1BUFbits
9556 #define SSP1BUF3 SSP1BUFbits.SSP1BUF3 // bit 3, shadows bit in SSP1BUFbits
9557 #define BUF3 SSP1BUFbits.BUF3 // bit 3, shadows bit in SSP1BUFbits
9558 #define SSP1BUF4 SSP1BUFbits.SSP1BUF4 // bit 4, shadows bit in SSP1BUFbits
9559 #define BUF4 SSP1BUFbits.BUF4 // bit 4, shadows bit in SSP1BUFbits
9560 #define SSP1BUF5 SSP1BUFbits.SSP1BUF5 // bit 5, shadows bit in SSP1BUFbits
9561 #define BUF5 SSP1BUFbits.BUF5 // bit 5, shadows bit in SSP1BUFbits
9562 #define SSP1BUF6 SSP1BUFbits.SSP1BUF6 // bit 6, shadows bit in SSP1BUFbits
9563 #define BUF6 SSP1BUFbits.BUF6 // bit 6, shadows bit in SSP1BUFbits
9564 #define SSP1BUF7 SSP1BUFbits.SSP1BUF7 // bit 7, shadows bit in SSP1BUFbits
9565 #define BUF7 SSP1BUFbits.BUF7 // bit 7, shadows bit in SSP1BUFbits
9567 #define SSPM0 SSP1CONbits.SSPM0 // bit 0
9568 #define SSPM1 SSP1CONbits.SSPM1 // bit 1
9569 #define SSPM2 SSP1CONbits.SSPM2 // bit 2
9570 #define SSPM3 SSP1CONbits.SSPM3 // bit 3
9571 #define CKP SSP1CONbits.CKP // bit 4
9572 #define SSPEN SSP1CONbits.SSPEN // bit 5
9573 #define SSPOV SSP1CONbits.SSPOV // bit 6
9574 #define WCOL SSP1CONbits.WCOL // bit 7
9576 #define SEN SSP1CON2bits.SEN // bit 0
9577 #define RSEN SSP1CON2bits.RSEN // bit 1
9578 #define PEN SSP1CON2bits.PEN // bit 2
9579 #define RCEN SSP1CON2bits.RCEN // bit 3
9580 #define ACKEN SSP1CON2bits.ACKEN // bit 4
9581 #define ACKDT SSP1CON2bits.ACKDT // bit 5
9582 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
9583 #define GCEN SSP1CON2bits.GCEN // bit 7
9585 #define DHEN SSP1CON3bits.DHEN // bit 0
9586 #define AHEN SSP1CON3bits.AHEN // bit 1
9587 #define SBCDE SSP1CON3bits.SBCDE // bit 2
9588 #define SDAHT SSP1CON3bits.SDAHT // bit 3
9589 #define BOEN SSP1CON3bits.BOEN // bit 4
9590 #define SCIE SSP1CON3bits.SCIE // bit 5
9591 #define PCIE SSP1CON3bits.PCIE // bit 6
9592 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
9594 #define SSP1MSK0 SSP1MSKbits.SSP1MSK0 // bit 0, shadows bit in SSP1MSKbits
9595 #define MSK0 SSP1MSKbits.MSK0 // bit 0, shadows bit in SSP1MSKbits
9596 #define SSP1MSK1 SSP1MSKbits.SSP1MSK1 // bit 1, shadows bit in SSP1MSKbits
9597 #define MSK1 SSP1MSKbits.MSK1 // bit 1, shadows bit in SSP1MSKbits
9598 #define SSP1MSK2 SSP1MSKbits.SSP1MSK2 // bit 2, shadows bit in SSP1MSKbits
9599 #define MSK2 SSP1MSKbits.MSK2 // bit 2, shadows bit in SSP1MSKbits
9600 #define SSP1MSK3 SSP1MSKbits.SSP1MSK3 // bit 3, shadows bit in SSP1MSKbits
9601 #define MSK3 SSP1MSKbits.MSK3 // bit 3, shadows bit in SSP1MSKbits
9602 #define SSP1MSK4 SSP1MSKbits.SSP1MSK4 // bit 4, shadows bit in SSP1MSKbits
9603 #define MSK4 SSP1MSKbits.MSK4 // bit 4, shadows bit in SSP1MSKbits
9604 #define SSP1MSK5 SSP1MSKbits.SSP1MSK5 // bit 5, shadows bit in SSP1MSKbits
9605 #define MSK5 SSP1MSKbits.MSK5 // bit 5, shadows bit in SSP1MSKbits
9606 #define SSP1MSK6 SSP1MSKbits.SSP1MSK6 // bit 6, shadows bit in SSP1MSKbits
9607 #define MSK6 SSP1MSKbits.MSK6 // bit 6, shadows bit in SSP1MSKbits
9608 #define SSP1MSK7 SSP1MSKbits.SSP1MSK7 // bit 7, shadows bit in SSP1MSKbits
9609 #define MSK7 SSP1MSKbits.MSK7 // bit 7, shadows bit in SSP1MSKbits
9611 #define BF SSP1STATbits.BF // bit 0
9612 #define UA SSP1STATbits.UA // bit 1
9613 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
9614 #define S SSP1STATbits.S // bit 3
9615 #define P SSP1STATbits.P // bit 4
9616 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
9617 #define CKE SSP1STATbits.CKE // bit 6
9618 #define SMP SSP1STATbits.SMP // bit 7
9620 #define C STATUSbits.C // bit 0
9621 #define DC STATUSbits.DC // bit 1
9622 #define Z STATUSbits.Z // bit 2
9623 #define NOT_PD STATUSbits.NOT_PD // bit 3
9624 #define NOT_TO STATUSbits.NOT_TO // bit 4
9626 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
9627 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
9628 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
9630 #define TMR1ON T1CONbits.TMR1ON // bit 0
9631 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
9632 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
9633 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
9634 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
9635 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
9636 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
9638 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
9639 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
9640 #define T1GVAL T1GCONbits.T1GVAL // bit 2
9641 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3
9642 #define T1GSPM T1GCONbits.T1GSPM // bit 4
9643 #define T1GTM T1GCONbits.T1GTM // bit 5
9644 #define T1GPOL T1GCONbits.T1GPOL // bit 6
9645 #define TMR1GE T1GCONbits.TMR1GE // bit 7
9647 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
9648 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
9649 #define TMR2ON T2CONbits.TMR2ON // bit 2
9650 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
9651 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
9652 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
9653 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
9655 #define T4CKPS0 T4CONbits.T4CKPS0 // bit 0
9656 #define T4CKPS1 T4CONbits.T4CKPS1 // bit 1
9657 #define TMR4ON T4CONbits.TMR4ON // bit 2
9658 #define T4OUTPS0 T4CONbits.T4OUTPS0 // bit 3
9659 #define T4OUTPS1 T4CONbits.T4OUTPS1 // bit 4
9660 #define T4OUTPS2 T4CONbits.T4OUTPS2 // bit 5
9661 #define T4OUTPS3 T4CONbits.T4OUTPS3 // bit 6
9663 #define T6CKPS0 T6CONbits.T6CKPS0 // bit 0
9664 #define T6CKPS1 T6CONbits.T6CKPS1 // bit 1
9665 #define TMR6ON T6CONbits.TMR6ON // bit 2
9666 #define T6OUTPS0 T6CONbits.T6OUTPS0 // bit 3
9667 #define T6OUTPS1 T6CONbits.T6OUTPS1 // bit 4
9668 #define T6OUTPS2 T6CONbits.T6OUTPS2 // bit 5
9669 #define T6OUTPS3 T6CONbits.T6OUTPS3 // bit 6
9671 #define TRISA0 TRISAbits.TRISA0 // bit 0
9672 #define TRISA1 TRISAbits.TRISA1 // bit 1
9673 #define TRISA2 TRISAbits.TRISA2 // bit 2
9674 #define TRISA3 TRISAbits.TRISA3 // bit 3
9675 #define TRISA4 TRISAbits.TRISA4 // bit 4
9676 #define TRISA5 TRISAbits.TRISA5 // bit 5
9677 #define TRISA6 TRISAbits.TRISA6 // bit 6
9678 #define TRISA7 TRISAbits.TRISA7 // bit 7
9680 #define TRISB0 TRISBbits.TRISB0 // bit 0
9681 #define TRISB1 TRISBbits.TRISB1 // bit 1
9682 #define TRISB2 TRISBbits.TRISB2 // bit 2
9683 #define TRISB3 TRISBbits.TRISB3 // bit 3
9684 #define TRISB4 TRISBbits.TRISB4 // bit 4
9685 #define TRISB5 TRISBbits.TRISB5 // bit 5
9686 #define TRISB6 TRISBbits.TRISB6 // bit 6
9687 #define TRISB7 TRISBbits.TRISB7 // bit 7
9689 #define TRISC0 TRISCbits.TRISC0 // bit 0
9690 #define TRISC1 TRISCbits.TRISC1 // bit 1
9691 #define TRISC2 TRISCbits.TRISC2 // bit 2
9692 #define TRISC3 TRISCbits.TRISC3 // bit 3
9693 #define TRISC4 TRISCbits.TRISC4 // bit 4
9694 #define TRISC5 TRISCbits.TRISC5 // bit 5
9695 #define TRISC6 TRISCbits.TRISC6 // bit 6
9696 #define TRISC7 TRISCbits.TRISC7 // bit 7
9698 #define TRISD0 TRISDbits.TRISD0 // bit 0
9699 #define TRISD1 TRISDbits.TRISD1 // bit 1
9700 #define TRISD2 TRISDbits.TRISD2 // bit 2
9701 #define TRISD3 TRISDbits.TRISD3 // bit 3
9702 #define TRISD4 TRISDbits.TRISD4 // bit 4
9703 #define TRISD5 TRISDbits.TRISD5 // bit 5
9704 #define TRISD6 TRISDbits.TRISD6 // bit 6
9705 #define TRISD7 TRISDbits.TRISD7 // bit 7
9707 #define TRISE0 TRISEbits.TRISE0 // bit 0
9708 #define TRISE1 TRISEbits.TRISE1 // bit 1
9709 #define TRISE2 TRISEbits.TRISE2 // bit 2
9710 #define TRISE3 TRISEbits.TRISE3 // bit 3
9712 #define TX9D TX1STAbits.TX9D // bit 0
9713 #define TRMT TX1STAbits.TRMT // bit 1
9714 #define BRGH TX1STAbits.BRGH // bit 2
9715 #define SENDB TX1STAbits.SENDB // bit 3
9716 #define SYNC TX1STAbits.SYNC // bit 4
9717 #define TXEN TX1STAbits.TXEN // bit 5
9718 #define TX9 TX1STAbits.TX9 // bit 6
9719 #define CSRC TX1STAbits.CSRC // bit 7
9721 #define SWDTEN WDTCONbits.SWDTEN // bit 0
9722 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
9723 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
9724 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
9725 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
9726 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
9728 #define WPUA0 WPUAbits.WPUA0 // bit 0
9729 #define WPUA1 WPUAbits.WPUA1 // bit 1
9730 #define WPUA2 WPUAbits.WPUA2 // bit 2
9731 #define WPUA3 WPUAbits.WPUA3 // bit 3
9732 #define WPUA4 WPUAbits.WPUA4 // bit 4
9733 #define WPUA5 WPUAbits.WPUA5 // bit 5
9734 #define WPUA6 WPUAbits.WPUA6 // bit 6
9735 #define WPUA7 WPUAbits.WPUA7 // bit 7
9737 #define WPUB0 WPUBbits.WPUB0 // bit 0
9738 #define WPUB1 WPUBbits.WPUB1 // bit 1
9739 #define WPUB2 WPUBbits.WPUB2 // bit 2
9740 #define WPUB3 WPUBbits.WPUB3 // bit 3
9741 #define WPUB4 WPUBbits.WPUB4 // bit 4
9742 #define WPUB5 WPUBbits.WPUB5 // bit 5
9743 #define WPUB6 WPUBbits.WPUB6 // bit 6
9744 #define WPUB7 WPUBbits.WPUB7 // bit 7
9746 #define WPUC0 WPUCbits.WPUC0 // bit 0
9747 #define WPUC1 WPUCbits.WPUC1 // bit 1
9748 #define WPUC2 WPUCbits.WPUC2 // bit 2
9749 #define WPUC3 WPUCbits.WPUC3 // bit 3
9750 #define WPUC4 WPUCbits.WPUC4 // bit 4
9751 #define WPUC5 WPUCbits.WPUC5 // bit 5
9752 #define WPUC6 WPUCbits.WPUC6 // bit 6
9753 #define WPUC7 WPUCbits.WPUC7 // bit 7
9755 #define WPUD0 WPUDbits.WPUD0 // bit 0
9756 #define WPUD1 WPUDbits.WPUD1 // bit 1
9757 #define WPUD2 WPUDbits.WPUD2 // bit 2
9758 #define WPUD3 WPUDbits.WPUD3 // bit 3
9759 #define WPUD4 WPUDbits.WPUD4 // bit 4
9760 #define WPUD5 WPUDbits.WPUD5 // bit 5
9761 #define WPUD6 WPUDbits.WPUD6 // bit 6
9762 #define WPUD7 WPUDbits.WPUD7 // bit 7
9764 #define WPUE0 WPUEbits.WPUE0 // bit 0
9765 #define WPUE1 WPUEbits.WPUE1 // bit 1
9766 #define WPUE2 WPUEbits.WPUE2 // bit 2
9767 #define WPUE3 WPUEbits.WPUE3 // bit 3
9769 #define ZCD1INTN ZCD1CONbits.ZCD1INTN // bit 0
9770 #define ZCD1INTP ZCD1CONbits.ZCD1INTP // bit 1
9771 #define ZCD1POL ZCD1CONbits.ZCD1POL // bit 4
9772 #define ZCD1OUT ZCD1CONbits.ZCD1OUT // bit 5
9773 #define ZCD1EN ZCD1CONbits.ZCD1EN // bit 7
9775 #endif // #ifndef NO_BIT_DEFINES
9777 #endif // #ifndef __PIC16LF1719_H__