2 * This declarations of the PIC16LF18855 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:25 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF18855_H__
26 #define __PIC16LF18855_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTE_ADDR 0x0010
54 #define TRISA_ADDR 0x0011
55 #define TRISB_ADDR 0x0012
56 #define TRISC_ADDR 0x0013
57 #define LATA_ADDR 0x0016
58 #define LATB_ADDR 0x0017
59 #define LATC_ADDR 0x0018
60 #define TMR0_ADDR 0x001C
61 #define TMR0L_ADDR 0x001C
62 #define PR0_ADDR 0x001D
63 #define TMR0H_ADDR 0x001D
64 #define T0CON0_ADDR 0x001E
65 #define T0CON1_ADDR 0x001F
66 #define ADRES_ADDR 0x008C
67 #define ADRESL_ADDR 0x008C
68 #define ADRESH_ADDR 0x008D
69 #define ADPREV_ADDR 0x008E
70 #define ADPREVL_ADDR 0x008E
71 #define ADPREVH_ADDR 0x008F
72 #define ADACC_ADDR 0x0090
73 #define ADACCL_ADDR 0x0090
74 #define ADACCH_ADDR 0x0091
75 #define ADCON0_ADDR 0x0093
76 #define ADCON1_ADDR 0x0094
77 #define ADCON2_ADDR 0x0095
78 #define ADCON3_ADDR 0x0096
79 #define ADSTAT_ADDR 0x0097
80 #define ADCLK_ADDR 0x0098
81 #define ADACT_ADDR 0x0099
82 #define ADREF_ADDR 0x009A
83 #define ADCAP_ADDR 0x009B
84 #define ADPRE_ADDR 0x009C
85 #define ADACQ_ADDR 0x009D
86 #define ADPCH_ADDR 0x009E
87 #define ADCNT_ADDR 0x010C
88 #define ADRPT_ADDR 0x010D
89 #define ADLTH_ADDR 0x010E
90 #define ADLTHL_ADDR 0x010E
91 #define ADLTHH_ADDR 0x010F
92 #define ADUTH_ADDR 0x0110
93 #define ADUTHL_ADDR 0x0110
94 #define ADUTHH_ADDR 0x0111
95 #define ADSTPT_ADDR 0x0112
96 #define ADSTPTL_ADDR 0x0112
97 #define ADSTPTH_ADDR 0x0113
98 #define ADFLTR_ADDR 0x0114
99 #define ADFLTRL_ADDR 0x0114
100 #define ADFLTRH_ADDR 0x0115
101 #define ADERR_ADDR 0x0116
102 #define ADERRL_ADDR 0x0116
103 #define ADERRH_ADDR 0x0117
104 #define RC1REG_ADDR 0x0119
105 #define RCREG_ADDR 0x0119
106 #define RCREG1_ADDR 0x0119
107 #define TX1REG_ADDR 0x011A
108 #define TXREG_ADDR 0x011A
109 #define TXREG1_ADDR 0x011A
110 #define SP1BRG_ADDR 0x011B
111 #define SP1BRGL_ADDR 0x011B
112 #define SPBRG_ADDR 0x011B
113 #define SPBRG1_ADDR 0x011B
114 #define SPBRGL_ADDR 0x011B
115 #define SP1BRGH_ADDR 0x011C
116 #define SPBRGH_ADDR 0x011C
117 #define SPBRGH1_ADDR 0x011C
118 #define RC1STA_ADDR 0x011D
119 #define RCSTA_ADDR 0x011D
120 #define RCSTA1_ADDR 0x011D
121 #define TX1STA_ADDR 0x011E
122 #define TXSTA_ADDR 0x011E
123 #define TXSTA1_ADDR 0x011E
124 #define BAUD1CON_ADDR 0x011F
125 #define BAUDCON_ADDR 0x011F
126 #define BAUDCON1_ADDR 0x011F
127 #define BAUDCTL_ADDR 0x011F
128 #define BAUDCTL1_ADDR 0x011F
129 #define SSP1BUF_ADDR 0x018C
130 #define SSP1ADD_ADDR 0x018D
131 #define SSP1MSK_ADDR 0x018E
132 #define SSP1STAT_ADDR 0x018F
133 #define SSP1CON1_ADDR 0x0190
134 #define SSP1CON2_ADDR 0x0191
135 #define SSP1CON3_ADDR 0x0192
136 #define SSP2BUF_ADDR 0x0196
137 #define SSP2ADD_ADDR 0x0197
138 #define SSP2MSK_ADDR 0x0198
139 #define SSP2STAT_ADDR 0x0199
140 #define SSP2CON1_ADDR 0x019A
141 #define SSP2CON2_ADDR 0x019B
142 #define SSP2CON3_ADDR 0x019C
143 #define TMR1L_ADDR 0x020C
144 #define TMR1H_ADDR 0x020D
145 #define T1CON_ADDR 0x020E
146 #define PR1_ADDR 0x020F
147 #define T1GCON_ADDR 0x020F
148 #define T1GATE_ADDR 0x0210
149 #define TMR1GATE_ADDR 0x0210
150 #define T1CLK_ADDR 0x0211
151 #define TMR1CLK_ADDR 0x0211
152 #define TMR3L_ADDR 0x0212
153 #define TMR3H_ADDR 0x0213
154 #define T3CON_ADDR 0x0214
155 #define PR3_ADDR 0x0215
156 #define T3GCON_ADDR 0x0215
157 #define T3GATE_ADDR 0x0216
158 #define TMR3GATE_ADDR 0x0216
159 #define T3CLK_ADDR 0x0217
160 #define TMR3CLK_ADDR 0x0217
161 #define TMR5L_ADDR 0x0218
162 #define TMR5H_ADDR 0x0219
163 #define T5CON_ADDR 0x021A
164 #define PR5_ADDR 0x021B
165 #define T5GCON_ADDR 0x021B
166 #define T5GATE_ADDR 0x021C
167 #define TMR5GATE_ADDR 0x021C
168 #define T5CLK_ADDR 0x021D
169 #define TMR5CLK_ADDR 0x021D
170 #define CCPTMRS0_ADDR 0x021E
171 #define CCPTMRS1_ADDR 0x021F
172 #define T2TMR_ADDR 0x028C
173 #define TMR2_ADDR 0x028C
174 #define PR2_ADDR 0x028D
175 #define T2PR_ADDR 0x028D
176 #define T2CON_ADDR 0x028E
177 #define T2HLT_ADDR 0x028F
178 #define T2CLKCON_ADDR 0x0290
179 #define T2RST_ADDR 0x0291
180 #define T4TMR_ADDR 0x0292
181 #define TMR4_ADDR 0x0292
182 #define PR4_ADDR 0x0293
183 #define T4PR_ADDR 0x0293
184 #define T4CON_ADDR 0x0294
185 #define T4HLT_ADDR 0x0295
186 #define T4CLKCON_ADDR 0x0296
187 #define T4RST_ADDR 0x0297
188 #define T6TMR_ADDR 0x0298
189 #define TMR6_ADDR 0x0298
190 #define PR6_ADDR 0x0299
191 #define T6PR_ADDR 0x0299
192 #define T6CON_ADDR 0x029A
193 #define T6HLT_ADDR 0x029B
194 #define T6CLKCON_ADDR 0x029C
195 #define T6RST_ADDR 0x029D
196 #define CCPR1_ADDR 0x030C
197 #define CCPR1L_ADDR 0x030C
198 #define CCPR1H_ADDR 0x030D
199 #define CCP1CON_ADDR 0x030E
200 #define CCP1CAP_ADDR 0x030F
201 #define CCPR2_ADDR 0x0310
202 #define CCPR2L_ADDR 0x0310
203 #define CCPR2H_ADDR 0x0311
204 #define CCP2CON_ADDR 0x0312
205 #define CCP2CAP_ADDR 0x0313
206 #define CCPR3_ADDR 0x0314
207 #define CCPR3L_ADDR 0x0314
208 #define CCPR3H_ADDR 0x0315
209 #define CCP3CON_ADDR 0x0316
210 #define CCP3CAP_ADDR 0x0317
211 #define CCPR4_ADDR 0x0318
212 #define CCPR4L_ADDR 0x0318
213 #define CCPR4H_ADDR 0x0319
214 #define CCP4CON_ADDR 0x031A
215 #define CCP4CAP_ADDR 0x031B
216 #define CCPR5_ADDR 0x031C
217 #define CCPR5L_ADDR 0x031C
218 #define CCPR5H_ADDR 0x031D
219 #define CCP5CON_ADDR 0x031E
220 #define CCP5CAP_ADDR 0x031F
221 #define PWM6DCL_ADDR 0x038C
222 #define PWM6DCH_ADDR 0x038D
223 #define PWM6CON_ADDR 0x038E
224 #define PWM7DCL_ADDR 0x0390
225 #define PWM7DCH_ADDR 0x0391
226 #define PWM7CON_ADDR 0x0392
227 #define SCANLADRL_ADDR 0x040C
228 #define SCANLADRH_ADDR 0x040D
229 #define SCANHADRL_ADDR 0x040E
230 #define SCANHADRH_ADDR 0x040F
231 #define SCANCON0_ADDR 0x0410
232 #define SCANTRIG_ADDR 0x0411
233 #define CRCDATA_ADDR 0x0416
234 #define CRCDATL_ADDR 0x0416
235 #define CRCDATH_ADDR 0x0417
236 #define CRCACC_ADDR 0x0418
237 #define CRCACCL_ADDR 0x0418
238 #define CRCACCH_ADDR 0x0419
239 #define CRCSHFT_ADDR 0x041A
240 #define CRCSHIFTL_ADDR 0x041A
241 #define CRCSHIFTH_ADDR 0x041B
242 #define CRCXOR_ADDR 0x041C
243 #define CRCXORL_ADDR 0x041C
244 #define CRCXORH_ADDR 0x041D
245 #define CRCCON0_ADDR 0x041E
246 #define CRCCON1_ADDR 0x041F
247 #define SMT1TMR_ADDR 0x048C
248 #define SMT1TMRL_ADDR 0x048C
249 #define SMT1TMRH_ADDR 0x048D
250 #define SMT1TMRU_ADDR 0x048E
251 #define SMT1CPR_ADDR 0x048F
252 #define SMT1CPRL_ADDR 0x048F
253 #define SMT1CPRH_ADDR 0x0490
254 #define SMT1CPRU_ADDR 0x0491
255 #define SMT1CPW_ADDR 0x0492
256 #define SMT1CPWL_ADDR 0x0492
257 #define SMT1CPWH_ADDR 0x0493
258 #define SMT1CPWU_ADDR 0x0494
259 #define SMT1PR_ADDR 0x0495
260 #define SMT1PRL_ADDR 0x0495
261 #define SMT1PRH_ADDR 0x0496
262 #define SMT1PRU_ADDR 0x0497
263 #define SMT1CON0_ADDR 0x0498
264 #define SMT1CON1_ADDR 0x0499
265 #define SMT1STAT_ADDR 0x049A
266 #define SMT1CLK_ADDR 0x049B
267 #define SMT1SIG_ADDR 0x049C
268 #define SMT1WIN_ADDR 0x049D
269 #define SMT2TMR_ADDR 0x050C
270 #define SMT2TMRL_ADDR 0x050C
271 #define SMT2TMRH_ADDR 0x050D
272 #define SMT2TMRU_ADDR 0x050E
273 #define SMT2CPR_ADDR 0x050F
274 #define SMT2CPRL_ADDR 0x050F
275 #define SMT2CPRH_ADDR 0x0510
276 #define SMT2CPRU_ADDR 0x0511
277 #define SMT2CPW_ADDR 0x0512
278 #define SMT2CPWL_ADDR 0x0512
279 #define SMT2CPWH_ADDR 0x0513
280 #define SMT2CPWU_ADDR 0x0514
281 #define SMT2PR_ADDR 0x0515
282 #define SMT2PRL_ADDR 0x0515
283 #define SMT2PRH_ADDR 0x0516
284 #define SMT2PRU_ADDR 0x0517
285 #define SMT2CON0_ADDR 0x0518
286 #define SMT2CON1_ADDR 0x0519
287 #define SMT2STAT_ADDR 0x051A
288 #define SMT2CLK_ADDR 0x051B
289 #define SMT2SIG_ADDR 0x051C
290 #define SMT2WIN_ADDR 0x051D
291 #define NCO1ACC_ADDR 0x058C
292 #define NCO1ACCL_ADDR 0x058C
293 #define NCO1ACCH_ADDR 0x058D
294 #define NCO1ACCU_ADDR 0x058E
295 #define NCO1INC_ADDR 0x058F
296 #define NCO1INCL_ADDR 0x058F
297 #define NCO1INCH_ADDR 0x0590
298 #define NCO1INCU_ADDR 0x0591
299 #define NCO1CON_ADDR 0x0592
300 #define NCO1CLK_ADDR 0x0593
301 #define CWG1CLKCON_ADDR 0x060C
302 #define CWG1ISM_ADDR 0x060D
303 #define CWG1DBR_ADDR 0x060E
304 #define CWG1DBF_ADDR 0x060F
305 #define CWG1CON0_ADDR 0x0610
306 #define CWG1CON1_ADDR 0x0611
307 #define CWG1AS0_ADDR 0x0612
308 #define CWG1AS1_ADDR 0x0613
309 #define CWG1STR_ADDR 0x0614
310 #define CWG2CLKCON_ADDR 0x0616
311 #define CWG2ISM_ADDR 0x0617
312 #define CWG2DBR_ADDR 0x0618
313 #define CWG2DBF_ADDR 0x0619
314 #define CWG2CON0_ADDR 0x061A
315 #define CWG2CON1_ADDR 0x061B
316 #define CWG2AS0_ADDR 0x061C
317 #define CWG2AS1_ADDR 0x061D
318 #define CWG2STR_ADDR 0x061E
319 #define CWG3CLKCON_ADDR 0x068C
320 #define CWG3ISM_ADDR 0x068D
321 #define CWG3DBR_ADDR 0x068E
322 #define CWG3DBF_ADDR 0x068F
323 #define CWG3CON0_ADDR 0x0690
324 #define CWG3CON1_ADDR 0x0691
325 #define CWG3AS0_ADDR 0x0692
326 #define CWG3AS1_ADDR 0x0693
327 #define CWG3STR_ADDR 0x0694
328 #define PIR0_ADDR 0x070C
329 #define PIR1_ADDR 0x070D
330 #define PIR2_ADDR 0x070E
331 #define PIR3_ADDR 0x070F
332 #define PIR4_ADDR 0x0710
333 #define PIR5_ADDR 0x0711
334 #define PIR6_ADDR 0x0712
335 #define PIR7_ADDR 0x0713
336 #define PIR8_ADDR 0x0714
337 #define PIE0_ADDR 0x0716
338 #define PIE1_ADDR 0x0717
339 #define PIE2_ADDR 0x0718
340 #define PIE3_ADDR 0x0719
341 #define PIE4_ADDR 0x071A
342 #define PIE5_ADDR 0x071B
343 #define PIE6_ADDR 0x071C
344 #define PIE7_ADDR 0x071D
345 #define PIE8_ADDR 0x071E
346 #define PMD0_ADDR 0x0796
347 #define PMD1_ADDR 0x0797
348 #define PMD2_ADDR 0x0798
349 #define PMD3_ADDR 0x0799
350 #define PMD4_ADDR 0x079A
351 #define PMD5_ADDR 0x079B
352 #define WDTCON0_ADDR 0x080C
353 #define WDTCON1_ADDR 0x080D
354 #define WDTPSL_ADDR 0x080E
355 #define WDTPSH_ADDR 0x080F
356 #define WDTTMR_ADDR 0x0810
357 #define BORCON_ADDR 0x0811
358 #define PCON0_ADDR 0x0813
359 #define CCDCON_ADDR 0x0814
360 #define NVMADRL_ADDR 0x081A
361 #define NVMADRH_ADDR 0x081B
362 #define NVMDATL_ADDR 0x081C
363 #define NVMDATH_ADDR 0x081D
364 #define NVMCON1_ADDR 0x081E
365 #define NVMCON2_ADDR 0x081F
366 #define CPUDOZE_ADDR 0x088C
367 #define OSCCON1_ADDR 0x088D
368 #define OSCCON2_ADDR 0x088E
369 #define OSCCON3_ADDR 0x088F
370 #define OSCSTAT_ADDR 0x0890
371 #define OSCEN_ADDR 0x0891
372 #define OSCTUNE_ADDR 0x0892
373 #define OSCFRQ_ADDR 0x0893
374 #define CLKRCON_ADDR 0x0895
375 #define CLKRCLK_ADDR 0x0896
376 #define MDCON0_ADDR 0x0897
377 #define MDCON1_ADDR 0x0898
378 #define MDSRC_ADDR 0x0899
379 #define MDCARL_ADDR 0x089A
380 #define MDCARH_ADDR 0x089B
381 #define FVRCON_ADDR 0x090C
382 #define DAC1CON0_ADDR 0x090E
383 #define DAC1CON1_ADDR 0x090F
384 #define ZCD1CON_ADDR 0x091F
385 #define ZCDCON_ADDR 0x091F
386 #define CMOUT_ADDR 0x098F
387 #define CMSTAT_ADDR 0x098F
388 #define CM1CON0_ADDR 0x0990
389 #define CM1CON1_ADDR 0x0991
390 #define CM1NSEL_ADDR 0x0992
391 #define CM1PSEL_ADDR 0x0993
392 #define CM2CON0_ADDR 0x0994
393 #define CM2CON1_ADDR 0x0995
394 #define CM2NSEL_ADDR 0x0996
395 #define CM2PSEL_ADDR 0x0997
396 #define CLCDATA_ADDR 0x0E0F
397 #define CLC1CON_ADDR 0x0E10
398 #define CLC1POL_ADDR 0x0E11
399 #define CLC1SEL0_ADDR 0x0E12
400 #define CLC1SEL1_ADDR 0x0E13
401 #define CLC1SEL2_ADDR 0x0E14
402 #define CLC1SEL3_ADDR 0x0E15
403 #define CLC1GLS0_ADDR 0x0E16
404 #define CLC1GLS1_ADDR 0x0E17
405 #define CLC1GLS2_ADDR 0x0E18
406 #define CLC1GLS3_ADDR 0x0E19
407 #define CLC2CON_ADDR 0x0E1A
408 #define CLC2POL_ADDR 0x0E1B
409 #define CLC2SEL0_ADDR 0x0E1C
410 #define CLC2SEL1_ADDR 0x0E1D
411 #define CLC2SEL2_ADDR 0x0E1E
412 #define CLC2SEL3_ADDR 0x0E1F
413 #define CLC2GLS0_ADDR 0x0E20
414 #define CLC2GLS1_ADDR 0x0E21
415 #define CLC2GLS2_ADDR 0x0E22
416 #define CLC2GLS3_ADDR 0x0E23
417 #define CLC3CON_ADDR 0x0E24
418 #define CLC3POL_ADDR 0x0E25
419 #define CLC3SEL0_ADDR 0x0E26
420 #define CLC3SEL1_ADDR 0x0E27
421 #define CLC3SEL2_ADDR 0x0E28
422 #define CLC3SEL3_ADDR 0x0E29
423 #define CLC3GLS0_ADDR 0x0E2A
424 #define CLC3GLS1_ADDR 0x0E2B
425 #define CLC3GLS2_ADDR 0x0E2C
426 #define CLC3GLS3_ADDR 0x0E2D
427 #define CLC4CON_ADDR 0x0E2E
428 #define CLC4POL_ADDR 0x0E2F
429 #define CLC4SEL0_ADDR 0x0E30
430 #define CLC4SEL1_ADDR 0x0E31
431 #define CLC4SEL2_ADDR 0x0E32
432 #define CLC4SEL3_ADDR 0x0E33
433 #define CLC4GLS0_ADDR 0x0E34
434 #define CLC4GLS1_ADDR 0x0E35
435 #define CLC4GLS2_ADDR 0x0E36
436 #define CLC4GLS3_ADDR 0x0E37
437 #define PPSLOCK_ADDR 0x0E8F
438 #define INTPPS_ADDR 0x0E90
439 #define T0CKIPPS_ADDR 0x0E91
440 #define T1CKIPPS_ADDR 0x0E92
441 #define T1GPPS_ADDR 0x0E93
442 #define T3CKIPPS_ADDR 0x0E94
443 #define T3GPPS_ADDR 0x0E95
444 #define T5CKIPPS_ADDR 0x0E96
445 #define T5GPPS_ADDR 0x0E97
446 #define T2AINPPS_ADDR 0x0E9C
447 #define T4AINPPS_ADDR 0x0E9D
448 #define T6AINPPS_ADDR 0x0E9E
449 #define CCP1PPS_ADDR 0x0EA1
450 #define CCP2PPS_ADDR 0x0EA2
451 #define CCP3PPS_ADDR 0x0EA3
452 #define CCP4PPS_ADDR 0x0EA4
453 #define CCP5PPS_ADDR 0x0EA5
454 #define SMT1WINPPS_ADDR 0x0EA9
455 #define SMT1SIGPPS_ADDR 0x0EAA
456 #define SMT2WINPPS_ADDR 0x0EAB
457 #define SMT2SIGPPS_ADDR 0x0EAC
458 #define CWG1PPS_ADDR 0x0EB1
459 #define CWG2PPS_ADDR 0x0EB2
460 #define CWG3PPS_ADDR 0x0EB3
461 #define MDCARLPPS_ADDR 0x0EB8
462 #define MDCARHPPS_ADDR 0x0EB9
463 #define MDSRCPPS_ADDR 0x0EBA
464 #define CLCIN0PPS_ADDR 0x0EBB
465 #define CLCIN1PPS_ADDR 0x0EBC
466 #define CLCIN2PPS_ADDR 0x0EBD
467 #define CLCIN3PPS_ADDR 0x0EBE
468 #define ADCACTPPS_ADDR 0x0EC3
469 #define SSP1CLKPPS_ADDR 0x0EC5
470 #define SSP1DATPPS_ADDR 0x0EC6
471 #define SSP1SSPPS_ADDR 0x0EC7
472 #define SSP2CLKPPS_ADDR 0x0EC8
473 #define SSP2DATPPS_ADDR 0x0EC9
474 #define SSP2SSPPS_ADDR 0x0ECA
475 #define RXPPS_ADDR 0x0ECB
476 #define TXPPS_ADDR 0x0ECC
477 #define RA0PPS_ADDR 0x0F10
478 #define RA1PPS_ADDR 0x0F11
479 #define RA2PPS_ADDR 0x0F12
480 #define RA3PPS_ADDR 0x0F13
481 #define RA4PPS_ADDR 0x0F14
482 #define RA5PPS_ADDR 0x0F15
483 #define RA6PPS_ADDR 0x0F16
484 #define RA7PPS_ADDR 0x0F17
485 #define RB0PPS_ADDR 0x0F18
486 #define RB1PPS_ADDR 0x0F19
487 #define RB2PPS_ADDR 0x0F1A
488 #define RB3PPS_ADDR 0x0F1B
489 #define RB4PPS_ADDR 0x0F1C
490 #define RB5PPS_ADDR 0x0F1D
491 #define RB6PPS_ADDR 0x0F1E
492 #define RB7PPS_ADDR 0x0F1F
493 #define RC0PPS_ADDR 0x0F20
494 #define RC1PPS_ADDR 0x0F21
495 #define RC2PPS_ADDR 0x0F22
496 #define RC3PPS_ADDR 0x0F23
497 #define RC4PPS_ADDR 0x0F24
498 #define RC5PPS_ADDR 0x0F25
499 #define RC6PPS_ADDR 0x0F26
500 #define RC7PPS_ADDR 0x0F27
501 #define ANSELA_ADDR 0x0F38
502 #define WPUA_ADDR 0x0F39
503 #define ODCONA_ADDR 0x0F3A
504 #define SLRCONA_ADDR 0x0F3B
505 #define INLVLA_ADDR 0x0F3C
506 #define IOCAP_ADDR 0x0F3D
507 #define IOCAN_ADDR 0x0F3E
508 #define IOCAF_ADDR 0x0F3F
509 #define CCDNA_ADDR 0x0F40
510 #define CCDPA_ADDR 0x0F41
511 #define ANSELB_ADDR 0x0F43
512 #define WPUB_ADDR 0x0F44
513 #define ODCONB_ADDR 0x0F45
514 #define SLRCONB_ADDR 0x0F46
515 #define INLVLB_ADDR 0x0F47
516 #define IOCBP_ADDR 0x0F48
517 #define IOCBN_ADDR 0x0F49
518 #define IOCBF_ADDR 0x0F4A
519 #define CCDNB_ADDR 0x0F4B
520 #define CCDPB_ADDR 0x0F4C
521 #define ANSELC_ADDR 0x0F4E
522 #define WPUC_ADDR 0x0F4F
523 #define ODCONC_ADDR 0x0F50
524 #define SLRCONC_ADDR 0x0F51
525 #define INLVLC_ADDR 0x0F52
526 #define IOCCP_ADDR 0x0F53
527 #define IOCCN_ADDR 0x0F54
528 #define IOCCF_ADDR 0x0F55
529 #define CCDNC_ADDR 0x0F56
530 #define CCDPC_ADDR 0x0F57
531 #define WPUE_ADDR 0x0F65
532 #define INLVLE_ADDR 0x0F68
533 #define IOCEP_ADDR 0x0F69
534 #define IOCEN_ADDR 0x0F6A
535 #define IOCEF_ADDR 0x0F6B
536 #define STATUS_SHAD_ADDR 0x0FE4
537 #define WREG_SHAD_ADDR 0x0FE5
538 #define BSR_SHAD_ADDR 0x0FE6
539 #define PCLATH_SHAD_ADDR 0x0FE7
540 #define FSR0L_SHAD_ADDR 0x0FE8
541 #define FSR0H_SHAD_ADDR 0x0FE9
542 #define FSR1L_SHAD_ADDR 0x0FEA
543 #define FSR1H_SHAD_ADDR 0x0FEB
544 #define STKPTR_ADDR 0x0FED
545 #define TOSL_ADDR 0x0FEE
546 #define TOSH_ADDR 0x0FEF
548 #endif // #ifndef NO_ADDR_DEFINES
550 //==============================================================================
552 // Register Definitions
554 //==============================================================================
556 extern __at(0x0000) __sfr INDF0
;
557 extern __at(0x0001) __sfr INDF1
;
558 extern __at(0x0002) __sfr PCL
;
560 //==============================================================================
563 extern __at(0x0003) __sfr STATUS
;
577 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
585 //==============================================================================
587 extern __at(0x0004) __sfr FSR0
;
588 extern __at(0x0004) __sfr FSR0L
;
589 extern __at(0x0005) __sfr FSR0H
;
590 extern __at(0x0006) __sfr FSR1
;
591 extern __at(0x0006) __sfr FSR1L
;
592 extern __at(0x0007) __sfr FSR1H
;
594 //==============================================================================
597 extern __at(0x0008) __sfr BSR
;
620 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
628 //==============================================================================
630 extern __at(0x0009) __sfr WREG
;
631 extern __at(0x000A) __sfr PCLATH
;
633 //==============================================================================
636 extern __at(0x000B) __sfr INTCON
;
650 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
656 //==============================================================================
659 //==============================================================================
662 extern __at(0x000C) __sfr PORTA
;
676 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
687 //==============================================================================
690 //==============================================================================
693 extern __at(0x000D) __sfr PORTB
;
707 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
718 //==============================================================================
721 //==============================================================================
724 extern __at(0x000E) __sfr PORTC
;
738 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
749 //==============================================================================
752 //==============================================================================
755 extern __at(0x0010) __sfr PORTE
;
769 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
773 //==============================================================================
776 //==============================================================================
779 extern __at(0x0011) __sfr TRISA
;
793 extern __at(0x0011) volatile __TRISAbits_t TRISAbits
;
804 //==============================================================================
807 //==============================================================================
810 extern __at(0x0012) __sfr TRISB
;
824 extern __at(0x0012) volatile __TRISBbits_t TRISBbits
;
835 //==============================================================================
838 //==============================================================================
841 extern __at(0x0013) __sfr TRISC
;
855 extern __at(0x0013) volatile __TRISCbits_t TRISCbits
;
866 //==============================================================================
869 //==============================================================================
872 extern __at(0x0016) __sfr LATA
;
886 extern __at(0x0016) volatile __LATAbits_t LATAbits
;
897 //==============================================================================
900 //==============================================================================
903 extern __at(0x0017) __sfr LATB
;
917 extern __at(0x0017) volatile __LATBbits_t LATBbits
;
928 //==============================================================================
931 //==============================================================================
934 extern __at(0x0018) __sfr LATC
;
948 extern __at(0x0018) volatile __LATCbits_t LATCbits
;
959 //==============================================================================
962 //==============================================================================
965 extern __at(0x001C) __sfr TMR0
;
979 extern __at(0x001C) volatile __TMR0bits_t TMR0bits
;
990 //==============================================================================
993 //==============================================================================
996 extern __at(0x001C) __sfr TMR0L
;
1000 unsigned TMR0L0
: 1;
1001 unsigned TMR0L1
: 1;
1002 unsigned TMR0L2
: 1;
1003 unsigned TMR0L3
: 1;
1004 unsigned TMR0L4
: 1;
1005 unsigned TMR0L5
: 1;
1006 unsigned TMR0L6
: 1;
1007 unsigned TMR0L7
: 1;
1010 extern __at(0x001C) volatile __TMR0Lbits_t TMR0Lbits
;
1012 #define _TMR0L_TMR0L0 0x01
1013 #define _TMR0L_TMR0L1 0x02
1014 #define _TMR0L_TMR0L2 0x04
1015 #define _TMR0L_TMR0L3 0x08
1016 #define _TMR0L_TMR0L4 0x10
1017 #define _TMR0L_TMR0L5 0x20
1018 #define _TMR0L_TMR0L6 0x40
1019 #define _TMR0L_TMR0L7 0x80
1021 //==============================================================================
1024 //==============================================================================
1027 extern __at(0x001D) __sfr PR0
;
1033 unsigned TMR0H0
: 1;
1034 unsigned TMR0H1
: 1;
1035 unsigned TMR0H2
: 1;
1036 unsigned TMR0H3
: 1;
1037 unsigned TMR0H4
: 1;
1038 unsigned TMR0H5
: 1;
1039 unsigned TMR0H6
: 1;
1040 unsigned TMR0H7
: 1;
1056 extern __at(0x001D) volatile __PR0bits_t PR0bits
;
1058 #define _TMR0H0 0x01
1060 #define _TMR0H1 0x02
1062 #define _TMR0H2 0x04
1064 #define _TMR0H3 0x08
1066 #define _TMR0H4 0x10
1068 #define _TMR0H5 0x20
1070 #define _TMR0H6 0x40
1072 #define _TMR0H7 0x80
1075 //==============================================================================
1078 //==============================================================================
1081 extern __at(0x001D) __sfr TMR0H
;
1087 unsigned TMR0H0
: 1;
1088 unsigned TMR0H1
: 1;
1089 unsigned TMR0H2
: 1;
1090 unsigned TMR0H3
: 1;
1091 unsigned TMR0H4
: 1;
1092 unsigned TMR0H5
: 1;
1093 unsigned TMR0H6
: 1;
1094 unsigned TMR0H7
: 1;
1110 extern __at(0x001D) volatile __TMR0Hbits_t TMR0Hbits
;
1112 #define _TMR0H_TMR0H0 0x01
1113 #define _TMR0H_T0PR0 0x01
1114 #define _TMR0H_TMR0H1 0x02
1115 #define _TMR0H_T0PR1 0x02
1116 #define _TMR0H_TMR0H2 0x04
1117 #define _TMR0H_T0PR2 0x04
1118 #define _TMR0H_TMR0H3 0x08
1119 #define _TMR0H_T0PR3 0x08
1120 #define _TMR0H_TMR0H4 0x10
1121 #define _TMR0H_T0PR4 0x10
1122 #define _TMR0H_TMR0H5 0x20
1123 #define _TMR0H_T0PR5 0x20
1124 #define _TMR0H_TMR0H6 0x40
1125 #define _TMR0H_T0PR6 0x40
1126 #define _TMR0H_TMR0H7 0x80
1127 #define _TMR0H_T0PR7 0x80
1129 //==============================================================================
1132 //==============================================================================
1135 extern __at(0x001E) __sfr T0CON0
;
1141 unsigned T0OUTPS0
: 1;
1142 unsigned T0OUTPS1
: 1;
1143 unsigned T0OUTPS2
: 1;
1144 unsigned T0OUTPS3
: 1;
1145 unsigned T016BIT
: 1;
1153 unsigned T0OUTPS
: 4;
1158 extern __at(0x001E) volatile __T0CON0bits_t T0CON0bits
;
1160 #define _T0OUTPS0 0x01
1161 #define _T0OUTPS1 0x02
1162 #define _T0OUTPS2 0x04
1163 #define _T0OUTPS3 0x08
1164 #define _T016BIT 0x10
1168 //==============================================================================
1171 //==============================================================================
1174 extern __at(0x001F) __sfr T0CON1
;
1180 unsigned T0CKPS0
: 1;
1181 unsigned T0CKPS1
: 1;
1182 unsigned T0CKPS2
: 1;
1183 unsigned T0CKPS3
: 1;
1184 unsigned T0ASYNC
: 1;
1210 unsigned T0CKPS
: 4;
1221 extern __at(0x001F) volatile __T0CON1bits_t T0CON1bits
;
1223 #define _T0CKPS0 0x01
1225 #define _T0CKPS1 0x02
1227 #define _T0CKPS2 0x04
1229 #define _T0CKPS3 0x08
1231 #define _T0ASYNC 0x10
1236 //==============================================================================
1238 extern __at(0x008C) __sfr ADRES
;
1239 extern __at(0x008C) __sfr ADRESL
;
1240 extern __at(0x008D) __sfr ADRESH
;
1241 extern __at(0x008E) __sfr ADPREV
;
1243 //==============================================================================
1246 extern __at(0x008E) __sfr ADPREVL
;
1250 unsigned ADPREV0
: 1;
1251 unsigned ADPREV1
: 1;
1252 unsigned ADPREV2
: 1;
1253 unsigned ADPREV3
: 1;
1254 unsigned ADPREV4
: 1;
1255 unsigned ADPREV5
: 1;
1256 unsigned ADPREV6
: 1;
1257 unsigned ADPREV7
: 1;
1260 extern __at(0x008E) volatile __ADPREVLbits_t ADPREVLbits
;
1262 #define _ADPREV0 0x01
1263 #define _ADPREV1 0x02
1264 #define _ADPREV2 0x04
1265 #define _ADPREV3 0x08
1266 #define _ADPREV4 0x10
1267 #define _ADPREV5 0x20
1268 #define _ADPREV6 0x40
1269 #define _ADPREV7 0x80
1271 //==============================================================================
1274 //==============================================================================
1277 extern __at(0x008F) __sfr ADPREVH
;
1281 unsigned ADPREV8
: 1;
1282 unsigned ADPREV9
: 1;
1283 unsigned ADPREV10
: 1;
1284 unsigned ADPREV11
: 1;
1285 unsigned ADPREV12
: 1;
1286 unsigned ADPREV13
: 1;
1287 unsigned ADPREV14
: 1;
1288 unsigned ADPREV15
: 1;
1291 extern __at(0x008F) volatile __ADPREVHbits_t ADPREVHbits
;
1293 #define _ADPREV8 0x01
1294 #define _ADPREV9 0x02
1295 #define _ADPREV10 0x04
1296 #define _ADPREV11 0x08
1297 #define _ADPREV12 0x10
1298 #define _ADPREV13 0x20
1299 #define _ADPREV14 0x40
1300 #define _ADPREV15 0x80
1302 //==============================================================================
1304 extern __at(0x0090) __sfr ADACC
;
1306 //==============================================================================
1309 extern __at(0x0090) __sfr ADACCL
;
1313 unsigned ADACC0
: 1;
1314 unsigned ADACC1
: 1;
1315 unsigned ADACC2
: 1;
1316 unsigned ADACC3
: 1;
1317 unsigned ADACC4
: 1;
1318 unsigned ADACC5
: 1;
1319 unsigned ADACC6
: 1;
1320 unsigned ADACC7
: 1;
1323 extern __at(0x0090) volatile __ADACCLbits_t ADACCLbits
;
1325 #define _ADACC0 0x01
1326 #define _ADACC1 0x02
1327 #define _ADACC2 0x04
1328 #define _ADACC3 0x08
1329 #define _ADACC4 0x10
1330 #define _ADACC5 0x20
1331 #define _ADACC6 0x40
1332 #define _ADACC7 0x80
1334 //==============================================================================
1337 //==============================================================================
1340 extern __at(0x0091) __sfr ADACCH
;
1344 unsigned ADACC8
: 1;
1345 unsigned ADACC9
: 1;
1346 unsigned ADACC10
: 1;
1347 unsigned ADACC11
: 1;
1348 unsigned ADACC12
: 1;
1349 unsigned ADACC13
: 1;
1350 unsigned ADACC14
: 1;
1351 unsigned ADACC15
: 1;
1354 extern __at(0x0091) volatile __ADACCHbits_t ADACCHbits
;
1356 #define _ADACC8 0x01
1357 #define _ADACC9 0x02
1358 #define _ADACC10 0x04
1359 #define _ADACC11 0x08
1360 #define _ADACC12 0x10
1361 #define _ADACC13 0x20
1362 #define _ADACC14 0x40
1363 #define _ADACC15 0x80
1365 //==============================================================================
1368 //==============================================================================
1371 extern __at(0x0093) __sfr ADCON0
;
1383 unsigned ADCONT
: 1;
1401 unsigned NOT_DONE
: 1;
1425 unsigned GO_NOT_DONE
: 1;
1443 extern __at(0x0093) volatile __ADCON0bits_t ADCON0bits
;
1447 #define _NOT_DONE 0x01
1449 #define _GO_NOT_DONE 0x01
1453 #define _ADCONT 0x40
1456 //==============================================================================
1459 //==============================================================================
1462 extern __at(0x0094) __sfr ADCON1
;
1466 unsigned ADDSEN
: 1;
1471 unsigned ADGPOL
: 1;
1472 unsigned ADIPEN
: 1;
1473 unsigned ADPPOL
: 1;
1476 extern __at(0x0094) volatile __ADCON1bits_t ADCON1bits
;
1478 #define _ADDSEN 0x01
1479 #define _ADGPOL 0x20
1480 #define _ADIPEN 0x40
1481 #define _ADPPOL 0x80
1483 //==============================================================================
1486 //==============================================================================
1489 extern __at(0x0095) __sfr ADCON2
;
1498 unsigned ADACLR
: 1;
1499 unsigned ADCRS0
: 1;
1500 unsigned ADCRS1
: 1;
1501 unsigned ADCRS2
: 1;
1502 unsigned ADPSIS
: 1;
1519 extern __at(0x0095) volatile __ADCON2bits_t ADCON2bits
;
1524 #define _ADACLR 0x08
1525 #define _ADCRS0 0x10
1526 #define _ADCRS1 0x20
1527 #define _ADCRS2 0x40
1528 #define _ADPSIS 0x80
1530 //==============================================================================
1533 //==============================================================================
1536 extern __at(0x0096) __sfr ADCON3
;
1542 unsigned ADTMD0
: 1;
1543 unsigned ADTMD1
: 1;
1544 unsigned ADTMD2
: 1;
1546 unsigned ADCALC0
: 1;
1547 unsigned ADCALC1
: 1;
1548 unsigned ADCALC2
: 1;
1561 unsigned ADCALC
: 3;
1566 extern __at(0x0096) volatile __ADCON3bits_t ADCON3bits
;
1568 #define _ADTMD0 0x01
1569 #define _ADTMD1 0x02
1570 #define _ADTMD2 0x04
1572 #define _ADCALC0 0x10
1573 #define _ADCALC1 0x20
1574 #define _ADCALC2 0x40
1576 //==============================================================================
1579 //==============================================================================
1582 extern __at(0x0097) __sfr ADSTAT
;
1588 unsigned ADSTAT0
: 1;
1589 unsigned ADSTAT1
: 1;
1590 unsigned ADSTAT2
: 1;
1591 unsigned ADMACT
: 1;
1592 unsigned ADMATH
: 1;
1593 unsigned ADLTHR
: 1;
1594 unsigned ADUTHR
: 1;
1600 unsigned ADSTAT
: 3;
1605 extern __at(0x0097) volatile __ADSTATbits_t ADSTATbits
;
1607 #define _ADSTAT0 0x01
1608 #define _ADSTAT1 0x02
1609 #define _ADSTAT2 0x04
1610 #define _ADMACT 0x08
1611 #define _ADMATH 0x10
1612 #define _ADLTHR 0x20
1613 #define _ADUTHR 0x40
1616 //==============================================================================
1619 //==============================================================================
1622 extern __at(0x0098) __sfr ADCLK
;
1628 unsigned ADCCS0
: 1;
1629 unsigned ADCCS1
: 1;
1630 unsigned ADCCS2
: 1;
1631 unsigned ADCCS3
: 1;
1632 unsigned ADCCS4
: 1;
1633 unsigned ADCCS5
: 1;
1645 extern __at(0x0098) volatile __ADCLKbits_t ADCLKbits
;
1647 #define _ADCCS0 0x01
1648 #define _ADCCS1 0x02
1649 #define _ADCCS2 0x04
1650 #define _ADCCS3 0x08
1651 #define _ADCCS4 0x10
1652 #define _ADCCS5 0x20
1654 //==============================================================================
1657 //==============================================================================
1660 extern __at(0x0099) __sfr ADACT
;
1666 unsigned ADACT0
: 1;
1667 unsigned ADACT1
: 1;
1668 unsigned ADACT2
: 1;
1669 unsigned ADACT3
: 1;
1670 unsigned ADACT4
: 1;
1683 extern __at(0x0099) volatile __ADACTbits_t ADACTbits
;
1685 #define _ADACT0 0x01
1686 #define _ADACT1 0x02
1687 #define _ADACT2 0x04
1688 #define _ADACT3 0x08
1689 #define _ADACT4 0x10
1691 //==============================================================================
1694 //==============================================================================
1697 extern __at(0x009A) __sfr ADREF
;
1703 unsigned ADPREF0
: 1;
1704 unsigned ADPREF1
: 1;
1707 unsigned ADNREF
: 1;
1715 unsigned ADPREF
: 2;
1720 extern __at(0x009A) volatile __ADREFbits_t ADREFbits
;
1722 #define _ADPREF0 0x01
1723 #define _ADPREF1 0x02
1724 #define _ADNREF 0x10
1726 //==============================================================================
1729 //==============================================================================
1732 extern __at(0x009B) __sfr ADCAP
;
1738 unsigned ADCAP0
: 1;
1739 unsigned ADCAP1
: 1;
1740 unsigned ADCAP2
: 1;
1741 unsigned ADCAP3
: 1;
1742 unsigned ADCAP4
: 1;
1755 extern __at(0x009B) volatile __ADCAPbits_t ADCAPbits
;
1757 #define _ADCAP0 0x01
1758 #define _ADCAP1 0x02
1759 #define _ADCAP2 0x04
1760 #define _ADCAP3 0x08
1761 #define _ADCAP4 0x10
1763 //==============================================================================
1766 //==============================================================================
1769 extern __at(0x009C) __sfr ADPRE
;
1773 unsigned ADPRE0
: 1;
1774 unsigned ADPRE1
: 1;
1775 unsigned ADPRE2
: 1;
1776 unsigned ADPRE3
: 1;
1777 unsigned ADPRE4
: 1;
1778 unsigned ADPRE5
: 1;
1779 unsigned ADPRE6
: 1;
1780 unsigned ADPRE7
: 1;
1783 extern __at(0x009C) volatile __ADPREbits_t ADPREbits
;
1785 #define _ADPRE0 0x01
1786 #define _ADPRE1 0x02
1787 #define _ADPRE2 0x04
1788 #define _ADPRE3 0x08
1789 #define _ADPRE4 0x10
1790 #define _ADPRE5 0x20
1791 #define _ADPRE6 0x40
1792 #define _ADPRE7 0x80
1794 //==============================================================================
1797 //==============================================================================
1800 extern __at(0x009D) __sfr ADACQ
;
1804 unsigned ADACQ0
: 1;
1805 unsigned ADACQ1
: 1;
1806 unsigned ADACQ2
: 1;
1807 unsigned ADACQ3
: 1;
1808 unsigned ADACQ4
: 1;
1809 unsigned ADACQ5
: 1;
1810 unsigned ADACQ6
: 1;
1811 unsigned ADACQ7
: 1;
1814 extern __at(0x009D) volatile __ADACQbits_t ADACQbits
;
1816 #define _ADACQ0 0x01
1817 #define _ADACQ1 0x02
1818 #define _ADACQ2 0x04
1819 #define _ADACQ3 0x08
1820 #define _ADACQ4 0x10
1821 #define _ADACQ5 0x20
1822 #define _ADACQ6 0x40
1823 #define _ADACQ7 0x80
1825 //==============================================================================
1828 //==============================================================================
1831 extern __at(0x009E) __sfr ADPCH
;
1837 unsigned ADPCH0
: 1;
1838 unsigned ADPCH1
: 1;
1839 unsigned ADPCH2
: 1;
1840 unsigned ADPCH3
: 1;
1841 unsigned ADPCH4
: 1;
1842 unsigned ADPCH5
: 1;
1854 extern __at(0x009E) volatile __ADPCHbits_t ADPCHbits
;
1856 #define _ADPCH0 0x01
1857 #define _ADPCH1 0x02
1858 #define _ADPCH2 0x04
1859 #define _ADPCH3 0x08
1860 #define _ADPCH4 0x10
1861 #define _ADPCH5 0x20
1863 //==============================================================================
1866 //==============================================================================
1869 extern __at(0x010C) __sfr ADCNT
;
1873 unsigned ADCNT0
: 1;
1874 unsigned ADCNT1
: 1;
1875 unsigned ADCNT2
: 1;
1876 unsigned ADCNT3
: 1;
1877 unsigned ADCNT4
: 1;
1878 unsigned ADCNT5
: 1;
1879 unsigned ADCNT6
: 1;
1880 unsigned ADCNT7
: 1;
1883 extern __at(0x010C) volatile __ADCNTbits_t ADCNTbits
;
1885 #define _ADCNT0 0x01
1886 #define _ADCNT1 0x02
1887 #define _ADCNT2 0x04
1888 #define _ADCNT3 0x08
1889 #define _ADCNT4 0x10
1890 #define _ADCNT5 0x20
1891 #define _ADCNT6 0x40
1892 #define _ADCNT7 0x80
1894 //==============================================================================
1897 //==============================================================================
1900 extern __at(0x010D) __sfr ADRPT
;
1904 unsigned ADRPT0
: 1;
1905 unsigned ADRPT1
: 1;
1906 unsigned ADRPT2
: 1;
1907 unsigned ADRPT3
: 1;
1908 unsigned ADRPT4
: 1;
1909 unsigned ADRPT5
: 1;
1910 unsigned ADRPT6
: 1;
1911 unsigned ADRPT7
: 1;
1914 extern __at(0x010D) volatile __ADRPTbits_t ADRPTbits
;
1916 #define _ADRPT0 0x01
1917 #define _ADRPT1 0x02
1918 #define _ADRPT2 0x04
1919 #define _ADRPT3 0x08
1920 #define _ADRPT4 0x10
1921 #define _ADRPT5 0x20
1922 #define _ADRPT6 0x40
1923 #define _ADRPT7 0x80
1925 //==============================================================================
1927 extern __at(0x010E) __sfr ADLTH
;
1929 //==============================================================================
1932 extern __at(0x010E) __sfr ADLTHL
;
1936 unsigned ADLTH0
: 1;
1937 unsigned ADLTH1
: 1;
1938 unsigned ADLTH2
: 1;
1939 unsigned ADLTH3
: 1;
1940 unsigned ADLTH4
: 1;
1941 unsigned ADLTH5
: 1;
1942 unsigned ADLTH6
: 1;
1943 unsigned ADLTH7
: 1;
1946 extern __at(0x010E) volatile __ADLTHLbits_t ADLTHLbits
;
1948 #define _ADLTH0 0x01
1949 #define _ADLTH1 0x02
1950 #define _ADLTH2 0x04
1951 #define _ADLTH3 0x08
1952 #define _ADLTH4 0x10
1953 #define _ADLTH5 0x20
1954 #define _ADLTH6 0x40
1955 #define _ADLTH7 0x80
1957 //==============================================================================
1960 //==============================================================================
1963 extern __at(0x010F) __sfr ADLTHH
;
1967 unsigned ADLTH8
: 1;
1968 unsigned ADLTH9
: 1;
1969 unsigned ADLTH10
: 1;
1970 unsigned ADLTH11
: 1;
1971 unsigned ADLTH12
: 1;
1972 unsigned ADLTH13
: 1;
1973 unsigned ADLTH14
: 1;
1974 unsigned ADLTH15
: 1;
1977 extern __at(0x010F) volatile __ADLTHHbits_t ADLTHHbits
;
1979 #define _ADLTH8 0x01
1980 #define _ADLTH9 0x02
1981 #define _ADLTH10 0x04
1982 #define _ADLTH11 0x08
1983 #define _ADLTH12 0x10
1984 #define _ADLTH13 0x20
1985 #define _ADLTH14 0x40
1986 #define _ADLTH15 0x80
1988 //==============================================================================
1990 extern __at(0x0110) __sfr ADUTH
;
1992 //==============================================================================
1995 extern __at(0x0110) __sfr ADUTHL
;
1999 unsigned ADUTH0
: 1;
2000 unsigned ADUTH1
: 1;
2001 unsigned ADUTH2
: 1;
2002 unsigned ADUTH3
: 1;
2003 unsigned ADUTH4
: 1;
2004 unsigned ADUTH5
: 1;
2005 unsigned ADUTH6
: 1;
2006 unsigned ADUTH7
: 1;
2009 extern __at(0x0110) volatile __ADUTHLbits_t ADUTHLbits
;
2011 #define _ADUTH0 0x01
2012 #define _ADUTH1 0x02
2013 #define _ADUTH2 0x04
2014 #define _ADUTH3 0x08
2015 #define _ADUTH4 0x10
2016 #define _ADUTH5 0x20
2017 #define _ADUTH6 0x40
2018 #define _ADUTH7 0x80
2020 //==============================================================================
2023 //==============================================================================
2026 extern __at(0x0111) __sfr ADUTHH
;
2030 unsigned ADUTH8
: 1;
2031 unsigned ADUTH9
: 1;
2032 unsigned ADUTH10
: 1;
2033 unsigned ADUTH11
: 1;
2034 unsigned ADUTH12
: 1;
2035 unsigned ADUTH13
: 1;
2036 unsigned ADUTH14
: 1;
2037 unsigned ADUTH15
: 1;
2040 extern __at(0x0111) volatile __ADUTHHbits_t ADUTHHbits
;
2042 #define _ADUTH8 0x01
2043 #define _ADUTH9 0x02
2044 #define _ADUTH10 0x04
2045 #define _ADUTH11 0x08
2046 #define _ADUTH12 0x10
2047 #define _ADUTH13 0x20
2048 #define _ADUTH14 0x40
2049 #define _ADUTH15 0x80
2051 //==============================================================================
2053 extern __at(0x0112) __sfr ADSTPT
;
2055 //==============================================================================
2058 extern __at(0x0112) __sfr ADSTPTL
;
2062 unsigned ADSTPT0
: 1;
2063 unsigned ADSTPT1
: 1;
2064 unsigned ADSTPT2
: 1;
2065 unsigned ADSTPT3
: 1;
2066 unsigned ADSTPT4
: 1;
2067 unsigned ADSTPT5
: 1;
2068 unsigned ADSTPT6
: 1;
2069 unsigned ADSTPT7
: 1;
2072 extern __at(0x0112) volatile __ADSTPTLbits_t ADSTPTLbits
;
2074 #define _ADSTPT0 0x01
2075 #define _ADSTPT1 0x02
2076 #define _ADSTPT2 0x04
2077 #define _ADSTPT3 0x08
2078 #define _ADSTPT4 0x10
2079 #define _ADSTPT5 0x20
2080 #define _ADSTPT6 0x40
2081 #define _ADSTPT7 0x80
2083 //==============================================================================
2086 //==============================================================================
2089 extern __at(0x0113) __sfr ADSTPTH
;
2093 unsigned ADSTPT8
: 1;
2094 unsigned ADSTPT9
: 1;
2095 unsigned ADSTPT10
: 1;
2096 unsigned ADSTPT11
: 1;
2097 unsigned ADSTPT12
: 1;
2098 unsigned ADSTPT13
: 1;
2099 unsigned ADSTPT14
: 1;
2100 unsigned ADSTPT15
: 1;
2103 extern __at(0x0113) volatile __ADSTPTHbits_t ADSTPTHbits
;
2105 #define _ADSTPT8 0x01
2106 #define _ADSTPT9 0x02
2107 #define _ADSTPT10 0x04
2108 #define _ADSTPT11 0x08
2109 #define _ADSTPT12 0x10
2110 #define _ADSTPT13 0x20
2111 #define _ADSTPT14 0x40
2112 #define _ADSTPT15 0x80
2114 //==============================================================================
2116 extern __at(0x0114) __sfr ADFLTR
;
2118 //==============================================================================
2121 extern __at(0x0114) __sfr ADFLTRL
;
2125 unsigned ADFLTR0
: 1;
2126 unsigned ADFLTR1
: 1;
2127 unsigned ADFLTR2
: 1;
2128 unsigned ADFLTR3
: 1;
2129 unsigned ADFLTR4
: 1;
2130 unsigned ADFLTR5
: 1;
2131 unsigned ADFLTR6
: 1;
2132 unsigned ADFLTR7
: 1;
2135 extern __at(0x0114) volatile __ADFLTRLbits_t ADFLTRLbits
;
2137 #define _ADFLTR0 0x01
2138 #define _ADFLTR1 0x02
2139 #define _ADFLTR2 0x04
2140 #define _ADFLTR3 0x08
2141 #define _ADFLTR4 0x10
2142 #define _ADFLTR5 0x20
2143 #define _ADFLTR6 0x40
2144 #define _ADFLTR7 0x80
2146 //==============================================================================
2149 //==============================================================================
2152 extern __at(0x0115) __sfr ADFLTRH
;
2156 unsigned ADFLTR8
: 1;
2157 unsigned ADFLTR9
: 1;
2158 unsigned ADFLTR10
: 1;
2159 unsigned ADFLTR11
: 1;
2160 unsigned ADFLTR12
: 1;
2161 unsigned ADFLTR13
: 1;
2162 unsigned ADFLTR14
: 1;
2163 unsigned ADFLTR15
: 1;
2166 extern __at(0x0115) volatile __ADFLTRHbits_t ADFLTRHbits
;
2168 #define _ADFLTR8 0x01
2169 #define _ADFLTR9 0x02
2170 #define _ADFLTR10 0x04
2171 #define _ADFLTR11 0x08
2172 #define _ADFLTR12 0x10
2173 #define _ADFLTR13 0x20
2174 #define _ADFLTR14 0x40
2175 #define _ADFLTR15 0x80
2177 //==============================================================================
2179 extern __at(0x0116) __sfr ADERR
;
2181 //==============================================================================
2184 extern __at(0x0116) __sfr ADERRL
;
2188 unsigned ADERR0
: 1;
2189 unsigned ADERR1
: 1;
2190 unsigned ADERR2
: 1;
2191 unsigned ADERR3
: 1;
2192 unsigned ADERR4
: 1;
2193 unsigned ADERR5
: 1;
2194 unsigned ADERR6
: 1;
2195 unsigned ADERR7
: 1;
2198 extern __at(0x0116) volatile __ADERRLbits_t ADERRLbits
;
2200 #define _ADERR0 0x01
2201 #define _ADERR1 0x02
2202 #define _ADERR2 0x04
2203 #define _ADERR3 0x08
2204 #define _ADERR4 0x10
2205 #define _ADERR5 0x20
2206 #define _ADERR6 0x40
2207 #define _ADERR7 0x80
2209 //==============================================================================
2212 //==============================================================================
2215 extern __at(0x0117) __sfr ADERRH
;
2219 unsigned ADERR8
: 1;
2220 unsigned ADERR9
: 1;
2221 unsigned ADERR10
: 1;
2222 unsigned ADERR11
: 1;
2223 unsigned ADERR12
: 1;
2224 unsigned ADERR13
: 1;
2225 unsigned ADERR14
: 1;
2226 unsigned ADERR15
: 1;
2229 extern __at(0x0117) volatile __ADERRHbits_t ADERRHbits
;
2231 #define _ADERR8 0x01
2232 #define _ADERR9 0x02
2233 #define _ADERR10 0x04
2234 #define _ADERR11 0x08
2235 #define _ADERR12 0x10
2236 #define _ADERR13 0x20
2237 #define _ADERR14 0x40
2238 #define _ADERR15 0x80
2240 //==============================================================================
2242 extern __at(0x0119) __sfr RC1REG
;
2243 extern __at(0x0119) __sfr RCREG
;
2244 extern __at(0x0119) __sfr RCREG1
;
2245 extern __at(0x011A) __sfr TX1REG
;
2246 extern __at(0x011A) __sfr TXREG
;
2247 extern __at(0x011A) __sfr TXREG1
;
2248 extern __at(0x011B) __sfr SP1BRG
;
2249 extern __at(0x011B) __sfr SP1BRGL
;
2250 extern __at(0x011B) __sfr SPBRG
;
2251 extern __at(0x011B) __sfr SPBRG1
;
2252 extern __at(0x011B) __sfr SPBRGL
;
2253 extern __at(0x011C) __sfr SP1BRGH
;
2254 extern __at(0x011C) __sfr SPBRGH
;
2255 extern __at(0x011C) __sfr SPBRGH1
;
2257 //==============================================================================
2260 extern __at(0x011D) __sfr RC1STA
;
2274 extern __at(0x011D) volatile __RC1STAbits_t RC1STAbits
;
2285 //==============================================================================
2288 //==============================================================================
2291 extern __at(0x011D) __sfr RCSTA
;
2305 extern __at(0x011D) volatile __RCSTAbits_t RCSTAbits
;
2307 #define _RCSTA_RX9D 0x01
2308 #define _RCSTA_OERR 0x02
2309 #define _RCSTA_FERR 0x04
2310 #define _RCSTA_ADDEN 0x08
2311 #define _RCSTA_CREN 0x10
2312 #define _RCSTA_SREN 0x20
2313 #define _RCSTA_RX9 0x40
2314 #define _RCSTA_SPEN 0x80
2316 //==============================================================================
2319 //==============================================================================
2322 extern __at(0x011D) __sfr RCSTA1
;
2336 extern __at(0x011D) volatile __RCSTA1bits_t RCSTA1bits
;
2338 #define _RCSTA1_RX9D 0x01
2339 #define _RCSTA1_OERR 0x02
2340 #define _RCSTA1_FERR 0x04
2341 #define _RCSTA1_ADDEN 0x08
2342 #define _RCSTA1_CREN 0x10
2343 #define _RCSTA1_SREN 0x20
2344 #define _RCSTA1_RX9 0x40
2345 #define _RCSTA1_SPEN 0x80
2347 //==============================================================================
2350 //==============================================================================
2353 extern __at(0x011E) __sfr TX1STA
;
2367 extern __at(0x011E) volatile __TX1STAbits_t TX1STAbits
;
2369 #define _TX1STA_TX9D 0x01
2370 #define _TX1STA_TRMT 0x02
2371 #define _TX1STA_BRGH 0x04
2372 #define _TX1STA_SENDB 0x08
2373 #define _TX1STA_SYNC 0x10
2374 #define _TX1STA_TXEN 0x20
2375 #define _TX1STA_TX9 0x40
2376 #define _TX1STA_CSRC 0x80
2378 //==============================================================================
2381 //==============================================================================
2384 extern __at(0x011E) __sfr TXSTA
;
2398 extern __at(0x011E) volatile __TXSTAbits_t TXSTAbits
;
2400 #define _TXSTA_TX9D 0x01
2401 #define _TXSTA_TRMT 0x02
2402 #define _TXSTA_BRGH 0x04
2403 #define _TXSTA_SENDB 0x08
2404 #define _TXSTA_SYNC 0x10
2405 #define _TXSTA_TXEN 0x20
2406 #define _TXSTA_TX9 0x40
2407 #define _TXSTA_CSRC 0x80
2409 //==============================================================================
2412 //==============================================================================
2415 extern __at(0x011E) __sfr TXSTA1
;
2429 extern __at(0x011E) volatile __TXSTA1bits_t TXSTA1bits
;
2431 #define _TXSTA1_TX9D 0x01
2432 #define _TXSTA1_TRMT 0x02
2433 #define _TXSTA1_BRGH 0x04
2434 #define _TXSTA1_SENDB 0x08
2435 #define _TXSTA1_SYNC 0x10
2436 #define _TXSTA1_TXEN 0x20
2437 #define _TXSTA1_TX9 0x40
2438 #define _TXSTA1_CSRC 0x80
2440 //==============================================================================
2443 //==============================================================================
2446 extern __at(0x011F) __sfr BAUD1CON
;
2457 unsigned ABDOVF
: 1;
2460 extern __at(0x011F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2467 #define _ABDOVF 0x80
2469 //==============================================================================
2472 //==============================================================================
2475 extern __at(0x011F) __sfr BAUDCON
;
2486 unsigned ABDOVF
: 1;
2489 extern __at(0x011F) volatile __BAUDCONbits_t BAUDCONbits
;
2491 #define _BAUDCON_ABDEN 0x01
2492 #define _BAUDCON_WUE 0x02
2493 #define _BAUDCON_BRG16 0x08
2494 #define _BAUDCON_SCKP 0x10
2495 #define _BAUDCON_RCIDL 0x40
2496 #define _BAUDCON_ABDOVF 0x80
2498 //==============================================================================
2501 //==============================================================================
2504 extern __at(0x011F) __sfr BAUDCON1
;
2515 unsigned ABDOVF
: 1;
2518 extern __at(0x011F) volatile __BAUDCON1bits_t BAUDCON1bits
;
2520 #define _BAUDCON1_ABDEN 0x01
2521 #define _BAUDCON1_WUE 0x02
2522 #define _BAUDCON1_BRG16 0x08
2523 #define _BAUDCON1_SCKP 0x10
2524 #define _BAUDCON1_RCIDL 0x40
2525 #define _BAUDCON1_ABDOVF 0x80
2527 //==============================================================================
2530 //==============================================================================
2533 extern __at(0x011F) __sfr BAUDCTL
;
2544 unsigned ABDOVF
: 1;
2547 extern __at(0x011F) volatile __BAUDCTLbits_t BAUDCTLbits
;
2549 #define _BAUDCTL_ABDEN 0x01
2550 #define _BAUDCTL_WUE 0x02
2551 #define _BAUDCTL_BRG16 0x08
2552 #define _BAUDCTL_SCKP 0x10
2553 #define _BAUDCTL_RCIDL 0x40
2554 #define _BAUDCTL_ABDOVF 0x80
2556 //==============================================================================
2559 //==============================================================================
2562 extern __at(0x011F) __sfr BAUDCTL1
;
2573 unsigned ABDOVF
: 1;
2576 extern __at(0x011F) volatile __BAUDCTL1bits_t BAUDCTL1bits
;
2578 #define _BAUDCTL1_ABDEN 0x01
2579 #define _BAUDCTL1_WUE 0x02
2580 #define _BAUDCTL1_BRG16 0x08
2581 #define _BAUDCTL1_SCKP 0x10
2582 #define _BAUDCTL1_RCIDL 0x40
2583 #define _BAUDCTL1_ABDOVF 0x80
2585 //==============================================================================
2587 extern __at(0x018C) __sfr SSP1BUF
;
2588 extern __at(0x018D) __sfr SSP1ADD
;
2590 //==============================================================================
2593 extern __at(0x018E) __sfr SSP1MSK
;
2607 extern __at(0x018E) volatile __SSP1MSKbits_t SSP1MSKbits
;
2618 //==============================================================================
2621 //==============================================================================
2624 extern __at(0x018F) __sfr SSP1STAT
;
2632 unsigned R_NOT_W
: 1;
2635 unsigned D_NOT_A
: 1;
2645 unsigned I2C_START
: 1;
2646 unsigned I2C_STOP
: 1;
2668 unsigned NOT_WRITE
: 1;
2671 unsigned NOT_ADDRESS
: 1;
2680 unsigned READ_WRITE
: 1;
2683 unsigned DATA_ADDRESS
: 1;
2692 unsigned I2C_READ
: 1;
2695 unsigned I2C_DAT
: 1;
2701 extern __at(0x018F) volatile __SSP1STATbits_t SSP1STATbits
;
2705 #define _R_NOT_W 0x04
2708 #define _NOT_WRITE 0x04
2709 #define _READ_WRITE 0x04
2710 #define _I2C_READ 0x04
2712 #define _I2C_START 0x08
2714 #define _I2C_STOP 0x10
2715 #define _D_NOT_A 0x20
2718 #define _NOT_ADDRESS 0x20
2719 #define _DATA_ADDRESS 0x20
2720 #define _I2C_DAT 0x20
2724 //==============================================================================
2727 //==============================================================================
2730 extern __at(0x0190) __sfr SSP1CON1
;
2753 extern __at(0x0190) volatile __SSP1CON1bits_t SSP1CON1bits
;
2764 //==============================================================================
2767 //==============================================================================
2770 extern __at(0x0191) __sfr SSP1CON2
;
2782 unsigned ACKSTAT
: 1;
2789 unsigned ADMSK1
: 1;
2790 unsigned ADMSK2
: 1;
2791 unsigned ADMSK3
: 1;
2792 unsigned ADMSK4
: 1;
2793 unsigned ADMSK5
: 1;
2799 extern __at(0x0191) volatile __SSP1CON2bits_t SSP1CON2bits
;
2803 #define _ADMSK1 0x02
2805 #define _ADMSK2 0x04
2807 #define _ADMSK3 0x08
2809 #define _ADMSK4 0x10
2811 #define _ADMSK5 0x20
2812 #define _ACKSTAT 0x40
2815 //==============================================================================
2818 //==============================================================================
2821 extern __at(0x0192) __sfr SSP1CON3
;
2832 unsigned ACKTIM
: 1;
2835 extern __at(0x0192) volatile __SSP1CON3bits_t SSP1CON3bits
;
2844 #define _ACKTIM 0x80
2846 //==============================================================================
2848 extern __at(0x0196) __sfr SSP2BUF
;
2849 extern __at(0x0197) __sfr SSP2ADD
;
2851 //==============================================================================
2854 extern __at(0x0198) __sfr SSP2MSK
;
2868 extern __at(0x0198) volatile __SSP2MSKbits_t SSP2MSKbits
;
2870 #define _SSP2MSK_MSK0 0x01
2871 #define _SSP2MSK_MSK1 0x02
2872 #define _SSP2MSK_MSK2 0x04
2873 #define _SSP2MSK_MSK3 0x08
2874 #define _SSP2MSK_MSK4 0x10
2875 #define _SSP2MSK_MSK5 0x20
2876 #define _SSP2MSK_MSK6 0x40
2877 #define _SSP2MSK_MSK7 0x80
2879 //==============================================================================
2882 //==============================================================================
2885 extern __at(0x0199) __sfr SSP2STAT
;
2893 unsigned R_NOT_W
: 1;
2896 unsigned D_NOT_A
: 1;
2906 unsigned I2C_START
: 1;
2907 unsigned I2C_STOP
: 1;
2929 unsigned NOT_WRITE
: 1;
2932 unsigned NOT_ADDRESS
: 1;
2941 unsigned READ_WRITE
: 1;
2944 unsigned DATA_ADDRESS
: 1;
2953 unsigned I2C_READ
: 1;
2956 unsigned I2C_DAT
: 1;
2962 extern __at(0x0199) volatile __SSP2STATbits_t SSP2STATbits
;
2964 #define _SSP2STAT_BF 0x01
2965 #define _SSP2STAT_UA 0x02
2966 #define _SSP2STAT_R_NOT_W 0x04
2967 #define _SSP2STAT_R_W 0x04
2968 #define _SSP2STAT_NOT_W 0x04
2969 #define _SSP2STAT_NOT_WRITE 0x04
2970 #define _SSP2STAT_READ_WRITE 0x04
2971 #define _SSP2STAT_I2C_READ 0x04
2972 #define _SSP2STAT_S 0x08
2973 #define _SSP2STAT_I2C_START 0x08
2974 #define _SSP2STAT_P 0x10
2975 #define _SSP2STAT_I2C_STOP 0x10
2976 #define _SSP2STAT_D_NOT_A 0x20
2977 #define _SSP2STAT_D_A 0x20
2978 #define _SSP2STAT_NOT_A 0x20
2979 #define _SSP2STAT_NOT_ADDRESS 0x20
2980 #define _SSP2STAT_DATA_ADDRESS 0x20
2981 #define _SSP2STAT_I2C_DAT 0x20
2982 #define _SSP2STAT_CKE 0x40
2983 #define _SSP2STAT_SMP 0x80
2985 //==============================================================================
2988 //==============================================================================
2991 extern __at(0x019A) __sfr SSP2CON1
;
3014 extern __at(0x019A) volatile __SSP2CON1bits_t SSP2CON1bits
;
3016 #define _SSP2CON1_SSPM0 0x01
3017 #define _SSP2CON1_SSPM1 0x02
3018 #define _SSP2CON1_SSPM2 0x04
3019 #define _SSP2CON1_SSPM3 0x08
3020 #define _SSP2CON1_CKP 0x10
3021 #define _SSP2CON1_SSPEN 0x20
3022 #define _SSP2CON1_SSPOV 0x40
3023 #define _SSP2CON1_WCOL 0x80
3025 //==============================================================================
3028 //==============================================================================
3031 extern __at(0x019B) __sfr SSP2CON2
;
3043 unsigned ACKSTAT
: 1;
3050 unsigned ADMSK1
: 1;
3051 unsigned ADMSK2
: 1;
3052 unsigned ADMSK3
: 1;
3053 unsigned ADMSK4
: 1;
3054 unsigned ADMSK5
: 1;
3060 extern __at(0x019B) volatile __SSP2CON2bits_t SSP2CON2bits
;
3062 #define _SSP2CON2_SEN 0x01
3063 #define _SSP2CON2_RSEN 0x02
3064 #define _SSP2CON2_ADMSK1 0x02
3065 #define _SSP2CON2_PEN 0x04
3066 #define _SSP2CON2_ADMSK2 0x04
3067 #define _SSP2CON2_RCEN 0x08
3068 #define _SSP2CON2_ADMSK3 0x08
3069 #define _SSP2CON2_ACKEN 0x10
3070 #define _SSP2CON2_ADMSK4 0x10
3071 #define _SSP2CON2_ACKDT 0x20
3072 #define _SSP2CON2_ADMSK5 0x20
3073 #define _SSP2CON2_ACKSTAT 0x40
3074 #define _SSP2CON2_GCEN 0x80
3076 //==============================================================================
3079 //==============================================================================
3082 extern __at(0x019C) __sfr SSP2CON3
;
3093 unsigned ACKTIM
: 1;
3096 extern __at(0x019C) volatile __SSP2CON3bits_t SSP2CON3bits
;
3098 #define _SSP2CON3_DHEN 0x01
3099 #define _SSP2CON3_AHEN 0x02
3100 #define _SSP2CON3_SBCDE 0x04
3101 #define _SSP2CON3_SDAHT 0x08
3102 #define _SSP2CON3_BOEN 0x10
3103 #define _SSP2CON3_SCIE 0x20
3104 #define _SSP2CON3_PCIE 0x40
3105 #define _SSP2CON3_ACKTIM 0x80
3107 //==============================================================================
3110 //==============================================================================
3113 extern __at(0x020C) __sfr TMR1L
;
3117 unsigned TMR1L0
: 1;
3118 unsigned TMR1L1
: 1;
3119 unsigned TMR1L2
: 1;
3120 unsigned TMR1L3
: 1;
3121 unsigned TMR1L4
: 1;
3122 unsigned TMR1L5
: 1;
3123 unsigned TMR1L6
: 1;
3124 unsigned TMR1L7
: 1;
3127 extern __at(0x020C) volatile __TMR1Lbits_t TMR1Lbits
;
3129 #define _TMR1L0 0x01
3130 #define _TMR1L1 0x02
3131 #define _TMR1L2 0x04
3132 #define _TMR1L3 0x08
3133 #define _TMR1L4 0x10
3134 #define _TMR1L5 0x20
3135 #define _TMR1L6 0x40
3136 #define _TMR1L7 0x80
3138 //==============================================================================
3141 //==============================================================================
3144 extern __at(0x020D) __sfr TMR1H
;
3148 unsigned TMR1H0
: 1;
3149 unsigned TMR1H1
: 1;
3150 unsigned TMR1H2
: 1;
3151 unsigned TMR1H3
: 1;
3152 unsigned TMR1H4
: 1;
3153 unsigned TMR1H5
: 1;
3154 unsigned TMR1H6
: 1;
3155 unsigned TMR1H7
: 1;
3158 extern __at(0x020D) volatile __TMR1Hbits_t TMR1Hbits
;
3160 #define _TMR1H0 0x01
3161 #define _TMR1H1 0x02
3162 #define _TMR1H2 0x04
3163 #define _TMR1H3 0x08
3164 #define _TMR1H4 0x10
3165 #define _TMR1H5 0x20
3166 #define _TMR1H6 0x40
3167 #define _TMR1H7 0x80
3169 //==============================================================================
3172 //==============================================================================
3175 extern __at(0x020E) __sfr T1CON
;
3183 unsigned NOT_SYNC
: 1;
3185 unsigned T1CKPS0
: 1;
3186 unsigned T1CKPS1
: 1;
3193 unsigned TMR1ON
: 1;
3194 unsigned T1RD16
: 1;
3195 unsigned NOT_T1SYNC
: 1;
3213 unsigned T1CKPS
: 2;
3218 extern __at(0x020E) volatile __T1CONbits_t T1CONbits
;
3220 #define _T1CON_ON 0x01
3221 #define _T1CON_TMR1ON 0x01
3222 #define _T1CON_RD16 0x02
3223 #define _T1CON_T1RD16 0x02
3224 #define _T1CON_NOT_SYNC 0x04
3225 #define _T1CON_NOT_T1SYNC 0x04
3226 #define _T1CON_T1CKPS0 0x10
3227 #define _T1CON_CKPS0 0x10
3228 #define _T1CON_T1CKPS1 0x20
3229 #define _T1CON_CKPS1 0x20
3231 //==============================================================================
3234 //==============================================================================
3237 extern __at(0x020F) __sfr PR1
;
3246 unsigned GGO_NOT_DONE
: 1;
3257 unsigned T1GVAL
: 1;
3258 unsigned T1GGO_NOT_DONE
: 1;
3259 unsigned T1GSPM
: 1;
3261 unsigned T1GPOL
: 1;
3278 extern __at(0x020F) volatile __PR1bits_t PR1bits
;
3281 #define _T1GVAL 0x04
3282 #define _GGO_NOT_DONE 0x08
3283 #define _T1GGO_NOT_DONE 0x08
3286 #define _T1GSPM 0x10
3290 #define _T1GPOL 0x40
3294 //==============================================================================
3297 //==============================================================================
3300 extern __at(0x020F) __sfr T1GCON
;
3309 unsigned GGO_NOT_DONE
: 1;
3320 unsigned T1GVAL
: 1;
3321 unsigned T1GGO_NOT_DONE
: 1;
3322 unsigned T1GSPM
: 1;
3324 unsigned T1GPOL
: 1;
3341 extern __at(0x020F) volatile __T1GCONbits_t T1GCONbits
;
3343 #define _T1GCON_GVAL 0x04
3344 #define _T1GCON_T1GVAL 0x04
3345 #define _T1GCON_GGO_NOT_DONE 0x08
3346 #define _T1GCON_T1GGO_NOT_DONE 0x08
3347 #define _T1GCON_T1GGO 0x08
3348 #define _T1GCON_GSPM 0x10
3349 #define _T1GCON_T1GSPM 0x10
3350 #define _T1GCON_GTM 0x20
3351 #define _T1GCON_T1GTM 0x20
3352 #define _T1GCON_GPOL 0x40
3353 #define _T1GCON_T1GPOL 0x40
3354 #define _T1GCON_GE 0x80
3355 #define _T1GCON_T1GE 0x80
3357 //==============================================================================
3360 //==============================================================================
3363 extern __at(0x0210) __sfr T1GATE
;
3381 unsigned T1GSS0
: 1;
3382 unsigned T1GSS1
: 1;
3383 unsigned T1GSS2
: 1;
3384 unsigned T1GSS3
: 1;
3385 unsigned T1GSS4
: 1;
3404 extern __at(0x0210) volatile __T1GATEbits_t T1GATEbits
;
3407 #define _T1GSS0 0x01
3409 #define _T1GSS1 0x02
3411 #define _T1GSS2 0x04
3413 #define _T1GSS3 0x08
3415 #define _T1GSS4 0x10
3417 //==============================================================================
3420 //==============================================================================
3423 extern __at(0x0210) __sfr TMR1GATE
;
3441 unsigned T1GSS0
: 1;
3442 unsigned T1GSS1
: 1;
3443 unsigned T1GSS2
: 1;
3444 unsigned T1GSS3
: 1;
3445 unsigned T1GSS4
: 1;
3464 extern __at(0x0210) volatile __TMR1GATEbits_t TMR1GATEbits
;
3466 #define _TMR1GATE_GSS0 0x01
3467 #define _TMR1GATE_T1GSS0 0x01
3468 #define _TMR1GATE_GSS1 0x02
3469 #define _TMR1GATE_T1GSS1 0x02
3470 #define _TMR1GATE_GSS2 0x04
3471 #define _TMR1GATE_T1GSS2 0x04
3472 #define _TMR1GATE_GSS3 0x08
3473 #define _TMR1GATE_T1GSS3 0x08
3474 #define _TMR1GATE_GSS4 0x10
3475 #define _TMR1GATE_T1GSS4 0x10
3477 //==============================================================================
3480 //==============================================================================
3483 extern __at(0x0211) __sfr T1CLK
;
3524 extern __at(0x0211) volatile __T1CLKbits_t T1CLKbits
;
3535 //==============================================================================
3538 //==============================================================================
3541 extern __at(0x0211) __sfr TMR1CLK
;
3582 extern __at(0x0211) volatile __TMR1CLKbits_t TMR1CLKbits
;
3584 #define _TMR1CLK_T1CS0 0x01
3585 #define _TMR1CLK_CS0 0x01
3586 #define _TMR1CLK_T1CS1 0x02
3587 #define _TMR1CLK_CS1 0x02
3588 #define _TMR1CLK_T1CS2 0x04
3589 #define _TMR1CLK_CS2 0x04
3590 #define _TMR1CLK_T1CS3 0x08
3591 #define _TMR1CLK_CS3 0x08
3593 //==============================================================================
3596 //==============================================================================
3599 extern __at(0x0212) __sfr TMR3L
;
3603 unsigned TMR3L0
: 1;
3604 unsigned TMR3L1
: 1;
3605 unsigned TMR3L2
: 1;
3606 unsigned TMR3L3
: 1;
3607 unsigned TMR3L4
: 1;
3608 unsigned TMR3L5
: 1;
3609 unsigned TMR3L6
: 1;
3610 unsigned TMR3L7
: 1;
3613 extern __at(0x0212) volatile __TMR3Lbits_t TMR3Lbits
;
3615 #define _TMR3L0 0x01
3616 #define _TMR3L1 0x02
3617 #define _TMR3L2 0x04
3618 #define _TMR3L3 0x08
3619 #define _TMR3L4 0x10
3620 #define _TMR3L5 0x20
3621 #define _TMR3L6 0x40
3622 #define _TMR3L7 0x80
3624 //==============================================================================
3627 //==============================================================================
3630 extern __at(0x0213) __sfr TMR3H
;
3634 unsigned TMR3H0
: 1;
3635 unsigned TMR3H1
: 1;
3636 unsigned TMR3H2
: 1;
3637 unsigned TMR3H3
: 1;
3638 unsigned TMR3H4
: 1;
3639 unsigned TMR3H5
: 1;
3640 unsigned TMR3H6
: 1;
3641 unsigned TMR3H7
: 1;
3644 extern __at(0x0213) volatile __TMR3Hbits_t TMR3Hbits
;
3646 #define _TMR3H0 0x01
3647 #define _TMR3H1 0x02
3648 #define _TMR3H2 0x04
3649 #define _TMR3H3 0x08
3650 #define _TMR3H4 0x10
3651 #define _TMR3H5 0x20
3652 #define _TMR3H6 0x40
3653 #define _TMR3H7 0x80
3655 //==============================================================================
3658 //==============================================================================
3661 extern __at(0x0214) __sfr T3CON
;
3669 unsigned NOT_SYNC
: 1;
3671 unsigned T3CKPS0
: 1;
3672 unsigned T3CKPS1
: 1;
3679 unsigned TMR3ON
: 1;
3680 unsigned T3RD16
: 1;
3681 unsigned NOT_T3SYNC
: 1;
3699 unsigned T3CKPS
: 2;
3704 extern __at(0x0214) volatile __T3CONbits_t T3CONbits
;
3706 #define _T3CON_ON 0x01
3707 #define _T3CON_TMR3ON 0x01
3708 #define _T3CON_RD16 0x02
3709 #define _T3CON_T3RD16 0x02
3710 #define _T3CON_NOT_SYNC 0x04
3711 #define _T3CON_NOT_T3SYNC 0x04
3712 #define _T3CON_T3CKPS0 0x10
3713 #define _T3CON_CKPS0 0x10
3714 #define _T3CON_T3CKPS1 0x20
3715 #define _T3CON_CKPS1 0x20
3717 //==============================================================================
3720 //==============================================================================
3723 extern __at(0x0215) __sfr PR3
;
3732 unsigned GGO_NOT_DONE
: 1;
3743 unsigned T3GVAL
: 1;
3744 unsigned T3GGO_NOT_DONE
: 1;
3745 unsigned T3GSPM
: 1;
3747 unsigned T3GPOL
: 1;
3764 extern __at(0x0215) volatile __PR3bits_t PR3bits
;
3766 #define _PR3_GVAL 0x04
3767 #define _PR3_T3GVAL 0x04
3768 #define _PR3_GGO_NOT_DONE 0x08
3769 #define _PR3_T3GGO_NOT_DONE 0x08
3770 #define _PR3_T3GGO 0x08
3771 #define _PR3_GSPM 0x10
3772 #define _PR3_T3GSPM 0x10
3773 #define _PR3_GTM 0x20
3774 #define _PR3_T3GTM 0x20
3775 #define _PR3_GPOL 0x40
3776 #define _PR3_T3GPOL 0x40
3777 #define _PR3_GE 0x80
3778 #define _PR3_T3GE 0x80
3780 //==============================================================================
3783 //==============================================================================
3786 extern __at(0x0215) __sfr T3GCON
;
3795 unsigned GGO_NOT_DONE
: 1;
3806 unsigned T3GVAL
: 1;
3807 unsigned T3GGO_NOT_DONE
: 1;
3808 unsigned T3GSPM
: 1;
3810 unsigned T3GPOL
: 1;
3827 extern __at(0x0215) volatile __T3GCONbits_t T3GCONbits
;
3829 #define _T3GCON_GVAL 0x04
3830 #define _T3GCON_T3GVAL 0x04
3831 #define _T3GCON_GGO_NOT_DONE 0x08
3832 #define _T3GCON_T3GGO_NOT_DONE 0x08
3833 #define _T3GCON_T3GGO 0x08
3834 #define _T3GCON_GSPM 0x10
3835 #define _T3GCON_T3GSPM 0x10
3836 #define _T3GCON_GTM 0x20
3837 #define _T3GCON_T3GTM 0x20
3838 #define _T3GCON_GPOL 0x40
3839 #define _T3GCON_T3GPOL 0x40
3840 #define _T3GCON_GE 0x80
3841 #define _T3GCON_T3GE 0x80
3843 //==============================================================================
3846 //==============================================================================
3849 extern __at(0x0216) __sfr T3GATE
;
3867 unsigned T3GSS0
: 1;
3868 unsigned T3GSS1
: 1;
3869 unsigned T3GSS2
: 1;
3870 unsigned T3GSS3
: 1;
3871 unsigned T3GSS4
: 1;
3890 extern __at(0x0216) volatile __T3GATEbits_t T3GATEbits
;
3892 #define _T3GATE_GSS0 0x01
3893 #define _T3GATE_T3GSS0 0x01
3894 #define _T3GATE_GSS1 0x02
3895 #define _T3GATE_T3GSS1 0x02
3896 #define _T3GATE_GSS2 0x04
3897 #define _T3GATE_T3GSS2 0x04
3898 #define _T3GATE_GSS3 0x08
3899 #define _T3GATE_T3GSS3 0x08
3900 #define _T3GATE_GSS4 0x10
3901 #define _T3GATE_T3GSS4 0x10
3903 //==============================================================================
3906 //==============================================================================
3909 extern __at(0x0216) __sfr TMR3GATE
;
3927 unsigned T3GSS0
: 1;
3928 unsigned T3GSS1
: 1;
3929 unsigned T3GSS2
: 1;
3930 unsigned T3GSS3
: 1;
3931 unsigned T3GSS4
: 1;
3950 extern __at(0x0216) volatile __TMR3GATEbits_t TMR3GATEbits
;
3952 #define _TMR3GATE_GSS0 0x01
3953 #define _TMR3GATE_T3GSS0 0x01
3954 #define _TMR3GATE_GSS1 0x02
3955 #define _TMR3GATE_T3GSS1 0x02
3956 #define _TMR3GATE_GSS2 0x04
3957 #define _TMR3GATE_T3GSS2 0x04
3958 #define _TMR3GATE_GSS3 0x08
3959 #define _TMR3GATE_T3GSS3 0x08
3960 #define _TMR3GATE_GSS4 0x10
3961 #define _TMR3GATE_T3GSS4 0x10
3963 //==============================================================================
3966 //==============================================================================
3969 extern __at(0x0217) __sfr T3CLK
;
4010 extern __at(0x0217) volatile __T3CLKbits_t T3CLKbits
;
4012 #define _T3CLK_T3CS0 0x01
4013 #define _T3CLK_CS0 0x01
4014 #define _T3CLK_T3CS1 0x02
4015 #define _T3CLK_CS1 0x02
4016 #define _T3CLK_T3CS2 0x04
4017 #define _T3CLK_CS2 0x04
4018 #define _T3CLK_T3CS3 0x08
4019 #define _T3CLK_CS3 0x08
4021 //==============================================================================
4024 //==============================================================================
4027 extern __at(0x0217) __sfr TMR3CLK
;
4068 extern __at(0x0217) volatile __TMR3CLKbits_t TMR3CLKbits
;
4070 #define _TMR3CLK_T3CS0 0x01
4071 #define _TMR3CLK_CS0 0x01
4072 #define _TMR3CLK_T3CS1 0x02
4073 #define _TMR3CLK_CS1 0x02
4074 #define _TMR3CLK_T3CS2 0x04
4075 #define _TMR3CLK_CS2 0x04
4076 #define _TMR3CLK_T3CS3 0x08
4077 #define _TMR3CLK_CS3 0x08
4079 //==============================================================================
4082 //==============================================================================
4085 extern __at(0x0218) __sfr TMR5L
;
4089 unsigned TMR5L0
: 1;
4090 unsigned TMR5L1
: 1;
4091 unsigned TMR5L2
: 1;
4092 unsigned TMR5L3
: 1;
4093 unsigned TMR5L4
: 1;
4094 unsigned TMR5L5
: 1;
4095 unsigned TMR5L6
: 1;
4096 unsigned TMR5L7
: 1;
4099 extern __at(0x0218) volatile __TMR5Lbits_t TMR5Lbits
;
4101 #define _TMR5L0 0x01
4102 #define _TMR5L1 0x02
4103 #define _TMR5L2 0x04
4104 #define _TMR5L3 0x08
4105 #define _TMR5L4 0x10
4106 #define _TMR5L5 0x20
4107 #define _TMR5L6 0x40
4108 #define _TMR5L7 0x80
4110 //==============================================================================
4113 //==============================================================================
4116 extern __at(0x0219) __sfr TMR5H
;
4120 unsigned TMR5H0
: 1;
4121 unsigned TMR5H1
: 1;
4122 unsigned TMR5H2
: 1;
4123 unsigned TMR5H3
: 1;
4124 unsigned TMR5H4
: 1;
4125 unsigned TMR5H5
: 1;
4126 unsigned TMR5H6
: 1;
4127 unsigned TMR5H7
: 1;
4130 extern __at(0x0219) volatile __TMR5Hbits_t TMR5Hbits
;
4132 #define _TMR5H0 0x01
4133 #define _TMR5H1 0x02
4134 #define _TMR5H2 0x04
4135 #define _TMR5H3 0x08
4136 #define _TMR5H4 0x10
4137 #define _TMR5H5 0x20
4138 #define _TMR5H6 0x40
4139 #define _TMR5H7 0x80
4141 //==============================================================================
4144 //==============================================================================
4147 extern __at(0x021A) __sfr T5CON
;
4155 unsigned NOT_SYNC
: 1;
4157 unsigned T5CKPS0
: 1;
4158 unsigned T5CKPS1
: 1;
4165 unsigned TMR5ON
: 1;
4166 unsigned T5RD16
: 1;
4167 unsigned NOT_T5SYNC
: 1;
4185 unsigned T5CKPS
: 2;
4190 extern __at(0x021A) volatile __T5CONbits_t T5CONbits
;
4192 #define _T5CON_ON 0x01
4193 #define _T5CON_TMR5ON 0x01
4194 #define _T5CON_RD16 0x02
4195 #define _T5CON_T5RD16 0x02
4196 #define _T5CON_NOT_SYNC 0x04
4197 #define _T5CON_NOT_T5SYNC 0x04
4198 #define _T5CON_T5CKPS0 0x10
4199 #define _T5CON_CKPS0 0x10
4200 #define _T5CON_T5CKPS1 0x20
4201 #define _T5CON_CKPS1 0x20
4203 //==============================================================================
4206 //==============================================================================
4209 extern __at(0x021B) __sfr PR5
;
4218 unsigned GGO_NOT_DONE
: 1;
4229 unsigned T5GVAL
: 1;
4230 unsigned T5GGO_NOT_DONE
: 1;
4231 unsigned T5GSPM
: 1;
4233 unsigned T5GPOL
: 1;
4250 extern __at(0x021B) volatile __PR5bits_t PR5bits
;
4252 #define _PR5_GVAL 0x04
4253 #define _PR5_T5GVAL 0x04
4254 #define _PR5_GGO_NOT_DONE 0x08
4255 #define _PR5_T5GGO_NOT_DONE 0x08
4256 #define _PR5_T5GGO 0x08
4257 #define _PR5_GSPM 0x10
4258 #define _PR5_T5GSPM 0x10
4259 #define _PR5_GTM 0x20
4260 #define _PR5_T5GTM 0x20
4261 #define _PR5_GPOL 0x40
4262 #define _PR5_T5GPOL 0x40
4263 #define _PR5_GE 0x80
4264 #define _PR5_T5GE 0x80
4266 //==============================================================================
4269 //==============================================================================
4272 extern __at(0x021B) __sfr T5GCON
;
4281 unsigned GGO_NOT_DONE
: 1;
4292 unsigned T5GVAL
: 1;
4293 unsigned T5GGO_NOT_DONE
: 1;
4294 unsigned T5GSPM
: 1;
4296 unsigned T5GPOL
: 1;
4313 extern __at(0x021B) volatile __T5GCONbits_t T5GCONbits
;
4315 #define _T5GCON_GVAL 0x04
4316 #define _T5GCON_T5GVAL 0x04
4317 #define _T5GCON_GGO_NOT_DONE 0x08
4318 #define _T5GCON_T5GGO_NOT_DONE 0x08
4319 #define _T5GCON_T5GGO 0x08
4320 #define _T5GCON_GSPM 0x10
4321 #define _T5GCON_T5GSPM 0x10
4322 #define _T5GCON_GTM 0x20
4323 #define _T5GCON_T5GTM 0x20
4324 #define _T5GCON_GPOL 0x40
4325 #define _T5GCON_T5GPOL 0x40
4326 #define _T5GCON_GE 0x80
4327 #define _T5GCON_T5GE 0x80
4329 //==============================================================================
4332 //==============================================================================
4335 extern __at(0x021C) __sfr T5GATE
;
4353 unsigned T5GSS0
: 1;
4354 unsigned T5GSS1
: 1;
4355 unsigned T5GSS2
: 1;
4356 unsigned T5GSS3
: 1;
4357 unsigned T5GSS4
: 1;
4376 extern __at(0x021C) volatile __T5GATEbits_t T5GATEbits
;
4378 #define _T5GATE_GSS0 0x01
4379 #define _T5GATE_T5GSS0 0x01
4380 #define _T5GATE_GSS1 0x02
4381 #define _T5GATE_T5GSS1 0x02
4382 #define _T5GATE_GSS2 0x04
4383 #define _T5GATE_T5GSS2 0x04
4384 #define _T5GATE_GSS3 0x08
4385 #define _T5GATE_T5GSS3 0x08
4386 #define _T5GATE_GSS4 0x10
4387 #define _T5GATE_T5GSS4 0x10
4389 //==============================================================================
4392 //==============================================================================
4395 extern __at(0x021C) __sfr TMR5GATE
;
4413 unsigned T5GSS0
: 1;
4414 unsigned T5GSS1
: 1;
4415 unsigned T5GSS2
: 1;
4416 unsigned T5GSS3
: 1;
4417 unsigned T5GSS4
: 1;
4436 extern __at(0x021C) volatile __TMR5GATEbits_t TMR5GATEbits
;
4438 #define _TMR5GATE_GSS0 0x01
4439 #define _TMR5GATE_T5GSS0 0x01
4440 #define _TMR5GATE_GSS1 0x02
4441 #define _TMR5GATE_T5GSS1 0x02
4442 #define _TMR5GATE_GSS2 0x04
4443 #define _TMR5GATE_T5GSS2 0x04
4444 #define _TMR5GATE_GSS3 0x08
4445 #define _TMR5GATE_T5GSS3 0x08
4446 #define _TMR5GATE_GSS4 0x10
4447 #define _TMR5GATE_T5GSS4 0x10
4449 //==============================================================================
4452 //==============================================================================
4455 extern __at(0x021D) __sfr T5CLK
;
4496 extern __at(0x021D) volatile __T5CLKbits_t T5CLKbits
;
4498 #define _T5CLK_T5CS0 0x01
4499 #define _T5CLK_CS0 0x01
4500 #define _T5CLK_T5CS1 0x02
4501 #define _T5CLK_CS1 0x02
4502 #define _T5CLK_T5CS2 0x04
4503 #define _T5CLK_CS2 0x04
4504 #define _T5CLK_T5CS3 0x08
4505 #define _T5CLK_CS3 0x08
4507 //==============================================================================
4510 //==============================================================================
4513 extern __at(0x021D) __sfr TMR5CLK
;
4554 extern __at(0x021D) volatile __TMR5CLKbits_t TMR5CLKbits
;
4556 #define _TMR5CLK_T5CS0 0x01
4557 #define _TMR5CLK_CS0 0x01
4558 #define _TMR5CLK_T5CS1 0x02
4559 #define _TMR5CLK_CS1 0x02
4560 #define _TMR5CLK_T5CS2 0x04
4561 #define _TMR5CLK_CS2 0x04
4562 #define _TMR5CLK_T5CS3 0x08
4563 #define _TMR5CLK_CS3 0x08
4565 //==============================================================================
4568 //==============================================================================
4571 extern __at(0x021E) __sfr CCPTMRS0
;
4577 unsigned C1TSEL0
: 1;
4578 unsigned C1TSEL1
: 1;
4579 unsigned C2TSEL0
: 1;
4580 unsigned C2TSEL1
: 1;
4581 unsigned C3TSEL0
: 1;
4582 unsigned C3TSEL1
: 1;
4583 unsigned C4TSEL0
: 1;
4584 unsigned C4TSEL1
: 1;
4589 unsigned C1TSEL
: 2;
4596 unsigned C2TSEL
: 2;
4603 unsigned C3TSEL
: 2;
4610 unsigned C4TSEL
: 2;
4614 extern __at(0x021E) volatile __CCPTMRS0bits_t CCPTMRS0bits
;
4616 #define _C1TSEL0 0x01
4617 #define _C1TSEL1 0x02
4618 #define _C2TSEL0 0x04
4619 #define _C2TSEL1 0x08
4620 #define _C3TSEL0 0x10
4621 #define _C3TSEL1 0x20
4622 #define _C4TSEL0 0x40
4623 #define _C4TSEL1 0x80
4625 //==============================================================================
4628 //==============================================================================
4631 extern __at(0x021F) __sfr CCPTMRS1
;
4637 unsigned C5TSEL0
: 1;
4638 unsigned C5TSEL1
: 1;
4639 unsigned P6TSEL0
: 1;
4640 unsigned P6TSEL1
: 1;
4641 unsigned P7TSEL0
: 1;
4642 unsigned P7TSEL1
: 1;
4649 unsigned C5TSEL
: 2;
4656 unsigned P6TSEL
: 2;
4663 unsigned P7TSEL
: 2;
4668 extern __at(0x021F) volatile __CCPTMRS1bits_t CCPTMRS1bits
;
4670 #define _C5TSEL0 0x01
4671 #define _C5TSEL1 0x02
4672 #define _P6TSEL0 0x04
4673 #define _P6TSEL1 0x08
4674 #define _P7TSEL0 0x10
4675 #define _P7TSEL1 0x20
4677 //==============================================================================
4679 extern __at(0x028C) __sfr T2TMR
;
4680 extern __at(0x028C) __sfr TMR2
;
4681 extern __at(0x028D) __sfr PR2
;
4682 extern __at(0x028D) __sfr T2PR
;
4684 //==============================================================================
4687 extern __at(0x028E) __sfr T2CON
;
4693 unsigned T2OUTPS0
: 1;
4694 unsigned T2OUTPS1
: 1;
4695 unsigned T2OUTPS2
: 1;
4696 unsigned T2OUTPS3
: 1;
4697 unsigned T2CKPS0
: 1;
4698 unsigned T2CKPS1
: 1;
4699 unsigned T2CKPS2
: 1;
4705 unsigned OUTPS0
: 1;
4706 unsigned OUTPS1
: 1;
4707 unsigned OUTPS2
: 1;
4708 unsigned OUTPS3
: 1;
4724 unsigned TMR2ON
: 1;
4729 unsigned T2OUTPS
: 4;
4742 unsigned T2CKPS
: 3;
4754 extern __at(0x028E) volatile __T2CONbits_t T2CONbits
;
4756 #define _T2CON_T2OUTPS0 0x01
4757 #define _T2CON_OUTPS0 0x01
4758 #define _T2CON_T2OUTPS1 0x02
4759 #define _T2CON_OUTPS1 0x02
4760 #define _T2CON_T2OUTPS2 0x04
4761 #define _T2CON_OUTPS2 0x04
4762 #define _T2CON_T2OUTPS3 0x08
4763 #define _T2CON_OUTPS3 0x08
4764 #define _T2CON_T2CKPS0 0x10
4765 #define _T2CON_CKPS0 0x10
4766 #define _T2CON_T2CKPS1 0x20
4767 #define _T2CON_CKPS1 0x20
4768 #define _T2CON_T2CKPS2 0x40
4769 #define _T2CON_CKPS2 0x40
4770 #define _T2CON_ON 0x80
4771 #define _T2CON_T2ON 0x80
4772 #define _T2CON_TMR2ON 0x80
4774 //==============================================================================
4777 //==============================================================================
4780 extern __at(0x028F) __sfr T2HLT
;
4791 unsigned CKSYNC
: 1;
4798 unsigned T2MODE0
: 1;
4799 unsigned T2MODE1
: 1;
4800 unsigned T2MODE2
: 1;
4801 unsigned T2MODE3
: 1;
4802 unsigned T2MODE4
: 1;
4803 unsigned T2CKSYNC
: 1;
4804 unsigned T2CKPOL
: 1;
4805 unsigned T2PSYNC
: 1;
4810 unsigned T2MODE
: 5;
4821 extern __at(0x028F) volatile __T2HLTbits_t T2HLTbits
;
4823 #define _T2HLT_MODE0 0x01
4824 #define _T2HLT_T2MODE0 0x01
4825 #define _T2HLT_MODE1 0x02
4826 #define _T2HLT_T2MODE1 0x02
4827 #define _T2HLT_MODE2 0x04
4828 #define _T2HLT_T2MODE2 0x04
4829 #define _T2HLT_MODE3 0x08
4830 #define _T2HLT_T2MODE3 0x08
4831 #define _T2HLT_MODE4 0x10
4832 #define _T2HLT_T2MODE4 0x10
4833 #define _T2HLT_CKSYNC 0x20
4834 #define _T2HLT_T2CKSYNC 0x20
4835 #define _T2HLT_CKPOL 0x40
4836 #define _T2HLT_T2CKPOL 0x40
4837 #define _T2HLT_PSYNC 0x80
4838 #define _T2HLT_T2PSYNC 0x80
4840 //==============================================================================
4843 //==============================================================================
4846 extern __at(0x0290) __sfr T2CLKCON
;
4869 extern __at(0x0290) volatile __T2CLKCONbits_t T2CLKCONbits
;
4876 //==============================================================================
4879 //==============================================================================
4882 extern __at(0x0291) __sfr T2RST
;
4900 unsigned T2RSEL0
: 1;
4901 unsigned T2RSEL1
: 1;
4902 unsigned T2RSEL2
: 1;
4903 unsigned T2RSEL3
: 1;
4904 unsigned T2RSEL4
: 1;
4918 unsigned T2RSEL
: 5;
4923 extern __at(0x0291) volatile __T2RSTbits_t T2RSTbits
;
4926 #define _T2RSEL0 0x01
4928 #define _T2RSEL1 0x02
4930 #define _T2RSEL2 0x04
4932 #define _T2RSEL3 0x08
4934 #define _T2RSEL4 0x10
4936 //==============================================================================
4938 extern __at(0x0292) __sfr T4TMR
;
4939 extern __at(0x0292) __sfr TMR4
;
4940 extern __at(0x0293) __sfr PR4
;
4941 extern __at(0x0293) __sfr T4PR
;
4943 //==============================================================================
4946 extern __at(0x0294) __sfr T4CON
;
4952 unsigned T4OUTPS0
: 1;
4953 unsigned T4OUTPS1
: 1;
4954 unsigned T4OUTPS2
: 1;
4955 unsigned T4OUTPS3
: 1;
4956 unsigned T4CKPS0
: 1;
4957 unsigned T4CKPS1
: 1;
4958 unsigned T4CKPS2
: 1;
4964 unsigned OUTPS0
: 1;
4965 unsigned OUTPS1
: 1;
4966 unsigned OUTPS2
: 1;
4967 unsigned OUTPS3
: 1;
4983 unsigned TMR4ON
: 1;
4988 unsigned T4OUTPS
: 4;
5008 unsigned T4CKPS
: 3;
5013 extern __at(0x0294) volatile __T4CONbits_t T4CONbits
;
5015 #define _T4CON_T4OUTPS0 0x01
5016 #define _T4CON_OUTPS0 0x01
5017 #define _T4CON_T4OUTPS1 0x02
5018 #define _T4CON_OUTPS1 0x02
5019 #define _T4CON_T4OUTPS2 0x04
5020 #define _T4CON_OUTPS2 0x04
5021 #define _T4CON_T4OUTPS3 0x08
5022 #define _T4CON_OUTPS3 0x08
5023 #define _T4CON_T4CKPS0 0x10
5024 #define _T4CON_CKPS0 0x10
5025 #define _T4CON_T4CKPS1 0x20
5026 #define _T4CON_CKPS1 0x20
5027 #define _T4CON_T4CKPS2 0x40
5028 #define _T4CON_CKPS2 0x40
5029 #define _T4CON_ON 0x80
5030 #define _T4CON_T4ON 0x80
5031 #define _T4CON_TMR4ON 0x80
5033 //==============================================================================
5036 //==============================================================================
5039 extern __at(0x0295) __sfr T4HLT
;
5050 unsigned CKSYNC
: 1;
5057 unsigned T4MODE0
: 1;
5058 unsigned T4MODE1
: 1;
5059 unsigned T4MODE2
: 1;
5060 unsigned T4MODE3
: 1;
5061 unsigned T4MODE4
: 1;
5062 unsigned T4CKSYNC
: 1;
5063 unsigned T4CKPOL
: 1;
5064 unsigned T4PSYNC
: 1;
5075 unsigned T4MODE
: 5;
5080 extern __at(0x0295) volatile __T4HLTbits_t T4HLTbits
;
5082 #define _T4HLT_MODE0 0x01
5083 #define _T4HLT_T4MODE0 0x01
5084 #define _T4HLT_MODE1 0x02
5085 #define _T4HLT_T4MODE1 0x02
5086 #define _T4HLT_MODE2 0x04
5087 #define _T4HLT_T4MODE2 0x04
5088 #define _T4HLT_MODE3 0x08
5089 #define _T4HLT_T4MODE3 0x08
5090 #define _T4HLT_MODE4 0x10
5091 #define _T4HLT_T4MODE4 0x10
5092 #define _T4HLT_CKSYNC 0x20
5093 #define _T4HLT_T4CKSYNC 0x20
5094 #define _T4HLT_CKPOL 0x40
5095 #define _T4HLT_T4CKPOL 0x40
5096 #define _T4HLT_PSYNC 0x80
5097 #define _T4HLT_T4PSYNC 0x80
5099 //==============================================================================
5102 //==============================================================================
5105 extern __at(0x0296) __sfr T4CLKCON
;
5128 extern __at(0x0296) volatile __T4CLKCONbits_t T4CLKCONbits
;
5135 //==============================================================================
5138 //==============================================================================
5141 extern __at(0x0297) __sfr T4RST
;
5159 unsigned T4RSEL0
: 1;
5160 unsigned T4RSEL1
: 1;
5161 unsigned T4RSEL2
: 1;
5162 unsigned T4RSEL3
: 1;
5163 unsigned T4RSEL4
: 1;
5171 unsigned T4RSEL
: 5;
5182 extern __at(0x0297) volatile __T4RSTbits_t T4RSTbits
;
5184 #define _T4RST_RSEL0 0x01
5185 #define _T4RST_T4RSEL0 0x01
5186 #define _T4RST_RSEL1 0x02
5187 #define _T4RST_T4RSEL1 0x02
5188 #define _T4RST_RSEL2 0x04
5189 #define _T4RST_T4RSEL2 0x04
5190 #define _T4RST_RSEL3 0x08
5191 #define _T4RST_T4RSEL3 0x08
5192 #define _T4RST_RSEL4 0x10
5193 #define _T4RST_T4RSEL4 0x10
5195 //==============================================================================
5197 extern __at(0x0298) __sfr T6TMR
;
5198 extern __at(0x0298) __sfr TMR6
;
5199 extern __at(0x0299) __sfr PR6
;
5200 extern __at(0x0299) __sfr T6PR
;
5202 //==============================================================================
5205 extern __at(0x029A) __sfr T6CON
;
5211 unsigned T6OUTPS0
: 1;
5212 unsigned T6OUTPS1
: 1;
5213 unsigned T6OUTPS2
: 1;
5214 unsigned T6OUTPS3
: 1;
5215 unsigned T6CKPS0
: 1;
5216 unsigned T6CKPS1
: 1;
5217 unsigned T6CKPS2
: 1;
5223 unsigned OUTPS0
: 1;
5224 unsigned OUTPS1
: 1;
5225 unsigned OUTPS2
: 1;
5226 unsigned OUTPS3
: 1;
5242 unsigned TMR6ON
: 1;
5247 unsigned T6OUTPS
: 4;
5267 unsigned T6CKPS
: 3;
5272 extern __at(0x029A) volatile __T6CONbits_t T6CONbits
;
5274 #define _T6CON_T6OUTPS0 0x01
5275 #define _T6CON_OUTPS0 0x01
5276 #define _T6CON_T6OUTPS1 0x02
5277 #define _T6CON_OUTPS1 0x02
5278 #define _T6CON_T6OUTPS2 0x04
5279 #define _T6CON_OUTPS2 0x04
5280 #define _T6CON_T6OUTPS3 0x08
5281 #define _T6CON_OUTPS3 0x08
5282 #define _T6CON_T6CKPS0 0x10
5283 #define _T6CON_CKPS0 0x10
5284 #define _T6CON_T6CKPS1 0x20
5285 #define _T6CON_CKPS1 0x20
5286 #define _T6CON_T6CKPS2 0x40
5287 #define _T6CON_CKPS2 0x40
5288 #define _T6CON_ON 0x80
5289 #define _T6CON_T6ON 0x80
5290 #define _T6CON_TMR6ON 0x80
5292 //==============================================================================
5295 //==============================================================================
5298 extern __at(0x029B) __sfr T6HLT
;
5309 unsigned CKSYNC
: 1;
5316 unsigned T6MODE0
: 1;
5317 unsigned T6MODE1
: 1;
5318 unsigned T6MODE2
: 1;
5319 unsigned T6MODE3
: 1;
5320 unsigned T6MODE4
: 1;
5321 unsigned T6CKSYNC
: 1;
5322 unsigned T6CKPOL
: 1;
5323 unsigned T6PSYNC
: 1;
5328 unsigned T6MODE
: 5;
5339 extern __at(0x029B) volatile __T6HLTbits_t T6HLTbits
;
5341 #define _T6HLT_MODE0 0x01
5342 #define _T6HLT_T6MODE0 0x01
5343 #define _T6HLT_MODE1 0x02
5344 #define _T6HLT_T6MODE1 0x02
5345 #define _T6HLT_MODE2 0x04
5346 #define _T6HLT_T6MODE2 0x04
5347 #define _T6HLT_MODE3 0x08
5348 #define _T6HLT_T6MODE3 0x08
5349 #define _T6HLT_MODE4 0x10
5350 #define _T6HLT_T6MODE4 0x10
5351 #define _T6HLT_CKSYNC 0x20
5352 #define _T6HLT_T6CKSYNC 0x20
5353 #define _T6HLT_CKPOL 0x40
5354 #define _T6HLT_T6CKPOL 0x40
5355 #define _T6HLT_PSYNC 0x80
5356 #define _T6HLT_T6PSYNC 0x80
5358 //==============================================================================
5361 //==============================================================================
5364 extern __at(0x029C) __sfr T6CLKCON
;
5387 extern __at(0x029C) volatile __T6CLKCONbits_t T6CLKCONbits
;
5394 //==============================================================================
5397 //==============================================================================
5400 extern __at(0x029D) __sfr T6RST
;
5418 unsigned T6RSEL0
: 1;
5419 unsigned T6RSEL1
: 1;
5420 unsigned T6RSEL2
: 1;
5421 unsigned T6RSEL3
: 1;
5422 unsigned T6RSEL4
: 1;
5430 unsigned T6RSEL
: 5;
5441 extern __at(0x029D) volatile __T6RSTbits_t T6RSTbits
;
5443 #define _T6RST_RSEL0 0x01
5444 #define _T6RST_T6RSEL0 0x01
5445 #define _T6RST_RSEL1 0x02
5446 #define _T6RST_T6RSEL1 0x02
5447 #define _T6RST_RSEL2 0x04
5448 #define _T6RST_T6RSEL2 0x04
5449 #define _T6RST_RSEL3 0x08
5450 #define _T6RST_T6RSEL3 0x08
5451 #define _T6RST_RSEL4 0x10
5452 #define _T6RST_T6RSEL4 0x10
5454 //==============================================================================
5456 extern __at(0x030C) __sfr CCPR1
;
5457 extern __at(0x030C) __sfr CCPR1L
;
5458 extern __at(0x030D) __sfr CCPR1H
;
5460 //==============================================================================
5463 extern __at(0x030E) __sfr CCP1CON
;
5481 unsigned CCP1MODE0
: 1;
5482 unsigned CCP1MODE1
: 1;
5483 unsigned CCP1MODE2
: 1;
5484 unsigned CCP1MODE3
: 1;
5485 unsigned CCP1FMT
: 1;
5486 unsigned CCP1OUT
: 1;
5487 unsigned CCP1OE
: 1;
5488 unsigned CCP1EN
: 1;
5493 unsigned CCP1MODE
: 4;
5504 extern __at(0x030E) volatile __CCP1CONbits_t CCP1CONbits
;
5507 #define _CCP1MODE0 0x01
5509 #define _CCP1MODE1 0x02
5511 #define _CCP1MODE2 0x04
5513 #define _CCP1MODE3 0x08
5515 #define _CCP1FMT 0x10
5517 #define _CCP1OUT 0x20
5519 #define _CCP1OE 0x40
5521 #define _CCP1EN 0x80
5523 //==============================================================================
5526 //==============================================================================
5529 extern __at(0x030F) __sfr CCP1CAP
;
5547 unsigned CCP1CTS0
: 1;
5548 unsigned CCP1CTS1
: 1;
5549 unsigned CCP1CTS2
: 1;
5565 unsigned CCP1CTS
: 3;
5570 extern __at(0x030F) volatile __CCP1CAPbits_t CCP1CAPbits
;
5573 #define _CCP1CTS0 0x01
5575 #define _CCP1CTS1 0x02
5577 #define _CCP1CTS2 0x04
5579 //==============================================================================
5581 extern __at(0x0310) __sfr CCPR2
;
5582 extern __at(0x0310) __sfr CCPR2L
;
5583 extern __at(0x0311) __sfr CCPR2H
;
5585 //==============================================================================
5588 extern __at(0x0312) __sfr CCP2CON
;
5606 unsigned CCP2MODE0
: 1;
5607 unsigned CCP2MODE1
: 1;
5608 unsigned CCP2MODE2
: 1;
5609 unsigned CCP2MODE3
: 1;
5610 unsigned CCP2FMT
: 1;
5611 unsigned CCP2OUT
: 1;
5612 unsigned CCP2OE
: 1;
5613 unsigned CCP2EN
: 1;
5618 unsigned CCP2MODE
: 4;
5629 extern __at(0x0312) volatile __CCP2CONbits_t CCP2CONbits
;
5631 #define _CCP2CON_MODE0 0x01
5632 #define _CCP2CON_CCP2MODE0 0x01
5633 #define _CCP2CON_MODE1 0x02
5634 #define _CCP2CON_CCP2MODE1 0x02
5635 #define _CCP2CON_MODE2 0x04
5636 #define _CCP2CON_CCP2MODE2 0x04
5637 #define _CCP2CON_MODE3 0x08
5638 #define _CCP2CON_CCP2MODE3 0x08
5639 #define _CCP2CON_FMT 0x10
5640 #define _CCP2CON_CCP2FMT 0x10
5641 #define _CCP2CON_OUT 0x20
5642 #define _CCP2CON_CCP2OUT 0x20
5643 #define _CCP2CON_OE 0x40
5644 #define _CCP2CON_CCP2OE 0x40
5645 #define _CCP2CON_EN 0x80
5646 #define _CCP2CON_CCP2EN 0x80
5648 //==============================================================================
5651 //==============================================================================
5654 extern __at(0x0313) __sfr CCP2CAP
;
5672 unsigned CCP2CTS0
: 1;
5673 unsigned CCP2CTS1
: 1;
5674 unsigned CCP2CTS2
: 1;
5684 unsigned CCP2CTS
: 3;
5695 extern __at(0x0313) volatile __CCP2CAPbits_t CCP2CAPbits
;
5697 #define _CCP2CAP_CTS0 0x01
5698 #define _CCP2CAP_CCP2CTS0 0x01
5699 #define _CCP2CAP_CTS1 0x02
5700 #define _CCP2CAP_CCP2CTS1 0x02
5701 #define _CCP2CAP_CTS2 0x04
5702 #define _CCP2CAP_CCP2CTS2 0x04
5704 //==============================================================================
5706 extern __at(0x0314) __sfr CCPR3
;
5707 extern __at(0x0314) __sfr CCPR3L
;
5708 extern __at(0x0315) __sfr CCPR3H
;
5710 //==============================================================================
5713 extern __at(0x0316) __sfr CCP3CON
;
5731 unsigned CCP3MODE0
: 1;
5732 unsigned CCP3MODE1
: 1;
5733 unsigned CCP3MODE2
: 1;
5734 unsigned CCP3MODE3
: 1;
5735 unsigned CCP3FMT
: 1;
5736 unsigned CCP3OUT
: 1;
5737 unsigned CCP3OE
: 1;
5738 unsigned CCP3EN
: 1;
5743 unsigned CCP3MODE
: 4;
5754 extern __at(0x0316) volatile __CCP3CONbits_t CCP3CONbits
;
5756 #define _CCP3CON_MODE0 0x01
5757 #define _CCP3CON_CCP3MODE0 0x01
5758 #define _CCP3CON_MODE1 0x02
5759 #define _CCP3CON_CCP3MODE1 0x02
5760 #define _CCP3CON_MODE2 0x04
5761 #define _CCP3CON_CCP3MODE2 0x04
5762 #define _CCP3CON_MODE3 0x08
5763 #define _CCP3CON_CCP3MODE3 0x08
5764 #define _CCP3CON_FMT 0x10
5765 #define _CCP3CON_CCP3FMT 0x10
5766 #define _CCP3CON_OUT 0x20
5767 #define _CCP3CON_CCP3OUT 0x20
5768 #define _CCP3CON_OE 0x40
5769 #define _CCP3CON_CCP3OE 0x40
5770 #define _CCP3CON_EN 0x80
5771 #define _CCP3CON_CCP3EN 0x80
5773 //==============================================================================
5776 //==============================================================================
5779 extern __at(0x0317) __sfr CCP3CAP
;
5797 unsigned CCP3CTS0
: 1;
5798 unsigned CCP3CTS1
: 1;
5799 unsigned CCP3CTS2
: 1;
5815 unsigned CCP3CTS
: 3;
5820 extern __at(0x0317) volatile __CCP3CAPbits_t CCP3CAPbits
;
5822 #define _CCP3CAP_CTS0 0x01
5823 #define _CCP3CAP_CCP3CTS0 0x01
5824 #define _CCP3CAP_CTS1 0x02
5825 #define _CCP3CAP_CCP3CTS1 0x02
5826 #define _CCP3CAP_CTS2 0x04
5827 #define _CCP3CAP_CCP3CTS2 0x04
5829 //==============================================================================
5831 extern __at(0x0318) __sfr CCPR4
;
5832 extern __at(0x0318) __sfr CCPR4L
;
5833 extern __at(0x0319) __sfr CCPR4H
;
5835 //==============================================================================
5838 extern __at(0x031A) __sfr CCP4CON
;
5856 unsigned CCP4MODE0
: 1;
5857 unsigned CCP4MODE1
: 1;
5858 unsigned CCP4MODE2
: 1;
5859 unsigned CCP4MODE3
: 1;
5860 unsigned CCP4FMT
: 1;
5861 unsigned CCP4OUT
: 1;
5862 unsigned CCP4OE
: 1;
5863 unsigned CCP4EN
: 1;
5868 unsigned CCP4MODE
: 4;
5879 extern __at(0x031A) volatile __CCP4CONbits_t CCP4CONbits
;
5881 #define _CCP4CON_MODE0 0x01
5882 #define _CCP4CON_CCP4MODE0 0x01
5883 #define _CCP4CON_MODE1 0x02
5884 #define _CCP4CON_CCP4MODE1 0x02
5885 #define _CCP4CON_MODE2 0x04
5886 #define _CCP4CON_CCP4MODE2 0x04
5887 #define _CCP4CON_MODE3 0x08
5888 #define _CCP4CON_CCP4MODE3 0x08
5889 #define _CCP4CON_FMT 0x10
5890 #define _CCP4CON_CCP4FMT 0x10
5891 #define _CCP4CON_OUT 0x20
5892 #define _CCP4CON_CCP4OUT 0x20
5893 #define _CCP4CON_OE 0x40
5894 #define _CCP4CON_CCP4OE 0x40
5895 #define _CCP4CON_EN 0x80
5896 #define _CCP4CON_CCP4EN 0x80
5898 //==============================================================================
5901 //==============================================================================
5904 extern __at(0x031B) __sfr CCP4CAP
;
5922 unsigned CCP4CTS0
: 1;
5923 unsigned CCP4CTS1
: 1;
5924 unsigned CCP4CTS2
: 1;
5940 unsigned CCP4CTS
: 3;
5945 extern __at(0x031B) volatile __CCP4CAPbits_t CCP4CAPbits
;
5947 #define _CCP4CAP_CTS0 0x01
5948 #define _CCP4CAP_CCP4CTS0 0x01
5949 #define _CCP4CAP_CTS1 0x02
5950 #define _CCP4CAP_CCP4CTS1 0x02
5951 #define _CCP4CAP_CTS2 0x04
5952 #define _CCP4CAP_CCP4CTS2 0x04
5954 //==============================================================================
5956 extern __at(0x031C) __sfr CCPR5
;
5957 extern __at(0x031C) __sfr CCPR5L
;
5958 extern __at(0x031D) __sfr CCPR5H
;
5960 //==============================================================================
5963 extern __at(0x031E) __sfr CCP5CON
;
5981 unsigned CCP5MODE0
: 1;
5982 unsigned CCP5MODE1
: 1;
5983 unsigned CCP5MODE2
: 1;
5984 unsigned CCP5MODE3
: 1;
5985 unsigned CCP5FMT
: 1;
5986 unsigned CCP5OUT
: 1;
5987 unsigned CCP5OE
: 1;
5988 unsigned CCP5EN
: 1;
5993 unsigned CCP5MODE
: 4;
6004 extern __at(0x031E) volatile __CCP5CONbits_t CCP5CONbits
;
6006 #define _CCP5CON_MODE0 0x01
6007 #define _CCP5CON_CCP5MODE0 0x01
6008 #define _CCP5CON_MODE1 0x02
6009 #define _CCP5CON_CCP5MODE1 0x02
6010 #define _CCP5CON_MODE2 0x04
6011 #define _CCP5CON_CCP5MODE2 0x04
6012 #define _CCP5CON_MODE3 0x08
6013 #define _CCP5CON_CCP5MODE3 0x08
6014 #define _CCP5CON_FMT 0x10
6015 #define _CCP5CON_CCP5FMT 0x10
6016 #define _CCP5CON_OUT 0x20
6017 #define _CCP5CON_CCP5OUT 0x20
6018 #define _CCP5CON_OE 0x40
6019 #define _CCP5CON_CCP5OE 0x40
6020 #define _CCP5CON_EN 0x80
6021 #define _CCP5CON_CCP5EN 0x80
6023 //==============================================================================
6026 //==============================================================================
6029 extern __at(0x031F) __sfr CCP5CAP
;
6047 unsigned CCP5CTS0
: 1;
6048 unsigned CCP5CTS1
: 1;
6049 unsigned CCP5CTS2
: 1;
6059 unsigned CCP5CTS
: 3;
6070 extern __at(0x031F) volatile __CCP5CAPbits_t CCP5CAPbits
;
6072 #define _CCP5CAP_CTS0 0x01
6073 #define _CCP5CAP_CCP5CTS0 0x01
6074 #define _CCP5CAP_CTS1 0x02
6075 #define _CCP5CAP_CCP5CTS1 0x02
6076 #define _CCP5CAP_CTS2 0x04
6077 #define _CCP5CAP_CCP5CTS2 0x04
6079 //==============================================================================
6082 //==============================================================================
6085 extern __at(0x038C) __sfr PWM6DCL
;
6109 unsigned PWM6DC0
: 1;
6110 unsigned PWM6DC1
: 1;
6121 unsigned PWMPW0
: 1;
6122 unsigned PWMPW1
: 1;
6128 unsigned PWM6DC
: 2;
6144 extern __at(0x038C) volatile __PWM6DCLbits_t PWM6DCLbits
;
6147 #define _PWM6DC0 0x40
6148 #define _PWMPW0 0x40
6150 #define _PWM6DC1 0x80
6151 #define _PWMPW1 0x80
6153 //==============================================================================
6156 //==============================================================================
6159 extern __at(0x038D) __sfr PWM6DCH
;
6177 unsigned PWM6DC2
: 1;
6178 unsigned PWM6DC3
: 1;
6179 unsigned PWM6DC4
: 1;
6180 unsigned PWM6DC5
: 1;
6181 unsigned PWM6DC6
: 1;
6182 unsigned PWM6DC7
: 1;
6183 unsigned PWM6DC8
: 1;
6184 unsigned PWM6DC9
: 1;
6189 unsigned PWMPW2
: 1;
6190 unsigned PWMPW3
: 1;
6191 unsigned PWMPW4
: 1;
6192 unsigned PWMPW5
: 1;
6193 unsigned PWMPW6
: 1;
6194 unsigned PWMPW7
: 1;
6195 unsigned PWMPW8
: 1;
6196 unsigned PWMPW9
: 1;
6200 extern __at(0x038D) volatile __PWM6DCHbits_t PWM6DCHbits
;
6203 #define _PWM6DC2 0x01
6204 #define _PWMPW2 0x01
6206 #define _PWM6DC3 0x02
6207 #define _PWMPW3 0x02
6209 #define _PWM6DC4 0x04
6210 #define _PWMPW4 0x04
6212 #define _PWM6DC5 0x08
6213 #define _PWMPW5 0x08
6215 #define _PWM6DC6 0x10
6216 #define _PWMPW6 0x10
6218 #define _PWM6DC7 0x20
6219 #define _PWMPW7 0x20
6221 #define _PWM6DC8 0x40
6222 #define _PWMPW8 0x40
6224 #define _PWM6DC9 0x80
6225 #define _PWMPW9 0x80
6227 //==============================================================================
6230 //==============================================================================
6233 extern __at(0x038E) __sfr PWM6CON
;
6255 unsigned PWM6POL
: 1;
6256 unsigned PWM6OUT
: 1;
6257 unsigned PWM6OE
: 1;
6258 unsigned PWM6EN
: 1;
6262 extern __at(0x038E) volatile __PWM6CONbits_t PWM6CONbits
;
6264 #define _PWM6CON_POL 0x10
6265 #define _PWM6CON_PWM6POL 0x10
6266 #define _PWM6CON_OUT 0x20
6267 #define _PWM6CON_PWM6OUT 0x20
6268 #define _PWM6CON_OE 0x40
6269 #define _PWM6CON_PWM6OE 0x40
6270 #define _PWM6CON_EN 0x80
6271 #define _PWM6CON_PWM6EN 0x80
6273 //==============================================================================
6276 //==============================================================================
6279 extern __at(0x0390) __sfr PWM7DCL
;
6303 unsigned PWM7DC0
: 1;
6304 unsigned PWM7DC1
: 1;
6315 unsigned PWMPW0
: 1;
6316 unsigned PWMPW1
: 1;
6334 unsigned PWM7DC
: 2;
6338 extern __at(0x0390) volatile __PWM7DCLbits_t PWM7DCLbits
;
6340 #define _PWM7DCL_DC0 0x40
6341 #define _PWM7DCL_PWM7DC0 0x40
6342 #define _PWM7DCL_PWMPW0 0x40
6343 #define _PWM7DCL_DC1 0x80
6344 #define _PWM7DCL_PWM7DC1 0x80
6345 #define _PWM7DCL_PWMPW1 0x80
6347 //==============================================================================
6350 //==============================================================================
6353 extern __at(0x0391) __sfr PWM7DCH
;
6371 unsigned PWM7DC2
: 1;
6372 unsigned PWM7DC3
: 1;
6373 unsigned PWM7DC4
: 1;
6374 unsigned PWM7DC5
: 1;
6375 unsigned PWM7DC6
: 1;
6376 unsigned PWM7DC7
: 1;
6377 unsigned PWM7DC8
: 1;
6378 unsigned PWM7DC9
: 1;
6383 unsigned PWMPW2
: 1;
6384 unsigned PWMPW3
: 1;
6385 unsigned PWMPW4
: 1;
6386 unsigned PWMPW5
: 1;
6387 unsigned PWMPW6
: 1;
6388 unsigned PWMPW7
: 1;
6389 unsigned PWMPW8
: 1;
6390 unsigned PWMPW9
: 1;
6394 extern __at(0x0391) volatile __PWM7DCHbits_t PWM7DCHbits
;
6396 #define _PWM7DCH_DC2 0x01
6397 #define _PWM7DCH_PWM7DC2 0x01
6398 #define _PWM7DCH_PWMPW2 0x01
6399 #define _PWM7DCH_DC3 0x02
6400 #define _PWM7DCH_PWM7DC3 0x02
6401 #define _PWM7DCH_PWMPW3 0x02
6402 #define _PWM7DCH_DC4 0x04
6403 #define _PWM7DCH_PWM7DC4 0x04
6404 #define _PWM7DCH_PWMPW4 0x04
6405 #define _PWM7DCH_DC5 0x08
6406 #define _PWM7DCH_PWM7DC5 0x08
6407 #define _PWM7DCH_PWMPW5 0x08
6408 #define _PWM7DCH_DC6 0x10
6409 #define _PWM7DCH_PWM7DC6 0x10
6410 #define _PWM7DCH_PWMPW6 0x10
6411 #define _PWM7DCH_DC7 0x20
6412 #define _PWM7DCH_PWM7DC7 0x20
6413 #define _PWM7DCH_PWMPW7 0x20
6414 #define _PWM7DCH_DC8 0x40
6415 #define _PWM7DCH_PWM7DC8 0x40
6416 #define _PWM7DCH_PWMPW8 0x40
6417 #define _PWM7DCH_DC9 0x80
6418 #define _PWM7DCH_PWM7DC9 0x80
6419 #define _PWM7DCH_PWMPW9 0x80
6421 //==============================================================================
6424 //==============================================================================
6427 extern __at(0x0392) __sfr PWM7CON
;
6449 unsigned PWM7POL
: 1;
6450 unsigned PWM7OUT
: 1;
6451 unsigned PWM7OE
: 1;
6452 unsigned PWM7EN
: 1;
6456 extern __at(0x0392) volatile __PWM7CONbits_t PWM7CONbits
;
6458 #define _PWM7CON_POL 0x10
6459 #define _PWM7CON_PWM7POL 0x10
6460 #define _PWM7CON_OUT 0x20
6461 #define _PWM7CON_PWM7OUT 0x20
6462 #define _PWM7CON_OE 0x40
6463 #define _PWM7CON_PWM7OE 0x40
6464 #define _PWM7CON_EN 0x80
6465 #define _PWM7CON_PWM7EN 0x80
6467 //==============================================================================
6470 //==============================================================================
6473 extern __at(0x040C) __sfr SCANLADRL
;
6491 unsigned SCANLADR0
: 1;
6492 unsigned SCANLADR1
: 1;
6493 unsigned SCANLADR2
: 1;
6494 unsigned SCANLADR3
: 1;
6495 unsigned SCANLADR4
: 1;
6496 unsigned SCANLADR5
: 1;
6497 unsigned SCANLADR6
: 1;
6498 unsigned SCANLADR7
: 1;
6500 } __SCANLADRLbits_t
;
6502 extern __at(0x040C) volatile __SCANLADRLbits_t SCANLADRLbits
;
6505 #define _SCANLADR0 0x01
6507 #define _SCANLADR1 0x02
6509 #define _SCANLADR2 0x04
6511 #define _SCANLADR3 0x08
6513 #define _SCANLADR4 0x10
6515 #define _SCANLADR5 0x20
6517 #define _SCANLADR6 0x40
6519 #define _SCANLADR7 0x80
6521 //==============================================================================
6524 //==============================================================================
6527 extern __at(0x040D) __sfr SCANLADRH
;
6535 unsigned LADR10
: 1;
6536 unsigned LADR11
: 1;
6537 unsigned LADR12
: 1;
6538 unsigned LADR13
: 1;
6539 unsigned LADR14
: 1;
6540 unsigned LADR15
: 1;
6545 unsigned SCANLADR8
: 1;
6546 unsigned SCANLADR9
: 1;
6547 unsigned SCANLADR10
: 1;
6548 unsigned SCANLADR11
: 1;
6549 unsigned SCANLADR12
: 1;
6550 unsigned SCANLADR13
: 1;
6551 unsigned SCANLADR14
: 1;
6552 unsigned SCANLADR15
: 1;
6554 } __SCANLADRHbits_t
;
6556 extern __at(0x040D) volatile __SCANLADRHbits_t SCANLADRHbits
;
6559 #define _SCANLADR8 0x01
6561 #define _SCANLADR9 0x02
6562 #define _LADR10 0x04
6563 #define _SCANLADR10 0x04
6564 #define _LADR11 0x08
6565 #define _SCANLADR11 0x08
6566 #define _LADR12 0x10
6567 #define _SCANLADR12 0x10
6568 #define _LADR13 0x20
6569 #define _SCANLADR13 0x20
6570 #define _LADR14 0x40
6571 #define _SCANLADR14 0x40
6572 #define _LADR15 0x80
6573 #define _SCANLADR15 0x80
6575 //==============================================================================
6578 //==============================================================================
6581 extern __at(0x040E) __sfr SCANHADRL
;
6599 unsigned SCANHADR0
: 1;
6600 unsigned SCANHADR1
: 1;
6601 unsigned SCANHADR2
: 1;
6602 unsigned SCANHADR3
: 1;
6603 unsigned SCANHADR4
: 1;
6604 unsigned SCANHADR5
: 1;
6605 unsigned SCANHADR6
: 1;
6606 unsigned SCANHADR7
: 1;
6608 } __SCANHADRLbits_t
;
6610 extern __at(0x040E) volatile __SCANHADRLbits_t SCANHADRLbits
;
6613 #define _SCANHADR0 0x01
6615 #define _SCANHADR1 0x02
6617 #define _SCANHADR2 0x04
6619 #define _SCANHADR3 0x08
6621 #define _SCANHADR4 0x10
6623 #define _SCANHADR5 0x20
6625 #define _SCANHADR6 0x40
6627 #define _SCANHADR7 0x80
6629 //==============================================================================
6632 //==============================================================================
6635 extern __at(0x040F) __sfr SCANHADRH
;
6643 unsigned HADR10
: 1;
6644 unsigned HADR11
: 1;
6645 unsigned HADR12
: 1;
6646 unsigned HADR13
: 1;
6647 unsigned HADR14
: 1;
6648 unsigned HADR15
: 1;
6653 unsigned SCANHADR8
: 1;
6654 unsigned SCANHADR9
: 1;
6655 unsigned SCANHADR10
: 1;
6656 unsigned SCANHADR11
: 1;
6657 unsigned SCANHADR12
: 1;
6658 unsigned SCANHADR13
: 1;
6659 unsigned SCANHADR14
: 1;
6660 unsigned SCANHADR15
: 1;
6662 } __SCANHADRHbits_t
;
6664 extern __at(0x040F) volatile __SCANHADRHbits_t SCANHADRHbits
;
6667 #define _SCANHADR8 0x01
6669 #define _SCANHADR9 0x02
6670 #define _HADR10 0x04
6671 #define _SCANHADR10 0x04
6672 #define _HADR11 0x08
6673 #define _SCANHADR11 0x08
6674 #define _HADR12 0x10
6675 #define _SCANHADR12 0x10
6676 #define _HADR13 0x20
6677 #define _SCANHADR13 0x20
6678 #define _HADR14 0x40
6679 #define _SCANHADR14 0x40
6680 #define _HADR15 0x80
6681 #define _SCANHADR15 0x80
6683 //==============================================================================
6686 //==============================================================================
6689 extern __at(0x0410) __sfr SCANCON0
;
6699 unsigned INVALID
: 1;
6701 unsigned SCANGO
: 1;
6707 unsigned SCANMODE0
: 1;
6708 unsigned SCANMODE1
: 1;
6710 unsigned SCANINTM
: 1;
6711 unsigned SCANINVALID
: 1;
6712 unsigned SCANBUSY
: 1;
6714 unsigned SCANEN
: 1;
6723 unsigned DABORT
: 1;
6731 unsigned SCANMODE
: 2;
6742 extern __at(0x0410) volatile __SCANCON0bits_t SCANCON0bits
;
6744 #define _SCANCON0_MODE0 0x01
6745 #define _SCANCON0_SCANMODE0 0x01
6746 #define _SCANCON0_MODE1 0x02
6747 #define _SCANCON0_SCANMODE1 0x02
6748 #define _SCANCON0_INTM 0x08
6749 #define _SCANCON0_SCANINTM 0x08
6750 #define _SCANCON0_INVALID 0x10
6751 #define _SCANCON0_SCANINVALID 0x10
6752 #define _SCANCON0_DABORT 0x10
6753 #define _SCANCON0_BUSY 0x20
6754 #define _SCANCON0_SCANBUSY 0x20
6755 #define _SCANCON0_SCANGO 0x40
6756 #define _SCANCON0_EN 0x80
6757 #define _SCANCON0_SCANEN 0x80
6759 //==============================================================================
6762 //==============================================================================
6765 extern __at(0x0411) __sfr SCANTRIG
;
6783 unsigned SCANTSEL0
: 1;
6784 unsigned SCANTSEL1
: 1;
6785 unsigned SCANTSEL2
: 1;
6786 unsigned SCANTSEL3
: 1;
6801 unsigned SCANTSEL
: 4;
6806 extern __at(0x0411) volatile __SCANTRIGbits_t SCANTRIGbits
;
6809 #define _SCANTSEL0 0x01
6811 #define _SCANTSEL1 0x02
6813 #define _SCANTSEL2 0x04
6815 #define _SCANTSEL3 0x08
6817 //==============================================================================
6819 extern __at(0x0416) __sfr CRCDATA
;
6821 //==============================================================================
6824 extern __at(0x0416) __sfr CRCDATL
;
6838 extern __at(0x0416) volatile __CRCDATLbits_t CRCDATLbits
;
6849 //==============================================================================
6852 //==============================================================================
6855 extern __at(0x0417) __sfr CRCDATH
;
6861 unsigned DATA10
: 1;
6862 unsigned DATA11
: 1;
6863 unsigned DATA12
: 1;
6864 unsigned DATA13
: 1;
6865 unsigned DATA14
: 1;
6866 unsigned DATA15
: 1;
6869 extern __at(0x0417) volatile __CRCDATHbits_t CRCDATHbits
;
6873 #define _DATA10 0x04
6874 #define _DATA11 0x08
6875 #define _DATA12 0x10
6876 #define _DATA13 0x20
6877 #define _DATA14 0x40
6878 #define _DATA15 0x80
6880 //==============================================================================
6882 extern __at(0x0418) __sfr CRCACC
;
6884 //==============================================================================
6887 extern __at(0x0418) __sfr CRCACCL
;
6901 extern __at(0x0418) volatile __CRCACCLbits_t CRCACCLbits
;
6912 //==============================================================================
6915 //==============================================================================
6918 extern __at(0x0419) __sfr CRCACCH
;
6932 extern __at(0x0419) volatile __CRCACCHbits_t CRCACCHbits
;
6943 //==============================================================================
6945 extern __at(0x041A) __sfr CRCSHFT
;
6947 //==============================================================================
6950 extern __at(0x041A) __sfr CRCSHIFTL
;
6962 } __CRCSHIFTLbits_t
;
6964 extern __at(0x041A) volatile __CRCSHIFTLbits_t CRCSHIFTLbits
;
6975 //==============================================================================
6978 //==============================================================================
6981 extern __at(0x041B) __sfr CRCSHIFTH
;
6987 unsigned SHFT10
: 1;
6988 unsigned SHFT11
: 1;
6989 unsigned SHFT12
: 1;
6990 unsigned SHFT13
: 1;
6991 unsigned SHFT14
: 1;
6992 unsigned SHFT15
: 1;
6993 } __CRCSHIFTHbits_t
;
6995 extern __at(0x041B) volatile __CRCSHIFTHbits_t CRCSHIFTHbits
;
6999 #define _SHFT10 0x04
7000 #define _SHFT11 0x08
7001 #define _SHFT12 0x10
7002 #define _SHFT13 0x20
7003 #define _SHFT14 0x40
7004 #define _SHFT15 0x80
7006 //==============================================================================
7008 extern __at(0x041C) __sfr CRCXOR
;
7010 //==============================================================================
7013 extern __at(0x041C) __sfr CRCXORL
;
7027 extern __at(0x041C) volatile __CRCXORLbits_t CRCXORLbits
;
7037 //==============================================================================
7040 //==============================================================================
7043 extern __at(0x041D) __sfr CRCXORH
;
7057 extern __at(0x041D) volatile __CRCXORHbits_t CRCXORHbits
;
7068 //==============================================================================
7071 //==============================================================================
7074 extern __at(0x041E) __sfr CRCCON0
;
7081 unsigned SHIFTM
: 1;
7103 extern __at(0x041E) volatile __CRCCON0bits_t CRCCON0bits
;
7105 #define _CRCCON0_FULL 0x01
7106 #define _CRCCON0_SHIFTM 0x02
7107 #define _CRCCON0_ACCM 0x10
7108 #define _CRCCON0_BUSY 0x20
7109 #define _CRCCON0_CRCGO 0x40
7110 #define _CRCCON0_EN 0x80
7111 #define _CRCCON0_CRCEN 0x80
7113 //==============================================================================
7116 //==============================================================================
7119 extern __at(0x041F) __sfr CRCCON1
;
7148 extern __at(0x041F) volatile __CRCCON1bits_t CRCCON1bits
;
7159 //==============================================================================
7161 extern __at(0x048C) __sfr SMT1TMR
;
7163 //==============================================================================
7166 extern __at(0x048C) __sfr SMT1TMRL
;
7170 unsigned SMT1TMR0
: 1;
7171 unsigned SMT1TMR1
: 1;
7172 unsigned SMT1TMR2
: 1;
7173 unsigned SMT1TMR3
: 1;
7174 unsigned SMT1TMR4
: 1;
7175 unsigned SMT1TMR5
: 1;
7176 unsigned SMT1TMR6
: 1;
7177 unsigned SMT1TMR7
: 1;
7180 extern __at(0x048C) volatile __SMT1TMRLbits_t SMT1TMRLbits
;
7182 #define _SMT1TMR0 0x01
7183 #define _SMT1TMR1 0x02
7184 #define _SMT1TMR2 0x04
7185 #define _SMT1TMR3 0x08
7186 #define _SMT1TMR4 0x10
7187 #define _SMT1TMR5 0x20
7188 #define _SMT1TMR6 0x40
7189 #define _SMT1TMR7 0x80
7191 //==============================================================================
7194 //==============================================================================
7197 extern __at(0x048D) __sfr SMT1TMRH
;
7201 unsigned SMT1TMR8
: 1;
7202 unsigned SMT1TMR9
: 1;
7203 unsigned SMT1TMR10
: 1;
7204 unsigned SMT1TMR11
: 1;
7205 unsigned SMT1TMR12
: 1;
7206 unsigned SMT1TMR13
: 1;
7207 unsigned SMT1TMR14
: 1;
7208 unsigned SMT1TMR15
: 1;
7211 extern __at(0x048D) volatile __SMT1TMRHbits_t SMT1TMRHbits
;
7213 #define _SMT1TMR8 0x01
7214 #define _SMT1TMR9 0x02
7215 #define _SMT1TMR10 0x04
7216 #define _SMT1TMR11 0x08
7217 #define _SMT1TMR12 0x10
7218 #define _SMT1TMR13 0x20
7219 #define _SMT1TMR14 0x40
7220 #define _SMT1TMR15 0x80
7222 //==============================================================================
7225 //==============================================================================
7228 extern __at(0x048E) __sfr SMT1TMRU
;
7232 unsigned SMT1TMR16
: 1;
7233 unsigned SMT1TMR17
: 1;
7234 unsigned SMT1TMR18
: 1;
7235 unsigned SMT1TMR19
: 1;
7236 unsigned SMT1TMR20
: 1;
7237 unsigned SMT1TMR21
: 1;
7238 unsigned SMT1TMR22
: 1;
7239 unsigned SMT1TMR23
: 1;
7242 extern __at(0x048E) volatile __SMT1TMRUbits_t SMT1TMRUbits
;
7244 #define _SMT1TMR16 0x01
7245 #define _SMT1TMR17 0x02
7246 #define _SMT1TMR18 0x04
7247 #define _SMT1TMR19 0x08
7248 #define _SMT1TMR20 0x10
7249 #define _SMT1TMR21 0x20
7250 #define _SMT1TMR22 0x40
7251 #define _SMT1TMR23 0x80
7253 //==============================================================================
7255 extern __at(0x048F) __sfr SMT1CPR
;
7257 //==============================================================================
7260 extern __at(0x048F) __sfr SMT1CPRL
;
7274 extern __at(0x048F) volatile __SMT1CPRLbits_t SMT1CPRLbits
;
7285 //==============================================================================
7288 //==============================================================================
7291 extern __at(0x0490) __sfr SMT1CPRH
;
7309 unsigned SMT1CPR8
: 1;
7310 unsigned SMT1CPR9
: 1;
7311 unsigned SMT1CPR10
: 1;
7312 unsigned SMT1CPR11
: 1;
7313 unsigned SMT1CPR12
: 1;
7314 unsigned SMT1CPR13
: 1;
7315 unsigned SMT1CPR14
: 1;
7316 unsigned SMT1CPR15
: 1;
7320 extern __at(0x0490) volatile __SMT1CPRHbits_t SMT1CPRHbits
;
7323 #define _SMT1CPR8 0x01
7325 #define _SMT1CPR9 0x02
7327 #define _SMT1CPR10 0x04
7329 #define _SMT1CPR11 0x08
7331 #define _SMT1CPR12 0x10
7333 #define _SMT1CPR13 0x20
7335 #define _SMT1CPR14 0x40
7337 #define _SMT1CPR15 0x80
7339 //==============================================================================
7342 //==============================================================================
7345 extern __at(0x0491) __sfr SMT1CPRU
;
7363 unsigned SMT1CPR16
: 1;
7364 unsigned SMT1CPR17
: 1;
7365 unsigned SMT1CPR18
: 1;
7366 unsigned SMT1CPR19
: 1;
7367 unsigned SMT1CPR20
: 1;
7368 unsigned SMT1CPR21
: 1;
7369 unsigned SMT1CPR22
: 1;
7370 unsigned SMT1CPR23
: 1;
7374 extern __at(0x0491) volatile __SMT1CPRUbits_t SMT1CPRUbits
;
7377 #define _SMT1CPR16 0x01
7379 #define _SMT1CPR17 0x02
7381 #define _SMT1CPR18 0x04
7383 #define _SMT1CPR19 0x08
7385 #define _SMT1CPR20 0x10
7387 #define _SMT1CPR21 0x20
7389 #define _SMT1CPR22 0x40
7391 #define _SMT1CPR23 0x80
7393 //==============================================================================
7395 extern __at(0x0492) __sfr SMT1CPW
;
7397 //==============================================================================
7400 extern __at(0x0492) __sfr SMT1CPWL
;
7418 unsigned SMT1CPW0
: 1;
7419 unsigned SMT1CPW1
: 1;
7420 unsigned SMT1CPW2
: 1;
7421 unsigned SMT1CPW3
: 1;
7422 unsigned SMT1CPW4
: 1;
7423 unsigned SMT1CPW5
: 1;
7424 unsigned SMT1CPW6
: 1;
7425 unsigned SMT1CPW7
: 1;
7429 extern __at(0x0492) volatile __SMT1CPWLbits_t SMT1CPWLbits
;
7432 #define _SMT1CPW0 0x01
7434 #define _SMT1CPW1 0x02
7436 #define _SMT1CPW2 0x04
7438 #define _SMT1CPW3 0x08
7440 #define _SMT1CPW4 0x10
7442 #define _SMT1CPW5 0x20
7444 #define _SMT1CPW6 0x40
7446 #define _SMT1CPW7 0x80
7448 //==============================================================================
7451 //==============================================================================
7454 extern __at(0x0493) __sfr SMT1CPWH
;
7472 unsigned SMT1CPW8
: 1;
7473 unsigned SMT1CPW9
: 1;
7474 unsigned SMT1CPW10
: 1;
7475 unsigned SMT1CPW11
: 1;
7476 unsigned SMT1CPW12
: 1;
7477 unsigned SMT1CPW13
: 1;
7478 unsigned SMT1CPW14
: 1;
7479 unsigned SMT1CPW15
: 1;
7483 extern __at(0x0493) volatile __SMT1CPWHbits_t SMT1CPWHbits
;
7486 #define _SMT1CPW8 0x01
7488 #define _SMT1CPW9 0x02
7490 #define _SMT1CPW10 0x04
7492 #define _SMT1CPW11 0x08
7494 #define _SMT1CPW12 0x10
7496 #define _SMT1CPW13 0x20
7498 #define _SMT1CPW14 0x40
7500 #define _SMT1CPW15 0x80
7502 //==============================================================================
7505 //==============================================================================
7508 extern __at(0x0494) __sfr SMT1CPWU
;
7526 unsigned SMT1CPW16
: 1;
7527 unsigned SMT1CPW17
: 1;
7528 unsigned SMT1CPW18
: 1;
7529 unsigned SMT1CPW19
: 1;
7530 unsigned SMT1CPW20
: 1;
7531 unsigned SMT1CPW21
: 1;
7532 unsigned SMT1CPW22
: 1;
7533 unsigned SMT1CPW23
: 1;
7537 extern __at(0x0494) volatile __SMT1CPWUbits_t SMT1CPWUbits
;
7540 #define _SMT1CPW16 0x01
7542 #define _SMT1CPW17 0x02
7544 #define _SMT1CPW18 0x04
7546 #define _SMT1CPW19 0x08
7548 #define _SMT1CPW20 0x10
7550 #define _SMT1CPW21 0x20
7552 #define _SMT1CPW22 0x40
7554 #define _SMT1CPW23 0x80
7556 //==============================================================================
7558 extern __at(0x0495) __sfr SMT1PR
;
7560 //==============================================================================
7563 extern __at(0x0495) __sfr SMT1PRL
;
7567 unsigned SMT1PR0
: 1;
7568 unsigned SMT1PR1
: 1;
7569 unsigned SMT1PR2
: 1;
7570 unsigned SMT1PR3
: 1;
7571 unsigned SMT1PR4
: 1;
7572 unsigned SMT1PR5
: 1;
7573 unsigned SMT1PR6
: 1;
7574 unsigned SMT1PR7
: 1;
7577 extern __at(0x0495) volatile __SMT1PRLbits_t SMT1PRLbits
;
7579 #define _SMT1PR0 0x01
7580 #define _SMT1PR1 0x02
7581 #define _SMT1PR2 0x04
7582 #define _SMT1PR3 0x08
7583 #define _SMT1PR4 0x10
7584 #define _SMT1PR5 0x20
7585 #define _SMT1PR6 0x40
7586 #define _SMT1PR7 0x80
7588 //==============================================================================
7591 //==============================================================================
7594 extern __at(0x0496) __sfr SMT1PRH
;
7598 unsigned SMT1PR8
: 1;
7599 unsigned SMT1PR9
: 1;
7600 unsigned SMT1PR10
: 1;
7601 unsigned SMT1PR11
: 1;
7602 unsigned SMT1PR12
: 1;
7603 unsigned SMT1PR13
: 1;
7604 unsigned SMT1PR14
: 1;
7605 unsigned SMT1PR15
: 1;
7608 extern __at(0x0496) volatile __SMT1PRHbits_t SMT1PRHbits
;
7610 #define _SMT1PR8 0x01
7611 #define _SMT1PR9 0x02
7612 #define _SMT1PR10 0x04
7613 #define _SMT1PR11 0x08
7614 #define _SMT1PR12 0x10
7615 #define _SMT1PR13 0x20
7616 #define _SMT1PR14 0x40
7617 #define _SMT1PR15 0x80
7619 //==============================================================================
7622 //==============================================================================
7625 extern __at(0x0497) __sfr SMT1PRU
;
7629 unsigned SMT1PR16
: 1;
7630 unsigned SMT1PR17
: 1;
7631 unsigned SMT1PR18
: 1;
7632 unsigned SMT1PR19
: 1;
7633 unsigned SMT1PR20
: 1;
7634 unsigned SMT1PR21
: 1;
7635 unsigned SMT1PR22
: 1;
7636 unsigned SMT1PR23
: 1;
7639 extern __at(0x0497) volatile __SMT1PRUbits_t SMT1PRUbits
;
7641 #define _SMT1PR16 0x01
7642 #define _SMT1PR17 0x02
7643 #define _SMT1PR18 0x04
7644 #define _SMT1PR19 0x08
7645 #define _SMT1PR20 0x10
7646 #define _SMT1PR21 0x20
7647 #define _SMT1PR22 0x40
7648 #define _SMT1PR23 0x80
7650 //==============================================================================
7653 //==============================================================================
7656 extern __at(0x0498) __sfr SMT1CON0
;
7662 unsigned SMT1PS0
: 1;
7663 unsigned SMT1PS1
: 1;
7681 unsigned SMT1EN
: 1;
7686 unsigned SMT1PS
: 2;
7691 extern __at(0x0498) volatile __SMT1CON0bits_t SMT1CON0bits
;
7693 #define _SMT1CON0_SMT1PS0 0x01
7694 #define _SMT1CON0_SMT1PS1 0x02
7695 #define _SMT1CON0_CPOL 0x04
7696 #define _SMT1CON0_SPOL 0x08
7697 #define _SMT1CON0_WPOL 0x10
7698 #define _SMT1CON0_STP 0x20
7699 #define _SMT1CON0_EN 0x80
7700 #define _SMT1CON0_SMT1EN 0x80
7702 //==============================================================================
7705 //==============================================================================
7708 extern __at(0x0499) __sfr SMT1CON1
;
7720 unsigned REPEAT
: 1;
7721 unsigned SMT1GO
: 1;
7731 extern __at(0x0499) volatile __SMT1CON1bits_t SMT1CON1bits
;
7733 #define _SMT1CON1_MODE0 0x01
7734 #define _SMT1CON1_MODE1 0x02
7735 #define _SMT1CON1_MODE2 0x04
7736 #define _SMT1CON1_MODE3 0x08
7737 #define _SMT1CON1_REPEAT 0x40
7738 #define _SMT1CON1_SMT1GO 0x80
7740 //==============================================================================
7743 //==============================================================================
7746 extern __at(0x049A) __sfr SMT1STAT
;
7764 unsigned SMT1AS
: 1;
7765 unsigned SMT1WS
: 1;
7766 unsigned SMT1TS
: 1;
7769 unsigned SMT1RESET
: 1;
7770 unsigned SMT1CPWUP
: 1;
7771 unsigned SMT1CPRUP
: 1;
7775 extern __at(0x049A) volatile __SMT1STATbits_t SMT1STATbits
;
7778 #define _SMT1AS 0x01
7780 #define _SMT1WS 0x02
7782 #define _SMT1TS 0x04
7784 #define _SMT1RESET 0x20
7786 #define _SMT1CPWUP 0x40
7788 #define _SMT1CPRUP 0x80
7790 //==============================================================================
7793 //==============================================================================
7796 extern __at(0x049B) __sfr SMT1CLK
;
7814 unsigned SMT1CSEL0
: 1;
7815 unsigned SMT1CSEL1
: 1;
7816 unsigned SMT1CSEL2
: 1;
7826 unsigned SMT1CSEL
: 3;
7837 extern __at(0x049B) volatile __SMT1CLKbits_t SMT1CLKbits
;
7840 #define _SMT1CSEL0 0x01
7842 #define _SMT1CSEL1 0x02
7844 #define _SMT1CSEL2 0x04
7846 //==============================================================================
7849 //==============================================================================
7852 extern __at(0x049C) __sfr SMT1SIG
;
7870 unsigned SMT1SSEL0
: 1;
7871 unsigned SMT1SSEL1
: 1;
7872 unsigned SMT1SSEL2
: 1;
7873 unsigned SMT1SSEL3
: 1;
7874 unsigned SMT1SSEL4
: 1;
7882 unsigned SMT1SSEL
: 5;
7893 extern __at(0x049C) volatile __SMT1SIGbits_t SMT1SIGbits
;
7896 #define _SMT1SSEL0 0x01
7898 #define _SMT1SSEL1 0x02
7900 #define _SMT1SSEL2 0x04
7902 #define _SMT1SSEL3 0x08
7904 #define _SMT1SSEL4 0x10
7906 //==============================================================================
7909 //==============================================================================
7912 extern __at(0x049D) __sfr SMT1WIN
;
7930 unsigned SMT1WSEL0
: 1;
7931 unsigned SMT1WSEL1
: 1;
7932 unsigned SMT1WSEL2
: 1;
7933 unsigned SMT1WSEL3
: 1;
7934 unsigned SMT1WSEL4
: 1;
7942 unsigned SMT1WSEL
: 5;
7953 extern __at(0x049D) volatile __SMT1WINbits_t SMT1WINbits
;
7956 #define _SMT1WSEL0 0x01
7958 #define _SMT1WSEL1 0x02
7960 #define _SMT1WSEL2 0x04
7962 #define _SMT1WSEL3 0x08
7964 #define _SMT1WSEL4 0x10
7966 //==============================================================================
7968 extern __at(0x050C) __sfr SMT2TMR
;
7970 //==============================================================================
7973 extern __at(0x050C) __sfr SMT2TMRL
;
7977 unsigned SMT2TMR0
: 1;
7978 unsigned SMT2TMR1
: 1;
7979 unsigned SMT2TMR2
: 1;
7980 unsigned SMT2TMR3
: 1;
7981 unsigned SMT2TMR4
: 1;
7982 unsigned SMT2TMR5
: 1;
7983 unsigned SMT2TMR6
: 1;
7984 unsigned SMT2TMR7
: 1;
7987 extern __at(0x050C) volatile __SMT2TMRLbits_t SMT2TMRLbits
;
7989 #define _SMT2TMR0 0x01
7990 #define _SMT2TMR1 0x02
7991 #define _SMT2TMR2 0x04
7992 #define _SMT2TMR3 0x08
7993 #define _SMT2TMR4 0x10
7994 #define _SMT2TMR5 0x20
7995 #define _SMT2TMR6 0x40
7996 #define _SMT2TMR7 0x80
7998 //==============================================================================
8001 //==============================================================================
8004 extern __at(0x050D) __sfr SMT2TMRH
;
8008 unsigned SMT2TMR8
: 1;
8009 unsigned SMT2TMR9
: 1;
8010 unsigned SMT2TMR10
: 1;
8011 unsigned SMT2TMR11
: 1;
8012 unsigned SMT2TMR12
: 1;
8013 unsigned SMT2TMR13
: 1;
8014 unsigned SMT2TMR14
: 1;
8015 unsigned SMT2TMR15
: 1;
8018 extern __at(0x050D) volatile __SMT2TMRHbits_t SMT2TMRHbits
;
8020 #define _SMT2TMR8 0x01
8021 #define _SMT2TMR9 0x02
8022 #define _SMT2TMR10 0x04
8023 #define _SMT2TMR11 0x08
8024 #define _SMT2TMR12 0x10
8025 #define _SMT2TMR13 0x20
8026 #define _SMT2TMR14 0x40
8027 #define _SMT2TMR15 0x80
8029 //==============================================================================
8032 //==============================================================================
8035 extern __at(0x050E) __sfr SMT2TMRU
;
8039 unsigned SMT2TMR16
: 1;
8040 unsigned SMT2TMR17
: 1;
8041 unsigned SMT2TMR18
: 1;
8042 unsigned SMT2TMR19
: 1;
8043 unsigned SMT2TMR20
: 1;
8044 unsigned SMT2TMR21
: 1;
8045 unsigned SMT2TMR22
: 1;
8046 unsigned SMT2TMR23
: 1;
8049 extern __at(0x050E) volatile __SMT2TMRUbits_t SMT2TMRUbits
;
8051 #define _SMT2TMR16 0x01
8052 #define _SMT2TMR17 0x02
8053 #define _SMT2TMR18 0x04
8054 #define _SMT2TMR19 0x08
8055 #define _SMT2TMR20 0x10
8056 #define _SMT2TMR21 0x20
8057 #define _SMT2TMR22 0x40
8058 #define _SMT2TMR23 0x80
8060 //==============================================================================
8062 extern __at(0x050F) __sfr SMT2CPR
;
8064 //==============================================================================
8067 extern __at(0x050F) __sfr SMT2CPRL
;
8081 extern __at(0x050F) volatile __SMT2CPRLbits_t SMT2CPRLbits
;
8083 #define _SMT2CPRL_CPR0 0x01
8084 #define _SMT2CPRL_CPR1 0x02
8085 #define _SMT2CPRL_CPR2 0x04
8086 #define _SMT2CPRL_CPR3 0x08
8087 #define _SMT2CPRL_CPR4 0x10
8088 #define _SMT2CPRL_CPR5 0x20
8089 #define _SMT2CPRL_CPR6 0x40
8090 #define _SMT2CPRL_CPR7 0x80
8092 //==============================================================================
8095 //==============================================================================
8098 extern __at(0x0510) __sfr SMT2CPRH
;
8116 unsigned SMT2CPR8
: 1;
8117 unsigned SMT2CPR9
: 1;
8118 unsigned SMT2CPR10
: 1;
8119 unsigned SMT2CPR11
: 1;
8120 unsigned SMT2CPR12
: 1;
8121 unsigned SMT2CPR13
: 1;
8122 unsigned SMT2CPR14
: 1;
8123 unsigned SMT2CPR15
: 1;
8127 extern __at(0x0510) volatile __SMT2CPRHbits_t SMT2CPRHbits
;
8129 #define _SMT2CPRH_CPR8 0x01
8130 #define _SMT2CPRH_SMT2CPR8 0x01
8131 #define _SMT2CPRH_CPR9 0x02
8132 #define _SMT2CPRH_SMT2CPR9 0x02
8133 #define _SMT2CPRH_CPR10 0x04
8134 #define _SMT2CPRH_SMT2CPR10 0x04
8135 #define _SMT2CPRH_CPR11 0x08
8136 #define _SMT2CPRH_SMT2CPR11 0x08
8137 #define _SMT2CPRH_CPR12 0x10
8138 #define _SMT2CPRH_SMT2CPR12 0x10
8139 #define _SMT2CPRH_CPR13 0x20
8140 #define _SMT2CPRH_SMT2CPR13 0x20
8141 #define _SMT2CPRH_CPR14 0x40
8142 #define _SMT2CPRH_SMT2CPR14 0x40
8143 #define _SMT2CPRH_CPR15 0x80
8144 #define _SMT2CPRH_SMT2CPR15 0x80
8146 //==============================================================================
8149 //==============================================================================
8152 extern __at(0x0511) __sfr SMT2CPRU
;
8170 unsigned SMT2CPR16
: 1;
8171 unsigned SMT2CPR17
: 1;
8172 unsigned SMT2CPR18
: 1;
8173 unsigned SMT2CPR19
: 1;
8174 unsigned SMT2CPR20
: 1;
8175 unsigned SMT2CPR21
: 1;
8176 unsigned SMT2CPR22
: 1;
8177 unsigned SMT2CPR23
: 1;
8181 extern __at(0x0511) volatile __SMT2CPRUbits_t SMT2CPRUbits
;
8183 #define _SMT2CPRU_CPR16 0x01
8184 #define _SMT2CPRU_SMT2CPR16 0x01
8185 #define _SMT2CPRU_CPR17 0x02
8186 #define _SMT2CPRU_SMT2CPR17 0x02
8187 #define _SMT2CPRU_CPR18 0x04
8188 #define _SMT2CPRU_SMT2CPR18 0x04
8189 #define _SMT2CPRU_CPR19 0x08
8190 #define _SMT2CPRU_SMT2CPR19 0x08
8191 #define _SMT2CPRU_CPR20 0x10
8192 #define _SMT2CPRU_SMT2CPR20 0x10
8193 #define _SMT2CPRU_CPR21 0x20
8194 #define _SMT2CPRU_SMT2CPR21 0x20
8195 #define _SMT2CPRU_CPR22 0x40
8196 #define _SMT2CPRU_SMT2CPR22 0x40
8197 #define _SMT2CPRU_CPR23 0x80
8198 #define _SMT2CPRU_SMT2CPR23 0x80
8200 //==============================================================================
8202 extern __at(0x0512) __sfr SMT2CPW
;
8204 //==============================================================================
8207 extern __at(0x0512) __sfr SMT2CPWL
;
8225 unsigned SMT2CPW0
: 1;
8226 unsigned SMT2CPW1
: 1;
8227 unsigned SMT2CPW2
: 1;
8228 unsigned SMT2CPW3
: 1;
8229 unsigned SMT2CPW4
: 1;
8230 unsigned SMT2CPW5
: 1;
8231 unsigned SMT2CPW6
: 1;
8232 unsigned SMT2CPW7
: 1;
8236 extern __at(0x0512) volatile __SMT2CPWLbits_t SMT2CPWLbits
;
8238 #define _SMT2CPWL_CPW0 0x01
8239 #define _SMT2CPWL_SMT2CPW0 0x01
8240 #define _SMT2CPWL_CPW1 0x02
8241 #define _SMT2CPWL_SMT2CPW1 0x02
8242 #define _SMT2CPWL_CPW2 0x04
8243 #define _SMT2CPWL_SMT2CPW2 0x04
8244 #define _SMT2CPWL_CPW3 0x08
8245 #define _SMT2CPWL_SMT2CPW3 0x08
8246 #define _SMT2CPWL_CPW4 0x10
8247 #define _SMT2CPWL_SMT2CPW4 0x10
8248 #define _SMT2CPWL_CPW5 0x20
8249 #define _SMT2CPWL_SMT2CPW5 0x20
8250 #define _SMT2CPWL_CPW6 0x40
8251 #define _SMT2CPWL_SMT2CPW6 0x40
8252 #define _SMT2CPWL_CPW7 0x80
8253 #define _SMT2CPWL_SMT2CPW7 0x80
8255 //==============================================================================
8258 //==============================================================================
8261 extern __at(0x0513) __sfr SMT2CPWH
;
8279 unsigned SMT2CPW8
: 1;
8280 unsigned SMT2CPW9
: 1;
8281 unsigned SMT2CPW10
: 1;
8282 unsigned SMT2CPW11
: 1;
8283 unsigned SMT2CPW12
: 1;
8284 unsigned SMT2CPW13
: 1;
8285 unsigned SMT2CPW14
: 1;
8286 unsigned SMT2CPW15
: 1;
8290 extern __at(0x0513) volatile __SMT2CPWHbits_t SMT2CPWHbits
;
8292 #define _SMT2CPWH_CPW8 0x01
8293 #define _SMT2CPWH_SMT2CPW8 0x01
8294 #define _SMT2CPWH_CPW9 0x02
8295 #define _SMT2CPWH_SMT2CPW9 0x02
8296 #define _SMT2CPWH_CPW10 0x04
8297 #define _SMT2CPWH_SMT2CPW10 0x04
8298 #define _SMT2CPWH_CPW11 0x08
8299 #define _SMT2CPWH_SMT2CPW11 0x08
8300 #define _SMT2CPWH_CPW12 0x10
8301 #define _SMT2CPWH_SMT2CPW12 0x10
8302 #define _SMT2CPWH_CPW13 0x20
8303 #define _SMT2CPWH_SMT2CPW13 0x20
8304 #define _SMT2CPWH_CPW14 0x40
8305 #define _SMT2CPWH_SMT2CPW14 0x40
8306 #define _SMT2CPWH_CPW15 0x80
8307 #define _SMT2CPWH_SMT2CPW15 0x80
8309 //==============================================================================
8312 //==============================================================================
8315 extern __at(0x0514) __sfr SMT2CPWU
;
8333 unsigned SMT2CPW16
: 1;
8334 unsigned SMT2CPW17
: 1;
8335 unsigned SMT2CPW18
: 1;
8336 unsigned SMT2CPW19
: 1;
8337 unsigned SMT2CPW20
: 1;
8338 unsigned SMT2CPW21
: 1;
8339 unsigned SMT2CPW22
: 1;
8340 unsigned SMT2CPW23
: 1;
8344 extern __at(0x0514) volatile __SMT2CPWUbits_t SMT2CPWUbits
;
8346 #define _SMT2CPWU_CPW16 0x01
8347 #define _SMT2CPWU_SMT2CPW16 0x01
8348 #define _SMT2CPWU_CPW17 0x02
8349 #define _SMT2CPWU_SMT2CPW17 0x02
8350 #define _SMT2CPWU_CPW18 0x04
8351 #define _SMT2CPWU_SMT2CPW18 0x04
8352 #define _SMT2CPWU_CPW19 0x08
8353 #define _SMT2CPWU_SMT2CPW19 0x08
8354 #define _SMT2CPWU_CPW20 0x10
8355 #define _SMT2CPWU_SMT2CPW20 0x10
8356 #define _SMT2CPWU_CPW21 0x20
8357 #define _SMT2CPWU_SMT2CPW21 0x20
8358 #define _SMT2CPWU_CPW22 0x40
8359 #define _SMT2CPWU_SMT2CPW22 0x40
8360 #define _SMT2CPWU_CPW23 0x80
8361 #define _SMT2CPWU_SMT2CPW23 0x80
8363 //==============================================================================
8365 extern __at(0x0515) __sfr SMT2PR
;
8367 //==============================================================================
8370 extern __at(0x0515) __sfr SMT2PRL
;
8374 unsigned SMT2PR0
: 1;
8375 unsigned SMT2PR1
: 1;
8376 unsigned SMT2PR2
: 1;
8377 unsigned SMT2PR3
: 1;
8378 unsigned SMT2PR4
: 1;
8379 unsigned SMT2PR5
: 1;
8380 unsigned SMT2PR6
: 1;
8381 unsigned SMT2PR7
: 1;
8384 extern __at(0x0515) volatile __SMT2PRLbits_t SMT2PRLbits
;
8386 #define _SMT2PR0 0x01
8387 #define _SMT2PR1 0x02
8388 #define _SMT2PR2 0x04
8389 #define _SMT2PR3 0x08
8390 #define _SMT2PR4 0x10
8391 #define _SMT2PR5 0x20
8392 #define _SMT2PR6 0x40
8393 #define _SMT2PR7 0x80
8395 //==============================================================================
8398 //==============================================================================
8401 extern __at(0x0516) __sfr SMT2PRH
;
8405 unsigned SMT2PR8
: 1;
8406 unsigned SMT2PR9
: 1;
8407 unsigned SMT2PR10
: 1;
8408 unsigned SMT2PR11
: 1;
8409 unsigned SMT2PR12
: 1;
8410 unsigned SMT2PR13
: 1;
8411 unsigned SMT2PR14
: 1;
8412 unsigned SMT2PR15
: 1;
8415 extern __at(0x0516) volatile __SMT2PRHbits_t SMT2PRHbits
;
8417 #define _SMT2PR8 0x01
8418 #define _SMT2PR9 0x02
8419 #define _SMT2PR10 0x04
8420 #define _SMT2PR11 0x08
8421 #define _SMT2PR12 0x10
8422 #define _SMT2PR13 0x20
8423 #define _SMT2PR14 0x40
8424 #define _SMT2PR15 0x80
8426 //==============================================================================
8429 //==============================================================================
8432 extern __at(0x0517) __sfr SMT2PRU
;
8436 unsigned SMT2PR16
: 1;
8437 unsigned SMT2PR17
: 1;
8438 unsigned SMT2PR18
: 1;
8439 unsigned SMT2PR19
: 1;
8440 unsigned SMT2PR20
: 1;
8441 unsigned SMT2PR21
: 1;
8442 unsigned SMT2PR22
: 1;
8443 unsigned SMT2PR23
: 1;
8446 extern __at(0x0517) volatile __SMT2PRUbits_t SMT2PRUbits
;
8448 #define _SMT2PR16 0x01
8449 #define _SMT2PR17 0x02
8450 #define _SMT2PR18 0x04
8451 #define _SMT2PR19 0x08
8452 #define _SMT2PR20 0x10
8453 #define _SMT2PR21 0x20
8454 #define _SMT2PR22 0x40
8455 #define _SMT2PR23 0x80
8457 //==============================================================================
8460 //==============================================================================
8463 extern __at(0x0518) __sfr SMT2CON0
;
8469 unsigned SMT2PS0
: 1;
8470 unsigned SMT2PS1
: 1;
8488 unsigned SMT2EN
: 1;
8493 unsigned SMT2PS
: 2;
8498 extern __at(0x0518) volatile __SMT2CON0bits_t SMT2CON0bits
;
8500 #define _SMT2CON0_SMT2PS0 0x01
8501 #define _SMT2CON0_SMT2PS1 0x02
8502 #define _SMT2CON0_CPOL 0x04
8503 #define _SMT2CON0_SPOL 0x08
8504 #define _SMT2CON0_WPOL 0x10
8505 #define _SMT2CON0_STP 0x20
8506 #define _SMT2CON0_EN 0x80
8507 #define _SMT2CON0_SMT2EN 0x80
8509 //==============================================================================
8512 //==============================================================================
8515 extern __at(0x0519) __sfr SMT2CON1
;
8527 unsigned REPEAT
: 1;
8528 unsigned SMT2GO
: 1;
8538 extern __at(0x0519) volatile __SMT2CON1bits_t SMT2CON1bits
;
8540 #define _SMT2CON1_MODE0 0x01
8541 #define _SMT2CON1_MODE1 0x02
8542 #define _SMT2CON1_MODE2 0x04
8543 #define _SMT2CON1_MODE3 0x08
8544 #define _SMT2CON1_REPEAT 0x40
8545 #define _SMT2CON1_SMT2GO 0x80
8547 //==============================================================================
8550 //==============================================================================
8553 extern __at(0x051A) __sfr SMT2STAT
;
8571 unsigned SMT2AS
: 1;
8572 unsigned SMT2WS
: 1;
8573 unsigned SMT2TS
: 1;
8576 unsigned SMT2RESET
: 1;
8577 unsigned SMT2CPWUP
: 1;
8578 unsigned SMT2CPRUP
: 1;
8582 extern __at(0x051A) volatile __SMT2STATbits_t SMT2STATbits
;
8584 #define _SMT2STAT_AS 0x01
8585 #define _SMT2STAT_SMT2AS 0x01
8586 #define _SMT2STAT_WS 0x02
8587 #define _SMT2STAT_SMT2WS 0x02
8588 #define _SMT2STAT_TS 0x04
8589 #define _SMT2STAT_SMT2TS 0x04
8590 #define _SMT2STAT_RST 0x20
8591 #define _SMT2STAT_SMT2RESET 0x20
8592 #define _SMT2STAT_CPWUP 0x40
8593 #define _SMT2STAT_SMT2CPWUP 0x40
8594 #define _SMT2STAT_CPRUP 0x80
8595 #define _SMT2STAT_SMT2CPRUP 0x80
8597 //==============================================================================
8600 //==============================================================================
8603 extern __at(0x051B) __sfr SMT2CLK
;
8621 unsigned SMT2CSEL0
: 1;
8622 unsigned SMT2CSEL1
: 1;
8623 unsigned SMT2CSEL2
: 1;
8639 unsigned SMT2CSEL
: 3;
8644 extern __at(0x051B) volatile __SMT2CLKbits_t SMT2CLKbits
;
8646 #define _SMT2CLK_CSEL0 0x01
8647 #define _SMT2CLK_SMT2CSEL0 0x01
8648 #define _SMT2CLK_CSEL1 0x02
8649 #define _SMT2CLK_SMT2CSEL1 0x02
8650 #define _SMT2CLK_CSEL2 0x04
8651 #define _SMT2CLK_SMT2CSEL2 0x04
8653 //==============================================================================
8656 //==============================================================================
8659 extern __at(0x051C) __sfr SMT2SIG
;
8677 unsigned SMT2SSEL0
: 1;
8678 unsigned SMT2SSEL1
: 1;
8679 unsigned SMT2SSEL2
: 1;
8680 unsigned SMT2SSEL3
: 1;
8681 unsigned SMT2SSEL4
: 1;
8695 unsigned SMT2SSEL
: 5;
8700 extern __at(0x051C) volatile __SMT2SIGbits_t SMT2SIGbits
;
8702 #define _SMT2SIG_SSEL0 0x01
8703 #define _SMT2SIG_SMT2SSEL0 0x01
8704 #define _SMT2SIG_SSEL1 0x02
8705 #define _SMT2SIG_SMT2SSEL1 0x02
8706 #define _SMT2SIG_SSEL2 0x04
8707 #define _SMT2SIG_SMT2SSEL2 0x04
8708 #define _SMT2SIG_SSEL3 0x08
8709 #define _SMT2SIG_SMT2SSEL3 0x08
8710 #define _SMT2SIG_SSEL4 0x10
8711 #define _SMT2SIG_SMT2SSEL4 0x10
8713 //==============================================================================
8716 //==============================================================================
8719 extern __at(0x051D) __sfr SMT2WIN
;
8737 unsigned SMT2WSEL0
: 1;
8738 unsigned SMT2WSEL1
: 1;
8739 unsigned SMT2WSEL2
: 1;
8740 unsigned SMT2WSEL3
: 1;
8741 unsigned SMT2WSEL4
: 1;
8755 unsigned SMT2WSEL
: 5;
8760 extern __at(0x051D) volatile __SMT2WINbits_t SMT2WINbits
;
8762 #define _SMT2WIN_WSEL0 0x01
8763 #define _SMT2WIN_SMT2WSEL0 0x01
8764 #define _SMT2WIN_WSEL1 0x02
8765 #define _SMT2WIN_SMT2WSEL1 0x02
8766 #define _SMT2WIN_WSEL2 0x04
8767 #define _SMT2WIN_SMT2WSEL2 0x04
8768 #define _SMT2WIN_WSEL3 0x08
8769 #define _SMT2WIN_SMT2WSEL3 0x08
8770 #define _SMT2WIN_WSEL4 0x10
8771 #define _SMT2WIN_SMT2WSEL4 0x10
8773 //==============================================================================
8775 extern __at(0x058C) __sfr NCO1ACC
;
8777 //==============================================================================
8780 extern __at(0x058C) __sfr NCO1ACCL
;
8784 unsigned NCO1ACC0
: 1;
8785 unsigned NCO1ACC1
: 1;
8786 unsigned NCO1ACC2
: 1;
8787 unsigned NCO1ACC3
: 1;
8788 unsigned NCO1ACC4
: 1;
8789 unsigned NCO1ACC5
: 1;
8790 unsigned NCO1ACC6
: 1;
8791 unsigned NCO1ACC7
: 1;
8794 extern __at(0x058C) volatile __NCO1ACCLbits_t NCO1ACCLbits
;
8796 #define _NCO1ACC0 0x01
8797 #define _NCO1ACC1 0x02
8798 #define _NCO1ACC2 0x04
8799 #define _NCO1ACC3 0x08
8800 #define _NCO1ACC4 0x10
8801 #define _NCO1ACC5 0x20
8802 #define _NCO1ACC6 0x40
8803 #define _NCO1ACC7 0x80
8805 //==============================================================================
8808 //==============================================================================
8811 extern __at(0x058D) __sfr NCO1ACCH
;
8815 unsigned NCO1ACC8
: 1;
8816 unsigned NCO1ACC9
: 1;
8817 unsigned NCO1ACC10
: 1;
8818 unsigned NCO1ACC11
: 1;
8819 unsigned NCO1ACC12
: 1;
8820 unsigned NCO1ACC13
: 1;
8821 unsigned NCO1ACC14
: 1;
8822 unsigned NCO1ACC15
: 1;
8825 extern __at(0x058D) volatile __NCO1ACCHbits_t NCO1ACCHbits
;
8827 #define _NCO1ACC8 0x01
8828 #define _NCO1ACC9 0x02
8829 #define _NCO1ACC10 0x04
8830 #define _NCO1ACC11 0x08
8831 #define _NCO1ACC12 0x10
8832 #define _NCO1ACC13 0x20
8833 #define _NCO1ACC14 0x40
8834 #define _NCO1ACC15 0x80
8836 //==============================================================================
8839 //==============================================================================
8842 extern __at(0x058E) __sfr NCO1ACCU
;
8846 unsigned NCO1ACC16
: 1;
8847 unsigned NCO1ACC17
: 1;
8848 unsigned NCO1ACC18
: 1;
8849 unsigned NCO1ACC19
: 1;
8856 extern __at(0x058E) volatile __NCO1ACCUbits_t NCO1ACCUbits
;
8858 #define _NCO1ACC16 0x01
8859 #define _NCO1ACC17 0x02
8860 #define _NCO1ACC18 0x04
8861 #define _NCO1ACC19 0x08
8863 //==============================================================================
8865 extern __at(0x058F) __sfr NCO1INC
;
8867 //==============================================================================
8870 extern __at(0x058F) __sfr NCO1INCL
;
8874 unsigned NCO1INC0
: 1;
8875 unsigned NCO1INC1
: 1;
8876 unsigned NCO1INC2
: 1;
8877 unsigned NCO1INC3
: 1;
8878 unsigned NCO1INC4
: 1;
8879 unsigned NCO1INC5
: 1;
8880 unsigned NCO1INC6
: 1;
8881 unsigned NCO1INC7
: 1;
8884 extern __at(0x058F) volatile __NCO1INCLbits_t NCO1INCLbits
;
8886 #define _NCO1INC0 0x01
8887 #define _NCO1INC1 0x02
8888 #define _NCO1INC2 0x04
8889 #define _NCO1INC3 0x08
8890 #define _NCO1INC4 0x10
8891 #define _NCO1INC5 0x20
8892 #define _NCO1INC6 0x40
8893 #define _NCO1INC7 0x80
8895 //==============================================================================
8898 //==============================================================================
8901 extern __at(0x0590) __sfr NCO1INCH
;
8905 unsigned NCO1INC8
: 1;
8906 unsigned NCO1INC9
: 1;
8907 unsigned NCO1INC10
: 1;
8908 unsigned NCO1INC11
: 1;
8909 unsigned NCO1INC12
: 1;
8910 unsigned NCO1INC13
: 1;
8911 unsigned NCO1INC14
: 1;
8912 unsigned NCO1INC15
: 1;
8915 extern __at(0x0590) volatile __NCO1INCHbits_t NCO1INCHbits
;
8917 #define _NCO1INC8 0x01
8918 #define _NCO1INC9 0x02
8919 #define _NCO1INC10 0x04
8920 #define _NCO1INC11 0x08
8921 #define _NCO1INC12 0x10
8922 #define _NCO1INC13 0x20
8923 #define _NCO1INC14 0x40
8924 #define _NCO1INC15 0x80
8926 //==============================================================================
8929 //==============================================================================
8932 extern __at(0x0591) __sfr NCO1INCU
;
8936 unsigned NCO1INC16
: 1;
8937 unsigned NCO1INC17
: 1;
8938 unsigned NCO1INC18
: 1;
8939 unsigned NCO1INC19
: 1;
8946 extern __at(0x0591) volatile __NCO1INCUbits_t NCO1INCUbits
;
8948 #define _NCO1INC16 0x01
8949 #define _NCO1INC17 0x02
8950 #define _NCO1INC18 0x04
8951 #define _NCO1INC19 0x08
8953 //==============================================================================
8956 //==============================================================================
8959 extern __at(0x0592) __sfr NCO1CON
;
8973 extern __at(0x0592) volatile __NCO1CONbits_t NCO1CONbits
;
8980 //==============================================================================
8983 //==============================================================================
8986 extern __at(0x0593) __sfr NCO1CLK
;
8992 unsigned N1CKS0
: 1;
8993 unsigned N1CKS1
: 1;
8994 unsigned N1CKS2
: 1;
8997 unsigned N1PWS0
: 1;
8998 unsigned N1PWS1
: 1;
8999 unsigned N1PWS2
: 1;
9015 extern __at(0x0593) volatile __NCO1CLKbits_t NCO1CLKbits
;
9017 #define _N1CKS0 0x01
9018 #define _N1CKS1 0x02
9019 #define _N1CKS2 0x04
9020 #define _N1PWS0 0x20
9021 #define _N1PWS1 0x40
9022 #define _N1PWS2 0x80
9024 //==============================================================================
9027 //==============================================================================
9030 extern __at(0x060C) __sfr CWG1CLKCON
;
9048 unsigned CWG1CS
: 1;
9057 } __CWG1CLKCONbits_t
;
9059 extern __at(0x060C) volatile __CWG1CLKCONbits_t CWG1CLKCONbits
;
9062 #define _CWG1CS 0x01
9064 //==============================================================================
9067 //==============================================================================
9070 extern __at(0x060D) __sfr CWG1ISM
;
9076 unsigned CWG1ISM0
: 1;
9077 unsigned CWG1ISM1
: 1;
9078 unsigned CWG1ISM2
: 1;
9079 unsigned CWG1ISM3
: 1;
9088 unsigned CWG1ISM
: 4;
9093 extern __at(0x060D) volatile __CWG1ISMbits_t CWG1ISMbits
;
9095 #define _CWG1ISM0 0x01
9096 #define _CWG1ISM1 0x02
9097 #define _CWG1ISM2 0x04
9098 #define _CWG1ISM3 0x08
9100 //==============================================================================
9103 //==============================================================================
9106 extern __at(0x060E) __sfr CWG1DBR
;
9124 unsigned CWG1DBR0
: 1;
9125 unsigned CWG1DBR1
: 1;
9126 unsigned CWG1DBR2
: 1;
9127 unsigned CWG1DBR3
: 1;
9128 unsigned CWG1DBR4
: 1;
9129 unsigned CWG1DBR5
: 1;
9142 unsigned CWG1DBR
: 6;
9147 extern __at(0x060E) volatile __CWG1DBRbits_t CWG1DBRbits
;
9150 #define _CWG1DBR0 0x01
9152 #define _CWG1DBR1 0x02
9154 #define _CWG1DBR2 0x04
9156 #define _CWG1DBR3 0x08
9158 #define _CWG1DBR4 0x10
9160 #define _CWG1DBR5 0x20
9162 //==============================================================================
9165 //==============================================================================
9168 extern __at(0x060F) __sfr CWG1DBF
;
9186 unsigned CWG1DBF0
: 1;
9187 unsigned CWG1DBF1
: 1;
9188 unsigned CWG1DBF2
: 1;
9189 unsigned CWG1DBF3
: 1;
9190 unsigned CWG1DBF4
: 1;
9191 unsigned CWG1DBF5
: 1;
9204 unsigned CWG1DBF
: 6;
9209 extern __at(0x060F) volatile __CWG1DBFbits_t CWG1DBFbits
;
9212 #define _CWG1DBF0 0x01
9214 #define _CWG1DBF1 0x02
9216 #define _CWG1DBF2 0x04
9218 #define _CWG1DBF3 0x08
9220 #define _CWG1DBF4 0x10
9222 #define _CWG1DBF5 0x20
9224 //==============================================================================
9227 //==============================================================================
9230 extern __at(0x0610) __sfr CWG1CON0
;
9248 unsigned CWG1MODE0
: 1;
9249 unsigned CWG1MODE1
: 1;
9250 unsigned CWG1MODE2
: 1;
9254 unsigned CWG1LD
: 1;
9267 unsigned CWG1EN
: 1;
9272 unsigned CWG1MODE
: 3;
9283 extern __at(0x0610) volatile __CWG1CON0bits_t CWG1CON0bits
;
9285 #define _CWG1CON0_MODE0 0x01
9286 #define _CWG1CON0_CWG1MODE0 0x01
9287 #define _CWG1CON0_MODE1 0x02
9288 #define _CWG1CON0_CWG1MODE1 0x02
9289 #define _CWG1CON0_MODE2 0x04
9290 #define _CWG1CON0_CWG1MODE2 0x04
9291 #define _CWG1CON0_LD 0x40
9292 #define _CWG1CON0_CWG1LD 0x40
9293 #define _CWG1CON0_EN 0x80
9294 #define _CWG1CON0_G1EN 0x80
9295 #define _CWG1CON0_CWG1EN 0x80
9297 //==============================================================================
9300 //==============================================================================
9303 extern __at(0x0611) __sfr CWG1CON1
;
9321 unsigned CWG1POLA
: 1;
9322 unsigned CWG1POLB
: 1;
9323 unsigned CWG1POLC
: 1;
9324 unsigned CWG1POLD
: 1;
9326 unsigned CWG1IN
: 1;
9332 extern __at(0x0611) volatile __CWG1CON1bits_t CWG1CON1bits
;
9335 #define _CWG1POLA 0x01
9337 #define _CWG1POLB 0x02
9339 #define _CWG1POLC 0x04
9341 #define _CWG1POLD 0x08
9343 #define _CWG1IN 0x20
9345 //==============================================================================
9348 //==============================================================================
9351 extern __at(0x0612) __sfr CWG1AS0
;
9364 unsigned SHUTDOWN
: 1;
9371 unsigned CWG1LSAC0
: 1;
9372 unsigned CWG1LSAC1
: 1;
9373 unsigned CWG1LSBD0
: 1;
9374 unsigned CWG1LSBD1
: 1;
9375 unsigned CWG1REN
: 1;
9376 unsigned CWG1SHUTDOWN
: 1;
9382 unsigned CWG1LSAC
: 2;
9396 unsigned CWG1LSBD
: 2;
9408 extern __at(0x0612) volatile __CWG1AS0bits_t CWG1AS0bits
;
9411 #define _CWG1LSAC0 0x04
9413 #define _CWG1LSAC1 0x08
9415 #define _CWG1LSBD0 0x10
9417 #define _CWG1LSBD1 0x20
9419 #define _CWG1REN 0x40
9420 #define _SHUTDOWN 0x80
9421 #define _CWG1SHUTDOWN 0x80
9423 //==============================================================================
9426 //==============================================================================
9429 extern __at(0x0613) __sfr CWG1AS1
;
9443 extern __at(0x0613) volatile __CWG1AS1bits_t CWG1AS1bits
;
9453 //==============================================================================
9456 //==============================================================================
9459 extern __at(0x0614) __sfr CWG1STR
;
9477 unsigned CWG1STRA
: 1;
9478 unsigned CWG1STRB
: 1;
9479 unsigned CWG1STRC
: 1;
9480 unsigned CWG1STRD
: 1;
9481 unsigned CWG1OVRA
: 1;
9482 unsigned CWG1OVRB
: 1;
9483 unsigned CWG1OVRC
: 1;
9484 unsigned CWG1OVRD
: 1;
9488 extern __at(0x0614) volatile __CWG1STRbits_t CWG1STRbits
;
9491 #define _CWG1STRA 0x01
9493 #define _CWG1STRB 0x02
9495 #define _CWG1STRC 0x04
9497 #define _CWG1STRD 0x08
9499 #define _CWG1OVRA 0x10
9501 #define _CWG1OVRB 0x20
9503 #define _CWG1OVRC 0x40
9505 #define _CWG1OVRD 0x80
9507 //==============================================================================
9510 //==============================================================================
9513 extern __at(0x0616) __sfr CWG2CLKCON
;
9531 unsigned CWG2CS
: 1;
9540 } __CWG2CLKCONbits_t
;
9542 extern __at(0x0616) volatile __CWG2CLKCONbits_t CWG2CLKCONbits
;
9544 #define _CWG2CLKCON_CS 0x01
9545 #define _CWG2CLKCON_CWG2CS 0x01
9547 //==============================================================================
9550 //==============================================================================
9553 extern __at(0x0617) __sfr CWG2ISM
;
9559 unsigned CWG2ISM0
: 1;
9560 unsigned CWG2ISM1
: 1;
9561 unsigned CWG2ISM2
: 1;
9562 unsigned CWG2ISM3
: 1;
9571 unsigned CWG2ISM
: 4;
9576 extern __at(0x0617) volatile __CWG2ISMbits_t CWG2ISMbits
;
9578 #define _CWG2ISM0 0x01
9579 #define _CWG2ISM1 0x02
9580 #define _CWG2ISM2 0x04
9581 #define _CWG2ISM3 0x08
9583 //==============================================================================
9586 //==============================================================================
9589 extern __at(0x0618) __sfr CWG2DBR
;
9607 unsigned CWG2DBR0
: 1;
9608 unsigned CWG2DBR1
: 1;
9609 unsigned CWG2DBR2
: 1;
9610 unsigned CWG2DBR3
: 1;
9611 unsigned CWG2DBR4
: 1;
9612 unsigned CWG2DBR5
: 1;
9619 unsigned CWG2DBR
: 6;
9630 extern __at(0x0618) volatile __CWG2DBRbits_t CWG2DBRbits
;
9632 #define _CWG2DBR_DBR0 0x01
9633 #define _CWG2DBR_CWG2DBR0 0x01
9634 #define _CWG2DBR_DBR1 0x02
9635 #define _CWG2DBR_CWG2DBR1 0x02
9636 #define _CWG2DBR_DBR2 0x04
9637 #define _CWG2DBR_CWG2DBR2 0x04
9638 #define _CWG2DBR_DBR3 0x08
9639 #define _CWG2DBR_CWG2DBR3 0x08
9640 #define _CWG2DBR_DBR4 0x10
9641 #define _CWG2DBR_CWG2DBR4 0x10
9642 #define _CWG2DBR_DBR5 0x20
9643 #define _CWG2DBR_CWG2DBR5 0x20
9645 //==============================================================================
9648 //==============================================================================
9651 extern __at(0x0619) __sfr CWG2DBF
;
9669 unsigned CWG2DBF0
: 1;
9670 unsigned CWG2DBF1
: 1;
9671 unsigned CWG2DBF2
: 1;
9672 unsigned CWG2DBF3
: 1;
9673 unsigned CWG2DBF4
: 1;
9674 unsigned CWG2DBF5
: 1;
9681 unsigned CWG2DBF
: 6;
9692 extern __at(0x0619) volatile __CWG2DBFbits_t CWG2DBFbits
;
9694 #define _CWG2DBF_DBF0 0x01
9695 #define _CWG2DBF_CWG2DBF0 0x01
9696 #define _CWG2DBF_DBF1 0x02
9697 #define _CWG2DBF_CWG2DBF1 0x02
9698 #define _CWG2DBF_DBF2 0x04
9699 #define _CWG2DBF_CWG2DBF2 0x04
9700 #define _CWG2DBF_DBF3 0x08
9701 #define _CWG2DBF_CWG2DBF3 0x08
9702 #define _CWG2DBF_DBF4 0x10
9703 #define _CWG2DBF_CWG2DBF4 0x10
9704 #define _CWG2DBF_DBF5 0x20
9705 #define _CWG2DBF_CWG2DBF5 0x20
9707 //==============================================================================
9710 //==============================================================================
9713 extern __at(0x061A) __sfr CWG2CON0
;
9731 unsigned CWG2MODE0
: 1;
9732 unsigned CWG2MODE1
: 1;
9733 unsigned CWG2MODE2
: 1;
9737 unsigned CWG2LD
: 1;
9750 unsigned CWG2EN
: 1;
9761 unsigned CWG2MODE
: 3;
9766 extern __at(0x061A) volatile __CWG2CON0bits_t CWG2CON0bits
;
9768 #define _CWG2CON0_MODE0 0x01
9769 #define _CWG2CON0_CWG2MODE0 0x01
9770 #define _CWG2CON0_MODE1 0x02
9771 #define _CWG2CON0_CWG2MODE1 0x02
9772 #define _CWG2CON0_MODE2 0x04
9773 #define _CWG2CON0_CWG2MODE2 0x04
9774 #define _CWG2CON0_LD 0x40
9775 #define _CWG2CON0_CWG2LD 0x40
9776 #define _CWG2CON0_EN 0x80
9777 #define _CWG2CON0_G2EN 0x80
9778 #define _CWG2CON0_CWG2EN 0x80
9780 //==============================================================================
9783 //==============================================================================
9786 extern __at(0x061B) __sfr CWG2CON1
;
9804 unsigned CWG2POLA
: 1;
9805 unsigned CWG2POLB
: 1;
9806 unsigned CWG2POLC
: 1;
9807 unsigned CWG2POLD
: 1;
9809 unsigned CWG2IN
: 1;
9815 extern __at(0x061B) volatile __CWG2CON1bits_t CWG2CON1bits
;
9817 #define _CWG2CON1_POLA 0x01
9818 #define _CWG2CON1_CWG2POLA 0x01
9819 #define _CWG2CON1_POLB 0x02
9820 #define _CWG2CON1_CWG2POLB 0x02
9821 #define _CWG2CON1_POLC 0x04
9822 #define _CWG2CON1_CWG2POLC 0x04
9823 #define _CWG2CON1_POLD 0x08
9824 #define _CWG2CON1_CWG2POLD 0x08
9825 #define _CWG2CON1_IN 0x20
9826 #define _CWG2CON1_CWG2IN 0x20
9828 //==============================================================================
9831 //==============================================================================
9834 extern __at(0x061C) __sfr CWG2AS0
;
9847 unsigned SHUTDOWN
: 1;
9854 unsigned CWG2LSAC0
: 1;
9855 unsigned CWG2LSAC1
: 1;
9856 unsigned CWG2LSBD0
: 1;
9857 unsigned CWG2LSBD1
: 1;
9858 unsigned CWG2REN
: 1;
9859 unsigned CWG2SHUTDOWN
: 1;
9872 unsigned CWG2LSAC
: 2;
9879 unsigned CWG2LSBD
: 2;
9891 extern __at(0x061C) volatile __CWG2AS0bits_t CWG2AS0bits
;
9893 #define _CWG2AS0_LSAC0 0x04
9894 #define _CWG2AS0_CWG2LSAC0 0x04
9895 #define _CWG2AS0_LSAC1 0x08
9896 #define _CWG2AS0_CWG2LSAC1 0x08
9897 #define _CWG2AS0_LSBD0 0x10
9898 #define _CWG2AS0_CWG2LSBD0 0x10
9899 #define _CWG2AS0_LSBD1 0x20
9900 #define _CWG2AS0_CWG2LSBD1 0x20
9901 #define _CWG2AS0_REN 0x40
9902 #define _CWG2AS0_CWG2REN 0x40
9903 #define _CWG2AS0_SHUTDOWN 0x80
9904 #define _CWG2AS0_CWG2SHUTDOWN 0x80
9906 //==============================================================================
9909 //==============================================================================
9912 extern __at(0x061D) __sfr CWG2AS1
;
9926 extern __at(0x061D) volatile __CWG2AS1bits_t CWG2AS1bits
;
9928 #define _CWG2AS1_AS0E 0x01
9929 #define _CWG2AS1_AS1E 0x02
9930 #define _CWG2AS1_AS2E 0x04
9931 #define _CWG2AS1_AS3E 0x08
9932 #define _CWG2AS1_AS4E 0x10
9933 #define _CWG2AS1_AS5E 0x20
9934 #define _CWG2AS1_AS6E 0x40
9936 //==============================================================================
9939 //==============================================================================
9942 extern __at(0x061E) __sfr CWG2STR
;
9960 unsigned CWG2STRA
: 1;
9961 unsigned CWG2STRB
: 1;
9962 unsigned CWG2STRC
: 1;
9963 unsigned CWG2STRD
: 1;
9964 unsigned CWG2OVRA
: 1;
9965 unsigned CWG2OVRB
: 1;
9966 unsigned CWG2OVRC
: 1;
9967 unsigned CWG2OVRD
: 1;
9971 extern __at(0x061E) volatile __CWG2STRbits_t CWG2STRbits
;
9973 #define _CWG2STR_STRA 0x01
9974 #define _CWG2STR_CWG2STRA 0x01
9975 #define _CWG2STR_STRB 0x02
9976 #define _CWG2STR_CWG2STRB 0x02
9977 #define _CWG2STR_STRC 0x04
9978 #define _CWG2STR_CWG2STRC 0x04
9979 #define _CWG2STR_STRD 0x08
9980 #define _CWG2STR_CWG2STRD 0x08
9981 #define _CWG2STR_OVRA 0x10
9982 #define _CWG2STR_CWG2OVRA 0x10
9983 #define _CWG2STR_OVRB 0x20
9984 #define _CWG2STR_CWG2OVRB 0x20
9985 #define _CWG2STR_OVRC 0x40
9986 #define _CWG2STR_CWG2OVRC 0x40
9987 #define _CWG2STR_OVRD 0x80
9988 #define _CWG2STR_CWG2OVRD 0x80
9990 //==============================================================================
9993 //==============================================================================
9996 extern __at(0x068C) __sfr CWG3CLKCON
;
10014 unsigned CWG3CS
: 1;
10023 } __CWG3CLKCONbits_t
;
10025 extern __at(0x068C) volatile __CWG3CLKCONbits_t CWG3CLKCONbits
;
10027 #define _CWG3CLKCON_CS 0x01
10028 #define _CWG3CLKCON_CWG3CS 0x01
10030 //==============================================================================
10033 //==============================================================================
10036 extern __at(0x068D) __sfr CWG3ISM
;
10042 unsigned CWG3ISM0
: 1;
10043 unsigned CWG3ISM1
: 1;
10044 unsigned CWG3ISM2
: 1;
10045 unsigned CWG3ISM3
: 1;
10054 unsigned CWG3ISM
: 4;
10059 extern __at(0x068D) volatile __CWG3ISMbits_t CWG3ISMbits
;
10061 #define _CWG3ISM0 0x01
10062 #define _CWG3ISM1 0x02
10063 #define _CWG3ISM2 0x04
10064 #define _CWG3ISM3 0x08
10066 //==============================================================================
10069 //==============================================================================
10072 extern __at(0x068E) __sfr CWG3DBR
;
10090 unsigned CWG3DBR0
: 1;
10091 unsigned CWG3DBR1
: 1;
10092 unsigned CWG3DBR2
: 1;
10093 unsigned CWG3DBR3
: 1;
10094 unsigned CWG3DBR4
: 1;
10095 unsigned CWG3DBR5
: 1;
10108 unsigned CWG3DBR
: 6;
10113 extern __at(0x068E) volatile __CWG3DBRbits_t CWG3DBRbits
;
10115 #define _CWG3DBR_DBR0 0x01
10116 #define _CWG3DBR_CWG3DBR0 0x01
10117 #define _CWG3DBR_DBR1 0x02
10118 #define _CWG3DBR_CWG3DBR1 0x02
10119 #define _CWG3DBR_DBR2 0x04
10120 #define _CWG3DBR_CWG3DBR2 0x04
10121 #define _CWG3DBR_DBR3 0x08
10122 #define _CWG3DBR_CWG3DBR3 0x08
10123 #define _CWG3DBR_DBR4 0x10
10124 #define _CWG3DBR_CWG3DBR4 0x10
10125 #define _CWG3DBR_DBR5 0x20
10126 #define _CWG3DBR_CWG3DBR5 0x20
10128 //==============================================================================
10131 //==============================================================================
10134 extern __at(0x068F) __sfr CWG3DBF
;
10152 unsigned CWG3DBF0
: 1;
10153 unsigned CWG3DBF1
: 1;
10154 unsigned CWG3DBF2
: 1;
10155 unsigned CWG3DBF3
: 1;
10156 unsigned CWG3DBF4
: 1;
10157 unsigned CWG3DBF5
: 1;
10164 unsigned CWG3DBF
: 6;
10175 extern __at(0x068F) volatile __CWG3DBFbits_t CWG3DBFbits
;
10177 #define _CWG3DBF_DBF0 0x01
10178 #define _CWG3DBF_CWG3DBF0 0x01
10179 #define _CWG3DBF_DBF1 0x02
10180 #define _CWG3DBF_CWG3DBF1 0x02
10181 #define _CWG3DBF_DBF2 0x04
10182 #define _CWG3DBF_CWG3DBF2 0x04
10183 #define _CWG3DBF_DBF3 0x08
10184 #define _CWG3DBF_CWG3DBF3 0x08
10185 #define _CWG3DBF_DBF4 0x10
10186 #define _CWG3DBF_CWG3DBF4 0x10
10187 #define _CWG3DBF_DBF5 0x20
10188 #define _CWG3DBF_CWG3DBF5 0x20
10190 //==============================================================================
10193 //==============================================================================
10196 extern __at(0x0690) __sfr CWG3CON0
;
10202 unsigned MODE0
: 1;
10203 unsigned MODE1
: 1;
10204 unsigned MODE2
: 1;
10214 unsigned CWG3MODE0
: 1;
10215 unsigned CWG3MODE1
: 1;
10216 unsigned CWG3MODE2
: 1;
10220 unsigned CWG3LD
: 1;
10233 unsigned CWG3EN
: 1;
10238 unsigned CWG3MODE
: 3;
10247 } __CWG3CON0bits_t
;
10249 extern __at(0x0690) volatile __CWG3CON0bits_t CWG3CON0bits
;
10251 #define _CWG3CON0_MODE0 0x01
10252 #define _CWG3CON0_CWG3MODE0 0x01
10253 #define _CWG3CON0_MODE1 0x02
10254 #define _CWG3CON0_CWG3MODE1 0x02
10255 #define _CWG3CON0_MODE2 0x04
10256 #define _CWG3CON0_CWG3MODE2 0x04
10257 #define _CWG3CON0_LD 0x40
10258 #define _CWG3CON0_CWG3LD 0x40
10259 #define _CWG3CON0_EN 0x80
10260 #define _CWG3CON0_G3EN 0x80
10261 #define _CWG3CON0_CWG3EN 0x80
10263 //==============================================================================
10266 //==============================================================================
10269 extern __at(0x0691) __sfr CWG3CON1
;
10287 unsigned CWG3POLA
: 1;
10288 unsigned CWG3POLB
: 1;
10289 unsigned CWG3POLC
: 1;
10290 unsigned CWG3POLD
: 1;
10292 unsigned CWG3IN
: 1;
10296 } __CWG3CON1bits_t
;
10298 extern __at(0x0691) volatile __CWG3CON1bits_t CWG3CON1bits
;
10300 #define _CWG3CON1_POLA 0x01
10301 #define _CWG3CON1_CWG3POLA 0x01
10302 #define _CWG3CON1_POLB 0x02
10303 #define _CWG3CON1_CWG3POLB 0x02
10304 #define _CWG3CON1_POLC 0x04
10305 #define _CWG3CON1_CWG3POLC 0x04
10306 #define _CWG3CON1_POLD 0x08
10307 #define _CWG3CON1_CWG3POLD 0x08
10308 #define _CWG3CON1_IN 0x20
10309 #define _CWG3CON1_CWG3IN 0x20
10311 //==============================================================================
10314 //==============================================================================
10317 extern __at(0x0692) __sfr CWG3AS0
;
10325 unsigned LSAC0
: 1;
10326 unsigned LSAC1
: 1;
10327 unsigned LSBD0
: 1;
10328 unsigned LSBD1
: 1;
10330 unsigned SHUTDOWN
: 1;
10337 unsigned CWG3LSAC0
: 1;
10338 unsigned CWG3LSAC1
: 1;
10339 unsigned CWG3LSBD0
: 1;
10340 unsigned CWG3LSBD1
: 1;
10341 unsigned CWG3REN
: 1;
10342 unsigned CWG3SHUTDOWN
: 1;
10348 unsigned CWG3LSAC
: 2;
10369 unsigned CWG3LSBD
: 2;
10374 extern __at(0x0692) volatile __CWG3AS0bits_t CWG3AS0bits
;
10376 #define _CWG3AS0_LSAC0 0x04
10377 #define _CWG3AS0_CWG3LSAC0 0x04
10378 #define _CWG3AS0_LSAC1 0x08
10379 #define _CWG3AS0_CWG3LSAC1 0x08
10380 #define _CWG3AS0_LSBD0 0x10
10381 #define _CWG3AS0_CWG3LSBD0 0x10
10382 #define _CWG3AS0_LSBD1 0x20
10383 #define _CWG3AS0_CWG3LSBD1 0x20
10384 #define _CWG3AS0_REN 0x40
10385 #define _CWG3AS0_CWG3REN 0x40
10386 #define _CWG3AS0_SHUTDOWN 0x80
10387 #define _CWG3AS0_CWG3SHUTDOWN 0x80
10389 //==============================================================================
10392 //==============================================================================
10395 extern __at(0x0693) __sfr CWG3AS1
;
10409 extern __at(0x0693) volatile __CWG3AS1bits_t CWG3AS1bits
;
10411 #define _CWG3AS1_AS0E 0x01
10412 #define _CWG3AS1_AS1E 0x02
10413 #define _CWG3AS1_AS2E 0x04
10414 #define _CWG3AS1_AS3E 0x08
10415 #define _CWG3AS1_AS4E 0x10
10416 #define _CWG3AS1_AS5E 0x20
10417 #define _CWG3AS1_AS6E 0x40
10419 //==============================================================================
10422 //==============================================================================
10425 extern __at(0x0694) __sfr CWG3STR
;
10443 unsigned CWG3STRA
: 1;
10444 unsigned CWG3STRB
: 1;
10445 unsigned CWG3STRC
: 1;
10446 unsigned CWG3STRD
: 1;
10447 unsigned CWG3OVRA
: 1;
10448 unsigned CWG3OVRB
: 1;
10449 unsigned CWG3OVRC
: 1;
10450 unsigned CWG3OVRD
: 1;
10454 extern __at(0x0694) volatile __CWG3STRbits_t CWG3STRbits
;
10456 #define _CWG3STR_STRA 0x01
10457 #define _CWG3STR_CWG3STRA 0x01
10458 #define _CWG3STR_STRB 0x02
10459 #define _CWG3STR_CWG3STRB 0x02
10460 #define _CWG3STR_STRC 0x04
10461 #define _CWG3STR_CWG3STRC 0x04
10462 #define _CWG3STR_STRD 0x08
10463 #define _CWG3STR_CWG3STRD 0x08
10464 #define _CWG3STR_OVRA 0x10
10465 #define _CWG3STR_CWG3OVRA 0x10
10466 #define _CWG3STR_OVRB 0x20
10467 #define _CWG3STR_CWG3OVRB 0x20
10468 #define _CWG3STR_OVRC 0x40
10469 #define _CWG3STR_CWG3OVRC 0x40
10470 #define _CWG3STR_OVRD 0x80
10471 #define _CWG3STR_CWG3OVRD 0x80
10473 //==============================================================================
10476 //==============================================================================
10479 extern __at(0x070C) __sfr PIR0
;
10487 unsigned IOCIF
: 1;
10488 unsigned TMR0IF
: 1;
10493 extern __at(0x070C) volatile __PIR0bits_t PIR0bits
;
10496 #define _IOCIF 0x10
10497 #define _TMR0IF 0x20
10499 //==============================================================================
10502 //==============================================================================
10505 extern __at(0x070D) __sfr PIR1
;
10510 unsigned ADTIF
: 1;
10515 unsigned CSWIF
: 1;
10516 unsigned OSFIF
: 1;
10519 extern __at(0x070D) volatile __PIR1bits_t PIR1bits
;
10522 #define _ADTIF 0x02
10523 #define _CSWIF 0x40
10524 #define _OSFIF 0x80
10526 //==============================================================================
10529 //==============================================================================
10532 extern __at(0x070E) __sfr PIR2
;
10542 unsigned ZCDIF
: 1;
10546 extern __at(0x070E) volatile __PIR2bits_t PIR2bits
;
10550 #define _ZCDIF 0x40
10552 //==============================================================================
10555 //==============================================================================
10558 extern __at(0x070F) __sfr PIR3
;
10562 unsigned SSP1IF
: 1;
10563 unsigned BCL1IF
: 1;
10564 unsigned SSP2IF
: 1;
10565 unsigned BCL2IF
: 1;
10572 extern __at(0x070F) volatile __PIR3bits_t PIR3bits
;
10574 #define _SSP1IF 0x01
10575 #define _BCL1IF 0x02
10576 #define _SSP2IF 0x04
10577 #define _BCL2IF 0x08
10581 //==============================================================================
10584 //==============================================================================
10587 extern __at(0x0710) __sfr PIR4
;
10591 unsigned TMR1IF
: 1;
10592 unsigned TMR2IF
: 1;
10593 unsigned TMR3IF
: 1;
10594 unsigned TMR4IF
: 1;
10595 unsigned TMR5IF
: 1;
10596 unsigned TMR6IF
: 1;
10601 extern __at(0x0710) volatile __PIR4bits_t PIR4bits
;
10603 #define _TMR1IF 0x01
10604 #define _TMR2IF 0x02
10605 #define _TMR3IF 0x04
10606 #define _TMR4IF 0x08
10607 #define _TMR5IF 0x10
10608 #define _TMR6IF 0x20
10610 //==============================================================================
10613 //==============================================================================
10616 extern __at(0x0711) __sfr PIR5
;
10620 unsigned TMR1GIF
: 1;
10621 unsigned TMR3GIF
: 1;
10622 unsigned TMR5GIF
: 1;
10624 unsigned CLC1IF
: 1;
10625 unsigned CLC2IF
: 1;
10626 unsigned CLC3IF
: 1;
10627 unsigned CLC4IF
: 1;
10630 extern __at(0x0711) volatile __PIR5bits_t PIR5bits
;
10632 #define _TMR1GIF 0x01
10633 #define _TMR3GIF 0x02
10634 #define _TMR5GIF 0x04
10635 #define _CLC1IF 0x10
10636 #define _CLC2IF 0x20
10637 #define _CLC3IF 0x40
10638 #define _CLC4IF 0x80
10640 //==============================================================================
10643 //==============================================================================
10646 extern __at(0x0712) __sfr PIR6
;
10650 unsigned CCP1IF
: 1;
10651 unsigned CCP2IF
: 1;
10652 unsigned CCP3IF
: 1;
10653 unsigned CCP4IF
: 1;
10654 unsigned CCP5IF
: 1;
10660 extern __at(0x0712) volatile __PIR6bits_t PIR6bits
;
10662 #define _CCP1IF 0x01
10663 #define _CCP2IF 0x02
10664 #define _CCP3IF 0x04
10665 #define _CCP4IF 0x08
10666 #define _CCP5IF 0x10
10668 //==============================================================================
10671 //==============================================================================
10674 extern __at(0x0713) __sfr PIR7
;
10680 unsigned CWG1IF
: 1;
10681 unsigned CWG2IF
: 1;
10682 unsigned CWG3IF
: 1;
10684 unsigned NCO1IF
: 1;
10685 unsigned NVMIF
: 1;
10686 unsigned CRCIF
: 1;
10687 unsigned SCANIF
: 1;
10696 unsigned NCOIF
: 1;
10703 extern __at(0x0713) volatile __PIR7bits_t PIR7bits
;
10705 #define _CWG1IF 0x01
10706 #define _CWG2IF 0x02
10707 #define _CWG3IF 0x04
10708 #define _NCO1IF 0x10
10709 #define _NCOIF 0x10
10710 #define _NVMIF 0x20
10711 #define _CRCIF 0x40
10712 #define _SCANIF 0x80
10714 //==============================================================================
10717 //==============================================================================
10720 extern __at(0x0714) __sfr PIR8
;
10724 unsigned SMT1IF
: 1;
10725 unsigned SMT1PRAIF
: 1;
10726 unsigned SMT1PWAIF
: 1;
10727 unsigned SMT2IF
: 1;
10728 unsigned SMT2PRAIF
: 1;
10729 unsigned SMT2PWAIF
: 1;
10734 extern __at(0x0714) volatile __PIR8bits_t PIR8bits
;
10736 #define _SMT1IF 0x01
10737 #define _SMT1PRAIF 0x02
10738 #define _SMT1PWAIF 0x04
10739 #define _SMT2IF 0x08
10740 #define _SMT2PRAIF 0x10
10741 #define _SMT2PWAIF 0x20
10743 //==============================================================================
10746 //==============================================================================
10749 extern __at(0x0716) __sfr PIE0
;
10757 unsigned IOCIE
: 1;
10758 unsigned TMR0IE
: 1;
10763 extern __at(0x0716) volatile __PIE0bits_t PIE0bits
;
10766 #define _IOCIE 0x10
10767 #define _TMR0IE 0x20
10769 //==============================================================================
10772 //==============================================================================
10775 extern __at(0x0717) __sfr PIE1
;
10780 unsigned ADTIE
: 1;
10785 unsigned CSWIE
: 1;
10786 unsigned OSFIE
: 1;
10789 extern __at(0x0717) volatile __PIE1bits_t PIE1bits
;
10792 #define _ADTIE 0x02
10793 #define _CSWIE 0x40
10794 #define _OSFIE 0x80
10796 //==============================================================================
10799 //==============================================================================
10802 extern __at(0x0718) __sfr PIE2
;
10812 unsigned ZCDIE
: 1;
10816 extern __at(0x0718) volatile __PIE2bits_t PIE2bits
;
10820 #define _ZCDIE 0x40
10822 //==============================================================================
10825 //==============================================================================
10828 extern __at(0x0719) __sfr PIE3
;
10832 unsigned SSP1IE
: 1;
10833 unsigned BCL1IE
: 1;
10834 unsigned SSP2IE
: 1;
10835 unsigned BCL2IE
: 1;
10842 extern __at(0x0719) volatile __PIE3bits_t PIE3bits
;
10844 #define _SSP1IE 0x01
10845 #define _BCL1IE 0x02
10846 #define _SSP2IE 0x04
10847 #define _BCL2IE 0x08
10851 //==============================================================================
10854 //==============================================================================
10857 extern __at(0x071A) __sfr PIE4
;
10861 unsigned TMR1IE
: 1;
10862 unsigned TMR2IE
: 1;
10863 unsigned TMR3IE
: 1;
10864 unsigned TMR4IE
: 1;
10865 unsigned TMR5IE
: 1;
10866 unsigned TMR6IE
: 1;
10871 extern __at(0x071A) volatile __PIE4bits_t PIE4bits
;
10873 #define _TMR1IE 0x01
10874 #define _TMR2IE 0x02
10875 #define _TMR3IE 0x04
10876 #define _TMR4IE 0x08
10877 #define _TMR5IE 0x10
10878 #define _TMR6IE 0x20
10880 //==============================================================================
10883 //==============================================================================
10886 extern __at(0x071B) __sfr PIE5
;
10890 unsigned TMR1GIE
: 1;
10891 unsigned TMR3GIE
: 1;
10892 unsigned TMR5GIE
: 1;
10894 unsigned CLC1IE
: 1;
10895 unsigned CLC2IE
: 1;
10896 unsigned CLC3IE
: 1;
10897 unsigned CLC4IE
: 1;
10900 extern __at(0x071B) volatile __PIE5bits_t PIE5bits
;
10902 #define _TMR1GIE 0x01
10903 #define _TMR3GIE 0x02
10904 #define _TMR5GIE 0x04
10905 #define _CLC1IE 0x10
10906 #define _CLC2IE 0x20
10907 #define _CLC3IE 0x40
10908 #define _CLC4IE 0x80
10910 //==============================================================================
10913 //==============================================================================
10916 extern __at(0x071C) __sfr PIE6
;
10920 unsigned CCP1IE
: 1;
10921 unsigned CCP2IE
: 1;
10922 unsigned CCP3IE
: 1;
10923 unsigned CCP4IE
: 1;
10924 unsigned CCP5IE
: 1;
10930 extern __at(0x071C) volatile __PIE6bits_t PIE6bits
;
10932 #define _CCP1IE 0x01
10933 #define _CCP2IE 0x02
10934 #define _CCP3IE 0x04
10935 #define _CCP4IE 0x08
10936 #define _CCP5IE 0x10
10938 //==============================================================================
10941 //==============================================================================
10944 extern __at(0x071D) __sfr PIE7
;
10950 unsigned CWG1IE
: 1;
10951 unsigned CWG2IE
: 1;
10952 unsigned CWG3IE
: 1;
10954 unsigned NCO1IE
: 1;
10955 unsigned NVMIE
: 1;
10956 unsigned CRCIE
: 1;
10957 unsigned SCANIE
: 1;
10966 unsigned NCOIE
: 1;
10973 extern __at(0x071D) volatile __PIE7bits_t PIE7bits
;
10975 #define _CWG1IE 0x01
10976 #define _CWG2IE 0x02
10977 #define _CWG3IE 0x04
10978 #define _NCO1IE 0x10
10979 #define _NCOIE 0x10
10980 #define _NVMIE 0x20
10981 #define _CRCIE 0x40
10982 #define _SCANIE 0x80
10984 //==============================================================================
10987 //==============================================================================
10990 extern __at(0x071E) __sfr PIE8
;
10994 unsigned SMT1IE
: 1;
10995 unsigned SMT1PRAIE
: 1;
10996 unsigned SMT1PWAIE
: 1;
10997 unsigned SMT2IE
: 1;
10998 unsigned SMT2PRAIE
: 1;
10999 unsigned SMT2PWAIE
: 1;
11004 extern __at(0x071E) volatile __PIE8bits_t PIE8bits
;
11006 #define _SMT1IE 0x01
11007 #define _SMT1PRAIE 0x02
11008 #define _SMT1PWAIE 0x04
11009 #define _SMT2IE 0x08
11010 #define _SMT2PRAIE 0x10
11011 #define _SMT2PWAIE 0x20
11013 //==============================================================================
11016 //==============================================================================
11019 extern __at(0x0796) __sfr PMD0
;
11023 unsigned IOCMD
: 1;
11024 unsigned CLKRMD
: 1;
11025 unsigned NVMMD
: 1;
11026 unsigned SCANMD
: 1;
11027 unsigned CRCMD
: 1;
11029 unsigned FVRMD
: 1;
11030 unsigned SYSCMD
: 1;
11033 extern __at(0x0796) volatile __PMD0bits_t PMD0bits
;
11035 #define _IOCMD 0x01
11036 #define _CLKRMD 0x02
11037 #define _NVMMD 0x04
11038 #define _SCANMD 0x08
11039 #define _CRCMD 0x10
11040 #define _FVRMD 0x40
11041 #define _SYSCMD 0x80
11043 //==============================================================================
11046 //==============================================================================
11049 extern __at(0x0797) __sfr PMD1
;
11055 unsigned TMR0MD
: 1;
11056 unsigned TMR1MD
: 1;
11057 unsigned TMR2MD
: 1;
11058 unsigned TMR3MD
: 1;
11059 unsigned TMR4MD
: 1;
11060 unsigned TMR5MD
: 1;
11061 unsigned TMR6MD
: 1;
11062 unsigned NCOMD
: 1;
11074 unsigned NCO1MD
: 1;
11078 extern __at(0x0797) volatile __PMD1bits_t PMD1bits
;
11080 #define _TMR0MD 0x01
11081 #define _TMR1MD 0x02
11082 #define _TMR2MD 0x04
11083 #define _TMR3MD 0x08
11084 #define _TMR4MD 0x10
11085 #define _TMR5MD 0x20
11086 #define _TMR6MD 0x40
11087 #define _NCOMD 0x80
11088 #define _NCO1MD 0x80
11090 //==============================================================================
11093 //==============================================================================
11096 extern __at(0x0798) __sfr PMD2
;
11100 unsigned ZCDMD
: 1;
11101 unsigned CMP1MD
: 1;
11102 unsigned CMP2MD
: 1;
11105 unsigned ADCMD
: 1;
11106 unsigned DACMD
: 1;
11110 extern __at(0x0798) volatile __PMD2bits_t PMD2bits
;
11112 #define _ZCDMD 0x01
11113 #define _CMP1MD 0x02
11114 #define _CMP2MD 0x04
11115 #define _ADCMD 0x20
11116 #define _DACMD 0x40
11118 //==============================================================================
11121 //==============================================================================
11124 extern __at(0x0799) __sfr PMD3
;
11128 unsigned CCP1MD
: 1;
11129 unsigned CCP2MD
: 1;
11130 unsigned CCP3MD
: 1;
11131 unsigned CCP4MD
: 1;
11132 unsigned CCP5MD
: 1;
11133 unsigned PWM6MD
: 1;
11134 unsigned PWM7MD
: 1;
11138 extern __at(0x0799) volatile __PMD3bits_t PMD3bits
;
11140 #define _CCP1MD 0x01
11141 #define _CCP2MD 0x02
11142 #define _CCP3MD 0x04
11143 #define _CCP4MD 0x08
11144 #define _CCP5MD 0x10
11145 #define _PWM6MD 0x20
11146 #define _PWM7MD 0x40
11148 //==============================================================================
11151 //==============================================================================
11154 extern __at(0x079A) __sfr PMD4
;
11158 unsigned CWG1MD
: 1;
11159 unsigned CWG2MD
: 1;
11160 unsigned CWG3MD
: 1;
11162 unsigned MSSP1MD
: 1;
11163 unsigned MSSP2MD
: 1;
11164 unsigned UART1MD
: 1;
11168 extern __at(0x079A) volatile __PMD4bits_t PMD4bits
;
11170 #define _CWG1MD 0x01
11171 #define _CWG2MD 0x02
11172 #define _CWG3MD 0x04
11173 #define _MSSP1MD 0x10
11174 #define _MSSP2MD 0x20
11175 #define _UART1MD 0x40
11177 //==============================================================================
11180 //==============================================================================
11183 extern __at(0x079B) __sfr PMD5
;
11187 unsigned DSMMD
: 1;
11188 unsigned CLC1MD
: 1;
11189 unsigned CLC2MD
: 1;
11190 unsigned CLC3MD
: 1;
11191 unsigned CLC4MD
: 1;
11193 unsigned SMT1MD
: 1;
11194 unsigned SMT2MD
: 1;
11197 extern __at(0x079B) volatile __PMD5bits_t PMD5bits
;
11199 #define _DSMMD 0x01
11200 #define _CLC1MD 0x02
11201 #define _CLC2MD 0x04
11202 #define _CLC3MD 0x08
11203 #define _CLC4MD 0x10
11204 #define _SMT1MD 0x40
11205 #define _SMT2MD 0x80
11207 //==============================================================================
11210 //==============================================================================
11213 extern __at(0x080C) __sfr WDTCON0
;
11220 unsigned WDTPS0
: 1;
11221 unsigned WDTPS1
: 1;
11222 unsigned WDTPS2
: 1;
11223 unsigned WDTPS3
: 1;
11224 unsigned WDTPS4
: 1;
11231 unsigned SWDTEN
: 1;
11243 unsigned WDTSEN
: 1;
11256 unsigned WDTPS
: 5;
11261 extern __at(0x080C) volatile __WDTCON0bits_t WDTCON0bits
;
11263 #define _WDTCON0_SEN 0x01
11264 #define _WDTCON0_SWDTEN 0x01
11265 #define _WDTCON0_WDTSEN 0x01
11266 #define _WDTCON0_WDTPS0 0x02
11267 #define _WDTCON0_WDTPS1 0x04
11268 #define _WDTCON0_WDTPS2 0x08
11269 #define _WDTCON0_WDTPS3 0x10
11270 #define _WDTCON0_WDTPS4 0x20
11272 //==============================================================================
11275 //==============================================================================
11278 extern __at(0x080D) __sfr WDTCON1
;
11284 unsigned WINDOW0
: 1;
11285 unsigned WINDOW1
: 1;
11286 unsigned WINDOW2
: 1;
11288 unsigned WDTCS0
: 1;
11289 unsigned WDTCS1
: 1;
11290 unsigned WDTCS2
: 1;
11296 unsigned WDTWINDOW0
: 1;
11297 unsigned WDTWINDOW1
: 1;
11298 unsigned WDTWINDOW2
: 1;
11308 unsigned WINDOW
: 3;
11314 unsigned WDTWINDOW
: 3;
11321 unsigned WDTCS
: 3;
11326 extern __at(0x080D) volatile __WDTCON1bits_t WDTCON1bits
;
11328 #define _WINDOW0 0x01
11329 #define _WDTWINDOW0 0x01
11330 #define _WINDOW1 0x02
11331 #define _WDTWINDOW1 0x02
11332 #define _WINDOW2 0x04
11333 #define _WDTWINDOW2 0x04
11334 #define _WDTCS0 0x10
11335 #define _WDTCS1 0x20
11336 #define _WDTCS2 0x40
11338 //==============================================================================
11341 //==============================================================================
11344 extern __at(0x080E) __sfr WDTPSL
;
11350 unsigned PSCNT0
: 1;
11351 unsigned PSCNT1
: 1;
11352 unsigned PSCNT2
: 1;
11353 unsigned PSCNT3
: 1;
11354 unsigned PSCNT4
: 1;
11355 unsigned PSCNT5
: 1;
11356 unsigned PSCNT6
: 1;
11357 unsigned PSCNT7
: 1;
11362 unsigned WDTPSCNT0
: 1;
11363 unsigned WDTPSCNT1
: 1;
11364 unsigned WDTPSCNT2
: 1;
11365 unsigned WDTPSCNT3
: 1;
11366 unsigned WDTPSCNT4
: 1;
11367 unsigned WDTPSCNT5
: 1;
11368 unsigned WDTPSCNT6
: 1;
11369 unsigned WDTPSCNT7
: 1;
11373 extern __at(0x080E) volatile __WDTPSLbits_t WDTPSLbits
;
11375 #define _PSCNT0 0x01
11376 #define _WDTPSCNT0 0x01
11377 #define _PSCNT1 0x02
11378 #define _WDTPSCNT1 0x02
11379 #define _PSCNT2 0x04
11380 #define _WDTPSCNT2 0x04
11381 #define _PSCNT3 0x08
11382 #define _WDTPSCNT3 0x08
11383 #define _PSCNT4 0x10
11384 #define _WDTPSCNT4 0x10
11385 #define _PSCNT5 0x20
11386 #define _WDTPSCNT5 0x20
11387 #define _PSCNT6 0x40
11388 #define _WDTPSCNT6 0x40
11389 #define _PSCNT7 0x80
11390 #define _WDTPSCNT7 0x80
11392 //==============================================================================
11395 //==============================================================================
11398 extern __at(0x080F) __sfr WDTPSH
;
11404 unsigned PSCNT8
: 1;
11405 unsigned PSCNT9
: 1;
11406 unsigned PSCNT10
: 1;
11407 unsigned PSCNT11
: 1;
11408 unsigned PSCNT12
: 1;
11409 unsigned PSCNT13
: 1;
11410 unsigned PSCNT14
: 1;
11411 unsigned PSCNT15
: 1;
11416 unsigned WDTPSCNT8
: 1;
11417 unsigned WDTPSCNT9
: 1;
11418 unsigned WDTPSCNT10
: 1;
11419 unsigned WDTPSCNT11
: 1;
11420 unsigned WDTPSCNT12
: 1;
11421 unsigned WDTPSCNT13
: 1;
11422 unsigned WDTPSCNT14
: 1;
11423 unsigned WDTPSCNT15
: 1;
11427 extern __at(0x080F) volatile __WDTPSHbits_t WDTPSHbits
;
11429 #define _PSCNT8 0x01
11430 #define _WDTPSCNT8 0x01
11431 #define _PSCNT9 0x02
11432 #define _WDTPSCNT9 0x02
11433 #define _PSCNT10 0x04
11434 #define _WDTPSCNT10 0x04
11435 #define _PSCNT11 0x08
11436 #define _WDTPSCNT11 0x08
11437 #define _PSCNT12 0x10
11438 #define _WDTPSCNT12 0x10
11439 #define _PSCNT13 0x20
11440 #define _WDTPSCNT13 0x20
11441 #define _PSCNT14 0x40
11442 #define _WDTPSCNT14 0x40
11443 #define _PSCNT15 0x80
11444 #define _WDTPSCNT15 0x80
11446 //==============================================================================
11449 //==============================================================================
11452 extern __at(0x0810) __sfr WDTTMR
;
11458 unsigned PSCNT16
: 1;
11459 unsigned PSCNT17
: 1;
11460 unsigned STATE
: 1;
11461 unsigned WDTTMR0
: 1;
11462 unsigned WDTTMR1
: 1;
11463 unsigned WDTTMR2
: 1;
11464 unsigned WDTTMR3
: 1;
11470 unsigned WDTPSCNT16
: 1;
11471 unsigned WDTPSCNT17
: 1;
11472 unsigned WDTSTATE
: 1;
11483 unsigned WDTTMR
: 4;
11488 extern __at(0x0810) volatile __WDTTMRbits_t WDTTMRbits
;
11490 #define _PSCNT16 0x01
11491 #define _WDTPSCNT16 0x01
11492 #define _PSCNT17 0x02
11493 #define _WDTPSCNT17 0x02
11494 #define _STATE 0x04
11495 #define _WDTSTATE 0x04
11496 #define _WDTTMR0 0x08
11497 #define _WDTTMR1 0x10
11498 #define _WDTTMR2 0x20
11499 #define _WDTTMR3 0x40
11501 //==============================================================================
11504 //==============================================================================
11507 extern __at(0x0811) __sfr BORCON
;
11511 unsigned BORRDY
: 1;
11518 unsigned SBOREN
: 1;
11521 extern __at(0x0811) volatile __BORCONbits_t BORCONbits
;
11523 #define _BORRDY 0x01
11524 #define _SBOREN 0x80
11526 //==============================================================================
11529 //==============================================================================
11532 extern __at(0x0813) __sfr PCON0
;
11536 unsigned NOT_BOR
: 1;
11537 unsigned NOT_POR
: 1;
11538 unsigned NOT_RI
: 1;
11539 unsigned NOT_RMCLR
: 1;
11540 unsigned NOT_RWDT
: 1;
11541 unsigned NOT_WDTWV
: 1;
11542 unsigned STKUNF
: 1;
11543 unsigned STKOVF
: 1;
11546 extern __at(0x0813) volatile __PCON0bits_t PCON0bits
;
11548 #define _NOT_BOR 0x01
11549 #define _NOT_POR 0x02
11550 #define _NOT_RI 0x04
11551 #define _NOT_RMCLR 0x08
11552 #define _NOT_RWDT 0x10
11553 #define _NOT_WDTWV 0x20
11554 #define _STKUNF 0x40
11555 #define _STKOVF 0x80
11557 //==============================================================================
11560 //==============================================================================
11563 extern __at(0x0814) __sfr CCDCON
;
11569 unsigned CCDS0
: 1;
11570 unsigned CCDS1
: 1;
11576 unsigned CCDEN
: 1;
11586 extern __at(0x0814) volatile __CCDCONbits_t CCDCONbits
;
11588 #define _CCDS0 0x01
11589 #define _CCDS1 0x02
11590 #define _CCDEN 0x80
11592 //==============================================================================
11595 //==============================================================================
11598 extern __at(0x081A) __sfr NVMADRL
;
11602 unsigned NVMADR0
: 1;
11603 unsigned NVMADR1
: 1;
11604 unsigned NVMADR2
: 1;
11605 unsigned NVMADR3
: 1;
11606 unsigned NVMADR4
: 1;
11607 unsigned NVMADR5
: 1;
11608 unsigned NVMADR6
: 1;
11609 unsigned NVMADR7
: 1;
11612 extern __at(0x081A) volatile __NVMADRLbits_t NVMADRLbits
;
11614 #define _NVMADR0 0x01
11615 #define _NVMADR1 0x02
11616 #define _NVMADR2 0x04
11617 #define _NVMADR3 0x08
11618 #define _NVMADR4 0x10
11619 #define _NVMADR5 0x20
11620 #define _NVMADR6 0x40
11621 #define _NVMADR7 0x80
11623 //==============================================================================
11626 //==============================================================================
11629 extern __at(0x081B) __sfr NVMADRH
;
11633 unsigned NVMADR8
: 1;
11634 unsigned NVMADR9
: 1;
11635 unsigned NVMADR10
: 1;
11636 unsigned NVMADR11
: 1;
11637 unsigned NVMADR12
: 1;
11638 unsigned NVMADR13
: 1;
11639 unsigned NVMADR14
: 1;
11643 extern __at(0x081B) volatile __NVMADRHbits_t NVMADRHbits
;
11645 #define _NVMADR8 0x01
11646 #define _NVMADR9 0x02
11647 #define _NVMADR10 0x04
11648 #define _NVMADR11 0x08
11649 #define _NVMADR12 0x10
11650 #define _NVMADR13 0x20
11651 #define _NVMADR14 0x40
11653 //==============================================================================
11656 //==============================================================================
11659 extern __at(0x081C) __sfr NVMDATL
;
11663 unsigned NVMDAT0
: 1;
11664 unsigned NVMDAT1
: 1;
11665 unsigned NVMDAT2
: 1;
11666 unsigned NVMDAT3
: 1;
11667 unsigned NVMDAT4
: 1;
11668 unsigned NVMDAT5
: 1;
11669 unsigned NVMDAT6
: 1;
11670 unsigned NVMDAT7
: 1;
11673 extern __at(0x081C) volatile __NVMDATLbits_t NVMDATLbits
;
11675 #define _NVMDAT0 0x01
11676 #define _NVMDAT1 0x02
11677 #define _NVMDAT2 0x04
11678 #define _NVMDAT3 0x08
11679 #define _NVMDAT4 0x10
11680 #define _NVMDAT5 0x20
11681 #define _NVMDAT6 0x40
11682 #define _NVMDAT7 0x80
11684 //==============================================================================
11687 //==============================================================================
11690 extern __at(0x081D) __sfr NVMDATH
;
11694 unsigned NVMDAT8
: 1;
11695 unsigned NVMDAT9
: 1;
11696 unsigned NVMDAT10
: 1;
11697 unsigned NVMDAT11
: 1;
11698 unsigned NVMDAT12
: 1;
11699 unsigned NVMDAT13
: 1;
11704 extern __at(0x081D) volatile __NVMDATHbits_t NVMDATHbits
;
11706 #define _NVMDAT8 0x01
11707 #define _NVMDAT9 0x02
11708 #define _NVMDAT10 0x04
11709 #define _NVMDAT11 0x08
11710 #define _NVMDAT12 0x10
11711 #define _NVMDAT13 0x20
11713 //==============================================================================
11716 //==============================================================================
11719 extern __at(0x081E) __sfr NVMCON1
;
11726 unsigned WRERR
: 1;
11729 unsigned NVMREGS
: 1;
11733 extern __at(0x081E) volatile __NVMCON1bits_t NVMCON1bits
;
11738 #define _WRERR 0x08
11741 #define _NVMREGS 0x40
11743 //==============================================================================
11745 extern __at(0x081F) __sfr NVMCON2
;
11747 //==============================================================================
11750 extern __at(0x088C) __sfr CPUDOZE
;
11756 unsigned DOZE0
: 1;
11757 unsigned DOZE1
: 1;
11758 unsigned DOZE2
: 1;
11762 unsigned DOZEN
: 1;
11763 unsigned IDLEN
: 1;
11773 extern __at(0x088C) volatile __CPUDOZEbits_t CPUDOZEbits
;
11775 #define _DOZE0 0x01
11776 #define _DOZE1 0x02
11777 #define _DOZE2 0x04
11780 #define _DOZEN 0x40
11781 #define _IDLEN 0x80
11783 //==============================================================================
11786 //==============================================================================
11789 extern __at(0x088D) __sfr OSCCON1
;
11795 unsigned NDIV0
: 1;
11796 unsigned NDIV1
: 1;
11797 unsigned NDIV2
: 1;
11798 unsigned NDIV3
: 1;
11799 unsigned NOSC0
: 1;
11800 unsigned NOSC1
: 1;
11801 unsigned NOSC2
: 1;
11819 extern __at(0x088D) volatile __OSCCON1bits_t OSCCON1bits
;
11821 #define _NDIV0 0x01
11822 #define _NDIV1 0x02
11823 #define _NDIV2 0x04
11824 #define _NDIV3 0x08
11825 #define _NOSC0 0x10
11826 #define _NOSC1 0x20
11827 #define _NOSC2 0x40
11829 //==============================================================================
11832 //==============================================================================
11835 extern __at(0x088E) __sfr OSCCON2
;
11841 unsigned CDIV0
: 1;
11842 unsigned CDIV1
: 1;
11843 unsigned CDIV2
: 1;
11844 unsigned CDIV3
: 1;
11845 unsigned COSC0
: 1;
11846 unsigned COSC1
: 1;
11847 unsigned COSC2
: 1;
11865 extern __at(0x088E) volatile __OSCCON2bits_t OSCCON2bits
;
11867 #define _CDIV0 0x01
11868 #define _CDIV1 0x02
11869 #define _CDIV2 0x04
11870 #define _CDIV3 0x08
11871 #define _COSC0 0x10
11872 #define _COSC1 0x20
11873 #define _COSC2 0x40
11875 //==============================================================================
11878 //==============================================================================
11881 extern __at(0x088F) __sfr OSCCON3
;
11888 unsigned NOSCR
: 1;
11891 unsigned SOSCPWR
: 1;
11892 unsigned CSWHOLD
: 1;
11895 extern __at(0x088F) volatile __OSCCON3bits_t OSCCON3bits
;
11897 #define _NOSCR 0x08
11899 #define _SOSCPWR 0x40
11900 #define _CSWHOLD 0x80
11902 //==============================================================================
11905 //==============================================================================
11908 extern __at(0x0890) __sfr OSCSTAT
;
11919 unsigned EXTOR
: 1;
11922 extern __at(0x0890) volatile __OSCSTATbits_t OSCSTATbits
;
11930 #define _EXTOR 0x80
11932 //==============================================================================
11935 //==============================================================================
11938 extern __at(0x0891) __sfr OSCEN
;
11944 unsigned ADOEN
: 1;
11945 unsigned SOSCEN
: 1;
11946 unsigned LFOEN
: 1;
11947 unsigned MFOEN
: 1;
11948 unsigned HFOEN
: 1;
11949 unsigned EXTOEN
: 1;
11952 extern __at(0x0891) volatile __OSCENbits_t OSCENbits
;
11954 #define _ADOEN 0x04
11955 #define _SOSCEN 0x08
11956 #define _LFOEN 0x10
11957 #define _MFOEN 0x20
11958 #define _HFOEN 0x40
11959 #define _EXTOEN 0x80
11961 //==============================================================================
11964 //==============================================================================
11967 extern __at(0x0892) __sfr OSCTUNE
;
11973 unsigned HFTUN0
: 1;
11974 unsigned HFTUN1
: 1;
11975 unsigned HFTUN2
: 1;
11976 unsigned HFTUN3
: 1;
11977 unsigned HFTUN4
: 1;
11978 unsigned HFTUN5
: 1;
11985 unsigned HFTUN
: 6;
11990 extern __at(0x0892) volatile __OSCTUNEbits_t OSCTUNEbits
;
11992 #define _HFTUN0 0x01
11993 #define _HFTUN1 0x02
11994 #define _HFTUN2 0x04
11995 #define _HFTUN3 0x08
11996 #define _HFTUN4 0x10
11997 #define _HFTUN5 0x20
11999 //==============================================================================
12002 //==============================================================================
12005 extern __at(0x0893) __sfr OSCFRQ
;
12011 unsigned HFFRQ0
: 1;
12012 unsigned HFFRQ1
: 1;
12013 unsigned HFFRQ2
: 1;
12023 unsigned HFFRQ
: 3;
12028 extern __at(0x0893) volatile __OSCFRQbits_t OSCFRQbits
;
12030 #define _HFFRQ0 0x01
12031 #define _HFFRQ1 0x02
12032 #define _HFFRQ2 0x04
12034 //==============================================================================
12037 //==============================================================================
12040 extern __at(0x0895) __sfr CLKRCON
;
12046 unsigned CLKRDIV0
: 1;
12047 unsigned CLKRDIV1
: 1;
12048 unsigned CLKRDIV2
: 1;
12049 unsigned CLKRDC0
: 1;
12050 unsigned CLKRDC1
: 1;
12053 unsigned CLKREN
: 1;
12058 unsigned CLKRDIV
: 3;
12065 unsigned CLKRDC
: 2;
12070 extern __at(0x0895) volatile __CLKRCONbits_t CLKRCONbits
;
12072 #define _CLKRDIV0 0x01
12073 #define _CLKRDIV1 0x02
12074 #define _CLKRDIV2 0x04
12075 #define _CLKRDC0 0x08
12076 #define _CLKRDC1 0x10
12077 #define _CLKREN 0x80
12079 //==============================================================================
12082 //==============================================================================
12085 extern __at(0x0896) __sfr CLKRCLK
;
12091 unsigned CLKRCLK0
: 1;
12092 unsigned CLKRCLK1
: 1;
12093 unsigned CLKRCLK2
: 1;
12094 unsigned CLKRCLK3
: 1;
12103 unsigned CLKRCLK
: 4;
12108 extern __at(0x0896) volatile __CLKRCLKbits_t CLKRCLKbits
;
12110 #define _CLKRCLK0 0x01
12111 #define _CLKRCLK1 0x02
12112 #define _CLKRCLK2 0x04
12113 #define _CLKRCLK3 0x08
12115 //==============================================================================
12118 //==============================================================================
12121 extern __at(0x0897) __sfr MDCON0
;
12125 unsigned MDBIT
: 1;
12129 unsigned MDOPOL
: 1;
12130 unsigned MDOUT
: 1;
12135 extern __at(0x0897) volatile __MDCON0bits_t MDCON0bits
;
12137 #define _MDBIT 0x01
12138 #define _MDOPOL 0x10
12139 #define _MDOUT 0x20
12142 //==============================================================================
12145 //==============================================================================
12148 extern __at(0x0898) __sfr MDCON1
;
12152 unsigned MDCLSYNC
: 1;
12153 unsigned MDCLPOL
: 1;
12156 unsigned MDCHSYNC
: 1;
12157 unsigned MDCHPOL
: 1;
12162 extern __at(0x0898) volatile __MDCON1bits_t MDCON1bits
;
12164 #define _MDCLSYNC 0x01
12165 #define _MDCLPOL 0x02
12166 #define _MDCHSYNC 0x10
12167 #define _MDCHPOL 0x20
12169 //==============================================================================
12172 //==============================================================================
12175 extern __at(0x0899) __sfr MDSRC
;
12181 unsigned MDMS0
: 1;
12182 unsigned MDMS1
: 1;
12183 unsigned MDMS2
: 1;
12184 unsigned MDMS3
: 1;
12185 unsigned MDMS4
: 1;
12198 extern __at(0x0899) volatile __MDSRCbits_t MDSRCbits
;
12200 #define _MDMS0 0x01
12201 #define _MDMS1 0x02
12202 #define _MDMS2 0x04
12203 #define _MDMS3 0x08
12204 #define _MDMS4 0x10
12206 //==============================================================================
12209 //==============================================================================
12212 extern __at(0x089A) __sfr MDCARL
;
12218 unsigned MDCL0
: 1;
12219 unsigned MDCL1
: 1;
12220 unsigned MDCL2
: 1;
12221 unsigned MDCL3
: 1;
12235 extern __at(0x089A) volatile __MDCARLbits_t MDCARLbits
;
12237 #define _MDCL0 0x01
12238 #define _MDCL1 0x02
12239 #define _MDCL2 0x04
12240 #define _MDCL3 0x08
12242 //==============================================================================
12245 //==============================================================================
12248 extern __at(0x089B) __sfr MDCARH
;
12254 unsigned MDCH0
: 1;
12255 unsigned MDCH1
: 1;
12256 unsigned MDCH2
: 1;
12257 unsigned MDCH3
: 1;
12271 extern __at(0x089B) volatile __MDCARHbits_t MDCARHbits
;
12273 #define _MDCH0 0x01
12274 #define _MDCH1 0x02
12275 #define _MDCH2 0x04
12276 #define _MDCH3 0x08
12278 //==============================================================================
12281 //==============================================================================
12284 extern __at(0x090C) __sfr FVRCON
;
12290 unsigned ADFVR0
: 1;
12291 unsigned ADFVR1
: 1;
12292 unsigned CDAFVR0
: 1;
12293 unsigned CDAFVR1
: 1;
12294 unsigned TSRNG
: 1;
12296 unsigned FVRRDY
: 1;
12297 unsigned FVREN
: 1;
12302 unsigned ADFVR
: 2;
12309 unsigned CDAFVR
: 2;
12314 extern __at(0x090C) volatile __FVRCONbits_t FVRCONbits
;
12316 #define _ADFVR0 0x01
12317 #define _ADFVR1 0x02
12318 #define _CDAFVR0 0x04
12319 #define _CDAFVR1 0x08
12320 #define _TSRNG 0x10
12322 #define _FVRRDY 0x40
12323 #define _FVREN 0x80
12325 //==============================================================================
12328 //==============================================================================
12331 extern __at(0x090E) __sfr DAC1CON0
;
12339 unsigned DAC1PSS0
: 1;
12340 unsigned DAC1PSS1
: 1;
12349 unsigned DAC1NSS
: 1;
12353 unsigned DAC1OE2
: 1;
12354 unsigned DAC1OE1
: 1;
12356 unsigned DAC1EN
: 1;
12369 unsigned DAC1PSS
: 2;
12372 } __DAC1CON0bits_t
;
12374 extern __at(0x090E) volatile __DAC1CON0bits_t DAC1CON0bits
;
12376 #define _DAC1CON0_NSS 0x01
12377 #define _DAC1CON0_DAC1NSS 0x01
12378 #define _DAC1CON0_DAC1PSS0 0x04
12379 #define _DAC1CON0_PSS0 0x04
12380 #define _DAC1CON0_DAC1PSS1 0x08
12381 #define _DAC1CON0_PSS1 0x08
12382 #define _DAC1CON0_OE2 0x10
12383 #define _DAC1CON0_DAC1OE2 0x10
12384 #define _DAC1CON0_OE1 0x20
12385 #define _DAC1CON0_DAC1OE1 0x20
12386 #define _DAC1CON0_EN 0x80
12387 #define _DAC1CON0_DAC1EN 0x80
12389 //==============================================================================
12392 //==============================================================================
12395 extern __at(0x090F) __sfr DAC1CON1
;
12401 unsigned DAC1R0
: 1;
12402 unsigned DAC1R1
: 1;
12403 unsigned DAC1R2
: 1;
12404 unsigned DAC1R3
: 1;
12405 unsigned DAC1R4
: 1;
12413 unsigned DAC1R
: 5;
12416 } __DAC1CON1bits_t
;
12418 extern __at(0x090F) volatile __DAC1CON1bits_t DAC1CON1bits
;
12420 #define _DAC1R0 0x01
12421 #define _DAC1R1 0x02
12422 #define _DAC1R2 0x04
12423 #define _DAC1R3 0x08
12424 #define _DAC1R4 0x10
12426 //==============================================================================
12429 //==============================================================================
12432 extern __at(0x091F) __sfr ZCD1CON
;
12450 unsigned ZCD1INTN
: 1;
12451 unsigned ZCD1INTP
: 1;
12454 unsigned ZCD1POL
: 1;
12455 unsigned ZCD1OUT
: 1;
12457 unsigned ZCD1EN
: 1;
12462 unsigned ZCDINTN
: 1;
12463 unsigned ZCDINTP
: 1;
12466 unsigned ZCDPOL
: 1;
12467 unsigned ZCDOUT
: 1;
12469 unsigned ZCDEN
: 1;
12473 extern __at(0x091F) volatile __ZCD1CONbits_t ZCD1CONbits
;
12475 #define _ZCD1CON_INTN 0x01
12476 #define _ZCD1CON_ZCD1INTN 0x01
12477 #define _ZCD1CON_ZCDINTN 0x01
12478 #define _ZCD1CON_INTP 0x02
12479 #define _ZCD1CON_ZCD1INTP 0x02
12480 #define _ZCD1CON_ZCDINTP 0x02
12481 #define _ZCD1CON_POL 0x10
12482 #define _ZCD1CON_ZCD1POL 0x10
12483 #define _ZCD1CON_ZCDPOL 0x10
12484 #define _ZCD1CON_OUT 0x20
12485 #define _ZCD1CON_ZCD1OUT 0x20
12486 #define _ZCD1CON_ZCDOUT 0x20
12487 #define _ZCD1CON_EN 0x80
12488 #define _ZCD1CON_ZCD1EN 0x80
12489 #define _ZCD1CON_ZCDEN 0x80
12491 //==============================================================================
12494 //==============================================================================
12497 extern __at(0x091F) __sfr ZCDCON
;
12515 unsigned ZCD1INTN
: 1;
12516 unsigned ZCD1INTP
: 1;
12519 unsigned ZCD1POL
: 1;
12520 unsigned ZCD1OUT
: 1;
12522 unsigned ZCD1EN
: 1;
12527 unsigned ZCDINTN
: 1;
12528 unsigned ZCDINTP
: 1;
12531 unsigned ZCDPOL
: 1;
12532 unsigned ZCDOUT
: 1;
12534 unsigned ZCDEN
: 1;
12538 extern __at(0x091F) volatile __ZCDCONbits_t ZCDCONbits
;
12540 #define _ZCDCON_INTN 0x01
12541 #define _ZCDCON_ZCD1INTN 0x01
12542 #define _ZCDCON_ZCDINTN 0x01
12543 #define _ZCDCON_INTP 0x02
12544 #define _ZCDCON_ZCD1INTP 0x02
12545 #define _ZCDCON_ZCDINTP 0x02
12546 #define _ZCDCON_POL 0x10
12547 #define _ZCDCON_ZCD1POL 0x10
12548 #define _ZCDCON_ZCDPOL 0x10
12549 #define _ZCDCON_OUT 0x20
12550 #define _ZCDCON_ZCD1OUT 0x20
12551 #define _ZCDCON_ZCDOUT 0x20
12552 #define _ZCDCON_EN 0x80
12553 #define _ZCDCON_ZCD1EN 0x80
12554 #define _ZCDCON_ZCDEN 0x80
12556 //==============================================================================
12559 //==============================================================================
12562 extern __at(0x098F) __sfr CMOUT
;
12568 unsigned MC1OUT
: 1;
12569 unsigned MC2OUT
: 1;
12580 unsigned C1OUT
: 1;
12581 unsigned C2OUT
: 1;
12591 extern __at(0x098F) volatile __CMOUTbits_t CMOUTbits
;
12593 #define _CMOUT_MC1OUT 0x01
12594 #define _CMOUT_C1OUT 0x01
12595 #define _CMOUT_MC2OUT 0x02
12596 #define _CMOUT_C2OUT 0x02
12598 //==============================================================================
12601 //==============================================================================
12604 extern __at(0x098F) __sfr CMSTAT
;
12610 unsigned MC1OUT
: 1;
12611 unsigned MC2OUT
: 1;
12622 unsigned C1OUT
: 1;
12623 unsigned C2OUT
: 1;
12633 extern __at(0x098F) volatile __CMSTATbits_t CMSTATbits
;
12635 #define _CMSTAT_MC1OUT 0x01
12636 #define _CMSTAT_C1OUT 0x01
12637 #define _CMSTAT_MC2OUT 0x02
12638 #define _CMSTAT_C2OUT 0x02
12640 //==============================================================================
12643 //==============================================================================
12646 extern __at(0x0990) __sfr CM1CON0
;
12654 unsigned Reserved
: 1;
12664 unsigned C1SYNC
: 1;
12665 unsigned C1HYS
: 1;
12668 unsigned C1POL
: 1;
12670 unsigned C1OUT
: 1;
12675 extern __at(0x0990) volatile __CM1CON0bits_t CM1CON0bits
;
12677 #define _CM1CON0_SYNC 0x01
12678 #define _CM1CON0_C1SYNC 0x01
12679 #define _CM1CON0_HYS 0x02
12680 #define _CM1CON0_C1HYS 0x02
12681 #define _CM1CON0_Reserved 0x04
12682 #define _CM1CON0_C1SP 0x04
12683 #define _CM1CON0_POL 0x10
12684 #define _CM1CON0_C1POL 0x10
12685 #define _CM1CON0_OUT 0x40
12686 #define _CM1CON0_C1OUT 0x40
12687 #define _CM1CON0_ON 0x80
12688 #define _CM1CON0_C1ON 0x80
12690 //==============================================================================
12693 //==============================================================================
12696 extern __at(0x0991) __sfr CM1CON1
;
12714 unsigned C1INTN
: 1;
12715 unsigned C1INTP
: 1;
12725 extern __at(0x0991) volatile __CM1CON1bits_t CM1CON1bits
;
12727 #define _CM1CON1_INTN 0x01
12728 #define _CM1CON1_C1INTN 0x01
12729 #define _CM1CON1_INTP 0x02
12730 #define _CM1CON1_C1INTP 0x02
12732 //==============================================================================
12735 //==============================================================================
12738 extern __at(0x0992) __sfr CM1NSEL
;
12756 unsigned C1NCH0
: 1;
12757 unsigned C1NCH1
: 1;
12758 unsigned C1NCH2
: 1;
12774 unsigned C1NCH
: 3;
12779 extern __at(0x0992) volatile __CM1NSELbits_t CM1NSELbits
;
12782 #define _C1NCH0 0x01
12784 #define _C1NCH1 0x02
12786 #define _C1NCH2 0x04
12788 //==============================================================================
12791 //==============================================================================
12794 extern __at(0x0993) __sfr CM1PSEL
;
12812 unsigned C1PCH0
: 1;
12813 unsigned C1PCH1
: 1;
12814 unsigned C1PCH2
: 1;
12830 unsigned C1PCH
: 3;
12835 extern __at(0x0993) volatile __CM1PSELbits_t CM1PSELbits
;
12838 #define _C1PCH0 0x01
12840 #define _C1PCH1 0x02
12842 #define _C1PCH2 0x04
12844 //==============================================================================
12847 //==============================================================================
12850 extern __at(0x0994) __sfr CM2CON0
;
12858 unsigned Reserved
: 1;
12868 unsigned C2SYNC
: 1;
12869 unsigned C2HYS
: 1;
12872 unsigned C2POL
: 1;
12874 unsigned C2OUT
: 1;
12879 extern __at(0x0994) volatile __CM2CON0bits_t CM2CON0bits
;
12881 #define _CM2CON0_SYNC 0x01
12882 #define _CM2CON0_C2SYNC 0x01
12883 #define _CM2CON0_HYS 0x02
12884 #define _CM2CON0_C2HYS 0x02
12885 #define _CM2CON0_Reserved 0x04
12886 #define _CM2CON0_C2SP 0x04
12887 #define _CM2CON0_POL 0x10
12888 #define _CM2CON0_C2POL 0x10
12889 #define _CM2CON0_OUT 0x40
12890 #define _CM2CON0_C2OUT 0x40
12891 #define _CM2CON0_ON 0x80
12892 #define _CM2CON0_C2ON 0x80
12894 //==============================================================================
12897 //==============================================================================
12900 extern __at(0x0995) __sfr CM2CON1
;
12918 unsigned C2INTN
: 1;
12919 unsigned C2INTP
: 1;
12929 extern __at(0x0995) volatile __CM2CON1bits_t CM2CON1bits
;
12931 #define _CM2CON1_INTN 0x01
12932 #define _CM2CON1_C2INTN 0x01
12933 #define _CM2CON1_INTP 0x02
12934 #define _CM2CON1_C2INTP 0x02
12936 //==============================================================================
12939 //==============================================================================
12942 extern __at(0x0996) __sfr CM2NSEL
;
12960 unsigned C2NCH0
: 1;
12961 unsigned C2NCH1
: 1;
12962 unsigned C2NCH2
: 1;
12978 unsigned C2NCH
: 3;
12983 extern __at(0x0996) volatile __CM2NSELbits_t CM2NSELbits
;
12985 #define _CM2NSEL_NCH0 0x01
12986 #define _CM2NSEL_C2NCH0 0x01
12987 #define _CM2NSEL_NCH1 0x02
12988 #define _CM2NSEL_C2NCH1 0x02
12989 #define _CM2NSEL_NCH2 0x04
12990 #define _CM2NSEL_C2NCH2 0x04
12992 //==============================================================================
12995 //==============================================================================
12998 extern __at(0x0997) __sfr CM2PSEL
;
13016 unsigned C2PCH0
: 1;
13017 unsigned C2PCH1
: 1;
13018 unsigned C2PCH2
: 1;
13034 unsigned C2PCH
: 3;
13039 extern __at(0x0997) volatile __CM2PSELbits_t CM2PSELbits
;
13041 #define _CM2PSEL_PCH0 0x01
13042 #define _CM2PSEL_C2PCH0 0x01
13043 #define _CM2PSEL_PCH1 0x02
13044 #define _CM2PSEL_C2PCH1 0x02
13045 #define _CM2PSEL_PCH2 0x04
13046 #define _CM2PSEL_C2PCH2 0x04
13048 //==============================================================================
13051 //==============================================================================
13054 extern __at(0x0E0F) __sfr CLCDATA
;
13058 unsigned MLC1OUT
: 1;
13059 unsigned MLC2OUT
: 1;
13060 unsigned MLC3OUT
: 1;
13061 unsigned MLC4OUT
: 1;
13068 extern __at(0x0E0F) volatile __CLCDATAbits_t CLCDATAbits
;
13070 #define _MLC1OUT 0x01
13071 #define _MLC2OUT 0x02
13072 #define _MLC3OUT 0x04
13073 #define _MLC4OUT 0x08
13075 //==============================================================================
13078 //==============================================================================
13081 extern __at(0x0E10) __sfr CLC1CON
;
13087 unsigned LC1MODE0
: 1;
13088 unsigned LC1MODE1
: 1;
13089 unsigned LC1MODE2
: 1;
13090 unsigned LC1INTN
: 1;
13091 unsigned LC1INTP
: 1;
13092 unsigned LC1OUT
: 1;
13094 unsigned LC1EN
: 1;
13099 unsigned MODE0
: 1;
13100 unsigned MODE1
: 1;
13101 unsigned MODE2
: 1;
13111 unsigned LC1MODE
: 3;
13122 extern __at(0x0E10) volatile __CLC1CONbits_t CLC1CONbits
;
13124 #define _CLC1CON_LC1MODE0 0x01
13125 #define _CLC1CON_MODE0 0x01
13126 #define _CLC1CON_LC1MODE1 0x02
13127 #define _CLC1CON_MODE1 0x02
13128 #define _CLC1CON_LC1MODE2 0x04
13129 #define _CLC1CON_MODE2 0x04
13130 #define _CLC1CON_LC1INTN 0x08
13131 #define _CLC1CON_INTN 0x08
13132 #define _CLC1CON_LC1INTP 0x10
13133 #define _CLC1CON_INTP 0x10
13134 #define _CLC1CON_LC1OUT 0x20
13135 #define _CLC1CON_OUT 0x20
13136 #define _CLC1CON_LC1EN 0x80
13137 #define _CLC1CON_EN 0x80
13139 //==============================================================================
13142 //==============================================================================
13145 extern __at(0x0E11) __sfr CLC1POL
;
13151 unsigned LC1G1POL
: 1;
13152 unsigned LC1G2POL
: 1;
13153 unsigned LC1G3POL
: 1;
13154 unsigned LC1G4POL
: 1;
13158 unsigned LC1POL
: 1;
13163 unsigned G1POL
: 1;
13164 unsigned G2POL
: 1;
13165 unsigned G3POL
: 1;
13166 unsigned G4POL
: 1;
13174 extern __at(0x0E11) volatile __CLC1POLbits_t CLC1POLbits
;
13176 #define _LC1G1POL 0x01
13177 #define _G1POL 0x01
13178 #define _LC1G2POL 0x02
13179 #define _G2POL 0x02
13180 #define _LC1G3POL 0x04
13181 #define _G3POL 0x04
13182 #define _LC1G4POL 0x08
13183 #define _G4POL 0x08
13184 #define _LC1POL 0x80
13187 //==============================================================================
13190 //==============================================================================
13193 extern __at(0x0E12) __sfr CLC1SEL0
;
13199 unsigned LC1D1S0
: 1;
13200 unsigned LC1D1S1
: 1;
13201 unsigned LC1D1S2
: 1;
13202 unsigned LC1D1S3
: 1;
13203 unsigned LC1D1S4
: 1;
13204 unsigned LC1D1S5
: 1;
13205 unsigned LC1D1S6
: 1;
13206 unsigned LC1D1S7
: 1;
13220 } __CLC1SEL0bits_t
;
13222 extern __at(0x0E12) volatile __CLC1SEL0bits_t CLC1SEL0bits
;
13224 #define _LC1D1S0 0x01
13226 #define _LC1D1S1 0x02
13228 #define _LC1D1S2 0x04
13230 #define _LC1D1S3 0x08
13232 #define _LC1D1S4 0x10
13234 #define _LC1D1S5 0x20
13236 #define _LC1D1S6 0x40
13238 #define _LC1D1S7 0x80
13241 //==============================================================================
13244 //==============================================================================
13247 extern __at(0x0E13) __sfr CLC1SEL1
;
13253 unsigned LC1D2S0
: 1;
13254 unsigned LC1D2S1
: 1;
13255 unsigned LC1D2S2
: 1;
13256 unsigned LC1D2S3
: 1;
13257 unsigned LC1D2S4
: 1;
13258 unsigned LC1D2S5
: 1;
13259 unsigned LC1D2S6
: 1;
13260 unsigned LC1D2S7
: 1;
13274 } __CLC1SEL1bits_t
;
13276 extern __at(0x0E13) volatile __CLC1SEL1bits_t CLC1SEL1bits
;
13278 #define _LC1D2S0 0x01
13280 #define _LC1D2S1 0x02
13282 #define _LC1D2S2 0x04
13284 #define _LC1D2S3 0x08
13286 #define _LC1D2S4 0x10
13288 #define _LC1D2S5 0x20
13290 #define _LC1D2S6 0x40
13292 #define _LC1D2S7 0x80
13295 //==============================================================================
13298 //==============================================================================
13301 extern __at(0x0E14) __sfr CLC1SEL2
;
13307 unsigned LC1D3S0
: 1;
13308 unsigned LC1D3S1
: 1;
13309 unsigned LC1D3S2
: 1;
13310 unsigned LC1D3S3
: 1;
13311 unsigned LC1D3S4
: 1;
13312 unsigned LC1D3S5
: 1;
13313 unsigned LC1D3S6
: 1;
13314 unsigned LC1D3S7
: 1;
13328 } __CLC1SEL2bits_t
;
13330 extern __at(0x0E14) volatile __CLC1SEL2bits_t CLC1SEL2bits
;
13332 #define _LC1D3S0 0x01
13334 #define _LC1D3S1 0x02
13336 #define _LC1D3S2 0x04
13338 #define _LC1D3S3 0x08
13340 #define _LC1D3S4 0x10
13342 #define _LC1D3S5 0x20
13344 #define _LC1D3S6 0x40
13346 #define _LC1D3S7 0x80
13349 //==============================================================================
13352 //==============================================================================
13355 extern __at(0x0E15) __sfr CLC1SEL3
;
13361 unsigned LC1D4S0
: 1;
13362 unsigned LC1D4S1
: 1;
13363 unsigned LC1D4S2
: 1;
13364 unsigned LC1D4S3
: 1;
13365 unsigned LC1D4S4
: 1;
13366 unsigned LC1D4S5
: 1;
13367 unsigned LC1D4S6
: 1;
13368 unsigned LC1D4S7
: 1;
13382 } __CLC1SEL3bits_t
;
13384 extern __at(0x0E15) volatile __CLC1SEL3bits_t CLC1SEL3bits
;
13386 #define _LC1D4S0 0x01
13388 #define _LC1D4S1 0x02
13390 #define _LC1D4S2 0x04
13392 #define _LC1D4S3 0x08
13394 #define _LC1D4S4 0x10
13396 #define _LC1D4S5 0x20
13398 #define _LC1D4S6 0x40
13400 #define _LC1D4S7 0x80
13403 //==============================================================================
13406 //==============================================================================
13409 extern __at(0x0E16) __sfr CLC1GLS0
;
13415 unsigned LC1G1D1N
: 1;
13416 unsigned LC1G1D1T
: 1;
13417 unsigned LC1G1D2N
: 1;
13418 unsigned LC1G1D2T
: 1;
13419 unsigned LC1G1D3N
: 1;
13420 unsigned LC1G1D3T
: 1;
13421 unsigned LC1G1D4N
: 1;
13422 unsigned LC1G1D4T
: 1;
13436 } __CLC1GLS0bits_t
;
13438 extern __at(0x0E16) volatile __CLC1GLS0bits_t CLC1GLS0bits
;
13440 #define _LC1G1D1N 0x01
13442 #define _LC1G1D1T 0x02
13444 #define _LC1G1D2N 0x04
13446 #define _LC1G1D2T 0x08
13448 #define _LC1G1D3N 0x10
13450 #define _LC1G1D3T 0x20
13452 #define _LC1G1D4N 0x40
13454 #define _LC1G1D4T 0x80
13457 //==============================================================================
13460 //==============================================================================
13463 extern __at(0x0E17) __sfr CLC1GLS1
;
13469 unsigned LC1G2D1N
: 1;
13470 unsigned LC1G2D1T
: 1;
13471 unsigned LC1G2D2N
: 1;
13472 unsigned LC1G2D2T
: 1;
13473 unsigned LC1G2D3N
: 1;
13474 unsigned LC1G2D3T
: 1;
13475 unsigned LC1G2D4N
: 1;
13476 unsigned LC1G2D4T
: 1;
13490 } __CLC1GLS1bits_t
;
13492 extern __at(0x0E17) volatile __CLC1GLS1bits_t CLC1GLS1bits
;
13494 #define _CLC1GLS1_LC1G2D1N 0x01
13495 #define _CLC1GLS1_D1N 0x01
13496 #define _CLC1GLS1_LC1G2D1T 0x02
13497 #define _CLC1GLS1_D1T 0x02
13498 #define _CLC1GLS1_LC1G2D2N 0x04
13499 #define _CLC1GLS1_D2N 0x04
13500 #define _CLC1GLS1_LC1G2D2T 0x08
13501 #define _CLC1GLS1_D2T 0x08
13502 #define _CLC1GLS1_LC1G2D3N 0x10
13503 #define _CLC1GLS1_D3N 0x10
13504 #define _CLC1GLS1_LC1G2D3T 0x20
13505 #define _CLC1GLS1_D3T 0x20
13506 #define _CLC1GLS1_LC1G2D4N 0x40
13507 #define _CLC1GLS1_D4N 0x40
13508 #define _CLC1GLS1_LC1G2D4T 0x80
13509 #define _CLC1GLS1_D4T 0x80
13511 //==============================================================================
13514 //==============================================================================
13517 extern __at(0x0E18) __sfr CLC1GLS2
;
13523 unsigned LC1G3D1N
: 1;
13524 unsigned LC1G3D1T
: 1;
13525 unsigned LC1G3D2N
: 1;
13526 unsigned LC1G3D2T
: 1;
13527 unsigned LC1G3D3N
: 1;
13528 unsigned LC1G3D3T
: 1;
13529 unsigned LC1G3D4N
: 1;
13530 unsigned LC1G3D4T
: 1;
13544 } __CLC1GLS2bits_t
;
13546 extern __at(0x0E18) volatile __CLC1GLS2bits_t CLC1GLS2bits
;
13548 #define _CLC1GLS2_LC1G3D1N 0x01
13549 #define _CLC1GLS2_D1N 0x01
13550 #define _CLC1GLS2_LC1G3D1T 0x02
13551 #define _CLC1GLS2_D1T 0x02
13552 #define _CLC1GLS2_LC1G3D2N 0x04
13553 #define _CLC1GLS2_D2N 0x04
13554 #define _CLC1GLS2_LC1G3D2T 0x08
13555 #define _CLC1GLS2_D2T 0x08
13556 #define _CLC1GLS2_LC1G3D3N 0x10
13557 #define _CLC1GLS2_D3N 0x10
13558 #define _CLC1GLS2_LC1G3D3T 0x20
13559 #define _CLC1GLS2_D3T 0x20
13560 #define _CLC1GLS2_LC1G3D4N 0x40
13561 #define _CLC1GLS2_D4N 0x40
13562 #define _CLC1GLS2_LC1G3D4T 0x80
13563 #define _CLC1GLS2_D4T 0x80
13565 //==============================================================================
13568 //==============================================================================
13571 extern __at(0x0E19) __sfr CLC1GLS3
;
13577 unsigned LC1G4D1N
: 1;
13578 unsigned LC1G4D1T
: 1;
13579 unsigned LC1G4D2N
: 1;
13580 unsigned LC1G4D2T
: 1;
13581 unsigned LC1G4D3N
: 1;
13582 unsigned LC1G4D3T
: 1;
13583 unsigned LC1G4D4N
: 1;
13584 unsigned LC1G4D4T
: 1;
13589 unsigned G4D1N
: 1;
13590 unsigned G4D1T
: 1;
13591 unsigned G4D2N
: 1;
13592 unsigned G4D2T
: 1;
13593 unsigned G4D3N
: 1;
13594 unsigned G4D3T
: 1;
13595 unsigned G4D4N
: 1;
13596 unsigned G4D4T
: 1;
13598 } __CLC1GLS3bits_t
;
13600 extern __at(0x0E19) volatile __CLC1GLS3bits_t CLC1GLS3bits
;
13602 #define _LC1G4D1N 0x01
13603 #define _G4D1N 0x01
13604 #define _LC1G4D1T 0x02
13605 #define _G4D1T 0x02
13606 #define _LC1G4D2N 0x04
13607 #define _G4D2N 0x04
13608 #define _LC1G4D2T 0x08
13609 #define _G4D2T 0x08
13610 #define _LC1G4D3N 0x10
13611 #define _G4D3N 0x10
13612 #define _LC1G4D3T 0x20
13613 #define _G4D3T 0x20
13614 #define _LC1G4D4N 0x40
13615 #define _G4D4N 0x40
13616 #define _LC1G4D4T 0x80
13617 #define _G4D4T 0x80
13619 //==============================================================================
13622 //==============================================================================
13625 extern __at(0x0E1A) __sfr CLC2CON
;
13631 unsigned LC2MODE0
: 1;
13632 unsigned LC2MODE1
: 1;
13633 unsigned LC2MODE2
: 1;
13634 unsigned LC2INTN
: 1;
13635 unsigned LC2INTP
: 1;
13636 unsigned LC2OUT
: 1;
13638 unsigned LC2EN
: 1;
13643 unsigned MODE0
: 1;
13644 unsigned MODE1
: 1;
13645 unsigned MODE2
: 1;
13661 unsigned LC2MODE
: 3;
13666 extern __at(0x0E1A) volatile __CLC2CONbits_t CLC2CONbits
;
13668 #define _CLC2CON_LC2MODE0 0x01
13669 #define _CLC2CON_MODE0 0x01
13670 #define _CLC2CON_LC2MODE1 0x02
13671 #define _CLC2CON_MODE1 0x02
13672 #define _CLC2CON_LC2MODE2 0x04
13673 #define _CLC2CON_MODE2 0x04
13674 #define _CLC2CON_LC2INTN 0x08
13675 #define _CLC2CON_INTN 0x08
13676 #define _CLC2CON_LC2INTP 0x10
13677 #define _CLC2CON_INTP 0x10
13678 #define _CLC2CON_LC2OUT 0x20
13679 #define _CLC2CON_OUT 0x20
13680 #define _CLC2CON_LC2EN 0x80
13681 #define _CLC2CON_EN 0x80
13683 //==============================================================================
13686 //==============================================================================
13689 extern __at(0x0E1B) __sfr CLC2POL
;
13695 unsigned LC2G1POL
: 1;
13696 unsigned LC2G2POL
: 1;
13697 unsigned LC2G3POL
: 1;
13698 unsigned LC2G4POL
: 1;
13702 unsigned LC2POL
: 1;
13707 unsigned G1POL
: 1;
13708 unsigned G2POL
: 1;
13709 unsigned G3POL
: 1;
13710 unsigned G4POL
: 1;
13718 extern __at(0x0E1B) volatile __CLC2POLbits_t CLC2POLbits
;
13720 #define _CLC2POL_LC2G1POL 0x01
13721 #define _CLC2POL_G1POL 0x01
13722 #define _CLC2POL_LC2G2POL 0x02
13723 #define _CLC2POL_G2POL 0x02
13724 #define _CLC2POL_LC2G3POL 0x04
13725 #define _CLC2POL_G3POL 0x04
13726 #define _CLC2POL_LC2G4POL 0x08
13727 #define _CLC2POL_G4POL 0x08
13728 #define _CLC2POL_LC2POL 0x80
13729 #define _CLC2POL_POL 0x80
13731 //==============================================================================
13734 //==============================================================================
13737 extern __at(0x0E1C) __sfr CLC2SEL0
;
13743 unsigned LC2D1S0
: 1;
13744 unsigned LC2D1S1
: 1;
13745 unsigned LC2D1S2
: 1;
13746 unsigned LC2D1S3
: 1;
13747 unsigned LC2D1S4
: 1;
13748 unsigned LC2D1S5
: 1;
13749 unsigned LC2D1S6
: 1;
13750 unsigned LC2D1S7
: 1;
13764 } __CLC2SEL0bits_t
;
13766 extern __at(0x0E1C) volatile __CLC2SEL0bits_t CLC2SEL0bits
;
13768 #define _CLC2SEL0_LC2D1S0 0x01
13769 #define _CLC2SEL0_D1S0 0x01
13770 #define _CLC2SEL0_LC2D1S1 0x02
13771 #define _CLC2SEL0_D1S1 0x02
13772 #define _CLC2SEL0_LC2D1S2 0x04
13773 #define _CLC2SEL0_D1S2 0x04
13774 #define _CLC2SEL0_LC2D1S3 0x08
13775 #define _CLC2SEL0_D1S3 0x08
13776 #define _CLC2SEL0_LC2D1S4 0x10
13777 #define _CLC2SEL0_D1S4 0x10
13778 #define _CLC2SEL0_LC2D1S5 0x20
13779 #define _CLC2SEL0_D1S5 0x20
13780 #define _CLC2SEL0_LC2D1S6 0x40
13781 #define _CLC2SEL0_D1S6 0x40
13782 #define _CLC2SEL0_LC2D1S7 0x80
13783 #define _CLC2SEL0_D1S7 0x80
13785 //==============================================================================
13788 //==============================================================================
13791 extern __at(0x0E1D) __sfr CLC2SEL1
;
13797 unsigned LC2D2S0
: 1;
13798 unsigned LC2D2S1
: 1;
13799 unsigned LC2D2S2
: 1;
13800 unsigned LC2D2S3
: 1;
13801 unsigned LC2D2S4
: 1;
13802 unsigned LC2D2S5
: 1;
13803 unsigned LC2D2S6
: 1;
13804 unsigned LC2D2S7
: 1;
13818 } __CLC2SEL1bits_t
;
13820 extern __at(0x0E1D) volatile __CLC2SEL1bits_t CLC2SEL1bits
;
13822 #define _CLC2SEL1_LC2D2S0 0x01
13823 #define _CLC2SEL1_D2S0 0x01
13824 #define _CLC2SEL1_LC2D2S1 0x02
13825 #define _CLC2SEL1_D2S1 0x02
13826 #define _CLC2SEL1_LC2D2S2 0x04
13827 #define _CLC2SEL1_D2S2 0x04
13828 #define _CLC2SEL1_LC2D2S3 0x08
13829 #define _CLC2SEL1_D2S3 0x08
13830 #define _CLC2SEL1_LC2D2S4 0x10
13831 #define _CLC2SEL1_D2S4 0x10
13832 #define _CLC2SEL1_LC2D2S5 0x20
13833 #define _CLC2SEL1_D2S5 0x20
13834 #define _CLC2SEL1_LC2D2S6 0x40
13835 #define _CLC2SEL1_D2S6 0x40
13836 #define _CLC2SEL1_LC2D2S7 0x80
13837 #define _CLC2SEL1_D2S7 0x80
13839 //==============================================================================
13842 //==============================================================================
13845 extern __at(0x0E1E) __sfr CLC2SEL2
;
13851 unsigned LC2D3S0
: 1;
13852 unsigned LC2D3S1
: 1;
13853 unsigned LC2D3S2
: 1;
13854 unsigned LC2D3S3
: 1;
13855 unsigned LC2D3S4
: 1;
13856 unsigned LC2D3S5
: 1;
13857 unsigned LC2D3S6
: 1;
13858 unsigned LC2D3S7
: 1;
13872 } __CLC2SEL2bits_t
;
13874 extern __at(0x0E1E) volatile __CLC2SEL2bits_t CLC2SEL2bits
;
13876 #define _CLC2SEL2_LC2D3S0 0x01
13877 #define _CLC2SEL2_D3S0 0x01
13878 #define _CLC2SEL2_LC2D3S1 0x02
13879 #define _CLC2SEL2_D3S1 0x02
13880 #define _CLC2SEL2_LC2D3S2 0x04
13881 #define _CLC2SEL2_D3S2 0x04
13882 #define _CLC2SEL2_LC2D3S3 0x08
13883 #define _CLC2SEL2_D3S3 0x08
13884 #define _CLC2SEL2_LC2D3S4 0x10
13885 #define _CLC2SEL2_D3S4 0x10
13886 #define _CLC2SEL2_LC2D3S5 0x20
13887 #define _CLC2SEL2_D3S5 0x20
13888 #define _CLC2SEL2_LC2D3S6 0x40
13889 #define _CLC2SEL2_D3S6 0x40
13890 #define _CLC2SEL2_LC2D3S7 0x80
13891 #define _CLC2SEL2_D3S7 0x80
13893 //==============================================================================
13896 //==============================================================================
13899 extern __at(0x0E1F) __sfr CLC2SEL3
;
13905 unsigned LC2D4S0
: 1;
13906 unsigned LC2D4S1
: 1;
13907 unsigned LC2D4S2
: 1;
13908 unsigned LC2D4S3
: 1;
13909 unsigned LC2D4S4
: 1;
13910 unsigned LC2D4S5
: 1;
13911 unsigned LC2D4S6
: 1;
13912 unsigned LC2D4S7
: 1;
13926 } __CLC2SEL3bits_t
;
13928 extern __at(0x0E1F) volatile __CLC2SEL3bits_t CLC2SEL3bits
;
13930 #define _CLC2SEL3_LC2D4S0 0x01
13931 #define _CLC2SEL3_D4S0 0x01
13932 #define _CLC2SEL3_LC2D4S1 0x02
13933 #define _CLC2SEL3_D4S1 0x02
13934 #define _CLC2SEL3_LC2D4S2 0x04
13935 #define _CLC2SEL3_D4S2 0x04
13936 #define _CLC2SEL3_LC2D4S3 0x08
13937 #define _CLC2SEL3_D4S3 0x08
13938 #define _CLC2SEL3_LC2D4S4 0x10
13939 #define _CLC2SEL3_D4S4 0x10
13940 #define _CLC2SEL3_LC2D4S5 0x20
13941 #define _CLC2SEL3_D4S5 0x20
13942 #define _CLC2SEL3_LC2D4S6 0x40
13943 #define _CLC2SEL3_D4S6 0x40
13944 #define _CLC2SEL3_LC2D4S7 0x80
13945 #define _CLC2SEL3_D4S7 0x80
13947 //==============================================================================
13950 //==============================================================================
13953 extern __at(0x0E20) __sfr CLC2GLS0
;
13959 unsigned LC2G1D1N
: 1;
13960 unsigned LC2G1D1T
: 1;
13961 unsigned LC2G1D2N
: 1;
13962 unsigned LC2G1D2T
: 1;
13963 unsigned LC2G1D3N
: 1;
13964 unsigned LC2G1D3T
: 1;
13965 unsigned LC2G1D4N
: 1;
13966 unsigned LC2G1D4T
: 1;
13980 } __CLC2GLS0bits_t
;
13982 extern __at(0x0E20) volatile __CLC2GLS0bits_t CLC2GLS0bits
;
13984 #define _CLC2GLS0_LC2G1D1N 0x01
13985 #define _CLC2GLS0_D1N 0x01
13986 #define _CLC2GLS0_LC2G1D1T 0x02
13987 #define _CLC2GLS0_D1T 0x02
13988 #define _CLC2GLS0_LC2G1D2N 0x04
13989 #define _CLC2GLS0_D2N 0x04
13990 #define _CLC2GLS0_LC2G1D2T 0x08
13991 #define _CLC2GLS0_D2T 0x08
13992 #define _CLC2GLS0_LC2G1D3N 0x10
13993 #define _CLC2GLS0_D3N 0x10
13994 #define _CLC2GLS0_LC2G1D3T 0x20
13995 #define _CLC2GLS0_D3T 0x20
13996 #define _CLC2GLS0_LC2G1D4N 0x40
13997 #define _CLC2GLS0_D4N 0x40
13998 #define _CLC2GLS0_LC2G1D4T 0x80
13999 #define _CLC2GLS0_D4T 0x80
14001 //==============================================================================
14004 //==============================================================================
14007 extern __at(0x0E21) __sfr CLC2GLS1
;
14013 unsigned LC2G2D1N
: 1;
14014 unsigned LC2G2D1T
: 1;
14015 unsigned LC2G2D2N
: 1;
14016 unsigned LC2G2D2T
: 1;
14017 unsigned LC2G2D3N
: 1;
14018 unsigned LC2G2D3T
: 1;
14019 unsigned LC2G2D4N
: 1;
14020 unsigned LC2G2D4T
: 1;
14034 } __CLC2GLS1bits_t
;
14036 extern __at(0x0E21) volatile __CLC2GLS1bits_t CLC2GLS1bits
;
14038 #define _CLC2GLS1_LC2G2D1N 0x01
14039 #define _CLC2GLS1_D1N 0x01
14040 #define _CLC2GLS1_LC2G2D1T 0x02
14041 #define _CLC2GLS1_D1T 0x02
14042 #define _CLC2GLS1_LC2G2D2N 0x04
14043 #define _CLC2GLS1_D2N 0x04
14044 #define _CLC2GLS1_LC2G2D2T 0x08
14045 #define _CLC2GLS1_D2T 0x08
14046 #define _CLC2GLS1_LC2G2D3N 0x10
14047 #define _CLC2GLS1_D3N 0x10
14048 #define _CLC2GLS1_LC2G2D3T 0x20
14049 #define _CLC2GLS1_D3T 0x20
14050 #define _CLC2GLS1_LC2G2D4N 0x40
14051 #define _CLC2GLS1_D4N 0x40
14052 #define _CLC2GLS1_LC2G2D4T 0x80
14053 #define _CLC2GLS1_D4T 0x80
14055 //==============================================================================
14058 //==============================================================================
14061 extern __at(0x0E22) __sfr CLC2GLS2
;
14067 unsigned LC2G3D1N
: 1;
14068 unsigned LC2G3D1T
: 1;
14069 unsigned LC2G3D2N
: 1;
14070 unsigned LC2G3D2T
: 1;
14071 unsigned LC2G3D3N
: 1;
14072 unsigned LC2G3D3T
: 1;
14073 unsigned LC2G3D4N
: 1;
14074 unsigned LC2G3D4T
: 1;
14088 } __CLC2GLS2bits_t
;
14090 extern __at(0x0E22) volatile __CLC2GLS2bits_t CLC2GLS2bits
;
14092 #define _CLC2GLS2_LC2G3D1N 0x01
14093 #define _CLC2GLS2_D1N 0x01
14094 #define _CLC2GLS2_LC2G3D1T 0x02
14095 #define _CLC2GLS2_D1T 0x02
14096 #define _CLC2GLS2_LC2G3D2N 0x04
14097 #define _CLC2GLS2_D2N 0x04
14098 #define _CLC2GLS2_LC2G3D2T 0x08
14099 #define _CLC2GLS2_D2T 0x08
14100 #define _CLC2GLS2_LC2G3D3N 0x10
14101 #define _CLC2GLS2_D3N 0x10
14102 #define _CLC2GLS2_LC2G3D3T 0x20
14103 #define _CLC2GLS2_D3T 0x20
14104 #define _CLC2GLS2_LC2G3D4N 0x40
14105 #define _CLC2GLS2_D4N 0x40
14106 #define _CLC2GLS2_LC2G3D4T 0x80
14107 #define _CLC2GLS2_D4T 0x80
14109 //==============================================================================
14112 //==============================================================================
14115 extern __at(0x0E23) __sfr CLC2GLS3
;
14121 unsigned LC2G4D1N
: 1;
14122 unsigned LC2G4D1T
: 1;
14123 unsigned LC2G4D2N
: 1;
14124 unsigned LC2G4D2T
: 1;
14125 unsigned LC2G4D3N
: 1;
14126 unsigned LC2G4D3T
: 1;
14127 unsigned LC2G4D4N
: 1;
14128 unsigned LC2G4D4T
: 1;
14133 unsigned G4D1N
: 1;
14134 unsigned G4D1T
: 1;
14135 unsigned G4D2N
: 1;
14136 unsigned G4D2T
: 1;
14137 unsigned G4D3N
: 1;
14138 unsigned G4D3T
: 1;
14139 unsigned G4D4N
: 1;
14140 unsigned G4D4T
: 1;
14142 } __CLC2GLS3bits_t
;
14144 extern __at(0x0E23) volatile __CLC2GLS3bits_t CLC2GLS3bits
;
14146 #define _CLC2GLS3_LC2G4D1N 0x01
14147 #define _CLC2GLS3_G4D1N 0x01
14148 #define _CLC2GLS3_LC2G4D1T 0x02
14149 #define _CLC2GLS3_G4D1T 0x02
14150 #define _CLC2GLS3_LC2G4D2N 0x04
14151 #define _CLC2GLS3_G4D2N 0x04
14152 #define _CLC2GLS3_LC2G4D2T 0x08
14153 #define _CLC2GLS3_G4D2T 0x08
14154 #define _CLC2GLS3_LC2G4D3N 0x10
14155 #define _CLC2GLS3_G4D3N 0x10
14156 #define _CLC2GLS3_LC2G4D3T 0x20
14157 #define _CLC2GLS3_G4D3T 0x20
14158 #define _CLC2GLS3_LC2G4D4N 0x40
14159 #define _CLC2GLS3_G4D4N 0x40
14160 #define _CLC2GLS3_LC2G4D4T 0x80
14161 #define _CLC2GLS3_G4D4T 0x80
14163 //==============================================================================
14166 //==============================================================================
14169 extern __at(0x0E24) __sfr CLC3CON
;
14175 unsigned LC3MODE0
: 1;
14176 unsigned LC3MODE1
: 1;
14177 unsigned LC3MODE2
: 1;
14178 unsigned LC3INTN
: 1;
14179 unsigned LC3INTP
: 1;
14180 unsigned LC3OUT
: 1;
14182 unsigned LC3EN
: 1;
14187 unsigned MODE0
: 1;
14188 unsigned MODE1
: 1;
14189 unsigned MODE2
: 1;
14205 unsigned LC3MODE
: 3;
14210 extern __at(0x0E24) volatile __CLC3CONbits_t CLC3CONbits
;
14212 #define _CLC3CON_LC3MODE0 0x01
14213 #define _CLC3CON_MODE0 0x01
14214 #define _CLC3CON_LC3MODE1 0x02
14215 #define _CLC3CON_MODE1 0x02
14216 #define _CLC3CON_LC3MODE2 0x04
14217 #define _CLC3CON_MODE2 0x04
14218 #define _CLC3CON_LC3INTN 0x08
14219 #define _CLC3CON_INTN 0x08
14220 #define _CLC3CON_LC3INTP 0x10
14221 #define _CLC3CON_INTP 0x10
14222 #define _CLC3CON_LC3OUT 0x20
14223 #define _CLC3CON_OUT 0x20
14224 #define _CLC3CON_LC3EN 0x80
14225 #define _CLC3CON_EN 0x80
14227 //==============================================================================
14230 //==============================================================================
14233 extern __at(0x0E25) __sfr CLC3POL
;
14239 unsigned LC3G1POL
: 1;
14240 unsigned LC3G2POL
: 1;
14241 unsigned LC3G3POL
: 1;
14242 unsigned LC3G4POL
: 1;
14246 unsigned LC3POL
: 1;
14251 unsigned G1POL
: 1;
14252 unsigned G2POL
: 1;
14253 unsigned G3POL
: 1;
14254 unsigned G4POL
: 1;
14262 extern __at(0x0E25) volatile __CLC3POLbits_t CLC3POLbits
;
14264 #define _CLC3POL_LC3G1POL 0x01
14265 #define _CLC3POL_G1POL 0x01
14266 #define _CLC3POL_LC3G2POL 0x02
14267 #define _CLC3POL_G2POL 0x02
14268 #define _CLC3POL_LC3G3POL 0x04
14269 #define _CLC3POL_G3POL 0x04
14270 #define _CLC3POL_LC3G4POL 0x08
14271 #define _CLC3POL_G4POL 0x08
14272 #define _CLC3POL_LC3POL 0x80
14273 #define _CLC3POL_POL 0x80
14275 //==============================================================================
14278 //==============================================================================
14281 extern __at(0x0E26) __sfr CLC3SEL0
;
14287 unsigned LC3D1S0
: 1;
14288 unsigned LC3D1S1
: 1;
14289 unsigned LC3D1S2
: 1;
14290 unsigned LC3D1S3
: 1;
14291 unsigned LC3D1S4
: 1;
14292 unsigned LC3D1S5
: 1;
14293 unsigned LC3D1S6
: 1;
14294 unsigned LC3D1S7
: 1;
14308 } __CLC3SEL0bits_t
;
14310 extern __at(0x0E26) volatile __CLC3SEL0bits_t CLC3SEL0bits
;
14312 #define _CLC3SEL0_LC3D1S0 0x01
14313 #define _CLC3SEL0_D1S0 0x01
14314 #define _CLC3SEL0_LC3D1S1 0x02
14315 #define _CLC3SEL0_D1S1 0x02
14316 #define _CLC3SEL0_LC3D1S2 0x04
14317 #define _CLC3SEL0_D1S2 0x04
14318 #define _CLC3SEL0_LC3D1S3 0x08
14319 #define _CLC3SEL0_D1S3 0x08
14320 #define _CLC3SEL0_LC3D1S4 0x10
14321 #define _CLC3SEL0_D1S4 0x10
14322 #define _CLC3SEL0_LC3D1S5 0x20
14323 #define _CLC3SEL0_D1S5 0x20
14324 #define _CLC3SEL0_LC3D1S6 0x40
14325 #define _CLC3SEL0_D1S6 0x40
14326 #define _CLC3SEL0_LC3D1S7 0x80
14327 #define _CLC3SEL0_D1S7 0x80
14329 //==============================================================================
14332 //==============================================================================
14335 extern __at(0x0E27) __sfr CLC3SEL1
;
14341 unsigned LC3D2S0
: 1;
14342 unsigned LC3D2S1
: 1;
14343 unsigned LC3D2S2
: 1;
14344 unsigned LC3D2S3
: 1;
14345 unsigned LC3D2S4
: 1;
14346 unsigned LC3D2S5
: 1;
14347 unsigned LC3D2S6
: 1;
14348 unsigned LC3D2S7
: 1;
14362 } __CLC3SEL1bits_t
;
14364 extern __at(0x0E27) volatile __CLC3SEL1bits_t CLC3SEL1bits
;
14366 #define _CLC3SEL1_LC3D2S0 0x01
14367 #define _CLC3SEL1_D2S0 0x01
14368 #define _CLC3SEL1_LC3D2S1 0x02
14369 #define _CLC3SEL1_D2S1 0x02
14370 #define _CLC3SEL1_LC3D2S2 0x04
14371 #define _CLC3SEL1_D2S2 0x04
14372 #define _CLC3SEL1_LC3D2S3 0x08
14373 #define _CLC3SEL1_D2S3 0x08
14374 #define _CLC3SEL1_LC3D2S4 0x10
14375 #define _CLC3SEL1_D2S4 0x10
14376 #define _CLC3SEL1_LC3D2S5 0x20
14377 #define _CLC3SEL1_D2S5 0x20
14378 #define _CLC3SEL1_LC3D2S6 0x40
14379 #define _CLC3SEL1_D2S6 0x40
14380 #define _CLC3SEL1_LC3D2S7 0x80
14381 #define _CLC3SEL1_D2S7 0x80
14383 //==============================================================================
14386 //==============================================================================
14389 extern __at(0x0E28) __sfr CLC3SEL2
;
14395 unsigned LC3D3S0
: 1;
14396 unsigned LC3D3S1
: 1;
14397 unsigned LC3D3S2
: 1;
14398 unsigned LC3D3S3
: 1;
14399 unsigned LC3D3S4
: 1;
14400 unsigned LC3D3S5
: 1;
14401 unsigned LC3D3S6
: 1;
14402 unsigned LC3D3S7
: 1;
14416 } __CLC3SEL2bits_t
;
14418 extern __at(0x0E28) volatile __CLC3SEL2bits_t CLC3SEL2bits
;
14420 #define _CLC3SEL2_LC3D3S0 0x01
14421 #define _CLC3SEL2_D3S0 0x01
14422 #define _CLC3SEL2_LC3D3S1 0x02
14423 #define _CLC3SEL2_D3S1 0x02
14424 #define _CLC3SEL2_LC3D3S2 0x04
14425 #define _CLC3SEL2_D3S2 0x04
14426 #define _CLC3SEL2_LC3D3S3 0x08
14427 #define _CLC3SEL2_D3S3 0x08
14428 #define _CLC3SEL2_LC3D3S4 0x10
14429 #define _CLC3SEL2_D3S4 0x10
14430 #define _CLC3SEL2_LC3D3S5 0x20
14431 #define _CLC3SEL2_D3S5 0x20
14432 #define _CLC3SEL2_LC3D3S6 0x40
14433 #define _CLC3SEL2_D3S6 0x40
14434 #define _CLC3SEL2_LC3D3S7 0x80
14435 #define _CLC3SEL2_D3S7 0x80
14437 //==============================================================================
14440 //==============================================================================
14443 extern __at(0x0E29) __sfr CLC3SEL3
;
14449 unsigned LC3D4S0
: 1;
14450 unsigned LC3D4S1
: 1;
14451 unsigned LC3D4S2
: 1;
14452 unsigned LC3D4S3
: 1;
14453 unsigned LC3D4S4
: 1;
14454 unsigned LC3D4S5
: 1;
14455 unsigned LC3D4S6
: 1;
14456 unsigned LC3D4S7
: 1;
14470 } __CLC3SEL3bits_t
;
14472 extern __at(0x0E29) volatile __CLC3SEL3bits_t CLC3SEL3bits
;
14474 #define _CLC3SEL3_LC3D4S0 0x01
14475 #define _CLC3SEL3_D4S0 0x01
14476 #define _CLC3SEL3_LC3D4S1 0x02
14477 #define _CLC3SEL3_D4S1 0x02
14478 #define _CLC3SEL3_LC3D4S2 0x04
14479 #define _CLC3SEL3_D4S2 0x04
14480 #define _CLC3SEL3_LC3D4S3 0x08
14481 #define _CLC3SEL3_D4S3 0x08
14482 #define _CLC3SEL3_LC3D4S4 0x10
14483 #define _CLC3SEL3_D4S4 0x10
14484 #define _CLC3SEL3_LC3D4S5 0x20
14485 #define _CLC3SEL3_D4S5 0x20
14486 #define _CLC3SEL3_LC3D4S6 0x40
14487 #define _CLC3SEL3_D4S6 0x40
14488 #define _CLC3SEL3_LC3D4S7 0x80
14489 #define _CLC3SEL3_D4S7 0x80
14491 //==============================================================================
14494 //==============================================================================
14497 extern __at(0x0E2A) __sfr CLC3GLS0
;
14503 unsigned LC3G1D1N
: 1;
14504 unsigned LC3G1D1T
: 1;
14505 unsigned LC3G1D2N
: 1;
14506 unsigned LC3G1D2T
: 1;
14507 unsigned LC3G1D3N
: 1;
14508 unsigned LC3G1D3T
: 1;
14509 unsigned LC3G1D4N
: 1;
14510 unsigned LC3G1D4T
: 1;
14524 } __CLC3GLS0bits_t
;
14526 extern __at(0x0E2A) volatile __CLC3GLS0bits_t CLC3GLS0bits
;
14528 #define _CLC3GLS0_LC3G1D1N 0x01
14529 #define _CLC3GLS0_D1N 0x01
14530 #define _CLC3GLS0_LC3G1D1T 0x02
14531 #define _CLC3GLS0_D1T 0x02
14532 #define _CLC3GLS0_LC3G1D2N 0x04
14533 #define _CLC3GLS0_D2N 0x04
14534 #define _CLC3GLS0_LC3G1D2T 0x08
14535 #define _CLC3GLS0_D2T 0x08
14536 #define _CLC3GLS0_LC3G1D3N 0x10
14537 #define _CLC3GLS0_D3N 0x10
14538 #define _CLC3GLS0_LC3G1D3T 0x20
14539 #define _CLC3GLS0_D3T 0x20
14540 #define _CLC3GLS0_LC3G1D4N 0x40
14541 #define _CLC3GLS0_D4N 0x40
14542 #define _CLC3GLS0_LC3G1D4T 0x80
14543 #define _CLC3GLS0_D4T 0x80
14545 //==============================================================================
14548 //==============================================================================
14551 extern __at(0x0E2B) __sfr CLC3GLS1
;
14557 unsigned LC3G2D1N
: 1;
14558 unsigned LC3G2D1T
: 1;
14559 unsigned LC3G2D2N
: 1;
14560 unsigned LC3G2D2T
: 1;
14561 unsigned LC3G2D3N
: 1;
14562 unsigned LC3G2D3T
: 1;
14563 unsigned LC3G2D4N
: 1;
14564 unsigned LC3G2D4T
: 1;
14578 } __CLC3GLS1bits_t
;
14580 extern __at(0x0E2B) volatile __CLC3GLS1bits_t CLC3GLS1bits
;
14582 #define _CLC3GLS1_LC3G2D1N 0x01
14583 #define _CLC3GLS1_D1N 0x01
14584 #define _CLC3GLS1_LC3G2D1T 0x02
14585 #define _CLC3GLS1_D1T 0x02
14586 #define _CLC3GLS1_LC3G2D2N 0x04
14587 #define _CLC3GLS1_D2N 0x04
14588 #define _CLC3GLS1_LC3G2D2T 0x08
14589 #define _CLC3GLS1_D2T 0x08
14590 #define _CLC3GLS1_LC3G2D3N 0x10
14591 #define _CLC3GLS1_D3N 0x10
14592 #define _CLC3GLS1_LC3G2D3T 0x20
14593 #define _CLC3GLS1_D3T 0x20
14594 #define _CLC3GLS1_LC3G2D4N 0x40
14595 #define _CLC3GLS1_D4N 0x40
14596 #define _CLC3GLS1_LC3G2D4T 0x80
14597 #define _CLC3GLS1_D4T 0x80
14599 //==============================================================================
14602 //==============================================================================
14605 extern __at(0x0E2C) __sfr CLC3GLS2
;
14611 unsigned LC3G3D1N
: 1;
14612 unsigned LC3G3D1T
: 1;
14613 unsigned LC3G3D2N
: 1;
14614 unsigned LC3G3D2T
: 1;
14615 unsigned LC3G3D3N
: 1;
14616 unsigned LC3G3D3T
: 1;
14617 unsigned LC3G3D4N
: 1;
14618 unsigned LC3G3D4T
: 1;
14632 } __CLC3GLS2bits_t
;
14634 extern __at(0x0E2C) volatile __CLC3GLS2bits_t CLC3GLS2bits
;
14636 #define _CLC3GLS2_LC3G3D1N 0x01
14637 #define _CLC3GLS2_D1N 0x01
14638 #define _CLC3GLS2_LC3G3D1T 0x02
14639 #define _CLC3GLS2_D1T 0x02
14640 #define _CLC3GLS2_LC3G3D2N 0x04
14641 #define _CLC3GLS2_D2N 0x04
14642 #define _CLC3GLS2_LC3G3D2T 0x08
14643 #define _CLC3GLS2_D2T 0x08
14644 #define _CLC3GLS2_LC3G3D3N 0x10
14645 #define _CLC3GLS2_D3N 0x10
14646 #define _CLC3GLS2_LC3G3D3T 0x20
14647 #define _CLC3GLS2_D3T 0x20
14648 #define _CLC3GLS2_LC3G3D4N 0x40
14649 #define _CLC3GLS2_D4N 0x40
14650 #define _CLC3GLS2_LC3G3D4T 0x80
14651 #define _CLC3GLS2_D4T 0x80
14653 //==============================================================================
14656 //==============================================================================
14659 extern __at(0x0E2D) __sfr CLC3GLS3
;
14665 unsigned LC3G4D1N
: 1;
14666 unsigned LC3G4D1T
: 1;
14667 unsigned LC3G4D2N
: 1;
14668 unsigned LC3G4D2T
: 1;
14669 unsigned LC3G4D3N
: 1;
14670 unsigned LC3G4D3T
: 1;
14671 unsigned LC3G4D4N
: 1;
14672 unsigned LC3G4D4T
: 1;
14677 unsigned G4D1N
: 1;
14678 unsigned G4D1T
: 1;
14679 unsigned G4D2N
: 1;
14680 unsigned G4D2T
: 1;
14681 unsigned G4D3N
: 1;
14682 unsigned G4D3T
: 1;
14683 unsigned G4D4N
: 1;
14684 unsigned G4D4T
: 1;
14686 } __CLC3GLS3bits_t
;
14688 extern __at(0x0E2D) volatile __CLC3GLS3bits_t CLC3GLS3bits
;
14690 #define _CLC3GLS3_LC3G4D1N 0x01
14691 #define _CLC3GLS3_G4D1N 0x01
14692 #define _CLC3GLS3_LC3G4D1T 0x02
14693 #define _CLC3GLS3_G4D1T 0x02
14694 #define _CLC3GLS3_LC3G4D2N 0x04
14695 #define _CLC3GLS3_G4D2N 0x04
14696 #define _CLC3GLS3_LC3G4D2T 0x08
14697 #define _CLC3GLS3_G4D2T 0x08
14698 #define _CLC3GLS3_LC3G4D3N 0x10
14699 #define _CLC3GLS3_G4D3N 0x10
14700 #define _CLC3GLS3_LC3G4D3T 0x20
14701 #define _CLC3GLS3_G4D3T 0x20
14702 #define _CLC3GLS3_LC3G4D4N 0x40
14703 #define _CLC3GLS3_G4D4N 0x40
14704 #define _CLC3GLS3_LC3G4D4T 0x80
14705 #define _CLC3GLS3_G4D4T 0x80
14707 //==============================================================================
14710 //==============================================================================
14713 extern __at(0x0E2E) __sfr CLC4CON
;
14719 unsigned LC4MODE0
: 1;
14720 unsigned LC4MODE1
: 1;
14721 unsigned LC4MODE2
: 1;
14722 unsigned LC4INTN
: 1;
14723 unsigned LC4INTP
: 1;
14724 unsigned LC4OUT
: 1;
14726 unsigned LC4EN
: 1;
14731 unsigned MODE0
: 1;
14732 unsigned MODE1
: 1;
14733 unsigned MODE2
: 1;
14749 unsigned LC4MODE
: 3;
14754 extern __at(0x0E2E) volatile __CLC4CONbits_t CLC4CONbits
;
14756 #define _CLC4CON_LC4MODE0 0x01
14757 #define _CLC4CON_MODE0 0x01
14758 #define _CLC4CON_LC4MODE1 0x02
14759 #define _CLC4CON_MODE1 0x02
14760 #define _CLC4CON_LC4MODE2 0x04
14761 #define _CLC4CON_MODE2 0x04
14762 #define _CLC4CON_LC4INTN 0x08
14763 #define _CLC4CON_INTN 0x08
14764 #define _CLC4CON_LC4INTP 0x10
14765 #define _CLC4CON_INTP 0x10
14766 #define _CLC4CON_LC4OUT 0x20
14767 #define _CLC4CON_OUT 0x20
14768 #define _CLC4CON_LC4EN 0x80
14769 #define _CLC4CON_EN 0x80
14771 //==============================================================================
14774 //==============================================================================
14777 extern __at(0x0E2F) __sfr CLC4POL
;
14783 unsigned LC4G1POL
: 1;
14784 unsigned LC4G2POL
: 1;
14785 unsigned LC4G3POL
: 1;
14786 unsigned LC4G4POL
: 1;
14790 unsigned LC4POL
: 1;
14795 unsigned G1POL
: 1;
14796 unsigned G2POL
: 1;
14797 unsigned G3POL
: 1;
14798 unsigned G4POL
: 1;
14806 extern __at(0x0E2F) volatile __CLC4POLbits_t CLC4POLbits
;
14808 #define _CLC4POL_LC4G1POL 0x01
14809 #define _CLC4POL_G1POL 0x01
14810 #define _CLC4POL_LC4G2POL 0x02
14811 #define _CLC4POL_G2POL 0x02
14812 #define _CLC4POL_LC4G3POL 0x04
14813 #define _CLC4POL_G3POL 0x04
14814 #define _CLC4POL_LC4G4POL 0x08
14815 #define _CLC4POL_G4POL 0x08
14816 #define _CLC4POL_LC4POL 0x80
14817 #define _CLC4POL_POL 0x80
14819 //==============================================================================
14822 //==============================================================================
14825 extern __at(0x0E30) __sfr CLC4SEL0
;
14831 unsigned LC4D1S0
: 1;
14832 unsigned LC4D1S1
: 1;
14833 unsigned LC4D1S2
: 1;
14834 unsigned LC4D1S3
: 1;
14835 unsigned LC4D1S4
: 1;
14836 unsigned LC4D1S5
: 1;
14837 unsigned LC4D1S6
: 1;
14838 unsigned LC4D1S7
: 1;
14852 } __CLC4SEL0bits_t
;
14854 extern __at(0x0E30) volatile __CLC4SEL0bits_t CLC4SEL0bits
;
14856 #define _CLC4SEL0_LC4D1S0 0x01
14857 #define _CLC4SEL0_D1S0 0x01
14858 #define _CLC4SEL0_LC4D1S1 0x02
14859 #define _CLC4SEL0_D1S1 0x02
14860 #define _CLC4SEL0_LC4D1S2 0x04
14861 #define _CLC4SEL0_D1S2 0x04
14862 #define _CLC4SEL0_LC4D1S3 0x08
14863 #define _CLC4SEL0_D1S3 0x08
14864 #define _CLC4SEL0_LC4D1S4 0x10
14865 #define _CLC4SEL0_D1S4 0x10
14866 #define _CLC4SEL0_LC4D1S5 0x20
14867 #define _CLC4SEL0_D1S5 0x20
14868 #define _CLC4SEL0_LC4D1S6 0x40
14869 #define _CLC4SEL0_D1S6 0x40
14870 #define _CLC4SEL0_LC4D1S7 0x80
14871 #define _CLC4SEL0_D1S7 0x80
14873 //==============================================================================
14876 //==============================================================================
14879 extern __at(0x0E31) __sfr CLC4SEL1
;
14885 unsigned LC4D2S0
: 1;
14886 unsigned LC4D2S1
: 1;
14887 unsigned LC4D2S2
: 1;
14888 unsigned LC4D2S3
: 1;
14889 unsigned LC4D2S4
: 1;
14890 unsigned LC4D2S5
: 1;
14891 unsigned LC4D2S6
: 1;
14892 unsigned LC4D2S7
: 1;
14906 } __CLC4SEL1bits_t
;
14908 extern __at(0x0E31) volatile __CLC4SEL1bits_t CLC4SEL1bits
;
14910 #define _CLC4SEL1_LC4D2S0 0x01
14911 #define _CLC4SEL1_D2S0 0x01
14912 #define _CLC4SEL1_LC4D2S1 0x02
14913 #define _CLC4SEL1_D2S1 0x02
14914 #define _CLC4SEL1_LC4D2S2 0x04
14915 #define _CLC4SEL1_D2S2 0x04
14916 #define _CLC4SEL1_LC4D2S3 0x08
14917 #define _CLC4SEL1_D2S3 0x08
14918 #define _CLC4SEL1_LC4D2S4 0x10
14919 #define _CLC4SEL1_D2S4 0x10
14920 #define _CLC4SEL1_LC4D2S5 0x20
14921 #define _CLC4SEL1_D2S5 0x20
14922 #define _CLC4SEL1_LC4D2S6 0x40
14923 #define _CLC4SEL1_D2S6 0x40
14924 #define _CLC4SEL1_LC4D2S7 0x80
14925 #define _CLC4SEL1_D2S7 0x80
14927 //==============================================================================
14930 //==============================================================================
14933 extern __at(0x0E32) __sfr CLC4SEL2
;
14939 unsigned LC4D3S0
: 1;
14940 unsigned LC4D3S1
: 1;
14941 unsigned LC4D3S2
: 1;
14942 unsigned LC4D3S3
: 1;
14943 unsigned LC4D3S4
: 1;
14944 unsigned LC4D3S5
: 1;
14945 unsigned LC4D3S6
: 1;
14946 unsigned LC4D3S7
: 1;
14960 } __CLC4SEL2bits_t
;
14962 extern __at(0x0E32) volatile __CLC4SEL2bits_t CLC4SEL2bits
;
14964 #define _CLC4SEL2_LC4D3S0 0x01
14965 #define _CLC4SEL2_D3S0 0x01
14966 #define _CLC4SEL2_LC4D3S1 0x02
14967 #define _CLC4SEL2_D3S1 0x02
14968 #define _CLC4SEL2_LC4D3S2 0x04
14969 #define _CLC4SEL2_D3S2 0x04
14970 #define _CLC4SEL2_LC4D3S3 0x08
14971 #define _CLC4SEL2_D3S3 0x08
14972 #define _CLC4SEL2_LC4D3S4 0x10
14973 #define _CLC4SEL2_D3S4 0x10
14974 #define _CLC4SEL2_LC4D3S5 0x20
14975 #define _CLC4SEL2_D3S5 0x20
14976 #define _CLC4SEL2_LC4D3S6 0x40
14977 #define _CLC4SEL2_D3S6 0x40
14978 #define _CLC4SEL2_LC4D3S7 0x80
14979 #define _CLC4SEL2_D3S7 0x80
14981 //==============================================================================
14984 //==============================================================================
14987 extern __at(0x0E33) __sfr CLC4SEL3
;
14993 unsigned LC4D4S0
: 1;
14994 unsigned LC4D4S1
: 1;
14995 unsigned LC4D4S2
: 1;
14996 unsigned LC4D4S3
: 1;
14997 unsigned LC4D4S4
: 1;
14998 unsigned LC4D4S5
: 1;
14999 unsigned LC4D4S6
: 1;
15000 unsigned LC4D4S7
: 1;
15014 } __CLC4SEL3bits_t
;
15016 extern __at(0x0E33) volatile __CLC4SEL3bits_t CLC4SEL3bits
;
15018 #define _CLC4SEL3_LC4D4S0 0x01
15019 #define _CLC4SEL3_D4S0 0x01
15020 #define _CLC4SEL3_LC4D4S1 0x02
15021 #define _CLC4SEL3_D4S1 0x02
15022 #define _CLC4SEL3_LC4D4S2 0x04
15023 #define _CLC4SEL3_D4S2 0x04
15024 #define _CLC4SEL3_LC4D4S3 0x08
15025 #define _CLC4SEL3_D4S3 0x08
15026 #define _CLC4SEL3_LC4D4S4 0x10
15027 #define _CLC4SEL3_D4S4 0x10
15028 #define _CLC4SEL3_LC4D4S5 0x20
15029 #define _CLC4SEL3_D4S5 0x20
15030 #define _CLC4SEL3_LC4D4S6 0x40
15031 #define _CLC4SEL3_D4S6 0x40
15032 #define _CLC4SEL3_LC4D4S7 0x80
15033 #define _CLC4SEL3_D4S7 0x80
15035 //==============================================================================
15038 //==============================================================================
15041 extern __at(0x0E34) __sfr CLC4GLS0
;
15047 unsigned LC4G1D1N
: 1;
15048 unsigned LC4G1D1T
: 1;
15049 unsigned LC4G1D2N
: 1;
15050 unsigned LC4G1D2T
: 1;
15051 unsigned LC4G1D3N
: 1;
15052 unsigned LC4G1D3T
: 1;
15053 unsigned LC4G1D4N
: 1;
15054 unsigned LC4G1D4T
: 1;
15068 } __CLC4GLS0bits_t
;
15070 extern __at(0x0E34) volatile __CLC4GLS0bits_t CLC4GLS0bits
;
15072 #define _CLC4GLS0_LC4G1D1N 0x01
15073 #define _CLC4GLS0_D1N 0x01
15074 #define _CLC4GLS0_LC4G1D1T 0x02
15075 #define _CLC4GLS0_D1T 0x02
15076 #define _CLC4GLS0_LC4G1D2N 0x04
15077 #define _CLC4GLS0_D2N 0x04
15078 #define _CLC4GLS0_LC4G1D2T 0x08
15079 #define _CLC4GLS0_D2T 0x08
15080 #define _CLC4GLS0_LC4G1D3N 0x10
15081 #define _CLC4GLS0_D3N 0x10
15082 #define _CLC4GLS0_LC4G1D3T 0x20
15083 #define _CLC4GLS0_D3T 0x20
15084 #define _CLC4GLS0_LC4G1D4N 0x40
15085 #define _CLC4GLS0_D4N 0x40
15086 #define _CLC4GLS0_LC4G1D4T 0x80
15087 #define _CLC4GLS0_D4T 0x80
15089 //==============================================================================
15092 //==============================================================================
15095 extern __at(0x0E35) __sfr CLC4GLS1
;
15101 unsigned LC4G2D1N
: 1;
15102 unsigned LC4G2D1T
: 1;
15103 unsigned LC4G2D2N
: 1;
15104 unsigned LC4G2D2T
: 1;
15105 unsigned LC4G2D3N
: 1;
15106 unsigned LC4G2D3T
: 1;
15107 unsigned LC4G2D4N
: 1;
15108 unsigned LC4G2D4T
: 1;
15122 } __CLC4GLS1bits_t
;
15124 extern __at(0x0E35) volatile __CLC4GLS1bits_t CLC4GLS1bits
;
15126 #define _CLC4GLS1_LC4G2D1N 0x01
15127 #define _CLC4GLS1_D1N 0x01
15128 #define _CLC4GLS1_LC4G2D1T 0x02
15129 #define _CLC4GLS1_D1T 0x02
15130 #define _CLC4GLS1_LC4G2D2N 0x04
15131 #define _CLC4GLS1_D2N 0x04
15132 #define _CLC4GLS1_LC4G2D2T 0x08
15133 #define _CLC4GLS1_D2T 0x08
15134 #define _CLC4GLS1_LC4G2D3N 0x10
15135 #define _CLC4GLS1_D3N 0x10
15136 #define _CLC4GLS1_LC4G2D3T 0x20
15137 #define _CLC4GLS1_D3T 0x20
15138 #define _CLC4GLS1_LC4G2D4N 0x40
15139 #define _CLC4GLS1_D4N 0x40
15140 #define _CLC4GLS1_LC4G2D4T 0x80
15141 #define _CLC4GLS1_D4T 0x80
15143 //==============================================================================
15146 //==============================================================================
15149 extern __at(0x0E36) __sfr CLC4GLS2
;
15155 unsigned LC4G3D1N
: 1;
15156 unsigned LC4G3D1T
: 1;
15157 unsigned LC4G3D2N
: 1;
15158 unsigned LC4G3D2T
: 1;
15159 unsigned LC4G3D3N
: 1;
15160 unsigned LC4G3D3T
: 1;
15161 unsigned LC4G3D4N
: 1;
15162 unsigned LC4G3D4T
: 1;
15176 } __CLC4GLS2bits_t
;
15178 extern __at(0x0E36) volatile __CLC4GLS2bits_t CLC4GLS2bits
;
15180 #define _CLC4GLS2_LC4G3D1N 0x01
15181 #define _CLC4GLS2_D1N 0x01
15182 #define _CLC4GLS2_LC4G3D1T 0x02
15183 #define _CLC4GLS2_D1T 0x02
15184 #define _CLC4GLS2_LC4G3D2N 0x04
15185 #define _CLC4GLS2_D2N 0x04
15186 #define _CLC4GLS2_LC4G3D2T 0x08
15187 #define _CLC4GLS2_D2T 0x08
15188 #define _CLC4GLS2_LC4G3D3N 0x10
15189 #define _CLC4GLS2_D3N 0x10
15190 #define _CLC4GLS2_LC4G3D3T 0x20
15191 #define _CLC4GLS2_D3T 0x20
15192 #define _CLC4GLS2_LC4G3D4N 0x40
15193 #define _CLC4GLS2_D4N 0x40
15194 #define _CLC4GLS2_LC4G3D4T 0x80
15195 #define _CLC4GLS2_D4T 0x80
15197 //==============================================================================
15200 //==============================================================================
15203 extern __at(0x0E37) __sfr CLC4GLS3
;
15209 unsigned LC4G4D1N
: 1;
15210 unsigned LC4G4D1T
: 1;
15211 unsigned LC4G4D2N
: 1;
15212 unsigned LC4G4D2T
: 1;
15213 unsigned LC4G4D3N
: 1;
15214 unsigned LC4G4D3T
: 1;
15215 unsigned LC4G4D4N
: 1;
15216 unsigned LC4G4D4T
: 1;
15221 unsigned G4D1N
: 1;
15222 unsigned G4D1T
: 1;
15223 unsigned G4D2N
: 1;
15224 unsigned G4D2T
: 1;
15225 unsigned G4D3N
: 1;
15226 unsigned G4D3T
: 1;
15227 unsigned G4D4N
: 1;
15228 unsigned G4D4T
: 1;
15230 } __CLC4GLS3bits_t
;
15232 extern __at(0x0E37) volatile __CLC4GLS3bits_t CLC4GLS3bits
;
15234 #define _CLC4GLS3_LC4G4D1N 0x01
15235 #define _CLC4GLS3_G4D1N 0x01
15236 #define _CLC4GLS3_LC4G4D1T 0x02
15237 #define _CLC4GLS3_G4D1T 0x02
15238 #define _CLC4GLS3_LC4G4D2N 0x04
15239 #define _CLC4GLS3_G4D2N 0x04
15240 #define _CLC4GLS3_LC4G4D2T 0x08
15241 #define _CLC4GLS3_G4D2T 0x08
15242 #define _CLC4GLS3_LC4G4D3N 0x10
15243 #define _CLC4GLS3_G4D3N 0x10
15244 #define _CLC4GLS3_LC4G4D3T 0x20
15245 #define _CLC4GLS3_G4D3T 0x20
15246 #define _CLC4GLS3_LC4G4D4N 0x40
15247 #define _CLC4GLS3_G4D4N 0x40
15248 #define _CLC4GLS3_LC4G4D4T 0x80
15249 #define _CLC4GLS3_G4D4T 0x80
15251 //==============================================================================
15254 //==============================================================================
15257 extern __at(0x0E8F) __sfr PPSLOCK
;
15261 unsigned PPSLOCKED
: 1;
15271 extern __at(0x0E8F) volatile __PPSLOCKbits_t PPSLOCKbits
;
15273 #define _PPSLOCKED 0x01
15275 //==============================================================================
15278 //==============================================================================
15281 extern __at(0x0E90) __sfr INTPPS
;
15287 unsigned INTPPS0
: 1;
15288 unsigned INTPPS1
: 1;
15289 unsigned INTPPS2
: 1;
15290 unsigned INTPPS3
: 1;
15299 unsigned INTPPS
: 4;
15304 extern __at(0x0E90) volatile __INTPPSbits_t INTPPSbits
;
15306 #define _INTPPS0 0x01
15307 #define _INTPPS1 0x02
15308 #define _INTPPS2 0x04
15309 #define _INTPPS3 0x08
15311 //==============================================================================
15314 //==============================================================================
15317 extern __at(0x0E91) __sfr T0CKIPPS
;
15323 unsigned T0CKIPPS0
: 1;
15324 unsigned T0CKIPPS1
: 1;
15325 unsigned T0CKIPPS2
: 1;
15326 unsigned T0CKIPPS3
: 1;
15335 unsigned T0CKIPPS
: 4;
15338 } __T0CKIPPSbits_t
;
15340 extern __at(0x0E91) volatile __T0CKIPPSbits_t T0CKIPPSbits
;
15342 #define _T0CKIPPS0 0x01
15343 #define _T0CKIPPS1 0x02
15344 #define _T0CKIPPS2 0x04
15345 #define _T0CKIPPS3 0x08
15347 //==============================================================================
15350 //==============================================================================
15353 extern __at(0x0E92) __sfr T1CKIPPS
;
15359 unsigned T1CKIPPS0
: 1;
15360 unsigned T1CKIPPS1
: 1;
15361 unsigned T1CKIPPS2
: 1;
15362 unsigned T1CKIPPS3
: 1;
15363 unsigned T1CKIPPS4
: 1;
15371 unsigned T1CKIPPS
: 5;
15374 } __T1CKIPPSbits_t
;
15376 extern __at(0x0E92) volatile __T1CKIPPSbits_t T1CKIPPSbits
;
15378 #define _T1CKIPPS0 0x01
15379 #define _T1CKIPPS1 0x02
15380 #define _T1CKIPPS2 0x04
15381 #define _T1CKIPPS3 0x08
15382 #define _T1CKIPPS4 0x10
15384 //==============================================================================
15387 //==============================================================================
15390 extern __at(0x0E93) __sfr T1GPPS
;
15396 unsigned T1GPPS0
: 1;
15397 unsigned T1GPPS1
: 1;
15398 unsigned T1GPPS2
: 1;
15399 unsigned T1GPPS3
: 1;
15400 unsigned T1GPPS4
: 1;
15408 unsigned T1GPPS
: 5;
15413 extern __at(0x0E93) volatile __T1GPPSbits_t T1GPPSbits
;
15415 #define _T1GPPS0 0x01
15416 #define _T1GPPS1 0x02
15417 #define _T1GPPS2 0x04
15418 #define _T1GPPS3 0x08
15419 #define _T1GPPS4 0x10
15421 //==============================================================================
15424 //==============================================================================
15427 extern __at(0x0E94) __sfr T3CKIPPS
;
15433 unsigned T3CKIPPS0
: 1;
15434 unsigned T3CKIPPS1
: 1;
15435 unsigned T3CKIPPS2
: 1;
15436 unsigned T3CKIPPS3
: 1;
15437 unsigned T3CKIPPS4
: 1;
15445 unsigned T3CKIPPS
: 5;
15448 } __T3CKIPPSbits_t
;
15450 extern __at(0x0E94) volatile __T3CKIPPSbits_t T3CKIPPSbits
;
15452 #define _T3CKIPPS0 0x01
15453 #define _T3CKIPPS1 0x02
15454 #define _T3CKIPPS2 0x04
15455 #define _T3CKIPPS3 0x08
15456 #define _T3CKIPPS4 0x10
15458 //==============================================================================
15461 //==============================================================================
15464 extern __at(0x0E95) __sfr T3GPPS
;
15470 unsigned T3GPPS0
: 1;
15471 unsigned T3GPPS1
: 1;
15472 unsigned T3GPPS2
: 1;
15473 unsigned T3GPPS3
: 1;
15474 unsigned T3GPPS4
: 1;
15482 unsigned T3GPPS
: 5;
15487 extern __at(0x0E95) volatile __T3GPPSbits_t T3GPPSbits
;
15489 #define _T3GPPS0 0x01
15490 #define _T3GPPS1 0x02
15491 #define _T3GPPS2 0x04
15492 #define _T3GPPS3 0x08
15493 #define _T3GPPS4 0x10
15495 //==============================================================================
15498 //==============================================================================
15501 extern __at(0x0E96) __sfr T5CKIPPS
;
15507 unsigned T5CKIPPS0
: 1;
15508 unsigned T5CKIPPS1
: 1;
15509 unsigned T5CKIPPS2
: 1;
15510 unsigned T5CKIPPS3
: 1;
15511 unsigned T5CKIPPS4
: 1;
15519 unsigned T5CKIPPS
: 5;
15522 } __T5CKIPPSbits_t
;
15524 extern __at(0x0E96) volatile __T5CKIPPSbits_t T5CKIPPSbits
;
15526 #define _T5CKIPPS0 0x01
15527 #define _T5CKIPPS1 0x02
15528 #define _T5CKIPPS2 0x04
15529 #define _T5CKIPPS3 0x08
15530 #define _T5CKIPPS4 0x10
15532 //==============================================================================
15535 //==============================================================================
15538 extern __at(0x0E97) __sfr T5GPPS
;
15544 unsigned T5GPPS0
: 1;
15545 unsigned T5GPPS1
: 1;
15546 unsigned T5GPPS2
: 1;
15547 unsigned T5GPPS3
: 1;
15548 unsigned T5GPPS4
: 1;
15556 unsigned T5GPPS
: 5;
15561 extern __at(0x0E97) volatile __T5GPPSbits_t T5GPPSbits
;
15563 #define _T5GPPS0 0x01
15564 #define _T5GPPS1 0x02
15565 #define _T5GPPS2 0x04
15566 #define _T5GPPS3 0x08
15567 #define _T5GPPS4 0x10
15569 //==============================================================================
15572 //==============================================================================
15575 extern __at(0x0E9C) __sfr T2AINPPS
;
15581 unsigned T2AINPPS0
: 1;
15582 unsigned T2AINPPS1
: 1;
15583 unsigned T2AINPPS2
: 1;
15584 unsigned T2AINPPS3
: 1;
15585 unsigned T2AINPPS4
: 1;
15593 unsigned T2AINPPS
: 5;
15596 } __T2AINPPSbits_t
;
15598 extern __at(0x0E9C) volatile __T2AINPPSbits_t T2AINPPSbits
;
15600 #define _T2AINPPS0 0x01
15601 #define _T2AINPPS1 0x02
15602 #define _T2AINPPS2 0x04
15603 #define _T2AINPPS3 0x08
15604 #define _T2AINPPS4 0x10
15606 //==============================================================================
15609 //==============================================================================
15612 extern __at(0x0E9D) __sfr T4AINPPS
;
15618 unsigned T4AINPPS0
: 1;
15619 unsigned T4AINPPS1
: 1;
15620 unsigned T4AINPPS2
: 1;
15621 unsigned T4AINPPS3
: 1;
15622 unsigned T4AINPPS4
: 1;
15630 unsigned T4AINPPS
: 5;
15633 } __T4AINPPSbits_t
;
15635 extern __at(0x0E9D) volatile __T4AINPPSbits_t T4AINPPSbits
;
15637 #define _T4AINPPS0 0x01
15638 #define _T4AINPPS1 0x02
15639 #define _T4AINPPS2 0x04
15640 #define _T4AINPPS3 0x08
15641 #define _T4AINPPS4 0x10
15643 //==============================================================================
15646 //==============================================================================
15649 extern __at(0x0E9E) __sfr T6AINPPS
;
15655 unsigned T6AINPPS0
: 1;
15656 unsigned T6AINPPS1
: 1;
15657 unsigned T6AINPPS2
: 1;
15658 unsigned T6AINPPS3
: 1;
15659 unsigned T6AINPPS4
: 1;
15667 unsigned T6AINPPS
: 5;
15670 } __T6AINPPSbits_t
;
15672 extern __at(0x0E9E) volatile __T6AINPPSbits_t T6AINPPSbits
;
15674 #define _T6AINPPS0 0x01
15675 #define _T6AINPPS1 0x02
15676 #define _T6AINPPS2 0x04
15677 #define _T6AINPPS3 0x08
15678 #define _T6AINPPS4 0x10
15680 //==============================================================================
15683 //==============================================================================
15686 extern __at(0x0EA1) __sfr CCP1PPS
;
15692 unsigned CCP1PPS0
: 1;
15693 unsigned CCP1PPS1
: 1;
15694 unsigned CCP1PPS2
: 1;
15695 unsigned CCP1PPS3
: 1;
15696 unsigned CCP1PPS4
: 1;
15704 unsigned CCP1PPS
: 5;
15709 extern __at(0x0EA1) volatile __CCP1PPSbits_t CCP1PPSbits
;
15711 #define _CCP1PPS0 0x01
15712 #define _CCP1PPS1 0x02
15713 #define _CCP1PPS2 0x04
15714 #define _CCP1PPS3 0x08
15715 #define _CCP1PPS4 0x10
15717 //==============================================================================
15720 //==============================================================================
15723 extern __at(0x0EA2) __sfr CCP2PPS
;
15729 unsigned CCP2PPS0
: 1;
15730 unsigned CCP2PPS1
: 1;
15731 unsigned CCP2PPS2
: 1;
15732 unsigned CCP2PPS3
: 1;
15733 unsigned CCP2PPS4
: 1;
15741 unsigned CCP2PPS
: 5;
15746 extern __at(0x0EA2) volatile __CCP2PPSbits_t CCP2PPSbits
;
15748 #define _CCP2PPS0 0x01
15749 #define _CCP2PPS1 0x02
15750 #define _CCP2PPS2 0x04
15751 #define _CCP2PPS3 0x08
15752 #define _CCP2PPS4 0x10
15754 //==============================================================================
15757 //==============================================================================
15760 extern __at(0x0EA3) __sfr CCP3PPS
;
15766 unsigned CCP3PPS0
: 1;
15767 unsigned CCP3PPS1
: 1;
15768 unsigned CCP3PPS2
: 1;
15769 unsigned CCP3PPS3
: 1;
15770 unsigned CCP3PPS4
: 1;
15778 unsigned CCP3PPS
: 5;
15783 extern __at(0x0EA3) volatile __CCP3PPSbits_t CCP3PPSbits
;
15785 #define _CCP3PPS0 0x01
15786 #define _CCP3PPS1 0x02
15787 #define _CCP3PPS2 0x04
15788 #define _CCP3PPS3 0x08
15789 #define _CCP3PPS4 0x10
15791 //==============================================================================
15794 //==============================================================================
15797 extern __at(0x0EA4) __sfr CCP4PPS
;
15803 unsigned CCP4PPS0
: 1;
15804 unsigned CCP4PPS1
: 1;
15805 unsigned CCP4PPS2
: 1;
15806 unsigned CCP4PPS3
: 1;
15807 unsigned CCP4PPS4
: 1;
15815 unsigned CCP4PPS
: 5;
15820 extern __at(0x0EA4) volatile __CCP4PPSbits_t CCP4PPSbits
;
15822 #define _CCP4PPS0 0x01
15823 #define _CCP4PPS1 0x02
15824 #define _CCP4PPS2 0x04
15825 #define _CCP4PPS3 0x08
15826 #define _CCP4PPS4 0x10
15828 //==============================================================================
15831 //==============================================================================
15834 extern __at(0x0EA5) __sfr CCP5PPS
;
15840 unsigned CCP5PPS0
: 1;
15841 unsigned CCP5PPS1
: 1;
15842 unsigned CCP5PPS2
: 1;
15843 unsigned CCP5PPS3
: 1;
15844 unsigned CCP5PPS4
: 1;
15845 unsigned CCP6PPS
: 1;
15852 unsigned CCP5PPS
: 5;
15857 extern __at(0x0EA5) volatile __CCP5PPSbits_t CCP5PPSbits
;
15859 #define _CCP5PPS0 0x01
15860 #define _CCP5PPS1 0x02
15861 #define _CCP5PPS2 0x04
15862 #define _CCP5PPS3 0x08
15863 #define _CCP5PPS4 0x10
15864 #define _CCP6PPS 0x20
15866 //==============================================================================
15869 //==============================================================================
15872 extern __at(0x0EA9) __sfr SMT1WINPPS
;
15878 unsigned SMU1WINPPS0
: 1;
15879 unsigned SMU1WINPPS1
: 1;
15880 unsigned SMU1WINPPS2
: 1;
15881 unsigned SMU1WINPPS3
: 1;
15882 unsigned SMU1WINPPS4
: 1;
15890 unsigned SMU1WINPPS
: 5;
15893 } __SMT1WINPPSbits_t
;
15895 extern __at(0x0EA9) volatile __SMT1WINPPSbits_t SMT1WINPPSbits
;
15897 #define _SMU1WINPPS0 0x01
15898 #define _SMU1WINPPS1 0x02
15899 #define _SMU1WINPPS2 0x04
15900 #define _SMU1WINPPS3 0x08
15901 #define _SMU1WINPPS4 0x10
15903 //==============================================================================
15906 //==============================================================================
15909 extern __at(0x0EAA) __sfr SMT1SIGPPS
;
15915 unsigned SMU1SIGPPS0
: 1;
15916 unsigned SMU1SIGPPS1
: 1;
15917 unsigned SMU1SIGPPS2
: 1;
15918 unsigned SMU1SIGPPS3
: 1;
15919 unsigned SMU1SIGPPS4
: 1;
15927 unsigned SMU1SIGPPS
: 5;
15930 } __SMT1SIGPPSbits_t
;
15932 extern __at(0x0EAA) volatile __SMT1SIGPPSbits_t SMT1SIGPPSbits
;
15934 #define _SMU1SIGPPS0 0x01
15935 #define _SMU1SIGPPS1 0x02
15936 #define _SMU1SIGPPS2 0x04
15937 #define _SMU1SIGPPS3 0x08
15938 #define _SMU1SIGPPS4 0x10
15940 //==============================================================================
15943 //==============================================================================
15946 extern __at(0x0EAB) __sfr SMT2WINPPS
;
15952 unsigned SMU2WINPPS0
: 1;
15953 unsigned SMU2WINPPS1
: 1;
15954 unsigned SMU2WINPPS2
: 1;
15955 unsigned SMU2WINPPS3
: 1;
15956 unsigned SMU2WINPPS4
: 1;
15964 unsigned SMU2WINPPS
: 5;
15967 } __SMT2WINPPSbits_t
;
15969 extern __at(0x0EAB) volatile __SMT2WINPPSbits_t SMT2WINPPSbits
;
15971 #define _SMU2WINPPS0 0x01
15972 #define _SMU2WINPPS1 0x02
15973 #define _SMU2WINPPS2 0x04
15974 #define _SMU2WINPPS3 0x08
15975 #define _SMU2WINPPS4 0x10
15977 //==============================================================================
15980 //==============================================================================
15983 extern __at(0x0EAC) __sfr SMT2SIGPPS
;
15989 unsigned SMU2SIGPPS0
: 1;
15990 unsigned SMU2SIGPPS1
: 1;
15991 unsigned SMU2SIGPPS2
: 1;
15992 unsigned SMU2SIGPPS3
: 1;
15993 unsigned SMU2SIGPPS4
: 1;
16001 unsigned SMU2SIGPPS
: 5;
16004 } __SMT2SIGPPSbits_t
;
16006 extern __at(0x0EAC) volatile __SMT2SIGPPSbits_t SMT2SIGPPSbits
;
16008 #define _SMU2SIGPPS0 0x01
16009 #define _SMU2SIGPPS1 0x02
16010 #define _SMU2SIGPPS2 0x04
16011 #define _SMU2SIGPPS3 0x08
16012 #define _SMU2SIGPPS4 0x10
16014 //==============================================================================
16017 //==============================================================================
16020 extern __at(0x0EB1) __sfr CWG1PPS
;
16026 unsigned CWG1PPS0
: 1;
16027 unsigned CWG1PPS1
: 1;
16028 unsigned CWG1PPS2
: 1;
16029 unsigned CWG1PPS3
: 1;
16030 unsigned CWG1PPS4
: 1;
16038 unsigned CWG1PPS
: 5;
16043 extern __at(0x0EB1) volatile __CWG1PPSbits_t CWG1PPSbits
;
16045 #define _CWG1PPS0 0x01
16046 #define _CWG1PPS1 0x02
16047 #define _CWG1PPS2 0x04
16048 #define _CWG1PPS3 0x08
16049 #define _CWG1PPS4 0x10
16051 //==============================================================================
16054 //==============================================================================
16057 extern __at(0x0EB2) __sfr CWG2PPS
;
16063 unsigned CWG2PPS0
: 1;
16064 unsigned CWG2PPS1
: 1;
16065 unsigned CWG2PPS2
: 1;
16066 unsigned CWG2PPS3
: 1;
16067 unsigned CWG2PPS4
: 1;
16075 unsigned CWG2PPS
: 5;
16080 extern __at(0x0EB2) volatile __CWG2PPSbits_t CWG2PPSbits
;
16082 #define _CWG2PPS0 0x01
16083 #define _CWG2PPS1 0x02
16084 #define _CWG2PPS2 0x04
16085 #define _CWG2PPS3 0x08
16086 #define _CWG2PPS4 0x10
16088 //==============================================================================
16091 //==============================================================================
16094 extern __at(0x0EB3) __sfr CWG3PPS
;
16100 unsigned CWG3PPS0
: 1;
16101 unsigned CWG3PPS1
: 1;
16102 unsigned CWG3PPS2
: 1;
16103 unsigned CWG3PPS3
: 1;
16104 unsigned CWG3PPS4
: 1;
16112 unsigned CWG3PPS
: 5;
16117 extern __at(0x0EB3) volatile __CWG3PPSbits_t CWG3PPSbits
;
16119 #define _CWG3PPS0 0x01
16120 #define _CWG3PPS1 0x02
16121 #define _CWG3PPS2 0x04
16122 #define _CWG3PPS3 0x08
16123 #define _CWG3PPS4 0x10
16125 //==============================================================================
16128 //==============================================================================
16131 extern __at(0x0EB8) __sfr MDCARLPPS
;
16137 unsigned MDCARLPPS0
: 1;
16138 unsigned MDCARLPPS1
: 1;
16139 unsigned MDCARLPPS2
: 1;
16140 unsigned MDCARLPPS3
: 1;
16141 unsigned MDCARLPPS4
: 1;
16149 unsigned MDCARLPPS
: 5;
16152 } __MDCARLPPSbits_t
;
16154 extern __at(0x0EB8) volatile __MDCARLPPSbits_t MDCARLPPSbits
;
16156 #define _MDCARLPPS0 0x01
16157 #define _MDCARLPPS1 0x02
16158 #define _MDCARLPPS2 0x04
16159 #define _MDCARLPPS3 0x08
16160 #define _MDCARLPPS4 0x10
16162 //==============================================================================
16165 //==============================================================================
16168 extern __at(0x0EB9) __sfr MDCARHPPS
;
16174 unsigned MDCARHPPS0
: 1;
16175 unsigned MDCARHPPS1
: 1;
16176 unsigned MDCARHPPS2
: 1;
16177 unsigned MDCARHPPS3
: 1;
16178 unsigned MDCARHPPS4
: 1;
16186 unsigned MDCARHPPS
: 5;
16189 } __MDCARHPPSbits_t
;
16191 extern __at(0x0EB9) volatile __MDCARHPPSbits_t MDCARHPPSbits
;
16193 #define _MDCARHPPS0 0x01
16194 #define _MDCARHPPS1 0x02
16195 #define _MDCARHPPS2 0x04
16196 #define _MDCARHPPS3 0x08
16197 #define _MDCARHPPS4 0x10
16199 //==============================================================================
16202 //==============================================================================
16205 extern __at(0x0EBA) __sfr MDSRCPPS
;
16211 unsigned MDSRCPPS0
: 1;
16212 unsigned MDSRCPPS1
: 1;
16213 unsigned MDSRCPPS2
: 1;
16214 unsigned MDSRCPPS3
: 1;
16215 unsigned MDSRCPPS4
: 1;
16223 unsigned MDSRCPPS
: 5;
16226 } __MDSRCPPSbits_t
;
16228 extern __at(0x0EBA) volatile __MDSRCPPSbits_t MDSRCPPSbits
;
16230 #define _MDSRCPPS0 0x01
16231 #define _MDSRCPPS1 0x02
16232 #define _MDSRCPPS2 0x04
16233 #define _MDSRCPPS3 0x08
16234 #define _MDSRCPPS4 0x10
16236 //==============================================================================
16239 //==============================================================================
16242 extern __at(0x0EBB) __sfr CLCIN0PPS
;
16248 unsigned CLCIN0PPS0
: 1;
16249 unsigned CLCIN0PPS1
: 1;
16250 unsigned CLCIN0PPS2
: 1;
16251 unsigned CLCIN0PPS3
: 1;
16252 unsigned CLCIN0PPS4
: 1;
16260 unsigned CLCIN0PPS
: 5;
16263 } __CLCIN0PPSbits_t
;
16265 extern __at(0x0EBB) volatile __CLCIN0PPSbits_t CLCIN0PPSbits
;
16267 #define _CLCIN0PPS0 0x01
16268 #define _CLCIN0PPS1 0x02
16269 #define _CLCIN0PPS2 0x04
16270 #define _CLCIN0PPS3 0x08
16271 #define _CLCIN0PPS4 0x10
16273 //==============================================================================
16276 //==============================================================================
16279 extern __at(0x0EBC) __sfr CLCIN1PPS
;
16285 unsigned CLCIN1PPS0
: 1;
16286 unsigned CLCIN1PPS1
: 1;
16287 unsigned CLCIN1PPS2
: 1;
16288 unsigned CLCIN1PPS3
: 1;
16289 unsigned CLCIN1PPS4
: 1;
16297 unsigned CLCIN1PPS
: 5;
16300 } __CLCIN1PPSbits_t
;
16302 extern __at(0x0EBC) volatile __CLCIN1PPSbits_t CLCIN1PPSbits
;
16304 #define _CLCIN1PPS0 0x01
16305 #define _CLCIN1PPS1 0x02
16306 #define _CLCIN1PPS2 0x04
16307 #define _CLCIN1PPS3 0x08
16308 #define _CLCIN1PPS4 0x10
16310 //==============================================================================
16313 //==============================================================================
16316 extern __at(0x0EBD) __sfr CLCIN2PPS
;
16322 unsigned CLCIN2PPS0
: 1;
16323 unsigned CLCIN2PPS1
: 1;
16324 unsigned CLCIN2PPS2
: 1;
16325 unsigned CLCIN2PPS3
: 1;
16326 unsigned CLCIN2PPS4
: 1;
16334 unsigned CLCIN2PPS
: 5;
16337 } __CLCIN2PPSbits_t
;
16339 extern __at(0x0EBD) volatile __CLCIN2PPSbits_t CLCIN2PPSbits
;
16341 #define _CLCIN2PPS0 0x01
16342 #define _CLCIN2PPS1 0x02
16343 #define _CLCIN2PPS2 0x04
16344 #define _CLCIN2PPS3 0x08
16345 #define _CLCIN2PPS4 0x10
16347 //==============================================================================
16350 //==============================================================================
16353 extern __at(0x0EBE) __sfr CLCIN3PPS
;
16359 unsigned CLCIN3PPS0
: 1;
16360 unsigned CLCIN3PPS1
: 1;
16361 unsigned CLCIN3PPS2
: 1;
16362 unsigned CLCIN3PPS3
: 1;
16363 unsigned CLCIN3PPS4
: 1;
16371 unsigned CLCIN3PPS
: 5;
16374 } __CLCIN3PPSbits_t
;
16376 extern __at(0x0EBE) volatile __CLCIN3PPSbits_t CLCIN3PPSbits
;
16378 #define _CLCIN3PPS0 0x01
16379 #define _CLCIN3PPS1 0x02
16380 #define _CLCIN3PPS2 0x04
16381 #define _CLCIN3PPS3 0x08
16382 #define _CLCIN3PPS4 0x10
16384 //==============================================================================
16387 //==============================================================================
16390 extern __at(0x0EC3) __sfr ADCACTPPS
;
16396 unsigned ADCACTPPS0
: 1;
16397 unsigned ADCACTPPS1
: 1;
16398 unsigned ADCACTPPS2
: 1;
16399 unsigned ADCACTPPS3
: 1;
16400 unsigned ADCACTPPS4
: 1;
16408 unsigned ADCACTPPS
: 5;
16411 } __ADCACTPPSbits_t
;
16413 extern __at(0x0EC3) volatile __ADCACTPPSbits_t ADCACTPPSbits
;
16415 #define _ADCACTPPS0 0x01
16416 #define _ADCACTPPS1 0x02
16417 #define _ADCACTPPS2 0x04
16418 #define _ADCACTPPS3 0x08
16419 #define _ADCACTPPS4 0x10
16421 //==============================================================================
16424 //==============================================================================
16427 extern __at(0x0EC5) __sfr SSP1CLKPPS
;
16433 unsigned SSP1CLKPPS0
: 1;
16434 unsigned SSP1CLKPPS1
: 1;
16435 unsigned SSP1CLKPPS2
: 1;
16436 unsigned SSP1CLKPPS3
: 1;
16437 unsigned SSP1CLKPPS4
: 1;
16445 unsigned SSP1CLKPPS
: 5;
16448 } __SSP1CLKPPSbits_t
;
16450 extern __at(0x0EC5) volatile __SSP1CLKPPSbits_t SSP1CLKPPSbits
;
16452 #define _SSP1CLKPPS0 0x01
16453 #define _SSP1CLKPPS1 0x02
16454 #define _SSP1CLKPPS2 0x04
16455 #define _SSP1CLKPPS3 0x08
16456 #define _SSP1CLKPPS4 0x10
16458 //==============================================================================
16461 //==============================================================================
16464 extern __at(0x0EC6) __sfr SSP1DATPPS
;
16470 unsigned SSP1DATPPS0
: 1;
16471 unsigned SSP1DATPPS1
: 1;
16472 unsigned SSP1DATPPS2
: 1;
16473 unsigned SSP1DATPPS3
: 1;
16474 unsigned SSP1DATPPS4
: 1;
16482 unsigned SSP1DATPPS
: 5;
16485 } __SSP1DATPPSbits_t
;
16487 extern __at(0x0EC6) volatile __SSP1DATPPSbits_t SSP1DATPPSbits
;
16489 #define _SSP1DATPPS0 0x01
16490 #define _SSP1DATPPS1 0x02
16491 #define _SSP1DATPPS2 0x04
16492 #define _SSP1DATPPS3 0x08
16493 #define _SSP1DATPPS4 0x10
16495 //==============================================================================
16498 //==============================================================================
16501 extern __at(0x0EC7) __sfr SSP1SSPPS
;
16507 unsigned SSP1SSPPS0
: 1;
16508 unsigned SSP1SSPPS1
: 1;
16509 unsigned SSP1SSPPS2
: 1;
16510 unsigned SSP1SSPPS3
: 1;
16511 unsigned SSP1SSPPS4
: 1;
16519 unsigned SSP1SSPPS
: 5;
16522 } __SSP1SSPPSbits_t
;
16524 extern __at(0x0EC7) volatile __SSP1SSPPSbits_t SSP1SSPPSbits
;
16526 #define _SSP1SSPPS0 0x01
16527 #define _SSP1SSPPS1 0x02
16528 #define _SSP1SSPPS2 0x04
16529 #define _SSP1SSPPS3 0x08
16530 #define _SSP1SSPPS4 0x10
16532 //==============================================================================
16535 //==============================================================================
16538 extern __at(0x0EC8) __sfr SSP2CLKPPS
;
16544 unsigned SSP2CLKPPS0
: 1;
16545 unsigned SSP2CLKPPS1
: 1;
16546 unsigned SSP2CLKPPS2
: 1;
16547 unsigned SSP2CLKPPS3
: 1;
16548 unsigned SSP2CLKPPS4
: 1;
16556 unsigned SSP2CLKPPS
: 5;
16559 } __SSP2CLKPPSbits_t
;
16561 extern __at(0x0EC8) volatile __SSP2CLKPPSbits_t SSP2CLKPPSbits
;
16563 #define _SSP2CLKPPS0 0x01
16564 #define _SSP2CLKPPS1 0x02
16565 #define _SSP2CLKPPS2 0x04
16566 #define _SSP2CLKPPS3 0x08
16567 #define _SSP2CLKPPS4 0x10
16569 //==============================================================================
16572 //==============================================================================
16575 extern __at(0x0EC9) __sfr SSP2DATPPS
;
16581 unsigned SSP2DATPPS0
: 1;
16582 unsigned SSP2DATPPS1
: 1;
16583 unsigned SSP2DATPPS2
: 1;
16584 unsigned SSP2DATPPS3
: 1;
16585 unsigned SSP2DATPPS4
: 1;
16593 unsigned SSP2DATPPS
: 5;
16596 } __SSP2DATPPSbits_t
;
16598 extern __at(0x0EC9) volatile __SSP2DATPPSbits_t SSP2DATPPSbits
;
16600 #define _SSP2DATPPS0 0x01
16601 #define _SSP2DATPPS1 0x02
16602 #define _SSP2DATPPS2 0x04
16603 #define _SSP2DATPPS3 0x08
16604 #define _SSP2DATPPS4 0x10
16606 //==============================================================================
16609 //==============================================================================
16612 extern __at(0x0ECA) __sfr SSP2SSPPS
;
16618 unsigned SSP2SSPPS0
: 1;
16619 unsigned SSP2SSPPS1
: 1;
16620 unsigned SSP2SSPPS2
: 1;
16621 unsigned SSP2SSPPS3
: 1;
16622 unsigned SSP2SSPPS4
: 1;
16630 unsigned SSP2SSPPS
: 5;
16633 } __SSP2SSPPSbits_t
;
16635 extern __at(0x0ECA) volatile __SSP2SSPPSbits_t SSP2SSPPSbits
;
16637 #define _SSP2SSPPS0 0x01
16638 #define _SSP2SSPPS1 0x02
16639 #define _SSP2SSPPS2 0x04
16640 #define _SSP2SSPPS3 0x08
16641 #define _SSP2SSPPS4 0x10
16643 //==============================================================================
16646 //==============================================================================
16649 extern __at(0x0ECB) __sfr RXPPS
;
16655 unsigned RXPPS0
: 1;
16656 unsigned RXPPS1
: 1;
16657 unsigned RXPPS2
: 1;
16658 unsigned RXPPS3
: 1;
16659 unsigned RXPPS4
: 1;
16667 unsigned RXPPS
: 5;
16672 extern __at(0x0ECB) volatile __RXPPSbits_t RXPPSbits
;
16674 #define _RXPPS0 0x01
16675 #define _RXPPS1 0x02
16676 #define _RXPPS2 0x04
16677 #define _RXPPS3 0x08
16678 #define _RXPPS4 0x10
16680 //==============================================================================
16683 //==============================================================================
16686 extern __at(0x0ECC) __sfr TXPPS
;
16692 unsigned TXPPS0
: 1;
16693 unsigned TXPPS1
: 1;
16694 unsigned TXPPS2
: 1;
16695 unsigned TXPPS3
: 1;
16696 unsigned TXPPS4
: 1;
16704 unsigned TXPPS
: 5;
16709 extern __at(0x0ECC) volatile __TXPPSbits_t TXPPSbits
;
16711 #define _TXPPS0 0x01
16712 #define _TXPPS1 0x02
16713 #define _TXPPS2 0x04
16714 #define _TXPPS3 0x08
16715 #define _TXPPS4 0x10
16717 //==============================================================================
16720 //==============================================================================
16723 extern __at(0x0F10) __sfr RA0PPS
;
16729 unsigned RA0PPS0
: 1;
16730 unsigned RA0PPS1
: 1;
16731 unsigned RA0PPS2
: 1;
16732 unsigned RA0PPS3
: 1;
16733 unsigned RA0PPS4
: 1;
16734 unsigned RA0PPS5
: 1;
16741 unsigned RA0PPS
: 6;
16746 extern __at(0x0F10) volatile __RA0PPSbits_t RA0PPSbits
;
16748 #define _RA0PPS0 0x01
16749 #define _RA0PPS1 0x02
16750 #define _RA0PPS2 0x04
16751 #define _RA0PPS3 0x08
16752 #define _RA0PPS4 0x10
16753 #define _RA0PPS5 0x20
16755 //==============================================================================
16758 //==============================================================================
16761 extern __at(0x0F11) __sfr RA1PPS
;
16767 unsigned RA1PPS0
: 1;
16768 unsigned RA1PPS1
: 1;
16769 unsigned RA1PPS2
: 1;
16770 unsigned RA1PPS3
: 1;
16771 unsigned RA1PPS4
: 1;
16772 unsigned RA1PPS5
: 1;
16779 unsigned RA1PPS
: 6;
16784 extern __at(0x0F11) volatile __RA1PPSbits_t RA1PPSbits
;
16786 #define _RA1PPS0 0x01
16787 #define _RA1PPS1 0x02
16788 #define _RA1PPS2 0x04
16789 #define _RA1PPS3 0x08
16790 #define _RA1PPS4 0x10
16791 #define _RA1PPS5 0x20
16793 //==============================================================================
16796 //==============================================================================
16799 extern __at(0x0F12) __sfr RA2PPS
;
16805 unsigned RA2PPS0
: 1;
16806 unsigned RA2PPS1
: 1;
16807 unsigned RA2PPS2
: 1;
16808 unsigned RA2PPS3
: 1;
16809 unsigned RA2PPS4
: 1;
16810 unsigned RA2PPS5
: 1;
16817 unsigned RA2PPS
: 6;
16822 extern __at(0x0F12) volatile __RA2PPSbits_t RA2PPSbits
;
16824 #define _RA2PPS0 0x01
16825 #define _RA2PPS1 0x02
16826 #define _RA2PPS2 0x04
16827 #define _RA2PPS3 0x08
16828 #define _RA2PPS4 0x10
16829 #define _RA2PPS5 0x20
16831 //==============================================================================
16834 //==============================================================================
16837 extern __at(0x0F13) __sfr RA3PPS
;
16843 unsigned RA3PPS0
: 1;
16844 unsigned RA3PPS1
: 1;
16845 unsigned RA3PPS2
: 1;
16846 unsigned RA3PPS3
: 1;
16847 unsigned RA3PPS4
: 1;
16848 unsigned RA3PPS5
: 1;
16855 unsigned RA3PPS
: 6;
16860 extern __at(0x0F13) volatile __RA3PPSbits_t RA3PPSbits
;
16862 #define _RA3PPS0 0x01
16863 #define _RA3PPS1 0x02
16864 #define _RA3PPS2 0x04
16865 #define _RA3PPS3 0x08
16866 #define _RA3PPS4 0x10
16867 #define _RA3PPS5 0x20
16869 //==============================================================================
16872 //==============================================================================
16875 extern __at(0x0F14) __sfr RA4PPS
;
16881 unsigned RA4PPS0
: 1;
16882 unsigned RA4PPS1
: 1;
16883 unsigned RA4PPS2
: 1;
16884 unsigned RA4PPS3
: 1;
16885 unsigned RA4PPS4
: 1;
16886 unsigned RA4PPS5
: 1;
16893 unsigned RA4PPS
: 6;
16898 extern __at(0x0F14) volatile __RA4PPSbits_t RA4PPSbits
;
16900 #define _RA4PPS0 0x01
16901 #define _RA4PPS1 0x02
16902 #define _RA4PPS2 0x04
16903 #define _RA4PPS3 0x08
16904 #define _RA4PPS4 0x10
16905 #define _RA4PPS5 0x20
16907 //==============================================================================
16910 //==============================================================================
16913 extern __at(0x0F15) __sfr RA5PPS
;
16919 unsigned RA5PPS0
: 1;
16920 unsigned RA5PPS1
: 1;
16921 unsigned RA5PPS2
: 1;
16922 unsigned RA5PPS3
: 1;
16923 unsigned RA5PPS4
: 1;
16924 unsigned RA5PPS5
: 1;
16931 unsigned RA5PPS
: 6;
16936 extern __at(0x0F15) volatile __RA5PPSbits_t RA5PPSbits
;
16938 #define _RA5PPS0 0x01
16939 #define _RA5PPS1 0x02
16940 #define _RA5PPS2 0x04
16941 #define _RA5PPS3 0x08
16942 #define _RA5PPS4 0x10
16943 #define _RA5PPS5 0x20
16945 //==============================================================================
16948 //==============================================================================
16951 extern __at(0x0F16) __sfr RA6PPS
;
16957 unsigned RA6PPS0
: 1;
16958 unsigned RA6PPS1
: 1;
16959 unsigned RA6PPS2
: 1;
16960 unsigned RA6PPS3
: 1;
16961 unsigned RA6PPS4
: 1;
16962 unsigned RA6PPS5
: 1;
16969 unsigned RA6PPS
: 6;
16974 extern __at(0x0F16) volatile __RA6PPSbits_t RA6PPSbits
;
16976 #define _RA6PPS0 0x01
16977 #define _RA6PPS1 0x02
16978 #define _RA6PPS2 0x04
16979 #define _RA6PPS3 0x08
16980 #define _RA6PPS4 0x10
16981 #define _RA6PPS5 0x20
16983 //==============================================================================
16986 //==============================================================================
16989 extern __at(0x0F17) __sfr RA7PPS
;
16995 unsigned RA7PPS0
: 1;
16996 unsigned RA7PPS1
: 1;
16997 unsigned RA7PPS2
: 1;
16998 unsigned RA7PPS3
: 1;
16999 unsigned RA7PPS4
: 1;
17000 unsigned RA7PPS5
: 1;
17007 unsigned RA7PPS
: 6;
17012 extern __at(0x0F17) volatile __RA7PPSbits_t RA7PPSbits
;
17014 #define _RA7PPS0 0x01
17015 #define _RA7PPS1 0x02
17016 #define _RA7PPS2 0x04
17017 #define _RA7PPS3 0x08
17018 #define _RA7PPS4 0x10
17019 #define _RA7PPS5 0x20
17021 //==============================================================================
17024 //==============================================================================
17027 extern __at(0x0F18) __sfr RB0PPS
;
17033 unsigned RB0PPS0
: 1;
17034 unsigned RB0PPS1
: 1;
17035 unsigned RB0PPS2
: 1;
17036 unsigned RB0PPS3
: 1;
17037 unsigned RB0PPS4
: 1;
17038 unsigned RB0PPS5
: 1;
17045 unsigned RB0PPS
: 6;
17050 extern __at(0x0F18) volatile __RB0PPSbits_t RB0PPSbits
;
17052 #define _RB0PPS0 0x01
17053 #define _RB0PPS1 0x02
17054 #define _RB0PPS2 0x04
17055 #define _RB0PPS3 0x08
17056 #define _RB0PPS4 0x10
17057 #define _RB0PPS5 0x20
17059 //==============================================================================
17062 //==============================================================================
17065 extern __at(0x0F19) __sfr RB1PPS
;
17071 unsigned RB1PPS0
: 1;
17072 unsigned RB1PPS1
: 1;
17073 unsigned RB1PPS2
: 1;
17074 unsigned RB1PPS3
: 1;
17075 unsigned RB1PPS4
: 1;
17076 unsigned RB1PPS5
: 1;
17083 unsigned RB1PPS
: 6;
17088 extern __at(0x0F19) volatile __RB1PPSbits_t RB1PPSbits
;
17090 #define _RB1PPS0 0x01
17091 #define _RB1PPS1 0x02
17092 #define _RB1PPS2 0x04
17093 #define _RB1PPS3 0x08
17094 #define _RB1PPS4 0x10
17095 #define _RB1PPS5 0x20
17097 //==============================================================================
17100 //==============================================================================
17103 extern __at(0x0F1A) __sfr RB2PPS
;
17109 unsigned RB2PPS0
: 1;
17110 unsigned RB2PPS1
: 1;
17111 unsigned RB2PPS2
: 1;
17112 unsigned RB2PPS3
: 1;
17113 unsigned RB2PPS4
: 1;
17114 unsigned RB2PPS5
: 1;
17121 unsigned RB2PPS
: 6;
17126 extern __at(0x0F1A) volatile __RB2PPSbits_t RB2PPSbits
;
17128 #define _RB2PPS0 0x01
17129 #define _RB2PPS1 0x02
17130 #define _RB2PPS2 0x04
17131 #define _RB2PPS3 0x08
17132 #define _RB2PPS4 0x10
17133 #define _RB2PPS5 0x20
17135 //==============================================================================
17138 //==============================================================================
17141 extern __at(0x0F1B) __sfr RB3PPS
;
17147 unsigned RB3PPS0
: 1;
17148 unsigned RB3PPS1
: 1;
17149 unsigned RB3PPS2
: 1;
17150 unsigned RB3PPS3
: 1;
17151 unsigned RB3PPS4
: 1;
17152 unsigned RB3PPS5
: 1;
17159 unsigned RB3PPS
: 6;
17164 extern __at(0x0F1B) volatile __RB3PPSbits_t RB3PPSbits
;
17166 #define _RB3PPS0 0x01
17167 #define _RB3PPS1 0x02
17168 #define _RB3PPS2 0x04
17169 #define _RB3PPS3 0x08
17170 #define _RB3PPS4 0x10
17171 #define _RB3PPS5 0x20
17173 //==============================================================================
17176 //==============================================================================
17179 extern __at(0x0F1C) __sfr RB4PPS
;
17185 unsigned RB4PPS0
: 1;
17186 unsigned RB4PPS1
: 1;
17187 unsigned RB4PPS2
: 1;
17188 unsigned RB4PPS3
: 1;
17189 unsigned RB4PPS4
: 1;
17190 unsigned RB4PPS5
: 1;
17197 unsigned RB4PPS
: 6;
17202 extern __at(0x0F1C) volatile __RB4PPSbits_t RB4PPSbits
;
17204 #define _RB4PPS0 0x01
17205 #define _RB4PPS1 0x02
17206 #define _RB4PPS2 0x04
17207 #define _RB4PPS3 0x08
17208 #define _RB4PPS4 0x10
17209 #define _RB4PPS5 0x20
17211 //==============================================================================
17214 //==============================================================================
17217 extern __at(0x0F1D) __sfr RB5PPS
;
17223 unsigned RB5PPS0
: 1;
17224 unsigned RB5PPS1
: 1;
17225 unsigned RB5PPS2
: 1;
17226 unsigned RB5PPS3
: 1;
17227 unsigned RB5PPS4
: 1;
17228 unsigned RB5PPS5
: 1;
17235 unsigned RB5PPS
: 6;
17240 extern __at(0x0F1D) volatile __RB5PPSbits_t RB5PPSbits
;
17242 #define _RB5PPS0 0x01
17243 #define _RB5PPS1 0x02
17244 #define _RB5PPS2 0x04
17245 #define _RB5PPS3 0x08
17246 #define _RB5PPS4 0x10
17247 #define _RB5PPS5 0x20
17249 //==============================================================================
17252 //==============================================================================
17255 extern __at(0x0F1E) __sfr RB6PPS
;
17261 unsigned RB6PPS0
: 1;
17262 unsigned RB6PPS1
: 1;
17263 unsigned RB6PPS2
: 1;
17264 unsigned RB6PPS3
: 1;
17265 unsigned RB6PPS4
: 1;
17266 unsigned RB6PPS5
: 1;
17273 unsigned RB6PPS
: 6;
17278 extern __at(0x0F1E) volatile __RB6PPSbits_t RB6PPSbits
;
17280 #define _RB6PPS0 0x01
17281 #define _RB6PPS1 0x02
17282 #define _RB6PPS2 0x04
17283 #define _RB6PPS3 0x08
17284 #define _RB6PPS4 0x10
17285 #define _RB6PPS5 0x20
17287 //==============================================================================
17290 //==============================================================================
17293 extern __at(0x0F1F) __sfr RB7PPS
;
17299 unsigned RB7PPS0
: 1;
17300 unsigned RB7PPS1
: 1;
17301 unsigned RB7PPS2
: 1;
17302 unsigned RB7PPS3
: 1;
17303 unsigned RB7PPS4
: 1;
17304 unsigned RB7PPS5
: 1;
17311 unsigned RB7PPS
: 6;
17316 extern __at(0x0F1F) volatile __RB7PPSbits_t RB7PPSbits
;
17318 #define _RB7PPS0 0x01
17319 #define _RB7PPS1 0x02
17320 #define _RB7PPS2 0x04
17321 #define _RB7PPS3 0x08
17322 #define _RB7PPS4 0x10
17323 #define _RB7PPS5 0x20
17325 //==============================================================================
17328 //==============================================================================
17331 extern __at(0x0F20) __sfr RC0PPS
;
17337 unsigned RC0PPS0
: 1;
17338 unsigned RC0PPS1
: 1;
17339 unsigned RC0PPS2
: 1;
17340 unsigned RC0PPS3
: 1;
17341 unsigned RC0PPS4
: 1;
17342 unsigned RC0PPS5
: 1;
17349 unsigned RC0PPS
: 6;
17354 extern __at(0x0F20) volatile __RC0PPSbits_t RC0PPSbits
;
17356 #define _RC0PPS0 0x01
17357 #define _RC0PPS1 0x02
17358 #define _RC0PPS2 0x04
17359 #define _RC0PPS3 0x08
17360 #define _RC0PPS4 0x10
17361 #define _RC0PPS5 0x20
17363 //==============================================================================
17366 //==============================================================================
17369 extern __at(0x0F21) __sfr RC1PPS
;
17375 unsigned RC1PPS0
: 1;
17376 unsigned RC1PPS1
: 1;
17377 unsigned RC1PPS2
: 1;
17378 unsigned RC1PPS3
: 1;
17379 unsigned RC1PPS4
: 1;
17380 unsigned RC1PPS5
: 1;
17387 unsigned RC1PPS
: 6;
17392 extern __at(0x0F21) volatile __RC1PPSbits_t RC1PPSbits
;
17394 #define _RC1PPS0 0x01
17395 #define _RC1PPS1 0x02
17396 #define _RC1PPS2 0x04
17397 #define _RC1PPS3 0x08
17398 #define _RC1PPS4 0x10
17399 #define _RC1PPS5 0x20
17401 //==============================================================================
17404 //==============================================================================
17407 extern __at(0x0F22) __sfr RC2PPS
;
17413 unsigned RC2PPS0
: 1;
17414 unsigned RC2PPS1
: 1;
17415 unsigned RC2PPS2
: 1;
17416 unsigned RC2PPS3
: 1;
17417 unsigned RC2PPS4
: 1;
17418 unsigned RC2PPS5
: 1;
17425 unsigned RC2PPS
: 6;
17430 extern __at(0x0F22) volatile __RC2PPSbits_t RC2PPSbits
;
17432 #define _RC2PPS0 0x01
17433 #define _RC2PPS1 0x02
17434 #define _RC2PPS2 0x04
17435 #define _RC2PPS3 0x08
17436 #define _RC2PPS4 0x10
17437 #define _RC2PPS5 0x20
17439 //==============================================================================
17442 //==============================================================================
17445 extern __at(0x0F23) __sfr RC3PPS
;
17451 unsigned RC3PPS0
: 1;
17452 unsigned RC3PPS1
: 1;
17453 unsigned RC3PPS2
: 1;
17454 unsigned RC3PPS3
: 1;
17455 unsigned RC3PPS4
: 1;
17456 unsigned RC3PPS5
: 1;
17463 unsigned RC3PPS
: 6;
17468 extern __at(0x0F23) volatile __RC3PPSbits_t RC3PPSbits
;
17470 #define _RC3PPS0 0x01
17471 #define _RC3PPS1 0x02
17472 #define _RC3PPS2 0x04
17473 #define _RC3PPS3 0x08
17474 #define _RC3PPS4 0x10
17475 #define _RC3PPS5 0x20
17477 //==============================================================================
17480 //==============================================================================
17483 extern __at(0x0F24) __sfr RC4PPS
;
17489 unsigned RC4PPS0
: 1;
17490 unsigned RC4PPS1
: 1;
17491 unsigned RC4PPS2
: 1;
17492 unsigned RC4PPS3
: 1;
17493 unsigned RC4PPS4
: 1;
17494 unsigned RC4PPS5
: 1;
17501 unsigned RC4PPS
: 6;
17506 extern __at(0x0F24) volatile __RC4PPSbits_t RC4PPSbits
;
17508 #define _RC4PPS0 0x01
17509 #define _RC4PPS1 0x02
17510 #define _RC4PPS2 0x04
17511 #define _RC4PPS3 0x08
17512 #define _RC4PPS4 0x10
17513 #define _RC4PPS5 0x20
17515 //==============================================================================
17518 //==============================================================================
17521 extern __at(0x0F25) __sfr RC5PPS
;
17527 unsigned RC5PPS0
: 1;
17528 unsigned RC5PPS1
: 1;
17529 unsigned RC5PPS2
: 1;
17530 unsigned RC5PPS3
: 1;
17531 unsigned RC5PPS4
: 1;
17532 unsigned RC5PPS5
: 1;
17539 unsigned RC5PPS
: 6;
17544 extern __at(0x0F25) volatile __RC5PPSbits_t RC5PPSbits
;
17546 #define _RC5PPS0 0x01
17547 #define _RC5PPS1 0x02
17548 #define _RC5PPS2 0x04
17549 #define _RC5PPS3 0x08
17550 #define _RC5PPS4 0x10
17551 #define _RC5PPS5 0x20
17553 //==============================================================================
17556 //==============================================================================
17559 extern __at(0x0F26) __sfr RC6PPS
;
17565 unsigned RC6PPS0
: 1;
17566 unsigned RC6PPS1
: 1;
17567 unsigned RC6PPS2
: 1;
17568 unsigned RC6PPS3
: 1;
17569 unsigned RC6PPS4
: 1;
17570 unsigned RC6PPS5
: 1;
17577 unsigned RC6PPS
: 6;
17582 extern __at(0x0F26) volatile __RC6PPSbits_t RC6PPSbits
;
17584 #define _RC6PPS0 0x01
17585 #define _RC6PPS1 0x02
17586 #define _RC6PPS2 0x04
17587 #define _RC6PPS3 0x08
17588 #define _RC6PPS4 0x10
17589 #define _RC6PPS5 0x20
17591 //==============================================================================
17594 //==============================================================================
17597 extern __at(0x0F27) __sfr RC7PPS
;
17603 unsigned RC7PPS0
: 1;
17604 unsigned RC7PPS1
: 1;
17605 unsigned RC7PPS2
: 1;
17606 unsigned RC7PPS3
: 1;
17607 unsigned RC7PPS4
: 1;
17608 unsigned RC7PPS5
: 1;
17615 unsigned RC7PPS
: 6;
17620 extern __at(0x0F27) volatile __RC7PPSbits_t RC7PPSbits
;
17622 #define _RC7PPS0 0x01
17623 #define _RC7PPS1 0x02
17624 #define _RC7PPS2 0x04
17625 #define _RC7PPS3 0x08
17626 #define _RC7PPS4 0x10
17627 #define _RC7PPS5 0x20
17629 //==============================================================================
17632 //==============================================================================
17635 extern __at(0x0F38) __sfr ANSELA
;
17639 unsigned ANSA0
: 1;
17640 unsigned ANSA1
: 1;
17641 unsigned ANSA2
: 1;
17642 unsigned ANSA3
: 1;
17643 unsigned ANSA4
: 1;
17644 unsigned ANSA5
: 1;
17645 unsigned ANSA6
: 1;
17646 unsigned ANSA7
: 1;
17649 extern __at(0x0F38) volatile __ANSELAbits_t ANSELAbits
;
17651 #define _ANSA0 0x01
17652 #define _ANSA1 0x02
17653 #define _ANSA2 0x04
17654 #define _ANSA3 0x08
17655 #define _ANSA4 0x10
17656 #define _ANSA5 0x20
17657 #define _ANSA6 0x40
17658 #define _ANSA7 0x80
17660 //==============================================================================
17663 //==============================================================================
17666 extern __at(0x0F39) __sfr WPUA
;
17670 unsigned WPUA0
: 1;
17671 unsigned WPUA1
: 1;
17672 unsigned WPUA2
: 1;
17673 unsigned WPUA3
: 1;
17674 unsigned WPUA4
: 1;
17675 unsigned WPUA5
: 1;
17676 unsigned WPUA6
: 1;
17677 unsigned WPUA7
: 1;
17680 extern __at(0x0F39) volatile __WPUAbits_t WPUAbits
;
17682 #define _WPUA0 0x01
17683 #define _WPUA1 0x02
17684 #define _WPUA2 0x04
17685 #define _WPUA3 0x08
17686 #define _WPUA4 0x10
17687 #define _WPUA5 0x20
17688 #define _WPUA6 0x40
17689 #define _WPUA7 0x80
17691 //==============================================================================
17694 //==============================================================================
17697 extern __at(0x0F3A) __sfr ODCONA
;
17701 unsigned ODCA0
: 1;
17702 unsigned ODCA1
: 1;
17703 unsigned ODCA2
: 1;
17704 unsigned ODCA3
: 1;
17705 unsigned ODCA4
: 1;
17706 unsigned ODCA5
: 1;
17707 unsigned ODCA6
: 1;
17708 unsigned ODCA7
: 1;
17711 extern __at(0x0F3A) volatile __ODCONAbits_t ODCONAbits
;
17713 #define _ODCA0 0x01
17714 #define _ODCA1 0x02
17715 #define _ODCA2 0x04
17716 #define _ODCA3 0x08
17717 #define _ODCA4 0x10
17718 #define _ODCA5 0x20
17719 #define _ODCA6 0x40
17720 #define _ODCA7 0x80
17722 //==============================================================================
17725 //==============================================================================
17728 extern __at(0x0F3B) __sfr SLRCONA
;
17732 unsigned SLRA0
: 1;
17733 unsigned SLRA1
: 1;
17734 unsigned SLRA2
: 1;
17735 unsigned SLRA3
: 1;
17736 unsigned SLRA4
: 1;
17737 unsigned SLRA5
: 1;
17738 unsigned SLRA6
: 1;
17739 unsigned SLRA7
: 1;
17742 extern __at(0x0F3B) volatile __SLRCONAbits_t SLRCONAbits
;
17744 #define _SLRA0 0x01
17745 #define _SLRA1 0x02
17746 #define _SLRA2 0x04
17747 #define _SLRA3 0x08
17748 #define _SLRA4 0x10
17749 #define _SLRA5 0x20
17750 #define _SLRA6 0x40
17751 #define _SLRA7 0x80
17753 //==============================================================================
17756 //==============================================================================
17759 extern __at(0x0F3C) __sfr INLVLA
;
17763 unsigned INLVLA0
: 1;
17764 unsigned INLVLA1
: 1;
17765 unsigned INLVLA2
: 1;
17766 unsigned INLVLA3
: 1;
17767 unsigned INLVLA4
: 1;
17768 unsigned INLVLA5
: 1;
17769 unsigned INLVLA6
: 1;
17770 unsigned INLVLA7
: 1;
17773 extern __at(0x0F3C) volatile __INLVLAbits_t INLVLAbits
;
17775 #define _INLVLA0 0x01
17776 #define _INLVLA1 0x02
17777 #define _INLVLA2 0x04
17778 #define _INLVLA3 0x08
17779 #define _INLVLA4 0x10
17780 #define _INLVLA5 0x20
17781 #define _INLVLA6 0x40
17782 #define _INLVLA7 0x80
17784 //==============================================================================
17787 //==============================================================================
17790 extern __at(0x0F3D) __sfr IOCAP
;
17794 unsigned IOCAP0
: 1;
17795 unsigned IOCAP1
: 1;
17796 unsigned IOCAP2
: 1;
17797 unsigned IOCAP3
: 1;
17798 unsigned IOCAP4
: 1;
17799 unsigned IOCAP5
: 1;
17800 unsigned IOCAP6
: 1;
17801 unsigned IOCAP7
: 1;
17804 extern __at(0x0F3D) volatile __IOCAPbits_t IOCAPbits
;
17806 #define _IOCAP0 0x01
17807 #define _IOCAP1 0x02
17808 #define _IOCAP2 0x04
17809 #define _IOCAP3 0x08
17810 #define _IOCAP4 0x10
17811 #define _IOCAP5 0x20
17812 #define _IOCAP6 0x40
17813 #define _IOCAP7 0x80
17815 //==============================================================================
17818 //==============================================================================
17821 extern __at(0x0F3E) __sfr IOCAN
;
17825 unsigned IOCAN0
: 1;
17826 unsigned IOCAN1
: 1;
17827 unsigned IOCAN2
: 1;
17828 unsigned IOCAN3
: 1;
17829 unsigned IOCAN4
: 1;
17830 unsigned IOCAN5
: 1;
17831 unsigned IOCAN6
: 1;
17832 unsigned IOCAN7
: 1;
17835 extern __at(0x0F3E) volatile __IOCANbits_t IOCANbits
;
17837 #define _IOCAN0 0x01
17838 #define _IOCAN1 0x02
17839 #define _IOCAN2 0x04
17840 #define _IOCAN3 0x08
17841 #define _IOCAN4 0x10
17842 #define _IOCAN5 0x20
17843 #define _IOCAN6 0x40
17844 #define _IOCAN7 0x80
17846 //==============================================================================
17849 //==============================================================================
17852 extern __at(0x0F3F) __sfr IOCAF
;
17856 unsigned IOCAF0
: 1;
17857 unsigned IOCAF1
: 1;
17858 unsigned IOCAF2
: 1;
17859 unsigned IOCAF3
: 1;
17860 unsigned IOCAF4
: 1;
17861 unsigned IOCAF5
: 1;
17862 unsigned IOCAF6
: 1;
17863 unsigned IOCAF7
: 1;
17866 extern __at(0x0F3F) volatile __IOCAFbits_t IOCAFbits
;
17868 #define _IOCAF0 0x01
17869 #define _IOCAF1 0x02
17870 #define _IOCAF2 0x04
17871 #define _IOCAF3 0x08
17872 #define _IOCAF4 0x10
17873 #define _IOCAF5 0x20
17874 #define _IOCAF6 0x40
17875 #define _IOCAF7 0x80
17877 //==============================================================================
17880 //==============================================================================
17883 extern __at(0x0F40) __sfr CCDNA
;
17887 unsigned CCDNA0
: 1;
17888 unsigned CCDNA1
: 1;
17889 unsigned CCDNA2
: 1;
17890 unsigned CCDNA3
: 1;
17891 unsigned CCDNA4
: 1;
17892 unsigned CCDNA5
: 1;
17893 unsigned CCDNA6
: 1;
17894 unsigned CCDNA7
: 1;
17897 extern __at(0x0F40) volatile __CCDNAbits_t CCDNAbits
;
17899 #define _CCDNA0 0x01
17900 #define _CCDNA1 0x02
17901 #define _CCDNA2 0x04
17902 #define _CCDNA3 0x08
17903 #define _CCDNA4 0x10
17904 #define _CCDNA5 0x20
17905 #define _CCDNA6 0x40
17906 #define _CCDNA7 0x80
17908 //==============================================================================
17911 //==============================================================================
17914 extern __at(0x0F41) __sfr CCDPA
;
17918 unsigned CCDPA0
: 1;
17919 unsigned CCDPA1
: 1;
17920 unsigned CCDPA2
: 1;
17921 unsigned CCDPA3
: 1;
17922 unsigned CCDPA4
: 1;
17923 unsigned CCDPA5
: 1;
17924 unsigned CCDPA6
: 1;
17925 unsigned CCDPA7
: 1;
17928 extern __at(0x0F41) volatile __CCDPAbits_t CCDPAbits
;
17930 #define _CCDPA0 0x01
17931 #define _CCDPA1 0x02
17932 #define _CCDPA2 0x04
17933 #define _CCDPA3 0x08
17934 #define _CCDPA4 0x10
17935 #define _CCDPA5 0x20
17936 #define _CCDPA6 0x40
17937 #define _CCDPA7 0x80
17939 //==============================================================================
17942 //==============================================================================
17945 extern __at(0x0F43) __sfr ANSELB
;
17949 unsigned ANSB0
: 1;
17950 unsigned ANSB1
: 1;
17951 unsigned ANSB2
: 1;
17952 unsigned ANSB3
: 1;
17953 unsigned ANSB4
: 1;
17954 unsigned ANSB5
: 1;
17955 unsigned ANSB6
: 1;
17956 unsigned ANSB7
: 1;
17959 extern __at(0x0F43) volatile __ANSELBbits_t ANSELBbits
;
17961 #define _ANSB0 0x01
17962 #define _ANSB1 0x02
17963 #define _ANSB2 0x04
17964 #define _ANSB3 0x08
17965 #define _ANSB4 0x10
17966 #define _ANSB5 0x20
17967 #define _ANSB6 0x40
17968 #define _ANSB7 0x80
17970 //==============================================================================
17973 //==============================================================================
17976 extern __at(0x0F44) __sfr WPUB
;
17980 unsigned WPUB0
: 1;
17981 unsigned WPUB1
: 1;
17982 unsigned WPUB2
: 1;
17983 unsigned WPUB3
: 1;
17984 unsigned WPUB4
: 1;
17985 unsigned WPUB5
: 1;
17986 unsigned WPUB6
: 1;
17987 unsigned WPUB7
: 1;
17990 extern __at(0x0F44) volatile __WPUBbits_t WPUBbits
;
17992 #define _WPUB0 0x01
17993 #define _WPUB1 0x02
17994 #define _WPUB2 0x04
17995 #define _WPUB3 0x08
17996 #define _WPUB4 0x10
17997 #define _WPUB5 0x20
17998 #define _WPUB6 0x40
17999 #define _WPUB7 0x80
18001 //==============================================================================
18004 //==============================================================================
18007 extern __at(0x0F45) __sfr ODCONB
;
18011 unsigned ODCB0
: 1;
18012 unsigned ODCB1
: 1;
18013 unsigned ODCB2
: 1;
18014 unsigned ODCB3
: 1;
18015 unsigned ODCB4
: 1;
18016 unsigned ODCB5
: 1;
18017 unsigned ODCB6
: 1;
18018 unsigned ODCB7
: 1;
18021 extern __at(0x0F45) volatile __ODCONBbits_t ODCONBbits
;
18023 #define _ODCB0 0x01
18024 #define _ODCB1 0x02
18025 #define _ODCB2 0x04
18026 #define _ODCB3 0x08
18027 #define _ODCB4 0x10
18028 #define _ODCB5 0x20
18029 #define _ODCB6 0x40
18030 #define _ODCB7 0x80
18032 //==============================================================================
18035 //==============================================================================
18038 extern __at(0x0F46) __sfr SLRCONB
;
18042 unsigned SLRB0
: 1;
18043 unsigned SLRB1
: 1;
18044 unsigned SLRB2
: 1;
18045 unsigned SLRB3
: 1;
18046 unsigned SLRB4
: 1;
18047 unsigned SLRB5
: 1;
18048 unsigned SLRB6
: 1;
18049 unsigned SLRB7
: 1;
18052 extern __at(0x0F46) volatile __SLRCONBbits_t SLRCONBbits
;
18054 #define _SLRB0 0x01
18055 #define _SLRB1 0x02
18056 #define _SLRB2 0x04
18057 #define _SLRB3 0x08
18058 #define _SLRB4 0x10
18059 #define _SLRB5 0x20
18060 #define _SLRB6 0x40
18061 #define _SLRB7 0x80
18063 //==============================================================================
18066 //==============================================================================
18069 extern __at(0x0F47) __sfr INLVLB
;
18073 unsigned INLVLB0
: 1;
18074 unsigned INLVLB1
: 1;
18075 unsigned INLVLB2
: 1;
18076 unsigned INLVLB3
: 1;
18077 unsigned INLVLB4
: 1;
18078 unsigned INLVLB5
: 1;
18079 unsigned INLVLB6
: 1;
18080 unsigned INLVLB7
: 1;
18083 extern __at(0x0F47) volatile __INLVLBbits_t INLVLBbits
;
18085 #define _INLVLB0 0x01
18086 #define _INLVLB1 0x02
18087 #define _INLVLB2 0x04
18088 #define _INLVLB3 0x08
18089 #define _INLVLB4 0x10
18090 #define _INLVLB5 0x20
18091 #define _INLVLB6 0x40
18092 #define _INLVLB7 0x80
18094 //==============================================================================
18097 //==============================================================================
18100 extern __at(0x0F48) __sfr IOCBP
;
18104 unsigned IOCBP0
: 1;
18105 unsigned IOCBP1
: 1;
18106 unsigned IOCBP2
: 1;
18107 unsigned IOCBP3
: 1;
18108 unsigned IOCBP4
: 1;
18109 unsigned IOCBP5
: 1;
18110 unsigned IOCBP6
: 1;
18111 unsigned IOCBP7
: 1;
18114 extern __at(0x0F48) volatile __IOCBPbits_t IOCBPbits
;
18116 #define _IOCBP0 0x01
18117 #define _IOCBP1 0x02
18118 #define _IOCBP2 0x04
18119 #define _IOCBP3 0x08
18120 #define _IOCBP4 0x10
18121 #define _IOCBP5 0x20
18122 #define _IOCBP6 0x40
18123 #define _IOCBP7 0x80
18125 //==============================================================================
18128 //==============================================================================
18131 extern __at(0x0F49) __sfr IOCBN
;
18135 unsigned IOCBN0
: 1;
18136 unsigned IOCBN1
: 1;
18137 unsigned IOCBN2
: 1;
18138 unsigned IOCBN3
: 1;
18139 unsigned IOCBN4
: 1;
18140 unsigned IOCBN5
: 1;
18141 unsigned IOCBN6
: 1;
18142 unsigned IOCBN7
: 1;
18145 extern __at(0x0F49) volatile __IOCBNbits_t IOCBNbits
;
18147 #define _IOCBN0 0x01
18148 #define _IOCBN1 0x02
18149 #define _IOCBN2 0x04
18150 #define _IOCBN3 0x08
18151 #define _IOCBN4 0x10
18152 #define _IOCBN5 0x20
18153 #define _IOCBN6 0x40
18154 #define _IOCBN7 0x80
18156 //==============================================================================
18159 //==============================================================================
18162 extern __at(0x0F4A) __sfr IOCBF
;
18166 unsigned IOCBF0
: 1;
18167 unsigned IOCBF1
: 1;
18168 unsigned IOCBF2
: 1;
18169 unsigned IOCBF3
: 1;
18170 unsigned IOCBF4
: 1;
18171 unsigned IOCBF5
: 1;
18172 unsigned IOCBF6
: 1;
18173 unsigned IOCBF7
: 1;
18176 extern __at(0x0F4A) volatile __IOCBFbits_t IOCBFbits
;
18178 #define _IOCBF0 0x01
18179 #define _IOCBF1 0x02
18180 #define _IOCBF2 0x04
18181 #define _IOCBF3 0x08
18182 #define _IOCBF4 0x10
18183 #define _IOCBF5 0x20
18184 #define _IOCBF6 0x40
18185 #define _IOCBF7 0x80
18187 //==============================================================================
18190 //==============================================================================
18193 extern __at(0x0F4B) __sfr CCDNB
;
18197 unsigned CCDNB0
: 1;
18198 unsigned CCDNB1
: 1;
18199 unsigned CCDNB2
: 1;
18200 unsigned CCDNB3
: 1;
18201 unsigned CCDNB4
: 1;
18202 unsigned CCDNB5
: 1;
18203 unsigned CCDNB6
: 1;
18204 unsigned CCDNB7
: 1;
18207 extern __at(0x0F4B) volatile __CCDNBbits_t CCDNBbits
;
18209 #define _CCDNB0 0x01
18210 #define _CCDNB1 0x02
18211 #define _CCDNB2 0x04
18212 #define _CCDNB3 0x08
18213 #define _CCDNB4 0x10
18214 #define _CCDNB5 0x20
18215 #define _CCDNB6 0x40
18216 #define _CCDNB7 0x80
18218 //==============================================================================
18221 //==============================================================================
18224 extern __at(0x0F4C) __sfr CCDPB
;
18228 unsigned CCDPB0
: 1;
18229 unsigned CCDPB1
: 1;
18230 unsigned CCDPB2
: 1;
18231 unsigned CCDPB3
: 1;
18232 unsigned CCDPB4
: 1;
18233 unsigned CCDPB5
: 1;
18234 unsigned CCDPB6
: 1;
18235 unsigned CCDPB7
: 1;
18238 extern __at(0x0F4C) volatile __CCDPBbits_t CCDPBbits
;
18240 #define _CCDPB0 0x01
18241 #define _CCDPB1 0x02
18242 #define _CCDPB2 0x04
18243 #define _CCDPB3 0x08
18244 #define _CCDPB4 0x10
18245 #define _CCDPB5 0x20
18246 #define _CCDPB6 0x40
18247 #define _CCDPB7 0x80
18249 //==============================================================================
18252 //==============================================================================
18255 extern __at(0x0F4E) __sfr ANSELC
;
18259 unsigned ANSC0
: 1;
18260 unsigned ANSC1
: 1;
18261 unsigned ANSC2
: 1;
18262 unsigned ANSC3
: 1;
18263 unsigned ANSC4
: 1;
18264 unsigned ANSC5
: 1;
18265 unsigned ANSC6
: 1;
18266 unsigned ANSC7
: 1;
18269 extern __at(0x0F4E) volatile __ANSELCbits_t ANSELCbits
;
18271 #define _ANSC0 0x01
18272 #define _ANSC1 0x02
18273 #define _ANSC2 0x04
18274 #define _ANSC3 0x08
18275 #define _ANSC4 0x10
18276 #define _ANSC5 0x20
18277 #define _ANSC6 0x40
18278 #define _ANSC7 0x80
18280 //==============================================================================
18283 //==============================================================================
18286 extern __at(0x0F4F) __sfr WPUC
;
18290 unsigned WPUC0
: 1;
18291 unsigned WPUC1
: 1;
18292 unsigned WPUC2
: 1;
18293 unsigned WPUC3
: 1;
18294 unsigned WPUC4
: 1;
18295 unsigned WPUC5
: 1;
18296 unsigned WPUC6
: 1;
18297 unsigned WPUC7
: 1;
18300 extern __at(0x0F4F) volatile __WPUCbits_t WPUCbits
;
18302 #define _WPUC0 0x01
18303 #define _WPUC1 0x02
18304 #define _WPUC2 0x04
18305 #define _WPUC3 0x08
18306 #define _WPUC4 0x10
18307 #define _WPUC5 0x20
18308 #define _WPUC6 0x40
18309 #define _WPUC7 0x80
18311 //==============================================================================
18314 //==============================================================================
18317 extern __at(0x0F50) __sfr ODCONC
;
18321 unsigned ODCC0
: 1;
18322 unsigned ODCC1
: 1;
18323 unsigned ODCC2
: 1;
18324 unsigned ODCC3
: 1;
18325 unsigned ODCC4
: 1;
18326 unsigned ODCC5
: 1;
18327 unsigned ODCC6
: 1;
18328 unsigned ODCC7
: 1;
18331 extern __at(0x0F50) volatile __ODCONCbits_t ODCONCbits
;
18333 #define _ODCC0 0x01
18334 #define _ODCC1 0x02
18335 #define _ODCC2 0x04
18336 #define _ODCC3 0x08
18337 #define _ODCC4 0x10
18338 #define _ODCC5 0x20
18339 #define _ODCC6 0x40
18340 #define _ODCC7 0x80
18342 //==============================================================================
18345 //==============================================================================
18348 extern __at(0x0F51) __sfr SLRCONC
;
18352 unsigned SLRC0
: 1;
18353 unsigned SLRC1
: 1;
18354 unsigned SLRC2
: 1;
18355 unsigned SLRC3
: 1;
18356 unsigned SLRC4
: 1;
18357 unsigned SLRC5
: 1;
18358 unsigned SLRC6
: 1;
18359 unsigned SLRC7
: 1;
18362 extern __at(0x0F51) volatile __SLRCONCbits_t SLRCONCbits
;
18364 #define _SLRC0 0x01
18365 #define _SLRC1 0x02
18366 #define _SLRC2 0x04
18367 #define _SLRC3 0x08
18368 #define _SLRC4 0x10
18369 #define _SLRC5 0x20
18370 #define _SLRC6 0x40
18371 #define _SLRC7 0x80
18373 //==============================================================================
18376 //==============================================================================
18379 extern __at(0x0F52) __sfr INLVLC
;
18383 unsigned INLVLC0
: 1;
18384 unsigned INLVLC1
: 1;
18385 unsigned INLVLC2
: 1;
18386 unsigned INLVLC3
: 1;
18387 unsigned INLVLC4
: 1;
18388 unsigned INLVLC5
: 1;
18389 unsigned INLVLC6
: 1;
18390 unsigned INLVLC7
: 1;
18393 extern __at(0x0F52) volatile __INLVLCbits_t INLVLCbits
;
18395 #define _INLVLC0 0x01
18396 #define _INLVLC1 0x02
18397 #define _INLVLC2 0x04
18398 #define _INLVLC3 0x08
18399 #define _INLVLC4 0x10
18400 #define _INLVLC5 0x20
18401 #define _INLVLC6 0x40
18402 #define _INLVLC7 0x80
18404 //==============================================================================
18407 //==============================================================================
18410 extern __at(0x0F53) __sfr IOCCP
;
18414 unsigned IOCCP0
: 1;
18415 unsigned IOCCP1
: 1;
18416 unsigned IOCCP2
: 1;
18417 unsigned IOCCP3
: 1;
18418 unsigned IOCCP4
: 1;
18419 unsigned IOCCP5
: 1;
18420 unsigned IOCCP6
: 1;
18421 unsigned IOCCP7
: 1;
18424 extern __at(0x0F53) volatile __IOCCPbits_t IOCCPbits
;
18426 #define _IOCCP0 0x01
18427 #define _IOCCP1 0x02
18428 #define _IOCCP2 0x04
18429 #define _IOCCP3 0x08
18430 #define _IOCCP4 0x10
18431 #define _IOCCP5 0x20
18432 #define _IOCCP6 0x40
18433 #define _IOCCP7 0x80
18435 //==============================================================================
18438 //==============================================================================
18441 extern __at(0x0F54) __sfr IOCCN
;
18445 unsigned IOCCN0
: 1;
18446 unsigned IOCCN1
: 1;
18447 unsigned IOCCN2
: 1;
18448 unsigned IOCCN3
: 1;
18449 unsigned IOCCN4
: 1;
18450 unsigned IOCCN5
: 1;
18451 unsigned IOCCN6
: 1;
18452 unsigned IOCCN7
: 1;
18455 extern __at(0x0F54) volatile __IOCCNbits_t IOCCNbits
;
18457 #define _IOCCN0 0x01
18458 #define _IOCCN1 0x02
18459 #define _IOCCN2 0x04
18460 #define _IOCCN3 0x08
18461 #define _IOCCN4 0x10
18462 #define _IOCCN5 0x20
18463 #define _IOCCN6 0x40
18464 #define _IOCCN7 0x80
18466 //==============================================================================
18469 //==============================================================================
18472 extern __at(0x0F55) __sfr IOCCF
;
18476 unsigned IOCCF0
: 1;
18477 unsigned IOCCF1
: 1;
18478 unsigned IOCCF2
: 1;
18479 unsigned IOCCF3
: 1;
18480 unsigned IOCCF4
: 1;
18481 unsigned IOCCF5
: 1;
18482 unsigned IOCCF6
: 1;
18483 unsigned IOCCF7
: 1;
18486 extern __at(0x0F55) volatile __IOCCFbits_t IOCCFbits
;
18488 #define _IOCCF0 0x01
18489 #define _IOCCF1 0x02
18490 #define _IOCCF2 0x04
18491 #define _IOCCF3 0x08
18492 #define _IOCCF4 0x10
18493 #define _IOCCF5 0x20
18494 #define _IOCCF6 0x40
18495 #define _IOCCF7 0x80
18497 //==============================================================================
18500 //==============================================================================
18503 extern __at(0x0F56) __sfr CCDNC
;
18507 unsigned CCDNC0
: 1;
18508 unsigned CCDNC1
: 1;
18509 unsigned CCDNC2
: 1;
18510 unsigned CCDNC3
: 1;
18511 unsigned CCDNC4
: 1;
18512 unsigned CCDNC5
: 1;
18513 unsigned CCDNC6
: 1;
18514 unsigned CCDNC7
: 1;
18517 extern __at(0x0F56) volatile __CCDNCbits_t CCDNCbits
;
18519 #define _CCDNC0 0x01
18520 #define _CCDNC1 0x02
18521 #define _CCDNC2 0x04
18522 #define _CCDNC3 0x08
18523 #define _CCDNC4 0x10
18524 #define _CCDNC5 0x20
18525 #define _CCDNC6 0x40
18526 #define _CCDNC7 0x80
18528 //==============================================================================
18531 //==============================================================================
18534 extern __at(0x0F57) __sfr CCDPC
;
18538 unsigned CCDPC0
: 1;
18539 unsigned CCDPC1
: 1;
18540 unsigned CCDPC2
: 1;
18541 unsigned CCDPC3
: 1;
18542 unsigned CCDPC4
: 1;
18543 unsigned CCDPC5
: 1;
18544 unsigned CCDPC6
: 1;
18545 unsigned CCDPC7
: 1;
18548 extern __at(0x0F57) volatile __CCDPCbits_t CCDPCbits
;
18550 #define _CCDPC0 0x01
18551 #define _CCDPC1 0x02
18552 #define _CCDPC2 0x04
18553 #define _CCDPC3 0x08
18554 #define _CCDPC4 0x10
18555 #define _CCDPC5 0x20
18556 #define _CCDPC6 0x40
18557 #define _CCDPC7 0x80
18559 //==============================================================================
18562 //==============================================================================
18565 extern __at(0x0F65) __sfr WPUE
;
18572 unsigned WPUE3
: 1;
18579 extern __at(0x0F65) volatile __WPUEbits_t WPUEbits
;
18581 #define _WPUE3 0x08
18583 //==============================================================================
18586 //==============================================================================
18589 extern __at(0x0F68) __sfr INLVLE
;
18596 unsigned INLVLE3
: 1;
18603 extern __at(0x0F68) volatile __INLVLEbits_t INLVLEbits
;
18605 #define _INLVLE3 0x08
18607 //==============================================================================
18610 //==============================================================================
18613 extern __at(0x0F69) __sfr IOCEP
;
18620 unsigned IOCEP3
: 1;
18627 extern __at(0x0F69) volatile __IOCEPbits_t IOCEPbits
;
18629 #define _IOCEP3 0x08
18631 //==============================================================================
18634 //==============================================================================
18637 extern __at(0x0F6A) __sfr IOCEN
;
18644 unsigned IOCEN3
: 1;
18651 extern __at(0x0F6A) volatile __IOCENbits_t IOCENbits
;
18653 #define _IOCEN3 0x08
18655 //==============================================================================
18658 //==============================================================================
18661 extern __at(0x0F6B) __sfr IOCEF
;
18668 unsigned IOCEF3
: 1;
18675 extern __at(0x0F6B) volatile __IOCEFbits_t IOCEFbits
;
18677 #define _IOCEF3 0x08
18679 //==============================================================================
18682 //==============================================================================
18683 // STATUS_SHAD Bits
18685 extern __at(0x0FE4) __sfr STATUS_SHAD
;
18689 unsigned C_SHAD
: 1;
18690 unsigned DC_SHAD
: 1;
18691 unsigned Z_SHAD
: 1;
18697 } __STATUS_SHADbits_t
;
18699 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
18701 #define _C_SHAD 0x01
18702 #define _DC_SHAD 0x02
18703 #define _Z_SHAD 0x04
18705 //==============================================================================
18707 extern __at(0x0FE5) __sfr WREG_SHAD
;
18708 extern __at(0x0FE6) __sfr BSR_SHAD
;
18709 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
18710 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
18711 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
18712 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
18713 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
18714 extern __at(0x0FED) __sfr STKPTR
;
18715 extern __at(0x0FEE) __sfr TOSL
;
18716 extern __at(0x0FEF) __sfr TOSH
;
18718 //==============================================================================
18720 // Configuration Bits
18722 //==============================================================================
18724 #define _CONFIG1 0x8007
18725 #define _CONFIG2 0x8008
18726 #define _CONFIG3 0x8009
18727 #define _CONFIG4 0x800A
18728 #define _CONFIG5 0x800B
18730 //----------------------------- CONFIG1 Options -------------------------------
18732 #define _FEXTOSC_LP 0x3FF8 // LP (crystal oscillator) optimized for 32.768kHz; PFM set to low power.
18733 #define _FEXTOSC_XT 0x3FF9 // XT (crystal oscillator) above 500kHz, below 4MHz; PFM set to medium power.
18734 #define _FEXTOSC_HS 0x3FFA // HS (crystal oscillator) above 4MHz; PFM set to high power.
18735 #define _FEXTOSC_Reserved 0x3FFB // Reserved.
18736 #define _FEXTOSC_OFF 0x3FFC // Oscillator not enabled.
18737 #define _FEXTOSC_ECL 0x3FFD // EC below 500kHz; PFM set to low power.
18738 #define _FEXTOSC_ECM 0x3FFE // EC for 500kHz to 8MHz; PFM set to medium power.
18739 #define _FEXTOSC_ECH 0x3FFF // EC above 8MHz; PFM set to high power.
18740 #define _RSTOSC_HFINT32 0x3F8F // HFINTOSC with OSCFRQ= 32 MHz and CDIV = 1:1.
18741 #define _RSTOSC_HFINTPLL 0x3F9F // HFINTOSC with 2x PLL, with OSCFRQ = 16 MHz and CDIV = 1:1 (FOSC = 32 MHz).
18742 #define _RSTOSC_EXT4X 0x3FAF // EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits.
18743 #define _RSTOSC_Reserved 0x3FBF // Reserved.
18744 #define _RSTOSC_SOSC 0x3FCF // SOSC.
18745 #define _RSTOSC_LFINT 0x3FDF // LFINTOSC.
18746 #define _RSTOSC_HFINT1 0x3FEF // HFINTOSC (1MHz).
18747 #define _RSTOSC_EXT1X 0x3FFF // EXTOSC operating per FEXTOSC bits.
18748 #define _CLKOUTEN_ON 0x3EFF // CLKOUT function is enabled; FOSC/4 clock appears at OSC2.
18749 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled; i/o or oscillator function on OSC2.
18750 #define _CSWEN_OFF 0x37FF // The NOSC and NDIV bits cannot be changed by user software.
18751 #define _CSWEN_ON 0x3FFF // Writing to NOSC and NDIV is allowed.
18752 #define _FCMEN_OFF 0x1FFF // FSCM timer disabled.
18753 #define _FCMEN_ON 0x3FFF // FSCM timer enabled.
18755 //----------------------------- CONFIG2 Options -------------------------------
18757 #define _MCLRE_OFF 0x3FFE // MCLR pin function is port defined function.
18758 #define _MCLRE_ON 0x3FFF // MCLR pin is Master Clear function.
18759 #define _PWRTE_ON 0x3FFD // PWRT enabled.
18760 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
18761 #define _LPBOREN_ON 0x3FDF // ULPBOR enabled.
18762 #define _LPBOREN_OFF 0x3FFF // ULPBOR disabled.
18763 #define _BOREN_OFF 0x3F3F // Brown-out reset disabled.
18764 #define _BOREN_SBOREN 0x3F7F // Brown-out reset enabled according to SBOREN bit.
18765 #define _BOREN_NSLEEP 0x3FBF // Brown-out Reset enabled while running, disabled in sleep; SBOREN is ignored.
18766 #define _BOREN_ON 0x3FFF // Brown-out Reset Enabled, SBOREN bit is ignored.
18767 #define _BORV_HI 0x3DFF // Brown-out Reset Voltage (VBOR) is set to 2.7V.
18768 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (VBOR) set to 1.9V on LF, and 2.45V on F Devices.
18769 #define _ZCD_OFF 0x3BFF // Zero-cross detect circuit is always enabled.
18770 #define _ZCD_ON 0x3FFF // Zero-cross detect circuit is disabled at POR.
18771 #define _ZCDDIS_OFF 0x3BFF // Zero-cross detect circuit is always enabled.
18772 #define _ZCDDIS_ON 0x3FFF // Zero-cross detect circuit is disabled at POR.
18773 #define _PPS1WAY_OFF 0x37FF // The PPSLOCK bit can be set and cleared repeatedly by software.
18774 #define _PPS1WAY_ON 0x3FFF // The PPSLOCK bit can be cleared and set only once in software.
18775 #define _STVREN_OFF 0x2FFF // Stack Overflow or Underflow will not cause a reset.
18776 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a reset.
18777 #define _DEBUG_ON 0x1FFF // Background debugger enabled; ICSPCLK and ICSPDAT are dedicated to the debugger.
18778 #define _DEBUG_OFF 0x3FFF // Background debugger disabled; ICSPCLK and ICSPDAT are general purpose I/O pins.
18780 //----------------------------- CONFIG3 Options -------------------------------
18782 #define _WDTCPS_WDTCPS_0 0x3FE0 // Divider ratio 1:32.
18783 #define _WDTCPS_WDTCPS_1 0x3FE1 // Divider ratio 1:64.
18784 #define _WDTCPS_WDTCPS_2 0x3FE2 // Divider ratio 1:128.
18785 #define _WDTCPS_WDTCPS_3 0x3FE3 // Divider ratio 1:256.
18786 #define _WDTCPS_WDTCPS_4 0x3FE4 // Divider ratio 1:512.
18787 #define _WDTCPS_WDTCPS_5 0x3FE5 // Divider ratio 1:1024.
18788 #define _WDTCPS_WDTCPS_6 0x3FE6 // Divider ratio 1:2048.
18789 #define _WDTCPS_WDTCPS_7 0x3FE7 // Divider ratio 1:4096.
18790 #define _WDTCPS_WDTCPS_8 0x3FE8 // Divider ratio 1:8192.
18791 #define _WDTCPS_WDTCPS_9 0x3FE9 // Divider ratio 1:16384.
18792 #define _WDTCPS_WDTCPS_10 0x3FEA // Divider ratio 1:32768.
18793 #define _WDTCPS_WDTCPS_11 0x3FEB // Divider ratio 1:65536.
18794 #define _WDTCPS_WDTCPS_12 0x3FEC // Divider ratio 1:131072.
18795 #define _WDTCPS_WDTCPS_13 0x3FED // Divider ratio 1:262144.
18796 #define _WDTCPS_WDTCPS_14 0x3FEE // Divider ratio 1:524299.
18797 #define _WDTCPS_WDTCPS_15 0x3FEF // Divider ratio 1:1048576.
18798 #define _WDTCPS_WDTCPS_16 0x3FF0 // Divider ratio 1:2097152.
18799 #define _WDTCPS_WDTCPS_17 0x3FF1 // Divider ratio 1:4194304.
18800 #define _WDTCPS_WDTCPS_18 0x3FF2 // Divider ratio 1:8388608.
18801 #define _WDTCPS_WDTCPS_19 0x3FF3 // Divider ratio 1:32.
18802 #define _WDTCPS_WDTCPS_20 0x3FF4 // Divider ratio 1:32.
18803 #define _WDTCPS_WDTCPS_21 0x3FF5 // Divider ratio 1:32.
18804 #define _WDTCPS_WDTCPS_22 0x3FF6 // Divider ratio 1:32.
18805 #define _WDTCPS_WDTCPS_23 0x3FF7 // Divider ratio 1:32.
18806 #define _WDTCPS_WDTCPS_24 0x3FF8 // Divider ratio 1:32.
18807 #define _WDTCPS_WDTCPS_25 0x3FF9 // Divider ratio 1:32.
18808 #define _WDTCPS_WDTCPS_26 0x3FFA // Divider ratio 1:32.
18809 #define _WDTCPS_WDTCPS_27 0x3FFB // Divider ratio 1:32.
18810 #define _WDTCPS_WDTCPS_28 0x3FFC // Divider ratio 1:32.
18811 #define _WDTCPS_WDTCPS_29 0x3FFD // Divider ratio 1:32.
18812 #define _WDTCPS_WDTCPS_30 0x3FFE // Divider ratio 1:32.
18813 #define _WDTCPS_WDTCPS_31 0x3FFF // Divider ratio 1:65536; software control of WDTPS.
18814 #define _WDTE_OFF 0x3F9F // WDT Disabled, SWDTEN is ignored.
18815 #define _WDTE_SWDTEN 0x3FBF // WDT enabled/disabled by SWDTEN bit in WDTCON0.
18816 #define _WDTE_NSLEEP 0x3FDF // WDT enabled while sleep=0, suspended when sleep=1; SWDTEN ignored.
18817 #define _WDTE_ON 0x3FFF // WDT enabled regardless of sleep; SWDTEN ignored.
18818 #define _WDTCWS_WDTCWS_0 0x38FF // window delay = 87.5 percent of time; no software control; keyed access required.
18819 #define _WDTCWS_WDTCWS_1 0x39FF // window delay = 75 percent of time; no software control; keyed access required.
18820 #define _WDTCWS_WDTCWS_2 0x3AFF // window delay = 62.5 percent of time; no software control; keyed access required.
18821 #define _WDTCWS_WDTCWS_3 0x3BFF // window delay = 50 percent of time; no software control; keyed access required.
18822 #define _WDTCWS_WDTCWS_4 0x3CFF // window delay = 37.5 percent of time; no software control; keyed access required.
18823 #define _WDTCWS_WDTCWS_5 0x3DFF // window delay = 25 percent of time; no software control; keyed access required.
18824 #define _WDTCWS_WDTCWS_6 0x3EFF // window always open (100%); no software control; keyed access required.
18825 #define _WDTCWS_WDTCWS_7 0x3FFF // window always open (100%); software control; keyed access not required.
18826 #define _WDTCCS_LFINTOSC 0x07FF // WDT reference clock is the 31.0kHz LFINTOSC output.
18827 #define _WDTCCS_HFINTOSC 0x0FFF // WDT reference clock is the 31.25 kHz HFINTOSC.
18828 #define _WDTCCS_SC 0x3FFF // Software Control.
18830 //----------------------------- CONFIG4 Options -------------------------------
18832 #define _WRT_ON 0x3FFC // 0x0000 to 0x1FFF write protected.
18833 #define _WRT_WRT_lower 0x3FFD // 0x0000 to x0FFF write protected.
18834 #define _WRT_WRT_upper 0x3FFE // 0x0000 to 0x01FF write protected.
18835 #define _WRT_OFF 0x3FFF // Write protection off.
18836 #define _SCANE_not_available 0x2FFF // Scanner module is not available for use.
18837 #define _SCANE_available 0x3FFF // Scanner module is available for use.
18838 #define _LVP_OFF 0x1FFF // High Voltage on MCLR/Vpp must be used for programming.
18839 #define _LVP_ON 0x3FFF // Low Voltage programming enabled. MCLR/Vpp pin function is MCLR.
18841 //----------------------------- CONFIG5 Options -------------------------------
18843 #define _CP_ON 0x3FFE // UserNVM code protection enabled.
18844 #define _CP_OFF 0x3FFF // UserNVM code protection disabled.
18845 #define _CPD_ON 0x3FFD // DataNVM code protection enabled.
18846 #define _CPD_OFF 0x3FFF // DataNVM code protection disabled.
18848 //==============================================================================
18850 #define _DEVID1 0x8006
18852 #define _IDLOC0 0x8000
18853 #define _IDLOC1 0x8001
18854 #define _IDLOC2 0x8002
18855 #define _IDLOC3 0x8003
18857 //==============================================================================
18859 #ifndef NO_BIT_DEFINES
18861 #define ADACC8 ADACCHbits.ADACC8 // bit 0
18862 #define ADACC9 ADACCHbits.ADACC9 // bit 1
18863 #define ADACC10 ADACCHbits.ADACC10 // bit 2
18864 #define ADACC11 ADACCHbits.ADACC11 // bit 3
18865 #define ADACC12 ADACCHbits.ADACC12 // bit 4
18866 #define ADACC13 ADACCHbits.ADACC13 // bit 5
18867 #define ADACC14 ADACCHbits.ADACC14 // bit 6
18868 #define ADACC15 ADACCHbits.ADACC15 // bit 7
18870 #define ADACC0 ADACCLbits.ADACC0 // bit 0
18871 #define ADACC1 ADACCLbits.ADACC1 // bit 1
18872 #define ADACC2 ADACCLbits.ADACC2 // bit 2
18873 #define ADACC3 ADACCLbits.ADACC3 // bit 3
18874 #define ADACC4 ADACCLbits.ADACC4 // bit 4
18875 #define ADACC5 ADACCLbits.ADACC5 // bit 5
18876 #define ADACC6 ADACCLbits.ADACC6 // bit 6
18877 #define ADACC7 ADACCLbits.ADACC7 // bit 7
18879 #define ADACQ0 ADACQbits.ADACQ0 // bit 0
18880 #define ADACQ1 ADACQbits.ADACQ1 // bit 1
18881 #define ADACQ2 ADACQbits.ADACQ2 // bit 2
18882 #define ADACQ3 ADACQbits.ADACQ3 // bit 3
18883 #define ADACQ4 ADACQbits.ADACQ4 // bit 4
18884 #define ADACQ5 ADACQbits.ADACQ5 // bit 5
18885 #define ADACQ6 ADACQbits.ADACQ6 // bit 6
18886 #define ADACQ7 ADACQbits.ADACQ7 // bit 7
18888 #define ADACT0 ADACTbits.ADACT0 // bit 0
18889 #define ADACT1 ADACTbits.ADACT1 // bit 1
18890 #define ADACT2 ADACTbits.ADACT2 // bit 2
18891 #define ADACT3 ADACTbits.ADACT3 // bit 3
18892 #define ADACT4 ADACTbits.ADACT4 // bit 4
18894 #define ADCACTPPS0 ADCACTPPSbits.ADCACTPPS0 // bit 0
18895 #define ADCACTPPS1 ADCACTPPSbits.ADCACTPPS1 // bit 1
18896 #define ADCACTPPS2 ADCACTPPSbits.ADCACTPPS2 // bit 2
18897 #define ADCACTPPS3 ADCACTPPSbits.ADCACTPPS3 // bit 3
18898 #define ADCACTPPS4 ADCACTPPSbits.ADCACTPPS4 // bit 4
18900 #define ADCAP0 ADCAPbits.ADCAP0 // bit 0
18901 #define ADCAP1 ADCAPbits.ADCAP1 // bit 1
18902 #define ADCAP2 ADCAPbits.ADCAP2 // bit 2
18903 #define ADCAP3 ADCAPbits.ADCAP3 // bit 3
18904 #define ADCAP4 ADCAPbits.ADCAP4 // bit 4
18906 #define ADCCS0 ADCLKbits.ADCCS0 // bit 0
18907 #define ADCCS1 ADCLKbits.ADCCS1 // bit 1
18908 #define ADCCS2 ADCLKbits.ADCCS2 // bit 2
18909 #define ADCCS3 ADCLKbits.ADCCS3 // bit 3
18910 #define ADCCS4 ADCLKbits.ADCCS4 // bit 4
18911 #define ADCCS5 ADCLKbits.ADCCS5 // bit 5
18913 #define ADCNT0 ADCNTbits.ADCNT0 // bit 0
18914 #define ADCNT1 ADCNTbits.ADCNT1 // bit 1
18915 #define ADCNT2 ADCNTbits.ADCNT2 // bit 2
18916 #define ADCNT3 ADCNTbits.ADCNT3 // bit 3
18917 #define ADCNT4 ADCNTbits.ADCNT4 // bit 4
18918 #define ADCNT5 ADCNTbits.ADCNT5 // bit 5
18919 #define ADCNT6 ADCNTbits.ADCNT6 // bit 6
18920 #define ADCNT7 ADCNTbits.ADCNT7 // bit 7
18922 #define ADGO ADCON0bits.ADGO // bit 0, shadows bit in ADCON0bits
18923 #define DONE ADCON0bits.DONE // bit 0, shadows bit in ADCON0bits
18924 #define NOT_DONE ADCON0bits.NOT_DONE // bit 0, shadows bit in ADCON0bits
18925 #define GO ADCON0bits.GO // bit 0, shadows bit in ADCON0bits
18926 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 0, shadows bit in ADCON0bits
18927 #define ADFM0 ADCON0bits.ADFM0 // bit 2
18928 #define ADFM1 ADCON0bits.ADFM1 // bit 3
18929 #define ADCS ADCON0bits.ADCS // bit 4
18930 #define ADCONT ADCON0bits.ADCONT // bit 6
18931 #define ADON ADCON0bits.ADON // bit 7
18933 #define ADDSEN ADCON1bits.ADDSEN // bit 0
18934 #define ADGPOL ADCON1bits.ADGPOL // bit 5
18935 #define ADIPEN ADCON1bits.ADIPEN // bit 6
18936 #define ADPPOL ADCON1bits.ADPPOL // bit 7
18938 #define ADMD0 ADCON2bits.ADMD0 // bit 0
18939 #define ADMD1 ADCON2bits.ADMD1 // bit 1
18940 #define ADMD2 ADCON2bits.ADMD2 // bit 2
18941 #define ADACLR ADCON2bits.ADACLR // bit 3
18942 #define ADCRS0 ADCON2bits.ADCRS0 // bit 4
18943 #define ADCRS1 ADCON2bits.ADCRS1 // bit 5
18944 #define ADCRS2 ADCON2bits.ADCRS2 // bit 6
18945 #define ADPSIS ADCON2bits.ADPSIS // bit 7
18947 #define ADTMD0 ADCON3bits.ADTMD0 // bit 0
18948 #define ADTMD1 ADCON3bits.ADTMD1 // bit 1
18949 #define ADTMD2 ADCON3bits.ADTMD2 // bit 2
18950 #define ADSOI ADCON3bits.ADSOI // bit 3
18951 #define ADCALC0 ADCON3bits.ADCALC0 // bit 4
18952 #define ADCALC1 ADCON3bits.ADCALC1 // bit 5
18953 #define ADCALC2 ADCON3bits.ADCALC2 // bit 6
18955 #define ADERR8 ADERRHbits.ADERR8 // bit 0
18956 #define ADERR9 ADERRHbits.ADERR9 // bit 1
18957 #define ADERR10 ADERRHbits.ADERR10 // bit 2
18958 #define ADERR11 ADERRHbits.ADERR11 // bit 3
18959 #define ADERR12 ADERRHbits.ADERR12 // bit 4
18960 #define ADERR13 ADERRHbits.ADERR13 // bit 5
18961 #define ADERR14 ADERRHbits.ADERR14 // bit 6
18962 #define ADERR15 ADERRHbits.ADERR15 // bit 7
18964 #define ADERR0 ADERRLbits.ADERR0 // bit 0
18965 #define ADERR1 ADERRLbits.ADERR1 // bit 1
18966 #define ADERR2 ADERRLbits.ADERR2 // bit 2
18967 #define ADERR3 ADERRLbits.ADERR3 // bit 3
18968 #define ADERR4 ADERRLbits.ADERR4 // bit 4
18969 #define ADERR5 ADERRLbits.ADERR5 // bit 5
18970 #define ADERR6 ADERRLbits.ADERR6 // bit 6
18971 #define ADERR7 ADERRLbits.ADERR7 // bit 7
18973 #define ADFLTR8 ADFLTRHbits.ADFLTR8 // bit 0
18974 #define ADFLTR9 ADFLTRHbits.ADFLTR9 // bit 1
18975 #define ADFLTR10 ADFLTRHbits.ADFLTR10 // bit 2
18976 #define ADFLTR11 ADFLTRHbits.ADFLTR11 // bit 3
18977 #define ADFLTR12 ADFLTRHbits.ADFLTR12 // bit 4
18978 #define ADFLTR13 ADFLTRHbits.ADFLTR13 // bit 5
18979 #define ADFLTR14 ADFLTRHbits.ADFLTR14 // bit 6
18980 #define ADFLTR15 ADFLTRHbits.ADFLTR15 // bit 7
18982 #define ADFLTR0 ADFLTRLbits.ADFLTR0 // bit 0
18983 #define ADFLTR1 ADFLTRLbits.ADFLTR1 // bit 1
18984 #define ADFLTR2 ADFLTRLbits.ADFLTR2 // bit 2
18985 #define ADFLTR3 ADFLTRLbits.ADFLTR3 // bit 3
18986 #define ADFLTR4 ADFLTRLbits.ADFLTR4 // bit 4
18987 #define ADFLTR5 ADFLTRLbits.ADFLTR5 // bit 5
18988 #define ADFLTR6 ADFLTRLbits.ADFLTR6 // bit 6
18989 #define ADFLTR7 ADFLTRLbits.ADFLTR7 // bit 7
18991 #define ADLTH8 ADLTHHbits.ADLTH8 // bit 0
18992 #define ADLTH9 ADLTHHbits.ADLTH9 // bit 1
18993 #define ADLTH10 ADLTHHbits.ADLTH10 // bit 2
18994 #define ADLTH11 ADLTHHbits.ADLTH11 // bit 3
18995 #define ADLTH12 ADLTHHbits.ADLTH12 // bit 4
18996 #define ADLTH13 ADLTHHbits.ADLTH13 // bit 5
18997 #define ADLTH14 ADLTHHbits.ADLTH14 // bit 6
18998 #define ADLTH15 ADLTHHbits.ADLTH15 // bit 7
19000 #define ADLTH0 ADLTHLbits.ADLTH0 // bit 0
19001 #define ADLTH1 ADLTHLbits.ADLTH1 // bit 1
19002 #define ADLTH2 ADLTHLbits.ADLTH2 // bit 2
19003 #define ADLTH3 ADLTHLbits.ADLTH3 // bit 3
19004 #define ADLTH4 ADLTHLbits.ADLTH4 // bit 4
19005 #define ADLTH5 ADLTHLbits.ADLTH5 // bit 5
19006 #define ADLTH6 ADLTHLbits.ADLTH6 // bit 6
19007 #define ADLTH7 ADLTHLbits.ADLTH7 // bit 7
19009 #define ADPCH0 ADPCHbits.ADPCH0 // bit 0
19010 #define ADPCH1 ADPCHbits.ADPCH1 // bit 1
19011 #define ADPCH2 ADPCHbits.ADPCH2 // bit 2
19012 #define ADPCH3 ADPCHbits.ADPCH3 // bit 3
19013 #define ADPCH4 ADPCHbits.ADPCH4 // bit 4
19014 #define ADPCH5 ADPCHbits.ADPCH5 // bit 5
19016 #define ADPRE0 ADPREbits.ADPRE0 // bit 0
19017 #define ADPRE1 ADPREbits.ADPRE1 // bit 1
19018 #define ADPRE2 ADPREbits.ADPRE2 // bit 2
19019 #define ADPRE3 ADPREbits.ADPRE3 // bit 3
19020 #define ADPRE4 ADPREbits.ADPRE4 // bit 4
19021 #define ADPRE5 ADPREbits.ADPRE5 // bit 5
19022 #define ADPRE6 ADPREbits.ADPRE6 // bit 6
19023 #define ADPRE7 ADPREbits.ADPRE7 // bit 7
19025 #define ADPREV8 ADPREVHbits.ADPREV8 // bit 0
19026 #define ADPREV9 ADPREVHbits.ADPREV9 // bit 1
19027 #define ADPREV10 ADPREVHbits.ADPREV10 // bit 2
19028 #define ADPREV11 ADPREVHbits.ADPREV11 // bit 3
19029 #define ADPREV12 ADPREVHbits.ADPREV12 // bit 4
19030 #define ADPREV13 ADPREVHbits.ADPREV13 // bit 5
19031 #define ADPREV14 ADPREVHbits.ADPREV14 // bit 6
19032 #define ADPREV15 ADPREVHbits.ADPREV15 // bit 7
19034 #define ADPREV0 ADPREVLbits.ADPREV0 // bit 0
19035 #define ADPREV1 ADPREVLbits.ADPREV1 // bit 1
19036 #define ADPREV2 ADPREVLbits.ADPREV2 // bit 2
19037 #define ADPREV3 ADPREVLbits.ADPREV3 // bit 3
19038 #define ADPREV4 ADPREVLbits.ADPREV4 // bit 4
19039 #define ADPREV5 ADPREVLbits.ADPREV5 // bit 5
19040 #define ADPREV6 ADPREVLbits.ADPREV6 // bit 6
19041 #define ADPREV7 ADPREVLbits.ADPREV7 // bit 7
19043 #define ADPREF0 ADREFbits.ADPREF0 // bit 0
19044 #define ADPREF1 ADREFbits.ADPREF1 // bit 1
19045 #define ADNREF ADREFbits.ADNREF // bit 4
19047 #define ADRPT0 ADRPTbits.ADRPT0 // bit 0
19048 #define ADRPT1 ADRPTbits.ADRPT1 // bit 1
19049 #define ADRPT2 ADRPTbits.ADRPT2 // bit 2
19050 #define ADRPT3 ADRPTbits.ADRPT3 // bit 3
19051 #define ADRPT4 ADRPTbits.ADRPT4 // bit 4
19052 #define ADRPT5 ADRPTbits.ADRPT5 // bit 5
19053 #define ADRPT6 ADRPTbits.ADRPT6 // bit 6
19054 #define ADRPT7 ADRPTbits.ADRPT7 // bit 7
19056 #define ADSTAT0 ADSTATbits.ADSTAT0 // bit 0
19057 #define ADSTAT1 ADSTATbits.ADSTAT1 // bit 1
19058 #define ADSTAT2 ADSTATbits.ADSTAT2 // bit 2
19059 #define ADMACT ADSTATbits.ADMACT // bit 3
19060 #define ADMATH ADSTATbits.ADMATH // bit 4
19061 #define ADLTHR ADSTATbits.ADLTHR // bit 5
19062 #define ADUTHR ADSTATbits.ADUTHR // bit 6
19063 #define ADAOV ADSTATbits.ADAOV // bit 7
19065 #define ADSTPT8 ADSTPTHbits.ADSTPT8 // bit 0
19066 #define ADSTPT9 ADSTPTHbits.ADSTPT9 // bit 1
19067 #define ADSTPT10 ADSTPTHbits.ADSTPT10 // bit 2
19068 #define ADSTPT11 ADSTPTHbits.ADSTPT11 // bit 3
19069 #define ADSTPT12 ADSTPTHbits.ADSTPT12 // bit 4
19070 #define ADSTPT13 ADSTPTHbits.ADSTPT13 // bit 5
19071 #define ADSTPT14 ADSTPTHbits.ADSTPT14 // bit 6
19072 #define ADSTPT15 ADSTPTHbits.ADSTPT15 // bit 7
19074 #define ADSTPT0 ADSTPTLbits.ADSTPT0 // bit 0
19075 #define ADSTPT1 ADSTPTLbits.ADSTPT1 // bit 1
19076 #define ADSTPT2 ADSTPTLbits.ADSTPT2 // bit 2
19077 #define ADSTPT3 ADSTPTLbits.ADSTPT3 // bit 3
19078 #define ADSTPT4 ADSTPTLbits.ADSTPT4 // bit 4
19079 #define ADSTPT5 ADSTPTLbits.ADSTPT5 // bit 5
19080 #define ADSTPT6 ADSTPTLbits.ADSTPT6 // bit 6
19081 #define ADSTPT7 ADSTPTLbits.ADSTPT7 // bit 7
19083 #define ADUTH8 ADUTHHbits.ADUTH8 // bit 0
19084 #define ADUTH9 ADUTHHbits.ADUTH9 // bit 1
19085 #define ADUTH10 ADUTHHbits.ADUTH10 // bit 2
19086 #define ADUTH11 ADUTHHbits.ADUTH11 // bit 3
19087 #define ADUTH12 ADUTHHbits.ADUTH12 // bit 4
19088 #define ADUTH13 ADUTHHbits.ADUTH13 // bit 5
19089 #define ADUTH14 ADUTHHbits.ADUTH14 // bit 6
19090 #define ADUTH15 ADUTHHbits.ADUTH15 // bit 7
19092 #define ADUTH0 ADUTHLbits.ADUTH0 // bit 0
19093 #define ADUTH1 ADUTHLbits.ADUTH1 // bit 1
19094 #define ADUTH2 ADUTHLbits.ADUTH2 // bit 2
19095 #define ADUTH3 ADUTHLbits.ADUTH3 // bit 3
19096 #define ADUTH4 ADUTHLbits.ADUTH4 // bit 4
19097 #define ADUTH5 ADUTHLbits.ADUTH5 // bit 5
19098 #define ADUTH6 ADUTHLbits.ADUTH6 // bit 6
19099 #define ADUTH7 ADUTHLbits.ADUTH7 // bit 7
19101 #define ANSA0 ANSELAbits.ANSA0 // bit 0
19102 #define ANSA1 ANSELAbits.ANSA1 // bit 1
19103 #define ANSA2 ANSELAbits.ANSA2 // bit 2
19104 #define ANSA3 ANSELAbits.ANSA3 // bit 3
19105 #define ANSA4 ANSELAbits.ANSA4 // bit 4
19106 #define ANSA5 ANSELAbits.ANSA5 // bit 5
19107 #define ANSA6 ANSELAbits.ANSA6 // bit 6
19108 #define ANSA7 ANSELAbits.ANSA7 // bit 7
19110 #define ANSB0 ANSELBbits.ANSB0 // bit 0
19111 #define ANSB1 ANSELBbits.ANSB1 // bit 1
19112 #define ANSB2 ANSELBbits.ANSB2 // bit 2
19113 #define ANSB3 ANSELBbits.ANSB3 // bit 3
19114 #define ANSB4 ANSELBbits.ANSB4 // bit 4
19115 #define ANSB5 ANSELBbits.ANSB5 // bit 5
19116 #define ANSB6 ANSELBbits.ANSB6 // bit 6
19117 #define ANSB7 ANSELBbits.ANSB7 // bit 7
19119 #define ANSC0 ANSELCbits.ANSC0 // bit 0
19120 #define ANSC1 ANSELCbits.ANSC1 // bit 1
19121 #define ANSC2 ANSELCbits.ANSC2 // bit 2
19122 #define ANSC3 ANSELCbits.ANSC3 // bit 3
19123 #define ANSC4 ANSELCbits.ANSC4 // bit 4
19124 #define ANSC5 ANSELCbits.ANSC5 // bit 5
19125 #define ANSC6 ANSELCbits.ANSC6 // bit 6
19126 #define ANSC7 ANSELCbits.ANSC7 // bit 7
19128 #define ABDEN BAUD1CONbits.ABDEN // bit 0
19129 #define WUE BAUD1CONbits.WUE // bit 1
19130 #define BRG16 BAUD1CONbits.BRG16 // bit 3
19131 #define SCKP BAUD1CONbits.SCKP // bit 4
19132 #define RCIDL BAUD1CONbits.RCIDL // bit 6
19133 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
19135 #define BORRDY BORCONbits.BORRDY // bit 0
19136 #define SBOREN BORCONbits.SBOREN // bit 7
19138 #define BSR0 BSRbits.BSR0 // bit 0
19139 #define BSR1 BSRbits.BSR1 // bit 1
19140 #define BSR2 BSRbits.BSR2 // bit 2
19141 #define BSR3 BSRbits.BSR3 // bit 3
19142 #define BSR4 BSRbits.BSR4 // bit 4
19144 #define CCDS0 CCDCONbits.CCDS0 // bit 0
19145 #define CCDS1 CCDCONbits.CCDS1 // bit 1
19146 #define CCDEN CCDCONbits.CCDEN // bit 7
19148 #define CCDNA0 CCDNAbits.CCDNA0 // bit 0
19149 #define CCDNA1 CCDNAbits.CCDNA1 // bit 1
19150 #define CCDNA2 CCDNAbits.CCDNA2 // bit 2
19151 #define CCDNA3 CCDNAbits.CCDNA3 // bit 3
19152 #define CCDNA4 CCDNAbits.CCDNA4 // bit 4
19153 #define CCDNA5 CCDNAbits.CCDNA5 // bit 5
19154 #define CCDNA6 CCDNAbits.CCDNA6 // bit 6
19155 #define CCDNA7 CCDNAbits.CCDNA7 // bit 7
19157 #define CCDNB0 CCDNBbits.CCDNB0 // bit 0
19158 #define CCDNB1 CCDNBbits.CCDNB1 // bit 1
19159 #define CCDNB2 CCDNBbits.CCDNB2 // bit 2
19160 #define CCDNB3 CCDNBbits.CCDNB3 // bit 3
19161 #define CCDNB4 CCDNBbits.CCDNB4 // bit 4
19162 #define CCDNB5 CCDNBbits.CCDNB5 // bit 5
19163 #define CCDNB6 CCDNBbits.CCDNB6 // bit 6
19164 #define CCDNB7 CCDNBbits.CCDNB7 // bit 7
19166 #define CCDNC0 CCDNCbits.CCDNC0 // bit 0
19167 #define CCDNC1 CCDNCbits.CCDNC1 // bit 1
19168 #define CCDNC2 CCDNCbits.CCDNC2 // bit 2
19169 #define CCDNC3 CCDNCbits.CCDNC3 // bit 3
19170 #define CCDNC4 CCDNCbits.CCDNC4 // bit 4
19171 #define CCDNC5 CCDNCbits.CCDNC5 // bit 5
19172 #define CCDNC6 CCDNCbits.CCDNC6 // bit 6
19173 #define CCDNC7 CCDNCbits.CCDNC7 // bit 7
19175 #define CCDPA0 CCDPAbits.CCDPA0 // bit 0
19176 #define CCDPA1 CCDPAbits.CCDPA1 // bit 1
19177 #define CCDPA2 CCDPAbits.CCDPA2 // bit 2
19178 #define CCDPA3 CCDPAbits.CCDPA3 // bit 3
19179 #define CCDPA4 CCDPAbits.CCDPA4 // bit 4
19180 #define CCDPA5 CCDPAbits.CCDPA5 // bit 5
19181 #define CCDPA6 CCDPAbits.CCDPA6 // bit 6
19182 #define CCDPA7 CCDPAbits.CCDPA7 // bit 7
19184 #define CCDPB0 CCDPBbits.CCDPB0 // bit 0
19185 #define CCDPB1 CCDPBbits.CCDPB1 // bit 1
19186 #define CCDPB2 CCDPBbits.CCDPB2 // bit 2
19187 #define CCDPB3 CCDPBbits.CCDPB3 // bit 3
19188 #define CCDPB4 CCDPBbits.CCDPB4 // bit 4
19189 #define CCDPB5 CCDPBbits.CCDPB5 // bit 5
19190 #define CCDPB6 CCDPBbits.CCDPB6 // bit 6
19191 #define CCDPB7 CCDPBbits.CCDPB7 // bit 7
19193 #define CCDPC0 CCDPCbits.CCDPC0 // bit 0
19194 #define CCDPC1 CCDPCbits.CCDPC1 // bit 1
19195 #define CCDPC2 CCDPCbits.CCDPC2 // bit 2
19196 #define CCDPC3 CCDPCbits.CCDPC3 // bit 3
19197 #define CCDPC4 CCDPCbits.CCDPC4 // bit 4
19198 #define CCDPC5 CCDPCbits.CCDPC5 // bit 5
19199 #define CCDPC6 CCDPCbits.CCDPC6 // bit 6
19200 #define CCDPC7 CCDPCbits.CCDPC7 // bit 7
19202 #define CTS0 CCP1CAPbits.CTS0 // bit 0, shadows bit in CCP1CAPbits
19203 #define CCP1CTS0 CCP1CAPbits.CCP1CTS0 // bit 0, shadows bit in CCP1CAPbits
19204 #define CTS1 CCP1CAPbits.CTS1 // bit 1, shadows bit in CCP1CAPbits
19205 #define CCP1CTS1 CCP1CAPbits.CCP1CTS1 // bit 1, shadows bit in CCP1CAPbits
19206 #define CTS2 CCP1CAPbits.CTS2 // bit 2, shadows bit in CCP1CAPbits
19207 #define CCP1CTS2 CCP1CAPbits.CCP1CTS2 // bit 2, shadows bit in CCP1CAPbits
19209 #define MODE0 CCP1CONbits.MODE0 // bit 0, shadows bit in CCP1CONbits
19210 #define CCP1MODE0 CCP1CONbits.CCP1MODE0 // bit 0, shadows bit in CCP1CONbits
19211 #define MODE1 CCP1CONbits.MODE1 // bit 1, shadows bit in CCP1CONbits
19212 #define CCP1MODE1 CCP1CONbits.CCP1MODE1 // bit 1, shadows bit in CCP1CONbits
19213 #define MODE2 CCP1CONbits.MODE2 // bit 2, shadows bit in CCP1CONbits
19214 #define CCP1MODE2 CCP1CONbits.CCP1MODE2 // bit 2, shadows bit in CCP1CONbits
19215 #define MODE3 CCP1CONbits.MODE3 // bit 3, shadows bit in CCP1CONbits
19216 #define CCP1MODE3 CCP1CONbits.CCP1MODE3 // bit 3, shadows bit in CCP1CONbits
19217 #define FMT CCP1CONbits.FMT // bit 4, shadows bit in CCP1CONbits
19218 #define CCP1FMT CCP1CONbits.CCP1FMT // bit 4, shadows bit in CCP1CONbits
19219 #define OUT CCP1CONbits.OUT // bit 5, shadows bit in CCP1CONbits
19220 #define CCP1OUT CCP1CONbits.CCP1OUT // bit 5, shadows bit in CCP1CONbits
19221 #define OE CCP1CONbits.OE // bit 6, shadows bit in CCP1CONbits
19222 #define CCP1OE CCP1CONbits.CCP1OE // bit 6, shadows bit in CCP1CONbits
19223 #define EN CCP1CONbits.EN // bit 7, shadows bit in CCP1CONbits
19224 #define CCP1EN CCP1CONbits.CCP1EN // bit 7, shadows bit in CCP1CONbits
19226 #define CCP1PPS0 CCP1PPSbits.CCP1PPS0 // bit 0
19227 #define CCP1PPS1 CCP1PPSbits.CCP1PPS1 // bit 1
19228 #define CCP1PPS2 CCP1PPSbits.CCP1PPS2 // bit 2
19229 #define CCP1PPS3 CCP1PPSbits.CCP1PPS3 // bit 3
19230 #define CCP1PPS4 CCP1PPSbits.CCP1PPS4 // bit 4
19232 #define CCP2PPS0 CCP2PPSbits.CCP2PPS0 // bit 0
19233 #define CCP2PPS1 CCP2PPSbits.CCP2PPS1 // bit 1
19234 #define CCP2PPS2 CCP2PPSbits.CCP2PPS2 // bit 2
19235 #define CCP2PPS3 CCP2PPSbits.CCP2PPS3 // bit 3
19236 #define CCP2PPS4 CCP2PPSbits.CCP2PPS4 // bit 4
19238 #define CCP3PPS0 CCP3PPSbits.CCP3PPS0 // bit 0
19239 #define CCP3PPS1 CCP3PPSbits.CCP3PPS1 // bit 1
19240 #define CCP3PPS2 CCP3PPSbits.CCP3PPS2 // bit 2
19241 #define CCP3PPS3 CCP3PPSbits.CCP3PPS3 // bit 3
19242 #define CCP3PPS4 CCP3PPSbits.CCP3PPS4 // bit 4
19244 #define CCP4PPS0 CCP4PPSbits.CCP4PPS0 // bit 0
19245 #define CCP4PPS1 CCP4PPSbits.CCP4PPS1 // bit 1
19246 #define CCP4PPS2 CCP4PPSbits.CCP4PPS2 // bit 2
19247 #define CCP4PPS3 CCP4PPSbits.CCP4PPS3 // bit 3
19248 #define CCP4PPS4 CCP4PPSbits.CCP4PPS4 // bit 4
19250 #define CCP5PPS0 CCP5PPSbits.CCP5PPS0 // bit 0
19251 #define CCP5PPS1 CCP5PPSbits.CCP5PPS1 // bit 1
19252 #define CCP5PPS2 CCP5PPSbits.CCP5PPS2 // bit 2
19253 #define CCP5PPS3 CCP5PPSbits.CCP5PPS3 // bit 3
19254 #define CCP5PPS4 CCP5PPSbits.CCP5PPS4 // bit 4
19255 #define CCP6PPS CCP5PPSbits.CCP6PPS // bit 5
19257 #define C1TSEL0 CCPTMRS0bits.C1TSEL0 // bit 0
19258 #define C1TSEL1 CCPTMRS0bits.C1TSEL1 // bit 1
19259 #define C2TSEL0 CCPTMRS0bits.C2TSEL0 // bit 2
19260 #define C2TSEL1 CCPTMRS0bits.C2TSEL1 // bit 3
19261 #define C3TSEL0 CCPTMRS0bits.C3TSEL0 // bit 4
19262 #define C3TSEL1 CCPTMRS0bits.C3TSEL1 // bit 5
19263 #define C4TSEL0 CCPTMRS0bits.C4TSEL0 // bit 6
19264 #define C4TSEL1 CCPTMRS0bits.C4TSEL1 // bit 7
19266 #define C5TSEL0 CCPTMRS1bits.C5TSEL0 // bit 0
19267 #define C5TSEL1 CCPTMRS1bits.C5TSEL1 // bit 1
19268 #define P6TSEL0 CCPTMRS1bits.P6TSEL0 // bit 2
19269 #define P6TSEL1 CCPTMRS1bits.P6TSEL1 // bit 3
19270 #define P7TSEL0 CCPTMRS1bits.P7TSEL0 // bit 4
19271 #define P7TSEL1 CCPTMRS1bits.P7TSEL1 // bit 5
19273 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits
19274 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits
19275 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits
19276 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits
19277 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits
19278 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits
19279 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits
19280 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits
19281 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits
19282 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits
19283 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits
19284 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits
19285 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits
19286 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits
19287 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits
19288 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits
19290 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits
19291 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits
19292 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits
19293 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits
19294 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits
19295 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits
19296 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits
19297 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits
19298 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits
19299 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits
19300 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits
19301 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits
19302 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits
19303 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits
19304 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits
19305 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits
19307 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits
19308 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits
19309 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits
19310 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits
19311 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits
19312 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits
19313 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits
19314 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits
19315 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits
19316 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits
19318 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits
19319 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits
19320 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits
19321 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits
19322 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits
19323 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits
19324 #define LC1D1S3 CLC1SEL0bits.LC1D1S3 // bit 3, shadows bit in CLC1SEL0bits
19325 #define D1S3 CLC1SEL0bits.D1S3 // bit 3, shadows bit in CLC1SEL0bits
19326 #define LC1D1S4 CLC1SEL0bits.LC1D1S4 // bit 4, shadows bit in CLC1SEL0bits
19327 #define D1S4 CLC1SEL0bits.D1S4 // bit 4, shadows bit in CLC1SEL0bits
19328 #define LC1D1S5 CLC1SEL0bits.LC1D1S5 // bit 5, shadows bit in CLC1SEL0bits
19329 #define D1S5 CLC1SEL0bits.D1S5 // bit 5, shadows bit in CLC1SEL0bits
19330 #define LC1D1S6 CLC1SEL0bits.LC1D1S6 // bit 6, shadows bit in CLC1SEL0bits
19331 #define D1S6 CLC1SEL0bits.D1S6 // bit 6, shadows bit in CLC1SEL0bits
19332 #define LC1D1S7 CLC1SEL0bits.LC1D1S7 // bit 7, shadows bit in CLC1SEL0bits
19333 #define D1S7 CLC1SEL0bits.D1S7 // bit 7, shadows bit in CLC1SEL0bits
19335 #define LC1D2S0 CLC1SEL1bits.LC1D2S0 // bit 0, shadows bit in CLC1SEL1bits
19336 #define D2S0 CLC1SEL1bits.D2S0 // bit 0, shadows bit in CLC1SEL1bits
19337 #define LC1D2S1 CLC1SEL1bits.LC1D2S1 // bit 1, shadows bit in CLC1SEL1bits
19338 #define D2S1 CLC1SEL1bits.D2S1 // bit 1, shadows bit in CLC1SEL1bits
19339 #define LC1D2S2 CLC1SEL1bits.LC1D2S2 // bit 2, shadows bit in CLC1SEL1bits
19340 #define D2S2 CLC1SEL1bits.D2S2 // bit 2, shadows bit in CLC1SEL1bits
19341 #define LC1D2S3 CLC1SEL1bits.LC1D2S3 // bit 3, shadows bit in CLC1SEL1bits
19342 #define D2S3 CLC1SEL1bits.D2S3 // bit 3, shadows bit in CLC1SEL1bits
19343 #define LC1D2S4 CLC1SEL1bits.LC1D2S4 // bit 4, shadows bit in CLC1SEL1bits
19344 #define D2S4 CLC1SEL1bits.D2S4 // bit 4, shadows bit in CLC1SEL1bits
19345 #define LC1D2S5 CLC1SEL1bits.LC1D2S5 // bit 5, shadows bit in CLC1SEL1bits
19346 #define D2S5 CLC1SEL1bits.D2S5 // bit 5, shadows bit in CLC1SEL1bits
19347 #define LC1D2S6 CLC1SEL1bits.LC1D2S6 // bit 6, shadows bit in CLC1SEL1bits
19348 #define D2S6 CLC1SEL1bits.D2S6 // bit 6, shadows bit in CLC1SEL1bits
19349 #define LC1D2S7 CLC1SEL1bits.LC1D2S7 // bit 7, shadows bit in CLC1SEL1bits
19350 #define D2S7 CLC1SEL1bits.D2S7 // bit 7, shadows bit in CLC1SEL1bits
19352 #define LC1D3S0 CLC1SEL2bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL2bits
19353 #define D3S0 CLC1SEL2bits.D3S0 // bit 0, shadows bit in CLC1SEL2bits
19354 #define LC1D3S1 CLC1SEL2bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL2bits
19355 #define D3S1 CLC1SEL2bits.D3S1 // bit 1, shadows bit in CLC1SEL2bits
19356 #define LC1D3S2 CLC1SEL2bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL2bits
19357 #define D3S2 CLC1SEL2bits.D3S2 // bit 2, shadows bit in CLC1SEL2bits
19358 #define LC1D3S3 CLC1SEL2bits.LC1D3S3 // bit 3, shadows bit in CLC1SEL2bits
19359 #define D3S3 CLC1SEL2bits.D3S3 // bit 3, shadows bit in CLC1SEL2bits
19360 #define LC1D3S4 CLC1SEL2bits.LC1D3S4 // bit 4, shadows bit in CLC1SEL2bits
19361 #define D3S4 CLC1SEL2bits.D3S4 // bit 4, shadows bit in CLC1SEL2bits
19362 #define LC1D3S5 CLC1SEL2bits.LC1D3S5 // bit 5, shadows bit in CLC1SEL2bits
19363 #define D3S5 CLC1SEL2bits.D3S5 // bit 5, shadows bit in CLC1SEL2bits
19364 #define LC1D3S6 CLC1SEL2bits.LC1D3S6 // bit 6, shadows bit in CLC1SEL2bits
19365 #define D3S6 CLC1SEL2bits.D3S6 // bit 6, shadows bit in CLC1SEL2bits
19366 #define LC1D3S7 CLC1SEL2bits.LC1D3S7 // bit 7, shadows bit in CLC1SEL2bits
19367 #define D3S7 CLC1SEL2bits.D3S7 // bit 7, shadows bit in CLC1SEL2bits
19369 #define LC1D4S0 CLC1SEL3bits.LC1D4S0 // bit 0, shadows bit in CLC1SEL3bits
19370 #define D4S0 CLC1SEL3bits.D4S0 // bit 0, shadows bit in CLC1SEL3bits
19371 #define LC1D4S1 CLC1SEL3bits.LC1D4S1 // bit 1, shadows bit in CLC1SEL3bits
19372 #define D4S1 CLC1SEL3bits.D4S1 // bit 1, shadows bit in CLC1SEL3bits
19373 #define LC1D4S2 CLC1SEL3bits.LC1D4S2 // bit 2, shadows bit in CLC1SEL3bits
19374 #define D4S2 CLC1SEL3bits.D4S2 // bit 2, shadows bit in CLC1SEL3bits
19375 #define LC1D4S3 CLC1SEL3bits.LC1D4S3 // bit 3, shadows bit in CLC1SEL3bits
19376 #define D4S3 CLC1SEL3bits.D4S3 // bit 3, shadows bit in CLC1SEL3bits
19377 #define LC1D4S4 CLC1SEL3bits.LC1D4S4 // bit 4, shadows bit in CLC1SEL3bits
19378 #define D4S4 CLC1SEL3bits.D4S4 // bit 4, shadows bit in CLC1SEL3bits
19379 #define LC1D4S5 CLC1SEL3bits.LC1D4S5 // bit 5, shadows bit in CLC1SEL3bits
19380 #define D4S5 CLC1SEL3bits.D4S5 // bit 5, shadows bit in CLC1SEL3bits
19381 #define LC1D4S6 CLC1SEL3bits.LC1D4S6 // bit 6, shadows bit in CLC1SEL3bits
19382 #define D4S6 CLC1SEL3bits.D4S6 // bit 6, shadows bit in CLC1SEL3bits
19383 #define LC1D4S7 CLC1SEL3bits.LC1D4S7 // bit 7, shadows bit in CLC1SEL3bits
19384 #define D4S7 CLC1SEL3bits.D4S7 // bit 7, shadows bit in CLC1SEL3bits
19386 #define MLC1OUT CLCDATAbits.MLC1OUT // bit 0
19387 #define MLC2OUT CLCDATAbits.MLC2OUT // bit 1
19388 #define MLC3OUT CLCDATAbits.MLC3OUT // bit 2
19389 #define MLC4OUT CLCDATAbits.MLC4OUT // bit 3
19391 #define CLCIN0PPS0 CLCIN0PPSbits.CLCIN0PPS0 // bit 0
19392 #define CLCIN0PPS1 CLCIN0PPSbits.CLCIN0PPS1 // bit 1
19393 #define CLCIN0PPS2 CLCIN0PPSbits.CLCIN0PPS2 // bit 2
19394 #define CLCIN0PPS3 CLCIN0PPSbits.CLCIN0PPS3 // bit 3
19395 #define CLCIN0PPS4 CLCIN0PPSbits.CLCIN0PPS4 // bit 4
19397 #define CLCIN1PPS0 CLCIN1PPSbits.CLCIN1PPS0 // bit 0
19398 #define CLCIN1PPS1 CLCIN1PPSbits.CLCIN1PPS1 // bit 1
19399 #define CLCIN1PPS2 CLCIN1PPSbits.CLCIN1PPS2 // bit 2
19400 #define CLCIN1PPS3 CLCIN1PPSbits.CLCIN1PPS3 // bit 3
19401 #define CLCIN1PPS4 CLCIN1PPSbits.CLCIN1PPS4 // bit 4
19403 #define CLCIN2PPS0 CLCIN2PPSbits.CLCIN2PPS0 // bit 0
19404 #define CLCIN2PPS1 CLCIN2PPSbits.CLCIN2PPS1 // bit 1
19405 #define CLCIN2PPS2 CLCIN2PPSbits.CLCIN2PPS2 // bit 2
19406 #define CLCIN2PPS3 CLCIN2PPSbits.CLCIN2PPS3 // bit 3
19407 #define CLCIN2PPS4 CLCIN2PPSbits.CLCIN2PPS4 // bit 4
19409 #define CLCIN3PPS0 CLCIN3PPSbits.CLCIN3PPS0 // bit 0
19410 #define CLCIN3PPS1 CLCIN3PPSbits.CLCIN3PPS1 // bit 1
19411 #define CLCIN3PPS2 CLCIN3PPSbits.CLCIN3PPS2 // bit 2
19412 #define CLCIN3PPS3 CLCIN3PPSbits.CLCIN3PPS3 // bit 3
19413 #define CLCIN3PPS4 CLCIN3PPSbits.CLCIN3PPS4 // bit 4
19415 #define CLKRCLK0 CLKRCLKbits.CLKRCLK0 // bit 0
19416 #define CLKRCLK1 CLKRCLKbits.CLKRCLK1 // bit 1
19417 #define CLKRCLK2 CLKRCLKbits.CLKRCLK2 // bit 2
19418 #define CLKRCLK3 CLKRCLKbits.CLKRCLK3 // bit 3
19420 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0
19421 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1
19422 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2
19423 #define CLKRDC0 CLKRCONbits.CLKRDC0 // bit 3
19424 #define CLKRDC1 CLKRCONbits.CLKRDC1 // bit 4
19425 #define CLKREN CLKRCONbits.CLKREN // bit 7
19427 #define NCH0 CM1NSELbits.NCH0 // bit 0, shadows bit in CM1NSELbits
19428 #define C1NCH0 CM1NSELbits.C1NCH0 // bit 0, shadows bit in CM1NSELbits
19429 #define NCH1 CM1NSELbits.NCH1 // bit 1, shadows bit in CM1NSELbits
19430 #define C1NCH1 CM1NSELbits.C1NCH1 // bit 1, shadows bit in CM1NSELbits
19431 #define NCH2 CM1NSELbits.NCH2 // bit 2, shadows bit in CM1NSELbits
19432 #define C1NCH2 CM1NSELbits.C1NCH2 // bit 2, shadows bit in CM1NSELbits
19434 #define PCH0 CM1PSELbits.PCH0 // bit 0, shadows bit in CM1PSELbits
19435 #define C1PCH0 CM1PSELbits.C1PCH0 // bit 0, shadows bit in CM1PSELbits
19436 #define PCH1 CM1PSELbits.PCH1 // bit 1, shadows bit in CM1PSELbits
19437 #define C1PCH1 CM1PSELbits.C1PCH1 // bit 1, shadows bit in CM1PSELbits
19438 #define PCH2 CM1PSELbits.PCH2 // bit 2, shadows bit in CM1PSELbits
19439 #define C1PCH2 CM1PSELbits.C1PCH2 // bit 2, shadows bit in CM1PSELbits
19441 #define DOZE0 CPUDOZEbits.DOZE0 // bit 0
19442 #define DOZE1 CPUDOZEbits.DOZE1 // bit 1
19443 #define DOZE2 CPUDOZEbits.DOZE2 // bit 2
19444 #define DOE CPUDOZEbits.DOE // bit 4
19445 #define ROI CPUDOZEbits.ROI // bit 5
19446 #define DOZEN CPUDOZEbits.DOZEN // bit 6
19447 #define IDLEN CPUDOZEbits.IDLEN // bit 7
19449 #define ACC8 CRCACCHbits.ACC8 // bit 0
19450 #define ACC9 CRCACCHbits.ACC9 // bit 1
19451 #define ACC10 CRCACCHbits.ACC10 // bit 2
19452 #define ACC11 CRCACCHbits.ACC11 // bit 3
19453 #define ACC12 CRCACCHbits.ACC12 // bit 4
19454 #define ACC13 CRCACCHbits.ACC13 // bit 5
19455 #define ACC14 CRCACCHbits.ACC14 // bit 6
19456 #define ACC15 CRCACCHbits.ACC15 // bit 7
19458 #define ACC0 CRCACCLbits.ACC0 // bit 0
19459 #define ACC1 CRCACCLbits.ACC1 // bit 1
19460 #define ACC2 CRCACCLbits.ACC2 // bit 2
19461 #define ACC3 CRCACCLbits.ACC3 // bit 3
19462 #define ACC4 CRCACCLbits.ACC4 // bit 4
19463 #define ACC5 CRCACCLbits.ACC5 // bit 5
19464 #define ACC6 CRCACCLbits.ACC6 // bit 6
19465 #define ACC7 CRCACCLbits.ACC7 // bit 7
19467 #define PLEN0 CRCCON1bits.PLEN0 // bit 0
19468 #define PLEN1 CRCCON1bits.PLEN1 // bit 1
19469 #define PLEN2 CRCCON1bits.PLEN2 // bit 2
19470 #define PLEN3 CRCCON1bits.PLEN3 // bit 3
19471 #define DLEN0 CRCCON1bits.DLEN0 // bit 4
19472 #define DLEN1 CRCCON1bits.DLEN1 // bit 5
19473 #define DLEN2 CRCCON1bits.DLEN2 // bit 6
19474 #define DLEN3 CRCCON1bits.DLEN3 // bit 7
19476 #define DATA8 CRCDATHbits.DATA8 // bit 0
19477 #define DATA9 CRCDATHbits.DATA9 // bit 1
19478 #define DATA10 CRCDATHbits.DATA10 // bit 2
19479 #define DATA11 CRCDATHbits.DATA11 // bit 3
19480 #define DATA12 CRCDATHbits.DATA12 // bit 4
19481 #define DATA13 CRCDATHbits.DATA13 // bit 5
19482 #define DATA14 CRCDATHbits.DATA14 // bit 6
19483 #define DATA15 CRCDATHbits.DATA15 // bit 7
19485 #define DATA0 CRCDATLbits.DATA0 // bit 0
19486 #define DATA1 CRCDATLbits.DATA1 // bit 1
19487 #define DATA2 CRCDATLbits.DATA2 // bit 2
19488 #define DATA3 CRCDATLbits.DATA3 // bit 3
19489 #define DATA4 CRCDATLbits.DATA4 // bit 4
19490 #define DATA5 CRCDATLbits.DATA5 // bit 5
19491 #define DATA6 CRCDATLbits.DATA6 // bit 6
19492 #define DATA7 CRCDATLbits.DATA7 // bit 7
19494 #define SHFT8 CRCSHIFTHbits.SHFT8 // bit 0
19495 #define SHFT9 CRCSHIFTHbits.SHFT9 // bit 1
19496 #define SHFT10 CRCSHIFTHbits.SHFT10 // bit 2
19497 #define SHFT11 CRCSHIFTHbits.SHFT11 // bit 3
19498 #define SHFT12 CRCSHIFTHbits.SHFT12 // bit 4
19499 #define SHFT13 CRCSHIFTHbits.SHFT13 // bit 5
19500 #define SHFT14 CRCSHIFTHbits.SHFT14 // bit 6
19501 #define SHFT15 CRCSHIFTHbits.SHFT15 // bit 7
19503 #define SHFT0 CRCSHIFTLbits.SHFT0 // bit 0
19504 #define SHFT1 CRCSHIFTLbits.SHFT1 // bit 1
19505 #define SHFT2 CRCSHIFTLbits.SHFT2 // bit 2
19506 #define SHFT3 CRCSHIFTLbits.SHFT3 // bit 3
19507 #define SHFT4 CRCSHIFTLbits.SHFT4 // bit 4
19508 #define SHFT5 CRCSHIFTLbits.SHFT5 // bit 5
19509 #define SHFT6 CRCSHIFTLbits.SHFT6 // bit 6
19510 #define SHFT7 CRCSHIFTLbits.SHFT7 // bit 7
19512 #define X8 CRCXORHbits.X8 // bit 0
19513 #define X9 CRCXORHbits.X9 // bit 1
19514 #define X10 CRCXORHbits.X10 // bit 2
19515 #define X11 CRCXORHbits.X11 // bit 3
19516 #define X12 CRCXORHbits.X12 // bit 4
19517 #define X13 CRCXORHbits.X13 // bit 5
19518 #define X14 CRCXORHbits.X14 // bit 6
19519 #define X15 CRCXORHbits.X15 // bit 7
19521 #define X1 CRCXORLbits.X1 // bit 1
19522 #define X2 CRCXORLbits.X2 // bit 2
19523 #define X3 CRCXORLbits.X3 // bit 3
19524 #define X4 CRCXORLbits.X4 // bit 4
19525 #define X5 CRCXORLbits.X5 // bit 5
19526 #define X6 CRCXORLbits.X6 // bit 6
19527 #define X7 CRCXORLbits.X7 // bit 7
19529 #define LSAC0 CWG1AS0bits.LSAC0 // bit 2, shadows bit in CWG1AS0bits
19530 #define CWG1LSAC0 CWG1AS0bits.CWG1LSAC0 // bit 2, shadows bit in CWG1AS0bits
19531 #define LSAC1 CWG1AS0bits.LSAC1 // bit 3, shadows bit in CWG1AS0bits
19532 #define CWG1LSAC1 CWG1AS0bits.CWG1LSAC1 // bit 3, shadows bit in CWG1AS0bits
19533 #define LSBD0 CWG1AS0bits.LSBD0 // bit 4, shadows bit in CWG1AS0bits
19534 #define CWG1LSBD0 CWG1AS0bits.CWG1LSBD0 // bit 4, shadows bit in CWG1AS0bits
19535 #define LSBD1 CWG1AS0bits.LSBD1 // bit 5, shadows bit in CWG1AS0bits
19536 #define CWG1LSBD1 CWG1AS0bits.CWG1LSBD1 // bit 5, shadows bit in CWG1AS0bits
19537 #define REN CWG1AS0bits.REN // bit 6, shadows bit in CWG1AS0bits
19538 #define CWG1REN CWG1AS0bits.CWG1REN // bit 6, shadows bit in CWG1AS0bits
19539 #define SHUTDOWN CWG1AS0bits.SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
19540 #define CWG1SHUTDOWN CWG1AS0bits.CWG1SHUTDOWN // bit 7, shadows bit in CWG1AS0bits
19542 #define AS0E CWG1AS1bits.AS0E // bit 0
19543 #define AS1E CWG1AS1bits.AS1E // bit 1
19544 #define AS2E CWG1AS1bits.AS2E // bit 2
19545 #define AS3E CWG1AS1bits.AS3E // bit 3
19546 #define AS4E CWG1AS1bits.AS4E // bit 4
19547 #define AS5E CWG1AS1bits.AS5E // bit 5
19548 #define AS6E CWG1AS1bits.AS6E // bit 6
19550 #define CS CWG1CLKCONbits.CS // bit 0, shadows bit in CWG1CLKCONbits
19551 #define CWG1CS CWG1CLKCONbits.CWG1CS // bit 0, shadows bit in CWG1CLKCONbits
19553 #define POLA CWG1CON1bits.POLA // bit 0, shadows bit in CWG1CON1bits
19554 #define CWG1POLA CWG1CON1bits.CWG1POLA // bit 0, shadows bit in CWG1CON1bits
19555 #define POLB CWG1CON1bits.POLB // bit 1, shadows bit in CWG1CON1bits
19556 #define CWG1POLB CWG1CON1bits.CWG1POLB // bit 1, shadows bit in CWG1CON1bits
19557 #define POLC CWG1CON1bits.POLC // bit 2, shadows bit in CWG1CON1bits
19558 #define CWG1POLC CWG1CON1bits.CWG1POLC // bit 2, shadows bit in CWG1CON1bits
19559 #define POLD CWG1CON1bits.POLD // bit 3, shadows bit in CWG1CON1bits
19560 #define CWG1POLD CWG1CON1bits.CWG1POLD // bit 3, shadows bit in CWG1CON1bits
19561 #define IN CWG1CON1bits.IN // bit 5, shadows bit in CWG1CON1bits
19562 #define CWG1IN CWG1CON1bits.CWG1IN // bit 5, shadows bit in CWG1CON1bits
19564 #define DBF0 CWG1DBFbits.DBF0 // bit 0, shadows bit in CWG1DBFbits
19565 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0, shadows bit in CWG1DBFbits
19566 #define DBF1 CWG1DBFbits.DBF1 // bit 1, shadows bit in CWG1DBFbits
19567 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1, shadows bit in CWG1DBFbits
19568 #define DBF2 CWG1DBFbits.DBF2 // bit 2, shadows bit in CWG1DBFbits
19569 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2, shadows bit in CWG1DBFbits
19570 #define DBF3 CWG1DBFbits.DBF3 // bit 3, shadows bit in CWG1DBFbits
19571 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3, shadows bit in CWG1DBFbits
19572 #define DBF4 CWG1DBFbits.DBF4 // bit 4, shadows bit in CWG1DBFbits
19573 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4, shadows bit in CWG1DBFbits
19574 #define DBF5 CWG1DBFbits.DBF5 // bit 5, shadows bit in CWG1DBFbits
19575 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5, shadows bit in CWG1DBFbits
19577 #define DBR0 CWG1DBRbits.DBR0 // bit 0, shadows bit in CWG1DBRbits
19578 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0, shadows bit in CWG1DBRbits
19579 #define DBR1 CWG1DBRbits.DBR1 // bit 1, shadows bit in CWG1DBRbits
19580 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1, shadows bit in CWG1DBRbits
19581 #define DBR2 CWG1DBRbits.DBR2 // bit 2, shadows bit in CWG1DBRbits
19582 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2, shadows bit in CWG1DBRbits
19583 #define DBR3 CWG1DBRbits.DBR3 // bit 3, shadows bit in CWG1DBRbits
19584 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3, shadows bit in CWG1DBRbits
19585 #define DBR4 CWG1DBRbits.DBR4 // bit 4, shadows bit in CWG1DBRbits
19586 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4, shadows bit in CWG1DBRbits
19587 #define DBR5 CWG1DBRbits.DBR5 // bit 5, shadows bit in CWG1DBRbits
19588 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5, shadows bit in CWG1DBRbits
19590 #define CWG1ISM0 CWG1ISMbits.CWG1ISM0 // bit 0
19591 #define CWG1ISM1 CWG1ISMbits.CWG1ISM1 // bit 1
19592 #define CWG1ISM2 CWG1ISMbits.CWG1ISM2 // bit 2
19593 #define CWG1ISM3 CWG1ISMbits.CWG1ISM3 // bit 3
19595 #define CWG1PPS0 CWG1PPSbits.CWG1PPS0 // bit 0
19596 #define CWG1PPS1 CWG1PPSbits.CWG1PPS1 // bit 1
19597 #define CWG1PPS2 CWG1PPSbits.CWG1PPS2 // bit 2
19598 #define CWG1PPS3 CWG1PPSbits.CWG1PPS3 // bit 3
19599 #define CWG1PPS4 CWG1PPSbits.CWG1PPS4 // bit 4
19601 #define STRA CWG1STRbits.STRA // bit 0, shadows bit in CWG1STRbits
19602 #define CWG1STRA CWG1STRbits.CWG1STRA // bit 0, shadows bit in CWG1STRbits
19603 #define STRB CWG1STRbits.STRB // bit 1, shadows bit in CWG1STRbits
19604 #define CWG1STRB CWG1STRbits.CWG1STRB // bit 1, shadows bit in CWG1STRbits
19605 #define STRC CWG1STRbits.STRC // bit 2, shadows bit in CWG1STRbits
19606 #define CWG1STRC CWG1STRbits.CWG1STRC // bit 2, shadows bit in CWG1STRbits
19607 #define STRD CWG1STRbits.STRD // bit 3, shadows bit in CWG1STRbits
19608 #define CWG1STRD CWG1STRbits.CWG1STRD // bit 3, shadows bit in CWG1STRbits
19609 #define OVRA CWG1STRbits.OVRA // bit 4, shadows bit in CWG1STRbits
19610 #define CWG1OVRA CWG1STRbits.CWG1OVRA // bit 4, shadows bit in CWG1STRbits
19611 #define OVRB CWG1STRbits.OVRB // bit 5, shadows bit in CWG1STRbits
19612 #define CWG1OVRB CWG1STRbits.CWG1OVRB // bit 5, shadows bit in CWG1STRbits
19613 #define OVRC CWG1STRbits.OVRC // bit 6, shadows bit in CWG1STRbits
19614 #define CWG1OVRC CWG1STRbits.CWG1OVRC // bit 6, shadows bit in CWG1STRbits
19615 #define OVRD CWG1STRbits.OVRD // bit 7, shadows bit in CWG1STRbits
19616 #define CWG1OVRD CWG1STRbits.CWG1OVRD // bit 7, shadows bit in CWG1STRbits
19618 #define CWG2ISM0 CWG2ISMbits.CWG2ISM0 // bit 0
19619 #define CWG2ISM1 CWG2ISMbits.CWG2ISM1 // bit 1
19620 #define CWG2ISM2 CWG2ISMbits.CWG2ISM2 // bit 2
19621 #define CWG2ISM3 CWG2ISMbits.CWG2ISM3 // bit 3
19623 #define CWG2PPS0 CWG2PPSbits.CWG2PPS0 // bit 0
19624 #define CWG2PPS1 CWG2PPSbits.CWG2PPS1 // bit 1
19625 #define CWG2PPS2 CWG2PPSbits.CWG2PPS2 // bit 2
19626 #define CWG2PPS3 CWG2PPSbits.CWG2PPS3 // bit 3
19627 #define CWG2PPS4 CWG2PPSbits.CWG2PPS4 // bit 4
19629 #define CWG3ISM0 CWG3ISMbits.CWG3ISM0 // bit 0
19630 #define CWG3ISM1 CWG3ISMbits.CWG3ISM1 // bit 1
19631 #define CWG3ISM2 CWG3ISMbits.CWG3ISM2 // bit 2
19632 #define CWG3ISM3 CWG3ISMbits.CWG3ISM3 // bit 3
19634 #define CWG3PPS0 CWG3PPSbits.CWG3PPS0 // bit 0
19635 #define CWG3PPS1 CWG3PPSbits.CWG3PPS1 // bit 1
19636 #define CWG3PPS2 CWG3PPSbits.CWG3PPS2 // bit 2
19637 #define CWG3PPS3 CWG3PPSbits.CWG3PPS3 // bit 3
19638 #define CWG3PPS4 CWG3PPSbits.CWG3PPS4 // bit 4
19640 #define DAC1R0 DAC1CON1bits.DAC1R0 // bit 0
19641 #define DAC1R1 DAC1CON1bits.DAC1R1 // bit 1
19642 #define DAC1R2 DAC1CON1bits.DAC1R2 // bit 2
19643 #define DAC1R3 DAC1CON1bits.DAC1R3 // bit 3
19644 #define DAC1R4 DAC1CON1bits.DAC1R4 // bit 4
19646 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
19647 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
19648 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
19649 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
19650 #define TSRNG FVRCONbits.TSRNG // bit 4
19651 #define TSEN FVRCONbits.TSEN // bit 5
19652 #define FVRRDY FVRCONbits.FVRRDY // bit 6
19653 #define FVREN FVRCONbits.FVREN // bit 7
19655 #define INLVLA0 INLVLAbits.INLVLA0 // bit 0
19656 #define INLVLA1 INLVLAbits.INLVLA1 // bit 1
19657 #define INLVLA2 INLVLAbits.INLVLA2 // bit 2
19658 #define INLVLA3 INLVLAbits.INLVLA3 // bit 3
19659 #define INLVLA4 INLVLAbits.INLVLA4 // bit 4
19660 #define INLVLA5 INLVLAbits.INLVLA5 // bit 5
19661 #define INLVLA6 INLVLAbits.INLVLA6 // bit 6
19662 #define INLVLA7 INLVLAbits.INLVLA7 // bit 7
19664 #define INLVLB0 INLVLBbits.INLVLB0 // bit 0
19665 #define INLVLB1 INLVLBbits.INLVLB1 // bit 1
19666 #define INLVLB2 INLVLBbits.INLVLB2 // bit 2
19667 #define INLVLB3 INLVLBbits.INLVLB3 // bit 3
19668 #define INLVLB4 INLVLBbits.INLVLB4 // bit 4
19669 #define INLVLB5 INLVLBbits.INLVLB5 // bit 5
19670 #define INLVLB6 INLVLBbits.INLVLB6 // bit 6
19671 #define INLVLB7 INLVLBbits.INLVLB7 // bit 7
19673 #define INLVLC0 INLVLCbits.INLVLC0 // bit 0
19674 #define INLVLC1 INLVLCbits.INLVLC1 // bit 1
19675 #define INLVLC2 INLVLCbits.INLVLC2 // bit 2
19676 #define INLVLC3 INLVLCbits.INLVLC3 // bit 3
19677 #define INLVLC4 INLVLCbits.INLVLC4 // bit 4
19678 #define INLVLC5 INLVLCbits.INLVLC5 // bit 5
19679 #define INLVLC6 INLVLCbits.INLVLC6 // bit 6
19680 #define INLVLC7 INLVLCbits.INLVLC7 // bit 7
19682 #define INLVLE3 INLVLEbits.INLVLE3 // bit 3
19684 #define INTEDG INTCONbits.INTEDG // bit 0
19685 #define PEIE INTCONbits.PEIE // bit 6
19686 #define GIE INTCONbits.GIE // bit 7
19688 #define INTPPS0 INTPPSbits.INTPPS0 // bit 0
19689 #define INTPPS1 INTPPSbits.INTPPS1 // bit 1
19690 #define INTPPS2 INTPPSbits.INTPPS2 // bit 2
19691 #define INTPPS3 INTPPSbits.INTPPS3 // bit 3
19693 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0
19694 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1
19695 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2
19696 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3
19697 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4
19698 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5
19699 #define IOCAF6 IOCAFbits.IOCAF6 // bit 6
19700 #define IOCAF7 IOCAFbits.IOCAF7 // bit 7
19702 #define IOCAN0 IOCANbits.IOCAN0 // bit 0
19703 #define IOCAN1 IOCANbits.IOCAN1 // bit 1
19704 #define IOCAN2 IOCANbits.IOCAN2 // bit 2
19705 #define IOCAN3 IOCANbits.IOCAN3 // bit 3
19706 #define IOCAN4 IOCANbits.IOCAN4 // bit 4
19707 #define IOCAN5 IOCANbits.IOCAN5 // bit 5
19708 #define IOCAN6 IOCANbits.IOCAN6 // bit 6
19709 #define IOCAN7 IOCANbits.IOCAN7 // bit 7
19711 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0
19712 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1
19713 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2
19714 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3
19715 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4
19716 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5
19717 #define IOCAP6 IOCAPbits.IOCAP6 // bit 6
19718 #define IOCAP7 IOCAPbits.IOCAP7 // bit 7
19720 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
19721 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
19722 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
19723 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
19724 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
19725 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
19726 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
19727 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
19729 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
19730 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
19731 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
19732 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
19733 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
19734 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
19735 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
19736 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
19738 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
19739 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
19740 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
19741 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
19742 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
19743 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
19744 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
19745 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
19747 #define IOCCF0 IOCCFbits.IOCCF0 // bit 0
19748 #define IOCCF1 IOCCFbits.IOCCF1 // bit 1
19749 #define IOCCF2 IOCCFbits.IOCCF2 // bit 2
19750 #define IOCCF3 IOCCFbits.IOCCF3 // bit 3
19751 #define IOCCF4 IOCCFbits.IOCCF4 // bit 4
19752 #define IOCCF5 IOCCFbits.IOCCF5 // bit 5
19753 #define IOCCF6 IOCCFbits.IOCCF6 // bit 6
19754 #define IOCCF7 IOCCFbits.IOCCF7 // bit 7
19756 #define IOCCN0 IOCCNbits.IOCCN0 // bit 0
19757 #define IOCCN1 IOCCNbits.IOCCN1 // bit 1
19758 #define IOCCN2 IOCCNbits.IOCCN2 // bit 2
19759 #define IOCCN3 IOCCNbits.IOCCN3 // bit 3
19760 #define IOCCN4 IOCCNbits.IOCCN4 // bit 4
19761 #define IOCCN5 IOCCNbits.IOCCN5 // bit 5
19762 #define IOCCN6 IOCCNbits.IOCCN6 // bit 6
19763 #define IOCCN7 IOCCNbits.IOCCN7 // bit 7
19765 #define IOCCP0 IOCCPbits.IOCCP0 // bit 0
19766 #define IOCCP1 IOCCPbits.IOCCP1 // bit 1
19767 #define IOCCP2 IOCCPbits.IOCCP2 // bit 2
19768 #define IOCCP3 IOCCPbits.IOCCP3 // bit 3
19769 #define IOCCP4 IOCCPbits.IOCCP4 // bit 4
19770 #define IOCCP5 IOCCPbits.IOCCP5 // bit 5
19771 #define IOCCP6 IOCCPbits.IOCCP6 // bit 6
19772 #define IOCCP7 IOCCPbits.IOCCP7 // bit 7
19774 #define IOCEF3 IOCEFbits.IOCEF3 // bit 3
19776 #define IOCEN3 IOCENbits.IOCEN3 // bit 3
19778 #define IOCEP3 IOCEPbits.IOCEP3 // bit 3
19780 #define LATA0 LATAbits.LATA0 // bit 0
19781 #define LATA1 LATAbits.LATA1 // bit 1
19782 #define LATA2 LATAbits.LATA2 // bit 2
19783 #define LATA3 LATAbits.LATA3 // bit 3
19784 #define LATA4 LATAbits.LATA4 // bit 4
19785 #define LATA5 LATAbits.LATA5 // bit 5
19786 #define LATA6 LATAbits.LATA6 // bit 6
19787 #define LATA7 LATAbits.LATA7 // bit 7
19789 #define LATB0 LATBbits.LATB0 // bit 0
19790 #define LATB1 LATBbits.LATB1 // bit 1
19791 #define LATB2 LATBbits.LATB2 // bit 2
19792 #define LATB3 LATBbits.LATB3 // bit 3
19793 #define LATB4 LATBbits.LATB4 // bit 4
19794 #define LATB5 LATBbits.LATB5 // bit 5
19795 #define LATB6 LATBbits.LATB6 // bit 6
19796 #define LATB7 LATBbits.LATB7 // bit 7
19798 #define LATC0 LATCbits.LATC0 // bit 0
19799 #define LATC1 LATCbits.LATC1 // bit 1
19800 #define LATC2 LATCbits.LATC2 // bit 2
19801 #define LATC3 LATCbits.LATC3 // bit 3
19802 #define LATC4 LATCbits.LATC4 // bit 4
19803 #define LATC5 LATCbits.LATC5 // bit 5
19804 #define LATC6 LATCbits.LATC6 // bit 6
19805 #define LATC7 LATCbits.LATC7 // bit 7
19807 #define MDCH0 MDCARHbits.MDCH0 // bit 0
19808 #define MDCH1 MDCARHbits.MDCH1 // bit 1
19809 #define MDCH2 MDCARHbits.MDCH2 // bit 2
19810 #define MDCH3 MDCARHbits.MDCH3 // bit 3
19812 #define MDCARHPPS0 MDCARHPPSbits.MDCARHPPS0 // bit 0
19813 #define MDCARHPPS1 MDCARHPPSbits.MDCARHPPS1 // bit 1
19814 #define MDCARHPPS2 MDCARHPPSbits.MDCARHPPS2 // bit 2
19815 #define MDCARHPPS3 MDCARHPPSbits.MDCARHPPS3 // bit 3
19816 #define MDCARHPPS4 MDCARHPPSbits.MDCARHPPS4 // bit 4
19818 #define MDCL0 MDCARLbits.MDCL0 // bit 0
19819 #define MDCL1 MDCARLbits.MDCL1 // bit 1
19820 #define MDCL2 MDCARLbits.MDCL2 // bit 2
19821 #define MDCL3 MDCARLbits.MDCL3 // bit 3
19823 #define MDCARLPPS0 MDCARLPPSbits.MDCARLPPS0 // bit 0
19824 #define MDCARLPPS1 MDCARLPPSbits.MDCARLPPS1 // bit 1
19825 #define MDCARLPPS2 MDCARLPPSbits.MDCARLPPS2 // bit 2
19826 #define MDCARLPPS3 MDCARLPPSbits.MDCARLPPS3 // bit 3
19827 #define MDCARLPPS4 MDCARLPPSbits.MDCARLPPS4 // bit 4
19829 #define MDBIT MDCON0bits.MDBIT // bit 0
19830 #define MDOPOL MDCON0bits.MDOPOL // bit 4
19831 #define MDOUT MDCON0bits.MDOUT // bit 5
19832 #define MDEN MDCON0bits.MDEN // bit 7
19834 #define MDCLSYNC MDCON1bits.MDCLSYNC // bit 0
19835 #define MDCLPOL MDCON1bits.MDCLPOL // bit 1
19836 #define MDCHSYNC MDCON1bits.MDCHSYNC // bit 4
19837 #define MDCHPOL MDCON1bits.MDCHPOL // bit 5
19839 #define MDMS0 MDSRCbits.MDMS0 // bit 0
19840 #define MDMS1 MDSRCbits.MDMS1 // bit 1
19841 #define MDMS2 MDSRCbits.MDMS2 // bit 2
19842 #define MDMS3 MDSRCbits.MDMS3 // bit 3
19843 #define MDMS4 MDSRCbits.MDMS4 // bit 4
19845 #define MDSRCPPS0 MDSRCPPSbits.MDSRCPPS0 // bit 0
19846 #define MDSRCPPS1 MDSRCPPSbits.MDSRCPPS1 // bit 1
19847 #define MDSRCPPS2 MDSRCPPSbits.MDSRCPPS2 // bit 2
19848 #define MDSRCPPS3 MDSRCPPSbits.MDSRCPPS3 // bit 3
19849 #define MDSRCPPS4 MDSRCPPSbits.MDSRCPPS4 // bit 4
19851 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0
19852 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1
19853 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2
19854 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3
19855 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4
19856 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5
19857 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6
19858 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7
19860 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0
19861 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1
19862 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2
19863 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3
19864 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4
19865 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5
19866 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6
19867 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7
19869 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0
19870 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1
19871 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2
19872 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3
19874 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0
19875 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1
19876 #define N1CKS2 NCO1CLKbits.N1CKS2 // bit 2
19877 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5
19878 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6
19879 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7
19881 #define N1PFM NCO1CONbits.N1PFM // bit 0
19882 #define N1POL NCO1CONbits.N1POL // bit 4
19883 #define N1OUT NCO1CONbits.N1OUT // bit 5
19884 #define N1EN NCO1CONbits.N1EN // bit 7
19886 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0
19887 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1
19888 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2
19889 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3
19890 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4
19891 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5
19892 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6
19893 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7
19895 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0
19896 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1
19897 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2
19898 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3
19899 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4
19900 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5
19901 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6
19902 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7
19904 #define NCO1INC16 NCO1INCUbits.NCO1INC16 // bit 0
19905 #define NCO1INC17 NCO1INCUbits.NCO1INC17 // bit 1
19906 #define NCO1INC18 NCO1INCUbits.NCO1INC18 // bit 2
19907 #define NCO1INC19 NCO1INCUbits.NCO1INC19 // bit 3
19909 #define NVMADR8 NVMADRHbits.NVMADR8 // bit 0
19910 #define NVMADR9 NVMADRHbits.NVMADR9 // bit 1
19911 #define NVMADR10 NVMADRHbits.NVMADR10 // bit 2
19912 #define NVMADR11 NVMADRHbits.NVMADR11 // bit 3
19913 #define NVMADR12 NVMADRHbits.NVMADR12 // bit 4
19914 #define NVMADR13 NVMADRHbits.NVMADR13 // bit 5
19915 #define NVMADR14 NVMADRHbits.NVMADR14 // bit 6
19917 #define NVMADR0 NVMADRLbits.NVMADR0 // bit 0
19918 #define NVMADR1 NVMADRLbits.NVMADR1 // bit 1
19919 #define NVMADR2 NVMADRLbits.NVMADR2 // bit 2
19920 #define NVMADR3 NVMADRLbits.NVMADR3 // bit 3
19921 #define NVMADR4 NVMADRLbits.NVMADR4 // bit 4
19922 #define NVMADR5 NVMADRLbits.NVMADR5 // bit 5
19923 #define NVMADR6 NVMADRLbits.NVMADR6 // bit 6
19924 #define NVMADR7 NVMADRLbits.NVMADR7 // bit 7
19926 #define RD NVMCON1bits.RD // bit 0
19927 #define WR NVMCON1bits.WR // bit 1
19928 #define WREN NVMCON1bits.WREN // bit 2
19929 #define WRERR NVMCON1bits.WRERR // bit 3
19930 #define FREE NVMCON1bits.FREE // bit 4
19931 #define LWLO NVMCON1bits.LWLO // bit 5
19932 #define NVMREGS NVMCON1bits.NVMREGS // bit 6
19934 #define NVMDAT8 NVMDATHbits.NVMDAT8 // bit 0
19935 #define NVMDAT9 NVMDATHbits.NVMDAT9 // bit 1
19936 #define NVMDAT10 NVMDATHbits.NVMDAT10 // bit 2
19937 #define NVMDAT11 NVMDATHbits.NVMDAT11 // bit 3
19938 #define NVMDAT12 NVMDATHbits.NVMDAT12 // bit 4
19939 #define NVMDAT13 NVMDATHbits.NVMDAT13 // bit 5
19941 #define NVMDAT0 NVMDATLbits.NVMDAT0 // bit 0
19942 #define NVMDAT1 NVMDATLbits.NVMDAT1 // bit 1
19943 #define NVMDAT2 NVMDATLbits.NVMDAT2 // bit 2
19944 #define NVMDAT3 NVMDATLbits.NVMDAT3 // bit 3
19945 #define NVMDAT4 NVMDATLbits.NVMDAT4 // bit 4
19946 #define NVMDAT5 NVMDATLbits.NVMDAT5 // bit 5
19947 #define NVMDAT6 NVMDATLbits.NVMDAT6 // bit 6
19948 #define NVMDAT7 NVMDATLbits.NVMDAT7 // bit 7
19950 #define ODCA0 ODCONAbits.ODCA0 // bit 0
19951 #define ODCA1 ODCONAbits.ODCA1 // bit 1
19952 #define ODCA2 ODCONAbits.ODCA2 // bit 2
19953 #define ODCA3 ODCONAbits.ODCA3 // bit 3
19954 #define ODCA4 ODCONAbits.ODCA4 // bit 4
19955 #define ODCA5 ODCONAbits.ODCA5 // bit 5
19956 #define ODCA6 ODCONAbits.ODCA6 // bit 6
19957 #define ODCA7 ODCONAbits.ODCA7 // bit 7
19959 #define ODCB0 ODCONBbits.ODCB0 // bit 0
19960 #define ODCB1 ODCONBbits.ODCB1 // bit 1
19961 #define ODCB2 ODCONBbits.ODCB2 // bit 2
19962 #define ODCB3 ODCONBbits.ODCB3 // bit 3
19963 #define ODCB4 ODCONBbits.ODCB4 // bit 4
19964 #define ODCB5 ODCONBbits.ODCB5 // bit 5
19965 #define ODCB6 ODCONBbits.ODCB6 // bit 6
19966 #define ODCB7 ODCONBbits.ODCB7 // bit 7
19968 #define ODCC0 ODCONCbits.ODCC0 // bit 0
19969 #define ODCC1 ODCONCbits.ODCC1 // bit 1
19970 #define ODCC2 ODCONCbits.ODCC2 // bit 2
19971 #define ODCC3 ODCONCbits.ODCC3 // bit 3
19972 #define ODCC4 ODCONCbits.ODCC4 // bit 4
19973 #define ODCC5 ODCONCbits.ODCC5 // bit 5
19974 #define ODCC6 ODCONCbits.ODCC6 // bit 6
19975 #define ODCC7 ODCONCbits.ODCC7 // bit 7
19977 #define NDIV0 OSCCON1bits.NDIV0 // bit 0
19978 #define NDIV1 OSCCON1bits.NDIV1 // bit 1
19979 #define NDIV2 OSCCON1bits.NDIV2 // bit 2
19980 #define NDIV3 OSCCON1bits.NDIV3 // bit 3
19981 #define NOSC0 OSCCON1bits.NOSC0 // bit 4
19982 #define NOSC1 OSCCON1bits.NOSC1 // bit 5
19983 #define NOSC2 OSCCON1bits.NOSC2 // bit 6
19985 #define CDIV0 OSCCON2bits.CDIV0 // bit 0
19986 #define CDIV1 OSCCON2bits.CDIV1 // bit 1
19987 #define CDIV2 OSCCON2bits.CDIV2 // bit 2
19988 #define CDIV3 OSCCON2bits.CDIV3 // bit 3
19989 #define COSC0 OSCCON2bits.COSC0 // bit 4
19990 #define COSC1 OSCCON2bits.COSC1 // bit 5
19991 #define COSC2 OSCCON2bits.COSC2 // bit 6
19993 #define NOSCR OSCCON3bits.NOSCR // bit 3
19994 #define ORDY OSCCON3bits.ORDY // bit 4
19995 #define SOSCPWR OSCCON3bits.SOSCPWR // bit 6
19996 #define CSWHOLD OSCCON3bits.CSWHOLD // bit 7
19998 #define ADOEN OSCENbits.ADOEN // bit 2
19999 #define SOSCEN OSCENbits.SOSCEN // bit 3
20000 #define LFOEN OSCENbits.LFOEN // bit 4
20001 #define MFOEN OSCENbits.MFOEN // bit 5
20002 #define HFOEN OSCENbits.HFOEN // bit 6
20003 #define EXTOEN OSCENbits.EXTOEN // bit 7
20005 #define HFFRQ0 OSCFRQbits.HFFRQ0 // bit 0
20006 #define HFFRQ1 OSCFRQbits.HFFRQ1 // bit 1
20007 #define HFFRQ2 OSCFRQbits.HFFRQ2 // bit 2
20009 #define PLLR OSCSTATbits.PLLR // bit 0
20010 #define ADOR OSCSTATbits.ADOR // bit 2
20011 #define SOR OSCSTATbits.SOR // bit 3
20012 #define LFOR OSCSTATbits.LFOR // bit 4
20013 #define MFOR OSCSTATbits.MFOR // bit 5
20014 #define HFOR OSCSTATbits.HFOR // bit 6
20015 #define EXTOR OSCSTATbits.EXTOR // bit 7
20017 #define HFTUN0 OSCTUNEbits.HFTUN0 // bit 0
20018 #define HFTUN1 OSCTUNEbits.HFTUN1 // bit 1
20019 #define HFTUN2 OSCTUNEbits.HFTUN2 // bit 2
20020 #define HFTUN3 OSCTUNEbits.HFTUN3 // bit 3
20021 #define HFTUN4 OSCTUNEbits.HFTUN4 // bit 4
20022 #define HFTUN5 OSCTUNEbits.HFTUN5 // bit 5
20024 #define NOT_BOR PCON0bits.NOT_BOR // bit 0
20025 #define NOT_POR PCON0bits.NOT_POR // bit 1
20026 #define NOT_RI PCON0bits.NOT_RI // bit 2
20027 #define NOT_RMCLR PCON0bits.NOT_RMCLR // bit 3
20028 #define NOT_RWDT PCON0bits.NOT_RWDT // bit 4
20029 #define NOT_WDTWV PCON0bits.NOT_WDTWV // bit 5
20030 #define STKUNF PCON0bits.STKUNF // bit 6
20031 #define STKOVF PCON0bits.STKOVF // bit 7
20033 #define INTE PIE0bits.INTE // bit 0
20034 #define IOCIE PIE0bits.IOCIE // bit 4
20035 #define TMR0IE PIE0bits.TMR0IE // bit 5
20037 #define ADIE PIE1bits.ADIE // bit 0
20038 #define ADTIE PIE1bits.ADTIE // bit 1
20039 #define CSWIE PIE1bits.CSWIE // bit 6
20040 #define OSFIE PIE1bits.OSFIE // bit 7
20042 #define C1IE PIE2bits.C1IE // bit 0
20043 #define C2IE PIE2bits.C2IE // bit 1
20044 #define ZCDIE PIE2bits.ZCDIE // bit 6
20046 #define SSP1IE PIE3bits.SSP1IE // bit 0
20047 #define BCL1IE PIE3bits.BCL1IE // bit 1
20048 #define SSP2IE PIE3bits.SSP2IE // bit 2
20049 #define BCL2IE PIE3bits.BCL2IE // bit 3
20050 #define TXIE PIE3bits.TXIE // bit 4
20051 #define RCIE PIE3bits.RCIE // bit 5
20053 #define TMR1IE PIE4bits.TMR1IE // bit 0
20054 #define TMR2IE PIE4bits.TMR2IE // bit 1
20055 #define TMR3IE PIE4bits.TMR3IE // bit 2
20056 #define TMR4IE PIE4bits.TMR4IE // bit 3
20057 #define TMR5IE PIE4bits.TMR5IE // bit 4
20058 #define TMR6IE PIE4bits.TMR6IE // bit 5
20060 #define TMR1GIE PIE5bits.TMR1GIE // bit 0
20061 #define TMR3GIE PIE5bits.TMR3GIE // bit 1
20062 #define TMR5GIE PIE5bits.TMR5GIE // bit 2
20063 #define CLC1IE PIE5bits.CLC1IE // bit 4
20064 #define CLC2IE PIE5bits.CLC2IE // bit 5
20065 #define CLC3IE PIE5bits.CLC3IE // bit 6
20066 #define CLC4IE PIE5bits.CLC4IE // bit 7
20068 #define CCP1IE PIE6bits.CCP1IE // bit 0
20069 #define CCP2IE PIE6bits.CCP2IE // bit 1
20070 #define CCP3IE PIE6bits.CCP3IE // bit 2
20071 #define CCP4IE PIE6bits.CCP4IE // bit 3
20072 #define CCP5IE PIE6bits.CCP5IE // bit 4
20074 #define CWG1IE PIE7bits.CWG1IE // bit 0
20075 #define CWG2IE PIE7bits.CWG2IE // bit 1
20076 #define CWG3IE PIE7bits.CWG3IE // bit 2
20077 #define NCO1IE PIE7bits.NCO1IE // bit 4, shadows bit in PIE7bits
20078 #define NCOIE PIE7bits.NCOIE // bit 4, shadows bit in PIE7bits
20079 #define NVMIE PIE7bits.NVMIE // bit 5
20080 #define CRCIE PIE7bits.CRCIE // bit 6
20081 #define SCANIE PIE7bits.SCANIE // bit 7
20083 #define SMT1IE PIE8bits.SMT1IE // bit 0
20084 #define SMT1PRAIE PIE8bits.SMT1PRAIE // bit 1
20085 #define SMT1PWAIE PIE8bits.SMT1PWAIE // bit 2
20086 #define SMT2IE PIE8bits.SMT2IE // bit 3
20087 #define SMT2PRAIE PIE8bits.SMT2PRAIE // bit 4
20088 #define SMT2PWAIE PIE8bits.SMT2PWAIE // bit 5
20090 #define INTF PIR0bits.INTF // bit 0
20091 #define IOCIF PIR0bits.IOCIF // bit 4
20092 #define TMR0IF PIR0bits.TMR0IF // bit 5
20094 #define ADIF PIR1bits.ADIF // bit 0
20095 #define ADTIF PIR1bits.ADTIF // bit 1
20096 #define CSWIF PIR1bits.CSWIF // bit 6
20097 #define OSFIF PIR1bits.OSFIF // bit 7
20099 #define C1IF PIR2bits.C1IF // bit 0
20100 #define C2IF PIR2bits.C2IF // bit 1
20101 #define ZCDIF PIR2bits.ZCDIF // bit 6
20103 #define SSP1IF PIR3bits.SSP1IF // bit 0
20104 #define BCL1IF PIR3bits.BCL1IF // bit 1
20105 #define SSP2IF PIR3bits.SSP2IF // bit 2
20106 #define BCL2IF PIR3bits.BCL2IF // bit 3
20107 #define TXIF PIR3bits.TXIF // bit 4
20108 #define RCIF PIR3bits.RCIF // bit 5
20110 #define TMR1IF PIR4bits.TMR1IF // bit 0
20111 #define TMR2IF PIR4bits.TMR2IF // bit 1
20112 #define TMR3IF PIR4bits.TMR3IF // bit 2
20113 #define TMR4IF PIR4bits.TMR4IF // bit 3
20114 #define TMR5IF PIR4bits.TMR5IF // bit 4
20115 #define TMR6IF PIR4bits.TMR6IF // bit 5
20117 #define TMR1GIF PIR5bits.TMR1GIF // bit 0
20118 #define TMR3GIF PIR5bits.TMR3GIF // bit 1
20119 #define TMR5GIF PIR5bits.TMR5GIF // bit 2
20120 #define CLC1IF PIR5bits.CLC1IF // bit 4
20121 #define CLC2IF PIR5bits.CLC2IF // bit 5
20122 #define CLC3IF PIR5bits.CLC3IF // bit 6
20123 #define CLC4IF PIR5bits.CLC4IF // bit 7
20125 #define CCP1IF PIR6bits.CCP1IF // bit 0
20126 #define CCP2IF PIR6bits.CCP2IF // bit 1
20127 #define CCP3IF PIR6bits.CCP3IF // bit 2
20128 #define CCP4IF PIR6bits.CCP4IF // bit 3
20129 #define CCP5IF PIR6bits.CCP5IF // bit 4
20131 #define CWG1IF PIR7bits.CWG1IF // bit 0
20132 #define CWG2IF PIR7bits.CWG2IF // bit 1
20133 #define CWG3IF PIR7bits.CWG3IF // bit 2
20134 #define NCO1IF PIR7bits.NCO1IF // bit 4, shadows bit in PIR7bits
20135 #define NCOIF PIR7bits.NCOIF // bit 4, shadows bit in PIR7bits
20136 #define NVMIF PIR7bits.NVMIF // bit 5
20137 #define CRCIF PIR7bits.CRCIF // bit 6
20138 #define SCANIF PIR7bits.SCANIF // bit 7
20140 #define SMT1IF PIR8bits.SMT1IF // bit 0
20141 #define SMT1PRAIF PIR8bits.SMT1PRAIF // bit 1
20142 #define SMT1PWAIF PIR8bits.SMT1PWAIF // bit 2
20143 #define SMT2IF PIR8bits.SMT2IF // bit 3
20144 #define SMT2PRAIF PIR8bits.SMT2PRAIF // bit 4
20145 #define SMT2PWAIF PIR8bits.SMT2PWAIF // bit 5
20147 #define IOCMD PMD0bits.IOCMD // bit 0
20148 #define CLKRMD PMD0bits.CLKRMD // bit 1
20149 #define NVMMD PMD0bits.NVMMD // bit 2
20150 #define SCANMD PMD0bits.SCANMD // bit 3
20151 #define CRCMD PMD0bits.CRCMD // bit 4
20152 #define FVRMD PMD0bits.FVRMD // bit 6
20153 #define SYSCMD PMD0bits.SYSCMD // bit 7
20155 #define TMR0MD PMD1bits.TMR0MD // bit 0
20156 #define TMR1MD PMD1bits.TMR1MD // bit 1
20157 #define TMR2MD PMD1bits.TMR2MD // bit 2
20158 #define TMR3MD PMD1bits.TMR3MD // bit 3
20159 #define TMR4MD PMD1bits.TMR4MD // bit 4
20160 #define TMR5MD PMD1bits.TMR5MD // bit 5
20161 #define TMR6MD PMD1bits.TMR6MD // bit 6
20162 #define NCOMD PMD1bits.NCOMD // bit 7, shadows bit in PMD1bits
20163 #define NCO1MD PMD1bits.NCO1MD // bit 7, shadows bit in PMD1bits
20165 #define ZCDMD PMD2bits.ZCDMD // bit 0
20166 #define CMP1MD PMD2bits.CMP1MD // bit 1
20167 #define CMP2MD PMD2bits.CMP2MD // bit 2
20168 #define ADCMD PMD2bits.ADCMD // bit 5
20169 #define DACMD PMD2bits.DACMD // bit 6
20171 #define CCP1MD PMD3bits.CCP1MD // bit 0
20172 #define CCP2MD PMD3bits.CCP2MD // bit 1
20173 #define CCP3MD PMD3bits.CCP3MD // bit 2
20174 #define CCP4MD PMD3bits.CCP4MD // bit 3
20175 #define CCP5MD PMD3bits.CCP5MD // bit 4
20176 #define PWM6MD PMD3bits.PWM6MD // bit 5
20177 #define PWM7MD PMD3bits.PWM7MD // bit 6
20179 #define CWG1MD PMD4bits.CWG1MD // bit 0
20180 #define CWG2MD PMD4bits.CWG2MD // bit 1
20181 #define CWG3MD PMD4bits.CWG3MD // bit 2
20182 #define MSSP1MD PMD4bits.MSSP1MD // bit 4
20183 #define MSSP2MD PMD4bits.MSSP2MD // bit 5
20184 #define UART1MD PMD4bits.UART1MD // bit 6
20186 #define DSMMD PMD5bits.DSMMD // bit 0
20187 #define CLC1MD PMD5bits.CLC1MD // bit 1
20188 #define CLC2MD PMD5bits.CLC2MD // bit 2
20189 #define CLC3MD PMD5bits.CLC3MD // bit 3
20190 #define CLC4MD PMD5bits.CLC4MD // bit 4
20191 #define SMT1MD PMD5bits.SMT1MD // bit 6
20192 #define SMT2MD PMD5bits.SMT2MD // bit 7
20194 #define RA0 PORTAbits.RA0 // bit 0
20195 #define RA1 PORTAbits.RA1 // bit 1
20196 #define RA2 PORTAbits.RA2 // bit 2
20197 #define RA3 PORTAbits.RA3 // bit 3
20198 #define RA4 PORTAbits.RA4 // bit 4
20199 #define RA5 PORTAbits.RA5 // bit 5
20200 #define RA6 PORTAbits.RA6 // bit 6
20201 #define RA7 PORTAbits.RA7 // bit 7
20203 #define RB0 PORTBbits.RB0 // bit 0
20204 #define RB1 PORTBbits.RB1 // bit 1
20205 #define RB2 PORTBbits.RB2 // bit 2
20206 #define RB3 PORTBbits.RB3 // bit 3
20207 #define RB4 PORTBbits.RB4 // bit 4
20208 #define RB5 PORTBbits.RB5 // bit 5
20209 #define RB6 PORTBbits.RB6 // bit 6
20210 #define RB7 PORTBbits.RB7 // bit 7
20212 #define RC0 PORTCbits.RC0 // bit 0
20213 #define RC1 PORTCbits.RC1 // bit 1
20214 #define RC2 PORTCbits.RC2 // bit 2
20215 #define RC3 PORTCbits.RC3 // bit 3
20216 #define RC4 PORTCbits.RC4 // bit 4
20217 #define RC5 PORTCbits.RC5 // bit 5
20218 #define RC6 PORTCbits.RC6 // bit 6
20219 #define RC7 PORTCbits.RC7 // bit 7
20221 #define RE3 PORTEbits.RE3 // bit 3
20223 #define PPSLOCKED PPSLOCKbits.PPSLOCKED // bit 0
20225 #define TMR0H0 PR0bits.TMR0H0 // bit 0, shadows bit in PR0bits
20226 #define T0PR0 PR0bits.T0PR0 // bit 0, shadows bit in PR0bits
20227 #define TMR0H1 PR0bits.TMR0H1 // bit 1, shadows bit in PR0bits
20228 #define T0PR1 PR0bits.T0PR1 // bit 1, shadows bit in PR0bits
20229 #define TMR0H2 PR0bits.TMR0H2 // bit 2, shadows bit in PR0bits
20230 #define T0PR2 PR0bits.T0PR2 // bit 2, shadows bit in PR0bits
20231 #define TMR0H3 PR0bits.TMR0H3 // bit 3, shadows bit in PR0bits
20232 #define T0PR3 PR0bits.T0PR3 // bit 3, shadows bit in PR0bits
20233 #define TMR0H4 PR0bits.TMR0H4 // bit 4, shadows bit in PR0bits
20234 #define T0PR4 PR0bits.T0PR4 // bit 4, shadows bit in PR0bits
20235 #define TMR0H5 PR0bits.TMR0H5 // bit 5, shadows bit in PR0bits
20236 #define T0PR5 PR0bits.T0PR5 // bit 5, shadows bit in PR0bits
20237 #define TMR0H6 PR0bits.TMR0H6 // bit 6, shadows bit in PR0bits
20238 #define T0PR6 PR0bits.T0PR6 // bit 6, shadows bit in PR0bits
20239 #define TMR0H7 PR0bits.TMR0H7 // bit 7, shadows bit in PR0bits
20240 #define T0PR7 PR0bits.T0PR7 // bit 7, shadows bit in PR0bits
20242 #define GVAL PR1bits.GVAL // bit 2, shadows bit in PR1bits
20243 #define T1GVAL PR1bits.T1GVAL // bit 2, shadows bit in PR1bits
20244 #define GGO_NOT_DONE PR1bits.GGO_NOT_DONE // bit 3, shadows bit in PR1bits
20245 #define T1GGO_NOT_DONE PR1bits.T1GGO_NOT_DONE // bit 3, shadows bit in PR1bits
20246 #define T1GGO PR1bits.T1GGO // bit 3, shadows bit in PR1bits
20247 #define GSPM PR1bits.GSPM // bit 4, shadows bit in PR1bits
20248 #define T1GSPM PR1bits.T1GSPM // bit 4, shadows bit in PR1bits
20249 #define GTM PR1bits.GTM // bit 5, shadows bit in PR1bits
20250 #define T1GTM PR1bits.T1GTM // bit 5, shadows bit in PR1bits
20251 #define GPOL PR1bits.GPOL // bit 6, shadows bit in PR1bits
20252 #define T1GPOL PR1bits.T1GPOL // bit 6, shadows bit in PR1bits
20253 #define GE PR1bits.GE // bit 7, shadows bit in PR1bits
20254 #define T1GE PR1bits.T1GE // bit 7, shadows bit in PR1bits
20256 #define DC2 PWM6DCHbits.DC2 // bit 0, shadows bit in PWM6DCHbits
20257 #define PWM6DC2 PWM6DCHbits.PWM6DC2 // bit 0, shadows bit in PWM6DCHbits
20258 #define PWMPW2 PWM6DCHbits.PWMPW2 // bit 0, shadows bit in PWM6DCHbits
20259 #define DC3 PWM6DCHbits.DC3 // bit 1, shadows bit in PWM6DCHbits
20260 #define PWM6DC3 PWM6DCHbits.PWM6DC3 // bit 1, shadows bit in PWM6DCHbits
20261 #define PWMPW3 PWM6DCHbits.PWMPW3 // bit 1, shadows bit in PWM6DCHbits
20262 #define DC4 PWM6DCHbits.DC4 // bit 2, shadows bit in PWM6DCHbits
20263 #define PWM6DC4 PWM6DCHbits.PWM6DC4 // bit 2, shadows bit in PWM6DCHbits
20264 #define PWMPW4 PWM6DCHbits.PWMPW4 // bit 2, shadows bit in PWM6DCHbits
20265 #define DC5 PWM6DCHbits.DC5 // bit 3, shadows bit in PWM6DCHbits
20266 #define PWM6DC5 PWM6DCHbits.PWM6DC5 // bit 3, shadows bit in PWM6DCHbits
20267 #define PWMPW5 PWM6DCHbits.PWMPW5 // bit 3, shadows bit in PWM6DCHbits
20268 #define DC6 PWM6DCHbits.DC6 // bit 4, shadows bit in PWM6DCHbits
20269 #define PWM6DC6 PWM6DCHbits.PWM6DC6 // bit 4, shadows bit in PWM6DCHbits
20270 #define PWMPW6 PWM6DCHbits.PWMPW6 // bit 4, shadows bit in PWM6DCHbits
20271 #define DC7 PWM6DCHbits.DC7 // bit 5, shadows bit in PWM6DCHbits
20272 #define PWM6DC7 PWM6DCHbits.PWM6DC7 // bit 5, shadows bit in PWM6DCHbits
20273 #define PWMPW7 PWM6DCHbits.PWMPW7 // bit 5, shadows bit in PWM6DCHbits
20274 #define DC8 PWM6DCHbits.DC8 // bit 6, shadows bit in PWM6DCHbits
20275 #define PWM6DC8 PWM6DCHbits.PWM6DC8 // bit 6, shadows bit in PWM6DCHbits
20276 #define PWMPW8 PWM6DCHbits.PWMPW8 // bit 6, shadows bit in PWM6DCHbits
20277 #define DC9 PWM6DCHbits.DC9 // bit 7, shadows bit in PWM6DCHbits
20278 #define PWM6DC9 PWM6DCHbits.PWM6DC9 // bit 7, shadows bit in PWM6DCHbits
20279 #define PWMPW9 PWM6DCHbits.PWMPW9 // bit 7, shadows bit in PWM6DCHbits
20281 #define DC0 PWM6DCLbits.DC0 // bit 6, shadows bit in PWM6DCLbits
20282 #define PWM6DC0 PWM6DCLbits.PWM6DC0 // bit 6, shadows bit in PWM6DCLbits
20283 #define PWMPW0 PWM6DCLbits.PWMPW0 // bit 6, shadows bit in PWM6DCLbits
20284 #define DC1 PWM6DCLbits.DC1 // bit 7, shadows bit in PWM6DCLbits
20285 #define PWM6DC1 PWM6DCLbits.PWM6DC1 // bit 7, shadows bit in PWM6DCLbits
20286 #define PWMPW1 PWM6DCLbits.PWMPW1 // bit 7, shadows bit in PWM6DCLbits
20288 #define RA0PPS0 RA0PPSbits.RA0PPS0 // bit 0
20289 #define RA0PPS1 RA0PPSbits.RA0PPS1 // bit 1
20290 #define RA0PPS2 RA0PPSbits.RA0PPS2 // bit 2
20291 #define RA0PPS3 RA0PPSbits.RA0PPS3 // bit 3
20292 #define RA0PPS4 RA0PPSbits.RA0PPS4 // bit 4
20293 #define RA0PPS5 RA0PPSbits.RA0PPS5 // bit 5
20295 #define RA1PPS0 RA1PPSbits.RA1PPS0 // bit 0
20296 #define RA1PPS1 RA1PPSbits.RA1PPS1 // bit 1
20297 #define RA1PPS2 RA1PPSbits.RA1PPS2 // bit 2
20298 #define RA1PPS3 RA1PPSbits.RA1PPS3 // bit 3
20299 #define RA1PPS4 RA1PPSbits.RA1PPS4 // bit 4
20300 #define RA1PPS5 RA1PPSbits.RA1PPS5 // bit 5
20302 #define RA2PPS0 RA2PPSbits.RA2PPS0 // bit 0
20303 #define RA2PPS1 RA2PPSbits.RA2PPS1 // bit 1
20304 #define RA2PPS2 RA2PPSbits.RA2PPS2 // bit 2
20305 #define RA2PPS3 RA2PPSbits.RA2PPS3 // bit 3
20306 #define RA2PPS4 RA2PPSbits.RA2PPS4 // bit 4
20307 #define RA2PPS5 RA2PPSbits.RA2PPS5 // bit 5
20309 #define RA3PPS0 RA3PPSbits.RA3PPS0 // bit 0
20310 #define RA3PPS1 RA3PPSbits.RA3PPS1 // bit 1
20311 #define RA3PPS2 RA3PPSbits.RA3PPS2 // bit 2
20312 #define RA3PPS3 RA3PPSbits.RA3PPS3 // bit 3
20313 #define RA3PPS4 RA3PPSbits.RA3PPS4 // bit 4
20314 #define RA3PPS5 RA3PPSbits.RA3PPS5 // bit 5
20316 #define RA4PPS0 RA4PPSbits.RA4PPS0 // bit 0
20317 #define RA4PPS1 RA4PPSbits.RA4PPS1 // bit 1
20318 #define RA4PPS2 RA4PPSbits.RA4PPS2 // bit 2
20319 #define RA4PPS3 RA4PPSbits.RA4PPS3 // bit 3
20320 #define RA4PPS4 RA4PPSbits.RA4PPS4 // bit 4
20321 #define RA4PPS5 RA4PPSbits.RA4PPS5 // bit 5
20323 #define RA5PPS0 RA5PPSbits.RA5PPS0 // bit 0
20324 #define RA5PPS1 RA5PPSbits.RA5PPS1 // bit 1
20325 #define RA5PPS2 RA5PPSbits.RA5PPS2 // bit 2
20326 #define RA5PPS3 RA5PPSbits.RA5PPS3 // bit 3
20327 #define RA5PPS4 RA5PPSbits.RA5PPS4 // bit 4
20328 #define RA5PPS5 RA5PPSbits.RA5PPS5 // bit 5
20330 #define RA6PPS0 RA6PPSbits.RA6PPS0 // bit 0
20331 #define RA6PPS1 RA6PPSbits.RA6PPS1 // bit 1
20332 #define RA6PPS2 RA6PPSbits.RA6PPS2 // bit 2
20333 #define RA6PPS3 RA6PPSbits.RA6PPS3 // bit 3
20334 #define RA6PPS4 RA6PPSbits.RA6PPS4 // bit 4
20335 #define RA6PPS5 RA6PPSbits.RA6PPS5 // bit 5
20337 #define RA7PPS0 RA7PPSbits.RA7PPS0 // bit 0
20338 #define RA7PPS1 RA7PPSbits.RA7PPS1 // bit 1
20339 #define RA7PPS2 RA7PPSbits.RA7PPS2 // bit 2
20340 #define RA7PPS3 RA7PPSbits.RA7PPS3 // bit 3
20341 #define RA7PPS4 RA7PPSbits.RA7PPS4 // bit 4
20342 #define RA7PPS5 RA7PPSbits.RA7PPS5 // bit 5
20344 #define RB0PPS0 RB0PPSbits.RB0PPS0 // bit 0
20345 #define RB0PPS1 RB0PPSbits.RB0PPS1 // bit 1
20346 #define RB0PPS2 RB0PPSbits.RB0PPS2 // bit 2
20347 #define RB0PPS3 RB0PPSbits.RB0PPS3 // bit 3
20348 #define RB0PPS4 RB0PPSbits.RB0PPS4 // bit 4
20349 #define RB0PPS5 RB0PPSbits.RB0PPS5 // bit 5
20351 #define RB1PPS0 RB1PPSbits.RB1PPS0 // bit 0
20352 #define RB1PPS1 RB1PPSbits.RB1PPS1 // bit 1
20353 #define RB1PPS2 RB1PPSbits.RB1PPS2 // bit 2
20354 #define RB1PPS3 RB1PPSbits.RB1PPS3 // bit 3
20355 #define RB1PPS4 RB1PPSbits.RB1PPS4 // bit 4
20356 #define RB1PPS5 RB1PPSbits.RB1PPS5 // bit 5
20358 #define RB2PPS0 RB2PPSbits.RB2PPS0 // bit 0
20359 #define RB2PPS1 RB2PPSbits.RB2PPS1 // bit 1
20360 #define RB2PPS2 RB2PPSbits.RB2PPS2 // bit 2
20361 #define RB2PPS3 RB2PPSbits.RB2PPS3 // bit 3
20362 #define RB2PPS4 RB2PPSbits.RB2PPS4 // bit 4
20363 #define RB2PPS5 RB2PPSbits.RB2PPS5 // bit 5
20365 #define RB3PPS0 RB3PPSbits.RB3PPS0 // bit 0
20366 #define RB3PPS1 RB3PPSbits.RB3PPS1 // bit 1
20367 #define RB3PPS2 RB3PPSbits.RB3PPS2 // bit 2
20368 #define RB3PPS3 RB3PPSbits.RB3PPS3 // bit 3
20369 #define RB3PPS4 RB3PPSbits.RB3PPS4 // bit 4
20370 #define RB3PPS5 RB3PPSbits.RB3PPS5 // bit 5
20372 #define RB4PPS0 RB4PPSbits.RB4PPS0 // bit 0
20373 #define RB4PPS1 RB4PPSbits.RB4PPS1 // bit 1
20374 #define RB4PPS2 RB4PPSbits.RB4PPS2 // bit 2
20375 #define RB4PPS3 RB4PPSbits.RB4PPS3 // bit 3
20376 #define RB4PPS4 RB4PPSbits.RB4PPS4 // bit 4
20377 #define RB4PPS5 RB4PPSbits.RB4PPS5 // bit 5
20379 #define RB5PPS0 RB5PPSbits.RB5PPS0 // bit 0
20380 #define RB5PPS1 RB5PPSbits.RB5PPS1 // bit 1
20381 #define RB5PPS2 RB5PPSbits.RB5PPS2 // bit 2
20382 #define RB5PPS3 RB5PPSbits.RB5PPS3 // bit 3
20383 #define RB5PPS4 RB5PPSbits.RB5PPS4 // bit 4
20384 #define RB5PPS5 RB5PPSbits.RB5PPS5 // bit 5
20386 #define RB6PPS0 RB6PPSbits.RB6PPS0 // bit 0
20387 #define RB6PPS1 RB6PPSbits.RB6PPS1 // bit 1
20388 #define RB6PPS2 RB6PPSbits.RB6PPS2 // bit 2
20389 #define RB6PPS3 RB6PPSbits.RB6PPS3 // bit 3
20390 #define RB6PPS4 RB6PPSbits.RB6PPS4 // bit 4
20391 #define RB6PPS5 RB6PPSbits.RB6PPS5 // bit 5
20393 #define RB7PPS0 RB7PPSbits.RB7PPS0 // bit 0
20394 #define RB7PPS1 RB7PPSbits.RB7PPS1 // bit 1
20395 #define RB7PPS2 RB7PPSbits.RB7PPS2 // bit 2
20396 #define RB7PPS3 RB7PPSbits.RB7PPS3 // bit 3
20397 #define RB7PPS4 RB7PPSbits.RB7PPS4 // bit 4
20398 #define RB7PPS5 RB7PPSbits.RB7PPS5 // bit 5
20400 #define RC0PPS0 RC0PPSbits.RC0PPS0 // bit 0
20401 #define RC0PPS1 RC0PPSbits.RC0PPS1 // bit 1
20402 #define RC0PPS2 RC0PPSbits.RC0PPS2 // bit 2
20403 #define RC0PPS3 RC0PPSbits.RC0PPS3 // bit 3
20404 #define RC0PPS4 RC0PPSbits.RC0PPS4 // bit 4
20405 #define RC0PPS5 RC0PPSbits.RC0PPS5 // bit 5
20407 #define RC1PPS0 RC1PPSbits.RC1PPS0 // bit 0
20408 #define RC1PPS1 RC1PPSbits.RC1PPS1 // bit 1
20409 #define RC1PPS2 RC1PPSbits.RC1PPS2 // bit 2
20410 #define RC1PPS3 RC1PPSbits.RC1PPS3 // bit 3
20411 #define RC1PPS4 RC1PPSbits.RC1PPS4 // bit 4
20412 #define RC1PPS5 RC1PPSbits.RC1PPS5 // bit 5
20414 #define RX9D RC1STAbits.RX9D // bit 0
20415 #define OERR RC1STAbits.OERR // bit 1
20416 #define FERR RC1STAbits.FERR // bit 2
20417 #define ADDEN RC1STAbits.ADDEN // bit 3
20418 #define CREN RC1STAbits.CREN // bit 4
20419 #define SREN RC1STAbits.SREN // bit 5
20420 #define RX9 RC1STAbits.RX9 // bit 6
20421 #define SPEN RC1STAbits.SPEN // bit 7
20423 #define RC2PPS0 RC2PPSbits.RC2PPS0 // bit 0
20424 #define RC2PPS1 RC2PPSbits.RC2PPS1 // bit 1
20425 #define RC2PPS2 RC2PPSbits.RC2PPS2 // bit 2
20426 #define RC2PPS3 RC2PPSbits.RC2PPS3 // bit 3
20427 #define RC2PPS4 RC2PPSbits.RC2PPS4 // bit 4
20428 #define RC2PPS5 RC2PPSbits.RC2PPS5 // bit 5
20430 #define RC3PPS0 RC3PPSbits.RC3PPS0 // bit 0
20431 #define RC3PPS1 RC3PPSbits.RC3PPS1 // bit 1
20432 #define RC3PPS2 RC3PPSbits.RC3PPS2 // bit 2
20433 #define RC3PPS3 RC3PPSbits.RC3PPS3 // bit 3
20434 #define RC3PPS4 RC3PPSbits.RC3PPS4 // bit 4
20435 #define RC3PPS5 RC3PPSbits.RC3PPS5 // bit 5
20437 #define RC4PPS0 RC4PPSbits.RC4PPS0 // bit 0
20438 #define RC4PPS1 RC4PPSbits.RC4PPS1 // bit 1
20439 #define RC4PPS2 RC4PPSbits.RC4PPS2 // bit 2
20440 #define RC4PPS3 RC4PPSbits.RC4PPS3 // bit 3
20441 #define RC4PPS4 RC4PPSbits.RC4PPS4 // bit 4
20442 #define RC4PPS5 RC4PPSbits.RC4PPS5 // bit 5
20444 #define RC5PPS0 RC5PPSbits.RC5PPS0 // bit 0
20445 #define RC5PPS1 RC5PPSbits.RC5PPS1 // bit 1
20446 #define RC5PPS2 RC5PPSbits.RC5PPS2 // bit 2
20447 #define RC5PPS3 RC5PPSbits.RC5PPS3 // bit 3
20448 #define RC5PPS4 RC5PPSbits.RC5PPS4 // bit 4
20449 #define RC5PPS5 RC5PPSbits.RC5PPS5 // bit 5
20451 #define RC6PPS0 RC6PPSbits.RC6PPS0 // bit 0
20452 #define RC6PPS1 RC6PPSbits.RC6PPS1 // bit 1
20453 #define RC6PPS2 RC6PPSbits.RC6PPS2 // bit 2
20454 #define RC6PPS3 RC6PPSbits.RC6PPS3 // bit 3
20455 #define RC6PPS4 RC6PPSbits.RC6PPS4 // bit 4
20456 #define RC6PPS5 RC6PPSbits.RC6PPS5 // bit 5
20458 #define RC7PPS0 RC7PPSbits.RC7PPS0 // bit 0
20459 #define RC7PPS1 RC7PPSbits.RC7PPS1 // bit 1
20460 #define RC7PPS2 RC7PPSbits.RC7PPS2 // bit 2
20461 #define RC7PPS3 RC7PPSbits.RC7PPS3 // bit 3
20462 #define RC7PPS4 RC7PPSbits.RC7PPS4 // bit 4
20463 #define RC7PPS5 RC7PPSbits.RC7PPS5 // bit 5
20465 #define RXPPS0 RXPPSbits.RXPPS0 // bit 0
20466 #define RXPPS1 RXPPSbits.RXPPS1 // bit 1
20467 #define RXPPS2 RXPPSbits.RXPPS2 // bit 2
20468 #define RXPPS3 RXPPSbits.RXPPS3 // bit 3
20469 #define RXPPS4 RXPPSbits.RXPPS4 // bit 4
20471 #define HADR8 SCANHADRHbits.HADR8 // bit 0, shadows bit in SCANHADRHbits
20472 #define SCANHADR8 SCANHADRHbits.SCANHADR8 // bit 0, shadows bit in SCANHADRHbits
20473 #define HADR9 SCANHADRHbits.HADR9 // bit 1, shadows bit in SCANHADRHbits
20474 #define SCANHADR9 SCANHADRHbits.SCANHADR9 // bit 1, shadows bit in SCANHADRHbits
20475 #define HADR10 SCANHADRHbits.HADR10 // bit 2, shadows bit in SCANHADRHbits
20476 #define SCANHADR10 SCANHADRHbits.SCANHADR10 // bit 2, shadows bit in SCANHADRHbits
20477 #define HADR11 SCANHADRHbits.HADR11 // bit 3, shadows bit in SCANHADRHbits
20478 #define SCANHADR11 SCANHADRHbits.SCANHADR11 // bit 3, shadows bit in SCANHADRHbits
20479 #define HADR12 SCANHADRHbits.HADR12 // bit 4, shadows bit in SCANHADRHbits
20480 #define SCANHADR12 SCANHADRHbits.SCANHADR12 // bit 4, shadows bit in SCANHADRHbits
20481 #define HADR13 SCANHADRHbits.HADR13 // bit 5, shadows bit in SCANHADRHbits
20482 #define SCANHADR13 SCANHADRHbits.SCANHADR13 // bit 5, shadows bit in SCANHADRHbits
20483 #define HADR14 SCANHADRHbits.HADR14 // bit 6, shadows bit in SCANHADRHbits
20484 #define SCANHADR14 SCANHADRHbits.SCANHADR14 // bit 6, shadows bit in SCANHADRHbits
20485 #define HADR15 SCANHADRHbits.HADR15 // bit 7, shadows bit in SCANHADRHbits
20486 #define SCANHADR15 SCANHADRHbits.SCANHADR15 // bit 7, shadows bit in SCANHADRHbits
20488 #define HADR0 SCANHADRLbits.HADR0 // bit 0, shadows bit in SCANHADRLbits
20489 #define SCANHADR0 SCANHADRLbits.SCANHADR0 // bit 0, shadows bit in SCANHADRLbits
20490 #define HADR1 SCANHADRLbits.HADR1 // bit 1, shadows bit in SCANHADRLbits
20491 #define SCANHADR1 SCANHADRLbits.SCANHADR1 // bit 1, shadows bit in SCANHADRLbits
20492 #define HADR2 SCANHADRLbits.HADR2 // bit 2, shadows bit in SCANHADRLbits
20493 #define SCANHADR2 SCANHADRLbits.SCANHADR2 // bit 2, shadows bit in SCANHADRLbits
20494 #define HADR3 SCANHADRLbits.HADR3 // bit 3, shadows bit in SCANHADRLbits
20495 #define SCANHADR3 SCANHADRLbits.SCANHADR3 // bit 3, shadows bit in SCANHADRLbits
20496 #define HADR4 SCANHADRLbits.HADR4 // bit 4, shadows bit in SCANHADRLbits
20497 #define SCANHADR4 SCANHADRLbits.SCANHADR4 // bit 4, shadows bit in SCANHADRLbits
20498 #define HADR5 SCANHADRLbits.HADR5 // bit 5, shadows bit in SCANHADRLbits
20499 #define SCANHADR5 SCANHADRLbits.SCANHADR5 // bit 5, shadows bit in SCANHADRLbits
20500 #define HADR6 SCANHADRLbits.HADR6 // bit 6, shadows bit in SCANHADRLbits
20501 #define SCANHADR6 SCANHADRLbits.SCANHADR6 // bit 6, shadows bit in SCANHADRLbits
20502 #define HADR7 SCANHADRLbits.HADR7 // bit 7, shadows bit in SCANHADRLbits
20503 #define SCANHADR7 SCANHADRLbits.SCANHADR7 // bit 7, shadows bit in SCANHADRLbits
20505 #define LADR8 SCANLADRHbits.LADR8 // bit 0, shadows bit in SCANLADRHbits
20506 #define SCANLADR8 SCANLADRHbits.SCANLADR8 // bit 0, shadows bit in SCANLADRHbits
20507 #define LADR9 SCANLADRHbits.LADR9 // bit 1, shadows bit in SCANLADRHbits
20508 #define SCANLADR9 SCANLADRHbits.SCANLADR9 // bit 1, shadows bit in SCANLADRHbits
20509 #define LADR10 SCANLADRHbits.LADR10 // bit 2, shadows bit in SCANLADRHbits
20510 #define SCANLADR10 SCANLADRHbits.SCANLADR10 // bit 2, shadows bit in SCANLADRHbits
20511 #define LADR11 SCANLADRHbits.LADR11 // bit 3, shadows bit in SCANLADRHbits
20512 #define SCANLADR11 SCANLADRHbits.SCANLADR11 // bit 3, shadows bit in SCANLADRHbits
20513 #define LADR12 SCANLADRHbits.LADR12 // bit 4, shadows bit in SCANLADRHbits
20514 #define SCANLADR12 SCANLADRHbits.SCANLADR12 // bit 4, shadows bit in SCANLADRHbits
20515 #define LADR13 SCANLADRHbits.LADR13 // bit 5, shadows bit in SCANLADRHbits
20516 #define SCANLADR13 SCANLADRHbits.SCANLADR13 // bit 5, shadows bit in SCANLADRHbits
20517 #define LADR14 SCANLADRHbits.LADR14 // bit 6, shadows bit in SCANLADRHbits
20518 #define SCANLADR14 SCANLADRHbits.SCANLADR14 // bit 6, shadows bit in SCANLADRHbits
20519 #define LADR15 SCANLADRHbits.LADR15 // bit 7, shadows bit in SCANLADRHbits
20520 #define SCANLADR15 SCANLADRHbits.SCANLADR15 // bit 7, shadows bit in SCANLADRHbits
20522 #define LADR0 SCANLADRLbits.LADR0 // bit 0, shadows bit in SCANLADRLbits
20523 #define SCANLADR0 SCANLADRLbits.SCANLADR0 // bit 0, shadows bit in SCANLADRLbits
20524 #define LADR1 SCANLADRLbits.LADR1 // bit 1, shadows bit in SCANLADRLbits
20525 #define SCANLADR1 SCANLADRLbits.SCANLADR1 // bit 1, shadows bit in SCANLADRLbits
20526 #define LADR2 SCANLADRLbits.LADR2 // bit 2, shadows bit in SCANLADRLbits
20527 #define SCANLADR2 SCANLADRLbits.SCANLADR2 // bit 2, shadows bit in SCANLADRLbits
20528 #define LADR3 SCANLADRLbits.LADR3 // bit 3, shadows bit in SCANLADRLbits
20529 #define SCANLADR3 SCANLADRLbits.SCANLADR3 // bit 3, shadows bit in SCANLADRLbits
20530 #define LADR4 SCANLADRLbits.LADR4 // bit 4, shadows bit in SCANLADRLbits
20531 #define SCANLADR4 SCANLADRLbits.SCANLADR4 // bit 4, shadows bit in SCANLADRLbits
20532 #define LADR5 SCANLADRLbits.LADR5 // bit 5, shadows bit in SCANLADRLbits
20533 #define SCANLADR5 SCANLADRLbits.SCANLADR5 // bit 5, shadows bit in SCANLADRLbits
20534 #define LADR6 SCANLADRLbits.LADR6 // bit 6, shadows bit in SCANLADRLbits
20535 #define SCANLADR6 SCANLADRLbits.SCANLADR6 // bit 6, shadows bit in SCANLADRLbits
20536 #define LADR7 SCANLADRLbits.LADR7 // bit 7, shadows bit in SCANLADRLbits
20537 #define SCANLADR7 SCANLADRLbits.SCANLADR7 // bit 7, shadows bit in SCANLADRLbits
20539 #define TSEL0 SCANTRIGbits.TSEL0 // bit 0, shadows bit in SCANTRIGbits
20540 #define SCANTSEL0 SCANTRIGbits.SCANTSEL0 // bit 0, shadows bit in SCANTRIGbits
20541 #define TSEL1 SCANTRIGbits.TSEL1 // bit 1, shadows bit in SCANTRIGbits
20542 #define SCANTSEL1 SCANTRIGbits.SCANTSEL1 // bit 1, shadows bit in SCANTRIGbits
20543 #define TSEL2 SCANTRIGbits.TSEL2 // bit 2, shadows bit in SCANTRIGbits
20544 #define SCANTSEL2 SCANTRIGbits.SCANTSEL2 // bit 2, shadows bit in SCANTRIGbits
20545 #define TSEL3 SCANTRIGbits.TSEL3 // bit 3, shadows bit in SCANTRIGbits
20546 #define SCANTSEL3 SCANTRIGbits.SCANTSEL3 // bit 3, shadows bit in SCANTRIGbits
20548 #define SLRA0 SLRCONAbits.SLRA0 // bit 0
20549 #define SLRA1 SLRCONAbits.SLRA1 // bit 1
20550 #define SLRA2 SLRCONAbits.SLRA2 // bit 2
20551 #define SLRA3 SLRCONAbits.SLRA3 // bit 3
20552 #define SLRA4 SLRCONAbits.SLRA4 // bit 4
20553 #define SLRA5 SLRCONAbits.SLRA5 // bit 5
20554 #define SLRA6 SLRCONAbits.SLRA6 // bit 6
20555 #define SLRA7 SLRCONAbits.SLRA7 // bit 7
20557 #define SLRB0 SLRCONBbits.SLRB0 // bit 0
20558 #define SLRB1 SLRCONBbits.SLRB1 // bit 1
20559 #define SLRB2 SLRCONBbits.SLRB2 // bit 2
20560 #define SLRB3 SLRCONBbits.SLRB3 // bit 3
20561 #define SLRB4 SLRCONBbits.SLRB4 // bit 4
20562 #define SLRB5 SLRCONBbits.SLRB5 // bit 5
20563 #define SLRB6 SLRCONBbits.SLRB6 // bit 6
20564 #define SLRB7 SLRCONBbits.SLRB7 // bit 7
20566 #define SLRC0 SLRCONCbits.SLRC0 // bit 0
20567 #define SLRC1 SLRCONCbits.SLRC1 // bit 1
20568 #define SLRC2 SLRCONCbits.SLRC2 // bit 2
20569 #define SLRC3 SLRCONCbits.SLRC3 // bit 3
20570 #define SLRC4 SLRCONCbits.SLRC4 // bit 4
20571 #define SLRC5 SLRCONCbits.SLRC5 // bit 5
20572 #define SLRC6 SLRCONCbits.SLRC6 // bit 6
20573 #define SLRC7 SLRCONCbits.SLRC7 // bit 7
20575 #define CSEL0 SMT1CLKbits.CSEL0 // bit 0, shadows bit in SMT1CLKbits
20576 #define SMT1CSEL0 SMT1CLKbits.SMT1CSEL0 // bit 0, shadows bit in SMT1CLKbits
20577 #define CSEL1 SMT1CLKbits.CSEL1 // bit 1, shadows bit in SMT1CLKbits
20578 #define SMT1CSEL1 SMT1CLKbits.SMT1CSEL1 // bit 1, shadows bit in SMT1CLKbits
20579 #define CSEL2 SMT1CLKbits.CSEL2 // bit 2, shadows bit in SMT1CLKbits
20580 #define SMT1CSEL2 SMT1CLKbits.SMT1CSEL2 // bit 2, shadows bit in SMT1CLKbits
20582 #define CPR8 SMT1CPRHbits.CPR8 // bit 0, shadows bit in SMT1CPRHbits
20583 #define SMT1CPR8 SMT1CPRHbits.SMT1CPR8 // bit 0, shadows bit in SMT1CPRHbits
20584 #define CPR9 SMT1CPRHbits.CPR9 // bit 1, shadows bit in SMT1CPRHbits
20585 #define SMT1CPR9 SMT1CPRHbits.SMT1CPR9 // bit 1, shadows bit in SMT1CPRHbits
20586 #define CPR10 SMT1CPRHbits.CPR10 // bit 2, shadows bit in SMT1CPRHbits
20587 #define SMT1CPR10 SMT1CPRHbits.SMT1CPR10 // bit 2, shadows bit in SMT1CPRHbits
20588 #define CPR11 SMT1CPRHbits.CPR11 // bit 3, shadows bit in SMT1CPRHbits
20589 #define SMT1CPR11 SMT1CPRHbits.SMT1CPR11 // bit 3, shadows bit in SMT1CPRHbits
20590 #define CPR12 SMT1CPRHbits.CPR12 // bit 4, shadows bit in SMT1CPRHbits
20591 #define SMT1CPR12 SMT1CPRHbits.SMT1CPR12 // bit 4, shadows bit in SMT1CPRHbits
20592 #define CPR13 SMT1CPRHbits.CPR13 // bit 5, shadows bit in SMT1CPRHbits
20593 #define SMT1CPR13 SMT1CPRHbits.SMT1CPR13 // bit 5, shadows bit in SMT1CPRHbits
20594 #define CPR14 SMT1CPRHbits.CPR14 // bit 6, shadows bit in SMT1CPRHbits
20595 #define SMT1CPR14 SMT1CPRHbits.SMT1CPR14 // bit 6, shadows bit in SMT1CPRHbits
20596 #define CPR15 SMT1CPRHbits.CPR15 // bit 7, shadows bit in SMT1CPRHbits
20597 #define SMT1CPR15 SMT1CPRHbits.SMT1CPR15 // bit 7, shadows bit in SMT1CPRHbits
20599 #define CPR0 SMT1CPRLbits.CPR0 // bit 0
20600 #define CPR1 SMT1CPRLbits.CPR1 // bit 1
20601 #define CPR2 SMT1CPRLbits.CPR2 // bit 2
20602 #define CPR3 SMT1CPRLbits.CPR3 // bit 3
20603 #define CPR4 SMT1CPRLbits.CPR4 // bit 4
20604 #define CPR5 SMT1CPRLbits.CPR5 // bit 5
20605 #define CPR6 SMT1CPRLbits.CPR6 // bit 6
20606 #define CPR7 SMT1CPRLbits.CPR7 // bit 7
20608 #define CPR16 SMT1CPRUbits.CPR16 // bit 0, shadows bit in SMT1CPRUbits
20609 #define SMT1CPR16 SMT1CPRUbits.SMT1CPR16 // bit 0, shadows bit in SMT1CPRUbits
20610 #define CPR17 SMT1CPRUbits.CPR17 // bit 1, shadows bit in SMT1CPRUbits
20611 #define SMT1CPR17 SMT1CPRUbits.SMT1CPR17 // bit 1, shadows bit in SMT1CPRUbits
20612 #define CPR18 SMT1CPRUbits.CPR18 // bit 2, shadows bit in SMT1CPRUbits
20613 #define SMT1CPR18 SMT1CPRUbits.SMT1CPR18 // bit 2, shadows bit in SMT1CPRUbits
20614 #define CPR19 SMT1CPRUbits.CPR19 // bit 3, shadows bit in SMT1CPRUbits
20615 #define SMT1CPR19 SMT1CPRUbits.SMT1CPR19 // bit 3, shadows bit in SMT1CPRUbits
20616 #define CPR20 SMT1CPRUbits.CPR20 // bit 4, shadows bit in SMT1CPRUbits
20617 #define SMT1CPR20 SMT1CPRUbits.SMT1CPR20 // bit 4, shadows bit in SMT1CPRUbits
20618 #define CPR21 SMT1CPRUbits.CPR21 // bit 5, shadows bit in SMT1CPRUbits
20619 #define SMT1CPR21 SMT1CPRUbits.SMT1CPR21 // bit 5, shadows bit in SMT1CPRUbits
20620 #define CPR22 SMT1CPRUbits.CPR22 // bit 6, shadows bit in SMT1CPRUbits
20621 #define SMT1CPR22 SMT1CPRUbits.SMT1CPR22 // bit 6, shadows bit in SMT1CPRUbits
20622 #define CPR23 SMT1CPRUbits.CPR23 // bit 7, shadows bit in SMT1CPRUbits
20623 #define SMT1CPR23 SMT1CPRUbits.SMT1CPR23 // bit 7, shadows bit in SMT1CPRUbits
20625 #define CPW8 SMT1CPWHbits.CPW8 // bit 0, shadows bit in SMT1CPWHbits
20626 #define SMT1CPW8 SMT1CPWHbits.SMT1CPW8 // bit 0, shadows bit in SMT1CPWHbits
20627 #define CPW9 SMT1CPWHbits.CPW9 // bit 1, shadows bit in SMT1CPWHbits
20628 #define SMT1CPW9 SMT1CPWHbits.SMT1CPW9 // bit 1, shadows bit in SMT1CPWHbits
20629 #define CPW10 SMT1CPWHbits.CPW10 // bit 2, shadows bit in SMT1CPWHbits
20630 #define SMT1CPW10 SMT1CPWHbits.SMT1CPW10 // bit 2, shadows bit in SMT1CPWHbits
20631 #define CPW11 SMT1CPWHbits.CPW11 // bit 3, shadows bit in SMT1CPWHbits
20632 #define SMT1CPW11 SMT1CPWHbits.SMT1CPW11 // bit 3, shadows bit in SMT1CPWHbits
20633 #define CPW12 SMT1CPWHbits.CPW12 // bit 4, shadows bit in SMT1CPWHbits
20634 #define SMT1CPW12 SMT1CPWHbits.SMT1CPW12 // bit 4, shadows bit in SMT1CPWHbits
20635 #define CPW13 SMT1CPWHbits.CPW13 // bit 5, shadows bit in SMT1CPWHbits
20636 #define SMT1CPW13 SMT1CPWHbits.SMT1CPW13 // bit 5, shadows bit in SMT1CPWHbits
20637 #define CPW14 SMT1CPWHbits.CPW14 // bit 6, shadows bit in SMT1CPWHbits
20638 #define SMT1CPW14 SMT1CPWHbits.SMT1CPW14 // bit 6, shadows bit in SMT1CPWHbits
20639 #define CPW15 SMT1CPWHbits.CPW15 // bit 7, shadows bit in SMT1CPWHbits
20640 #define SMT1CPW15 SMT1CPWHbits.SMT1CPW15 // bit 7, shadows bit in SMT1CPWHbits
20642 #define CPW0 SMT1CPWLbits.CPW0 // bit 0, shadows bit in SMT1CPWLbits
20643 #define SMT1CPW0 SMT1CPWLbits.SMT1CPW0 // bit 0, shadows bit in SMT1CPWLbits
20644 #define CPW1 SMT1CPWLbits.CPW1 // bit 1, shadows bit in SMT1CPWLbits
20645 #define SMT1CPW1 SMT1CPWLbits.SMT1CPW1 // bit 1, shadows bit in SMT1CPWLbits
20646 #define CPW2 SMT1CPWLbits.CPW2 // bit 2, shadows bit in SMT1CPWLbits
20647 #define SMT1CPW2 SMT1CPWLbits.SMT1CPW2 // bit 2, shadows bit in SMT1CPWLbits
20648 #define CPW3 SMT1CPWLbits.CPW3 // bit 3, shadows bit in SMT1CPWLbits
20649 #define SMT1CPW3 SMT1CPWLbits.SMT1CPW3 // bit 3, shadows bit in SMT1CPWLbits
20650 #define CPW4 SMT1CPWLbits.CPW4 // bit 4, shadows bit in SMT1CPWLbits
20651 #define SMT1CPW4 SMT1CPWLbits.SMT1CPW4 // bit 4, shadows bit in SMT1CPWLbits
20652 #define CPW5 SMT1CPWLbits.CPW5 // bit 5, shadows bit in SMT1CPWLbits
20653 #define SMT1CPW5 SMT1CPWLbits.SMT1CPW5 // bit 5, shadows bit in SMT1CPWLbits
20654 #define CPW6 SMT1CPWLbits.CPW6 // bit 6, shadows bit in SMT1CPWLbits
20655 #define SMT1CPW6 SMT1CPWLbits.SMT1CPW6 // bit 6, shadows bit in SMT1CPWLbits
20656 #define CPW7 SMT1CPWLbits.CPW7 // bit 7, shadows bit in SMT1CPWLbits
20657 #define SMT1CPW7 SMT1CPWLbits.SMT1CPW7 // bit 7, shadows bit in SMT1CPWLbits
20659 #define CPW16 SMT1CPWUbits.CPW16 // bit 0, shadows bit in SMT1CPWUbits
20660 #define SMT1CPW16 SMT1CPWUbits.SMT1CPW16 // bit 0, shadows bit in SMT1CPWUbits
20661 #define CPW17 SMT1CPWUbits.CPW17 // bit 1, shadows bit in SMT1CPWUbits
20662 #define SMT1CPW17 SMT1CPWUbits.SMT1CPW17 // bit 1, shadows bit in SMT1CPWUbits
20663 #define CPW18 SMT1CPWUbits.CPW18 // bit 2, shadows bit in SMT1CPWUbits
20664 #define SMT1CPW18 SMT1CPWUbits.SMT1CPW18 // bit 2, shadows bit in SMT1CPWUbits
20665 #define CPW19 SMT1CPWUbits.CPW19 // bit 3, shadows bit in SMT1CPWUbits
20666 #define SMT1CPW19 SMT1CPWUbits.SMT1CPW19 // bit 3, shadows bit in SMT1CPWUbits
20667 #define CPW20 SMT1CPWUbits.CPW20 // bit 4, shadows bit in SMT1CPWUbits
20668 #define SMT1CPW20 SMT1CPWUbits.SMT1CPW20 // bit 4, shadows bit in SMT1CPWUbits
20669 #define CPW21 SMT1CPWUbits.CPW21 // bit 5, shadows bit in SMT1CPWUbits
20670 #define SMT1CPW21 SMT1CPWUbits.SMT1CPW21 // bit 5, shadows bit in SMT1CPWUbits
20671 #define CPW22 SMT1CPWUbits.CPW22 // bit 6, shadows bit in SMT1CPWUbits
20672 #define SMT1CPW22 SMT1CPWUbits.SMT1CPW22 // bit 6, shadows bit in SMT1CPWUbits
20673 #define CPW23 SMT1CPWUbits.CPW23 // bit 7, shadows bit in SMT1CPWUbits
20674 #define SMT1CPW23 SMT1CPWUbits.SMT1CPW23 // bit 7, shadows bit in SMT1CPWUbits
20676 #define SMT1PR8 SMT1PRHbits.SMT1PR8 // bit 0
20677 #define SMT1PR9 SMT1PRHbits.SMT1PR9 // bit 1
20678 #define SMT1PR10 SMT1PRHbits.SMT1PR10 // bit 2
20679 #define SMT1PR11 SMT1PRHbits.SMT1PR11 // bit 3
20680 #define SMT1PR12 SMT1PRHbits.SMT1PR12 // bit 4
20681 #define SMT1PR13 SMT1PRHbits.SMT1PR13 // bit 5
20682 #define SMT1PR14 SMT1PRHbits.SMT1PR14 // bit 6
20683 #define SMT1PR15 SMT1PRHbits.SMT1PR15 // bit 7
20685 #define SMT1PR0 SMT1PRLbits.SMT1PR0 // bit 0
20686 #define SMT1PR1 SMT1PRLbits.SMT1PR1 // bit 1
20687 #define SMT1PR2 SMT1PRLbits.SMT1PR2 // bit 2
20688 #define SMT1PR3 SMT1PRLbits.SMT1PR3 // bit 3
20689 #define SMT1PR4 SMT1PRLbits.SMT1PR4 // bit 4
20690 #define SMT1PR5 SMT1PRLbits.SMT1PR5 // bit 5
20691 #define SMT1PR6 SMT1PRLbits.SMT1PR6 // bit 6
20692 #define SMT1PR7 SMT1PRLbits.SMT1PR7 // bit 7
20694 #define SMT1PR16 SMT1PRUbits.SMT1PR16 // bit 0
20695 #define SMT1PR17 SMT1PRUbits.SMT1PR17 // bit 1
20696 #define SMT1PR18 SMT1PRUbits.SMT1PR18 // bit 2
20697 #define SMT1PR19 SMT1PRUbits.SMT1PR19 // bit 3
20698 #define SMT1PR20 SMT1PRUbits.SMT1PR20 // bit 4
20699 #define SMT1PR21 SMT1PRUbits.SMT1PR21 // bit 5
20700 #define SMT1PR22 SMT1PRUbits.SMT1PR22 // bit 6
20701 #define SMT1PR23 SMT1PRUbits.SMT1PR23 // bit 7
20703 #define SSEL0 SMT1SIGbits.SSEL0 // bit 0, shadows bit in SMT1SIGbits
20704 #define SMT1SSEL0 SMT1SIGbits.SMT1SSEL0 // bit 0, shadows bit in SMT1SIGbits
20705 #define SSEL1 SMT1SIGbits.SSEL1 // bit 1, shadows bit in SMT1SIGbits
20706 #define SMT1SSEL1 SMT1SIGbits.SMT1SSEL1 // bit 1, shadows bit in SMT1SIGbits
20707 #define SSEL2 SMT1SIGbits.SSEL2 // bit 2, shadows bit in SMT1SIGbits
20708 #define SMT1SSEL2 SMT1SIGbits.SMT1SSEL2 // bit 2, shadows bit in SMT1SIGbits
20709 #define SSEL3 SMT1SIGbits.SSEL3 // bit 3, shadows bit in SMT1SIGbits
20710 #define SMT1SSEL3 SMT1SIGbits.SMT1SSEL3 // bit 3, shadows bit in SMT1SIGbits
20711 #define SSEL4 SMT1SIGbits.SSEL4 // bit 4, shadows bit in SMT1SIGbits
20712 #define SMT1SSEL4 SMT1SIGbits.SMT1SSEL4 // bit 4, shadows bit in SMT1SIGbits
20714 #define SMU1SIGPPS0 SMT1SIGPPSbits.SMU1SIGPPS0 // bit 0
20715 #define SMU1SIGPPS1 SMT1SIGPPSbits.SMU1SIGPPS1 // bit 1
20716 #define SMU1SIGPPS2 SMT1SIGPPSbits.SMU1SIGPPS2 // bit 2
20717 #define SMU1SIGPPS3 SMT1SIGPPSbits.SMU1SIGPPS3 // bit 3
20718 #define SMU1SIGPPS4 SMT1SIGPPSbits.SMU1SIGPPS4 // bit 4
20720 #define AS SMT1STATbits.AS // bit 0, shadows bit in SMT1STATbits
20721 #define SMT1AS SMT1STATbits.SMT1AS // bit 0, shadows bit in SMT1STATbits
20722 #define WS SMT1STATbits.WS // bit 1, shadows bit in SMT1STATbits
20723 #define SMT1WS SMT1STATbits.SMT1WS // bit 1, shadows bit in SMT1STATbits
20724 #define TS SMT1STATbits.TS // bit 2, shadows bit in SMT1STATbits
20725 #define SMT1TS SMT1STATbits.SMT1TS // bit 2, shadows bit in SMT1STATbits
20726 #define RST SMT1STATbits.RST // bit 5, shadows bit in SMT1STATbits
20727 #define SMT1RESET SMT1STATbits.SMT1RESET // bit 5, shadows bit in SMT1STATbits
20728 #define CPWUP SMT1STATbits.CPWUP // bit 6, shadows bit in SMT1STATbits
20729 #define SMT1CPWUP SMT1STATbits.SMT1CPWUP // bit 6, shadows bit in SMT1STATbits
20730 #define CPRUP SMT1STATbits.CPRUP // bit 7, shadows bit in SMT1STATbits
20731 #define SMT1CPRUP SMT1STATbits.SMT1CPRUP // bit 7, shadows bit in SMT1STATbits
20733 #define SMT1TMR8 SMT1TMRHbits.SMT1TMR8 // bit 0
20734 #define SMT1TMR9 SMT1TMRHbits.SMT1TMR9 // bit 1
20735 #define SMT1TMR10 SMT1TMRHbits.SMT1TMR10 // bit 2
20736 #define SMT1TMR11 SMT1TMRHbits.SMT1TMR11 // bit 3
20737 #define SMT1TMR12 SMT1TMRHbits.SMT1TMR12 // bit 4
20738 #define SMT1TMR13 SMT1TMRHbits.SMT1TMR13 // bit 5
20739 #define SMT1TMR14 SMT1TMRHbits.SMT1TMR14 // bit 6
20740 #define SMT1TMR15 SMT1TMRHbits.SMT1TMR15 // bit 7
20742 #define SMT1TMR0 SMT1TMRLbits.SMT1TMR0 // bit 0
20743 #define SMT1TMR1 SMT1TMRLbits.SMT1TMR1 // bit 1
20744 #define SMT1TMR2 SMT1TMRLbits.SMT1TMR2 // bit 2
20745 #define SMT1TMR3 SMT1TMRLbits.SMT1TMR3 // bit 3
20746 #define SMT1TMR4 SMT1TMRLbits.SMT1TMR4 // bit 4
20747 #define SMT1TMR5 SMT1TMRLbits.SMT1TMR5 // bit 5
20748 #define SMT1TMR6 SMT1TMRLbits.SMT1TMR6 // bit 6
20749 #define SMT1TMR7 SMT1TMRLbits.SMT1TMR7 // bit 7
20751 #define SMT1TMR16 SMT1TMRUbits.SMT1TMR16 // bit 0
20752 #define SMT1TMR17 SMT1TMRUbits.SMT1TMR17 // bit 1
20753 #define SMT1TMR18 SMT1TMRUbits.SMT1TMR18 // bit 2
20754 #define SMT1TMR19 SMT1TMRUbits.SMT1TMR19 // bit 3
20755 #define SMT1TMR20 SMT1TMRUbits.SMT1TMR20 // bit 4
20756 #define SMT1TMR21 SMT1TMRUbits.SMT1TMR21 // bit 5
20757 #define SMT1TMR22 SMT1TMRUbits.SMT1TMR22 // bit 6
20758 #define SMT1TMR23 SMT1TMRUbits.SMT1TMR23 // bit 7
20760 #define WSEL0 SMT1WINbits.WSEL0 // bit 0, shadows bit in SMT1WINbits
20761 #define SMT1WSEL0 SMT1WINbits.SMT1WSEL0 // bit 0, shadows bit in SMT1WINbits
20762 #define WSEL1 SMT1WINbits.WSEL1 // bit 1, shadows bit in SMT1WINbits
20763 #define SMT1WSEL1 SMT1WINbits.SMT1WSEL1 // bit 1, shadows bit in SMT1WINbits
20764 #define WSEL2 SMT1WINbits.WSEL2 // bit 2, shadows bit in SMT1WINbits
20765 #define SMT1WSEL2 SMT1WINbits.SMT1WSEL2 // bit 2, shadows bit in SMT1WINbits
20766 #define WSEL3 SMT1WINbits.WSEL3 // bit 3, shadows bit in SMT1WINbits
20767 #define SMT1WSEL3 SMT1WINbits.SMT1WSEL3 // bit 3, shadows bit in SMT1WINbits
20768 #define WSEL4 SMT1WINbits.WSEL4 // bit 4, shadows bit in SMT1WINbits
20769 #define SMT1WSEL4 SMT1WINbits.SMT1WSEL4 // bit 4, shadows bit in SMT1WINbits
20771 #define SMU1WINPPS0 SMT1WINPPSbits.SMU1WINPPS0 // bit 0
20772 #define SMU1WINPPS1 SMT1WINPPSbits.SMU1WINPPS1 // bit 1
20773 #define SMU1WINPPS2 SMT1WINPPSbits.SMU1WINPPS2 // bit 2
20774 #define SMU1WINPPS3 SMT1WINPPSbits.SMU1WINPPS3 // bit 3
20775 #define SMU1WINPPS4 SMT1WINPPSbits.SMU1WINPPS4 // bit 4
20777 #define SMT2PR8 SMT2PRHbits.SMT2PR8 // bit 0
20778 #define SMT2PR9 SMT2PRHbits.SMT2PR9 // bit 1
20779 #define SMT2PR10 SMT2PRHbits.SMT2PR10 // bit 2
20780 #define SMT2PR11 SMT2PRHbits.SMT2PR11 // bit 3
20781 #define SMT2PR12 SMT2PRHbits.SMT2PR12 // bit 4
20782 #define SMT2PR13 SMT2PRHbits.SMT2PR13 // bit 5
20783 #define SMT2PR14 SMT2PRHbits.SMT2PR14 // bit 6
20784 #define SMT2PR15 SMT2PRHbits.SMT2PR15 // bit 7
20786 #define SMT2PR0 SMT2PRLbits.SMT2PR0 // bit 0
20787 #define SMT2PR1 SMT2PRLbits.SMT2PR1 // bit 1
20788 #define SMT2PR2 SMT2PRLbits.SMT2PR2 // bit 2
20789 #define SMT2PR3 SMT2PRLbits.SMT2PR3 // bit 3
20790 #define SMT2PR4 SMT2PRLbits.SMT2PR4 // bit 4
20791 #define SMT2PR5 SMT2PRLbits.SMT2PR5 // bit 5
20792 #define SMT2PR6 SMT2PRLbits.SMT2PR6 // bit 6
20793 #define SMT2PR7 SMT2PRLbits.SMT2PR7 // bit 7
20795 #define SMT2PR16 SMT2PRUbits.SMT2PR16 // bit 0
20796 #define SMT2PR17 SMT2PRUbits.SMT2PR17 // bit 1
20797 #define SMT2PR18 SMT2PRUbits.SMT2PR18 // bit 2
20798 #define SMT2PR19 SMT2PRUbits.SMT2PR19 // bit 3
20799 #define SMT2PR20 SMT2PRUbits.SMT2PR20 // bit 4
20800 #define SMT2PR21 SMT2PRUbits.SMT2PR21 // bit 5
20801 #define SMT2PR22 SMT2PRUbits.SMT2PR22 // bit 6
20802 #define SMT2PR23 SMT2PRUbits.SMT2PR23 // bit 7
20804 #define SMU2SIGPPS0 SMT2SIGPPSbits.SMU2SIGPPS0 // bit 0
20805 #define SMU2SIGPPS1 SMT2SIGPPSbits.SMU2SIGPPS1 // bit 1
20806 #define SMU2SIGPPS2 SMT2SIGPPSbits.SMU2SIGPPS2 // bit 2
20807 #define SMU2SIGPPS3 SMT2SIGPPSbits.SMU2SIGPPS3 // bit 3
20808 #define SMU2SIGPPS4 SMT2SIGPPSbits.SMU2SIGPPS4 // bit 4
20810 #define SMT2TMR8 SMT2TMRHbits.SMT2TMR8 // bit 0
20811 #define SMT2TMR9 SMT2TMRHbits.SMT2TMR9 // bit 1
20812 #define SMT2TMR10 SMT2TMRHbits.SMT2TMR10 // bit 2
20813 #define SMT2TMR11 SMT2TMRHbits.SMT2TMR11 // bit 3
20814 #define SMT2TMR12 SMT2TMRHbits.SMT2TMR12 // bit 4
20815 #define SMT2TMR13 SMT2TMRHbits.SMT2TMR13 // bit 5
20816 #define SMT2TMR14 SMT2TMRHbits.SMT2TMR14 // bit 6
20817 #define SMT2TMR15 SMT2TMRHbits.SMT2TMR15 // bit 7
20819 #define SMT2TMR0 SMT2TMRLbits.SMT2TMR0 // bit 0
20820 #define SMT2TMR1 SMT2TMRLbits.SMT2TMR1 // bit 1
20821 #define SMT2TMR2 SMT2TMRLbits.SMT2TMR2 // bit 2
20822 #define SMT2TMR3 SMT2TMRLbits.SMT2TMR3 // bit 3
20823 #define SMT2TMR4 SMT2TMRLbits.SMT2TMR4 // bit 4
20824 #define SMT2TMR5 SMT2TMRLbits.SMT2TMR5 // bit 5
20825 #define SMT2TMR6 SMT2TMRLbits.SMT2TMR6 // bit 6
20826 #define SMT2TMR7 SMT2TMRLbits.SMT2TMR7 // bit 7
20828 #define SMT2TMR16 SMT2TMRUbits.SMT2TMR16 // bit 0
20829 #define SMT2TMR17 SMT2TMRUbits.SMT2TMR17 // bit 1
20830 #define SMT2TMR18 SMT2TMRUbits.SMT2TMR18 // bit 2
20831 #define SMT2TMR19 SMT2TMRUbits.SMT2TMR19 // bit 3
20832 #define SMT2TMR20 SMT2TMRUbits.SMT2TMR20 // bit 4
20833 #define SMT2TMR21 SMT2TMRUbits.SMT2TMR21 // bit 5
20834 #define SMT2TMR22 SMT2TMRUbits.SMT2TMR22 // bit 6
20835 #define SMT2TMR23 SMT2TMRUbits.SMT2TMR23 // bit 7
20837 #define SMU2WINPPS0 SMT2WINPPSbits.SMU2WINPPS0 // bit 0
20838 #define SMU2WINPPS1 SMT2WINPPSbits.SMU2WINPPS1 // bit 1
20839 #define SMU2WINPPS2 SMT2WINPPSbits.SMU2WINPPS2 // bit 2
20840 #define SMU2WINPPS3 SMT2WINPPSbits.SMU2WINPPS3 // bit 3
20841 #define SMU2WINPPS4 SMT2WINPPSbits.SMU2WINPPS4 // bit 4
20843 #define SSP1CLKPPS0 SSP1CLKPPSbits.SSP1CLKPPS0 // bit 0
20844 #define SSP1CLKPPS1 SSP1CLKPPSbits.SSP1CLKPPS1 // bit 1
20845 #define SSP1CLKPPS2 SSP1CLKPPSbits.SSP1CLKPPS2 // bit 2
20846 #define SSP1CLKPPS3 SSP1CLKPPSbits.SSP1CLKPPS3 // bit 3
20847 #define SSP1CLKPPS4 SSP1CLKPPSbits.SSP1CLKPPS4 // bit 4
20849 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
20850 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
20851 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
20852 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
20853 #define CKP SSP1CON1bits.CKP // bit 4
20854 #define SSPEN SSP1CON1bits.SSPEN // bit 5
20855 #define SSPOV SSP1CON1bits.SSPOV // bit 6
20856 #define WCOL SSP1CON1bits.WCOL // bit 7
20858 #define SEN SSP1CON2bits.SEN // bit 0
20859 #define RSEN SSP1CON2bits.RSEN // bit 1, shadows bit in SSP1CON2bits
20860 #define ADMSK1 SSP1CON2bits.ADMSK1 // bit 1, shadows bit in SSP1CON2bits
20861 #define PEN SSP1CON2bits.PEN // bit 2, shadows bit in SSP1CON2bits
20862 #define ADMSK2 SSP1CON2bits.ADMSK2 // bit 2, shadows bit in SSP1CON2bits
20863 #define RCEN SSP1CON2bits.RCEN // bit 3, shadows bit in SSP1CON2bits
20864 #define ADMSK3 SSP1CON2bits.ADMSK3 // bit 3, shadows bit in SSP1CON2bits
20865 #define ACKEN SSP1CON2bits.ACKEN // bit 4, shadows bit in SSP1CON2bits
20866 #define ADMSK4 SSP1CON2bits.ADMSK4 // bit 4, shadows bit in SSP1CON2bits
20867 #define ACKDT SSP1CON2bits.ACKDT // bit 5, shadows bit in SSP1CON2bits
20868 #define ADMSK5 SSP1CON2bits.ADMSK5 // bit 5, shadows bit in SSP1CON2bits
20869 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
20870 #define GCEN SSP1CON2bits.GCEN // bit 7
20872 #define DHEN SSP1CON3bits.DHEN // bit 0
20873 #define AHEN SSP1CON3bits.AHEN // bit 1
20874 #define SBCDE SSP1CON3bits.SBCDE // bit 2
20875 #define SDAHT SSP1CON3bits.SDAHT // bit 3
20876 #define BOEN SSP1CON3bits.BOEN // bit 4
20877 #define SCIE SSP1CON3bits.SCIE // bit 5
20878 #define PCIE SSP1CON3bits.PCIE // bit 6
20879 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
20881 #define SSP1DATPPS0 SSP1DATPPSbits.SSP1DATPPS0 // bit 0
20882 #define SSP1DATPPS1 SSP1DATPPSbits.SSP1DATPPS1 // bit 1
20883 #define SSP1DATPPS2 SSP1DATPPSbits.SSP1DATPPS2 // bit 2
20884 #define SSP1DATPPS3 SSP1DATPPSbits.SSP1DATPPS3 // bit 3
20885 #define SSP1DATPPS4 SSP1DATPPSbits.SSP1DATPPS4 // bit 4
20887 #define MSK0 SSP1MSKbits.MSK0 // bit 0
20888 #define MSK1 SSP1MSKbits.MSK1 // bit 1
20889 #define MSK2 SSP1MSKbits.MSK2 // bit 2
20890 #define MSK3 SSP1MSKbits.MSK3 // bit 3
20891 #define MSK4 SSP1MSKbits.MSK4 // bit 4
20892 #define MSK5 SSP1MSKbits.MSK5 // bit 5
20893 #define MSK6 SSP1MSKbits.MSK6 // bit 6
20894 #define MSK7 SSP1MSKbits.MSK7 // bit 7
20896 #define SSP1SSPPS0 SSP1SSPPSbits.SSP1SSPPS0 // bit 0
20897 #define SSP1SSPPS1 SSP1SSPPSbits.SSP1SSPPS1 // bit 1
20898 #define SSP1SSPPS2 SSP1SSPPSbits.SSP1SSPPS2 // bit 2
20899 #define SSP1SSPPS3 SSP1SSPPSbits.SSP1SSPPS3 // bit 3
20900 #define SSP1SSPPS4 SSP1SSPPSbits.SSP1SSPPS4 // bit 4
20902 #define BF SSP1STATbits.BF // bit 0
20903 #define UA SSP1STATbits.UA // bit 1
20904 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2, shadows bit in SSP1STATbits
20905 #define R_W SSP1STATbits.R_W // bit 2, shadows bit in SSP1STATbits
20906 #define NOT_W SSP1STATbits.NOT_W // bit 2, shadows bit in SSP1STATbits
20907 #define NOT_WRITE SSP1STATbits.NOT_WRITE // bit 2, shadows bit in SSP1STATbits
20908 #define READ_WRITE SSP1STATbits.READ_WRITE // bit 2, shadows bit in SSP1STATbits
20909 #define I2C_READ SSP1STATbits.I2C_READ // bit 2, shadows bit in SSP1STATbits
20910 #define S SSP1STATbits.S // bit 3, shadows bit in SSP1STATbits
20911 #define I2C_START SSP1STATbits.I2C_START // bit 3, shadows bit in SSP1STATbits
20912 #define P SSP1STATbits.P // bit 4, shadows bit in SSP1STATbits
20913 #define I2C_STOP SSP1STATbits.I2C_STOP // bit 4, shadows bit in SSP1STATbits
20914 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5, shadows bit in SSP1STATbits
20915 #define D_A SSP1STATbits.D_A // bit 5, shadows bit in SSP1STATbits
20916 #define NOT_A SSP1STATbits.NOT_A // bit 5, shadows bit in SSP1STATbits
20917 #define NOT_ADDRESS SSP1STATbits.NOT_ADDRESS // bit 5, shadows bit in SSP1STATbits
20918 #define DATA_ADDRESS SSP1STATbits.DATA_ADDRESS // bit 5, shadows bit in SSP1STATbits
20919 #define I2C_DAT SSP1STATbits.I2C_DAT // bit 5, shadows bit in SSP1STATbits
20920 #define CKE SSP1STATbits.CKE // bit 6
20921 #define SMP SSP1STATbits.SMP // bit 7
20923 #define SSP2CLKPPS0 SSP2CLKPPSbits.SSP2CLKPPS0 // bit 0
20924 #define SSP2CLKPPS1 SSP2CLKPPSbits.SSP2CLKPPS1 // bit 1
20925 #define SSP2CLKPPS2 SSP2CLKPPSbits.SSP2CLKPPS2 // bit 2
20926 #define SSP2CLKPPS3 SSP2CLKPPSbits.SSP2CLKPPS3 // bit 3
20927 #define SSP2CLKPPS4 SSP2CLKPPSbits.SSP2CLKPPS4 // bit 4
20929 #define SSP2DATPPS0 SSP2DATPPSbits.SSP2DATPPS0 // bit 0
20930 #define SSP2DATPPS1 SSP2DATPPSbits.SSP2DATPPS1 // bit 1
20931 #define SSP2DATPPS2 SSP2DATPPSbits.SSP2DATPPS2 // bit 2
20932 #define SSP2DATPPS3 SSP2DATPPSbits.SSP2DATPPS3 // bit 3
20933 #define SSP2DATPPS4 SSP2DATPPSbits.SSP2DATPPS4 // bit 4
20935 #define SSP2SSPPS0 SSP2SSPPSbits.SSP2SSPPS0 // bit 0
20936 #define SSP2SSPPS1 SSP2SSPPSbits.SSP2SSPPS1 // bit 1
20937 #define SSP2SSPPS2 SSP2SSPPSbits.SSP2SSPPS2 // bit 2
20938 #define SSP2SSPPS3 SSP2SSPPSbits.SSP2SSPPS3 // bit 3
20939 #define SSP2SSPPS4 SSP2SSPPSbits.SSP2SSPPS4 // bit 4
20941 #define C STATUSbits.C // bit 0
20942 #define DC STATUSbits.DC // bit 1
20943 #define Z STATUSbits.Z // bit 2
20944 #define NOT_PD STATUSbits.NOT_PD // bit 3
20945 #define NOT_TO STATUSbits.NOT_TO // bit 4
20947 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
20948 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
20949 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
20951 #define T0CKIPPS0 T0CKIPPSbits.T0CKIPPS0 // bit 0
20952 #define T0CKIPPS1 T0CKIPPSbits.T0CKIPPS1 // bit 1
20953 #define T0CKIPPS2 T0CKIPPSbits.T0CKIPPS2 // bit 2
20954 #define T0CKIPPS3 T0CKIPPSbits.T0CKIPPS3 // bit 3
20956 #define T0OUTPS0 T0CON0bits.T0OUTPS0 // bit 0
20957 #define T0OUTPS1 T0CON0bits.T0OUTPS1 // bit 1
20958 #define T0OUTPS2 T0CON0bits.T0OUTPS2 // bit 2
20959 #define T0OUTPS3 T0CON0bits.T0OUTPS3 // bit 3
20960 #define T016BIT T0CON0bits.T016BIT // bit 4
20961 #define T0OUT T0CON0bits.T0OUT // bit 5
20962 #define T0EN T0CON0bits.T0EN // bit 7
20964 #define T0CKPS0 T0CON1bits.T0CKPS0 // bit 0, shadows bit in T0CON1bits
20965 #define T0PS0 T0CON1bits.T0PS0 // bit 0, shadows bit in T0CON1bits
20966 #define T0CKPS1 T0CON1bits.T0CKPS1 // bit 1, shadows bit in T0CON1bits
20967 #define T0PS1 T0CON1bits.T0PS1 // bit 1, shadows bit in T0CON1bits
20968 #define T0CKPS2 T0CON1bits.T0CKPS2 // bit 2, shadows bit in T0CON1bits
20969 #define T0PS2 T0CON1bits.T0PS2 // bit 2, shadows bit in T0CON1bits
20970 #define T0CKPS3 T0CON1bits.T0CKPS3 // bit 3, shadows bit in T0CON1bits
20971 #define T0PS3 T0CON1bits.T0PS3 // bit 3, shadows bit in T0CON1bits
20972 #define T0ASYNC T0CON1bits.T0ASYNC // bit 4
20973 #define T0CS0 T0CON1bits.T0CS0 // bit 5
20974 #define T0CS1 T0CON1bits.T0CS1 // bit 6
20975 #define T0CS2 T0CON1bits.T0CS2 // bit 7
20977 #define T1CKIPPS0 T1CKIPPSbits.T1CKIPPS0 // bit 0
20978 #define T1CKIPPS1 T1CKIPPSbits.T1CKIPPS1 // bit 1
20979 #define T1CKIPPS2 T1CKIPPSbits.T1CKIPPS2 // bit 2
20980 #define T1CKIPPS3 T1CKIPPSbits.T1CKIPPS3 // bit 3
20981 #define T1CKIPPS4 T1CKIPPSbits.T1CKIPPS4 // bit 4
20983 #define T1CS0 T1CLKbits.T1CS0 // bit 0, shadows bit in T1CLKbits
20984 #define CS0 T1CLKbits.CS0 // bit 0, shadows bit in T1CLKbits
20985 #define T1CS1 T1CLKbits.T1CS1 // bit 1, shadows bit in T1CLKbits
20986 #define CS1 T1CLKbits.CS1 // bit 1, shadows bit in T1CLKbits
20987 #define T1CS2 T1CLKbits.T1CS2 // bit 2, shadows bit in T1CLKbits
20988 #define CS2 T1CLKbits.CS2 // bit 2, shadows bit in T1CLKbits
20989 #define T1CS3 T1CLKbits.T1CS3 // bit 3, shadows bit in T1CLKbits
20990 #define CS3 T1CLKbits.CS3 // bit 3, shadows bit in T1CLKbits
20992 #define GSS0 T1GATEbits.GSS0 // bit 0, shadows bit in T1GATEbits
20993 #define T1GSS0 T1GATEbits.T1GSS0 // bit 0, shadows bit in T1GATEbits
20994 #define GSS1 T1GATEbits.GSS1 // bit 1, shadows bit in T1GATEbits
20995 #define T1GSS1 T1GATEbits.T1GSS1 // bit 1, shadows bit in T1GATEbits
20996 #define GSS2 T1GATEbits.GSS2 // bit 2, shadows bit in T1GATEbits
20997 #define T1GSS2 T1GATEbits.T1GSS2 // bit 2, shadows bit in T1GATEbits
20998 #define GSS3 T1GATEbits.GSS3 // bit 3, shadows bit in T1GATEbits
20999 #define T1GSS3 T1GATEbits.T1GSS3 // bit 3, shadows bit in T1GATEbits
21000 #define GSS4 T1GATEbits.GSS4 // bit 4, shadows bit in T1GATEbits
21001 #define T1GSS4 T1GATEbits.T1GSS4 // bit 4, shadows bit in T1GATEbits
21003 #define T1GPPS0 T1GPPSbits.T1GPPS0 // bit 0
21004 #define T1GPPS1 T1GPPSbits.T1GPPS1 // bit 1
21005 #define T1GPPS2 T1GPPSbits.T1GPPS2 // bit 2
21006 #define T1GPPS3 T1GPPSbits.T1GPPS3 // bit 3
21007 #define T1GPPS4 T1GPPSbits.T1GPPS4 // bit 4
21009 #define T2AINPPS0 T2AINPPSbits.T2AINPPS0 // bit 0
21010 #define T2AINPPS1 T2AINPPSbits.T2AINPPS1 // bit 1
21011 #define T2AINPPS2 T2AINPPSbits.T2AINPPS2 // bit 2
21012 #define T2AINPPS3 T2AINPPSbits.T2AINPPS3 // bit 3
21013 #define T2AINPPS4 T2AINPPSbits.T2AINPPS4 // bit 4
21015 #define T2CS0 T2CLKCONbits.T2CS0 // bit 0
21016 #define T2CS1 T2CLKCONbits.T2CS1 // bit 1
21017 #define T2CS2 T2CLKCONbits.T2CS2 // bit 2
21018 #define T2CS3 T2CLKCONbits.T2CS3 // bit 3
21020 #define RSEL0 T2RSTbits.RSEL0 // bit 0, shadows bit in T2RSTbits
21021 #define T2RSEL0 T2RSTbits.T2RSEL0 // bit 0, shadows bit in T2RSTbits
21022 #define RSEL1 T2RSTbits.RSEL1 // bit 1, shadows bit in T2RSTbits
21023 #define T2RSEL1 T2RSTbits.T2RSEL1 // bit 1, shadows bit in T2RSTbits
21024 #define RSEL2 T2RSTbits.RSEL2 // bit 2, shadows bit in T2RSTbits
21025 #define T2RSEL2 T2RSTbits.T2RSEL2 // bit 2, shadows bit in T2RSTbits
21026 #define RSEL3 T2RSTbits.RSEL3 // bit 3, shadows bit in T2RSTbits
21027 #define T2RSEL3 T2RSTbits.T2RSEL3 // bit 3, shadows bit in T2RSTbits
21028 #define RSEL4 T2RSTbits.RSEL4 // bit 4, shadows bit in T2RSTbits
21029 #define T2RSEL4 T2RSTbits.T2RSEL4 // bit 4, shadows bit in T2RSTbits
21031 #define T3CKIPPS0 T3CKIPPSbits.T3CKIPPS0 // bit 0
21032 #define T3CKIPPS1 T3CKIPPSbits.T3CKIPPS1 // bit 1
21033 #define T3CKIPPS2 T3CKIPPSbits.T3CKIPPS2 // bit 2
21034 #define T3CKIPPS3 T3CKIPPSbits.T3CKIPPS3 // bit 3
21035 #define T3CKIPPS4 T3CKIPPSbits.T3CKIPPS4 // bit 4
21037 #define T3GPPS0 T3GPPSbits.T3GPPS0 // bit 0
21038 #define T3GPPS1 T3GPPSbits.T3GPPS1 // bit 1
21039 #define T3GPPS2 T3GPPSbits.T3GPPS2 // bit 2
21040 #define T3GPPS3 T3GPPSbits.T3GPPS3 // bit 3
21041 #define T3GPPS4 T3GPPSbits.T3GPPS4 // bit 4
21043 #define T4AINPPS0 T4AINPPSbits.T4AINPPS0 // bit 0
21044 #define T4AINPPS1 T4AINPPSbits.T4AINPPS1 // bit 1
21045 #define T4AINPPS2 T4AINPPSbits.T4AINPPS2 // bit 2
21046 #define T4AINPPS3 T4AINPPSbits.T4AINPPS3 // bit 3
21047 #define T4AINPPS4 T4AINPPSbits.T4AINPPS4 // bit 4
21049 #define T4CS0 T4CLKCONbits.T4CS0 // bit 0
21050 #define T4CS1 T4CLKCONbits.T4CS1 // bit 1
21051 #define T4CS2 T4CLKCONbits.T4CS2 // bit 2
21052 #define T4CS3 T4CLKCONbits.T4CS3 // bit 3
21054 #define T5CKIPPS0 T5CKIPPSbits.T5CKIPPS0 // bit 0
21055 #define T5CKIPPS1 T5CKIPPSbits.T5CKIPPS1 // bit 1
21056 #define T5CKIPPS2 T5CKIPPSbits.T5CKIPPS2 // bit 2
21057 #define T5CKIPPS3 T5CKIPPSbits.T5CKIPPS3 // bit 3
21058 #define T5CKIPPS4 T5CKIPPSbits.T5CKIPPS4 // bit 4
21060 #define T5GPPS0 T5GPPSbits.T5GPPS0 // bit 0
21061 #define T5GPPS1 T5GPPSbits.T5GPPS1 // bit 1
21062 #define T5GPPS2 T5GPPSbits.T5GPPS2 // bit 2
21063 #define T5GPPS3 T5GPPSbits.T5GPPS3 // bit 3
21064 #define T5GPPS4 T5GPPSbits.T5GPPS4 // bit 4
21066 #define T6AINPPS0 T6AINPPSbits.T6AINPPS0 // bit 0
21067 #define T6AINPPS1 T6AINPPSbits.T6AINPPS1 // bit 1
21068 #define T6AINPPS2 T6AINPPSbits.T6AINPPS2 // bit 2
21069 #define T6AINPPS3 T6AINPPSbits.T6AINPPS3 // bit 3
21070 #define T6AINPPS4 T6AINPPSbits.T6AINPPS4 // bit 4
21072 #define T6CS0 T6CLKCONbits.T6CS0 // bit 0
21073 #define T6CS1 T6CLKCONbits.T6CS1 // bit 1
21074 #define T6CS2 T6CLKCONbits.T6CS2 // bit 2
21075 #define T6CS3 T6CLKCONbits.T6CS3 // bit 3
21077 #define TMR0L0 TMR0bits.TMR0L0 // bit 0
21078 #define TMR0L1 TMR0bits.TMR0L1 // bit 1
21079 #define TMR0L2 TMR0bits.TMR0L2 // bit 2
21080 #define TMR0L3 TMR0bits.TMR0L3 // bit 3
21081 #define TMR0L4 TMR0bits.TMR0L4 // bit 4
21082 #define TMR0L5 TMR0bits.TMR0L5 // bit 5
21083 #define TMR0L6 TMR0bits.TMR0L6 // bit 6
21084 #define TMR0L7 TMR0bits.TMR0L7 // bit 7
21086 #define TMR1H0 TMR1Hbits.TMR1H0 // bit 0
21087 #define TMR1H1 TMR1Hbits.TMR1H1 // bit 1
21088 #define TMR1H2 TMR1Hbits.TMR1H2 // bit 2
21089 #define TMR1H3 TMR1Hbits.TMR1H3 // bit 3
21090 #define TMR1H4 TMR1Hbits.TMR1H4 // bit 4
21091 #define TMR1H5 TMR1Hbits.TMR1H5 // bit 5
21092 #define TMR1H6 TMR1Hbits.TMR1H6 // bit 6
21093 #define TMR1H7 TMR1Hbits.TMR1H7 // bit 7
21095 #define TMR1L0 TMR1Lbits.TMR1L0 // bit 0
21096 #define TMR1L1 TMR1Lbits.TMR1L1 // bit 1
21097 #define TMR1L2 TMR1Lbits.TMR1L2 // bit 2
21098 #define TMR1L3 TMR1Lbits.TMR1L3 // bit 3
21099 #define TMR1L4 TMR1Lbits.TMR1L4 // bit 4
21100 #define TMR1L5 TMR1Lbits.TMR1L5 // bit 5
21101 #define TMR1L6 TMR1Lbits.TMR1L6 // bit 6
21102 #define TMR1L7 TMR1Lbits.TMR1L7 // bit 7
21104 #define TMR3H0 TMR3Hbits.TMR3H0 // bit 0
21105 #define TMR3H1 TMR3Hbits.TMR3H1 // bit 1
21106 #define TMR3H2 TMR3Hbits.TMR3H2 // bit 2
21107 #define TMR3H3 TMR3Hbits.TMR3H3 // bit 3
21108 #define TMR3H4 TMR3Hbits.TMR3H4 // bit 4
21109 #define TMR3H5 TMR3Hbits.TMR3H5 // bit 5
21110 #define TMR3H6 TMR3Hbits.TMR3H6 // bit 6
21111 #define TMR3H7 TMR3Hbits.TMR3H7 // bit 7
21113 #define TMR3L0 TMR3Lbits.TMR3L0 // bit 0
21114 #define TMR3L1 TMR3Lbits.TMR3L1 // bit 1
21115 #define TMR3L2 TMR3Lbits.TMR3L2 // bit 2
21116 #define TMR3L3 TMR3Lbits.TMR3L3 // bit 3
21117 #define TMR3L4 TMR3Lbits.TMR3L4 // bit 4
21118 #define TMR3L5 TMR3Lbits.TMR3L5 // bit 5
21119 #define TMR3L6 TMR3Lbits.TMR3L6 // bit 6
21120 #define TMR3L7 TMR3Lbits.TMR3L7 // bit 7
21122 #define TMR5H0 TMR5Hbits.TMR5H0 // bit 0
21123 #define TMR5H1 TMR5Hbits.TMR5H1 // bit 1
21124 #define TMR5H2 TMR5Hbits.TMR5H2 // bit 2
21125 #define TMR5H3 TMR5Hbits.TMR5H3 // bit 3
21126 #define TMR5H4 TMR5Hbits.TMR5H4 // bit 4
21127 #define TMR5H5 TMR5Hbits.TMR5H5 // bit 5
21128 #define TMR5H6 TMR5Hbits.TMR5H6 // bit 6
21129 #define TMR5H7 TMR5Hbits.TMR5H7 // bit 7
21131 #define TMR5L0 TMR5Lbits.TMR5L0 // bit 0
21132 #define TMR5L1 TMR5Lbits.TMR5L1 // bit 1
21133 #define TMR5L2 TMR5Lbits.TMR5L2 // bit 2
21134 #define TMR5L3 TMR5Lbits.TMR5L3 // bit 3
21135 #define TMR5L4 TMR5Lbits.TMR5L4 // bit 4
21136 #define TMR5L5 TMR5Lbits.TMR5L5 // bit 5
21137 #define TMR5L6 TMR5Lbits.TMR5L6 // bit 6
21138 #define TMR5L7 TMR5Lbits.TMR5L7 // bit 7
21140 #define TRISA0 TRISAbits.TRISA0 // bit 0
21141 #define TRISA1 TRISAbits.TRISA1 // bit 1
21142 #define TRISA2 TRISAbits.TRISA2 // bit 2
21143 #define TRISA3 TRISAbits.TRISA3 // bit 3
21144 #define TRISA4 TRISAbits.TRISA4 // bit 4
21145 #define TRISA5 TRISAbits.TRISA5 // bit 5
21146 #define TRISA6 TRISAbits.TRISA6 // bit 6
21147 #define TRISA7 TRISAbits.TRISA7 // bit 7
21149 #define TRISB0 TRISBbits.TRISB0 // bit 0
21150 #define TRISB1 TRISBbits.TRISB1 // bit 1
21151 #define TRISB2 TRISBbits.TRISB2 // bit 2
21152 #define TRISB3 TRISBbits.TRISB3 // bit 3
21153 #define TRISB4 TRISBbits.TRISB4 // bit 4
21154 #define TRISB5 TRISBbits.TRISB5 // bit 5
21155 #define TRISB6 TRISBbits.TRISB6 // bit 6
21156 #define TRISB7 TRISBbits.TRISB7 // bit 7
21158 #define TRISC0 TRISCbits.TRISC0 // bit 0
21159 #define TRISC1 TRISCbits.TRISC1 // bit 1
21160 #define TRISC2 TRISCbits.TRISC2 // bit 2
21161 #define TRISC3 TRISCbits.TRISC3 // bit 3
21162 #define TRISC4 TRISCbits.TRISC4 // bit 4
21163 #define TRISC5 TRISCbits.TRISC5 // bit 5
21164 #define TRISC6 TRISCbits.TRISC6 // bit 6
21165 #define TRISC7 TRISCbits.TRISC7 // bit 7
21167 #define TXPPS0 TXPPSbits.TXPPS0 // bit 0
21168 #define TXPPS1 TXPPSbits.TXPPS1 // bit 1
21169 #define TXPPS2 TXPPSbits.TXPPS2 // bit 2
21170 #define TXPPS3 TXPPSbits.TXPPS3 // bit 3
21171 #define TXPPS4 TXPPSbits.TXPPS4 // bit 4
21173 #define WINDOW0 WDTCON1bits.WINDOW0 // bit 0, shadows bit in WDTCON1bits
21174 #define WDTWINDOW0 WDTCON1bits.WDTWINDOW0 // bit 0, shadows bit in WDTCON1bits
21175 #define WINDOW1 WDTCON1bits.WINDOW1 // bit 1, shadows bit in WDTCON1bits
21176 #define WDTWINDOW1 WDTCON1bits.WDTWINDOW1 // bit 1, shadows bit in WDTCON1bits
21177 #define WINDOW2 WDTCON1bits.WINDOW2 // bit 2, shadows bit in WDTCON1bits
21178 #define WDTWINDOW2 WDTCON1bits.WDTWINDOW2 // bit 2, shadows bit in WDTCON1bits
21179 #define WDTCS0 WDTCON1bits.WDTCS0 // bit 4
21180 #define WDTCS1 WDTCON1bits.WDTCS1 // bit 5
21181 #define WDTCS2 WDTCON1bits.WDTCS2 // bit 6
21183 #define PSCNT8 WDTPSHbits.PSCNT8 // bit 0, shadows bit in WDTPSHbits
21184 #define WDTPSCNT8 WDTPSHbits.WDTPSCNT8 // bit 0, shadows bit in WDTPSHbits
21185 #define PSCNT9 WDTPSHbits.PSCNT9 // bit 1, shadows bit in WDTPSHbits
21186 #define WDTPSCNT9 WDTPSHbits.WDTPSCNT9 // bit 1, shadows bit in WDTPSHbits
21187 #define PSCNT10 WDTPSHbits.PSCNT10 // bit 2, shadows bit in WDTPSHbits
21188 #define WDTPSCNT10 WDTPSHbits.WDTPSCNT10 // bit 2, shadows bit in WDTPSHbits
21189 #define PSCNT11 WDTPSHbits.PSCNT11 // bit 3, shadows bit in WDTPSHbits
21190 #define WDTPSCNT11 WDTPSHbits.WDTPSCNT11 // bit 3, shadows bit in WDTPSHbits
21191 #define PSCNT12 WDTPSHbits.PSCNT12 // bit 4, shadows bit in WDTPSHbits
21192 #define WDTPSCNT12 WDTPSHbits.WDTPSCNT12 // bit 4, shadows bit in WDTPSHbits
21193 #define PSCNT13 WDTPSHbits.PSCNT13 // bit 5, shadows bit in WDTPSHbits
21194 #define WDTPSCNT13 WDTPSHbits.WDTPSCNT13 // bit 5, shadows bit in WDTPSHbits
21195 #define PSCNT14 WDTPSHbits.PSCNT14 // bit 6, shadows bit in WDTPSHbits
21196 #define WDTPSCNT14 WDTPSHbits.WDTPSCNT14 // bit 6, shadows bit in WDTPSHbits
21197 #define PSCNT15 WDTPSHbits.PSCNT15 // bit 7, shadows bit in WDTPSHbits
21198 #define WDTPSCNT15 WDTPSHbits.WDTPSCNT15 // bit 7, shadows bit in WDTPSHbits
21200 #define PSCNT0 WDTPSLbits.PSCNT0 // bit 0, shadows bit in WDTPSLbits
21201 #define WDTPSCNT0 WDTPSLbits.WDTPSCNT0 // bit 0, shadows bit in WDTPSLbits
21202 #define PSCNT1 WDTPSLbits.PSCNT1 // bit 1, shadows bit in WDTPSLbits
21203 #define WDTPSCNT1 WDTPSLbits.WDTPSCNT1 // bit 1, shadows bit in WDTPSLbits
21204 #define PSCNT2 WDTPSLbits.PSCNT2 // bit 2, shadows bit in WDTPSLbits
21205 #define WDTPSCNT2 WDTPSLbits.WDTPSCNT2 // bit 2, shadows bit in WDTPSLbits
21206 #define PSCNT3 WDTPSLbits.PSCNT3 // bit 3, shadows bit in WDTPSLbits
21207 #define WDTPSCNT3 WDTPSLbits.WDTPSCNT3 // bit 3, shadows bit in WDTPSLbits
21208 #define PSCNT4 WDTPSLbits.PSCNT4 // bit 4, shadows bit in WDTPSLbits
21209 #define WDTPSCNT4 WDTPSLbits.WDTPSCNT4 // bit 4, shadows bit in WDTPSLbits
21210 #define PSCNT5 WDTPSLbits.PSCNT5 // bit 5, shadows bit in WDTPSLbits
21211 #define WDTPSCNT5 WDTPSLbits.WDTPSCNT5 // bit 5, shadows bit in WDTPSLbits
21212 #define PSCNT6 WDTPSLbits.PSCNT6 // bit 6, shadows bit in WDTPSLbits
21213 #define WDTPSCNT6 WDTPSLbits.WDTPSCNT6 // bit 6, shadows bit in WDTPSLbits
21214 #define PSCNT7 WDTPSLbits.PSCNT7 // bit 7, shadows bit in WDTPSLbits
21215 #define WDTPSCNT7 WDTPSLbits.WDTPSCNT7 // bit 7, shadows bit in WDTPSLbits
21217 #define PSCNT16 WDTTMRbits.PSCNT16 // bit 0, shadows bit in WDTTMRbits
21218 #define WDTPSCNT16 WDTTMRbits.WDTPSCNT16 // bit 0, shadows bit in WDTTMRbits
21219 #define PSCNT17 WDTTMRbits.PSCNT17 // bit 1, shadows bit in WDTTMRbits
21220 #define WDTPSCNT17 WDTTMRbits.WDTPSCNT17 // bit 1, shadows bit in WDTTMRbits
21221 #define STATE WDTTMRbits.STATE // bit 2, shadows bit in WDTTMRbits
21222 #define WDTSTATE WDTTMRbits.WDTSTATE // bit 2, shadows bit in WDTTMRbits
21223 #define WDTTMR0 WDTTMRbits.WDTTMR0 // bit 3
21224 #define WDTTMR1 WDTTMRbits.WDTTMR1 // bit 4
21225 #define WDTTMR2 WDTTMRbits.WDTTMR2 // bit 5
21226 #define WDTTMR3 WDTTMRbits.WDTTMR3 // bit 6
21228 #define WPUA0 WPUAbits.WPUA0 // bit 0
21229 #define WPUA1 WPUAbits.WPUA1 // bit 1
21230 #define WPUA2 WPUAbits.WPUA2 // bit 2
21231 #define WPUA3 WPUAbits.WPUA3 // bit 3
21232 #define WPUA4 WPUAbits.WPUA4 // bit 4
21233 #define WPUA5 WPUAbits.WPUA5 // bit 5
21234 #define WPUA6 WPUAbits.WPUA6 // bit 6
21235 #define WPUA7 WPUAbits.WPUA7 // bit 7
21237 #define WPUB0 WPUBbits.WPUB0 // bit 0
21238 #define WPUB1 WPUBbits.WPUB1 // bit 1
21239 #define WPUB2 WPUBbits.WPUB2 // bit 2
21240 #define WPUB3 WPUBbits.WPUB3 // bit 3
21241 #define WPUB4 WPUBbits.WPUB4 // bit 4
21242 #define WPUB5 WPUBbits.WPUB5 // bit 5
21243 #define WPUB6 WPUBbits.WPUB6 // bit 6
21244 #define WPUB7 WPUBbits.WPUB7 // bit 7
21246 #define WPUC0 WPUCbits.WPUC0 // bit 0
21247 #define WPUC1 WPUCbits.WPUC1 // bit 1
21248 #define WPUC2 WPUCbits.WPUC2 // bit 2
21249 #define WPUC3 WPUCbits.WPUC3 // bit 3
21250 #define WPUC4 WPUCbits.WPUC4 // bit 4
21251 #define WPUC5 WPUCbits.WPUC5 // bit 5
21252 #define WPUC6 WPUCbits.WPUC6 // bit 6
21253 #define WPUC7 WPUCbits.WPUC7 // bit 7
21255 #define WPUE3 WPUEbits.WPUE3 // bit 3
21257 #endif // #ifndef NO_BIT_DEFINES
21259 #endif // #ifndef __PIC16LF18855_H__