2 * This declarations of the PIC16LF1947 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:23 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF1947_H__
26 #define __PIC16LF1947_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF0_ADDR 0x0000
37 #define INDF1_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR0_ADDR 0x0004
41 #define FSR0L_ADDR 0x0004
42 #define FSR0H_ADDR 0x0005
43 #define FSR1_ADDR 0x0006
44 #define FSR1L_ADDR 0x0006
45 #define FSR1H_ADDR 0x0007
46 #define BSR_ADDR 0x0008
47 #define WREG_ADDR 0x0009
48 #define PCLATH_ADDR 0x000A
49 #define INTCON_ADDR 0x000B
50 #define PORTA_ADDR 0x000C
51 #define PORTB_ADDR 0x000D
52 #define PORTC_ADDR 0x000E
53 #define PORTD_ADDR 0x000F
54 #define PORTE_ADDR 0x0010
55 #define PIR1_ADDR 0x0011
56 #define PIR2_ADDR 0x0012
57 #define PIR3_ADDR 0x0013
58 #define PIR4_ADDR 0x0014
59 #define TMR0_ADDR 0x0015
60 #define TMR1_ADDR 0x0016
61 #define TMR1L_ADDR 0x0016
62 #define TMR1H_ADDR 0x0017
63 #define T1CON_ADDR 0x0018
64 #define T1GCON_ADDR 0x0019
65 #define TMR2_ADDR 0x001A
66 #define PR2_ADDR 0x001B
67 #define T2CON_ADDR 0x001C
68 #define CPSCON0_ADDR 0x001E
69 #define CPSCON1_ADDR 0x001F
70 #define TRISA_ADDR 0x008C
71 #define TRISB_ADDR 0x008D
72 #define TRISC_ADDR 0x008E
73 #define TRISD_ADDR 0x008F
74 #define TRISE_ADDR 0x0090
75 #define PIE1_ADDR 0x0091
76 #define PIE2_ADDR 0x0092
77 #define PIE3_ADDR 0x0093
78 #define PIE4_ADDR 0x0094
79 #define OPTION_REG_ADDR 0x0095
80 #define PCON_ADDR 0x0096
81 #define WDTCON_ADDR 0x0097
82 #define OSCTUNE_ADDR 0x0098
83 #define OSCCON_ADDR 0x0099
84 #define OSCSTAT_ADDR 0x009A
85 #define ADRES_ADDR 0x009B
86 #define ADRESL_ADDR 0x009B
87 #define ADRESH_ADDR 0x009C
88 #define ADCON0_ADDR 0x009D
89 #define ADCON1_ADDR 0x009E
90 #define LATA_ADDR 0x010C
91 #define LATB_ADDR 0x010D
92 #define LATC_ADDR 0x010E
93 #define LATD_ADDR 0x010F
94 #define LATE_ADDR 0x0110
95 #define CM1CON0_ADDR 0x0111
96 #define CM1CON1_ADDR 0x0112
97 #define CM2CON0_ADDR 0x0113
98 #define CM2CON1_ADDR 0x0114
99 #define CMOUT_ADDR 0x0115
100 #define BORCON_ADDR 0x0116
101 #define FVRCON_ADDR 0x0117
102 #define DACCON0_ADDR 0x0118
103 #define DACCON1_ADDR 0x0119
104 #define SRCON0_ADDR 0x011A
105 #define SRCON1_ADDR 0x011B
106 #define APFCON_ADDR 0x011D
107 #define CM3CON0_ADDR 0x011E
108 #define CM3CON1_ADDR 0x011F
109 #define ANSELA_ADDR 0x018C
110 #define ANSELE_ADDR 0x0190
111 #define EEADR_ADDR 0x0191
112 #define EEADRL_ADDR 0x0191
113 #define EEADRH_ADDR 0x0192
114 #define EEDAT_ADDR 0x0193
115 #define EEDATL_ADDR 0x0193
116 #define EEDATH_ADDR 0x0194
117 #define EECON1_ADDR 0x0195
118 #define EECON2_ADDR 0x0196
119 #define RC1REG_ADDR 0x0199
120 #define RCREG_ADDR 0x0199
121 #define TX1REG_ADDR 0x019A
122 #define TXREG_ADDR 0x019A
123 #define SP1BRG_ADDR 0x019B
124 #define SP1BRGL_ADDR 0x019B
125 #define SPBRG_ADDR 0x019B
126 #define SPBRGL_ADDR 0x019B
127 #define SP1BRGH_ADDR 0x019C
128 #define SPBRGH_ADDR 0x019C
129 #define RC1STA_ADDR 0x019D
130 #define RCSTA_ADDR 0x019D
131 #define TX1STA_ADDR 0x019E
132 #define TXSTA_ADDR 0x019E
133 #define BAUD1CON_ADDR 0x019F
134 #define BAUDCON_ADDR 0x019F
135 #define WPUB_ADDR 0x020D
136 #define SSP1BUF_ADDR 0x0211
137 #define SSPBUF_ADDR 0x0211
138 #define SSP1ADD_ADDR 0x0212
139 #define SSPADD_ADDR 0x0212
140 #define SSP1MSK_ADDR 0x0213
141 #define SSPMSK_ADDR 0x0213
142 #define SSP1STAT_ADDR 0x0214
143 #define SSPSTAT_ADDR 0x0214
144 #define SSP1CON1_ADDR 0x0215
145 #define SSPCON_ADDR 0x0215
146 #define SSPCON1_ADDR 0x0215
147 #define SSP1CON2_ADDR 0x0216
148 #define SSPCON2_ADDR 0x0216
149 #define SSP1CON3_ADDR 0x0217
150 #define SSPCON3_ADDR 0x0217
151 #define SSP2BUF_ADDR 0x0219
152 #define SSP2ADD_ADDR 0x021A
153 #define SSP2MSK_ADDR 0x021B
154 #define SSP2STAT_ADDR 0x021C
155 #define SSP2CON1_ADDR 0x021D
156 #define SSP2CON2_ADDR 0x021E
157 #define SSP2CON3_ADDR 0x021F
158 #define PORTF_ADDR 0x028C
159 #define PORTG_ADDR 0x028D
160 #define CCPR1_ADDR 0x0291
161 #define CCPR1L_ADDR 0x0291
162 #define CCPR1H_ADDR 0x0292
163 #define CCP1CON_ADDR 0x0293
164 #define PWM1CON_ADDR 0x0294
165 #define CCP1AS_ADDR 0x0295
166 #define ECCP1AS_ADDR 0x0295
167 #define PSTR1CON_ADDR 0x0296
168 #define CCPR2_ADDR 0x0298
169 #define CCPR2L_ADDR 0x0298
170 #define CCPR2H_ADDR 0x0299
171 #define CCP2CON_ADDR 0x029A
172 #define PWM2CON_ADDR 0x029B
173 #define CCP2AS_ADDR 0x029C
174 #define ECCP2AS_ADDR 0x029C
175 #define PSTR2CON_ADDR 0x029D
176 #define CCPTMRS0_ADDR 0x029E
177 #define CCPTMRS1_ADDR 0x029F
178 #define TRISF_ADDR 0x030C
179 #define TRISG_ADDR 0x030D
180 #define CCPR3_ADDR 0x0311
181 #define CCPR3L_ADDR 0x0311
182 #define CCPR3H_ADDR 0x0312
183 #define CCP3CON_ADDR 0x0313
184 #define PWM3CON_ADDR 0x0314
185 #define CCP3AS_ADDR 0x0315
186 #define ECCP3AS_ADDR 0x0315
187 #define PSTR3CON_ADDR 0x0316
188 #define CCPR4_ADDR 0x0318
189 #define CCPR4L_ADDR 0x0318
190 #define CCPR4H_ADDR 0x0319
191 #define CCP4CON_ADDR 0x031A
192 #define CCPR5_ADDR 0x031C
193 #define CCPR5L_ADDR 0x031C
194 #define CCPR5H_ADDR 0x031D
195 #define CCP5CON_ADDR 0x031E
196 #define LATF_ADDR 0x038C
197 #define LATG_ADDR 0x038D
198 #define IOCBP_ADDR 0x0394
199 #define IOCBN_ADDR 0x0395
200 #define IOCBF_ADDR 0x0396
201 #define ANSELF_ADDR 0x040C
202 #define ANSELG_ADDR 0x040D
203 #define TMR4_ADDR 0x0415
204 #define PR4_ADDR 0x0416
205 #define T4CON_ADDR 0x0417
206 #define TMR6_ADDR 0x041C
207 #define PR6_ADDR 0x041D
208 #define T6CON_ADDR 0x041E
209 #define WPUG_ADDR 0x048D
210 #define RC2REG_ADDR 0x0491
211 #define TX2REG_ADDR 0x0492
212 #define SP2BRGL_ADDR 0x0493
213 #define SPBRG2_ADDR 0x0493
214 #define SP2BRGH_ADDR 0x0494
215 #define RC2STA_ADDR 0x0495
216 #define TX2STA_ADDR 0x0496
217 #define BAUD2CON_ADDR 0x0497
218 #define LCDCON_ADDR 0x0791
219 #define LCDPS_ADDR 0x0792
220 #define LCDREF_ADDR 0x0793
221 #define LCDCST_ADDR 0x0794
222 #define LCDRL_ADDR 0x0795
223 #define LCDSE0_ADDR 0x0798
224 #define LCDSE1_ADDR 0x0799
225 #define LCDSE2_ADDR 0x079A
226 #define LCDSE3_ADDR 0x079B
227 #define LCDSE4_ADDR 0x079C
228 #define LCDSE5_ADDR 0x079D
229 #define LCDDATA0_ADDR 0x07A0
230 #define LCDDATA1_ADDR 0x07A1
231 #define LCDDATA2_ADDR 0x07A2
232 #define LCDDATA3_ADDR 0x07A3
233 #define LCDDATA4_ADDR 0x07A4
234 #define LCDDATA5_ADDR 0x07A5
235 #define LCDDATA6_ADDR 0x07A6
236 #define LCDDATA7_ADDR 0x07A7
237 #define LCDDATA8_ADDR 0x07A8
238 #define LCDDATA9_ADDR 0x07A9
239 #define LCDDATA10_ADDR 0x07AA
240 #define LCDDATA11_ADDR 0x07AB
241 #define LCDDATA12_ADDR 0x07AC
242 #define LCDDATA13_ADDR 0x07AD
243 #define LCDDATA14_ADDR 0x07AE
244 #define LCDDATA15_ADDR 0x07AF
245 #define LCDDATA16_ADDR 0x07B0
246 #define LCDDATA17_ADDR 0x07B1
247 #define LCDDATA18_ADDR 0x07B2
248 #define LCDDATA19_ADDR 0x07B3
249 #define LCDDATA20_ADDR 0x07B4
250 #define LCDDATA21_ADDR 0x07B5
251 #define LCDDATA22_ADDR 0x07B6
252 #define LCDDATA23_ADDR 0x07B7
253 #define STATUS_SHAD_ADDR 0x0FE4
254 #define WREG_SHAD_ADDR 0x0FE5
255 #define BSR_SHAD_ADDR 0x0FE6
256 #define PCLATH_SHAD_ADDR 0x0FE7
257 #define FSR0L_SHAD_ADDR 0x0FE8
258 #define FSR0H_SHAD_ADDR 0x0FE9
259 #define FSR1L_SHAD_ADDR 0x0FEA
260 #define FSR1H_SHAD_ADDR 0x0FEB
261 #define STKPTR_ADDR 0x0FED
262 #define TOSL_ADDR 0x0FEE
263 #define TOSH_ADDR 0x0FEF
265 #endif // #ifndef NO_ADDR_DEFINES
267 //==============================================================================
269 // Register Definitions
271 //==============================================================================
273 extern __at(0x0000) __sfr INDF0
;
274 extern __at(0x0001) __sfr INDF1
;
275 extern __at(0x0002) __sfr PCL
;
277 //==============================================================================
280 extern __at(0x0003) __sfr STATUS
;
294 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
302 //==============================================================================
304 extern __at(0x0004) __sfr FSR0
;
305 extern __at(0x0004) __sfr FSR0L
;
306 extern __at(0x0005) __sfr FSR0H
;
307 extern __at(0x0006) __sfr FSR1
;
308 extern __at(0x0006) __sfr FSR1L
;
309 extern __at(0x0007) __sfr FSR1H
;
311 //==============================================================================
314 extern __at(0x0008) __sfr BSR
;
337 extern __at(0x0008) volatile __BSRbits_t BSRbits
;
345 //==============================================================================
347 extern __at(0x0009) __sfr WREG
;
348 extern __at(0x000A) __sfr PCLATH
;
350 //==============================================================================
353 extern __at(0x000B) __sfr INTCON
;
382 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
395 //==============================================================================
398 //==============================================================================
401 extern __at(0x000C) __sfr PORTA
;
466 extern __at(0x000C) volatile __PORTAbits_t PORTAbits
;
502 //==============================================================================
505 //==============================================================================
508 extern __at(0x000D) __sfr PORTB
;
561 extern __at(0x000D) volatile __PORTBbits_t PORTBbits
;
583 //==============================================================================
586 //==============================================================================
589 extern __at(0x000E) __sfr PORTC
;
654 extern __at(0x000E) volatile __PORTCbits_t PORTCbits
;
689 //==============================================================================
692 //==============================================================================
695 extern __at(0x000F) __sfr PORTD
;
732 unsigned NOT_SS2
: 1;
760 extern __at(0x000F) volatile __PORTDbits_t PORTDbits
;
790 #define _NOT_SS2 0x80
792 //==============================================================================
795 //==============================================================================
798 extern __at(0x0010) __sfr PORTE
;
858 extern __at(0x0010) volatile __PORTEbits_t PORTEbits
;
860 #define _PORTE_RE0 0x01
861 #define _PORTE_VLCD1 0x01
862 #define _PORTE_P2D 0x01
863 #define _PORTE_RE1 0x02
864 #define _PORTE_VLCD2 0x02
865 #define _PORTE_P2C 0x02
866 #define _PORTE_RE2 0x04
867 #define _PORTE_VLCD3 0x04
868 #define _PORTE_P2B 0x04
869 #define _PORTE_RE3 0x08
870 #define _PORTE_COM0 0x08
871 #define _PORTE_P3C 0x08
872 #define _PORTE_RE4 0x10
873 #define _PORTE_COM1 0x10
874 #define _PORTE_P3B 0x10
875 #define _PORTE_RE5 0x20
876 #define _PORTE_COM2 0x20
877 #define _PORTE_P1C 0x20
878 #define _PORTE_RE6 0x40
879 #define _PORTE_COM3 0x40
880 #define _PORTE_P1B 0x40
881 #define _PORTE_RE7 0x80
882 #define _PORTE_SEG31 0x80
883 #define _PORTE_P2A 0x80
884 #define _PORTE_CCP2 0x80
886 //==============================================================================
889 //==============================================================================
892 extern __at(0x0011) __sfr PIR1
;
905 unsigned TMR1GIF
: 1;
921 extern __at(0x0011) volatile __PIR1bits_t PIR1bits
;
933 #define _TMR1GIF 0x80
935 //==============================================================================
938 //==============================================================================
941 extern __at(0x0012) __sfr PIR2
;
955 extern __at(0x0012) volatile __PIR2bits_t PIR2bits
;
966 //==============================================================================
969 //==============================================================================
972 extern __at(0x0013) __sfr PIR3
;
986 extern __at(0x0013) volatile __PIR3bits_t PIR3bits
;
994 //==============================================================================
997 //==============================================================================
1000 extern __at(0x0014) __sfr PIR4
;
1004 unsigned SSP2IF
: 1;
1005 unsigned BCL2IF
: 1;
1014 extern __at(0x0014) volatile __PIR4bits_t PIR4bits
;
1016 #define _SSP2IF 0x01
1017 #define _BCL2IF 0x02
1021 //==============================================================================
1023 extern __at(0x0015) __sfr TMR0
;
1024 extern __at(0x0016) __sfr TMR1
;
1025 extern __at(0x0016) __sfr TMR1L
;
1026 extern __at(0x0017) __sfr TMR1H
;
1028 //==============================================================================
1031 extern __at(0x0018) __sfr T1CON
;
1037 unsigned TMR1ON
: 1;
1039 unsigned NOT_T1SYNC
: 1;
1040 unsigned T1OSCEN
: 1;
1041 unsigned T1CKPS0
: 1;
1042 unsigned T1CKPS1
: 1;
1043 unsigned TMR1CS0
: 1;
1044 unsigned TMR1CS1
: 1;
1050 unsigned T1CKPS
: 2;
1057 unsigned TMR1CS
: 2;
1061 extern __at(0x0018) volatile __T1CONbits_t T1CONbits
;
1063 #define _TMR1ON 0x01
1064 #define _NOT_T1SYNC 0x04
1065 #define _T1OSCEN 0x08
1066 #define _T1CKPS0 0x10
1067 #define _T1CKPS1 0x20
1068 #define _TMR1CS0 0x40
1069 #define _TMR1CS1 0x80
1071 //==============================================================================
1074 //==============================================================================
1077 extern __at(0x0019) __sfr T1GCON
;
1083 unsigned T1GSS0
: 1;
1084 unsigned T1GSS1
: 1;
1085 unsigned T1GVAL
: 1;
1086 unsigned T1GGO_NOT_DONE
: 1;
1087 unsigned T1GSPM
: 1;
1089 unsigned T1GPOL
: 1;
1090 unsigned TMR1GE
: 1;
1112 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits
;
1114 #define _T1GSS0 0x01
1115 #define _T1GSS1 0x02
1116 #define _T1GVAL 0x04
1117 #define _T1GGO_NOT_DONE 0x08
1119 #define _T1GSPM 0x10
1121 #define _T1GPOL 0x40
1122 #define _TMR1GE 0x80
1124 //==============================================================================
1126 extern __at(0x001A) __sfr TMR2
;
1127 extern __at(0x001B) __sfr PR2
;
1129 //==============================================================================
1132 extern __at(0x001C) __sfr T2CON
;
1138 unsigned T2CKPS0
: 1;
1139 unsigned T2CKPS1
: 1;
1140 unsigned TMR2ON
: 1;
1141 unsigned T2OUTPS0
: 1;
1142 unsigned T2OUTPS1
: 1;
1143 unsigned T2OUTPS2
: 1;
1144 unsigned T2OUTPS3
: 1;
1150 unsigned T2CKPS
: 2;
1157 unsigned T2OUTPS
: 4;
1162 extern __at(0x001C) volatile __T2CONbits_t T2CONbits
;
1164 #define _T2CKPS0 0x01
1165 #define _T2CKPS1 0x02
1166 #define _TMR2ON 0x04
1167 #define _T2OUTPS0 0x08
1168 #define _T2OUTPS1 0x10
1169 #define _T2OUTPS2 0x20
1170 #define _T2OUTPS3 0x40
1172 //==============================================================================
1175 //==============================================================================
1178 extern __at(0x001E) __sfr CPSCON0
;
1185 unsigned CPSOUT
: 1;
1186 unsigned CPSRNG0
: 1;
1187 unsigned CPSRNG1
: 1;
1197 unsigned CPSRNG
: 2;
1202 extern __at(0x001E) volatile __CPSCON0bits_t CPSCON0bits
;
1205 #define _CPSOUT 0x02
1206 #define _CPSRNG0 0x04
1207 #define _CPSRNG1 0x08
1211 //==============================================================================
1214 //==============================================================================
1217 extern __at(0x001F) __sfr CPSCON1
;
1223 unsigned CPSCH0
: 1;
1224 unsigned CPSCH1
: 1;
1225 unsigned CPSCH2
: 1;
1226 unsigned CPSCH3
: 1;
1227 unsigned CPSCH4
: 1;
1240 extern __at(0x001F) volatile __CPSCON1bits_t CPSCON1bits
;
1242 #define _CPSCH0 0x01
1243 #define _CPSCH1 0x02
1244 #define _CPSCH2 0x04
1245 #define _CPSCH3 0x08
1246 #define _CPSCH4 0x10
1248 //==============================================================================
1251 //==============================================================================
1254 extern __at(0x008C) __sfr TRISA
;
1258 unsigned TRISA0
: 1;
1259 unsigned TRISA1
: 1;
1260 unsigned TRISA2
: 1;
1261 unsigned TRISA3
: 1;
1262 unsigned TRISA4
: 1;
1263 unsigned TRISA5
: 1;
1264 unsigned TRISA6
: 1;
1265 unsigned TRISA7
: 1;
1268 extern __at(0x008C) volatile __TRISAbits_t TRISAbits
;
1270 #define _TRISA0 0x01
1271 #define _TRISA1 0x02
1272 #define _TRISA2 0x04
1273 #define _TRISA3 0x08
1274 #define _TRISA4 0x10
1275 #define _TRISA5 0x20
1276 #define _TRISA6 0x40
1277 #define _TRISA7 0x80
1279 //==============================================================================
1282 //==============================================================================
1285 extern __at(0x008D) __sfr TRISB
;
1289 unsigned TRISB0
: 1;
1290 unsigned TRISB1
: 1;
1291 unsigned TRISB2
: 1;
1292 unsigned TRISB3
: 1;
1293 unsigned TRISB4
: 1;
1294 unsigned TRISB5
: 1;
1295 unsigned TRISB6
: 1;
1296 unsigned TRISB7
: 1;
1299 extern __at(0x008D) volatile __TRISBbits_t TRISBbits
;
1301 #define _TRISB0 0x01
1302 #define _TRISB1 0x02
1303 #define _TRISB2 0x04
1304 #define _TRISB3 0x08
1305 #define _TRISB4 0x10
1306 #define _TRISB5 0x20
1307 #define _TRISB6 0x40
1308 #define _TRISB7 0x80
1310 //==============================================================================
1313 //==============================================================================
1316 extern __at(0x008E) __sfr TRISC
;
1320 unsigned TRISC0
: 1;
1321 unsigned TRISC1
: 1;
1322 unsigned TRISC2
: 1;
1323 unsigned TRISC3
: 1;
1324 unsigned TRISC4
: 1;
1325 unsigned TRISC5
: 1;
1326 unsigned TRISC6
: 1;
1327 unsigned TRISC7
: 1;
1330 extern __at(0x008E) volatile __TRISCbits_t TRISCbits
;
1332 #define _TRISC0 0x01
1333 #define _TRISC1 0x02
1334 #define _TRISC2 0x04
1335 #define _TRISC3 0x08
1336 #define _TRISC4 0x10
1337 #define _TRISC5 0x20
1338 #define _TRISC6 0x40
1339 #define _TRISC7 0x80
1341 //==============================================================================
1344 //==============================================================================
1347 extern __at(0x008F) __sfr TRISD
;
1351 unsigned TRISD0
: 1;
1352 unsigned TRISD1
: 1;
1353 unsigned TRISD2
: 1;
1354 unsigned TRISD3
: 1;
1355 unsigned TRISD4
: 1;
1356 unsigned TRISD5
: 1;
1357 unsigned TRISD6
: 1;
1358 unsigned TRISD7
: 1;
1361 extern __at(0x008F) volatile __TRISDbits_t TRISDbits
;
1363 #define _TRISD0 0x01
1364 #define _TRISD1 0x02
1365 #define _TRISD2 0x04
1366 #define _TRISD3 0x08
1367 #define _TRISD4 0x10
1368 #define _TRISD5 0x20
1369 #define _TRISD6 0x40
1370 #define _TRISD7 0x80
1372 //==============================================================================
1375 //==============================================================================
1378 extern __at(0x0090) __sfr TRISE
;
1382 unsigned TRISE0
: 1;
1383 unsigned TRISE1
: 1;
1384 unsigned TRISE2
: 1;
1385 unsigned TRISE3
: 1;
1386 unsigned TRISE4
: 1;
1387 unsigned TRISE5
: 1;
1388 unsigned TRISE6
: 1;
1389 unsigned TRISE7
: 1;
1392 extern __at(0x0090) volatile __TRISEbits_t TRISEbits
;
1394 #define _TRISE0 0x01
1395 #define _TRISE1 0x02
1396 #define _TRISE2 0x04
1397 #define _TRISE3 0x08
1398 #define _TRISE4 0x10
1399 #define _TRISE5 0x20
1400 #define _TRISE6 0x40
1401 #define _TRISE7 0x80
1403 //==============================================================================
1406 //==============================================================================
1409 extern __at(0x0091) __sfr PIE1
;
1415 unsigned TMR1IE
: 1;
1416 unsigned TMR2IE
: 1;
1417 unsigned CCP1IE
: 1;
1418 unsigned SSP1IE
: 1;
1422 unsigned TMR1GIE
: 1;
1438 extern __at(0x0091) volatile __PIE1bits_t PIE1bits
;
1440 #define _TMR1IE 0x01
1441 #define _TMR2IE 0x02
1442 #define _CCP1IE 0x04
1443 #define _SSP1IE 0x08
1450 #define _TMR1GIE 0x80
1452 //==============================================================================
1455 //==============================================================================
1458 extern __at(0x0092) __sfr PIE2
;
1462 unsigned CCP2IE
: 1;
1472 extern __at(0x0092) volatile __PIE2bits_t PIE2bits
;
1474 #define _CCP2IE 0x01
1483 //==============================================================================
1486 //==============================================================================
1489 extern __at(0x0093) __sfr PIE3
;
1494 unsigned TMR4IE
: 1;
1496 unsigned TMR6IE
: 1;
1497 unsigned CCP3IE
: 1;
1498 unsigned CCP4IE
: 1;
1499 unsigned CCP5IE
: 1;
1503 extern __at(0x0093) volatile __PIE3bits_t PIE3bits
;
1505 #define _TMR4IE 0x02
1506 #define _TMR6IE 0x08
1507 #define _CCP3IE 0x10
1508 #define _CCP4IE 0x20
1509 #define _CCP5IE 0x40
1511 //==============================================================================
1514 //==============================================================================
1517 extern __at(0x0094) __sfr PIE4
;
1521 unsigned SSP2IE
: 1;
1522 unsigned BCL2IE
: 1;
1531 extern __at(0x0094) volatile __PIE4bits_t PIE4bits
;
1533 #define _SSP2IE 0x01
1534 #define _BCL2IE 0x02
1538 //==============================================================================
1541 //==============================================================================
1544 extern __at(0x0095) __sfr OPTION_REG
;
1556 unsigned INTEDG
: 1;
1557 unsigned NOT_WPUEN
: 1;
1566 unsigned TMR0SE
: 1;
1567 unsigned TMR0CS
: 1;
1577 } __OPTION_REGbits_t
;
1579 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits
;
1586 #define _TMR0SE 0x10
1588 #define _TMR0CS 0x20
1589 #define _INTEDG 0x40
1590 #define _NOT_WPUEN 0x80
1592 //==============================================================================
1595 //==============================================================================
1598 extern __at(0x0096) __sfr PCON
;
1602 unsigned NOT_BOR
: 1;
1603 unsigned NOT_POR
: 1;
1604 unsigned NOT_RI
: 1;
1605 unsigned NOT_RMCLR
: 1;
1608 unsigned STKUNF
: 1;
1609 unsigned STKOVF
: 1;
1612 extern __at(0x0096) volatile __PCONbits_t PCONbits
;
1614 #define _NOT_BOR 0x01
1615 #define _NOT_POR 0x02
1616 #define _NOT_RI 0x04
1617 #define _NOT_RMCLR 0x08
1618 #define _STKUNF 0x40
1619 #define _STKOVF 0x80
1621 //==============================================================================
1624 //==============================================================================
1627 extern __at(0x0097) __sfr WDTCON
;
1633 unsigned SWDTEN
: 1;
1634 unsigned WDTPS0
: 1;
1635 unsigned WDTPS1
: 1;
1636 unsigned WDTPS2
: 1;
1637 unsigned WDTPS3
: 1;
1638 unsigned WDTPS4
: 1;
1651 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits
;
1653 #define _SWDTEN 0x01
1654 #define _WDTPS0 0x02
1655 #define _WDTPS1 0x04
1656 #define _WDTPS2 0x08
1657 #define _WDTPS3 0x10
1658 #define _WDTPS4 0x20
1660 //==============================================================================
1663 //==============================================================================
1666 extern __at(0x0098) __sfr OSCTUNE
;
1689 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits
;
1698 //==============================================================================
1701 //==============================================================================
1704 extern __at(0x0099) __sfr OSCCON
;
1717 unsigned SPLLEN
: 1;
1734 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits
;
1742 #define _SPLLEN 0x80
1744 //==============================================================================
1747 //==============================================================================
1750 extern __at(0x009A) __sfr OSCSTAT
;
1754 unsigned HFIOFS
: 1;
1755 unsigned LFIOFR
: 1;
1756 unsigned MFIOFR
: 1;
1757 unsigned HFIOFL
: 1;
1758 unsigned HFIOFR
: 1;
1761 unsigned T1OSCR
: 1;
1764 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits
;
1766 #define _HFIOFS 0x01
1767 #define _LFIOFR 0x02
1768 #define _MFIOFR 0x04
1769 #define _HFIOFL 0x08
1770 #define _HFIOFR 0x10
1773 #define _T1OSCR 0x80
1775 //==============================================================================
1777 extern __at(0x009B) __sfr ADRES
;
1778 extern __at(0x009B) __sfr ADRESL
;
1779 extern __at(0x009C) __sfr ADRESH
;
1781 //==============================================================================
1784 extern __at(0x009D) __sfr ADCON0
;
1791 unsigned GO_NOT_DONE
: 1;
1827 unsigned NOT_DONE
: 1;
1844 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits
;
1847 #define _GO_NOT_DONE 0x02
1850 #define _NOT_DONE 0x02
1857 //==============================================================================
1860 //==============================================================================
1863 extern __at(0x009E) __sfr ADCON1
;
1869 unsigned ADPREF0
: 1;
1870 unsigned ADPREF1
: 1;
1871 unsigned ADNREF
: 1;
1881 unsigned ADPREF
: 2;
1893 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits
;
1895 #define _ADPREF0 0x01
1896 #define _ADPREF1 0x02
1897 #define _ADNREF 0x04
1903 //==============================================================================
1906 //==============================================================================
1909 extern __at(0x010C) __sfr LATA
;
1923 extern __at(0x010C) volatile __LATAbits_t LATAbits
;
1934 //==============================================================================
1937 //==============================================================================
1940 extern __at(0x010D) __sfr LATB
;
1954 extern __at(0x010D) volatile __LATBbits_t LATBbits
;
1965 //==============================================================================
1968 //==============================================================================
1971 extern __at(0x010E) __sfr LATC
;
1985 extern __at(0x010E) volatile __LATCbits_t LATCbits
;
1996 //==============================================================================
1999 //==============================================================================
2002 extern __at(0x010F) __sfr LATD
;
2016 extern __at(0x010F) volatile __LATDbits_t LATDbits
;
2027 //==============================================================================
2030 //==============================================================================
2033 extern __at(0x0110) __sfr LATE
;
2047 extern __at(0x0110) volatile __LATEbits_t LATEbits
;
2058 //==============================================================================
2061 //==============================================================================
2064 extern __at(0x0111) __sfr CM1CON0
;
2068 unsigned C1SYNC
: 1;
2078 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits
;
2080 #define _C1SYNC 0x01
2088 //==============================================================================
2091 //==============================================================================
2094 extern __at(0x0112) __sfr CM1CON1
;
2100 unsigned C1NCH0
: 1;
2101 unsigned C1NCH1
: 1;
2104 unsigned C1PCH0
: 1;
2105 unsigned C1PCH1
: 1;
2106 unsigned C1INTN
: 1;
2107 unsigned C1INTP
: 1;
2124 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits
;
2126 #define _C1NCH0 0x01
2127 #define _C1NCH1 0x02
2128 #define _C1PCH0 0x10
2129 #define _C1PCH1 0x20
2130 #define _C1INTN 0x40
2131 #define _C1INTP 0x80
2133 //==============================================================================
2136 //==============================================================================
2139 extern __at(0x0113) __sfr CM2CON0
;
2143 unsigned C2SYNC
: 1;
2153 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits
;
2155 #define _C2SYNC 0x01
2163 //==============================================================================
2166 //==============================================================================
2169 extern __at(0x0114) __sfr CM2CON1
;
2175 unsigned C2NCH0
: 1;
2176 unsigned C2NCH1
: 1;
2179 unsigned C2PCH0
: 1;
2180 unsigned C2PCH1
: 1;
2181 unsigned C2INTN
: 1;
2182 unsigned C2INTP
: 1;
2199 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits
;
2201 #define _C2NCH0 0x01
2202 #define _C2NCH1 0x02
2203 #define _C2PCH0 0x10
2204 #define _C2PCH1 0x20
2205 #define _C2INTN 0x40
2206 #define _C2INTP 0x80
2208 //==============================================================================
2211 //==============================================================================
2214 extern __at(0x0115) __sfr CMOUT
;
2218 unsigned MC1OUT
: 1;
2219 unsigned MC2OUT
: 1;
2220 unsigned MC3OUT
: 1;
2228 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits
;
2230 #define _MC1OUT 0x01
2231 #define _MC2OUT 0x02
2232 #define _MC3OUT 0x04
2234 //==============================================================================
2237 //==============================================================================
2240 extern __at(0x0116) __sfr BORCON
;
2244 unsigned BORRDY
: 1;
2251 unsigned SBOREN
: 1;
2254 extern __at(0x0116) volatile __BORCONbits_t BORCONbits
;
2256 #define _BORRDY 0x01
2257 #define _SBOREN 0x80
2259 //==============================================================================
2262 //==============================================================================
2265 extern __at(0x0117) __sfr FVRCON
;
2271 unsigned ADFVR0
: 1;
2272 unsigned ADFVR1
: 1;
2273 unsigned CDAFVR0
: 1;
2274 unsigned CDAFVR1
: 1;
2277 unsigned FVRRDY
: 1;
2290 unsigned CDAFVR
: 2;
2295 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits
;
2297 #define _ADFVR0 0x01
2298 #define _ADFVR1 0x02
2299 #define _CDAFVR0 0x04
2300 #define _CDAFVR1 0x08
2303 #define _FVRRDY 0x40
2306 //==============================================================================
2309 //==============================================================================
2312 extern __at(0x0118) __sfr DACCON0
;
2318 unsigned DACNSS
: 1;
2320 unsigned DACPSS0
: 1;
2321 unsigned DACPSS1
: 1;
2324 unsigned DACLPS
: 1;
2331 unsigned DACPSS
: 2;
2336 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits
;
2338 #define _DACNSS 0x01
2339 #define _DACPSS0 0x04
2340 #define _DACPSS1 0x08
2342 #define _DACLPS 0x40
2345 //==============================================================================
2348 //==============================================================================
2351 extern __at(0x0119) __sfr DACCON1
;
2374 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits
;
2382 //==============================================================================
2385 //==============================================================================
2388 extern __at(0x011A) __sfr SRCON0
;
2396 unsigned SRNQEN
: 1;
2398 unsigned SRCLK0
: 1;
2399 unsigned SRCLK1
: 1;
2400 unsigned SRCLK2
: 1;
2412 extern __at(0x011A) volatile __SRCON0bits_t SRCON0bits
;
2416 #define _SRNQEN 0x04
2418 #define _SRCLK0 0x10
2419 #define _SRCLK1 0x20
2420 #define _SRCLK2 0x40
2423 //==============================================================================
2426 //==============================================================================
2429 extern __at(0x011B) __sfr SRCON1
;
2433 unsigned SRRC1E
: 1;
2434 unsigned SRRC2E
: 1;
2435 unsigned SRRCKE
: 1;
2437 unsigned SRSC1E
: 1;
2438 unsigned SRSC2E
: 1;
2439 unsigned SRSCKE
: 1;
2443 extern __at(0x011B) volatile __SRCON1bits_t SRCON1bits
;
2445 #define _SRRC1E 0x01
2446 #define _SRRC2E 0x02
2447 #define _SRRCKE 0x04
2449 #define _SRSC1E 0x10
2450 #define _SRSC2E 0x20
2451 #define _SRSCKE 0x40
2454 //==============================================================================
2457 //==============================================================================
2460 extern __at(0x011D) __sfr APFCON
;
2464 unsigned P1BSEL
: 1;
2465 unsigned P1CSEL
: 1;
2466 unsigned CCP2SEL
: 1;
2467 unsigned P2BSEL
: 1;
2468 unsigned P2CSEL
: 1;
2469 unsigned P2DSEL
: 1;
2470 unsigned P3BSEL
: 1;
2471 unsigned P3CSEL
: 1;
2474 extern __at(0x011D) volatile __APFCONbits_t APFCONbits
;
2476 #define _P1BSEL 0x01
2477 #define _P1CSEL 0x02
2478 #define _CCP2SEL 0x04
2479 #define _P2BSEL 0x08
2480 #define _P2CSEL 0x10
2481 #define _P2DSEL 0x20
2482 #define _P3BSEL 0x40
2483 #define _P3CSEL 0x80
2485 //==============================================================================
2488 //==============================================================================
2491 extern __at(0x011E) __sfr CM3CON0
;
2495 unsigned C3SYNC
: 1;
2505 extern __at(0x011E) volatile __CM3CON0bits_t CM3CON0bits
;
2507 #define _C3SYNC 0x01
2515 //==============================================================================
2518 //==============================================================================
2521 extern __at(0x011F) __sfr CM3CON1
;
2527 unsigned C3NCH0
: 1;
2528 unsigned C3NCH1
: 1;
2531 unsigned C3PCH0
: 1;
2532 unsigned C3PCH1
: 1;
2533 unsigned C3INTN
: 1;
2534 unsigned C3INTP
: 1;
2551 extern __at(0x011F) volatile __CM3CON1bits_t CM3CON1bits
;
2553 #define _C3NCH0 0x01
2554 #define _C3NCH1 0x02
2555 #define _C3PCH0 0x10
2556 #define _C3PCH1 0x20
2557 #define _C3INTN 0x40
2558 #define _C3INTP 0x80
2560 //==============================================================================
2563 //==============================================================================
2566 extern __at(0x018C) __sfr ANSELA
;
2580 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits
;
2588 //==============================================================================
2591 //==============================================================================
2594 extern __at(0x0190) __sfr ANSELE
;
2617 extern __at(0x0190) volatile __ANSELEbits_t ANSELEbits
;
2623 //==============================================================================
2625 extern __at(0x0191) __sfr EEADR
;
2626 extern __at(0x0191) __sfr EEADRL
;
2627 extern __at(0x0192) __sfr EEADRH
;
2628 extern __at(0x0193) __sfr EEDAT
;
2629 extern __at(0x0193) __sfr EEDATL
;
2630 extern __at(0x0194) __sfr EEDATH
;
2632 //==============================================================================
2635 extern __at(0x0195) __sfr EECON1
;
2649 extern __at(0x0195) volatile __EECON1bits_t EECON1bits
;
2660 //==============================================================================
2662 extern __at(0x0196) __sfr EECON2
;
2663 extern __at(0x0199) __sfr RC1REG
;
2664 extern __at(0x0199) __sfr RCREG
;
2665 extern __at(0x019A) __sfr TX1REG
;
2666 extern __at(0x019A) __sfr TXREG
;
2667 extern __at(0x019B) __sfr SP1BRG
;
2668 extern __at(0x019B) __sfr SP1BRGL
;
2669 extern __at(0x019B) __sfr SPBRG
;
2670 extern __at(0x019B) __sfr SPBRGL
;
2671 extern __at(0x019C) __sfr SP1BRGH
;
2672 extern __at(0x019C) __sfr SPBRGH
;
2674 //==============================================================================
2677 extern __at(0x019D) __sfr RC1STA
;
2691 extern __at(0x019D) volatile __RC1STAbits_t RC1STAbits
;
2702 //==============================================================================
2705 //==============================================================================
2708 extern __at(0x019D) __sfr RCSTA
;
2722 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits
;
2724 #define _RCSTA_RX9D 0x01
2725 #define _RCSTA_OERR 0x02
2726 #define _RCSTA_FERR 0x04
2727 #define _RCSTA_ADDEN 0x08
2728 #define _RCSTA_CREN 0x10
2729 #define _RCSTA_SREN 0x20
2730 #define _RCSTA_RX9 0x40
2731 #define _RCSTA_SPEN 0x80
2733 //==============================================================================
2736 //==============================================================================
2739 extern __at(0x019E) __sfr TX1STA
;
2753 extern __at(0x019E) volatile __TX1STAbits_t TX1STAbits
;
2764 //==============================================================================
2767 //==============================================================================
2770 extern __at(0x019E) __sfr TXSTA
;
2784 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits
;
2786 #define _TXSTA_TX9D 0x01
2787 #define _TXSTA_TRMT 0x02
2788 #define _TXSTA_BRGH 0x04
2789 #define _TXSTA_SENDB 0x08
2790 #define _TXSTA_SYNC 0x10
2791 #define _TXSTA_TXEN 0x20
2792 #define _TXSTA_TX9 0x40
2793 #define _TXSTA_CSRC 0x80
2795 //==============================================================================
2798 //==============================================================================
2801 extern __at(0x019F) __sfr BAUD1CON
;
2812 unsigned ABDOVF
: 1;
2815 extern __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits
;
2822 #define _ABDOVF 0x80
2824 //==============================================================================
2827 //==============================================================================
2830 extern __at(0x019F) __sfr BAUDCON
;
2841 unsigned ABDOVF
: 1;
2844 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits
;
2846 #define _BAUDCON_ABDEN 0x01
2847 #define _BAUDCON_WUE 0x02
2848 #define _BAUDCON_BRG16 0x08
2849 #define _BAUDCON_SCKP 0x10
2850 #define _BAUDCON_RCIDL 0x40
2851 #define _BAUDCON_ABDOVF 0x80
2853 //==============================================================================
2856 //==============================================================================
2859 extern __at(0x020D) __sfr WPUB
;
2873 extern __at(0x020D) volatile __WPUBbits_t WPUBbits
;
2884 //==============================================================================
2886 extern __at(0x0211) __sfr SSP1BUF
;
2887 extern __at(0x0211) __sfr SSPBUF
;
2888 extern __at(0x0212) __sfr SSP1ADD
;
2889 extern __at(0x0212) __sfr SSPADD
;
2890 extern __at(0x0213) __sfr SSP1MSK
;
2891 extern __at(0x0213) __sfr SSPMSK
;
2893 //==============================================================================
2896 extern __at(0x0214) __sfr SSP1STAT
;
2902 unsigned R_NOT_W
: 1;
2905 unsigned D_NOT_A
: 1;
2910 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits
;
2914 #define _R_NOT_W 0x04
2917 #define _D_NOT_A 0x20
2921 //==============================================================================
2924 //==============================================================================
2927 extern __at(0x0214) __sfr SSPSTAT
;
2933 unsigned R_NOT_W
: 1;
2936 unsigned D_NOT_A
: 1;
2941 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits
;
2943 #define _SSPSTAT_BF 0x01
2944 #define _SSPSTAT_UA 0x02
2945 #define _SSPSTAT_R_NOT_W 0x04
2946 #define _SSPSTAT_S 0x08
2947 #define _SSPSTAT_P 0x10
2948 #define _SSPSTAT_D_NOT_A 0x20
2949 #define _SSPSTAT_CKE 0x40
2950 #define _SSPSTAT_SMP 0x80
2952 //==============================================================================
2955 //==============================================================================
2958 extern __at(0x0215) __sfr SSP1CON1
;
2981 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits
;
2992 //==============================================================================
2995 //==============================================================================
2998 extern __at(0x0215) __sfr SSPCON
;
3021 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits
;
3023 #define _SSPCON_SSPM0 0x01
3024 #define _SSPCON_SSPM1 0x02
3025 #define _SSPCON_SSPM2 0x04
3026 #define _SSPCON_SSPM3 0x08
3027 #define _SSPCON_CKP 0x10
3028 #define _SSPCON_SSPEN 0x20
3029 #define _SSPCON_SSPOV 0x40
3030 #define _SSPCON_WCOL 0x80
3032 //==============================================================================
3035 //==============================================================================
3038 extern __at(0x0215) __sfr SSPCON1
;
3061 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits
;
3063 #define _SSPCON1_SSPM0 0x01
3064 #define _SSPCON1_SSPM1 0x02
3065 #define _SSPCON1_SSPM2 0x04
3066 #define _SSPCON1_SSPM3 0x08
3067 #define _SSPCON1_CKP 0x10
3068 #define _SSPCON1_SSPEN 0x20
3069 #define _SSPCON1_SSPOV 0x40
3070 #define _SSPCON1_WCOL 0x80
3072 //==============================================================================
3075 //==============================================================================
3078 extern __at(0x0216) __sfr SSP1CON2
;
3088 unsigned ACKSTAT
: 1;
3092 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits
;
3100 #define _ACKSTAT 0x40
3103 //==============================================================================
3106 //==============================================================================
3109 extern __at(0x0216) __sfr SSPCON2
;
3119 unsigned ACKSTAT
: 1;
3123 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits
;
3125 #define _SSPCON2_SEN 0x01
3126 #define _SSPCON2_RSEN 0x02
3127 #define _SSPCON2_PEN 0x04
3128 #define _SSPCON2_RCEN 0x08
3129 #define _SSPCON2_ACKEN 0x10
3130 #define _SSPCON2_ACKDT 0x20
3131 #define _SSPCON2_ACKSTAT 0x40
3132 #define _SSPCON2_GCEN 0x80
3134 //==============================================================================
3137 //==============================================================================
3140 extern __at(0x0217) __sfr SSP1CON3
;
3151 unsigned ACKTIM
: 1;
3154 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits
;
3163 #define _ACKTIM 0x80
3165 //==============================================================================
3168 //==============================================================================
3171 extern __at(0x0217) __sfr SSPCON3
;
3182 unsigned ACKTIM
: 1;
3185 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits
;
3187 #define _SSPCON3_DHEN 0x01
3188 #define _SSPCON3_AHEN 0x02
3189 #define _SSPCON3_SBCDE 0x04
3190 #define _SSPCON3_SDAHT 0x08
3191 #define _SSPCON3_BOEN 0x10
3192 #define _SSPCON3_SCIE 0x20
3193 #define _SSPCON3_PCIE 0x40
3194 #define _SSPCON3_ACKTIM 0x80
3196 //==============================================================================
3198 extern __at(0x0219) __sfr SSP2BUF
;
3199 extern __at(0x021A) __sfr SSP2ADD
;
3200 extern __at(0x021B) __sfr SSP2MSK
;
3202 //==============================================================================
3205 extern __at(0x021C) __sfr SSP2STAT
;
3211 unsigned R_NOT_W
: 1;
3214 unsigned D_NOT_A
: 1;
3219 extern __at(0x021C) volatile __SSP2STATbits_t SSP2STATbits
;
3221 #define _SSP2STAT_BF 0x01
3222 #define _SSP2STAT_UA 0x02
3223 #define _SSP2STAT_R_NOT_W 0x04
3224 #define _SSP2STAT_S 0x08
3225 #define _SSP2STAT_P 0x10
3226 #define _SSP2STAT_D_NOT_A 0x20
3227 #define _SSP2STAT_CKE 0x40
3228 #define _SSP2STAT_SMP 0x80
3230 //==============================================================================
3233 //==============================================================================
3236 extern __at(0x021D) __sfr SSP2CON1
;
3259 extern __at(0x021D) volatile __SSP2CON1bits_t SSP2CON1bits
;
3261 #define _SSP2CON1_SSPM0 0x01
3262 #define _SSP2CON1_SSPM1 0x02
3263 #define _SSP2CON1_SSPM2 0x04
3264 #define _SSP2CON1_SSPM3 0x08
3265 #define _SSP2CON1_CKP 0x10
3266 #define _SSP2CON1_SSPEN 0x20
3267 #define _SSP2CON1_SSPOV 0x40
3268 #define _SSP2CON1_WCOL 0x80
3270 //==============================================================================
3273 //==============================================================================
3276 extern __at(0x021E) __sfr SSP2CON2
;
3286 unsigned ACKSTAT
: 1;
3290 extern __at(0x021E) volatile __SSP2CON2bits_t SSP2CON2bits
;
3292 #define _SSP2CON2_SEN 0x01
3293 #define _SSP2CON2_RSEN 0x02
3294 #define _SSP2CON2_PEN 0x04
3295 #define _SSP2CON2_RCEN 0x08
3296 #define _SSP2CON2_ACKEN 0x10
3297 #define _SSP2CON2_ACKDT 0x20
3298 #define _SSP2CON2_ACKSTAT 0x40
3299 #define _SSP2CON2_GCEN 0x80
3301 //==============================================================================
3304 //==============================================================================
3307 extern __at(0x021F) __sfr SSP2CON3
;
3318 unsigned ACKTIM
: 1;
3321 extern __at(0x021F) volatile __SSP2CON3bits_t SSP2CON3bits
;
3323 #define _SSP2CON3_DHEN 0x01
3324 #define _SSP2CON3_AHEN 0x02
3325 #define _SSP2CON3_SBCDE 0x04
3326 #define _SSP2CON3_SDAHT 0x08
3327 #define _SSP2CON3_BOEN 0x10
3328 #define _SSP2CON3_SCIE 0x20
3329 #define _SSP2CON3_PCIE 0x40
3330 #define _SSP2CON3_ACKTIM 0x80
3332 //==============================================================================
3335 //==============================================================================
3338 extern __at(0x028C) __sfr PORTF
;
3392 unsigned C1IN0N
: 1;
3395 unsigned C1IN2N
: 1;
3397 unsigned C1IN1N
: 1;
3399 unsigned C1IN3N
: 1;
3404 unsigned C2IN0N
: 1;
3407 unsigned C2IN2N
: 1;
3409 unsigned C2IN1N
: 1;
3411 unsigned C2IN3N
: 1;
3419 unsigned C3IN2N
: 1;
3421 unsigned DACOUT
: 1;
3423 unsigned C3IN3N
: 1;
3427 extern __at(0x028C) volatile __PORTFbits_t PORTFbits
;
3429 #define _PORTF_RF0 0x01
3430 #define _PORTF_AN16 0x01
3431 #define _PORTF_SEG41 0x01
3432 #define _PORTF_CPS16 0x01
3433 #define _PORTF_C1IN0N 0x01
3434 #define _PORTF_C2IN0N 0x01
3435 #define _PORTF_RF1 0x02
3436 #define _PORTF_AN6 0x02
3437 #define _PORTF_SEG19 0x02
3438 #define _PORTF_CPS6 0x02
3439 #define _PORTF_C2OUT 0x02
3440 #define _PORTF_SRNQ 0x02
3441 #define _PORTF_RF2 0x04
3442 #define _PORTF_AN7 0x04
3443 #define _PORTF_SEG20 0x04
3444 #define _PORTF_CPS7 0x04
3445 #define _PORTF_C1OUT 0x04
3446 #define _PORTF_SRQ 0x04
3447 #define _PORTF_RF3 0x08
3448 #define _PORTF_AN8 0x08
3449 #define _PORTF_SEG21 0x08
3450 #define _PORTF_CPS8 0x08
3451 #define _PORTF_C1IN2N 0x08
3452 #define _PORTF_C2IN2N 0x08
3453 #define _PORTF_C3IN2N 0x08
3454 #define _PORTF_RF4 0x10
3455 #define _PORTF_AN9 0x10
3456 #define _PORTF_SEG22 0x10
3457 #define _PORTF_CPS9 0x10
3458 #define _PORTF_C2INP 0x10
3459 #define _PORTF_RF5 0x20
3460 #define _PORTF_AN10 0x20
3461 #define _PORTF_SEG23 0x20
3462 #define _PORTF_CPS10 0x20
3463 #define _PORTF_C1IN1N 0x20
3464 #define _PORTF_C2IN1N 0x20
3465 #define _PORTF_DACOUT 0x20
3466 #define _PORTF_RF6 0x40
3467 #define _PORTF_AN11 0x40
3468 #define _PORTF_SEG24 0x40
3469 #define _PORTF_CPS11 0x40
3470 #define _PORTF_C1INP 0x40
3471 #define _PORTF_RF7 0x80
3472 #define _PORTF_AN5 0x80
3473 #define _PORTF_SEG25 0x80
3474 #define _PORTF_CPS5 0x80
3475 #define _PORTF_C1IN3N 0x80
3476 #define _PORTF_C2IN3N 0x80
3477 #define _PORTF_C3IN3N 0x80
3479 //==============================================================================
3482 //==============================================================================
3485 extern __at(0x028D) __sfr PORTG
;
3508 unsigned NOT_MCLR
: 1;
3542 unsigned C3IN0N
: 1;
3543 unsigned C3IN1N
: 1;
3580 extern __at(0x028D) volatile __PORTGbits_t PORTGbits
;
3582 #define _PORTG_RG0 0x01
3583 #define _PORTG_SEG42 0x01
3584 #define _PORTG_CCP3 0x01
3585 #define _PORTG_P3A 0x01
3586 #define _PORTG_RG1 0x02
3587 #define _PORTG_AN15 0x02
3588 #define _PORTG_SEG43 0x02
3589 #define _PORTG_CPS15 0x02
3590 #define _PORTG_C3OUT 0x02
3591 #define _PORTG_TX2 0x02
3592 #define _PORTG_CK2 0x02
3593 #define _PORTG_RG2 0x04
3594 #define _PORTG_AN14 0x04
3595 #define _PORTG_SEG44 0x04
3596 #define _PORTG_CPS14 0x04
3597 #define _PORTG_C3INP 0x04
3598 #define _PORTG_RX2 0x04
3599 #define _PORTG_DT2 0x04
3600 #define _PORTG_RG3 0x08
3601 #define _PORTG_AN13 0x08
3602 #define _PORTG_SEG45 0x08
3603 #define _PORTG_CPS13 0x08
3604 #define _PORTG_C3IN0N 0x08
3605 #define _PORTG_CCP4 0x08
3606 #define _PORTG_P3D 0x08
3607 #define _PORTG_RG4 0x10
3608 #define _PORTG_AN12 0x10
3609 #define _PORTG_SEG26 0x10
3610 #define _PORTG_CPS12 0x10
3611 #define _PORTG_C3IN1N 0x10
3612 #define _PORTG_CCP5 0x10
3613 #define _PORTG_P1D 0x10
3614 #define _PORTG_RG5 0x20
3615 #define _PORTG_NOT_MCLR 0x20
3617 //==============================================================================
3619 extern __at(0x0291) __sfr CCPR1
;
3620 extern __at(0x0291) __sfr CCPR1L
;
3621 extern __at(0x0292) __sfr CCPR1H
;
3623 //==============================================================================
3626 extern __at(0x0293) __sfr CCP1CON
;
3632 unsigned CCP1M0
: 1;
3633 unsigned CCP1M1
: 1;
3634 unsigned CCP1M2
: 1;
3635 unsigned CCP1M3
: 1;
3662 extern __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits
;
3664 #define _CCP1M0 0x01
3665 #define _CCP1M1 0x02
3666 #define _CCP1M2 0x04
3667 #define _CCP1M3 0x08
3673 //==============================================================================
3676 //==============================================================================
3679 extern __at(0x0294) __sfr PWM1CON
;
3692 unsigned P1RSEN
: 1;
3702 extern __at(0x0294) volatile __PWM1CONbits_t PWM1CONbits
;
3711 #define _P1RSEN 0x80
3713 //==============================================================================
3716 //==============================================================================
3719 extern __at(0x0295) __sfr CCP1AS
;
3725 unsigned PSS1BD0
: 1;
3726 unsigned PSS1BD1
: 1;
3727 unsigned PSS1AC0
: 1;
3728 unsigned PSS1AC1
: 1;
3729 unsigned CCP1AS0
: 1;
3730 unsigned CCP1AS1
: 1;
3731 unsigned CCP1AS2
: 1;
3732 unsigned CCP1ASE
: 1;
3737 unsigned PSS1BD
: 2;
3744 unsigned PSS1AC
: 2;
3751 unsigned CCP1AS
: 3;
3756 extern __at(0x0295) volatile __CCP1ASbits_t CCP1ASbits
;
3758 #define _PSS1BD0 0x01
3759 #define _PSS1BD1 0x02
3760 #define _PSS1AC0 0x04
3761 #define _PSS1AC1 0x08
3762 #define _CCP1AS0 0x10
3763 #define _CCP1AS1 0x20
3764 #define _CCP1AS2 0x40
3765 #define _CCP1ASE 0x80
3767 //==============================================================================
3770 //==============================================================================
3773 extern __at(0x0295) __sfr ECCP1AS
;
3779 unsigned PSS1BD0
: 1;
3780 unsigned PSS1BD1
: 1;
3781 unsigned PSS1AC0
: 1;
3782 unsigned PSS1AC1
: 1;
3783 unsigned CCP1AS0
: 1;
3784 unsigned CCP1AS1
: 1;
3785 unsigned CCP1AS2
: 1;
3786 unsigned CCP1ASE
: 1;
3791 unsigned PSS1BD
: 2;
3798 unsigned PSS1AC
: 2;
3805 unsigned CCP1AS
: 3;
3810 extern __at(0x0295) volatile __ECCP1ASbits_t ECCP1ASbits
;
3812 #define _ECCP1AS_PSS1BD0 0x01
3813 #define _ECCP1AS_PSS1BD1 0x02
3814 #define _ECCP1AS_PSS1AC0 0x04
3815 #define _ECCP1AS_PSS1AC1 0x08
3816 #define _ECCP1AS_CCP1AS0 0x10
3817 #define _ECCP1AS_CCP1AS1 0x20
3818 #define _ECCP1AS_CCP1AS2 0x40
3819 #define _ECCP1AS_CCP1ASE 0x80
3821 //==============================================================================
3824 //==============================================================================
3827 extern __at(0x0296) __sfr PSTR1CON
;
3835 unsigned STR1SYNC
: 1;
3841 extern __at(0x0296) volatile __PSTR1CONbits_t PSTR1CONbits
;
3847 #define _STR1SYNC 0x10
3849 //==============================================================================
3851 extern __at(0x0298) __sfr CCPR2
;
3852 extern __at(0x0298) __sfr CCPR2L
;
3853 extern __at(0x0299) __sfr CCPR2H
;
3855 //==============================================================================
3858 extern __at(0x029A) __sfr CCP2CON
;
3864 unsigned CCP2M0
: 1;
3865 unsigned CCP2M1
: 1;
3866 unsigned CCP2M2
: 1;
3867 unsigned CCP2M3
: 1;
3894 extern __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits
;
3896 #define _CCP2M0 0x01
3897 #define _CCP2M1 0x02
3898 #define _CCP2M2 0x04
3899 #define _CCP2M3 0x08
3905 //==============================================================================
3908 //==============================================================================
3911 extern __at(0x029B) __sfr PWM2CON
;
3924 unsigned P2RSEN
: 1;
3934 extern __at(0x029B) volatile __PWM2CONbits_t PWM2CONbits
;
3943 #define _P2RSEN 0x80
3945 //==============================================================================
3948 //==============================================================================
3951 extern __at(0x029C) __sfr CCP2AS
;
3957 unsigned PSS2BD0
: 1;
3958 unsigned PSS2BD1
: 1;
3959 unsigned PSS2AC0
: 1;
3960 unsigned PSS2AC1
: 1;
3961 unsigned CCP2AS0
: 1;
3962 unsigned CCP2AS1
: 1;
3963 unsigned CCP2AS2
: 1;
3964 unsigned CCP2ASE
: 1;
3969 unsigned PSS2BD
: 2;
3976 unsigned PSS2AC
: 2;
3983 unsigned CCP2AS
: 3;
3988 extern __at(0x029C) volatile __CCP2ASbits_t CCP2ASbits
;
3990 #define _PSS2BD0 0x01
3991 #define _PSS2BD1 0x02
3992 #define _PSS2AC0 0x04
3993 #define _PSS2AC1 0x08
3994 #define _CCP2AS0 0x10
3995 #define _CCP2AS1 0x20
3996 #define _CCP2AS2 0x40
3997 #define _CCP2ASE 0x80
3999 //==============================================================================
4002 //==============================================================================
4005 extern __at(0x029C) __sfr ECCP2AS
;
4011 unsigned PSS2BD0
: 1;
4012 unsigned PSS2BD1
: 1;
4013 unsigned PSS2AC0
: 1;
4014 unsigned PSS2AC1
: 1;
4015 unsigned CCP2AS0
: 1;
4016 unsigned CCP2AS1
: 1;
4017 unsigned CCP2AS2
: 1;
4018 unsigned CCP2ASE
: 1;
4023 unsigned PSS2BD
: 2;
4030 unsigned PSS2AC
: 2;
4037 unsigned CCP2AS
: 3;
4042 extern __at(0x029C) volatile __ECCP2ASbits_t ECCP2ASbits
;
4044 #define _ECCP2AS_PSS2BD0 0x01
4045 #define _ECCP2AS_PSS2BD1 0x02
4046 #define _ECCP2AS_PSS2AC0 0x04
4047 #define _ECCP2AS_PSS2AC1 0x08
4048 #define _ECCP2AS_CCP2AS0 0x10
4049 #define _ECCP2AS_CCP2AS1 0x20
4050 #define _ECCP2AS_CCP2AS2 0x40
4051 #define _ECCP2AS_CCP2ASE 0x80
4053 //==============================================================================
4056 //==============================================================================
4059 extern __at(0x029D) __sfr PSTR2CON
;
4067 unsigned STR2SYNC
: 1;
4073 extern __at(0x029D) volatile __PSTR2CONbits_t PSTR2CONbits
;
4079 #define _STR2SYNC 0x10
4081 //==============================================================================
4084 //==============================================================================
4087 extern __at(0x029E) __sfr CCPTMRS0
;
4093 unsigned C1TSEL0
: 1;
4094 unsigned C1TSEL1
: 1;
4095 unsigned C2TSEL0
: 1;
4096 unsigned C2TSEL1
: 1;
4097 unsigned C3TSEL0
: 1;
4098 unsigned C3TSEL1
: 1;
4099 unsigned C4TSEL0
: 1;
4100 unsigned C4TSEL1
: 1;
4105 unsigned C1TSEL
: 2;
4112 unsigned C2TSEL
: 2;
4119 unsigned C3TSEL
: 2;
4126 unsigned C4TSEL
: 2;
4130 extern __at(0x029E) volatile __CCPTMRS0bits_t CCPTMRS0bits
;
4132 #define _C1TSEL0 0x01
4133 #define _C1TSEL1 0x02
4134 #define _C2TSEL0 0x04
4135 #define _C2TSEL1 0x08
4136 #define _C3TSEL0 0x10
4137 #define _C3TSEL1 0x20
4138 #define _C4TSEL0 0x40
4139 #define _C4TSEL1 0x80
4141 //==============================================================================
4144 //==============================================================================
4147 extern __at(0x029F) __sfr CCPTMRS1
;
4153 unsigned C5TSEL0
: 1;
4154 unsigned C5TSEL1
: 1;
4165 unsigned C5TSEL
: 2;
4170 extern __at(0x029F) volatile __CCPTMRS1bits_t CCPTMRS1bits
;
4172 #define _C5TSEL0 0x01
4173 #define _C5TSEL1 0x02
4175 //==============================================================================
4178 //==============================================================================
4181 extern __at(0x030C) __sfr TRISF
;
4185 unsigned TRISF0
: 1;
4186 unsigned TRISF1
: 1;
4187 unsigned TRISF2
: 1;
4188 unsigned TRISF3
: 1;
4189 unsigned TRISF4
: 1;
4190 unsigned TRISF5
: 1;
4191 unsigned TRISF6
: 1;
4192 unsigned TRISF7
: 1;
4195 extern __at(0x030C) volatile __TRISFbits_t TRISFbits
;
4197 #define _TRISF0 0x01
4198 #define _TRISF1 0x02
4199 #define _TRISF2 0x04
4200 #define _TRISF3 0x08
4201 #define _TRISF4 0x10
4202 #define _TRISF5 0x20
4203 #define _TRISF6 0x40
4204 #define _TRISF7 0x80
4206 //==============================================================================
4209 //==============================================================================
4212 extern __at(0x030D) __sfr TRISG
;
4218 unsigned TRISG0
: 1;
4219 unsigned TRISG1
: 1;
4220 unsigned TRISG2
: 1;
4221 unsigned TRISG3
: 1;
4222 unsigned TRISG4
: 1;
4223 unsigned TRISG5
: 1;
4235 extern __at(0x030D) volatile __TRISGbits_t TRISGbits
;
4237 #define _TRISG0 0x01
4238 #define _TRISG1 0x02
4239 #define _TRISG2 0x04
4240 #define _TRISG3 0x08
4241 #define _TRISG4 0x10
4242 #define _TRISG5 0x20
4244 //==============================================================================
4246 extern __at(0x0311) __sfr CCPR3
;
4247 extern __at(0x0311) __sfr CCPR3L
;
4248 extern __at(0x0312) __sfr CCPR3H
;
4250 //==============================================================================
4253 extern __at(0x0313) __sfr CCP3CON
;
4259 unsigned CCP3M0
: 1;
4260 unsigned CCP3M1
: 1;
4261 unsigned CCP3M2
: 1;
4262 unsigned CCP3M3
: 1;
4289 extern __at(0x0313) volatile __CCP3CONbits_t CCP3CONbits
;
4291 #define _CCP3M0 0x01
4292 #define _CCP3M1 0x02
4293 #define _CCP3M2 0x04
4294 #define _CCP3M3 0x08
4300 //==============================================================================
4303 //==============================================================================
4306 extern __at(0x0314) __sfr PWM3CON
;
4319 unsigned P3RSEN
: 1;
4329 extern __at(0x0314) volatile __PWM3CONbits_t PWM3CONbits
;
4338 #define _P3RSEN 0x80
4340 //==============================================================================
4343 //==============================================================================
4346 extern __at(0x0315) __sfr CCP3AS
;
4352 unsigned PSS3BD0
: 1;
4353 unsigned PSS3BD1
: 1;
4354 unsigned PSS3AC0
: 1;
4355 unsigned PSS3AC1
: 1;
4356 unsigned CCP3AS0
: 1;
4357 unsigned CCP3AS1
: 1;
4358 unsigned CCP3AS2
: 1;
4359 unsigned CCP3ASE
: 1;
4364 unsigned PSS3BD
: 2;
4371 unsigned PSS3AC
: 2;
4378 unsigned CCP3AS
: 3;
4383 extern __at(0x0315) volatile __CCP3ASbits_t CCP3ASbits
;
4385 #define _PSS3BD0 0x01
4386 #define _PSS3BD1 0x02
4387 #define _PSS3AC0 0x04
4388 #define _PSS3AC1 0x08
4389 #define _CCP3AS0 0x10
4390 #define _CCP3AS1 0x20
4391 #define _CCP3AS2 0x40
4392 #define _CCP3ASE 0x80
4394 //==============================================================================
4397 //==============================================================================
4400 extern __at(0x0315) __sfr ECCP3AS
;
4406 unsigned PSS3BD0
: 1;
4407 unsigned PSS3BD1
: 1;
4408 unsigned PSS3AC0
: 1;
4409 unsigned PSS3AC1
: 1;
4410 unsigned CCP3AS0
: 1;
4411 unsigned CCP3AS1
: 1;
4412 unsigned CCP3AS2
: 1;
4413 unsigned CCP3ASE
: 1;
4418 unsigned PSS3BD
: 2;
4425 unsigned PSS3AC
: 2;
4432 unsigned CCP3AS
: 3;
4437 extern __at(0x0315) volatile __ECCP3ASbits_t ECCP3ASbits
;
4439 #define _ECCP3AS_PSS3BD0 0x01
4440 #define _ECCP3AS_PSS3BD1 0x02
4441 #define _ECCP3AS_PSS3AC0 0x04
4442 #define _ECCP3AS_PSS3AC1 0x08
4443 #define _ECCP3AS_CCP3AS0 0x10
4444 #define _ECCP3AS_CCP3AS1 0x20
4445 #define _ECCP3AS_CCP3AS2 0x40
4446 #define _ECCP3AS_CCP3ASE 0x80
4448 //==============================================================================
4451 //==============================================================================
4454 extern __at(0x0316) __sfr PSTR3CON
;
4462 unsigned STR3SYNC
: 1;
4468 extern __at(0x0316) volatile __PSTR3CONbits_t PSTR3CONbits
;
4474 #define _STR3SYNC 0x10
4476 //==============================================================================
4478 extern __at(0x0318) __sfr CCPR4
;
4479 extern __at(0x0318) __sfr CCPR4L
;
4480 extern __at(0x0319) __sfr CCPR4H
;
4482 //==============================================================================
4485 extern __at(0x031A) __sfr CCP4CON
;
4491 unsigned CCP4M0
: 1;
4492 unsigned CCP4M1
: 1;
4493 unsigned CCP4M2
: 1;
4494 unsigned CCP4M3
: 1;
4515 extern __at(0x031A) volatile __CCP4CONbits_t CCP4CONbits
;
4517 #define _CCP4M0 0x01
4518 #define _CCP4M1 0x02
4519 #define _CCP4M2 0x04
4520 #define _CCP4M3 0x08
4524 //==============================================================================
4526 extern __at(0x031C) __sfr CCPR5
;
4527 extern __at(0x031C) __sfr CCPR5L
;
4528 extern __at(0x031D) __sfr CCPR5H
;
4530 //==============================================================================
4533 extern __at(0x031E) __sfr CCP5CON
;
4539 unsigned CCP5M0
: 1;
4540 unsigned CCP5M1
: 1;
4541 unsigned CCP5M2
: 1;
4542 unsigned CCP5M3
: 1;
4563 extern __at(0x031E) volatile __CCP5CONbits_t CCP5CONbits
;
4565 #define _CCP5M0 0x01
4566 #define _CCP5M1 0x02
4567 #define _CCP5M2 0x04
4568 #define _CCP5M3 0x08
4572 //==============================================================================
4575 //==============================================================================
4578 extern __at(0x038C) __sfr LATF
;
4592 extern __at(0x038C) volatile __LATFbits_t LATFbits
;
4603 //==============================================================================
4606 //==============================================================================
4609 extern __at(0x038D) __sfr LATG
;
4632 extern __at(0x038D) volatile __LATGbits_t LATGbits
;
4641 //==============================================================================
4644 //==============================================================================
4647 extern __at(0x0394) __sfr IOCBP
;
4651 unsigned IOCBP0
: 1;
4652 unsigned IOCBP1
: 1;
4653 unsigned IOCBP2
: 1;
4654 unsigned IOCBP3
: 1;
4655 unsigned IOCBP4
: 1;
4656 unsigned IOCBP5
: 1;
4657 unsigned IOCBP6
: 1;
4658 unsigned IOCBP7
: 1;
4661 extern __at(0x0394) volatile __IOCBPbits_t IOCBPbits
;
4663 #define _IOCBP0 0x01
4664 #define _IOCBP1 0x02
4665 #define _IOCBP2 0x04
4666 #define _IOCBP3 0x08
4667 #define _IOCBP4 0x10
4668 #define _IOCBP5 0x20
4669 #define _IOCBP6 0x40
4670 #define _IOCBP7 0x80
4672 //==============================================================================
4675 //==============================================================================
4678 extern __at(0x0395) __sfr IOCBN
;
4682 unsigned IOCBN0
: 1;
4683 unsigned IOCBN1
: 1;
4684 unsigned IOCBN2
: 1;
4685 unsigned IOCBN3
: 1;
4686 unsigned IOCBN4
: 1;
4687 unsigned IOCBN5
: 1;
4688 unsigned IOCBN6
: 1;
4689 unsigned IOCBN7
: 1;
4692 extern __at(0x0395) volatile __IOCBNbits_t IOCBNbits
;
4694 #define _IOCBN0 0x01
4695 #define _IOCBN1 0x02
4696 #define _IOCBN2 0x04
4697 #define _IOCBN3 0x08
4698 #define _IOCBN4 0x10
4699 #define _IOCBN5 0x20
4700 #define _IOCBN6 0x40
4701 #define _IOCBN7 0x80
4703 //==============================================================================
4706 //==============================================================================
4709 extern __at(0x0396) __sfr IOCBF
;
4713 unsigned IOCBF0
: 1;
4714 unsigned IOCBF1
: 1;
4715 unsigned IOCBF2
: 1;
4716 unsigned IOCBF3
: 1;
4717 unsigned IOCBF4
: 1;
4718 unsigned IOCBF5
: 1;
4719 unsigned IOCBF6
: 1;
4720 unsigned IOCBF7
: 1;
4723 extern __at(0x0396) volatile __IOCBFbits_t IOCBFbits
;
4725 #define _IOCBF0 0x01
4726 #define _IOCBF1 0x02
4727 #define _IOCBF2 0x04
4728 #define _IOCBF3 0x08
4729 #define _IOCBF4 0x10
4730 #define _IOCBF5 0x20
4731 #define _IOCBF6 0x40
4732 #define _IOCBF7 0x80
4734 //==============================================================================
4737 //==============================================================================
4740 extern __at(0x040C) __sfr ANSELF
;
4754 extern __at(0x040C) volatile __ANSELFbits_t ANSELFbits
;
4765 //==============================================================================
4768 //==============================================================================
4771 extern __at(0x040D) __sfr ANSELG
;
4785 extern __at(0x040D) volatile __ANSELGbits_t ANSELGbits
;
4792 //==============================================================================
4794 extern __at(0x0415) __sfr TMR4
;
4795 extern __at(0x0416) __sfr PR4
;
4797 //==============================================================================
4800 extern __at(0x0417) __sfr T4CON
;
4806 unsigned T4CKPS0
: 1;
4807 unsigned T4CKPS1
: 1;
4808 unsigned TMR4ON
: 1;
4809 unsigned T4OUTPS0
: 1;
4810 unsigned T4OUTPS1
: 1;
4811 unsigned T4OUTPS2
: 1;
4812 unsigned T4OUTPS3
: 1;
4818 unsigned T4CKPS
: 2;
4825 unsigned T4OUTPS
: 4;
4830 extern __at(0x0417) volatile __T4CONbits_t T4CONbits
;
4832 #define _T4CKPS0 0x01
4833 #define _T4CKPS1 0x02
4834 #define _TMR4ON 0x04
4835 #define _T4OUTPS0 0x08
4836 #define _T4OUTPS1 0x10
4837 #define _T4OUTPS2 0x20
4838 #define _T4OUTPS3 0x40
4840 //==============================================================================
4842 extern __at(0x041C) __sfr TMR6
;
4843 extern __at(0x041D) __sfr PR6
;
4845 //==============================================================================
4848 extern __at(0x041E) __sfr T6CON
;
4854 unsigned T6CKPS0
: 1;
4855 unsigned T6CKPS1
: 1;
4856 unsigned TMR6ON
: 1;
4857 unsigned T6OUTPS0
: 1;
4858 unsigned T6OUTPS1
: 1;
4859 unsigned T6OUTPS2
: 1;
4860 unsigned T6OUTPS3
: 1;
4866 unsigned T6CKPS
: 2;
4873 unsigned T6OUTPS
: 4;
4878 extern __at(0x041E) volatile __T6CONbits_t T6CONbits
;
4880 #define _T6CKPS0 0x01
4881 #define _T6CKPS1 0x02
4882 #define _TMR6ON 0x04
4883 #define _T6OUTPS0 0x08
4884 #define _T6OUTPS1 0x10
4885 #define _T6OUTPS2 0x20
4886 #define _T6OUTPS3 0x40
4888 //==============================================================================
4891 //==============================================================================
4894 extern __at(0x048D) __sfr WPUG
;
4908 extern __at(0x048D) volatile __WPUGbits_t WPUGbits
;
4912 //==============================================================================
4914 extern __at(0x0491) __sfr RC2REG
;
4915 extern __at(0x0492) __sfr TX2REG
;
4916 extern __at(0x0493) __sfr SP2BRGL
;
4917 extern __at(0x0493) __sfr SPBRG2
;
4918 extern __at(0x0494) __sfr SP2BRGH
;
4920 //==============================================================================
4923 extern __at(0x0495) __sfr RC2STA
;
4937 extern __at(0x0495) volatile __RC2STAbits_t RC2STAbits
;
4939 #define _RC2STA_RX9D 0x01
4940 #define _RC2STA_OERR 0x02
4941 #define _RC2STA_FERR 0x04
4942 #define _RC2STA_ADDEN 0x08
4943 #define _RC2STA_CREN 0x10
4944 #define _RC2STA_SREN 0x20
4945 #define _RC2STA_RX9 0x40
4946 #define _RC2STA_SPEN 0x80
4948 //==============================================================================
4951 //==============================================================================
4954 extern __at(0x0496) __sfr TX2STA
;
4968 extern __at(0x0496) volatile __TX2STAbits_t TX2STAbits
;
4970 #define _TX2STA_TX9D 0x01
4971 #define _TX2STA_TRMT 0x02
4972 #define _TX2STA_BRGH 0x04
4973 #define _TX2STA_SENDB 0x08
4974 #define _TX2STA_SYNC 0x10
4975 #define _TX2STA_TXEN 0x20
4976 #define _TX2STA_TX9 0x40
4977 #define _TX2STA_CSRC 0x80
4979 //==============================================================================
4982 //==============================================================================
4985 extern __at(0x0497) __sfr BAUD2CON
;
4996 unsigned ABDOVF
: 1;
4999 extern __at(0x0497) volatile __BAUD2CONbits_t BAUD2CONbits
;
5001 #define _BAUD2CON_ABDEN 0x01
5002 #define _BAUD2CON_WUE 0x02
5003 #define _BAUD2CON_BRG16 0x08
5004 #define _BAUD2CON_SCKP 0x10
5005 #define _BAUD2CON_RCIDL 0x40
5006 #define _BAUD2CON_ABDOVF 0x80
5008 //==============================================================================
5011 //==============================================================================
5014 extern __at(0x0791) __sfr LCDCON
;
5044 extern __at(0x0791) volatile __LCDCONbits_t LCDCONbits
;
5054 //==============================================================================
5057 //==============================================================================
5060 extern __at(0x0792) __sfr LCDPS
;
5072 unsigned BIASMD
: 1;
5083 extern __at(0x0792) volatile __LCDPSbits_t LCDPSbits
;
5091 #define _BIASMD 0x40
5094 //==============================================================================
5097 //==============================================================================
5100 extern __at(0x0793) __sfr LCDREF
;
5105 unsigned VLCD1PE
: 1;
5106 unsigned VLCD2PE
: 1;
5107 unsigned VLCD3PE
: 1;
5109 unsigned LCDIRI
: 1;
5110 unsigned LCDIRS
: 1;
5111 unsigned LCDIRE
: 1;
5114 extern __at(0x0793) volatile __LCDREFbits_t LCDREFbits
;
5116 #define _VLCD1PE 0x02
5117 #define _VLCD2PE 0x04
5118 #define _VLCD3PE 0x08
5119 #define _LCDIRI 0x20
5120 #define _LCDIRS 0x40
5121 #define _LCDIRE 0x80
5123 //==============================================================================
5126 //==============================================================================
5129 extern __at(0x0794) __sfr LCDCST
;
5135 unsigned LCDCST0
: 1;
5136 unsigned LCDCST1
: 1;
5137 unsigned LCDCST2
: 1;
5147 unsigned LCDCST
: 3;
5152 extern __at(0x0794) volatile __LCDCSTbits_t LCDCSTbits
;
5154 #define _LCDCST0 0x01
5155 #define _LCDCST1 0x02
5156 #define _LCDCST2 0x04
5158 //==============================================================================
5161 //==============================================================================
5164 extern __at(0x0795) __sfr LCDRL
;
5170 unsigned LRLAT0
: 1;
5171 unsigned LRLAT1
: 1;
5172 unsigned LRLAT2
: 1;
5174 unsigned LRLBP0
: 1;
5175 unsigned LRLBP1
: 1;
5176 unsigned LRLAP0
: 1;
5177 unsigned LRLAP1
: 1;
5200 extern __at(0x0795) volatile __LCDRLbits_t LCDRLbits
;
5202 #define _LRLAT0 0x01
5203 #define _LRLAT1 0x02
5204 #define _LRLAT2 0x04
5205 #define _LRLBP0 0x10
5206 #define _LRLBP1 0x20
5207 #define _LRLAP0 0x40
5208 #define _LRLAP1 0x80
5210 //==============================================================================
5213 //==============================================================================
5216 extern __at(0x0798) __sfr LCDSE0
;
5230 extern __at(0x0798) volatile __LCDSE0bits_t LCDSE0bits
;
5241 //==============================================================================
5244 //==============================================================================
5247 extern __at(0x0799) __sfr LCDSE1
;
5261 extern __at(0x0799) volatile __LCDSE1bits_t LCDSE1bits
;
5272 //==============================================================================
5275 //==============================================================================
5278 extern __at(0x079A) __sfr LCDSE2
;
5292 extern __at(0x079A) volatile __LCDSE2bits_t LCDSE2bits
;
5303 //==============================================================================
5306 //==============================================================================
5309 extern __at(0x079B) __sfr LCDSE3
;
5323 extern __at(0x079B) volatile __LCDSE3bits_t LCDSE3bits
;
5334 //==============================================================================
5337 //==============================================================================
5340 extern __at(0x079C) __sfr LCDSE4
;
5354 extern __at(0x079C) volatile __LCDSE4bits_t LCDSE4bits
;
5365 //==============================================================================
5368 //==============================================================================
5371 extern __at(0x079D) __sfr LCDSE5
;
5385 extern __at(0x079D) volatile __LCDSE5bits_t LCDSE5bits
;
5394 //==============================================================================
5397 //==============================================================================
5400 extern __at(0x07A0) __sfr LCDDATA0
;
5404 unsigned SEG0COM0
: 1;
5405 unsigned SEG1COM0
: 1;
5406 unsigned SEG2COM0
: 1;
5407 unsigned SEG3COM0
: 1;
5408 unsigned SEG4COM0
: 1;
5409 unsigned SEG5COM0
: 1;
5410 unsigned SEG6COM0
: 1;
5411 unsigned SEG7COM0
: 1;
5414 extern __at(0x07A0) volatile __LCDDATA0bits_t LCDDATA0bits
;
5416 #define _SEG0COM0 0x01
5417 #define _SEG1COM0 0x02
5418 #define _SEG2COM0 0x04
5419 #define _SEG3COM0 0x08
5420 #define _SEG4COM0 0x10
5421 #define _SEG5COM0 0x20
5422 #define _SEG6COM0 0x40
5423 #define _SEG7COM0 0x80
5425 //==============================================================================
5428 //==============================================================================
5431 extern __at(0x07A1) __sfr LCDDATA1
;
5435 unsigned SEG8COM0
: 1;
5436 unsigned SEG9COM0
: 1;
5437 unsigned SEG10COM0
: 1;
5438 unsigned SEG11COM0
: 1;
5439 unsigned SEG12COM0
: 1;
5440 unsigned SEG13COM0
: 1;
5441 unsigned SEG14COM0
: 1;
5442 unsigned SEG15COM0
: 1;
5445 extern __at(0x07A1) volatile __LCDDATA1bits_t LCDDATA1bits
;
5447 #define _SEG8COM0 0x01
5448 #define _SEG9COM0 0x02
5449 #define _SEG10COM0 0x04
5450 #define _SEG11COM0 0x08
5451 #define _SEG12COM0 0x10
5452 #define _SEG13COM0 0x20
5453 #define _SEG14COM0 0x40
5454 #define _SEG15COM0 0x80
5456 //==============================================================================
5459 //==============================================================================
5462 extern __at(0x07A2) __sfr LCDDATA2
;
5466 unsigned SEG16COM0
: 1;
5467 unsigned SEG17COM0
: 1;
5468 unsigned SEG18COM0
: 1;
5469 unsigned SEG19COM0
: 1;
5470 unsigned SEG20COM0
: 1;
5471 unsigned SEG21COM0
: 1;
5472 unsigned SEG22COM0
: 1;
5473 unsigned SEG23COM0
: 1;
5476 extern __at(0x07A2) volatile __LCDDATA2bits_t LCDDATA2bits
;
5478 #define _SEG16COM0 0x01
5479 #define _SEG17COM0 0x02
5480 #define _SEG18COM0 0x04
5481 #define _SEG19COM0 0x08
5482 #define _SEG20COM0 0x10
5483 #define _SEG21COM0 0x20
5484 #define _SEG22COM0 0x40
5485 #define _SEG23COM0 0x80
5487 //==============================================================================
5490 //==============================================================================
5493 extern __at(0x07A3) __sfr LCDDATA3
;
5497 unsigned SEG0COM1
: 1;
5498 unsigned SEG1COM1
: 1;
5499 unsigned SEG2COM1
: 1;
5500 unsigned SEG3COM1
: 1;
5501 unsigned SEG4COM1
: 1;
5502 unsigned SEG5COM1
: 1;
5503 unsigned SEG6COM1
: 1;
5504 unsigned SEG7COM1
: 1;
5507 extern __at(0x07A3) volatile __LCDDATA3bits_t LCDDATA3bits
;
5509 #define _SEG0COM1 0x01
5510 #define _SEG1COM1 0x02
5511 #define _SEG2COM1 0x04
5512 #define _SEG3COM1 0x08
5513 #define _SEG4COM1 0x10
5514 #define _SEG5COM1 0x20
5515 #define _SEG6COM1 0x40
5516 #define _SEG7COM1 0x80
5518 //==============================================================================
5521 //==============================================================================
5524 extern __at(0x07A4) __sfr LCDDATA4
;
5528 unsigned SEG8COM1
: 1;
5529 unsigned SEG9COM1
: 1;
5530 unsigned SEG10COM1
: 1;
5531 unsigned SEG11COM1
: 1;
5532 unsigned SEG12COM1
: 1;
5533 unsigned SEG13COM1
: 1;
5534 unsigned SEG14COM1
: 1;
5535 unsigned SEG15COM1
: 1;
5538 extern __at(0x07A4) volatile __LCDDATA4bits_t LCDDATA4bits
;
5540 #define _SEG8COM1 0x01
5541 #define _SEG9COM1 0x02
5542 #define _SEG10COM1 0x04
5543 #define _SEG11COM1 0x08
5544 #define _SEG12COM1 0x10
5545 #define _SEG13COM1 0x20
5546 #define _SEG14COM1 0x40
5547 #define _SEG15COM1 0x80
5549 //==============================================================================
5552 //==============================================================================
5555 extern __at(0x07A5) __sfr LCDDATA5
;
5559 unsigned SEG16COM1
: 1;
5560 unsigned SEG17COM1
: 1;
5561 unsigned SEG18COM1
: 1;
5562 unsigned SEG19COM1
: 1;
5563 unsigned SEG20COM1
: 1;
5564 unsigned SEG21COM1
: 1;
5565 unsigned SEG22COM1
: 1;
5566 unsigned SEG23COM1
: 1;
5569 extern __at(0x07A5) volatile __LCDDATA5bits_t LCDDATA5bits
;
5571 #define _SEG16COM1 0x01
5572 #define _SEG17COM1 0x02
5573 #define _SEG18COM1 0x04
5574 #define _SEG19COM1 0x08
5575 #define _SEG20COM1 0x10
5576 #define _SEG21COM1 0x20
5577 #define _SEG22COM1 0x40
5578 #define _SEG23COM1 0x80
5580 //==============================================================================
5583 //==============================================================================
5586 extern __at(0x07A6) __sfr LCDDATA6
;
5590 unsigned SEG0COM2
: 1;
5591 unsigned SEG1COM2
: 1;
5592 unsigned SEG2COM2
: 1;
5593 unsigned SEG3COM2
: 1;
5594 unsigned SEG4COM2
: 1;
5595 unsigned SEG5COM2
: 1;
5596 unsigned SEG6COM2
: 1;
5597 unsigned SEG7COM2
: 1;
5600 extern __at(0x07A6) volatile __LCDDATA6bits_t LCDDATA6bits
;
5602 #define _SEG0COM2 0x01
5603 #define _SEG1COM2 0x02
5604 #define _SEG2COM2 0x04
5605 #define _SEG3COM2 0x08
5606 #define _SEG4COM2 0x10
5607 #define _SEG5COM2 0x20
5608 #define _SEG6COM2 0x40
5609 #define _SEG7COM2 0x80
5611 //==============================================================================
5614 //==============================================================================
5617 extern __at(0x07A7) __sfr LCDDATA7
;
5621 unsigned SEG8COM2
: 1;
5622 unsigned SEG9COM2
: 1;
5623 unsigned SEG10COM2
: 1;
5624 unsigned SEG11COM2
: 1;
5625 unsigned SEG12COM2
: 1;
5626 unsigned SEG13COM2
: 1;
5627 unsigned SEG14COM2
: 1;
5628 unsigned SEG15COM2
: 1;
5631 extern __at(0x07A7) volatile __LCDDATA7bits_t LCDDATA7bits
;
5633 #define _SEG8COM2 0x01
5634 #define _SEG9COM2 0x02
5635 #define _SEG10COM2 0x04
5636 #define _SEG11COM2 0x08
5637 #define _SEG12COM2 0x10
5638 #define _SEG13COM2 0x20
5639 #define _SEG14COM2 0x40
5640 #define _SEG15COM2 0x80
5642 //==============================================================================
5645 //==============================================================================
5648 extern __at(0x07A8) __sfr LCDDATA8
;
5652 unsigned SEG16COM2
: 1;
5653 unsigned SEG17COM2
: 1;
5654 unsigned SEG18COM2
: 1;
5655 unsigned SEG19COM2
: 1;
5656 unsigned SEG20COM2
: 1;
5657 unsigned SEG21COM2
: 1;
5658 unsigned SEG22COM2
: 1;
5659 unsigned SEG23COM2
: 1;
5662 extern __at(0x07A8) volatile __LCDDATA8bits_t LCDDATA8bits
;
5664 #define _SEG16COM2 0x01
5665 #define _SEG17COM2 0x02
5666 #define _SEG18COM2 0x04
5667 #define _SEG19COM2 0x08
5668 #define _SEG20COM2 0x10
5669 #define _SEG21COM2 0x20
5670 #define _SEG22COM2 0x40
5671 #define _SEG23COM2 0x80
5673 //==============================================================================
5676 //==============================================================================
5679 extern __at(0x07A9) __sfr LCDDATA9
;
5683 unsigned SEG0COM3
: 1;
5684 unsigned SEG1COM3
: 1;
5685 unsigned SEG2COM3
: 1;
5686 unsigned SEG3COM3
: 1;
5687 unsigned SEG4COM3
: 1;
5688 unsigned SEG5COM3
: 1;
5689 unsigned SEG6COM3
: 1;
5690 unsigned SEG7COM3
: 1;
5693 extern __at(0x07A9) volatile __LCDDATA9bits_t LCDDATA9bits
;
5695 #define _SEG0COM3 0x01
5696 #define _SEG1COM3 0x02
5697 #define _SEG2COM3 0x04
5698 #define _SEG3COM3 0x08
5699 #define _SEG4COM3 0x10
5700 #define _SEG5COM3 0x20
5701 #define _SEG6COM3 0x40
5702 #define _SEG7COM3 0x80
5704 //==============================================================================
5707 //==============================================================================
5710 extern __at(0x07AA) __sfr LCDDATA10
;
5714 unsigned SEG8COM3
: 1;
5715 unsigned SEG9COM3
: 1;
5716 unsigned SEG10COM3
: 1;
5717 unsigned SEG11COM3
: 1;
5718 unsigned SEG12COM3
: 1;
5719 unsigned SEG13COM3
: 1;
5720 unsigned SEG14COM3
: 1;
5721 unsigned SEG15COM3
: 1;
5722 } __LCDDATA10bits_t
;
5724 extern __at(0x07AA) volatile __LCDDATA10bits_t LCDDATA10bits
;
5726 #define _SEG8COM3 0x01
5727 #define _SEG9COM3 0x02
5728 #define _SEG10COM3 0x04
5729 #define _SEG11COM3 0x08
5730 #define _SEG12COM3 0x10
5731 #define _SEG13COM3 0x20
5732 #define _SEG14COM3 0x40
5733 #define _SEG15COM3 0x80
5735 //==============================================================================
5738 //==============================================================================
5741 extern __at(0x07AB) __sfr LCDDATA11
;
5745 unsigned SEG16COM3
: 1;
5746 unsigned SEG17COM3
: 1;
5747 unsigned SEG18COM3
: 1;
5748 unsigned SEG19COM3
: 1;
5749 unsigned SEG20COM3
: 1;
5750 unsigned SEG21COM3
: 1;
5751 unsigned SEG22COM3
: 1;
5752 unsigned SEG23COM3
: 1;
5753 } __LCDDATA11bits_t
;
5755 extern __at(0x07AB) volatile __LCDDATA11bits_t LCDDATA11bits
;
5757 #define _SEG16COM3 0x01
5758 #define _SEG17COM3 0x02
5759 #define _SEG18COM3 0x04
5760 #define _SEG19COM3 0x08
5761 #define _SEG20COM3 0x10
5762 #define _SEG21COM3 0x20
5763 #define _SEG22COM3 0x40
5764 #define _SEG23COM3 0x80
5766 //==============================================================================
5769 //==============================================================================
5772 extern __at(0x07AC) __sfr LCDDATA12
;
5776 unsigned SEG24COM0
: 1;
5777 unsigned SEG25COM0
: 1;
5778 unsigned SEG26COM0
: 1;
5779 unsigned SEG27COM0
: 1;
5780 unsigned SEG28COM0
: 1;
5781 unsigned SEG29COM0
: 1;
5782 unsigned SEG30COM0
: 1;
5783 unsigned SEG31COM0
: 1;
5784 } __LCDDATA12bits_t
;
5786 extern __at(0x07AC) volatile __LCDDATA12bits_t LCDDATA12bits
;
5788 #define _SEG24COM0 0x01
5789 #define _SEG25COM0 0x02
5790 #define _SEG26COM0 0x04
5791 #define _SEG27COM0 0x08
5792 #define _SEG28COM0 0x10
5793 #define _SEG29COM0 0x20
5794 #define _SEG30COM0 0x40
5795 #define _SEG31COM0 0x80
5797 //==============================================================================
5800 //==============================================================================
5803 extern __at(0x07AD) __sfr LCDDATA13
;
5807 unsigned SEG32COM0
: 1;
5808 unsigned SEG33COM0
: 1;
5809 unsigned SEG34COM0
: 1;
5810 unsigned SEG35COM0
: 1;
5811 unsigned SEG36COM0
: 1;
5812 unsigned SEG37COM0
: 1;
5813 unsigned SEG38COM0
: 1;
5814 unsigned SEG39COM0
: 1;
5815 } __LCDDATA13bits_t
;
5817 extern __at(0x07AD) volatile __LCDDATA13bits_t LCDDATA13bits
;
5819 #define _SEG32COM0 0x01
5820 #define _SEG33COM0 0x02
5821 #define _SEG34COM0 0x04
5822 #define _SEG35COM0 0x08
5823 #define _SEG36COM0 0x10
5824 #define _SEG37COM0 0x20
5825 #define _SEG38COM0 0x40
5826 #define _SEG39COM0 0x80
5828 //==============================================================================
5831 //==============================================================================
5834 extern __at(0x07AE) __sfr LCDDATA14
;
5838 unsigned SEG40COM0
: 1;
5839 unsigned SEG41COM0
: 1;
5840 unsigned SEG42COM0
: 1;
5841 unsigned SEG43COM0
: 1;
5842 unsigned SEG44COM0
: 1;
5843 unsigned SEG45COM0
: 1;
5846 } __LCDDATA14bits_t
;
5848 extern __at(0x07AE) volatile __LCDDATA14bits_t LCDDATA14bits
;
5850 #define _SEG40COM0 0x01
5851 #define _SEG41COM0 0x02
5852 #define _SEG42COM0 0x04
5853 #define _SEG43COM0 0x08
5854 #define _SEG44COM0 0x10
5855 #define _SEG45COM0 0x20
5857 //==============================================================================
5860 //==============================================================================
5863 extern __at(0x07AF) __sfr LCDDATA15
;
5867 unsigned SEG24COM1
: 1;
5868 unsigned SEG25COM1
: 1;
5869 unsigned SEG26COM1
: 1;
5870 unsigned SEG27COM1
: 1;
5871 unsigned SEG28COM1
: 1;
5872 unsigned SEG29COM1
: 1;
5873 unsigned SEG30COM1
: 1;
5874 unsigned SEG31COM1
: 1;
5875 } __LCDDATA15bits_t
;
5877 extern __at(0x07AF) volatile __LCDDATA15bits_t LCDDATA15bits
;
5879 #define _SEG24COM1 0x01
5880 #define _SEG25COM1 0x02
5881 #define _SEG26COM1 0x04
5882 #define _SEG27COM1 0x08
5883 #define _SEG28COM1 0x10
5884 #define _SEG29COM1 0x20
5885 #define _SEG30COM1 0x40
5886 #define _SEG31COM1 0x80
5888 //==============================================================================
5891 //==============================================================================
5894 extern __at(0x07B0) __sfr LCDDATA16
;
5898 unsigned SEG32COM1
: 1;
5899 unsigned SEG33COM1
: 1;
5900 unsigned SEG34COM1
: 1;
5901 unsigned SEG35COM1
: 1;
5902 unsigned SEG36COM1
: 1;
5903 unsigned SEG37COM1
: 1;
5904 unsigned SEG38COM1
: 1;
5905 unsigned SEG39COM1
: 1;
5906 } __LCDDATA16bits_t
;
5908 extern __at(0x07B0) volatile __LCDDATA16bits_t LCDDATA16bits
;
5910 #define _SEG32COM1 0x01
5911 #define _SEG33COM1 0x02
5912 #define _SEG34COM1 0x04
5913 #define _SEG35COM1 0x08
5914 #define _SEG36COM1 0x10
5915 #define _SEG37COM1 0x20
5916 #define _SEG38COM1 0x40
5917 #define _SEG39COM1 0x80
5919 //==============================================================================
5922 //==============================================================================
5925 extern __at(0x07B1) __sfr LCDDATA17
;
5929 unsigned SEG40COM1
: 1;
5930 unsigned SEG41COM1
: 1;
5931 unsigned SEG42COM1
: 1;
5932 unsigned SEG43COM1
: 1;
5933 unsigned SEG44COM1
: 1;
5934 unsigned SEG45COM1
: 1;
5937 } __LCDDATA17bits_t
;
5939 extern __at(0x07B1) volatile __LCDDATA17bits_t LCDDATA17bits
;
5941 #define _SEG40COM1 0x01
5942 #define _SEG41COM1 0x02
5943 #define _SEG42COM1 0x04
5944 #define _SEG43COM1 0x08
5945 #define _SEG44COM1 0x10
5946 #define _SEG45COM1 0x20
5948 //==============================================================================
5951 //==============================================================================
5954 extern __at(0x07B2) __sfr LCDDATA18
;
5958 unsigned SEG24COM2
: 1;
5959 unsigned SEG25COM2
: 1;
5960 unsigned SEG26COM2
: 1;
5961 unsigned SEG27COM2
: 1;
5962 unsigned SEG28COM2
: 1;
5963 unsigned SEG29COM2
: 1;
5964 unsigned SEG30COM2
: 1;
5965 unsigned SEG31COM2
: 1;
5966 } __LCDDATA18bits_t
;
5968 extern __at(0x07B2) volatile __LCDDATA18bits_t LCDDATA18bits
;
5970 #define _SEG24COM2 0x01
5971 #define _SEG25COM2 0x02
5972 #define _SEG26COM2 0x04
5973 #define _SEG27COM2 0x08
5974 #define _SEG28COM2 0x10
5975 #define _SEG29COM2 0x20
5976 #define _SEG30COM2 0x40
5977 #define _SEG31COM2 0x80
5979 //==============================================================================
5982 //==============================================================================
5985 extern __at(0x07B3) __sfr LCDDATA19
;
5989 unsigned SEG32COM2
: 1;
5990 unsigned SEG33COM2
: 1;
5991 unsigned SEG34COM2
: 1;
5992 unsigned SEG35COM2
: 1;
5993 unsigned SEG36COM2
: 1;
5994 unsigned SEG37COM2
: 1;
5995 unsigned SEG38COM2
: 1;
5996 unsigned SEG39COM2
: 1;
5997 } __LCDDATA19bits_t
;
5999 extern __at(0x07B3) volatile __LCDDATA19bits_t LCDDATA19bits
;
6001 #define _SEG32COM2 0x01
6002 #define _SEG33COM2 0x02
6003 #define _SEG34COM2 0x04
6004 #define _SEG35COM2 0x08
6005 #define _SEG36COM2 0x10
6006 #define _SEG37COM2 0x20
6007 #define _SEG38COM2 0x40
6008 #define _SEG39COM2 0x80
6010 //==============================================================================
6013 //==============================================================================
6016 extern __at(0x07B4) __sfr LCDDATA20
;
6020 unsigned SEG40COM2
: 1;
6021 unsigned SEG41COM2
: 1;
6022 unsigned SEG42COM2
: 1;
6023 unsigned SEG43COM2
: 1;
6024 unsigned SEG44COM2
: 1;
6025 unsigned SEG45COM2
: 1;
6028 } __LCDDATA20bits_t
;
6030 extern __at(0x07B4) volatile __LCDDATA20bits_t LCDDATA20bits
;
6032 #define _SEG40COM2 0x01
6033 #define _SEG41COM2 0x02
6034 #define _SEG42COM2 0x04
6035 #define _SEG43COM2 0x08
6036 #define _SEG44COM2 0x10
6037 #define _SEG45COM2 0x20
6039 //==============================================================================
6042 //==============================================================================
6045 extern __at(0x07B5) __sfr LCDDATA21
;
6049 unsigned SEG24COM3
: 1;
6050 unsigned SEG25COM3
: 1;
6051 unsigned SEG26COM3
: 1;
6052 unsigned SEG27COM3
: 1;
6053 unsigned SEG28COM3
: 1;
6054 unsigned SEG29COM3
: 1;
6055 unsigned SEG30COM3
: 1;
6056 unsigned SEG31COM3
: 1;
6057 } __LCDDATA21bits_t
;
6059 extern __at(0x07B5) volatile __LCDDATA21bits_t LCDDATA21bits
;
6061 #define _SEG24COM3 0x01
6062 #define _SEG25COM3 0x02
6063 #define _SEG26COM3 0x04
6064 #define _SEG27COM3 0x08
6065 #define _SEG28COM3 0x10
6066 #define _SEG29COM3 0x20
6067 #define _SEG30COM3 0x40
6068 #define _SEG31COM3 0x80
6070 //==============================================================================
6073 //==============================================================================
6076 extern __at(0x07B6) __sfr LCDDATA22
;
6080 unsigned SEG32COM3
: 1;
6081 unsigned SEG33COM3
: 1;
6082 unsigned SEG34COM3
: 1;
6083 unsigned SEG35COM3
: 1;
6084 unsigned SEG36COM3
: 1;
6085 unsigned SEG37COM3
: 1;
6086 unsigned SEG38COM3
: 1;
6087 unsigned SEG39COM3
: 1;
6088 } __LCDDATA22bits_t
;
6090 extern __at(0x07B6) volatile __LCDDATA22bits_t LCDDATA22bits
;
6092 #define _SEG32COM3 0x01
6093 #define _SEG33COM3 0x02
6094 #define _SEG34COM3 0x04
6095 #define _SEG35COM3 0x08
6096 #define _SEG36COM3 0x10
6097 #define _SEG37COM3 0x20
6098 #define _SEG38COM3 0x40
6099 #define _SEG39COM3 0x80
6101 //==============================================================================
6104 //==============================================================================
6107 extern __at(0x07B7) __sfr LCDDATA23
;
6111 unsigned SEG40COM3
: 1;
6112 unsigned SEG41COM3
: 1;
6113 unsigned SEG42COM3
: 1;
6114 unsigned SEG43COM3
: 1;
6115 unsigned SEG44COM3
: 1;
6116 unsigned SEG45COM3
: 1;
6119 } __LCDDATA23bits_t
;
6121 extern __at(0x07B7) volatile __LCDDATA23bits_t LCDDATA23bits
;
6123 #define _SEG40COM3 0x01
6124 #define _SEG41COM3 0x02
6125 #define _SEG42COM3 0x04
6126 #define _SEG43COM3 0x08
6127 #define _SEG44COM3 0x10
6128 #define _SEG45COM3 0x20
6130 //==============================================================================
6133 //==============================================================================
6136 extern __at(0x0FE4) __sfr STATUS_SHAD
;
6140 unsigned C_SHAD
: 1;
6141 unsigned DC_SHAD
: 1;
6142 unsigned Z_SHAD
: 1;
6148 } __STATUS_SHADbits_t
;
6150 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits
;
6152 #define _C_SHAD 0x01
6153 #define _DC_SHAD 0x02
6154 #define _Z_SHAD 0x04
6156 //==============================================================================
6158 extern __at(0x0FE5) __sfr WREG_SHAD
;
6159 extern __at(0x0FE6) __sfr BSR_SHAD
;
6160 extern __at(0x0FE7) __sfr PCLATH_SHAD
;
6161 extern __at(0x0FE8) __sfr FSR0L_SHAD
;
6162 extern __at(0x0FE9) __sfr FSR0H_SHAD
;
6163 extern __at(0x0FEA) __sfr FSR1L_SHAD
;
6164 extern __at(0x0FEB) __sfr FSR1H_SHAD
;
6165 extern __at(0x0FED) __sfr STKPTR
;
6166 extern __at(0x0FEE) __sfr TOSL
;
6167 extern __at(0x0FEF) __sfr TOSH
;
6169 //==============================================================================
6171 // Configuration Bits
6173 //==============================================================================
6175 #define _CONFIG1 0x8007
6176 #define _CONFIG2 0x8008
6178 //----------------------------- CONFIG1 Options -------------------------------
6180 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins.
6181 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins.
6182 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins.
6183 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin.
6184 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
6185 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin.
6186 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin.
6187 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin.
6188 #define _WDTE_OFF 0x3FE7 // WDT disabled.
6189 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
6190 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
6191 #define _WDTE_ON 0x3FFF // WDT enabled.
6192 #define _PWRTE_ON 0x3FDF // PWRT enabled.
6193 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
6194 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
6195 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
6196 #define _CP_ON 0x3F7F // Program memory code protection is enabled.
6197 #define _CP_OFF 0x3FFF // Program memory code protection is disabled.
6198 #define _CPD_ON 0x3EFF // Data memory code protection is enabled.
6199 #define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
6200 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
6201 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
6202 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
6203 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
6204 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
6205 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
6206 #define _IESO_OFF 0x2FFF // Internal/External Switchover mode is disabled.
6207 #define _IESO_ON 0x3FFF // Internal/External Switchover mode is enabled.
6208 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled.
6209 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
6211 //----------------------------- CONFIG2 Options -------------------------------
6213 #define _WRT_ALL 0x3FFC // 000h to 3FFFh write protected, no addresses may be modified by EECON control.
6214 #define _WRT_HALF 0x3FFD // 000h to 1FFFh write protected, 2000h to 3FFFh may be modified by EECON control.
6215 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 3FFFh may be modified by EECON control.
6216 #define _WRT_OFF 0x3FFF // Write protection off.
6217 #define _PLLEN_OFF 0x3EFF // 4x PLL disabled.
6218 #define _PLLEN_ON 0x3FFF // 4x PLL enabled.
6219 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
6220 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
6221 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6222 #define _BORV_25 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
6223 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6224 #define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
6225 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger.
6226 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins.
6227 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
6228 #define _LVP_ON 0x3FFF // Low-voltage programming enabled.
6230 //==============================================================================
6232 #define _DEVID1 0x8006
6234 #define _IDLOC0 0x8000
6235 #define _IDLOC1 0x8001
6236 #define _IDLOC2 0x8002
6237 #define _IDLOC3 0x8003
6239 //==============================================================================
6241 #ifndef NO_BIT_DEFINES
6243 #define ADON ADCON0bits.ADON // bit 0
6244 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
6245 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits
6246 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
6247 #define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
6248 #define CHS0 ADCON0bits.CHS0 // bit 2
6249 #define CHS1 ADCON0bits.CHS1 // bit 3
6250 #define CHS2 ADCON0bits.CHS2 // bit 4
6251 #define CHS3 ADCON0bits.CHS3 // bit 5
6252 #define CHS4 ADCON0bits.CHS4 // bit 6
6254 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0
6255 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1
6256 #define ADNREF ADCON1bits.ADNREF // bit 2
6257 #define ADCS0 ADCON1bits.ADCS0 // bit 4
6258 #define ADCS1 ADCON1bits.ADCS1 // bit 5
6259 #define ADCS2 ADCON1bits.ADCS2 // bit 6
6260 #define ADFM ADCON1bits.ADFM // bit 7
6262 #define ANSA0 ANSELAbits.ANSA0 // bit 0
6263 #define ANSA1 ANSELAbits.ANSA1 // bit 1
6264 #define ANSA2 ANSELAbits.ANSA2 // bit 2
6265 #define ANSA3 ANSELAbits.ANSA3 // bit 3
6266 #define ANSA5 ANSELAbits.ANSA5 // bit 5
6268 #define ANSE0 ANSELEbits.ANSE0 // bit 0
6269 #define ANSE1 ANSELEbits.ANSE1 // bit 1
6270 #define ANSE2 ANSELEbits.ANSE2 // bit 2
6272 #define ANSF0 ANSELFbits.ANSF0 // bit 0
6273 #define ANSF1 ANSELFbits.ANSF1 // bit 1
6274 #define ANSF2 ANSELFbits.ANSF2 // bit 2
6275 #define ANSF3 ANSELFbits.ANSF3 // bit 3
6276 #define ANSF4 ANSELFbits.ANSF4 // bit 4
6277 #define ANSF5 ANSELFbits.ANSF5 // bit 5
6278 #define ANSF6 ANSELFbits.ANSF6 // bit 6
6279 #define ANSF7 ANSELFbits.ANSF7 // bit 7
6281 #define ANSG1 ANSELGbits.ANSG1 // bit 1
6282 #define ANSG2 ANSELGbits.ANSG2 // bit 2
6283 #define ANSG3 ANSELGbits.ANSG3 // bit 3
6284 #define ANSG4 ANSELGbits.ANSG4 // bit 4
6286 #define P1BSEL APFCONbits.P1BSEL // bit 0
6287 #define P1CSEL APFCONbits.P1CSEL // bit 1
6288 #define CCP2SEL APFCONbits.CCP2SEL // bit 2
6289 #define P2BSEL APFCONbits.P2BSEL // bit 3
6290 #define P2CSEL APFCONbits.P2CSEL // bit 4
6291 #define P2DSEL APFCONbits.P2DSEL // bit 5
6292 #define P3BSEL APFCONbits.P3BSEL // bit 6
6293 #define P3CSEL APFCONbits.P3CSEL // bit 7
6295 #define ABDEN BAUD1CONbits.ABDEN // bit 0
6296 #define WUE BAUD1CONbits.WUE // bit 1
6297 #define BRG16 BAUD1CONbits.BRG16 // bit 3
6298 #define SCKP BAUD1CONbits.SCKP // bit 4
6299 #define RCIDL BAUD1CONbits.RCIDL // bit 6
6300 #define ABDOVF BAUD1CONbits.ABDOVF // bit 7
6302 #define BORRDY BORCONbits.BORRDY // bit 0
6303 #define SBOREN BORCONbits.SBOREN // bit 7
6305 #define BSR0 BSRbits.BSR0 // bit 0
6306 #define BSR1 BSRbits.BSR1 // bit 1
6307 #define BSR2 BSRbits.BSR2 // bit 2
6308 #define BSR3 BSRbits.BSR3 // bit 3
6309 #define BSR4 BSRbits.BSR4 // bit 4
6311 #define PSS1BD0 CCP1ASbits.PSS1BD0 // bit 0
6312 #define PSS1BD1 CCP1ASbits.PSS1BD1 // bit 1
6313 #define PSS1AC0 CCP1ASbits.PSS1AC0 // bit 2
6314 #define PSS1AC1 CCP1ASbits.PSS1AC1 // bit 3
6315 #define CCP1AS0 CCP1ASbits.CCP1AS0 // bit 4
6316 #define CCP1AS1 CCP1ASbits.CCP1AS1 // bit 5
6317 #define CCP1AS2 CCP1ASbits.CCP1AS2 // bit 6
6318 #define CCP1ASE CCP1ASbits.CCP1ASE // bit 7
6320 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
6321 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
6322 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
6323 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
6324 #define DC1B0 CCP1CONbits.DC1B0 // bit 4
6325 #define DC1B1 CCP1CONbits.DC1B1 // bit 5
6326 #define P1M0 CCP1CONbits.P1M0 // bit 6
6327 #define P1M1 CCP1CONbits.P1M1 // bit 7
6329 #define PSS2BD0 CCP2ASbits.PSS2BD0 // bit 0
6330 #define PSS2BD1 CCP2ASbits.PSS2BD1 // bit 1
6331 #define PSS2AC0 CCP2ASbits.PSS2AC0 // bit 2
6332 #define PSS2AC1 CCP2ASbits.PSS2AC1 // bit 3
6333 #define CCP2AS0 CCP2ASbits.CCP2AS0 // bit 4
6334 #define CCP2AS1 CCP2ASbits.CCP2AS1 // bit 5
6335 #define CCP2AS2 CCP2ASbits.CCP2AS2 // bit 6
6336 #define CCP2ASE CCP2ASbits.CCP2ASE // bit 7
6338 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
6339 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
6340 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
6341 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
6342 #define DC2B0 CCP2CONbits.DC2B0 // bit 4
6343 #define DC2B1 CCP2CONbits.DC2B1 // bit 5
6344 #define P2M0 CCP2CONbits.P2M0 // bit 6
6345 #define P2M1 CCP2CONbits.P2M1 // bit 7
6347 #define PSS3BD0 CCP3ASbits.PSS3BD0 // bit 0
6348 #define PSS3BD1 CCP3ASbits.PSS3BD1 // bit 1
6349 #define PSS3AC0 CCP3ASbits.PSS3AC0 // bit 2
6350 #define PSS3AC1 CCP3ASbits.PSS3AC1 // bit 3
6351 #define CCP3AS0 CCP3ASbits.CCP3AS0 // bit 4
6352 #define CCP3AS1 CCP3ASbits.CCP3AS1 // bit 5
6353 #define CCP3AS2 CCP3ASbits.CCP3AS2 // bit 6
6354 #define CCP3ASE CCP3ASbits.CCP3ASE // bit 7
6356 #define CCP3M0 CCP3CONbits.CCP3M0 // bit 0
6357 #define CCP3M1 CCP3CONbits.CCP3M1 // bit 1
6358 #define CCP3M2 CCP3CONbits.CCP3M2 // bit 2
6359 #define CCP3M3 CCP3CONbits.CCP3M3 // bit 3
6360 #define DC3B0 CCP3CONbits.DC3B0 // bit 4
6361 #define DC3B1 CCP3CONbits.DC3B1 // bit 5
6362 #define P3M0 CCP3CONbits.P3M0 // bit 6
6363 #define P3M1 CCP3CONbits.P3M1 // bit 7
6365 #define CCP4M0 CCP4CONbits.CCP4M0 // bit 0
6366 #define CCP4M1 CCP4CONbits.CCP4M1 // bit 1
6367 #define CCP4M2 CCP4CONbits.CCP4M2 // bit 2
6368 #define CCP4M3 CCP4CONbits.CCP4M3 // bit 3
6369 #define DC4B0 CCP4CONbits.DC4B0 // bit 4
6370 #define DC4B1 CCP4CONbits.DC4B1 // bit 5
6372 #define CCP5M0 CCP5CONbits.CCP5M0 // bit 0
6373 #define CCP5M1 CCP5CONbits.CCP5M1 // bit 1
6374 #define CCP5M2 CCP5CONbits.CCP5M2 // bit 2
6375 #define CCP5M3 CCP5CONbits.CCP5M3 // bit 3
6376 #define DC5B0 CCP5CONbits.DC5B0 // bit 4
6377 #define DC5B1 CCP5CONbits.DC5B1 // bit 5
6379 #define C1TSEL0 CCPTMRS0bits.C1TSEL0 // bit 0
6380 #define C1TSEL1 CCPTMRS0bits.C1TSEL1 // bit 1
6381 #define C2TSEL0 CCPTMRS0bits.C2TSEL0 // bit 2
6382 #define C2TSEL1 CCPTMRS0bits.C2TSEL1 // bit 3
6383 #define C3TSEL0 CCPTMRS0bits.C3TSEL0 // bit 4
6384 #define C3TSEL1 CCPTMRS0bits.C3TSEL1 // bit 5
6385 #define C4TSEL0 CCPTMRS0bits.C4TSEL0 // bit 6
6386 #define C4TSEL1 CCPTMRS0bits.C4TSEL1 // bit 7
6388 #define C5TSEL0 CCPTMRS1bits.C5TSEL0 // bit 0
6389 #define C5TSEL1 CCPTMRS1bits.C5TSEL1 // bit 1
6391 #define C1SYNC CM1CON0bits.C1SYNC // bit 0
6392 #define C1HYS CM1CON0bits.C1HYS // bit 1
6393 #define C1SP CM1CON0bits.C1SP // bit 2
6394 #define C1POL CM1CON0bits.C1POL // bit 4
6395 #define C1OE CM1CON0bits.C1OE // bit 5
6396 #define C1OUT CM1CON0bits.C1OUT // bit 6
6397 #define C1ON CM1CON0bits.C1ON // bit 7
6399 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0
6400 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1
6401 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4
6402 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5
6403 #define C1INTN CM1CON1bits.C1INTN // bit 6
6404 #define C1INTP CM1CON1bits.C1INTP // bit 7
6406 #define C2SYNC CM2CON0bits.C2SYNC // bit 0
6407 #define C2HYS CM2CON0bits.C2HYS // bit 1
6408 #define C2SP CM2CON0bits.C2SP // bit 2
6409 #define C2POL CM2CON0bits.C2POL // bit 4
6410 #define C2OE CM2CON0bits.C2OE // bit 5
6411 #define C2OUT CM2CON0bits.C2OUT // bit 6
6412 #define C2ON CM2CON0bits.C2ON // bit 7
6414 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0
6415 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1
6416 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4
6417 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5
6418 #define C2INTN CM2CON1bits.C2INTN // bit 6
6419 #define C2INTP CM2CON1bits.C2INTP // bit 7
6421 #define C3SYNC CM3CON0bits.C3SYNC // bit 0
6422 #define C3HYS CM3CON0bits.C3HYS // bit 1
6423 #define C3SP CM3CON0bits.C3SP // bit 2
6424 #define C3POL CM3CON0bits.C3POL // bit 4
6425 #define C3OE CM3CON0bits.C3OE // bit 5
6426 #define C3OUT CM3CON0bits.C3OUT // bit 6
6427 #define C3ON CM3CON0bits.C3ON // bit 7
6429 #define C3NCH0 CM3CON1bits.C3NCH0 // bit 0
6430 #define C3NCH1 CM3CON1bits.C3NCH1 // bit 1
6431 #define C3PCH0 CM3CON1bits.C3PCH0 // bit 4
6432 #define C3PCH1 CM3CON1bits.C3PCH1 // bit 5
6433 #define C3INTN CM3CON1bits.C3INTN // bit 6
6434 #define C3INTP CM3CON1bits.C3INTP // bit 7
6436 #define MC1OUT CMOUTbits.MC1OUT // bit 0
6437 #define MC2OUT CMOUTbits.MC2OUT // bit 1
6438 #define MC3OUT CMOUTbits.MC3OUT // bit 2
6440 #define T0XCS CPSCON0bits.T0XCS // bit 0
6441 #define CPSOUT CPSCON0bits.CPSOUT // bit 1
6442 #define CPSRNG0 CPSCON0bits.CPSRNG0 // bit 2
6443 #define CPSRNG1 CPSCON0bits.CPSRNG1 // bit 3
6444 #define CPSRM CPSCON0bits.CPSRM // bit 6
6445 #define CPSON CPSCON0bits.CPSON // bit 7
6447 #define CPSCH0 CPSCON1bits.CPSCH0 // bit 0
6448 #define CPSCH1 CPSCON1bits.CPSCH1 // bit 1
6449 #define CPSCH2 CPSCON1bits.CPSCH2 // bit 2
6450 #define CPSCH3 CPSCON1bits.CPSCH3 // bit 3
6451 #define CPSCH4 CPSCON1bits.CPSCH4 // bit 4
6453 #define DACNSS DACCON0bits.DACNSS // bit 0
6454 #define DACPSS0 DACCON0bits.DACPSS0 // bit 2
6455 #define DACPSS1 DACCON0bits.DACPSS1 // bit 3
6456 #define DACOE DACCON0bits.DACOE // bit 5
6457 #define DACLPS DACCON0bits.DACLPS // bit 6
6458 #define DACEN DACCON0bits.DACEN // bit 7
6460 #define DACR0 DACCON1bits.DACR0 // bit 0
6461 #define DACR1 DACCON1bits.DACR1 // bit 1
6462 #define DACR2 DACCON1bits.DACR2 // bit 2
6463 #define DACR3 DACCON1bits.DACR3 // bit 3
6464 #define DACR4 DACCON1bits.DACR4 // bit 4
6466 #define RD EECON1bits.RD // bit 0
6467 #define WR EECON1bits.WR // bit 1
6468 #define WREN EECON1bits.WREN // bit 2
6469 #define WRERR EECON1bits.WRERR // bit 3
6470 #define FREE EECON1bits.FREE // bit 4
6471 #define LWLO EECON1bits.LWLO // bit 5
6472 #define CFGS EECON1bits.CFGS // bit 6
6473 #define EEPGD EECON1bits.EEPGD // bit 7
6475 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0
6476 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1
6477 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2
6478 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3
6479 #define TSRNG FVRCONbits.TSRNG // bit 4
6480 #define TSEN FVRCONbits.TSEN // bit 5
6481 #define FVRRDY FVRCONbits.FVRRDY // bit 6
6482 #define FVREN FVRCONbits.FVREN // bit 7
6484 #define IOCIF INTCONbits.IOCIF // bit 0
6485 #define INTF INTCONbits.INTF // bit 1
6486 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
6487 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
6488 #define IOCIE INTCONbits.IOCIE // bit 3
6489 #define INTE INTCONbits.INTE // bit 4
6490 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
6491 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
6492 #define PEIE INTCONbits.PEIE // bit 6
6493 #define GIE INTCONbits.GIE // bit 7
6495 #define IOCBF0 IOCBFbits.IOCBF0 // bit 0
6496 #define IOCBF1 IOCBFbits.IOCBF1 // bit 1
6497 #define IOCBF2 IOCBFbits.IOCBF2 // bit 2
6498 #define IOCBF3 IOCBFbits.IOCBF3 // bit 3
6499 #define IOCBF4 IOCBFbits.IOCBF4 // bit 4
6500 #define IOCBF5 IOCBFbits.IOCBF5 // bit 5
6501 #define IOCBF6 IOCBFbits.IOCBF6 // bit 6
6502 #define IOCBF7 IOCBFbits.IOCBF7 // bit 7
6504 #define IOCBN0 IOCBNbits.IOCBN0 // bit 0
6505 #define IOCBN1 IOCBNbits.IOCBN1 // bit 1
6506 #define IOCBN2 IOCBNbits.IOCBN2 // bit 2
6507 #define IOCBN3 IOCBNbits.IOCBN3 // bit 3
6508 #define IOCBN4 IOCBNbits.IOCBN4 // bit 4
6509 #define IOCBN5 IOCBNbits.IOCBN5 // bit 5
6510 #define IOCBN6 IOCBNbits.IOCBN6 // bit 6
6511 #define IOCBN7 IOCBNbits.IOCBN7 // bit 7
6513 #define IOCBP0 IOCBPbits.IOCBP0 // bit 0
6514 #define IOCBP1 IOCBPbits.IOCBP1 // bit 1
6515 #define IOCBP2 IOCBPbits.IOCBP2 // bit 2
6516 #define IOCBP3 IOCBPbits.IOCBP3 // bit 3
6517 #define IOCBP4 IOCBPbits.IOCBP4 // bit 4
6518 #define IOCBP5 IOCBPbits.IOCBP5 // bit 5
6519 #define IOCBP6 IOCBPbits.IOCBP6 // bit 6
6520 #define IOCBP7 IOCBPbits.IOCBP7 // bit 7
6522 #define LATA0 LATAbits.LATA0 // bit 0
6523 #define LATA1 LATAbits.LATA1 // bit 1
6524 #define LATA2 LATAbits.LATA2 // bit 2
6525 #define LATA3 LATAbits.LATA3 // bit 3
6526 #define LATA4 LATAbits.LATA4 // bit 4
6527 #define LATA5 LATAbits.LATA5 // bit 5
6528 #define LATA6 LATAbits.LATA6 // bit 6
6529 #define LATA7 LATAbits.LATA7 // bit 7
6531 #define LATB0 LATBbits.LATB0 // bit 0
6532 #define LATB1 LATBbits.LATB1 // bit 1
6533 #define LATB2 LATBbits.LATB2 // bit 2
6534 #define LATB3 LATBbits.LATB3 // bit 3
6535 #define LATB4 LATBbits.LATB4 // bit 4
6536 #define LATB5 LATBbits.LATB5 // bit 5
6537 #define LATB6 LATBbits.LATB6 // bit 6
6538 #define LATB7 LATBbits.LATB7 // bit 7
6540 #define LATC0 LATCbits.LATC0 // bit 0
6541 #define LATC1 LATCbits.LATC1 // bit 1
6542 #define LATC2 LATCbits.LATC2 // bit 2
6543 #define LATC3 LATCbits.LATC3 // bit 3
6544 #define LATC4 LATCbits.LATC4 // bit 4
6545 #define LATC5 LATCbits.LATC5 // bit 5
6546 #define LATC6 LATCbits.LATC6 // bit 6
6547 #define LATC7 LATCbits.LATC7 // bit 7
6549 #define LATD0 LATDbits.LATD0 // bit 0
6550 #define LATD1 LATDbits.LATD1 // bit 1
6551 #define LATD2 LATDbits.LATD2 // bit 2
6552 #define LATD3 LATDbits.LATD3 // bit 3
6553 #define LATD4 LATDbits.LATD4 // bit 4
6554 #define LATD5 LATDbits.LATD5 // bit 5
6555 #define LATD6 LATDbits.LATD6 // bit 6
6556 #define LATD7 LATDbits.LATD7 // bit 7
6558 #define LATE0 LATEbits.LATE0 // bit 0
6559 #define LATE1 LATEbits.LATE1 // bit 1
6560 #define LATE2 LATEbits.LATE2 // bit 2
6561 #define LATE3 LATEbits.LATE3 // bit 3
6562 #define LATE4 LATEbits.LATE4 // bit 4
6563 #define LATE5 LATEbits.LATE5 // bit 5
6564 #define LATE6 LATEbits.LATE6 // bit 6
6565 #define LATE7 LATEbits.LATE7 // bit 7
6567 #define LATF0 LATFbits.LATF0 // bit 0
6568 #define LATF1 LATFbits.LATF1 // bit 1
6569 #define LATF2 LATFbits.LATF2 // bit 2
6570 #define LATF3 LATFbits.LATF3 // bit 3
6571 #define LATF4 LATFbits.LATF4 // bit 4
6572 #define LATF5 LATFbits.LATF5 // bit 5
6573 #define LATF6 LATFbits.LATF6 // bit 6
6574 #define LATF7 LATFbits.LATF7 // bit 7
6576 #define LATG0 LATGbits.LATG0 // bit 0
6577 #define LATG1 LATGbits.LATG1 // bit 1
6578 #define LATG2 LATGbits.LATG2 // bit 2
6579 #define LATG3 LATGbits.LATG3 // bit 3
6580 #define LATG4 LATGbits.LATG4 // bit 4
6581 #define LATG5 LATGbits.LATG5 // bit 5
6583 #define LMUX0 LCDCONbits.LMUX0 // bit 0
6584 #define LMUX1 LCDCONbits.LMUX1 // bit 1
6585 #define CS0 LCDCONbits.CS0 // bit 2
6586 #define CS1 LCDCONbits.CS1 // bit 3
6587 #define WERR LCDCONbits.WERR // bit 5
6588 #define SLPEN LCDCONbits.SLPEN // bit 6
6589 #define LCDEN LCDCONbits.LCDEN // bit 7
6591 #define LCDCST0 LCDCSTbits.LCDCST0 // bit 0
6592 #define LCDCST1 LCDCSTbits.LCDCST1 // bit 1
6593 #define LCDCST2 LCDCSTbits.LCDCST2 // bit 2
6595 #define SEG0COM0 LCDDATA0bits.SEG0COM0 // bit 0
6596 #define SEG1COM0 LCDDATA0bits.SEG1COM0 // bit 1
6597 #define SEG2COM0 LCDDATA0bits.SEG2COM0 // bit 2
6598 #define SEG3COM0 LCDDATA0bits.SEG3COM0 // bit 3
6599 #define SEG4COM0 LCDDATA0bits.SEG4COM0 // bit 4
6600 #define SEG5COM0 LCDDATA0bits.SEG5COM0 // bit 5
6601 #define SEG6COM0 LCDDATA0bits.SEG6COM0 // bit 6
6602 #define SEG7COM0 LCDDATA0bits.SEG7COM0 // bit 7
6604 #define SEG8COM0 LCDDATA1bits.SEG8COM0 // bit 0
6605 #define SEG9COM0 LCDDATA1bits.SEG9COM0 // bit 1
6606 #define SEG10COM0 LCDDATA1bits.SEG10COM0 // bit 2
6607 #define SEG11COM0 LCDDATA1bits.SEG11COM0 // bit 3
6608 #define SEG12COM0 LCDDATA1bits.SEG12COM0 // bit 4
6609 #define SEG13COM0 LCDDATA1bits.SEG13COM0 // bit 5
6610 #define SEG14COM0 LCDDATA1bits.SEG14COM0 // bit 6
6611 #define SEG15COM0 LCDDATA1bits.SEG15COM0 // bit 7
6613 #define SEG16COM0 LCDDATA2bits.SEG16COM0 // bit 0
6614 #define SEG17COM0 LCDDATA2bits.SEG17COM0 // bit 1
6615 #define SEG18COM0 LCDDATA2bits.SEG18COM0 // bit 2
6616 #define SEG19COM0 LCDDATA2bits.SEG19COM0 // bit 3
6617 #define SEG20COM0 LCDDATA2bits.SEG20COM0 // bit 4
6618 #define SEG21COM0 LCDDATA2bits.SEG21COM0 // bit 5
6619 #define SEG22COM0 LCDDATA2bits.SEG22COM0 // bit 6
6620 #define SEG23COM0 LCDDATA2bits.SEG23COM0 // bit 7
6622 #define SEG0COM1 LCDDATA3bits.SEG0COM1 // bit 0
6623 #define SEG1COM1 LCDDATA3bits.SEG1COM1 // bit 1
6624 #define SEG2COM1 LCDDATA3bits.SEG2COM1 // bit 2
6625 #define SEG3COM1 LCDDATA3bits.SEG3COM1 // bit 3
6626 #define SEG4COM1 LCDDATA3bits.SEG4COM1 // bit 4
6627 #define SEG5COM1 LCDDATA3bits.SEG5COM1 // bit 5
6628 #define SEG6COM1 LCDDATA3bits.SEG6COM1 // bit 6
6629 #define SEG7COM1 LCDDATA3bits.SEG7COM1 // bit 7
6631 #define SEG8COM1 LCDDATA4bits.SEG8COM1 // bit 0
6632 #define SEG9COM1 LCDDATA4bits.SEG9COM1 // bit 1
6633 #define SEG10COM1 LCDDATA4bits.SEG10COM1 // bit 2
6634 #define SEG11COM1 LCDDATA4bits.SEG11COM1 // bit 3
6635 #define SEG12COM1 LCDDATA4bits.SEG12COM1 // bit 4
6636 #define SEG13COM1 LCDDATA4bits.SEG13COM1 // bit 5
6637 #define SEG14COM1 LCDDATA4bits.SEG14COM1 // bit 6
6638 #define SEG15COM1 LCDDATA4bits.SEG15COM1 // bit 7
6640 #define SEG16COM1 LCDDATA5bits.SEG16COM1 // bit 0
6641 #define SEG17COM1 LCDDATA5bits.SEG17COM1 // bit 1
6642 #define SEG18COM1 LCDDATA5bits.SEG18COM1 // bit 2
6643 #define SEG19COM1 LCDDATA5bits.SEG19COM1 // bit 3
6644 #define SEG20COM1 LCDDATA5bits.SEG20COM1 // bit 4
6645 #define SEG21COM1 LCDDATA5bits.SEG21COM1 // bit 5
6646 #define SEG22COM1 LCDDATA5bits.SEG22COM1 // bit 6
6647 #define SEG23COM1 LCDDATA5bits.SEG23COM1 // bit 7
6649 #define SEG0COM2 LCDDATA6bits.SEG0COM2 // bit 0
6650 #define SEG1COM2 LCDDATA6bits.SEG1COM2 // bit 1
6651 #define SEG2COM2 LCDDATA6bits.SEG2COM2 // bit 2
6652 #define SEG3COM2 LCDDATA6bits.SEG3COM2 // bit 3
6653 #define SEG4COM2 LCDDATA6bits.SEG4COM2 // bit 4
6654 #define SEG5COM2 LCDDATA6bits.SEG5COM2 // bit 5
6655 #define SEG6COM2 LCDDATA6bits.SEG6COM2 // bit 6
6656 #define SEG7COM2 LCDDATA6bits.SEG7COM2 // bit 7
6658 #define SEG8COM2 LCDDATA7bits.SEG8COM2 // bit 0
6659 #define SEG9COM2 LCDDATA7bits.SEG9COM2 // bit 1
6660 #define SEG10COM2 LCDDATA7bits.SEG10COM2 // bit 2
6661 #define SEG11COM2 LCDDATA7bits.SEG11COM2 // bit 3
6662 #define SEG12COM2 LCDDATA7bits.SEG12COM2 // bit 4
6663 #define SEG13COM2 LCDDATA7bits.SEG13COM2 // bit 5
6664 #define SEG14COM2 LCDDATA7bits.SEG14COM2 // bit 6
6665 #define SEG15COM2 LCDDATA7bits.SEG15COM2 // bit 7
6667 #define SEG16COM2 LCDDATA8bits.SEG16COM2 // bit 0
6668 #define SEG17COM2 LCDDATA8bits.SEG17COM2 // bit 1
6669 #define SEG18COM2 LCDDATA8bits.SEG18COM2 // bit 2
6670 #define SEG19COM2 LCDDATA8bits.SEG19COM2 // bit 3
6671 #define SEG20COM2 LCDDATA8bits.SEG20COM2 // bit 4
6672 #define SEG21COM2 LCDDATA8bits.SEG21COM2 // bit 5
6673 #define SEG22COM2 LCDDATA8bits.SEG22COM2 // bit 6
6674 #define SEG23COM2 LCDDATA8bits.SEG23COM2 // bit 7
6676 #define SEG0COM3 LCDDATA9bits.SEG0COM3 // bit 0
6677 #define SEG1COM3 LCDDATA9bits.SEG1COM3 // bit 1
6678 #define SEG2COM3 LCDDATA9bits.SEG2COM3 // bit 2
6679 #define SEG3COM3 LCDDATA9bits.SEG3COM3 // bit 3
6680 #define SEG4COM3 LCDDATA9bits.SEG4COM3 // bit 4
6681 #define SEG5COM3 LCDDATA9bits.SEG5COM3 // bit 5
6682 #define SEG6COM3 LCDDATA9bits.SEG6COM3 // bit 6
6683 #define SEG7COM3 LCDDATA9bits.SEG7COM3 // bit 7
6685 #define SEG8COM3 LCDDATA10bits.SEG8COM3 // bit 0
6686 #define SEG9COM3 LCDDATA10bits.SEG9COM3 // bit 1
6687 #define SEG10COM3 LCDDATA10bits.SEG10COM3 // bit 2
6688 #define SEG11COM3 LCDDATA10bits.SEG11COM3 // bit 3
6689 #define SEG12COM3 LCDDATA10bits.SEG12COM3 // bit 4
6690 #define SEG13COM3 LCDDATA10bits.SEG13COM3 // bit 5
6691 #define SEG14COM3 LCDDATA10bits.SEG14COM3 // bit 6
6692 #define SEG15COM3 LCDDATA10bits.SEG15COM3 // bit 7
6694 #define SEG16COM3 LCDDATA11bits.SEG16COM3 // bit 0
6695 #define SEG17COM3 LCDDATA11bits.SEG17COM3 // bit 1
6696 #define SEG18COM3 LCDDATA11bits.SEG18COM3 // bit 2
6697 #define SEG19COM3 LCDDATA11bits.SEG19COM3 // bit 3
6698 #define SEG20COM3 LCDDATA11bits.SEG20COM3 // bit 4
6699 #define SEG21COM3 LCDDATA11bits.SEG21COM3 // bit 5
6700 #define SEG22COM3 LCDDATA11bits.SEG22COM3 // bit 6
6701 #define SEG23COM3 LCDDATA11bits.SEG23COM3 // bit 7
6703 #define SEG24COM0 LCDDATA12bits.SEG24COM0 // bit 0
6704 #define SEG25COM0 LCDDATA12bits.SEG25COM0 // bit 1
6705 #define SEG26COM0 LCDDATA12bits.SEG26COM0 // bit 2
6706 #define SEG27COM0 LCDDATA12bits.SEG27COM0 // bit 3
6707 #define SEG28COM0 LCDDATA12bits.SEG28COM0 // bit 4
6708 #define SEG29COM0 LCDDATA12bits.SEG29COM0 // bit 5
6709 #define SEG30COM0 LCDDATA12bits.SEG30COM0 // bit 6
6710 #define SEG31COM0 LCDDATA12bits.SEG31COM0 // bit 7
6712 #define SEG32COM0 LCDDATA13bits.SEG32COM0 // bit 0
6713 #define SEG33COM0 LCDDATA13bits.SEG33COM0 // bit 1
6714 #define SEG34COM0 LCDDATA13bits.SEG34COM0 // bit 2
6715 #define SEG35COM0 LCDDATA13bits.SEG35COM0 // bit 3
6716 #define SEG36COM0 LCDDATA13bits.SEG36COM0 // bit 4
6717 #define SEG37COM0 LCDDATA13bits.SEG37COM0 // bit 5
6718 #define SEG38COM0 LCDDATA13bits.SEG38COM0 // bit 6
6719 #define SEG39COM0 LCDDATA13bits.SEG39COM0 // bit 7
6721 #define SEG40COM0 LCDDATA14bits.SEG40COM0 // bit 0
6722 #define SEG41COM0 LCDDATA14bits.SEG41COM0 // bit 1
6723 #define SEG42COM0 LCDDATA14bits.SEG42COM0 // bit 2
6724 #define SEG43COM0 LCDDATA14bits.SEG43COM0 // bit 3
6725 #define SEG44COM0 LCDDATA14bits.SEG44COM0 // bit 4
6726 #define SEG45COM0 LCDDATA14bits.SEG45COM0 // bit 5
6728 #define SEG24COM1 LCDDATA15bits.SEG24COM1 // bit 0
6729 #define SEG25COM1 LCDDATA15bits.SEG25COM1 // bit 1
6730 #define SEG26COM1 LCDDATA15bits.SEG26COM1 // bit 2
6731 #define SEG27COM1 LCDDATA15bits.SEG27COM1 // bit 3
6732 #define SEG28COM1 LCDDATA15bits.SEG28COM1 // bit 4
6733 #define SEG29COM1 LCDDATA15bits.SEG29COM1 // bit 5
6734 #define SEG30COM1 LCDDATA15bits.SEG30COM1 // bit 6
6735 #define SEG31COM1 LCDDATA15bits.SEG31COM1 // bit 7
6737 #define SEG32COM1 LCDDATA16bits.SEG32COM1 // bit 0
6738 #define SEG33COM1 LCDDATA16bits.SEG33COM1 // bit 1
6739 #define SEG34COM1 LCDDATA16bits.SEG34COM1 // bit 2
6740 #define SEG35COM1 LCDDATA16bits.SEG35COM1 // bit 3
6741 #define SEG36COM1 LCDDATA16bits.SEG36COM1 // bit 4
6742 #define SEG37COM1 LCDDATA16bits.SEG37COM1 // bit 5
6743 #define SEG38COM1 LCDDATA16bits.SEG38COM1 // bit 6
6744 #define SEG39COM1 LCDDATA16bits.SEG39COM1 // bit 7
6746 #define SEG40COM1 LCDDATA17bits.SEG40COM1 // bit 0
6747 #define SEG41COM1 LCDDATA17bits.SEG41COM1 // bit 1
6748 #define SEG42COM1 LCDDATA17bits.SEG42COM1 // bit 2
6749 #define SEG43COM1 LCDDATA17bits.SEG43COM1 // bit 3
6750 #define SEG44COM1 LCDDATA17bits.SEG44COM1 // bit 4
6751 #define SEG45COM1 LCDDATA17bits.SEG45COM1 // bit 5
6753 #define SEG24COM2 LCDDATA18bits.SEG24COM2 // bit 0
6754 #define SEG25COM2 LCDDATA18bits.SEG25COM2 // bit 1
6755 #define SEG26COM2 LCDDATA18bits.SEG26COM2 // bit 2
6756 #define SEG27COM2 LCDDATA18bits.SEG27COM2 // bit 3
6757 #define SEG28COM2 LCDDATA18bits.SEG28COM2 // bit 4
6758 #define SEG29COM2 LCDDATA18bits.SEG29COM2 // bit 5
6759 #define SEG30COM2 LCDDATA18bits.SEG30COM2 // bit 6
6760 #define SEG31COM2 LCDDATA18bits.SEG31COM2 // bit 7
6762 #define SEG32COM2 LCDDATA19bits.SEG32COM2 // bit 0
6763 #define SEG33COM2 LCDDATA19bits.SEG33COM2 // bit 1
6764 #define SEG34COM2 LCDDATA19bits.SEG34COM2 // bit 2
6765 #define SEG35COM2 LCDDATA19bits.SEG35COM2 // bit 3
6766 #define SEG36COM2 LCDDATA19bits.SEG36COM2 // bit 4
6767 #define SEG37COM2 LCDDATA19bits.SEG37COM2 // bit 5
6768 #define SEG38COM2 LCDDATA19bits.SEG38COM2 // bit 6
6769 #define SEG39COM2 LCDDATA19bits.SEG39COM2 // bit 7
6771 #define SEG40COM2 LCDDATA20bits.SEG40COM2 // bit 0
6772 #define SEG41COM2 LCDDATA20bits.SEG41COM2 // bit 1
6773 #define SEG42COM2 LCDDATA20bits.SEG42COM2 // bit 2
6774 #define SEG43COM2 LCDDATA20bits.SEG43COM2 // bit 3
6775 #define SEG44COM2 LCDDATA20bits.SEG44COM2 // bit 4
6776 #define SEG45COM2 LCDDATA20bits.SEG45COM2 // bit 5
6778 #define SEG24COM3 LCDDATA21bits.SEG24COM3 // bit 0
6779 #define SEG25COM3 LCDDATA21bits.SEG25COM3 // bit 1
6780 #define SEG26COM3 LCDDATA21bits.SEG26COM3 // bit 2
6781 #define SEG27COM3 LCDDATA21bits.SEG27COM3 // bit 3
6782 #define SEG28COM3 LCDDATA21bits.SEG28COM3 // bit 4
6783 #define SEG29COM3 LCDDATA21bits.SEG29COM3 // bit 5
6784 #define SEG30COM3 LCDDATA21bits.SEG30COM3 // bit 6
6785 #define SEG31COM3 LCDDATA21bits.SEG31COM3 // bit 7
6787 #define SEG32COM3 LCDDATA22bits.SEG32COM3 // bit 0
6788 #define SEG33COM3 LCDDATA22bits.SEG33COM3 // bit 1
6789 #define SEG34COM3 LCDDATA22bits.SEG34COM3 // bit 2
6790 #define SEG35COM3 LCDDATA22bits.SEG35COM3 // bit 3
6791 #define SEG36COM3 LCDDATA22bits.SEG36COM3 // bit 4
6792 #define SEG37COM3 LCDDATA22bits.SEG37COM3 // bit 5
6793 #define SEG38COM3 LCDDATA22bits.SEG38COM3 // bit 6
6794 #define SEG39COM3 LCDDATA22bits.SEG39COM3 // bit 7
6796 #define SEG40COM3 LCDDATA23bits.SEG40COM3 // bit 0
6797 #define SEG41COM3 LCDDATA23bits.SEG41COM3 // bit 1
6798 #define SEG42COM3 LCDDATA23bits.SEG42COM3 // bit 2
6799 #define SEG43COM3 LCDDATA23bits.SEG43COM3 // bit 3
6800 #define SEG44COM3 LCDDATA23bits.SEG44COM3 // bit 4
6801 #define SEG45COM3 LCDDATA23bits.SEG45COM3 // bit 5
6803 #define LP0 LCDPSbits.LP0 // bit 0
6804 #define LP1 LCDPSbits.LP1 // bit 1
6805 #define LP2 LCDPSbits.LP2 // bit 2
6806 #define LP3 LCDPSbits.LP3 // bit 3
6807 #define WA LCDPSbits.WA // bit 4
6808 #define LCDA LCDPSbits.LCDA // bit 5
6809 #define BIASMD LCDPSbits.BIASMD // bit 6
6810 #define WFT LCDPSbits.WFT // bit 7
6812 #define VLCD1PE LCDREFbits.VLCD1PE // bit 1
6813 #define VLCD2PE LCDREFbits.VLCD2PE // bit 2
6814 #define VLCD3PE LCDREFbits.VLCD3PE // bit 3
6815 #define LCDIRI LCDREFbits.LCDIRI // bit 5
6816 #define LCDIRS LCDREFbits.LCDIRS // bit 6
6817 #define LCDIRE LCDREFbits.LCDIRE // bit 7
6819 #define LRLAT0 LCDRLbits.LRLAT0 // bit 0
6820 #define LRLAT1 LCDRLbits.LRLAT1 // bit 1
6821 #define LRLAT2 LCDRLbits.LRLAT2 // bit 2
6822 #define LRLBP0 LCDRLbits.LRLBP0 // bit 4
6823 #define LRLBP1 LCDRLbits.LRLBP1 // bit 5
6824 #define LRLAP0 LCDRLbits.LRLAP0 // bit 6
6825 #define LRLAP1 LCDRLbits.LRLAP1 // bit 7
6827 #define SE0 LCDSE0bits.SE0 // bit 0
6828 #define SE1 LCDSE0bits.SE1 // bit 1
6829 #define SE2 LCDSE0bits.SE2 // bit 2
6830 #define SE3 LCDSE0bits.SE3 // bit 3
6831 #define SE4 LCDSE0bits.SE4 // bit 4
6832 #define SE5 LCDSE0bits.SE5 // bit 5
6833 #define SE6 LCDSE0bits.SE6 // bit 6
6834 #define SE7 LCDSE0bits.SE7 // bit 7
6836 #define SE8 LCDSE1bits.SE8 // bit 0
6837 #define SE9 LCDSE1bits.SE9 // bit 1
6838 #define SE10 LCDSE1bits.SE10 // bit 2
6839 #define SE11 LCDSE1bits.SE11 // bit 3
6840 #define SE12 LCDSE1bits.SE12 // bit 4
6841 #define SE13 LCDSE1bits.SE13 // bit 5
6842 #define SE14 LCDSE1bits.SE14 // bit 6
6843 #define SE15 LCDSE1bits.SE15 // bit 7
6845 #define SE16 LCDSE2bits.SE16 // bit 0
6846 #define SE17 LCDSE2bits.SE17 // bit 1
6847 #define SE18 LCDSE2bits.SE18 // bit 2
6848 #define SE19 LCDSE2bits.SE19 // bit 3
6849 #define SE20 LCDSE2bits.SE20 // bit 4
6850 #define SE21 LCDSE2bits.SE21 // bit 5
6851 #define SE22 LCDSE2bits.SE22 // bit 6
6852 #define SE23 LCDSE2bits.SE23 // bit 7
6854 #define SE24 LCDSE3bits.SE24 // bit 0
6855 #define SE25 LCDSE3bits.SE25 // bit 1
6856 #define SE26 LCDSE3bits.SE26 // bit 2
6857 #define SE27 LCDSE3bits.SE27 // bit 3
6858 #define SE28 LCDSE3bits.SE28 // bit 4
6859 #define SE29 LCDSE3bits.SE29 // bit 5
6860 #define SE30 LCDSE3bits.SE30 // bit 6
6861 #define SE31 LCDSE3bits.SE31 // bit 7
6863 #define SE32 LCDSE4bits.SE32 // bit 0
6864 #define SE33 LCDSE4bits.SE33 // bit 1
6865 #define SE34 LCDSE4bits.SE34 // bit 2
6866 #define SE35 LCDSE4bits.SE35 // bit 3
6867 #define SE36 LCDSE4bits.SE36 // bit 4
6868 #define SE37 LCDSE4bits.SE37 // bit 5
6869 #define SE38 LCDSE4bits.SE38 // bit 6
6870 #define SE39 LCDSE4bits.SE39 // bit 7
6872 #define SE40 LCDSE5bits.SE40 // bit 0
6873 #define SE41 LCDSE5bits.SE41 // bit 1
6874 #define SE42 LCDSE5bits.SE42 // bit 2
6875 #define SE43 LCDSE5bits.SE43 // bit 3
6876 #define SE44 LCDSE5bits.SE44 // bit 4
6877 #define SE45 LCDSE5bits.SE45 // bit 5
6879 #define PS0 OPTION_REGbits.PS0 // bit 0
6880 #define PS1 OPTION_REGbits.PS1 // bit 1
6881 #define PS2 OPTION_REGbits.PS2 // bit 2
6882 #define PSA OPTION_REGbits.PSA // bit 3
6883 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
6884 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
6885 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
6886 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
6887 #define INTEDG OPTION_REGbits.INTEDG // bit 6
6888 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
6890 #define SCS0 OSCCONbits.SCS0 // bit 0
6891 #define SCS1 OSCCONbits.SCS1 // bit 1
6892 #define IRCF0 OSCCONbits.IRCF0 // bit 3
6893 #define IRCF1 OSCCONbits.IRCF1 // bit 4
6894 #define IRCF2 OSCCONbits.IRCF2 // bit 5
6895 #define IRCF3 OSCCONbits.IRCF3 // bit 6
6896 #define SPLLEN OSCCONbits.SPLLEN // bit 7
6898 #define HFIOFS OSCSTATbits.HFIOFS // bit 0
6899 #define LFIOFR OSCSTATbits.LFIOFR // bit 1
6900 #define MFIOFR OSCSTATbits.MFIOFR // bit 2
6901 #define HFIOFL OSCSTATbits.HFIOFL // bit 3
6902 #define HFIOFR OSCSTATbits.HFIOFR // bit 4
6903 #define OSTS OSCSTATbits.OSTS // bit 5
6904 #define PLLR OSCSTATbits.PLLR // bit 6
6905 #define T1OSCR OSCSTATbits.T1OSCR // bit 7
6907 #define TUN0 OSCTUNEbits.TUN0 // bit 0
6908 #define TUN1 OSCTUNEbits.TUN1 // bit 1
6909 #define TUN2 OSCTUNEbits.TUN2 // bit 2
6910 #define TUN3 OSCTUNEbits.TUN3 // bit 3
6911 #define TUN4 OSCTUNEbits.TUN4 // bit 4
6912 #define TUN5 OSCTUNEbits.TUN5 // bit 5
6914 #define NOT_BOR PCONbits.NOT_BOR // bit 0
6915 #define NOT_POR PCONbits.NOT_POR // bit 1
6916 #define NOT_RI PCONbits.NOT_RI // bit 2
6917 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
6918 #define STKUNF PCONbits.STKUNF // bit 6
6919 #define STKOVF PCONbits.STKOVF // bit 7
6921 #define TMR1IE PIE1bits.TMR1IE // bit 0
6922 #define TMR2IE PIE1bits.TMR2IE // bit 1
6923 #define CCP1IE PIE1bits.CCP1IE // bit 2
6924 #define SSP1IE PIE1bits.SSP1IE // bit 3, shadows bit in PIE1bits
6925 #define SSPIE PIE1bits.SSPIE // bit 3, shadows bit in PIE1bits
6926 #define TX1IE PIE1bits.TX1IE // bit 4, shadows bit in PIE1bits
6927 #define TXIE PIE1bits.TXIE // bit 4, shadows bit in PIE1bits
6928 #define RC1IE PIE1bits.RC1IE // bit 5, shadows bit in PIE1bits
6929 #define RCIE PIE1bits.RCIE // bit 5, shadows bit in PIE1bits
6930 #define ADIE PIE1bits.ADIE // bit 6
6931 #define TMR1GIE PIE1bits.TMR1GIE // bit 7
6933 #define CCP2IE PIE2bits.CCP2IE // bit 0
6934 #define C3IE PIE2bits.C3IE // bit 1
6935 #define LCDIE PIE2bits.LCDIE // bit 2
6936 #define BCLIE PIE2bits.BCLIE // bit 3
6937 #define EEIE PIE2bits.EEIE // bit 4
6938 #define C1IE PIE2bits.C1IE // bit 5
6939 #define C2IE PIE2bits.C2IE // bit 6
6940 #define OSFIE PIE2bits.OSFIE // bit 7
6942 #define TMR4IE PIE3bits.TMR4IE // bit 1
6943 #define TMR6IE PIE3bits.TMR6IE // bit 3
6944 #define CCP3IE PIE3bits.CCP3IE // bit 4
6945 #define CCP4IE PIE3bits.CCP4IE // bit 5
6946 #define CCP5IE PIE3bits.CCP5IE // bit 6
6948 #define SSP2IE PIE4bits.SSP2IE // bit 0
6949 #define BCL2IE PIE4bits.BCL2IE // bit 1
6950 #define TX2IE PIE4bits.TX2IE // bit 4
6951 #define RC2IE PIE4bits.RC2IE // bit 5
6953 #define TMR1IF PIR1bits.TMR1IF // bit 0
6954 #define TMR2IF PIR1bits.TMR2IF // bit 1
6955 #define CCP1IF PIR1bits.CCP1IF // bit 2
6956 #define SSP1IF PIR1bits.SSP1IF // bit 3, shadows bit in PIR1bits
6957 #define SSPIF PIR1bits.SSPIF // bit 3, shadows bit in PIR1bits
6958 #define TX1IF PIR1bits.TX1IF // bit 4, shadows bit in PIR1bits
6959 #define TXIF PIR1bits.TXIF // bit 4, shadows bit in PIR1bits
6960 #define RC1IF PIR1bits.RC1IF // bit 5, shadows bit in PIR1bits
6961 #define RCIF PIR1bits.RCIF // bit 5, shadows bit in PIR1bits
6962 #define ADIF PIR1bits.ADIF // bit 6
6963 #define TMR1GIF PIR1bits.TMR1GIF // bit 7
6965 #define CCP2IF PIR2bits.CCP2IF // bit 0
6966 #define C3IF PIR2bits.C3IF // bit 1
6967 #define LCDIF PIR2bits.LCDIF // bit 2
6968 #define BCLIF PIR2bits.BCLIF // bit 3
6969 #define EEIF PIR2bits.EEIF // bit 4
6970 #define C1IF PIR2bits.C1IF // bit 5
6971 #define C2IF PIR2bits.C2IF // bit 6
6972 #define OSFIF PIR2bits.OSFIF // bit 7
6974 #define TMR4IF PIR3bits.TMR4IF // bit 1
6975 #define TMR6IF PIR3bits.TMR6IF // bit 3
6976 #define CCP3IF PIR3bits.CCP3IF // bit 4
6977 #define CCP4IF PIR3bits.CCP4IF // bit 5
6978 #define CCP5IF PIR3bits.CCP5IF // bit 6
6980 #define SSP2IF PIR4bits.SSP2IF // bit 0
6981 #define BCL2IF PIR4bits.BCL2IF // bit 1
6982 #define TX2IF PIR4bits.TX2IF // bit 4
6983 #define RC2IF PIR4bits.RC2IF // bit 5
6985 #define RA0 PORTAbits.RA0 // bit 0, shadows bit in PORTAbits
6986 #define AN0 PORTAbits.AN0 // bit 0, shadows bit in PORTAbits
6987 #define CPS0 PORTAbits.CPS0 // bit 0, shadows bit in PORTAbits
6988 #define SEG33 PORTAbits.SEG33 // bit 0, shadows bit in PORTAbits
6989 #define RA1 PORTAbits.RA1 // bit 1, shadows bit in PORTAbits
6990 #define AN1 PORTAbits.AN1 // bit 1, shadows bit in PORTAbits
6991 #define CPS1 PORTAbits.CPS1 // bit 1, shadows bit in PORTAbits
6992 #define SEG18 PORTAbits.SEG18 // bit 1, shadows bit in PORTAbits
6993 #define RA2 PORTAbits.RA2 // bit 2, shadows bit in PORTAbits
6994 #define AN2 PORTAbits.AN2 // bit 2, shadows bit in PORTAbits
6995 #define CPS2 PORTAbits.CPS2 // bit 2, shadows bit in PORTAbits
6996 #define SEG34 PORTAbits.SEG34 // bit 2, shadows bit in PORTAbits
6997 #define VREFM PORTAbits.VREFM // bit 2, shadows bit in PORTAbits
6998 #define RA3 PORTAbits.RA3 // bit 3, shadows bit in PORTAbits
6999 #define AN3 PORTAbits.AN3 // bit 3, shadows bit in PORTAbits
7000 #define CPS3 PORTAbits.CPS3 // bit 3, shadows bit in PORTAbits
7001 #define SEG35 PORTAbits.SEG35 // bit 3, shadows bit in PORTAbits
7002 #define VREFP PORTAbits.VREFP // bit 3, shadows bit in PORTAbits
7003 #define RA4 PORTAbits.RA4 // bit 4, shadows bit in PORTAbits
7004 #define SEG14 PORTAbits.SEG14 // bit 4, shadows bit in PORTAbits
7005 #define T0CKI PORTAbits.T0CKI // bit 4, shadows bit in PORTAbits
7006 #define RA5 PORTAbits.RA5 // bit 5, shadows bit in PORTAbits
7007 #define AN4 PORTAbits.AN4 // bit 5, shadows bit in PORTAbits
7008 #define CPS4 PORTAbits.CPS4 // bit 5, shadows bit in PORTAbits
7009 #define SEG15 PORTAbits.SEG15 // bit 5, shadows bit in PORTAbits
7010 #define RA6 PORTAbits.RA6 // bit 6, shadows bit in PORTAbits
7011 #define SEG36 PORTAbits.SEG36 // bit 6, shadows bit in PORTAbits
7012 #define OSC2 PORTAbits.OSC2 // bit 6, shadows bit in PORTAbits
7013 #define CLKOUT PORTAbits.CLKOUT // bit 6, shadows bit in PORTAbits
7014 #define RA7 PORTAbits.RA7 // bit 7, shadows bit in PORTAbits
7015 #define SEG37 PORTAbits.SEG37 // bit 7, shadows bit in PORTAbits
7016 #define OSC1 PORTAbits.OSC1 // bit 7, shadows bit in PORTAbits
7017 #define CLKIN PORTAbits.CLKIN // bit 7, shadows bit in PORTAbits
7019 #define RB0 PORTBbits.RB0 // bit 0, shadows bit in PORTBbits
7020 #define SEG30 PORTBbits.SEG30 // bit 0, shadows bit in PORTBbits
7021 #define SRI PORTBbits.SRI // bit 0, shadows bit in PORTBbits
7022 #define FLT0 PORTBbits.FLT0 // bit 0, shadows bit in PORTBbits
7023 #define RB1 PORTBbits.RB1 // bit 1, shadows bit in PORTBbits
7024 #define SEG8 PORTBbits.SEG8 // bit 1, shadows bit in PORTBbits
7025 #define RB2 PORTBbits.RB2 // bit 2, shadows bit in PORTBbits
7026 #define SEG9 PORTBbits.SEG9 // bit 2, shadows bit in PORTBbits
7027 #define RB3 PORTBbits.RB3 // bit 3, shadows bit in PORTBbits
7028 #define SEG10 PORTBbits.SEG10 // bit 3, shadows bit in PORTBbits
7029 #define RB4 PORTBbits.RB4 // bit 4, shadows bit in PORTBbits
7030 #define SEG11 PORTBbits.SEG11 // bit 4, shadows bit in PORTBbits
7031 #define RB5 PORTBbits.RB5 // bit 5, shadows bit in PORTBbits
7032 #define SEG29 PORTBbits.SEG29 // bit 5, shadows bit in PORTBbits
7033 #define T1G PORTBbits.T1G // bit 5, shadows bit in PORTBbits
7034 #define RB6 PORTBbits.RB6 // bit 6, shadows bit in PORTBbits
7035 #define SEG38 PORTBbits.SEG38 // bit 6, shadows bit in PORTBbits
7036 #define RB7 PORTBbits.RB7 // bit 7, shadows bit in PORTBbits
7037 #define SEG39 PORTBbits.SEG39 // bit 7, shadows bit in PORTBbits
7039 #define RC0 PORTCbits.RC0 // bit 0, shadows bit in PORTCbits
7040 #define SEG40 PORTCbits.SEG40 // bit 0, shadows bit in PORTCbits
7041 #define T1OSO PORTCbits.T1OSO // bit 0, shadows bit in PORTCbits
7042 #define T1CKI PORTCbits.T1CKI // bit 0, shadows bit in PORTCbits
7043 #define RC1 PORTCbits.RC1 // bit 1, shadows bit in PORTCbits
7044 #define SEG32 PORTCbits.SEG32 // bit 1, shadows bit in PORTCbits
7045 #define T1OSI PORTCbits.T1OSI // bit 1, shadows bit in PORTCbits
7046 #define CCP2 PORTCbits.CCP2 // bit 1, shadows bit in PORTCbits
7047 #define P2A PORTCbits.P2A // bit 1, shadows bit in PORTCbits
7048 #define RC2 PORTCbits.RC2 // bit 2, shadows bit in PORTCbits
7049 #define SEG13 PORTCbits.SEG13 // bit 2, shadows bit in PORTCbits
7050 #define CCP1 PORTCbits.CCP1 // bit 2, shadows bit in PORTCbits
7051 #define P1A PORTCbits.P1A // bit 2, shadows bit in PORTCbits
7052 #define RC3 PORTCbits.RC3 // bit 3, shadows bit in PORTCbits
7053 #define SEG17 PORTCbits.SEG17 // bit 3, shadows bit in PORTCbits
7054 #define SCK1 PORTCbits.SCK1 // bit 3, shadows bit in PORTCbits
7055 #define SCL1 PORTCbits.SCL1 // bit 3, shadows bit in PORTCbits
7056 #define RC4 PORTCbits.RC4 // bit 4, shadows bit in PORTCbits
7057 #define SEG16 PORTCbits.SEG16 // bit 4, shadows bit in PORTCbits
7058 #define SDI1 PORTCbits.SDI1 // bit 4, shadows bit in PORTCbits
7059 #define SDA1 PORTCbits.SDA1 // bit 4, shadows bit in PORTCbits
7060 #define RC5 PORTCbits.RC5 // bit 5, shadows bit in PORTCbits
7061 #define SEG12 PORTCbits.SEG12 // bit 5, shadows bit in PORTCbits
7062 #define SDO1 PORTCbits.SDO1 // bit 5, shadows bit in PORTCbits
7063 #define RC6 PORTCbits.RC6 // bit 6, shadows bit in PORTCbits
7064 #define SEG27 PORTCbits.SEG27 // bit 6, shadows bit in PORTCbits
7065 #define TX1 PORTCbits.TX1 // bit 6, shadows bit in PORTCbits
7066 #define CK1 PORTCbits.CK1 // bit 6, shadows bit in PORTCbits
7067 #define RC7 PORTCbits.RC7 // bit 7, shadows bit in PORTCbits
7068 #define SEG28 PORTCbits.SEG28 // bit 7, shadows bit in PORTCbits
7069 #define RX1 PORTCbits.RX1 // bit 7, shadows bit in PORTCbits
7070 #define DT1 PORTCbits.DT1 // bit 7, shadows bit in PORTCbits
7072 #define RD0 PORTDbits.RD0 // bit 0, shadows bit in PORTDbits
7073 #define SEG0 PORTDbits.SEG0 // bit 0, shadows bit in PORTDbits
7074 #define P2D PORTDbits.P2D // bit 0, shadows bit in PORTDbits
7075 #define RD1 PORTDbits.RD1 // bit 1, shadows bit in PORTDbits
7076 #define SEG1 PORTDbits.SEG1 // bit 1, shadows bit in PORTDbits
7077 #define P2C PORTDbits.P2C // bit 1, shadows bit in PORTDbits
7078 #define RD2 PORTDbits.RD2 // bit 2, shadows bit in PORTDbits
7079 #define SEG2 PORTDbits.SEG2 // bit 2, shadows bit in PORTDbits
7080 #define P2B PORTDbits.P2B // bit 2, shadows bit in PORTDbits
7081 #define RD3 PORTDbits.RD3 // bit 3, shadows bit in PORTDbits
7082 #define SEG3 PORTDbits.SEG3 // bit 3, shadows bit in PORTDbits
7083 #define P3C PORTDbits.P3C // bit 3, shadows bit in PORTDbits
7084 #define RD4 PORTDbits.RD4 // bit 4, shadows bit in PORTDbits
7085 #define SEG4 PORTDbits.SEG4 // bit 4, shadows bit in PORTDbits
7086 #define P3B PORTDbits.P3B // bit 4, shadows bit in PORTDbits
7087 #define SDO2 PORTDbits.SDO2 // bit 4, shadows bit in PORTDbits
7088 #define RD5 PORTDbits.RD5 // bit 5, shadows bit in PORTDbits
7089 #define SEG5 PORTDbits.SEG5 // bit 5, shadows bit in PORTDbits
7090 #define P1C PORTDbits.P1C // bit 5, shadows bit in PORTDbits
7091 #define SDI2 PORTDbits.SDI2 // bit 5, shadows bit in PORTDbits
7092 #define SDA2 PORTDbits.SDA2 // bit 5, shadows bit in PORTDbits
7093 #define RD6 PORTDbits.RD6 // bit 6, shadows bit in PORTDbits
7094 #define SEG6 PORTDbits.SEG6 // bit 6, shadows bit in PORTDbits
7095 #define P1B PORTDbits.P1B // bit 6, shadows bit in PORTDbits
7096 #define SCK2 PORTDbits.SCK2 // bit 6, shadows bit in PORTDbits
7097 #define SCL2 PORTDbits.SCL2 // bit 6, shadows bit in PORTDbits
7098 #define RD7 PORTDbits.RD7 // bit 7, shadows bit in PORTDbits
7099 #define SEG7 PORTDbits.SEG7 // bit 7, shadows bit in PORTDbits
7100 #define NOT_SS2 PORTDbits.NOT_SS2 // bit 7, shadows bit in PORTDbits
7102 #define STR1A PSTR1CONbits.STR1A // bit 0
7103 #define STR1B PSTR1CONbits.STR1B // bit 1
7104 #define STR1C PSTR1CONbits.STR1C // bit 2
7105 #define STR1D PSTR1CONbits.STR1D // bit 3
7106 #define STR1SYNC PSTR1CONbits.STR1SYNC // bit 4
7108 #define STR2A PSTR2CONbits.STR2A // bit 0
7109 #define STR2B PSTR2CONbits.STR2B // bit 1
7110 #define STR2C PSTR2CONbits.STR2C // bit 2
7111 #define STR2D PSTR2CONbits.STR2D // bit 3
7112 #define STR2SYNC PSTR2CONbits.STR2SYNC // bit 4
7114 #define STR3A PSTR3CONbits.STR3A // bit 0
7115 #define STR3B PSTR3CONbits.STR3B // bit 1
7116 #define STR3C PSTR3CONbits.STR3C // bit 2
7117 #define STR3D PSTR3CONbits.STR3D // bit 3
7118 #define STR3SYNC PSTR3CONbits.STR3SYNC // bit 4
7120 #define P1DC0 PWM1CONbits.P1DC0 // bit 0
7121 #define P1DC1 PWM1CONbits.P1DC1 // bit 1
7122 #define P1DC2 PWM1CONbits.P1DC2 // bit 2
7123 #define P1DC3 PWM1CONbits.P1DC3 // bit 3
7124 #define P1DC4 PWM1CONbits.P1DC4 // bit 4
7125 #define P1DC5 PWM1CONbits.P1DC5 // bit 5
7126 #define P1DC6 PWM1CONbits.P1DC6 // bit 6
7127 #define P1RSEN PWM1CONbits.P1RSEN // bit 7
7129 #define P2DC0 PWM2CONbits.P2DC0 // bit 0
7130 #define P2DC1 PWM2CONbits.P2DC1 // bit 1
7131 #define P2DC2 PWM2CONbits.P2DC2 // bit 2
7132 #define P2DC3 PWM2CONbits.P2DC3 // bit 3
7133 #define P2DC4 PWM2CONbits.P2DC4 // bit 4
7134 #define P2DC5 PWM2CONbits.P2DC5 // bit 5
7135 #define P2DC6 PWM2CONbits.P2DC6 // bit 6
7136 #define P2RSEN PWM2CONbits.P2RSEN // bit 7
7138 #define P3DC0 PWM3CONbits.P3DC0 // bit 0
7139 #define P3DC1 PWM3CONbits.P3DC1 // bit 1
7140 #define P3DC2 PWM3CONbits.P3DC2 // bit 2
7141 #define P3DC3 PWM3CONbits.P3DC3 // bit 3
7142 #define P3DC4 PWM3CONbits.P3DC4 // bit 4
7143 #define P3DC5 PWM3CONbits.P3DC5 // bit 5
7144 #define P3DC6 PWM3CONbits.P3DC6 // bit 6
7145 #define P3RSEN PWM3CONbits.P3RSEN // bit 7
7147 #define RX9D RC1STAbits.RX9D // bit 0
7148 #define OERR RC1STAbits.OERR // bit 1
7149 #define FERR RC1STAbits.FERR // bit 2
7150 #define ADDEN RC1STAbits.ADDEN // bit 3
7151 #define CREN RC1STAbits.CREN // bit 4
7152 #define SREN RC1STAbits.SREN // bit 5
7153 #define RX9 RC1STAbits.RX9 // bit 6
7154 #define SPEN RC1STAbits.SPEN // bit 7
7156 #define SRPR SRCON0bits.SRPR // bit 0
7157 #define SRPS SRCON0bits.SRPS // bit 1
7158 #define SRNQEN SRCON0bits.SRNQEN // bit 2
7159 #define SRQEN SRCON0bits.SRQEN // bit 3
7160 #define SRCLK0 SRCON0bits.SRCLK0 // bit 4
7161 #define SRCLK1 SRCON0bits.SRCLK1 // bit 5
7162 #define SRCLK2 SRCON0bits.SRCLK2 // bit 6
7163 #define SRLEN SRCON0bits.SRLEN // bit 7
7165 #define SRRC1E SRCON1bits.SRRC1E // bit 0
7166 #define SRRC2E SRCON1bits.SRRC2E // bit 1
7167 #define SRRCKE SRCON1bits.SRRCKE // bit 2
7168 #define SRRPE SRCON1bits.SRRPE // bit 3
7169 #define SRSC1E SRCON1bits.SRSC1E // bit 4
7170 #define SRSC2E SRCON1bits.SRSC2E // bit 5
7171 #define SRSCKE SRCON1bits.SRSCKE // bit 6
7172 #define SRSPE SRCON1bits.SRSPE // bit 7
7174 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0
7175 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1
7176 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2
7177 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3
7178 #define CKP SSP1CON1bits.CKP // bit 4
7179 #define SSPEN SSP1CON1bits.SSPEN // bit 5
7180 #define SSPOV SSP1CON1bits.SSPOV // bit 6
7181 #define WCOL SSP1CON1bits.WCOL // bit 7
7183 #define SEN SSP1CON2bits.SEN // bit 0
7184 #define RSEN SSP1CON2bits.RSEN // bit 1
7185 #define PEN SSP1CON2bits.PEN // bit 2
7186 #define RCEN SSP1CON2bits.RCEN // bit 3
7187 #define ACKEN SSP1CON2bits.ACKEN // bit 4
7188 #define ACKDT SSP1CON2bits.ACKDT // bit 5
7189 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
7190 #define GCEN SSP1CON2bits.GCEN // bit 7
7192 #define DHEN SSP1CON3bits.DHEN // bit 0
7193 #define AHEN SSP1CON3bits.AHEN // bit 1
7194 #define SBCDE SSP1CON3bits.SBCDE // bit 2
7195 #define SDAHT SSP1CON3bits.SDAHT // bit 3
7196 #define BOEN SSP1CON3bits.BOEN // bit 4
7197 #define SCIE SSP1CON3bits.SCIE // bit 5
7198 #define PCIE SSP1CON3bits.PCIE // bit 6
7199 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7
7201 #define BF SSP1STATbits.BF // bit 0
7202 #define UA SSP1STATbits.UA // bit 1
7203 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
7204 #define S SSP1STATbits.S // bit 3
7205 #define P SSP1STATbits.P // bit 4
7206 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
7207 #define CKE SSP1STATbits.CKE // bit 6
7208 #define SMP SSP1STATbits.SMP // bit 7
7210 #define C STATUSbits.C // bit 0
7211 #define DC STATUSbits.DC // bit 1
7212 #define Z STATUSbits.Z // bit 2
7213 #define NOT_PD STATUSbits.NOT_PD // bit 3
7214 #define NOT_TO STATUSbits.NOT_TO // bit 4
7216 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
7217 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
7218 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
7220 #define TMR1ON T1CONbits.TMR1ON // bit 0
7221 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
7222 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
7223 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
7224 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
7225 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6
7226 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7
7228 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0
7229 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1
7230 #define T1GVAL T1GCONbits.T1GVAL // bit 2
7231 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3, shadows bit in T1GCONbits
7232 #define T1GGO T1GCONbits.T1GGO // bit 3, shadows bit in T1GCONbits
7233 #define T1GSPM T1GCONbits.T1GSPM // bit 4
7234 #define T1GTM T1GCONbits.T1GTM // bit 5
7235 #define T1GPOL T1GCONbits.T1GPOL // bit 6
7236 #define TMR1GE T1GCONbits.TMR1GE // bit 7
7238 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
7239 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
7240 #define TMR2ON T2CONbits.TMR2ON // bit 2
7241 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3
7242 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4
7243 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5
7244 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6
7246 #define T4CKPS0 T4CONbits.T4CKPS0 // bit 0
7247 #define T4CKPS1 T4CONbits.T4CKPS1 // bit 1
7248 #define TMR4ON T4CONbits.TMR4ON // bit 2
7249 #define T4OUTPS0 T4CONbits.T4OUTPS0 // bit 3
7250 #define T4OUTPS1 T4CONbits.T4OUTPS1 // bit 4
7251 #define T4OUTPS2 T4CONbits.T4OUTPS2 // bit 5
7252 #define T4OUTPS3 T4CONbits.T4OUTPS3 // bit 6
7254 #define T6CKPS0 T6CONbits.T6CKPS0 // bit 0
7255 #define T6CKPS1 T6CONbits.T6CKPS1 // bit 1
7256 #define TMR6ON T6CONbits.TMR6ON // bit 2
7257 #define T6OUTPS0 T6CONbits.T6OUTPS0 // bit 3
7258 #define T6OUTPS1 T6CONbits.T6OUTPS1 // bit 4
7259 #define T6OUTPS2 T6CONbits.T6OUTPS2 // bit 5
7260 #define T6OUTPS3 T6CONbits.T6OUTPS3 // bit 6
7262 #define TRISA0 TRISAbits.TRISA0 // bit 0
7263 #define TRISA1 TRISAbits.TRISA1 // bit 1
7264 #define TRISA2 TRISAbits.TRISA2 // bit 2
7265 #define TRISA3 TRISAbits.TRISA3 // bit 3
7266 #define TRISA4 TRISAbits.TRISA4 // bit 4
7267 #define TRISA5 TRISAbits.TRISA5 // bit 5
7268 #define TRISA6 TRISAbits.TRISA6 // bit 6
7269 #define TRISA7 TRISAbits.TRISA7 // bit 7
7271 #define TRISB0 TRISBbits.TRISB0 // bit 0
7272 #define TRISB1 TRISBbits.TRISB1 // bit 1
7273 #define TRISB2 TRISBbits.TRISB2 // bit 2
7274 #define TRISB3 TRISBbits.TRISB3 // bit 3
7275 #define TRISB4 TRISBbits.TRISB4 // bit 4
7276 #define TRISB5 TRISBbits.TRISB5 // bit 5
7277 #define TRISB6 TRISBbits.TRISB6 // bit 6
7278 #define TRISB7 TRISBbits.TRISB7 // bit 7
7280 #define TRISC0 TRISCbits.TRISC0 // bit 0
7281 #define TRISC1 TRISCbits.TRISC1 // bit 1
7282 #define TRISC2 TRISCbits.TRISC2 // bit 2
7283 #define TRISC3 TRISCbits.TRISC3 // bit 3
7284 #define TRISC4 TRISCbits.TRISC4 // bit 4
7285 #define TRISC5 TRISCbits.TRISC5 // bit 5
7286 #define TRISC6 TRISCbits.TRISC6 // bit 6
7287 #define TRISC7 TRISCbits.TRISC7 // bit 7
7289 #define TRISD0 TRISDbits.TRISD0 // bit 0
7290 #define TRISD1 TRISDbits.TRISD1 // bit 1
7291 #define TRISD2 TRISDbits.TRISD2 // bit 2
7292 #define TRISD3 TRISDbits.TRISD3 // bit 3
7293 #define TRISD4 TRISDbits.TRISD4 // bit 4
7294 #define TRISD5 TRISDbits.TRISD5 // bit 5
7295 #define TRISD6 TRISDbits.TRISD6 // bit 6
7296 #define TRISD7 TRISDbits.TRISD7 // bit 7
7298 #define TRISE0 TRISEbits.TRISE0 // bit 0
7299 #define TRISE1 TRISEbits.TRISE1 // bit 1
7300 #define TRISE2 TRISEbits.TRISE2 // bit 2
7301 #define TRISE3 TRISEbits.TRISE3 // bit 3
7302 #define TRISE4 TRISEbits.TRISE4 // bit 4
7303 #define TRISE5 TRISEbits.TRISE5 // bit 5
7304 #define TRISE6 TRISEbits.TRISE6 // bit 6
7305 #define TRISE7 TRISEbits.TRISE7 // bit 7
7307 #define TRISF0 TRISFbits.TRISF0 // bit 0
7308 #define TRISF1 TRISFbits.TRISF1 // bit 1
7309 #define TRISF2 TRISFbits.TRISF2 // bit 2
7310 #define TRISF3 TRISFbits.TRISF3 // bit 3
7311 #define TRISF4 TRISFbits.TRISF4 // bit 4
7312 #define TRISF5 TRISFbits.TRISF5 // bit 5
7313 #define TRISF6 TRISFbits.TRISF6 // bit 6
7314 #define TRISF7 TRISFbits.TRISF7 // bit 7
7316 #define TRISG0 TRISGbits.TRISG0 // bit 0
7317 #define TRISG1 TRISGbits.TRISG1 // bit 1
7318 #define TRISG2 TRISGbits.TRISG2 // bit 2
7319 #define TRISG3 TRISGbits.TRISG3 // bit 3
7320 #define TRISG4 TRISGbits.TRISG4 // bit 4
7321 #define TRISG5 TRISGbits.TRISG5 // bit 5
7323 #define TX9D TX1STAbits.TX9D // bit 0
7324 #define TRMT TX1STAbits.TRMT // bit 1
7325 #define BRGH TX1STAbits.BRGH // bit 2
7326 #define SENDB TX1STAbits.SENDB // bit 3
7327 #define SYNC TX1STAbits.SYNC // bit 4
7328 #define TXEN TX1STAbits.TXEN // bit 5
7329 #define TX9 TX1STAbits.TX9 // bit 6
7330 #define CSRC TX1STAbits.CSRC // bit 7
7332 #define SWDTEN WDTCONbits.SWDTEN // bit 0
7333 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1
7334 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2
7335 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3
7336 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4
7337 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5
7339 #define WPUB0 WPUBbits.WPUB0 // bit 0
7340 #define WPUB1 WPUBbits.WPUB1 // bit 1
7341 #define WPUB2 WPUBbits.WPUB2 // bit 2
7342 #define WPUB3 WPUBbits.WPUB3 // bit 3
7343 #define WPUB4 WPUBbits.WPUB4 // bit 4
7344 #define WPUB5 WPUBbits.WPUB5 // bit 5
7345 #define WPUB6 WPUBbits.WPUB6 // bit 6
7346 #define WPUB7 WPUBbits.WPUB7 // bit 7
7348 #define WPUG5 WPUGbits.WPUG5 // bit 5
7350 #endif // #ifndef NO_BIT_DEFINES
7352 #endif // #ifndef __PIC16LF1947_H__