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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic14 / pic16lf627.h
blobb103a8a6adec0efc9435991d3e1c70412637a483
1 /*
2 * This declarations of the PIC16LF627 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:56 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC16LF627_H__
26 #define __PIC16LF627_H__
27
28 //==============================================================================
29 //
30 // Register Addresses
31 //
32 //==============================================================================
33
34 #ifndef NO_ADDR_DEFINES
35
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PCLATH_ADDR 0x000A
44 #define INTCON_ADDR 0x000B
45 #define PIR1_ADDR 0x000C
46 #define TMR1_ADDR 0x000E
47 #define TMR1L_ADDR 0x000E
48 #define TMR1H_ADDR 0x000F
49 #define T1CON_ADDR 0x0010
50 #define TMR2_ADDR 0x0011
51 #define T2CON_ADDR 0x0012
52 #define CCPR1_ADDR 0x0015
53 #define CCPR1L_ADDR 0x0015
54 #define CCPR1H_ADDR 0x0016
55 #define CCP1CON_ADDR 0x0017
56 #define RCSTA_ADDR 0x0018
57 #define TXREG_ADDR 0x0019
58 #define RCREG_ADDR 0x001A
59 #define CMCON_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define PIE1_ADDR 0x008C
64 #define PCON_ADDR 0x008E
65 #define PR2_ADDR 0x0092
66 #define TXSTA_ADDR 0x0098
67 #define SPBRG_ADDR 0x0099
68 #define EEDATA_ADDR 0x009A
69 #define EEADR_ADDR 0x009B
70 #define EECON1_ADDR 0x009C
71 #define EECON2_ADDR 0x009D
72 #define VRCON_ADDR 0x009F
73
74 #endif // #ifndef NO_ADDR_DEFINES
75
76 //==============================================================================
77 //
78 // Register Definitions
79 //
80 //==============================================================================
81
82 extern __at(0x0000) __sfr INDF;
83 extern __at(0x0001) __sfr TMR0;
84 extern __at(0x0002) __sfr PCL;
85
86 //==============================================================================
87 // STATUS Bits
88
89 extern __at(0x0003) __sfr STATUS;
90
91 typedef union
92 {
93 struct
94 {
95 unsigned C : 1;
96 unsigned DC : 1;
97 unsigned Z : 1;
98 unsigned NOT_PD : 1;
99 unsigned NOT_TO : 1;
100 unsigned RP0 : 1;
101 unsigned RP1 : 1;
102 unsigned IRP : 1;
103 };
104
105 struct
106 {
107 unsigned : 5;
108 unsigned RP : 2;
109 unsigned : 1;
110 };
111 } __STATUSbits_t;
112
113 extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
114
115 #define _C 0x01
116 #define _DC 0x02
117 #define _Z 0x04
118 #define _NOT_PD 0x08
119 #define _NOT_TO 0x10
120 #define _RP0 0x20
121 #define _RP1 0x40
122 #define _IRP 0x80
123
124 //==============================================================================
125
126 extern __at(0x0004) __sfr FSR;
127
128 //==============================================================================
129 // PORTA Bits
130
131 extern __at(0x0005) __sfr PORTA;
132
133 typedef struct
134 {
135 unsigned RA0 : 1;
136 unsigned RA1 : 1;
137 unsigned RA2 : 1;
138 unsigned RA3 : 1;
139 unsigned RA4 : 1;
140 unsigned RA5 : 1;
141 unsigned RA6 : 1;
142 unsigned RA7 : 1;
143 } __PORTAbits_t;
144
145 extern __at(0x0005) volatile __PORTAbits_t PORTAbits;
146
147 #define _RA0 0x01
148 #define _RA1 0x02
149 #define _RA2 0x04
150 #define _RA3 0x08
151 #define _RA4 0x10
152 #define _RA5 0x20
153 #define _RA6 0x40
154 #define _RA7 0x80
155
156 //==============================================================================
157
158
159 //==============================================================================
160 // PORTB Bits
161
162 extern __at(0x0006) __sfr PORTB;
163
164 typedef struct
165 {
166 unsigned RB0 : 1;
167 unsigned RB1 : 1;
168 unsigned RB2 : 1;
169 unsigned RB3 : 1;
170 unsigned RB4 : 1;
171 unsigned RB5 : 1;
172 unsigned RB6 : 1;
173 unsigned RB7 : 1;
174 } __PORTBbits_t;
175
176 extern __at(0x0006) volatile __PORTBbits_t PORTBbits;
177
178 #define _RB0 0x01
179 #define _RB1 0x02
180 #define _RB2 0x04
181 #define _RB3 0x08
182 #define _RB4 0x10
183 #define _RB5 0x20
184 #define _RB6 0x40
185 #define _RB7 0x80
186
187 //==============================================================================
188
189 extern __at(0x000A) __sfr PCLATH;
190
191 //==============================================================================
192 // INTCON Bits
193
194 extern __at(0x000B) __sfr INTCON;
195
196 typedef union
197 {
198 struct
199 {
200 unsigned RBIF : 1;
201 unsigned INTF : 1;
202 unsigned T0IF : 1;
203 unsigned RBIE : 1;
204 unsigned INTE : 1;
205 unsigned T0IE : 1;
206 unsigned PEIE : 1;
207 unsigned GIE : 1;
208 };
209
210 struct
211 {
212 unsigned : 1;
213 unsigned : 1;
214 unsigned TMR0IF : 1;
215 unsigned : 1;
216 unsigned : 1;
217 unsigned TMR0IE : 1;
218 unsigned : 1;
219 unsigned : 1;
220 };
221 } __INTCONbits_t;
222
223 extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
224
225 #define _RBIF 0x01
226 #define _INTF 0x02
227 #define _T0IF 0x04
228 #define _TMR0IF 0x04
229 #define _RBIE 0x08
230 #define _INTE 0x10
231 #define _T0IE 0x20
232 #define _TMR0IE 0x20
233 #define _PEIE 0x40
234 #define _GIE 0x80
235
236 //==============================================================================
237
238
239 //==============================================================================
240 // PIR1 Bits
241
242 extern __at(0x000C) __sfr PIR1;
243
244 typedef struct
245 {
246 unsigned TMR1IF : 1;
247 unsigned TMR2IF : 1;
248 unsigned CCP1IF : 1;
249 unsigned : 1;
250 unsigned TXIF : 1;
251 unsigned RCIF : 1;
252 unsigned CMIF : 1;
253 unsigned EEIF : 1;
254 } __PIR1bits_t;
255
256 extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
257
258 #define _TMR1IF 0x01
259 #define _TMR2IF 0x02
260 #define _CCP1IF 0x04
261 #define _TXIF 0x10
262 #define _RCIF 0x20
263 #define _CMIF 0x40
264 #define _EEIF 0x80
265
266 //==============================================================================
267
268 extern __at(0x000E) __sfr TMR1;
269 extern __at(0x000E) __sfr TMR1L;
270 extern __at(0x000F) __sfr TMR1H;
271
272 //==============================================================================
273 // T1CON Bits
274
275 extern __at(0x0010) __sfr T1CON;
276
277 typedef union
278 {
279 struct
280 {
281 unsigned TMR1ON : 1;
282 unsigned TMR1CS : 1;
283 unsigned NOT_T1SYNC : 1;
284 unsigned T1OSCEN : 1;
285 unsigned T1CKPS0 : 1;
286 unsigned T1CKPS1 : 1;
287 unsigned : 1;
288 unsigned : 1;
289 };
290
291 struct
292 {
293 unsigned : 4;
294 unsigned T1CKPS : 2;
295 unsigned : 2;
296 };
297 } __T1CONbits_t;
298
299 extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
300
301 #define _TMR1ON 0x01
302 #define _TMR1CS 0x02
303 #define _NOT_T1SYNC 0x04
304 #define _T1OSCEN 0x08
305 #define _T1CKPS0 0x10
306 #define _T1CKPS1 0x20
307
308 //==============================================================================
309
310 extern __at(0x0011) __sfr TMR2;
311
312 //==============================================================================
313 // T2CON Bits
314
315 extern __at(0x0012) __sfr T2CON;
316
317 typedef union
318 {
319 struct
320 {
321 unsigned T2CKPS0 : 1;
322 unsigned T2CKPS1 : 1;
323 unsigned TMR2ON : 1;
324 unsigned TOUTPS0 : 1;
325 unsigned TOUTPS1 : 1;
326 unsigned TOUTPS2 : 1;
327 unsigned TOUTPS3 : 1;
328 unsigned : 1;
329 };
330
331 struct
332 {
333 unsigned T2CKPS : 2;
334 unsigned : 6;
335 };
336
337 struct
338 {
339 unsigned : 3;
340 unsigned TOUTPS : 4;
341 unsigned : 1;
342 };
343 } __T2CONbits_t;
344
345 extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
346
347 #define _T2CKPS0 0x01
348 #define _T2CKPS1 0x02
349 #define _TMR2ON 0x04
350 #define _TOUTPS0 0x08
351 #define _TOUTPS1 0x10
352 #define _TOUTPS2 0x20
353 #define _TOUTPS3 0x40
354
355 //==============================================================================
356
357 extern __at(0x0015) __sfr CCPR1;
358 extern __at(0x0015) __sfr CCPR1L;
359 extern __at(0x0016) __sfr CCPR1H;
360
361 //==============================================================================
362 // CCP1CON Bits
363
364 extern __at(0x0017) __sfr CCP1CON;
365
366 typedef union
367 {
368 struct
369 {
370 unsigned CCP1M0 : 1;
371 unsigned CCP1M1 : 1;
372 unsigned CCP1M2 : 1;
373 unsigned CCP1M3 : 1;
374 unsigned CCP1Y : 1;
375 unsigned CCP1X : 1;
376 unsigned : 1;
377 unsigned : 1;
378 };
379
380 struct
381 {
382 unsigned CCP1M : 4;
383 unsigned : 4;
384 };
385 } __CCP1CONbits_t;
386
387 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits;
388
389 #define _CCP1M0 0x01
390 #define _CCP1M1 0x02
391 #define _CCP1M2 0x04
392 #define _CCP1M3 0x08
393 #define _CCP1Y 0x10
394 #define _CCP1X 0x20
395
396 //==============================================================================
397
398
399 //==============================================================================
400 // RCSTA Bits
401
402 extern __at(0x0018) __sfr RCSTA;
403
404 typedef union
405 {
406 struct
407 {
408 unsigned RX9D : 1;
409 unsigned OERR : 1;
410 unsigned FERR : 1;
411 unsigned ADEN : 1;
412 unsigned CREN : 1;
413 unsigned SREN : 1;
414 unsigned RX9 : 1;
415 unsigned SPEN : 1;
416 };
417
418 struct
419 {
420 unsigned : 1;
421 unsigned : 1;
422 unsigned : 1;
423 unsigned ADDEN : 1;
424 unsigned : 1;
425 unsigned : 1;
426 unsigned : 1;
427 unsigned : 1;
428 };
429 } __RCSTAbits_t;
430
431 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits;
432
433 #define _RX9D 0x01
434 #define _OERR 0x02
435 #define _FERR 0x04
436 #define _ADEN 0x08
437 #define _ADDEN 0x08
438 #define _CREN 0x10
439 #define _SREN 0x20
440 #define _RX9 0x40
441 #define _SPEN 0x80
442
443 //==============================================================================
444
445 extern __at(0x0019) __sfr TXREG;
446 extern __at(0x001A) __sfr RCREG;
447
448 //==============================================================================
449 // CMCON Bits
450
451 extern __at(0x001F) __sfr CMCON;
452
453 typedef union
454 {
455 struct
456 {
457 unsigned CM0 : 1;
458 unsigned CM1 : 1;
459 unsigned CM2 : 1;
460 unsigned CIS : 1;
461 unsigned C1INV : 1;
462 unsigned C2INV : 1;
463 unsigned C1OUT : 1;
464 unsigned C2OUT : 1;
465 };
466
467 struct
468 {
469 unsigned CM : 3;
470 unsigned : 5;
471 };
472 } __CMCONbits_t;
473
474 extern __at(0x001F) volatile __CMCONbits_t CMCONbits;
475
476 #define _CM0 0x01
477 #define _CM1 0x02
478 #define _CM2 0x04
479 #define _CIS 0x08
480 #define _C1INV 0x10
481 #define _C2INV 0x20
482 #define _C1OUT 0x40
483 #define _C2OUT 0x80
484
485 //==============================================================================
486
487
488 //==============================================================================
489 // OPTION_REG Bits
490
491 extern __at(0x0081) __sfr OPTION_REG;
492
493 typedef union
494 {
495 struct
496 {
497 unsigned PS0 : 1;
498 unsigned PS1 : 1;
499 unsigned PS2 : 1;
500 unsigned PSA : 1;
501 unsigned T0SE : 1;
502 unsigned T0CS : 1;
503 unsigned INTEDG : 1;
504 unsigned NOT_RBPU : 1;
505 };
506
507 struct
508 {
509 unsigned PS : 3;
510 unsigned : 5;
511 };
512 } __OPTION_REGbits_t;
513
514 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
515
516 #define _PS0 0x01
517 #define _PS1 0x02
518 #define _PS2 0x04
519 #define _PSA 0x08
520 #define _T0SE 0x10
521 #define _T0CS 0x20
522 #define _INTEDG 0x40
523 #define _NOT_RBPU 0x80
524
525 //==============================================================================
526
527
528 //==============================================================================
529 // TRISA Bits
530
531 extern __at(0x0085) __sfr TRISA;
532
533 typedef struct
534 {
535 unsigned TRISA0 : 1;
536 unsigned TRISA1 : 1;
537 unsigned TRISA2 : 1;
538 unsigned TRISA3 : 1;
539 unsigned TRISA4 : 1;
540 unsigned TRISA5 : 1;
541 unsigned TRISA6 : 1;
542 unsigned TRISA7 : 1;
543 } __TRISAbits_t;
544
545 extern __at(0x0085) volatile __TRISAbits_t TRISAbits;
546
547 #define _TRISA0 0x01
548 #define _TRISA1 0x02
549 #define _TRISA2 0x04
550 #define _TRISA3 0x08
551 #define _TRISA4 0x10
552 #define _TRISA5 0x20
553 #define _TRISA6 0x40
554 #define _TRISA7 0x80
555
556 //==============================================================================
557
558
559 //==============================================================================
560 // TRISB Bits
561
562 extern __at(0x0086) __sfr TRISB;
563
564 typedef struct
565 {
566 unsigned TRISB0 : 1;
567 unsigned TRISB1 : 1;
568 unsigned TRISB2 : 1;
569 unsigned TRISB3 : 1;
570 unsigned TRISB4 : 1;
571 unsigned TRISB5 : 1;
572 unsigned TRISB6 : 1;
573 unsigned TRISB7 : 1;
574 } __TRISBbits_t;
575
576 extern __at(0x0086) volatile __TRISBbits_t TRISBbits;
577
578 #define _TRISB0 0x01
579 #define _TRISB1 0x02
580 #define _TRISB2 0x04
581 #define _TRISB3 0x08
582 #define _TRISB4 0x10
583 #define _TRISB5 0x20
584 #define _TRISB6 0x40
585 #define _TRISB7 0x80
586
587 //==============================================================================
588
589
590 //==============================================================================
591 // PIE1 Bits
592
593 extern __at(0x008C) __sfr PIE1;
594
595 typedef struct
596 {
597 unsigned TMR1IE : 1;
598 unsigned TMR2IE : 1;
599 unsigned CCP1IE : 1;
600 unsigned : 1;
601 unsigned TXIE : 1;
602 unsigned RCIE : 1;
603 unsigned CMIE : 1;
604 unsigned EEIE : 1;
605 } __PIE1bits_t;
606
607 extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
608
609 #define _TMR1IE 0x01
610 #define _TMR2IE 0x02
611 #define _CCP1IE 0x04
612 #define _TXIE 0x10
613 #define _RCIE 0x20
614 #define _CMIE 0x40
615 #define _EEIE 0x80
616
617 //==============================================================================
618
619
620 //==============================================================================
621 // PCON Bits
622
623 extern __at(0x008E) __sfr PCON;
624
625 typedef union
626 {
627 struct
628 {
629 unsigned NOT_BOR : 1;
630 unsigned NOT_POR : 1;
631 unsigned : 1;
632 unsigned OSCF : 1;
633 unsigned : 1;
634 unsigned : 1;
635 unsigned : 1;
636 unsigned : 1;
637 };
638
639 struct
640 {
641 unsigned NOT_BO : 1;
642 unsigned : 1;
643 unsigned : 1;
644 unsigned : 1;
645 unsigned : 1;
646 unsigned : 1;
647 unsigned : 1;
648 unsigned : 1;
649 };
650
651 struct
652 {
653 unsigned NOT_BOD : 1;
654 unsigned : 1;
655 unsigned : 1;
656 unsigned : 1;
657 unsigned : 1;
658 unsigned : 1;
659 unsigned : 1;
660 unsigned : 1;
661 };
662 } __PCONbits_t;
663
664 extern __at(0x008E) volatile __PCONbits_t PCONbits;
665
666 #define _NOT_BOR 0x01
667 #define _NOT_BO 0x01
668 #define _NOT_BOD 0x01
669 #define _NOT_POR 0x02
670 #define _OSCF 0x08
671
672 //==============================================================================
673
674 extern __at(0x0092) __sfr PR2;
675
676 //==============================================================================
677 // TXSTA Bits
678
679 extern __at(0x0098) __sfr TXSTA;
680
681 typedef struct
682 {
683 unsigned TX9D : 1;
684 unsigned TRMT : 1;
685 unsigned BRGH : 1;
686 unsigned : 1;
687 unsigned SYNC : 1;
688 unsigned TXEN : 1;
689 unsigned TX9 : 1;
690 unsigned CSRC : 1;
691 } __TXSTAbits_t;
692
693 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits;
694
695 #define _TX9D 0x01
696 #define _TRMT 0x02
697 #define _BRGH 0x04
698 #define _SYNC 0x10
699 #define _TXEN 0x20
700 #define _TX9 0x40
701 #define _CSRC 0x80
702
703 //==============================================================================
704
705 extern __at(0x0099) __sfr SPBRG;
706 extern __at(0x009A) __sfr EEDATA;
707 extern __at(0x009B) __sfr EEADR;
708
709 //==============================================================================
710 // EECON1 Bits
711
712 extern __at(0x009C) __sfr EECON1;
713
714 typedef struct
715 {
716 unsigned RD : 1;
717 unsigned WR : 1;
718 unsigned WREN : 1;
719 unsigned WRERR : 1;
720 unsigned : 1;
721 unsigned : 1;
722 unsigned : 1;
723 unsigned : 1;
724 } __EECON1bits_t;
725
726 extern __at(0x009C) volatile __EECON1bits_t EECON1bits;
727
728 #define _RD 0x01
729 #define _WR 0x02
730 #define _WREN 0x04
731 #define _WRERR 0x08
732
733 //==============================================================================
734
735 extern __at(0x009D) __sfr EECON2;
736
737 //==============================================================================
738 // VRCON Bits
739
740 extern __at(0x009F) __sfr VRCON;
741
742 typedef union
743 {
744 struct
745 {
746 unsigned VR0 : 1;
747 unsigned VR1 : 1;
748 unsigned VR2 : 1;
749 unsigned VR3 : 1;
750 unsigned : 1;
751 unsigned VRR : 1;
752 unsigned VROE : 1;
753 unsigned VREN : 1;
754 };
755
756 struct
757 {
758 unsigned VR : 4;
759 unsigned : 4;
760 };
761 } __VRCONbits_t;
762
763 extern __at(0x009F) volatile __VRCONbits_t VRCONbits;
764
765 #define _VR0 0x01
766 #define _VR1 0x02
767 #define _VR2 0x04
768 #define _VR3 0x08
769 #define _VRR 0x20
770 #define _VROE 0x40
771 #define _VREN 0x80
772
773 //==============================================================================
774
775
776 //==============================================================================
777 //
778 // Configuration Bits
779 //
780 //==============================================================================
781
782 #define _CONFIG 0x2007
783
784 //----------------------------- CONFIG Options -------------------------------
785
786 #define _FOSC_LP 0x3FEC // LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
787 #define _LP_OSC 0x3FEC // LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
788 #define _FOSC_XT 0x3FED // XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
789 #define _XT_OSC 0x3FED // XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
790 #define _FOSC_HS 0x3FEE // HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
791 #define _HS_OSC 0x3FEE // HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
792 #define _FOSC_ECIO 0x3FEF // EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN.
793 #define _EXTCLK_OSC 0x3FEF // EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN.
794 #define _FOSC_INTOSCIO 0x3FFC // INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
795 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
796 #define _FOSC_INTOSCCLK 0x3FFD // INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
797 #define _INTRC_OSC_CLKOUT 0x3FFD // INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
798 #define _FOSC_ERIO 0x3FFE // ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN.
799 #define _ER_OSC_NOCLKOUT 0x3FFE // ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN.
800 #define _FOSC_ERCLK 0x3FFF // ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN.
801 #define _ER_OSC_CLKOUT 0x3FFF // ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN.
802 #define _WDTE_OFF 0x3FFB // WDT disabled.
803 #define _WDT_OFF 0x3FFB // WDT disabled.
804 #define _WDTE_ON 0x3FFF // WDT enabled.
805 #define _WDT_ON 0x3FFF // WDT enabled.
806 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
807 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
808 #define _MCLRE_OFF 0x3FDF // RA5/MCLR pin function is digital input, MCLR internally tied to VDD.
809 #define _MCLRE_ON 0x3FFF // RA5/MCLR pin function is MCLR.
810 #define _BOREN_OFF 0x3FBF // BOD Reset disabled.
811 #define _BODEN_OFF 0x3FBF // BOD Reset disabled.
812 #define _BOREN_ON 0x3FFF // BOD Reset enabled.
813 #define _BODEN_ON 0x3FFF // BOD Reset enabled.
814 #define _LVP_OFF 0x3F7F // RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming.
815 #define _LVP_ON 0x3FFF // RB4/PGM pin has PGM function, low-voltage programming enabled.
816 #define _CPD_ON 0x3EFF // Data memory code protected.
817 #define DATA_CP_ON 0x3EFF // Data memory code protected.
818 #define _CPD_OFF 0x3FFF // Data memory code protection off.
819 #define DATA_CP_OFF 0x3FFF // Data memory code protection off.
820 #define _CP_ALL 0x03FF // 0000h-03FFh code protected.
821 #define _CP_75 0x17FF // 0200h-03FFh code protected.
822 #define _CP_50 0x2BFF // Program memory code protection off.
823 #define _CP_OFF 0x3FFF // Program memory code protection off.
824
825 //==============================================================================
826
827 #define _DEVID1 0x2006
828
829 #define _IDLOC0 0x2000
830 #define _IDLOC1 0x2001
831 #define _IDLOC2 0x2002
832 #define _IDLOC3 0x2003
833
834 //==============================================================================
835
836 #ifndef NO_BIT_DEFINES
837
838 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
839 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
840 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
841 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
842 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
843 #define CCP1X CCP1CONbits.CCP1X // bit 5
844
845 #define CM0 CMCONbits.CM0 // bit 0
846 #define CM1 CMCONbits.CM1 // bit 1
847 #define CM2 CMCONbits.CM2 // bit 2
848 #define CIS CMCONbits.CIS // bit 3
849 #define C1INV CMCONbits.C1INV // bit 4
850 #define C2INV CMCONbits.C2INV // bit 5
851 #define C1OUT CMCONbits.C1OUT // bit 6
852 #define C2OUT CMCONbits.C2OUT // bit 7
853
854 #define RD EECON1bits.RD // bit 0
855 #define WR EECON1bits.WR // bit 1
856 #define WREN EECON1bits.WREN // bit 2
857 #define WRERR EECON1bits.WRERR // bit 3
858
859 #define RBIF INTCONbits.RBIF // bit 0
860 #define INTF INTCONbits.INTF // bit 1
861 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
862 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
863 #define RBIE INTCONbits.RBIE // bit 3
864 #define INTE INTCONbits.INTE // bit 4
865 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
866 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
867 #define PEIE INTCONbits.PEIE // bit 6
868 #define GIE INTCONbits.GIE // bit 7
869
870 #define PS0 OPTION_REGbits.PS0 // bit 0
871 #define PS1 OPTION_REGbits.PS1 // bit 1
872 #define PS2 OPTION_REGbits.PS2 // bit 2
873 #define PSA OPTION_REGbits.PSA // bit 3
874 #define T0SE OPTION_REGbits.T0SE // bit 4
875 #define T0CS OPTION_REGbits.T0CS // bit 5
876 #define INTEDG OPTION_REGbits.INTEDG // bit 6
877 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
878
879 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
880 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
881 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits
882 #define NOT_POR PCONbits.NOT_POR // bit 1
883 #define OSCF PCONbits.OSCF // bit 3
884
885 #define TMR1IE PIE1bits.TMR1IE // bit 0
886 #define TMR2IE PIE1bits.TMR2IE // bit 1
887 #define CCP1IE PIE1bits.CCP1IE // bit 2
888 #define TXIE PIE1bits.TXIE // bit 4
889 #define RCIE PIE1bits.RCIE // bit 5
890 #define CMIE PIE1bits.CMIE // bit 6
891 #define EEIE PIE1bits.EEIE // bit 7
892
893 #define TMR1IF PIR1bits.TMR1IF // bit 0
894 #define TMR2IF PIR1bits.TMR2IF // bit 1
895 #define CCP1IF PIR1bits.CCP1IF // bit 2
896 #define TXIF PIR1bits.TXIF // bit 4
897 #define RCIF PIR1bits.RCIF // bit 5
898 #define CMIF PIR1bits.CMIF // bit 6
899 #define EEIF PIR1bits.EEIF // bit 7
900
901 #define RA0 PORTAbits.RA0 // bit 0
902 #define RA1 PORTAbits.RA1 // bit 1
903 #define RA2 PORTAbits.RA2 // bit 2
904 #define RA3 PORTAbits.RA3 // bit 3
905 #define RA4 PORTAbits.RA4 // bit 4
906 #define RA5 PORTAbits.RA5 // bit 5
907 #define RA6 PORTAbits.RA6 // bit 6
908 #define RA7 PORTAbits.RA7 // bit 7
909
910 #define RB0 PORTBbits.RB0 // bit 0
911 #define RB1 PORTBbits.RB1 // bit 1
912 #define RB2 PORTBbits.RB2 // bit 2
913 #define RB3 PORTBbits.RB3 // bit 3
914 #define RB4 PORTBbits.RB4 // bit 4
915 #define RB5 PORTBbits.RB5 // bit 5
916 #define RB6 PORTBbits.RB6 // bit 6
917 #define RB7 PORTBbits.RB7 // bit 7
918
919 #define RX9D RCSTAbits.RX9D // bit 0
920 #define OERR RCSTAbits.OERR // bit 1
921 #define FERR RCSTAbits.FERR // bit 2
922 #define ADEN RCSTAbits.ADEN // bit 3, shadows bit in RCSTAbits
923 #define ADDEN RCSTAbits.ADDEN // bit 3, shadows bit in RCSTAbits
924 #define CREN RCSTAbits.CREN // bit 4
925 #define SREN RCSTAbits.SREN // bit 5
926 #define RX9 RCSTAbits.RX9 // bit 6
927 #define SPEN RCSTAbits.SPEN // bit 7
928
929 #define C STATUSbits.C // bit 0
930 #define DC STATUSbits.DC // bit 1
931 #define Z STATUSbits.Z // bit 2
932 #define NOT_PD STATUSbits.NOT_PD // bit 3
933 #define NOT_TO STATUSbits.NOT_TO // bit 4
934 #define RP0 STATUSbits.RP0 // bit 5
935 #define RP1 STATUSbits.RP1 // bit 6
936 #define IRP STATUSbits.IRP // bit 7
937
938 #define TMR1ON T1CONbits.TMR1ON // bit 0
939 #define TMR1CS T1CONbits.TMR1CS // bit 1
940 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
941 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
942 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
943 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
944
945 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
946 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
947 #define TMR2ON T2CONbits.TMR2ON // bit 2
948 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
949 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
950 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
951 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
952
953 #define TRISA0 TRISAbits.TRISA0 // bit 0
954 #define TRISA1 TRISAbits.TRISA1 // bit 1
955 #define TRISA2 TRISAbits.TRISA2 // bit 2
956 #define TRISA3 TRISAbits.TRISA3 // bit 3
957 #define TRISA4 TRISAbits.TRISA4 // bit 4
958 #define TRISA5 TRISAbits.TRISA5 // bit 5
959 #define TRISA6 TRISAbits.TRISA6 // bit 6
960 #define TRISA7 TRISAbits.TRISA7 // bit 7
961
962 #define TRISB0 TRISBbits.TRISB0 // bit 0
963 #define TRISB1 TRISBbits.TRISB1 // bit 1
964 #define TRISB2 TRISBbits.TRISB2 // bit 2
965 #define TRISB3 TRISBbits.TRISB3 // bit 3
966 #define TRISB4 TRISBbits.TRISB4 // bit 4
967 #define TRISB5 TRISBbits.TRISB5 // bit 5
968 #define TRISB6 TRISBbits.TRISB6 // bit 6
969 #define TRISB7 TRISBbits.TRISB7 // bit 7
970
971 #define TX9D TXSTAbits.TX9D // bit 0
972 #define TRMT TXSTAbits.TRMT // bit 1
973 #define BRGH TXSTAbits.BRGH // bit 2
974 #define SYNC TXSTAbits.SYNC // bit 4
975 #define TXEN TXSTAbits.TXEN // bit 5
976 #define TX9 TXSTAbits.TX9 // bit 6
977 #define CSRC TXSTAbits.CSRC // bit 7
978
979 #define VR0 VRCONbits.VR0 // bit 0
980 #define VR1 VRCONbits.VR1 // bit 1
981 #define VR2 VRCONbits.VR2 // bit 2
982 #define VR3 VRCONbits.VR3 // bit 3
983 #define VRR VRCONbits.VRR // bit 5
984 #define VROE VRCONbits.VROE // bit 6
985 #define VREN VRCONbits.VREN // bit 7
986
987 #endif // #ifndef NO_BIT_DEFINES
988
989 #endif // #ifndef __PIC16LF627_H__
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