2 * This declarations of the PIC16LF871 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:59 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF871_H__
26 #define __PIC16LF871_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PORTD_ADDR 0x0008
45 #define PORTE_ADDR 0x0009
46 #define PCLATH_ADDR 0x000A
47 #define INTCON_ADDR 0x000B
48 #define PIR1_ADDR 0x000C
49 #define PIR2_ADDR 0x000D
50 #define TMR1_ADDR 0x000E
51 #define TMR1L_ADDR 0x000E
52 #define TMR1H_ADDR 0x000F
53 #define T1CON_ADDR 0x0010
54 #define TMR2_ADDR 0x0011
55 #define T2CON_ADDR 0x0012
56 #define CCPR1_ADDR 0x0015
57 #define CCPR1L_ADDR 0x0015
58 #define CCPR1H_ADDR 0x0016
59 #define CCP1CON_ADDR 0x0017
60 #define RCSTA_ADDR 0x0018
61 #define TXREG_ADDR 0x0019
62 #define RCREG_ADDR 0x001A
63 #define ADRESH_ADDR 0x001E
64 #define ADCON0_ADDR 0x001F
65 #define OPTION_REG_ADDR 0x0081
66 #define TRISA_ADDR 0x0085
67 #define TRISB_ADDR 0x0086
68 #define TRISC_ADDR 0x0087
69 #define TRISD_ADDR 0x0088
70 #define TRISE_ADDR 0x0089
71 #define PIE1_ADDR 0x008C
72 #define PIE2_ADDR 0x008D
73 #define PCON_ADDR 0x008E
74 #define PR2_ADDR 0x0092
75 #define TXSTA_ADDR 0x0098
76 #define SPBRG_ADDR 0x0099
77 #define ADRESL_ADDR 0x009E
78 #define ADCON1_ADDR 0x009F
79 #define EEDATA_ADDR 0x010C
80 #define EEADR_ADDR 0x010D
81 #define EEDATH_ADDR 0x010E
82 #define EEADRH_ADDR 0x010F
83 #define EECON1_ADDR 0x018C
84 #define EECON2_ADDR 0x018D
86 #endif // #ifndef NO_ADDR_DEFINES
88 //==============================================================================
90 // Register Definitions
92 //==============================================================================
94 extern __at(0x0000) __sfr INDF
;
95 extern __at(0x0001) __sfr TMR0
;
96 extern __at(0x0002) __sfr PCL
;
98 //==============================================================================
101 extern __at(0x0003) __sfr STATUS
;
125 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
136 //==============================================================================
138 extern __at(0x0004) __sfr FSR
;
140 //==============================================================================
143 extern __at(0x0005) __sfr PORTA
;
166 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
175 //==============================================================================
178 //==============================================================================
181 extern __at(0x0006) __sfr PORTB
;
195 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
206 //==============================================================================
209 //==============================================================================
212 extern __at(0x0007) __sfr PORTC
;
226 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
237 //==============================================================================
240 //==============================================================================
243 extern __at(0x0008) __sfr PORTD
;
257 extern __at(0x0008) volatile __PORTDbits_t PORTDbits
;
268 //==============================================================================
271 //==============================================================================
274 extern __at(0x0009) __sfr PORTE
;
297 extern __at(0x0009) volatile __PORTEbits_t PORTEbits
;
303 //==============================================================================
305 extern __at(0x000A) __sfr PCLATH
;
307 //==============================================================================
310 extern __at(0x000B) __sfr INTCON
;
339 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
352 //==============================================================================
355 //==============================================================================
358 extern __at(0x000C) __sfr PIR1
;
372 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
382 //==============================================================================
385 //==============================================================================
388 extern __at(0x000D) __sfr PIR2
;
402 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
406 //==============================================================================
408 extern __at(0x000E) __sfr TMR1
;
409 extern __at(0x000E) __sfr TMR1L
;
410 extern __at(0x000F) __sfr TMR1H
;
412 //==============================================================================
415 extern __at(0x0010) __sfr T1CON
;
423 unsigned NOT_T1SYNC
: 1;
424 unsigned T1OSCEN
: 1;
425 unsigned T1CKPS0
: 1;
426 unsigned T1CKPS1
: 1;
435 unsigned T1INSYNC
: 1;
463 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
467 #define _NOT_T1SYNC 0x04
468 #define _T1INSYNC 0x04
470 #define _T1OSCEN 0x08
471 #define _T1CKPS0 0x10
472 #define _T1CKPS1 0x20
474 //==============================================================================
476 extern __at(0x0011) __sfr TMR2
;
478 //==============================================================================
481 extern __at(0x0012) __sfr T2CON
;
487 unsigned T2CKPS0
: 1;
488 unsigned T2CKPS1
: 1;
490 unsigned TOUTPS0
: 1;
491 unsigned TOUTPS1
: 1;
492 unsigned TOUTPS2
: 1;
493 unsigned TOUTPS3
: 1;
511 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
513 #define _T2CKPS0 0x01
514 #define _T2CKPS1 0x02
516 #define _TOUTPS0 0x08
517 #define _TOUTPS1 0x10
518 #define _TOUTPS2 0x20
519 #define _TOUTPS3 0x40
521 //==============================================================================
523 extern __at(0x0015) __sfr CCPR1
;
524 extern __at(0x0015) __sfr CCPR1L
;
525 extern __at(0x0016) __sfr CCPR1H
;
527 //==============================================================================
530 extern __at(0x0017) __sfr CCP1CON
;
553 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
562 //==============================================================================
565 //==============================================================================
568 extern __at(0x0018) __sfr RCSTA
;
604 unsigned NOT_RC8
: 1;
621 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
632 #define _NOT_RC8 0x40
636 //==============================================================================
638 extern __at(0x0019) __sfr TXREG
;
639 extern __at(0x001A) __sfr RCREG
;
640 extern __at(0x001E) __sfr ADRESH
;
642 //==============================================================================
645 extern __at(0x001F) __sfr ADCON0
;
653 unsigned GO_NOT_DONE
: 1;
677 unsigned NOT_DONE
: 1;
689 unsigned GO_DONE
: 1;
711 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
714 #define _GO_NOT_DONE 0x04
716 #define _NOT_DONE 0x04
717 #define _GO_DONE 0x04
724 //==============================================================================
727 //==============================================================================
730 extern __at(0x0081) __sfr OPTION_REG
;
743 unsigned NOT_RBPU
: 1;
751 } __OPTION_REGbits_t
;
753 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
762 #define _NOT_RBPU 0x80
764 //==============================================================================
767 //==============================================================================
770 extern __at(0x0085) __sfr TRISA
;
793 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
802 //==============================================================================
805 //==============================================================================
808 extern __at(0x0086) __sfr TRISB
;
822 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
833 //==============================================================================
836 //==============================================================================
839 extern __at(0x0087) __sfr TRISC
;
853 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
864 //==============================================================================
867 //==============================================================================
870 extern __at(0x0088) __sfr TRISD
;
884 extern __at(0x0088) volatile __TRISDbits_t TRISDbits
;
895 //==============================================================================
898 //==============================================================================
901 extern __at(0x0089) __sfr TRISE
;
911 unsigned PSPMODE
: 1;
924 extern __at(0x0089) volatile __TRISEbits_t TRISEbits
;
929 #define _PSPMODE 0x10
934 //==============================================================================
937 //==============================================================================
940 extern __at(0x008C) __sfr PIE1
;
954 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
964 //==============================================================================
967 //==============================================================================
970 extern __at(0x008D) __sfr PIE2
;
984 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
988 //==============================================================================
991 //==============================================================================
994 extern __at(0x008E) __sfr PCON
;
1000 unsigned NOT_BOR
: 1;
1001 unsigned NOT_POR
: 1;
1012 unsigned NOT_BO
: 1;
1023 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
1025 #define _NOT_BOR 0x01
1026 #define _NOT_BO 0x01
1027 #define _NOT_POR 0x02
1029 //==============================================================================
1031 extern __at(0x0092) __sfr PR2
;
1033 //==============================================================================
1036 extern __at(0x0098) __sfr TXSTA
;
1060 unsigned NOT_TX8
: 1;
1077 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
1086 #define _NOT_TX8 0x40
1090 //==============================================================================
1092 extern __at(0x0099) __sfr SPBRG
;
1093 extern __at(0x009E) __sfr ADRESL
;
1095 //==============================================================================
1098 extern __at(0x009F) __sfr ADCON1
;
1121 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1129 //==============================================================================
1131 extern __at(0x010C) __sfr EEDATA
;
1132 extern __at(0x010D) __sfr EEADR
;
1133 extern __at(0x010E) __sfr EEDATH
;
1134 extern __at(0x010F) __sfr EEADRH
;
1136 //==============================================================================
1139 extern __at(0x018C) __sfr EECON1
;
1153 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
1161 //==============================================================================
1163 extern __at(0x018D) __sfr EECON2
;
1165 //==============================================================================
1167 // Configuration Bits
1169 //==============================================================================
1171 #define _CONFIG 0x2007
1173 //----------------------------- CONFIG Options -------------------------------
1175 #define _FOSC_LP 0x3FFC // LP oscillator.
1176 #define _LP_OSC 0x3FFC // LP oscillator.
1177 #define _FOSC_XT 0x3FFD // XT oscillator.
1178 #define _XT_OSC 0x3FFD // XT oscillator.
1179 #define _FOSC_HS 0x3FFE // HS oscillator.
1180 #define _HS_OSC 0x3FFE // HS oscillator.
1181 #define _FOSC_EXTRC 0x3FFF // RC oscillator.
1182 #define _RC_OSC 0x3FFF // RC oscillator.
1183 #define _WDTE_OFF 0x3FFB // WDT disabled.
1184 #define _WDT_OFF 0x3FFB // WDT disabled.
1185 #define _WDTE_ON 0x3FFF // WDT enabled.
1186 #define _WDT_ON 0x3FFF // WDT enabled.
1187 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1188 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1189 #define _CP_ON 0x0FCF // All memory code protected.
1190 #define _CP_ALL 0x0FCF // All memory code protected.
1191 #define _CP_OFF 0x3FFF // Code protection off.
1192 #define _BOREN_OFF 0x3FBF // BOR disabled.
1193 #define _BODEN_OFF 0x3FBF // BOR disabled.
1194 #define _BOREN_ON 0x3FFF // BOR enabled.
1195 #define _BODEN_ON 0x3FFF // BOR enabled.
1196 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming.
1197 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function; low-voltage programming enabled.
1198 #define _CPD_ON 0x3EFF // Data EEPROM memory code-protected.
1199 #define _CPD_OFF 0x3FFF // Code Protection off.
1200 #define _WRT_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1201 #define _WRT_ENABLE_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1202 #define _WRT_ALL 0x3FFF // Unprotected program memory may be written to by EECON control.
1203 #define _WRT_ENABLE_ON 0x3FFF // Unprotected program memory may be written to by EECON control.
1204 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
1205 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
1207 //==============================================================================
1209 #define _DEVID1 0x2006
1211 #define _IDLOC0 0x2000
1212 #define _IDLOC1 0x2001
1213 #define _IDLOC2 0x2002
1214 #define _IDLOC3 0x2003
1216 //==============================================================================
1218 #ifndef NO_BIT_DEFINES
1220 #define ADON ADCON0bits.ADON // bit 0
1221 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
1222 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
1223 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
1224 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
1225 #define CHS0 ADCON0bits.CHS0 // bit 3
1226 #define CHS1 ADCON0bits.CHS1 // bit 4
1227 #define CHS2 ADCON0bits.CHS2 // bit 5
1228 #define ADCS0 ADCON0bits.ADCS0 // bit 6
1229 #define ADCS1 ADCON0bits.ADCS1 // bit 7
1231 #define PCFG0 ADCON1bits.PCFG0 // bit 0
1232 #define PCFG1 ADCON1bits.PCFG1 // bit 1
1233 #define PCFG2 ADCON1bits.PCFG2 // bit 2
1234 #define PCFG3 ADCON1bits.PCFG3 // bit 3
1235 #define ADFM ADCON1bits.ADFM // bit 7
1237 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1238 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1239 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1240 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1241 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
1242 #define CCP1X CCP1CONbits.CCP1X // bit 5
1244 #define RD EECON1bits.RD // bit 0
1245 #define WR EECON1bits.WR // bit 1
1246 #define WREN EECON1bits.WREN // bit 2
1247 #define WRERR EECON1bits.WRERR // bit 3
1248 #define EEPGD EECON1bits.EEPGD // bit 7
1250 #define RBIF INTCONbits.RBIF // bit 0
1251 #define INTF INTCONbits.INTF // bit 1
1252 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1253 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1254 #define RBIE INTCONbits.RBIE // bit 3
1255 #define INTE INTCONbits.INTE // bit 4
1256 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1257 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1258 #define PEIE INTCONbits.PEIE // bit 6
1259 #define GIE INTCONbits.GIE // bit 7
1261 #define PS0 OPTION_REGbits.PS0 // bit 0
1262 #define PS1 OPTION_REGbits.PS1 // bit 1
1263 #define PS2 OPTION_REGbits.PS2 // bit 2
1264 #define PSA OPTION_REGbits.PSA // bit 3
1265 #define T0SE OPTION_REGbits.T0SE // bit 4
1266 #define T0CS OPTION_REGbits.T0CS // bit 5
1267 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1268 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
1270 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1271 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
1272 #define NOT_POR PCONbits.NOT_POR // bit 1
1274 #define TMR1IE PIE1bits.TMR1IE // bit 0
1275 #define TMR2IE PIE1bits.TMR2IE // bit 1
1276 #define CCP1IE PIE1bits.CCP1IE // bit 2
1277 #define TXIE PIE1bits.TXIE // bit 4
1278 #define RCIE PIE1bits.RCIE // bit 5
1279 #define ADIE PIE1bits.ADIE // bit 6
1280 #define PSPIE PIE1bits.PSPIE // bit 7
1282 #define EEIE PIE2bits.EEIE // bit 4
1284 #define TMR1IF PIR1bits.TMR1IF // bit 0
1285 #define TMR2IF PIR1bits.TMR2IF // bit 1
1286 #define CCP1IF PIR1bits.CCP1IF // bit 2
1287 #define TXIF PIR1bits.TXIF // bit 4
1288 #define RCIF PIR1bits.RCIF // bit 5
1289 #define ADIF PIR1bits.ADIF // bit 6
1290 #define PSPIF PIR1bits.PSPIF // bit 7
1292 #define EEIF PIR2bits.EEIF // bit 4
1294 #define RA0 PORTAbits.RA0 // bit 0
1295 #define RA1 PORTAbits.RA1 // bit 1
1296 #define RA2 PORTAbits.RA2 // bit 2
1297 #define RA3 PORTAbits.RA3 // bit 3
1298 #define RA4 PORTAbits.RA4 // bit 4
1299 #define RA5 PORTAbits.RA5 // bit 5
1301 #define RB0 PORTBbits.RB0 // bit 0
1302 #define RB1 PORTBbits.RB1 // bit 1
1303 #define RB2 PORTBbits.RB2 // bit 2
1304 #define RB3 PORTBbits.RB3 // bit 3
1305 #define RB4 PORTBbits.RB4 // bit 4
1306 #define RB5 PORTBbits.RB5 // bit 5
1307 #define RB6 PORTBbits.RB6 // bit 6
1308 #define RB7 PORTBbits.RB7 // bit 7
1310 #define RC0 PORTCbits.RC0 // bit 0
1311 #define RC1 PORTCbits.RC1 // bit 1
1312 #define RC2 PORTCbits.RC2 // bit 2
1313 #define RC3 PORTCbits.RC3 // bit 3
1314 #define RC4 PORTCbits.RC4 // bit 4
1315 #define RC5 PORTCbits.RC5 // bit 5
1316 #define RC6 PORTCbits.RC6 // bit 6
1317 #define RC7 PORTCbits.RC7 // bit 7
1319 #define RD0 PORTDbits.RD0 // bit 0
1320 #define RD1 PORTDbits.RD1 // bit 1
1321 #define RD2 PORTDbits.RD2 // bit 2
1322 #define RD3 PORTDbits.RD3 // bit 3
1323 #define RD4 PORTDbits.RD4 // bit 4
1324 #define RD5 PORTDbits.RD5 // bit 5
1325 #define RD6 PORTDbits.RD6 // bit 6
1326 #define RD7 PORTDbits.RD7 // bit 7
1328 #define RE0 PORTEbits.RE0 // bit 0
1329 #define RE1 PORTEbits.RE1 // bit 1
1330 #define RE2 PORTEbits.RE2 // bit 2
1332 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
1333 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
1334 #define OERR RCSTAbits.OERR // bit 1
1335 #define FERR RCSTAbits.FERR // bit 2
1336 #define ADDEN RCSTAbits.ADDEN // bit 3
1337 #define CREN RCSTAbits.CREN // bit 4
1338 #define SREN RCSTAbits.SREN // bit 5
1339 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
1340 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
1341 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
1342 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
1343 #define SPEN RCSTAbits.SPEN // bit 7
1345 #define C STATUSbits.C // bit 0
1346 #define DC STATUSbits.DC // bit 1
1347 #define Z STATUSbits.Z // bit 2
1348 #define NOT_PD STATUSbits.NOT_PD // bit 3
1349 #define NOT_TO STATUSbits.NOT_TO // bit 4
1350 #define RP0 STATUSbits.RP0 // bit 5
1351 #define RP1 STATUSbits.RP1 // bit 6
1352 #define IRP STATUSbits.IRP // bit 7
1354 #define TMR1ON T1CONbits.TMR1ON // bit 0
1355 #define TMR1CS T1CONbits.TMR1CS // bit 1
1356 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1357 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
1358 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
1359 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1360 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1361 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1363 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1364 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1365 #define TMR2ON T2CONbits.TMR2ON // bit 2
1366 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1367 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1368 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1369 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1371 #define TRISA0 TRISAbits.TRISA0 // bit 0
1372 #define TRISA1 TRISAbits.TRISA1 // bit 1
1373 #define TRISA2 TRISAbits.TRISA2 // bit 2
1374 #define TRISA3 TRISAbits.TRISA3 // bit 3
1375 #define TRISA4 TRISAbits.TRISA4 // bit 4
1376 #define TRISA5 TRISAbits.TRISA5 // bit 5
1378 #define TRISB0 TRISBbits.TRISB0 // bit 0
1379 #define TRISB1 TRISBbits.TRISB1 // bit 1
1380 #define TRISB2 TRISBbits.TRISB2 // bit 2
1381 #define TRISB3 TRISBbits.TRISB3 // bit 3
1382 #define TRISB4 TRISBbits.TRISB4 // bit 4
1383 #define TRISB5 TRISBbits.TRISB5 // bit 5
1384 #define TRISB6 TRISBbits.TRISB6 // bit 6
1385 #define TRISB7 TRISBbits.TRISB7 // bit 7
1387 #define TRISC0 TRISCbits.TRISC0 // bit 0
1388 #define TRISC1 TRISCbits.TRISC1 // bit 1
1389 #define TRISC2 TRISCbits.TRISC2 // bit 2
1390 #define TRISC3 TRISCbits.TRISC3 // bit 3
1391 #define TRISC4 TRISCbits.TRISC4 // bit 4
1392 #define TRISC5 TRISCbits.TRISC5 // bit 5
1393 #define TRISC6 TRISCbits.TRISC6 // bit 6
1394 #define TRISC7 TRISCbits.TRISC7 // bit 7
1396 #define TRISD0 TRISDbits.TRISD0 // bit 0
1397 #define TRISD1 TRISDbits.TRISD1 // bit 1
1398 #define TRISD2 TRISDbits.TRISD2 // bit 2
1399 #define TRISD3 TRISDbits.TRISD3 // bit 3
1400 #define TRISD4 TRISDbits.TRISD4 // bit 4
1401 #define TRISD5 TRISDbits.TRISD5 // bit 5
1402 #define TRISD6 TRISDbits.TRISD6 // bit 6
1403 #define TRISD7 TRISDbits.TRISD7 // bit 7
1405 #define TRISE0 TRISEbits.TRISE0 // bit 0
1406 #define TRISE1 TRISEbits.TRISE1 // bit 1
1407 #define TRISE2 TRISEbits.TRISE2 // bit 2
1408 #define PSPMODE TRISEbits.PSPMODE // bit 4
1409 #define IBOV TRISEbits.IBOV // bit 5
1410 #define OBF TRISEbits.OBF // bit 6
1411 #define IBF TRISEbits.IBF // bit 7
1413 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
1414 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
1415 #define TRMT TXSTAbits.TRMT // bit 1
1416 #define BRGH TXSTAbits.BRGH // bit 2
1417 #define SYNC TXSTAbits.SYNC // bit 4
1418 #define TXEN TXSTAbits.TXEN // bit 5
1419 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
1420 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
1421 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
1422 #define CSRC TXSTAbits.CSRC // bit 7
1424 #endif // #ifndef NO_BIT_DEFINES
1426 #endif // #ifndef __PIC16LF871_H__