2 * This declarations of the PIC16LF874 MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:00 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF874_H__
26 #define __PIC16LF874_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PORTD_ADDR 0x0008
45 #define PORTE_ADDR 0x0009
46 #define PCLATH_ADDR 0x000A
47 #define INTCON_ADDR 0x000B
48 #define PIR1_ADDR 0x000C
49 #define PIR2_ADDR 0x000D
50 #define TMR1_ADDR 0x000E
51 #define TMR1L_ADDR 0x000E
52 #define TMR1H_ADDR 0x000F
53 #define T1CON_ADDR 0x0010
54 #define TMR2_ADDR 0x0011
55 #define T2CON_ADDR 0x0012
56 #define SSPBUF_ADDR 0x0013
57 #define SSPCON_ADDR 0x0014
58 #define CCPR1_ADDR 0x0015
59 #define CCPR1L_ADDR 0x0015
60 #define CCPR1H_ADDR 0x0016
61 #define CCP1CON_ADDR 0x0017
62 #define RCSTA_ADDR 0x0018
63 #define TXREG_ADDR 0x0019
64 #define RCREG_ADDR 0x001A
65 #define CCPR2_ADDR 0x001B
66 #define CCPR2L_ADDR 0x001B
67 #define CCPR2H_ADDR 0x001C
68 #define CCP2CON_ADDR 0x001D
69 #define ADRESH_ADDR 0x001E
70 #define ADCON0_ADDR 0x001F
71 #define OPTION_REG_ADDR 0x0081
72 #define TRISA_ADDR 0x0085
73 #define TRISB_ADDR 0x0086
74 #define TRISC_ADDR 0x0087
75 #define TRISD_ADDR 0x0088
76 #define TRISE_ADDR 0x0089
77 #define PIE1_ADDR 0x008C
78 #define PIE2_ADDR 0x008D
79 #define PCON_ADDR 0x008E
80 #define SSPCON2_ADDR 0x0091
81 #define PR2_ADDR 0x0092
82 #define SSPADD_ADDR 0x0093
83 #define SSPSTAT_ADDR 0x0094
84 #define TXSTA_ADDR 0x0098
85 #define SPBRG_ADDR 0x0099
86 #define ADRESL_ADDR 0x009E
87 #define ADCON1_ADDR 0x009F
88 #define EEDATA_ADDR 0x010C
89 #define EEADR_ADDR 0x010D
90 #define EEDATH_ADDR 0x010E
91 #define EEADRH_ADDR 0x010F
92 #define EECON1_ADDR 0x018C
93 #define EECON2_ADDR 0x018D
95 #endif // #ifndef NO_ADDR_DEFINES
97 //==============================================================================
99 // Register Definitions
101 //==============================================================================
103 extern __at(0x0000) __sfr INDF
;
104 extern __at(0x0001) __sfr TMR0
;
105 extern __at(0x0002) __sfr PCL
;
107 //==============================================================================
110 extern __at(0x0003) __sfr STATUS
;
134 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
145 //==============================================================================
147 extern __at(0x0004) __sfr FSR
;
149 //==============================================================================
152 extern __at(0x0005) __sfr PORTA
;
175 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
184 //==============================================================================
187 //==============================================================================
190 extern __at(0x0006) __sfr PORTB
;
204 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
215 //==============================================================================
218 //==============================================================================
221 extern __at(0x0007) __sfr PORTC
;
235 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
246 //==============================================================================
249 //==============================================================================
252 extern __at(0x0008) __sfr PORTD
;
266 extern __at(0x0008) volatile __PORTDbits_t PORTDbits
;
277 //==============================================================================
280 //==============================================================================
283 extern __at(0x0009) __sfr PORTE
;
306 extern __at(0x0009) volatile __PORTEbits_t PORTEbits
;
312 //==============================================================================
314 extern __at(0x000A) __sfr PCLATH
;
316 //==============================================================================
319 extern __at(0x000B) __sfr INTCON
;
348 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
361 //==============================================================================
364 //==============================================================================
367 extern __at(0x000C) __sfr PIR1
;
381 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
392 //==============================================================================
395 //==============================================================================
398 extern __at(0x000D) __sfr PIR2
;
412 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
418 //==============================================================================
420 extern __at(0x000E) __sfr TMR1
;
421 extern __at(0x000E) __sfr TMR1L
;
422 extern __at(0x000F) __sfr TMR1H
;
424 //==============================================================================
427 extern __at(0x0010) __sfr T1CON
;
435 unsigned NOT_T1SYNC
: 1;
436 unsigned T1OSCEN
: 1;
437 unsigned T1CKPS0
: 1;
438 unsigned T1CKPS1
: 1;
447 unsigned T1INSYNC
: 1;
475 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
479 #define _NOT_T1SYNC 0x04
480 #define _T1INSYNC 0x04
482 #define _T1OSCEN 0x08
483 #define _T1CKPS0 0x10
484 #define _T1CKPS1 0x20
486 //==============================================================================
488 extern __at(0x0011) __sfr TMR2
;
490 //==============================================================================
493 extern __at(0x0012) __sfr T2CON
;
499 unsigned T2CKPS0
: 1;
500 unsigned T2CKPS1
: 1;
502 unsigned TOUTPS0
: 1;
503 unsigned TOUTPS1
: 1;
504 unsigned TOUTPS2
: 1;
505 unsigned TOUTPS3
: 1;
523 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
525 #define _T2CKPS0 0x01
526 #define _T2CKPS1 0x02
528 #define _TOUTPS0 0x08
529 #define _TOUTPS1 0x10
530 #define _TOUTPS2 0x20
531 #define _TOUTPS3 0x40
533 //==============================================================================
535 extern __at(0x0013) __sfr SSPBUF
;
537 //==============================================================================
540 extern __at(0x0014) __sfr SSPCON
;
563 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
574 //==============================================================================
576 extern __at(0x0015) __sfr CCPR1
;
577 extern __at(0x0015) __sfr CCPR1L
;
578 extern __at(0x0016) __sfr CCPR1H
;
580 //==============================================================================
583 extern __at(0x0017) __sfr CCP1CON
;
606 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
615 //==============================================================================
618 //==============================================================================
621 extern __at(0x0018) __sfr RCSTA
;
657 unsigned NOT_RC8
: 1;
674 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
685 #define _NOT_RC8 0x40
689 //==============================================================================
691 extern __at(0x0019) __sfr TXREG
;
692 extern __at(0x001A) __sfr RCREG
;
693 extern __at(0x001B) __sfr CCPR2
;
694 extern __at(0x001B) __sfr CCPR2L
;
695 extern __at(0x001C) __sfr CCPR2H
;
697 //==============================================================================
700 extern __at(0x001D) __sfr CCP2CON
;
723 extern __at(0x001D) volatile __CCP2CONbits_t CCP2CONbits
;
732 //==============================================================================
734 extern __at(0x001E) __sfr ADRESH
;
736 //==============================================================================
739 extern __at(0x001F) __sfr ADCON0
;
747 unsigned GO_NOT_DONE
: 1;
771 unsigned NOT_DONE
: 1;
783 unsigned GO_DONE
: 1;
805 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
808 #define _GO_NOT_DONE 0x04
810 #define _NOT_DONE 0x04
811 #define _GO_DONE 0x04
818 //==============================================================================
821 //==============================================================================
824 extern __at(0x0081) __sfr OPTION_REG
;
837 unsigned NOT_RBPU
: 1;
845 } __OPTION_REGbits_t
;
847 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
856 #define _NOT_RBPU 0x80
858 //==============================================================================
861 //==============================================================================
864 extern __at(0x0085) __sfr TRISA
;
887 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
896 //==============================================================================
899 //==============================================================================
902 extern __at(0x0086) __sfr TRISB
;
916 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
927 //==============================================================================
930 //==============================================================================
933 extern __at(0x0087) __sfr TRISC
;
947 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
958 //==============================================================================
961 //==============================================================================
964 extern __at(0x0088) __sfr TRISD
;
978 extern __at(0x0088) volatile __TRISDbits_t TRISDbits
;
989 //==============================================================================
992 //==============================================================================
995 extern __at(0x0089) __sfr TRISE
;
1001 unsigned TRISE0
: 1;
1002 unsigned TRISE1
: 1;
1003 unsigned TRISE2
: 1;
1005 unsigned PSPMODE
: 1;
1018 extern __at(0x0089) volatile __TRISEbits_t TRISEbits
;
1020 #define _TRISE0 0x01
1021 #define _TRISE1 0x02
1022 #define _TRISE2 0x04
1023 #define _PSPMODE 0x10
1028 //==============================================================================
1031 //==============================================================================
1034 extern __at(0x008C) __sfr PIE1
;
1038 unsigned TMR1IE
: 1;
1039 unsigned TMR2IE
: 1;
1040 unsigned CCP1IE
: 1;
1048 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
1050 #define _TMR1IE 0x01
1051 #define _TMR2IE 0x02
1052 #define _CCP1IE 0x04
1059 //==============================================================================
1062 //==============================================================================
1065 extern __at(0x008D) __sfr PIE2
;
1069 unsigned CCP2IE
: 1;
1079 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
1081 #define _CCP2IE 0x01
1085 //==============================================================================
1088 //==============================================================================
1091 extern __at(0x008E) __sfr PCON
;
1097 unsigned NOT_BOR
: 1;
1098 unsigned NOT_POR
: 1;
1109 unsigned NOT_BO
: 1;
1120 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
1122 #define _NOT_BOR 0x01
1123 #define _NOT_BO 0x01
1124 #define _NOT_POR 0x02
1126 //==============================================================================
1129 //==============================================================================
1132 extern __at(0x0091) __sfr SSPCON2
;
1142 unsigned ACKSTAT
: 1;
1146 extern __at(0x0091) volatile __SSPCON2bits_t SSPCON2bits
;
1154 #define _ACKSTAT 0x40
1157 //==============================================================================
1159 extern __at(0x0092) __sfr PR2
;
1160 extern __at(0x0093) __sfr SSPADD
;
1162 //==============================================================================
1165 extern __at(0x0094) __sfr SSPSTAT
;
1173 unsigned R_NOT_W
: 1;
1176 unsigned D_NOT_A
: 1;
1186 unsigned I2C_START
: 1;
1187 unsigned I2C_STOP
: 1;
1197 unsigned I2C_READ
: 1;
1200 unsigned I2C_DATA
: 1;
1221 unsigned NOT_WRITE
: 1;
1224 unsigned NOT_ADDRESS
: 1;
1245 unsigned READ_WRITE
: 1;
1248 unsigned DATA_ADDRESS
: 1;
1254 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
1258 #define _R_NOT_W 0x04
1260 #define _I2C_READ 0x04
1262 #define _NOT_WRITE 0x04
1264 #define _READ_WRITE 0x04
1266 #define _I2C_START 0x08
1268 #define _I2C_STOP 0x10
1269 #define _D_NOT_A 0x20
1271 #define _I2C_DATA 0x20
1273 #define _NOT_ADDRESS 0x20
1275 #define _DATA_ADDRESS 0x20
1279 //==============================================================================
1282 //==============================================================================
1285 extern __at(0x0098) __sfr TXSTA
;
1309 unsigned NOT_TX8
: 1;
1326 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
1335 #define _NOT_TX8 0x40
1339 //==============================================================================
1341 extern __at(0x0099) __sfr SPBRG
;
1342 extern __at(0x009E) __sfr ADRESL
;
1344 //==============================================================================
1347 extern __at(0x009F) __sfr ADCON1
;
1370 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1378 //==============================================================================
1380 extern __at(0x010C) __sfr EEDATA
;
1381 extern __at(0x010D) __sfr EEADR
;
1382 extern __at(0x010E) __sfr EEDATH
;
1383 extern __at(0x010F) __sfr EEADRH
;
1385 //==============================================================================
1388 extern __at(0x018C) __sfr EECON1
;
1402 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
1410 //==============================================================================
1412 extern __at(0x018D) __sfr EECON2
;
1414 //==============================================================================
1416 // Configuration Bits
1418 //==============================================================================
1420 #define _CONFIG 0x2007
1422 //----------------------------- CONFIG Options -------------------------------
1424 #define _FOSC_LP 0x3FFC // LP oscillator.
1425 #define _LP_OSC 0x3FFC // LP oscillator.
1426 #define _FOSC_XT 0x3FFD // XT oscillator.
1427 #define _XT_OSC 0x3FFD // XT oscillator.
1428 #define _FOSC_HS 0x3FFE // HS oscillator.
1429 #define _HS_OSC 0x3FFE // HS oscillator.
1430 #define _FOSC_EXTRC 0x3FFF // RC oscillator.
1431 #define _RC_OSC 0x3FFF // RC oscillator.
1432 #define _WDTE_OFF 0x3FFB // WDT disabled.
1433 #define _WDT_OFF 0x3FFB // WDT disabled.
1434 #define _WDTE_ON 0x3FFF // WDT enabled.
1435 #define _WDT_ON 0x3FFF // WDT enabled.
1436 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1437 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1438 #define _CP_ALL 0x0FCF // 0000h to 0FFFh code protected.
1439 #define _CP_HALF 0x1FDF // 0800h to 0FFFh code protected.
1440 #define _CP_UPPER_256 0x2FEF // 0F00h to 0FFFh code protected.
1441 #define _CP_OFF 0x3FFF // Code protection off.
1442 #define _BOREN_OFF 0x3FBF // BOR disabled.
1443 #define _BODEN_OFF 0x3FBF // BOR disabled.
1444 #define _BOREN_ON 0x3FFF // BOR enabled.
1445 #define _BODEN_ON 0x3FFF // BOR enabled.
1446 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming.
1447 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function; low-voltage programming enabled.
1448 #define _CPD_ON 0x3EFF // Data EEPROM memory code-protected.
1449 #define _CPD_OFF 0x3FFF // Code Protection off.
1450 #define _WRT_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1451 #define _WRT_ENABLE_OFF 0x3DFF // Unprotected program memory may not be written to by EECON control.
1452 #define _WRT_ON 0x3FFF // Unprotected program memory may be written to by EECON control.
1453 #define _WRT_ENABLE_ON 0x3FFF // Unprotected program memory may be written to by EECON control.
1454 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
1455 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
1457 //==============================================================================
1459 #define _DEVID1 0x2006
1461 #define _IDLOC0 0x2000
1462 #define _IDLOC1 0x2001
1463 #define _IDLOC2 0x2002
1464 #define _IDLOC3 0x2003
1466 //==============================================================================
1468 #ifndef NO_BIT_DEFINES
1470 #define ADON ADCON0bits.ADON // bit 0
1471 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
1472 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
1473 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
1474 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
1475 #define CHS0 ADCON0bits.CHS0 // bit 3
1476 #define CHS1 ADCON0bits.CHS1 // bit 4
1477 #define CHS2 ADCON0bits.CHS2 // bit 5
1478 #define ADCS0 ADCON0bits.ADCS0 // bit 6
1479 #define ADCS1 ADCON0bits.ADCS1 // bit 7
1481 #define PCFG0 ADCON1bits.PCFG0 // bit 0
1482 #define PCFG1 ADCON1bits.PCFG1 // bit 1
1483 #define PCFG2 ADCON1bits.PCFG2 // bit 2
1484 #define PCFG3 ADCON1bits.PCFG3 // bit 3
1485 #define ADFM ADCON1bits.ADFM // bit 7
1487 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1488 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1489 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1490 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1491 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
1492 #define CCP1X CCP1CONbits.CCP1X // bit 5
1494 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
1495 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
1496 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
1497 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
1498 #define CCP2Y CCP2CONbits.CCP2Y // bit 4
1499 #define CCP2X CCP2CONbits.CCP2X // bit 5
1501 #define RD EECON1bits.RD // bit 0
1502 #define WR EECON1bits.WR // bit 1
1503 #define WREN EECON1bits.WREN // bit 2
1504 #define WRERR EECON1bits.WRERR // bit 3
1505 #define EEPGD EECON1bits.EEPGD // bit 7
1507 #define RBIF INTCONbits.RBIF // bit 0
1508 #define INTF INTCONbits.INTF // bit 1
1509 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1510 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1511 #define RBIE INTCONbits.RBIE // bit 3
1512 #define INTE INTCONbits.INTE // bit 4
1513 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1514 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1515 #define PEIE INTCONbits.PEIE // bit 6
1516 #define GIE INTCONbits.GIE // bit 7
1518 #define PS0 OPTION_REGbits.PS0 // bit 0
1519 #define PS1 OPTION_REGbits.PS1 // bit 1
1520 #define PS2 OPTION_REGbits.PS2 // bit 2
1521 #define PSA OPTION_REGbits.PSA // bit 3
1522 #define T0SE OPTION_REGbits.T0SE // bit 4
1523 #define T0CS OPTION_REGbits.T0CS // bit 5
1524 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1525 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
1527 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1528 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
1529 #define NOT_POR PCONbits.NOT_POR // bit 1
1531 #define TMR1IE PIE1bits.TMR1IE // bit 0
1532 #define TMR2IE PIE1bits.TMR2IE // bit 1
1533 #define CCP1IE PIE1bits.CCP1IE // bit 2
1534 #define SSPIE PIE1bits.SSPIE // bit 3
1535 #define TXIE PIE1bits.TXIE // bit 4
1536 #define RCIE PIE1bits.RCIE // bit 5
1537 #define ADIE PIE1bits.ADIE // bit 6
1538 #define PSPIE PIE1bits.PSPIE // bit 7
1540 #define CCP2IE PIE2bits.CCP2IE // bit 0
1541 #define BCLIE PIE2bits.BCLIE // bit 3
1542 #define EEIE PIE2bits.EEIE // bit 4
1544 #define TMR1IF PIR1bits.TMR1IF // bit 0
1545 #define TMR2IF PIR1bits.TMR2IF // bit 1
1546 #define CCP1IF PIR1bits.CCP1IF // bit 2
1547 #define SSPIF PIR1bits.SSPIF // bit 3
1548 #define TXIF PIR1bits.TXIF // bit 4
1549 #define RCIF PIR1bits.RCIF // bit 5
1550 #define ADIF PIR1bits.ADIF // bit 6
1551 #define PSPIF PIR1bits.PSPIF // bit 7
1553 #define CCP2IF PIR2bits.CCP2IF // bit 0
1554 #define BCLIF PIR2bits.BCLIF // bit 3
1555 #define EEIF PIR2bits.EEIF // bit 4
1557 #define RA0 PORTAbits.RA0 // bit 0
1558 #define RA1 PORTAbits.RA1 // bit 1
1559 #define RA2 PORTAbits.RA2 // bit 2
1560 #define RA3 PORTAbits.RA3 // bit 3
1561 #define RA4 PORTAbits.RA4 // bit 4
1562 #define RA5 PORTAbits.RA5 // bit 5
1564 #define RB0 PORTBbits.RB0 // bit 0
1565 #define RB1 PORTBbits.RB1 // bit 1
1566 #define RB2 PORTBbits.RB2 // bit 2
1567 #define RB3 PORTBbits.RB3 // bit 3
1568 #define RB4 PORTBbits.RB4 // bit 4
1569 #define RB5 PORTBbits.RB5 // bit 5
1570 #define RB6 PORTBbits.RB6 // bit 6
1571 #define RB7 PORTBbits.RB7 // bit 7
1573 #define RC0 PORTCbits.RC0 // bit 0
1574 #define RC1 PORTCbits.RC1 // bit 1
1575 #define RC2 PORTCbits.RC2 // bit 2
1576 #define RC3 PORTCbits.RC3 // bit 3
1577 #define RC4 PORTCbits.RC4 // bit 4
1578 #define RC5 PORTCbits.RC5 // bit 5
1579 #define RC6 PORTCbits.RC6 // bit 6
1580 #define RC7 PORTCbits.RC7 // bit 7
1582 #define RD0 PORTDbits.RD0 // bit 0
1583 #define RD1 PORTDbits.RD1 // bit 1
1584 #define RD2 PORTDbits.RD2 // bit 2
1585 #define RD3 PORTDbits.RD3 // bit 3
1586 #define RD4 PORTDbits.RD4 // bit 4
1587 #define RD5 PORTDbits.RD5 // bit 5
1588 #define RD6 PORTDbits.RD6 // bit 6
1589 #define RD7 PORTDbits.RD7 // bit 7
1591 #define RE0 PORTEbits.RE0 // bit 0
1592 #define RE1 PORTEbits.RE1 // bit 1
1593 #define RE2 PORTEbits.RE2 // bit 2
1595 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
1596 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
1597 #define OERR RCSTAbits.OERR // bit 1
1598 #define FERR RCSTAbits.FERR // bit 2
1599 #define ADDEN RCSTAbits.ADDEN // bit 3
1600 #define CREN RCSTAbits.CREN // bit 4
1601 #define SREN RCSTAbits.SREN // bit 5
1602 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
1603 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
1604 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
1605 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
1606 #define SPEN RCSTAbits.SPEN // bit 7
1608 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1609 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1610 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1611 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1612 #define CKP SSPCONbits.CKP // bit 4
1613 #define SSPEN SSPCONbits.SSPEN // bit 5
1614 #define SSPOV SSPCONbits.SSPOV // bit 6
1615 #define WCOL SSPCONbits.WCOL // bit 7
1617 #define SEN SSPCON2bits.SEN // bit 0
1618 #define RSEN SSPCON2bits.RSEN // bit 1
1619 #define PEN SSPCON2bits.PEN // bit 2
1620 #define RCEN SSPCON2bits.RCEN // bit 3
1621 #define ACKEN SSPCON2bits.ACKEN // bit 4
1622 #define ACKDT SSPCON2bits.ACKDT // bit 5
1623 #define ACKSTAT SSPCON2bits.ACKSTAT // bit 6
1624 #define GCEN SSPCON2bits.GCEN // bit 7
1626 #define BF SSPSTATbits.BF // bit 0
1627 #define UA SSPSTATbits.UA // bit 1
1628 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
1629 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
1630 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
1631 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
1632 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
1633 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
1634 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
1635 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
1636 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
1637 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
1638 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
1639 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
1640 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
1641 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
1642 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
1643 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
1644 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
1645 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
1646 #define CKE SSPSTATbits.CKE // bit 6
1647 #define SMP SSPSTATbits.SMP // bit 7
1649 #define C STATUSbits.C // bit 0
1650 #define DC STATUSbits.DC // bit 1
1651 #define Z STATUSbits.Z // bit 2
1652 #define NOT_PD STATUSbits.NOT_PD // bit 3
1653 #define NOT_TO STATUSbits.NOT_TO // bit 4
1654 #define RP0 STATUSbits.RP0 // bit 5
1655 #define RP1 STATUSbits.RP1 // bit 6
1656 #define IRP STATUSbits.IRP // bit 7
1658 #define TMR1ON T1CONbits.TMR1ON // bit 0
1659 #define TMR1CS T1CONbits.TMR1CS // bit 1
1660 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1661 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
1662 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
1663 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1664 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1665 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1667 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1668 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1669 #define TMR2ON T2CONbits.TMR2ON // bit 2
1670 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1671 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1672 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1673 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1675 #define TRISA0 TRISAbits.TRISA0 // bit 0
1676 #define TRISA1 TRISAbits.TRISA1 // bit 1
1677 #define TRISA2 TRISAbits.TRISA2 // bit 2
1678 #define TRISA3 TRISAbits.TRISA3 // bit 3
1679 #define TRISA4 TRISAbits.TRISA4 // bit 4
1680 #define TRISA5 TRISAbits.TRISA5 // bit 5
1682 #define TRISB0 TRISBbits.TRISB0 // bit 0
1683 #define TRISB1 TRISBbits.TRISB1 // bit 1
1684 #define TRISB2 TRISBbits.TRISB2 // bit 2
1685 #define TRISB3 TRISBbits.TRISB3 // bit 3
1686 #define TRISB4 TRISBbits.TRISB4 // bit 4
1687 #define TRISB5 TRISBbits.TRISB5 // bit 5
1688 #define TRISB6 TRISBbits.TRISB6 // bit 6
1689 #define TRISB7 TRISBbits.TRISB7 // bit 7
1691 #define TRISC0 TRISCbits.TRISC0 // bit 0
1692 #define TRISC1 TRISCbits.TRISC1 // bit 1
1693 #define TRISC2 TRISCbits.TRISC2 // bit 2
1694 #define TRISC3 TRISCbits.TRISC3 // bit 3
1695 #define TRISC4 TRISCbits.TRISC4 // bit 4
1696 #define TRISC5 TRISCbits.TRISC5 // bit 5
1697 #define TRISC6 TRISCbits.TRISC6 // bit 6
1698 #define TRISC7 TRISCbits.TRISC7 // bit 7
1700 #define TRISD0 TRISDbits.TRISD0 // bit 0
1701 #define TRISD1 TRISDbits.TRISD1 // bit 1
1702 #define TRISD2 TRISDbits.TRISD2 // bit 2
1703 #define TRISD3 TRISDbits.TRISD3 // bit 3
1704 #define TRISD4 TRISDbits.TRISD4 // bit 4
1705 #define TRISD5 TRISDbits.TRISD5 // bit 5
1706 #define TRISD6 TRISDbits.TRISD6 // bit 6
1707 #define TRISD7 TRISDbits.TRISD7 // bit 7
1709 #define TRISE0 TRISEbits.TRISE0 // bit 0
1710 #define TRISE1 TRISEbits.TRISE1 // bit 1
1711 #define TRISE2 TRISEbits.TRISE2 // bit 2
1712 #define PSPMODE TRISEbits.PSPMODE // bit 4
1713 #define IBOV TRISEbits.IBOV // bit 5
1714 #define OBF TRISEbits.OBF // bit 6
1715 #define IBF TRISEbits.IBF // bit 7
1717 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
1718 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
1719 #define TRMT TXSTAbits.TRMT // bit 1
1720 #define BRGH TXSTAbits.BRGH // bit 2
1721 #define SYNC TXSTAbits.SYNC // bit 4
1722 #define TXEN TXSTAbits.TXEN // bit 5
1723 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
1724 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
1725 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
1726 #define CSRC TXSTAbits.CSRC // bit 7
1728 #endif // #ifndef NO_BIT_DEFINES
1730 #endif // #ifndef __PIC16LF874_H__