2 * This declarations of the PIC16LF877A MCU.
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:00 UTC.
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
25 #ifndef __PIC16LF877A_H__
26 #define __PIC16LF877A_H__
28 //==============================================================================
32 //==============================================================================
34 #ifndef NO_ADDR_DEFINES
36 #define INDF_ADDR 0x0000
37 #define TMR0_ADDR 0x0001
38 #define PCL_ADDR 0x0002
39 #define STATUS_ADDR 0x0003
40 #define FSR_ADDR 0x0004
41 #define PORTA_ADDR 0x0005
42 #define PORTB_ADDR 0x0006
43 #define PORTC_ADDR 0x0007
44 #define PORTD_ADDR 0x0008
45 #define PORTE_ADDR 0x0009
46 #define PCLATH_ADDR 0x000A
47 #define INTCON_ADDR 0x000B
48 #define PIR1_ADDR 0x000C
49 #define PIR2_ADDR 0x000D
50 #define TMR1_ADDR 0x000E
51 #define TMR1L_ADDR 0x000E
52 #define TMR1H_ADDR 0x000F
53 #define T1CON_ADDR 0x0010
54 #define TMR2_ADDR 0x0011
55 #define T2CON_ADDR 0x0012
56 #define SSPBUF_ADDR 0x0013
57 #define SSPCON_ADDR 0x0014
58 #define CCPR1_ADDR 0x0015
59 #define CCPR1L_ADDR 0x0015
60 #define CCPR1H_ADDR 0x0016
61 #define CCP1CON_ADDR 0x0017
62 #define RCSTA_ADDR 0x0018
63 #define TXREG_ADDR 0x0019
64 #define RCREG_ADDR 0x001A
65 #define CCPR2_ADDR 0x001B
66 #define CCPR2L_ADDR 0x001B
67 #define CCPR2H_ADDR 0x001C
68 #define CCP2CON_ADDR 0x001D
69 #define ADRESH_ADDR 0x001E
70 #define ADCON0_ADDR 0x001F
71 #define OPTION_REG_ADDR 0x0081
72 #define TRISA_ADDR 0x0085
73 #define TRISB_ADDR 0x0086
74 #define TRISC_ADDR 0x0087
75 #define TRISD_ADDR 0x0088
76 #define TRISE_ADDR 0x0089
77 #define PIE1_ADDR 0x008C
78 #define PIE2_ADDR 0x008D
79 #define PCON_ADDR 0x008E
80 #define SSPCON2_ADDR 0x0091
81 #define PR2_ADDR 0x0092
82 #define SSPADD_ADDR 0x0093
83 #define SSPSTAT_ADDR 0x0094
84 #define TXSTA_ADDR 0x0098
85 #define SPBRG_ADDR 0x0099
86 #define CMCON_ADDR 0x009C
87 #define CVRCON_ADDR 0x009D
88 #define ADRESL_ADDR 0x009E
89 #define ADCON1_ADDR 0x009F
90 #define EEDATA_ADDR 0x010C
91 #define EEADR_ADDR 0x010D
92 #define EEDATH_ADDR 0x010E
93 #define EEADRH_ADDR 0x010F
94 #define EECON1_ADDR 0x018C
95 #define EECON2_ADDR 0x018D
97 #endif // #ifndef NO_ADDR_DEFINES
99 //==============================================================================
101 // Register Definitions
103 //==============================================================================
105 extern __at(0x0000) __sfr INDF
;
106 extern __at(0x0001) __sfr TMR0
;
107 extern __at(0x0002) __sfr PCL
;
109 //==============================================================================
112 extern __at(0x0003) __sfr STATUS
;
136 extern __at(0x0003) volatile __STATUSbits_t STATUSbits
;
147 //==============================================================================
149 extern __at(0x0004) __sfr FSR
;
151 //==============================================================================
154 extern __at(0x0005) __sfr PORTA
;
177 extern __at(0x0005) volatile __PORTAbits_t PORTAbits
;
186 //==============================================================================
189 //==============================================================================
192 extern __at(0x0006) __sfr PORTB
;
206 extern __at(0x0006) volatile __PORTBbits_t PORTBbits
;
217 //==============================================================================
220 //==============================================================================
223 extern __at(0x0007) __sfr PORTC
;
237 extern __at(0x0007) volatile __PORTCbits_t PORTCbits
;
248 //==============================================================================
251 //==============================================================================
254 extern __at(0x0008) __sfr PORTD
;
268 extern __at(0x0008) volatile __PORTDbits_t PORTDbits
;
279 //==============================================================================
282 //==============================================================================
285 extern __at(0x0009) __sfr PORTE
;
308 extern __at(0x0009) volatile __PORTEbits_t PORTEbits
;
314 //==============================================================================
316 extern __at(0x000A) __sfr PCLATH
;
318 //==============================================================================
321 extern __at(0x000B) __sfr INTCON
;
350 extern __at(0x000B) volatile __INTCONbits_t INTCONbits
;
363 //==============================================================================
366 //==============================================================================
369 extern __at(0x000C) __sfr PIR1
;
383 extern __at(0x000C) volatile __PIR1bits_t PIR1bits
;
394 //==============================================================================
397 //==============================================================================
400 extern __at(0x000D) __sfr PIR2
;
414 extern __at(0x000D) volatile __PIR2bits_t PIR2bits
;
421 //==============================================================================
423 extern __at(0x000E) __sfr TMR1
;
424 extern __at(0x000E) __sfr TMR1L
;
425 extern __at(0x000F) __sfr TMR1H
;
427 //==============================================================================
430 extern __at(0x0010) __sfr T1CON
;
438 unsigned NOT_T1SYNC
: 1;
439 unsigned T1OSCEN
: 1;
440 unsigned T1CKPS0
: 1;
441 unsigned T1CKPS1
: 1;
462 unsigned T1INSYNC
: 1;
478 extern __at(0x0010) volatile __T1CONbits_t T1CONbits
;
482 #define _NOT_T1SYNC 0x04
484 #define _T1INSYNC 0x04
485 #define _T1OSCEN 0x08
486 #define _T1CKPS0 0x10
487 #define _T1CKPS1 0x20
489 //==============================================================================
491 extern __at(0x0011) __sfr TMR2
;
493 //==============================================================================
496 extern __at(0x0012) __sfr T2CON
;
502 unsigned T2CKPS0
: 1;
503 unsigned T2CKPS1
: 1;
505 unsigned TOUTPS0
: 1;
506 unsigned TOUTPS1
: 1;
507 unsigned TOUTPS2
: 1;
508 unsigned TOUTPS3
: 1;
526 extern __at(0x0012) volatile __T2CONbits_t T2CONbits
;
528 #define _T2CKPS0 0x01
529 #define _T2CKPS1 0x02
531 #define _TOUTPS0 0x08
532 #define _TOUTPS1 0x10
533 #define _TOUTPS2 0x20
534 #define _TOUTPS3 0x40
536 //==============================================================================
538 extern __at(0x0013) __sfr SSPBUF
;
540 //==============================================================================
543 extern __at(0x0014) __sfr SSPCON
;
566 extern __at(0x0014) volatile __SSPCONbits_t SSPCONbits
;
577 //==============================================================================
579 extern __at(0x0015) __sfr CCPR1
;
580 extern __at(0x0015) __sfr CCPR1L
;
581 extern __at(0x0016) __sfr CCPR1H
;
583 //==============================================================================
586 extern __at(0x0017) __sfr CCP1CON
;
609 extern __at(0x0017) volatile __CCP1CONbits_t CCP1CONbits
;
618 //==============================================================================
621 //==============================================================================
624 extern __at(0x0018) __sfr RCSTA
;
660 unsigned NOT_RC8
: 1;
677 extern __at(0x0018) volatile __RCSTAbits_t RCSTAbits
;
688 #define _NOT_RC8 0x40
692 //==============================================================================
694 extern __at(0x0019) __sfr TXREG
;
695 extern __at(0x001A) __sfr RCREG
;
696 extern __at(0x001B) __sfr CCPR2
;
697 extern __at(0x001B) __sfr CCPR2L
;
698 extern __at(0x001C) __sfr CCPR2H
;
700 //==============================================================================
703 extern __at(0x001D) __sfr CCP2CON
;
726 extern __at(0x001D) volatile __CCP2CONbits_t CCP2CONbits
;
735 //==============================================================================
737 extern __at(0x001E) __sfr ADRESH
;
739 //==============================================================================
742 extern __at(0x001F) __sfr ADCON0
;
750 unsigned GO_NOT_DONE
: 1;
774 unsigned NOT_DONE
: 1;
786 unsigned GO_DONE
: 1;
808 extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits
;
811 #define _GO_NOT_DONE 0x04
813 #define _NOT_DONE 0x04
814 #define _GO_DONE 0x04
821 //==============================================================================
824 //==============================================================================
827 extern __at(0x0081) __sfr OPTION_REG
;
840 unsigned NOT_RBPU
: 1;
848 } __OPTION_REGbits_t
;
850 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits
;
859 #define _NOT_RBPU 0x80
861 //==============================================================================
864 //==============================================================================
867 extern __at(0x0085) __sfr TRISA
;
890 extern __at(0x0085) volatile __TRISAbits_t TRISAbits
;
899 //==============================================================================
902 //==============================================================================
905 extern __at(0x0086) __sfr TRISB
;
919 extern __at(0x0086) volatile __TRISBbits_t TRISBbits
;
930 //==============================================================================
933 //==============================================================================
936 extern __at(0x0087) __sfr TRISC
;
950 extern __at(0x0087) volatile __TRISCbits_t TRISCbits
;
961 //==============================================================================
964 //==============================================================================
967 extern __at(0x0088) __sfr TRISD
;
981 extern __at(0x0088) volatile __TRISDbits_t TRISDbits
;
992 //==============================================================================
995 //==============================================================================
998 extern __at(0x0089) __sfr TRISE
;
1004 unsigned TRISE0
: 1;
1005 unsigned TRISE1
: 1;
1006 unsigned TRISE2
: 1;
1008 unsigned PSPMODE
: 1;
1021 extern __at(0x0089) volatile __TRISEbits_t TRISEbits
;
1023 #define _TRISE0 0x01
1024 #define _TRISE1 0x02
1025 #define _TRISE2 0x04
1026 #define _PSPMODE 0x10
1031 //==============================================================================
1034 //==============================================================================
1037 extern __at(0x008C) __sfr PIE1
;
1041 unsigned TMR1IE
: 1;
1042 unsigned TMR2IE
: 1;
1043 unsigned CCP1IE
: 1;
1051 extern __at(0x008C) volatile __PIE1bits_t PIE1bits
;
1053 #define _TMR1IE 0x01
1054 #define _TMR2IE 0x02
1055 #define _CCP1IE 0x04
1062 //==============================================================================
1065 //==============================================================================
1068 extern __at(0x008D) __sfr PIE2
;
1072 unsigned CCP2IE
: 1;
1082 extern __at(0x008D) volatile __PIE2bits_t PIE2bits
;
1084 #define _CCP2IE 0x01
1089 //==============================================================================
1092 //==============================================================================
1095 extern __at(0x008E) __sfr PCON
;
1101 unsigned NOT_BOR
: 1;
1102 unsigned NOT_POR
: 1;
1113 unsigned NOT_BO
: 1;
1124 extern __at(0x008E) volatile __PCONbits_t PCONbits
;
1126 #define _NOT_BOR 0x01
1127 #define _NOT_BO 0x01
1128 #define _NOT_POR 0x02
1130 //==============================================================================
1133 //==============================================================================
1136 extern __at(0x0091) __sfr SSPCON2
;
1146 unsigned ACKSTAT
: 1;
1150 extern __at(0x0091) volatile __SSPCON2bits_t SSPCON2bits
;
1158 #define _ACKSTAT 0x40
1161 //==============================================================================
1163 extern __at(0x0092) __sfr PR2
;
1164 extern __at(0x0093) __sfr SSPADD
;
1166 //==============================================================================
1169 extern __at(0x0094) __sfr SSPSTAT
;
1177 unsigned R_NOT_W
: 1;
1180 unsigned D_NOT_A
: 1;
1190 unsigned I2C_START
: 1;
1191 unsigned I2C_STOP
: 1;
1201 unsigned I2C_READ
: 1;
1204 unsigned I2C_DATA
: 1;
1225 unsigned NOT_WRITE
: 1;
1228 unsigned NOT_ADDRESS
: 1;
1249 unsigned READ_WRITE
: 1;
1252 unsigned DATA_ADDRESS
: 1;
1258 extern __at(0x0094) volatile __SSPSTATbits_t SSPSTATbits
;
1262 #define _R_NOT_W 0x04
1264 #define _I2C_READ 0x04
1266 #define _NOT_WRITE 0x04
1268 #define _READ_WRITE 0x04
1270 #define _I2C_START 0x08
1272 #define _I2C_STOP 0x10
1273 #define _D_NOT_A 0x20
1275 #define _I2C_DATA 0x20
1277 #define _NOT_ADDRESS 0x20
1279 #define _DATA_ADDRESS 0x20
1283 //==============================================================================
1286 //==============================================================================
1289 extern __at(0x0098) __sfr TXSTA
;
1313 unsigned NOT_TX8
: 1;
1330 extern __at(0x0098) volatile __TXSTAbits_t TXSTAbits
;
1339 #define _NOT_TX8 0x40
1343 //==============================================================================
1345 extern __at(0x0099) __sfr SPBRG
;
1347 //==============================================================================
1350 extern __at(0x009C) __sfr CMCON
;
1373 extern __at(0x009C) volatile __CMCONbits_t CMCONbits
;
1384 //==============================================================================
1387 //==============================================================================
1390 extern __at(0x009D) __sfr CVRCON
;
1413 extern __at(0x009D) volatile __CVRCONbits_t CVRCONbits
;
1423 //==============================================================================
1425 extern __at(0x009E) __sfr ADRESL
;
1427 //==============================================================================
1430 extern __at(0x009F) __sfr ADCON1
;
1453 extern __at(0x009F) volatile __ADCON1bits_t ADCON1bits
;
1462 //==============================================================================
1464 extern __at(0x010C) __sfr EEDATA
;
1465 extern __at(0x010D) __sfr EEADR
;
1466 extern __at(0x010E) __sfr EEDATH
;
1467 extern __at(0x010F) __sfr EEADRH
;
1469 //==============================================================================
1472 extern __at(0x018C) __sfr EECON1
;
1486 extern __at(0x018C) volatile __EECON1bits_t EECON1bits
;
1494 //==============================================================================
1496 extern __at(0x018D) __sfr EECON2
;
1498 //==============================================================================
1500 // Configuration Bits
1502 //==============================================================================
1504 #define _CONFIG 0x2007
1506 //----------------------------- CONFIG Options -------------------------------
1508 #define _FOSC_LP 0x3FFC // LP oscillator.
1509 #define _LP_OSC 0x3FFC // LP oscillator.
1510 #define _FOSC_XT 0x3FFD // XT oscillator.
1511 #define _XT_OSC 0x3FFD // XT oscillator.
1512 #define _FOSC_HS 0x3FFE // HS oscillator.
1513 #define _HS_OSC 0x3FFE // HS oscillator.
1514 #define _FOSC_EXTRC 0x3FFF // RC oscillator.
1515 #define _RC_OSC 0x3FFF // RC oscillator.
1516 #define _WDTE_OFF 0x3FFB // WDT disabled.
1517 #define _WDT_OFF 0x3FFB // WDT disabled.
1518 #define _WDTE_ON 0x3FFF // WDT enabled.
1519 #define _WDT_ON 0x3FFF // WDT enabled.
1520 #define _PWRTE_ON 0x3FF7 // PWRT enabled.
1521 #define _PWRTE_OFF 0x3FFF // PWRT disabled.
1522 #define _BOREN_OFF 0x3FBF // BOR disabled.
1523 #define _BODEN_OFF 0x3FBF // BOR disabled.
1524 #define _BOREN_ON 0x3FFF // BOR enabled.
1525 #define _BODEN_ON 0x3FFF // BOR enabled.
1526 #define _LVP_OFF 0x3F7F // RB3 is digital I/O, HV on MCLR must be used for programming.
1527 #define _LVP_ON 0x3FFF // RB3/PGM pin has PGM function; low-voltage programming enabled.
1528 #define _CPD_ON 0x3EFF // Data EEPROM code-protected.
1529 #define _CPD_OFF 0x3FFF // Data EEPROM code protection off.
1530 #define _WRT_HALF 0x39FF // 0000h to 0FFFh write-protected; 1000h to 1FFFh may be written to by EECON control.
1531 #define _WRT_1FOURTH 0x3BFF // 0000h to 07FFh write-protected; 0800h to 1FFFh may be written to by EECON control.
1532 #define _WRT_256 0x3DFF // 0000h to 00FFh write-protected; 0100h to 1FFFh may be written to by EECON control.
1533 #define _WRT_OFF 0x3FFF // Write protection off; all program memory may be written to by EECON control.
1534 #define _DEBUG_ON 0x37FF // In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger.
1535 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins.
1536 #define _CP_ON 0x1FFF // All program memory code-protected.
1537 #define _CP_ALL 0x1FFF // All program memory code-protected.
1538 #define _CP_OFF 0x3FFF // Code protection off.
1540 //==============================================================================
1542 #define _DEVID1 0x2006
1544 #define _IDLOC0 0x2000
1545 #define _IDLOC1 0x2001
1546 #define _IDLOC2 0x2002
1547 #define _IDLOC3 0x2003
1549 //==============================================================================
1551 #ifndef NO_BIT_DEFINES
1553 #define ADON ADCON0bits.ADON // bit 0
1554 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 2, shadows bit in ADCON0bits
1555 #define GO ADCON0bits.GO // bit 2, shadows bit in ADCON0bits
1556 #define NOT_DONE ADCON0bits.NOT_DONE // bit 2, shadows bit in ADCON0bits
1557 #define GO_DONE ADCON0bits.GO_DONE // bit 2, shadows bit in ADCON0bits
1558 #define CHS0 ADCON0bits.CHS0 // bit 3
1559 #define CHS1 ADCON0bits.CHS1 // bit 4
1560 #define CHS2 ADCON0bits.CHS2 // bit 5
1561 #define ADCS0 ADCON0bits.ADCS0 // bit 6
1562 #define ADCS1 ADCON0bits.ADCS1 // bit 7
1564 #define PCFG0 ADCON1bits.PCFG0 // bit 0
1565 #define PCFG1 ADCON1bits.PCFG1 // bit 1
1566 #define PCFG2 ADCON1bits.PCFG2 // bit 2
1567 #define PCFG3 ADCON1bits.PCFG3 // bit 3
1568 #define ADCS2 ADCON1bits.ADCS2 // bit 6
1569 #define ADFM ADCON1bits.ADFM // bit 7
1571 #define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
1572 #define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
1573 #define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
1574 #define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
1575 #define CCP1Y CCP1CONbits.CCP1Y // bit 4
1576 #define CCP1X CCP1CONbits.CCP1X // bit 5
1578 #define CCP2M0 CCP2CONbits.CCP2M0 // bit 0
1579 #define CCP2M1 CCP2CONbits.CCP2M1 // bit 1
1580 #define CCP2M2 CCP2CONbits.CCP2M2 // bit 2
1581 #define CCP2M3 CCP2CONbits.CCP2M3 // bit 3
1582 #define CCP2Y CCP2CONbits.CCP2Y // bit 4
1583 #define CCP2X CCP2CONbits.CCP2X // bit 5
1585 #define CM0 CMCONbits.CM0 // bit 0
1586 #define CM1 CMCONbits.CM1 // bit 1
1587 #define CM2 CMCONbits.CM2 // bit 2
1588 #define CIS CMCONbits.CIS // bit 3
1589 #define C1INV CMCONbits.C1INV // bit 4
1590 #define C2INV CMCONbits.C2INV // bit 5
1591 #define C1OUT CMCONbits.C1OUT // bit 6
1592 #define C2OUT CMCONbits.C2OUT // bit 7
1594 #define CVR0 CVRCONbits.CVR0 // bit 0
1595 #define CVR1 CVRCONbits.CVR1 // bit 1
1596 #define CVR2 CVRCONbits.CVR2 // bit 2
1597 #define CVR3 CVRCONbits.CVR3 // bit 3
1598 #define CVRR CVRCONbits.CVRR // bit 5
1599 #define CVROE CVRCONbits.CVROE // bit 6
1600 #define CVREN CVRCONbits.CVREN // bit 7
1602 #define RD EECON1bits.RD // bit 0
1603 #define WR EECON1bits.WR // bit 1
1604 #define WREN EECON1bits.WREN // bit 2
1605 #define WRERR EECON1bits.WRERR // bit 3
1606 #define EEPGD EECON1bits.EEPGD // bit 7
1608 #define RBIF INTCONbits.RBIF // bit 0
1609 #define INTF INTCONbits.INTF // bit 1
1610 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
1611 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
1612 #define RBIE INTCONbits.RBIE // bit 3
1613 #define INTE INTCONbits.INTE // bit 4
1614 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
1615 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
1616 #define PEIE INTCONbits.PEIE // bit 6
1617 #define GIE INTCONbits.GIE // bit 7
1619 #define PS0 OPTION_REGbits.PS0 // bit 0
1620 #define PS1 OPTION_REGbits.PS1 // bit 1
1621 #define PS2 OPTION_REGbits.PS2 // bit 2
1622 #define PSA OPTION_REGbits.PSA // bit 3
1623 #define T0SE OPTION_REGbits.T0SE // bit 4
1624 #define T0CS OPTION_REGbits.T0CS // bit 5
1625 #define INTEDG OPTION_REGbits.INTEDG // bit 6
1626 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7
1628 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits
1629 #define NOT_BO PCONbits.NOT_BO // bit 0, shadows bit in PCONbits
1630 #define NOT_POR PCONbits.NOT_POR // bit 1
1632 #define TMR1IE PIE1bits.TMR1IE // bit 0
1633 #define TMR2IE PIE1bits.TMR2IE // bit 1
1634 #define CCP1IE PIE1bits.CCP1IE // bit 2
1635 #define SSPIE PIE1bits.SSPIE // bit 3
1636 #define TXIE PIE1bits.TXIE // bit 4
1637 #define RCIE PIE1bits.RCIE // bit 5
1638 #define ADIE PIE1bits.ADIE // bit 6
1639 #define PSPIE PIE1bits.PSPIE // bit 7
1641 #define CCP2IE PIE2bits.CCP2IE // bit 0
1642 #define BCLIE PIE2bits.BCLIE // bit 3
1643 #define EEIE PIE2bits.EEIE // bit 4
1644 #define CMIE PIE2bits.CMIE // bit 6
1646 #define TMR1IF PIR1bits.TMR1IF // bit 0
1647 #define TMR2IF PIR1bits.TMR2IF // bit 1
1648 #define CCP1IF PIR1bits.CCP1IF // bit 2
1649 #define SSPIF PIR1bits.SSPIF // bit 3
1650 #define TXIF PIR1bits.TXIF // bit 4
1651 #define RCIF PIR1bits.RCIF // bit 5
1652 #define ADIF PIR1bits.ADIF // bit 6
1653 #define PSPIF PIR1bits.PSPIF // bit 7
1655 #define CCP2IF PIR2bits.CCP2IF // bit 0
1656 #define BCLIF PIR2bits.BCLIF // bit 3
1657 #define EEIF PIR2bits.EEIF // bit 4
1658 #define CMIF PIR2bits.CMIF // bit 6
1660 #define RA0 PORTAbits.RA0 // bit 0
1661 #define RA1 PORTAbits.RA1 // bit 1
1662 #define RA2 PORTAbits.RA2 // bit 2
1663 #define RA3 PORTAbits.RA3 // bit 3
1664 #define RA4 PORTAbits.RA4 // bit 4
1665 #define RA5 PORTAbits.RA5 // bit 5
1667 #define RB0 PORTBbits.RB0 // bit 0
1668 #define RB1 PORTBbits.RB1 // bit 1
1669 #define RB2 PORTBbits.RB2 // bit 2
1670 #define RB3 PORTBbits.RB3 // bit 3
1671 #define RB4 PORTBbits.RB4 // bit 4
1672 #define RB5 PORTBbits.RB5 // bit 5
1673 #define RB6 PORTBbits.RB6 // bit 6
1674 #define RB7 PORTBbits.RB7 // bit 7
1676 #define RC0 PORTCbits.RC0 // bit 0
1677 #define RC1 PORTCbits.RC1 // bit 1
1678 #define RC2 PORTCbits.RC2 // bit 2
1679 #define RC3 PORTCbits.RC3 // bit 3
1680 #define RC4 PORTCbits.RC4 // bit 4
1681 #define RC5 PORTCbits.RC5 // bit 5
1682 #define RC6 PORTCbits.RC6 // bit 6
1683 #define RC7 PORTCbits.RC7 // bit 7
1685 #define RD0 PORTDbits.RD0 // bit 0
1686 #define RD1 PORTDbits.RD1 // bit 1
1687 #define RD2 PORTDbits.RD2 // bit 2
1688 #define RD3 PORTDbits.RD3 // bit 3
1689 #define RD4 PORTDbits.RD4 // bit 4
1690 #define RD5 PORTDbits.RD5 // bit 5
1691 #define RD6 PORTDbits.RD6 // bit 6
1692 #define RD7 PORTDbits.RD7 // bit 7
1694 #define RE0 PORTEbits.RE0 // bit 0
1695 #define RE1 PORTEbits.RE1 // bit 1
1696 #define RE2 PORTEbits.RE2 // bit 2
1698 #define RX9D RCSTAbits.RX9D // bit 0, shadows bit in RCSTAbits
1699 #define RCD8 RCSTAbits.RCD8 // bit 0, shadows bit in RCSTAbits
1700 #define OERR RCSTAbits.OERR // bit 1
1701 #define FERR RCSTAbits.FERR // bit 2
1702 #define ADDEN RCSTAbits.ADDEN // bit 3
1703 #define CREN RCSTAbits.CREN // bit 4
1704 #define SREN RCSTAbits.SREN // bit 5
1705 #define RX9 RCSTAbits.RX9 // bit 6, shadows bit in RCSTAbits
1706 #define RC9 RCSTAbits.RC9 // bit 6, shadows bit in RCSTAbits
1707 #define NOT_RC8 RCSTAbits.NOT_RC8 // bit 6, shadows bit in RCSTAbits
1708 #define RC8_9 RCSTAbits.RC8_9 // bit 6, shadows bit in RCSTAbits
1709 #define SPEN RCSTAbits.SPEN // bit 7
1711 #define SSPM0 SSPCONbits.SSPM0 // bit 0
1712 #define SSPM1 SSPCONbits.SSPM1 // bit 1
1713 #define SSPM2 SSPCONbits.SSPM2 // bit 2
1714 #define SSPM3 SSPCONbits.SSPM3 // bit 3
1715 #define CKP SSPCONbits.CKP // bit 4
1716 #define SSPEN SSPCONbits.SSPEN // bit 5
1717 #define SSPOV SSPCONbits.SSPOV // bit 6
1718 #define WCOL SSPCONbits.WCOL // bit 7
1720 #define SEN SSPCON2bits.SEN // bit 0
1721 #define RSEN SSPCON2bits.RSEN // bit 1
1722 #define PEN SSPCON2bits.PEN // bit 2
1723 #define RCEN SSPCON2bits.RCEN // bit 3
1724 #define ACKEN SSPCON2bits.ACKEN // bit 4
1725 #define ACKDT SSPCON2bits.ACKDT // bit 5
1726 #define ACKSTAT SSPCON2bits.ACKSTAT // bit 6
1727 #define GCEN SSPCON2bits.GCEN // bit 7
1729 #define BF SSPSTATbits.BF // bit 0
1730 #define UA SSPSTATbits.UA // bit 1
1731 #define R_NOT_W SSPSTATbits.R_NOT_W // bit 2, shadows bit in SSPSTATbits
1732 #define R SSPSTATbits.R // bit 2, shadows bit in SSPSTATbits
1733 #define I2C_READ SSPSTATbits.I2C_READ // bit 2, shadows bit in SSPSTATbits
1734 #define NOT_W SSPSTATbits.NOT_W // bit 2, shadows bit in SSPSTATbits
1735 #define NOT_WRITE SSPSTATbits.NOT_WRITE // bit 2, shadows bit in SSPSTATbits
1736 #define R_W SSPSTATbits.R_W // bit 2, shadows bit in SSPSTATbits
1737 #define READ_WRITE SSPSTATbits.READ_WRITE // bit 2, shadows bit in SSPSTATbits
1738 #define S SSPSTATbits.S // bit 3, shadows bit in SSPSTATbits
1739 #define I2C_START SSPSTATbits.I2C_START // bit 3, shadows bit in SSPSTATbits
1740 #define P SSPSTATbits.P // bit 4, shadows bit in SSPSTATbits
1741 #define I2C_STOP SSPSTATbits.I2C_STOP // bit 4, shadows bit in SSPSTATbits
1742 #define D_NOT_A SSPSTATbits.D_NOT_A // bit 5, shadows bit in SSPSTATbits
1743 #define D SSPSTATbits.D // bit 5, shadows bit in SSPSTATbits
1744 #define I2C_DATA SSPSTATbits.I2C_DATA // bit 5, shadows bit in SSPSTATbits
1745 #define NOT_A SSPSTATbits.NOT_A // bit 5, shadows bit in SSPSTATbits
1746 #define NOT_ADDRESS SSPSTATbits.NOT_ADDRESS // bit 5, shadows bit in SSPSTATbits
1747 #define D_A SSPSTATbits.D_A // bit 5, shadows bit in SSPSTATbits
1748 #define DATA_ADDRESS SSPSTATbits.DATA_ADDRESS // bit 5, shadows bit in SSPSTATbits
1749 #define CKE SSPSTATbits.CKE // bit 6
1750 #define SMP SSPSTATbits.SMP // bit 7
1752 #define C STATUSbits.C // bit 0
1753 #define DC STATUSbits.DC // bit 1
1754 #define Z STATUSbits.Z // bit 2
1755 #define NOT_PD STATUSbits.NOT_PD // bit 3
1756 #define NOT_TO STATUSbits.NOT_TO // bit 4
1757 #define RP0 STATUSbits.RP0 // bit 5
1758 #define RP1 STATUSbits.RP1 // bit 6
1759 #define IRP STATUSbits.IRP // bit 7
1761 #define TMR1ON T1CONbits.TMR1ON // bit 0
1762 #define TMR1CS T1CONbits.TMR1CS // bit 1
1763 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2, shadows bit in T1CONbits
1764 #define T1SYNC T1CONbits.T1SYNC // bit 2, shadows bit in T1CONbits
1765 #define T1INSYNC T1CONbits.T1INSYNC // bit 2, shadows bit in T1CONbits
1766 #define T1OSCEN T1CONbits.T1OSCEN // bit 3
1767 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
1768 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
1770 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
1771 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
1772 #define TMR2ON T2CONbits.TMR2ON // bit 2
1773 #define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
1774 #define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
1775 #define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
1776 #define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
1778 #define TRISA0 TRISAbits.TRISA0 // bit 0
1779 #define TRISA1 TRISAbits.TRISA1 // bit 1
1780 #define TRISA2 TRISAbits.TRISA2 // bit 2
1781 #define TRISA3 TRISAbits.TRISA3 // bit 3
1782 #define TRISA4 TRISAbits.TRISA4 // bit 4
1783 #define TRISA5 TRISAbits.TRISA5 // bit 5
1785 #define TRISB0 TRISBbits.TRISB0 // bit 0
1786 #define TRISB1 TRISBbits.TRISB1 // bit 1
1787 #define TRISB2 TRISBbits.TRISB2 // bit 2
1788 #define TRISB3 TRISBbits.TRISB3 // bit 3
1789 #define TRISB4 TRISBbits.TRISB4 // bit 4
1790 #define TRISB5 TRISBbits.TRISB5 // bit 5
1791 #define TRISB6 TRISBbits.TRISB6 // bit 6
1792 #define TRISB7 TRISBbits.TRISB7 // bit 7
1794 #define TRISC0 TRISCbits.TRISC0 // bit 0
1795 #define TRISC1 TRISCbits.TRISC1 // bit 1
1796 #define TRISC2 TRISCbits.TRISC2 // bit 2
1797 #define TRISC3 TRISCbits.TRISC3 // bit 3
1798 #define TRISC4 TRISCbits.TRISC4 // bit 4
1799 #define TRISC5 TRISCbits.TRISC5 // bit 5
1800 #define TRISC6 TRISCbits.TRISC6 // bit 6
1801 #define TRISC7 TRISCbits.TRISC7 // bit 7
1803 #define TRISD0 TRISDbits.TRISD0 // bit 0
1804 #define TRISD1 TRISDbits.TRISD1 // bit 1
1805 #define TRISD2 TRISDbits.TRISD2 // bit 2
1806 #define TRISD3 TRISDbits.TRISD3 // bit 3
1807 #define TRISD4 TRISDbits.TRISD4 // bit 4
1808 #define TRISD5 TRISDbits.TRISD5 // bit 5
1809 #define TRISD6 TRISDbits.TRISD6 // bit 6
1810 #define TRISD7 TRISDbits.TRISD7 // bit 7
1812 #define TRISE0 TRISEbits.TRISE0 // bit 0
1813 #define TRISE1 TRISEbits.TRISE1 // bit 1
1814 #define TRISE2 TRISEbits.TRISE2 // bit 2
1815 #define PSPMODE TRISEbits.PSPMODE // bit 4
1816 #define IBOV TRISEbits.IBOV // bit 5
1817 #define OBF TRISEbits.OBF // bit 6
1818 #define IBF TRISEbits.IBF // bit 7
1820 #define TX9D TXSTAbits.TX9D // bit 0, shadows bit in TXSTAbits
1821 #define TXD8 TXSTAbits.TXD8 // bit 0, shadows bit in TXSTAbits
1822 #define TRMT TXSTAbits.TRMT // bit 1
1823 #define BRGH TXSTAbits.BRGH // bit 2
1824 #define SYNC TXSTAbits.SYNC // bit 4
1825 #define TXEN TXSTAbits.TXEN // bit 5
1826 #define TX9 TXSTAbits.TX9 // bit 6, shadows bit in TXSTAbits
1827 #define NOT_TX8 TXSTAbits.NOT_TX8 // bit 6, shadows bit in TXSTAbits
1828 #define TX8_9 TXSTAbits.TX8_9 // bit 6, shadows bit in TXSTAbits
1829 #define CSRC TXSTAbits.CSRC // bit 7
1831 #endif // #ifndef NO_BIT_DEFINES
1833 #endif // #ifndef __PIC16LF877A_H__