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struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic16 / pic18f6525.h
blob5f055dd0fc648f5e06767a19bdecc3b0e1e50e29
1 /*
2 * This declarations of the PIC18F6525 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:49 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC18F6525_H__
26 #define __PIC18F6525_H__
27
28 //==============================================================================
29
30 //==============================================================================
31 //
32 // Register Definitions
33 //
34 //==============================================================================
35
36
37 //==============================================================================
38 // ECCP2DEL Bits
39
40 extern __at(0x0F67) __sfr ECCP2DEL;
41
42 typedef union
43 {
44 struct
45 {
46 unsigned P2DC0 : 1;
47 unsigned P2DC1 : 1;
48 unsigned P2DC2 : 1;
49 unsigned P2DC3 : 1;
50 unsigned P2DC4 : 1;
51 unsigned P2DC5 : 1;
52 unsigned P2DC6 : 1;
53 unsigned P2RSEN : 1;
54 };
55
56 struct
57 {
58 unsigned PDC0 : 1;
59 unsigned PDC1 : 1;
60 unsigned PDC2 : 1;
61 unsigned PDC3 : 1;
62 unsigned PDC4 : 1;
63 unsigned PDC5 : 1;
64 unsigned PDC6 : 1;
65 unsigned PRSEN : 1;
66 };
67
68 struct
69 {
70 unsigned PDC : 7;
71 unsigned : 1;
72 };
73
74 struct
75 {
76 unsigned P2DC : 7;
77 unsigned : 1;
78 };
79 } __ECCP2DELbits_t;
80
81 extern __at(0x0F67) volatile __ECCP2DELbits_t ECCP2DELbits;
82
83 #define _ECCP2DEL_P2DC0 0x01
84 #define _ECCP2DEL_PDC0 0x01
85 #define _ECCP2DEL_P2DC1 0x02
86 #define _ECCP2DEL_PDC1 0x02
87 #define _ECCP2DEL_P2DC2 0x04
88 #define _ECCP2DEL_PDC2 0x04
89 #define _ECCP2DEL_P2DC3 0x08
90 #define _ECCP2DEL_PDC3 0x08
91 #define _ECCP2DEL_P2DC4 0x10
92 #define _ECCP2DEL_PDC4 0x10
93 #define _ECCP2DEL_P2DC5 0x20
94 #define _ECCP2DEL_PDC5 0x20
95 #define _ECCP2DEL_P2DC6 0x40
96 #define _ECCP2DEL_PDC6 0x40
97 #define _ECCP2DEL_P2RSEN 0x80
98 #define _ECCP2DEL_PRSEN 0x80
99
100 //==============================================================================
101
102
103 //==============================================================================
104 // PWM2CON Bits
105
106 extern __at(0x0F67) __sfr PWM2CON;
107
108 typedef union
109 {
110 struct
111 {
112 unsigned P2DC0 : 1;
113 unsigned P2DC1 : 1;
114 unsigned P2DC2 : 1;
115 unsigned P2DC3 : 1;
116 unsigned P2DC4 : 1;
117 unsigned P2DC5 : 1;
118 unsigned P2DC6 : 1;
119 unsigned P2RSEN : 1;
120 };
121
122 struct
123 {
124 unsigned PDC0 : 1;
125 unsigned PDC1 : 1;
126 unsigned PDC2 : 1;
127 unsigned PDC3 : 1;
128 unsigned PDC4 : 1;
129 unsigned PDC5 : 1;
130 unsigned PDC6 : 1;
131 unsigned PRSEN : 1;
132 };
133
134 struct
135 {
136 unsigned P2DC : 7;
137 unsigned : 1;
138 };
139
140 struct
141 {
142 unsigned PDC : 7;
143 unsigned : 1;
144 };
145 } __PWM2CONbits_t;
146
147 extern __at(0x0F67) volatile __PWM2CONbits_t PWM2CONbits;
148
149 #define _PWM2CON_P2DC0 0x01
150 #define _PWM2CON_PDC0 0x01
151 #define _PWM2CON_P2DC1 0x02
152 #define _PWM2CON_PDC1 0x02
153 #define _PWM2CON_P2DC2 0x04
154 #define _PWM2CON_PDC2 0x04
155 #define _PWM2CON_P2DC3 0x08
156 #define _PWM2CON_PDC3 0x08
157 #define _PWM2CON_P2DC4 0x10
158 #define _PWM2CON_PDC4 0x10
159 #define _PWM2CON_P2DC5 0x20
160 #define _PWM2CON_PDC5 0x20
161 #define _PWM2CON_P2DC6 0x40
162 #define _PWM2CON_PDC6 0x40
163 #define _PWM2CON_P2RSEN 0x80
164 #define _PWM2CON_PRSEN 0x80
165
166 //==============================================================================
167
168
169 //==============================================================================
170 // ECCP2AS Bits
171
172 extern __at(0x0F68) __sfr ECCP2AS;
173
174 typedef union
175 {
176 struct
177 {
178 unsigned PSS2BD0 : 1;
179 unsigned PSS2BD1 : 1;
180 unsigned PSS2AC0 : 1;
181 unsigned PSS2AC1 : 1;
182 unsigned ECCP2AS0 : 1;
183 unsigned ECCP2AS1 : 1;
184 unsigned ECCP2AS2 : 1;
185 unsigned ECCP2ASE : 1;
186 };
187
188 struct
189 {
190 unsigned PSSBD0 : 1;
191 unsigned PSSBD1 : 1;
192 unsigned PSSAC0 : 1;
193 unsigned PSSAC1 : 1;
194 unsigned : 1;
195 unsigned : 1;
196 unsigned : 1;
197 unsigned : 1;
198 };
199
200 struct
201 {
202 unsigned PSSBD : 2;
203 unsigned : 6;
204 };
205
206 struct
207 {
208 unsigned PSS2BD : 2;
209 unsigned : 6;
210 };
211
212 struct
213 {
214 unsigned : 2;
215 unsigned PSS2AC : 2;
216 unsigned : 4;
217 };
218
219 struct
220 {
221 unsigned : 2;
222 unsigned PSSAC : 2;
223 unsigned : 4;
224 };
225
226 struct
227 {
228 unsigned : 4;
229 unsigned ECCP2AS : 3;
230 unsigned : 1;
231 };
232 } __ECCP2ASbits_t;
233
234 extern __at(0x0F68) volatile __ECCP2ASbits_t ECCP2ASbits;
235
236 #define _ECCP2AS_PSS2BD0 0x01
237 #define _ECCP2AS_PSSBD0 0x01
238 #define _ECCP2AS_PSS2BD1 0x02
239 #define _ECCP2AS_PSSBD1 0x02
240 #define _ECCP2AS_PSS2AC0 0x04
241 #define _ECCP2AS_PSSAC0 0x04
242 #define _ECCP2AS_PSS2AC1 0x08
243 #define _ECCP2AS_PSSAC1 0x08
244 #define _ECCP2AS_ECCP2AS0 0x10
245 #define _ECCP2AS_ECCP2AS1 0x20
246 #define _ECCP2AS_ECCP2AS2 0x40
247 #define _ECCP2AS_ECCP2ASE 0x80
248
249 //==============================================================================
250
251
252 //==============================================================================
253 // ECCP3DEL Bits
254
255 extern __at(0x0F69) __sfr ECCP3DEL;
256
257 typedef union
258 {
259 struct
260 {
261 unsigned P3DC0 : 1;
262 unsigned P3DC1 : 1;
263 unsigned P3DC2 : 1;
264 unsigned P3DC3 : 1;
265 unsigned P3DC4 : 1;
266 unsigned P3DC5 : 1;
267 unsigned P3DC6 : 1;
268 unsigned P3RSEN : 1;
269 };
270
271 struct
272 {
273 unsigned PDC0 : 1;
274 unsigned PDC1 : 1;
275 unsigned PDC2 : 1;
276 unsigned PDC3 : 1;
277 unsigned PDC4 : 1;
278 unsigned PDC5 : 1;
279 unsigned PDC6 : 1;
280 unsigned PRSEN : 1;
281 };
282
283 struct
284 {
285 unsigned PDC : 7;
286 unsigned : 1;
287 };
288
289 struct
290 {
291 unsigned P3DC : 7;
292 unsigned : 1;
293 };
294 } __ECCP3DELbits_t;
295
296 extern __at(0x0F69) volatile __ECCP3DELbits_t ECCP3DELbits;
297
298 #define _ECCP3DEL_P3DC0 0x01
299 #define _ECCP3DEL_PDC0 0x01
300 #define _ECCP3DEL_P3DC1 0x02
301 #define _ECCP3DEL_PDC1 0x02
302 #define _ECCP3DEL_P3DC2 0x04
303 #define _ECCP3DEL_PDC2 0x04
304 #define _ECCP3DEL_P3DC3 0x08
305 #define _ECCP3DEL_PDC3 0x08
306 #define _ECCP3DEL_P3DC4 0x10
307 #define _ECCP3DEL_PDC4 0x10
308 #define _ECCP3DEL_P3DC5 0x20
309 #define _ECCP3DEL_PDC5 0x20
310 #define _ECCP3DEL_P3DC6 0x40
311 #define _ECCP3DEL_PDC6 0x40
312 #define _ECCP3DEL_P3RSEN 0x80
313 #define _ECCP3DEL_PRSEN 0x80
314
315 //==============================================================================
316
317
318 //==============================================================================
319 // PWM3CON Bits
320
321 extern __at(0x0F69) __sfr PWM3CON;
322
323 typedef union
324 {
325 struct
326 {
327 unsigned P3DC0 : 1;
328 unsigned P3DC1 : 1;
329 unsigned P3DC2 : 1;
330 unsigned P3DC3 : 1;
331 unsigned P3DC4 : 1;
332 unsigned P3DC5 : 1;
333 unsigned P3DC6 : 1;
334 unsigned P3RSEN : 1;
335 };
336
337 struct
338 {
339 unsigned PDC0 : 1;
340 unsigned PDC1 : 1;
341 unsigned PDC2 : 1;
342 unsigned PDC3 : 1;
343 unsigned PDC4 : 1;
344 unsigned PDC5 : 1;
345 unsigned PDC6 : 1;
346 unsigned PRSEN : 1;
347 };
348
349 struct
350 {
351 unsigned PDC : 7;
352 unsigned : 1;
353 };
354
355 struct
356 {
357 unsigned P3DC : 7;
358 unsigned : 1;
359 };
360 } __PWM3CONbits_t;
361
362 extern __at(0x0F69) volatile __PWM3CONbits_t PWM3CONbits;
363
364 #define _PWM3CON_P3DC0 0x01
365 #define _PWM3CON_PDC0 0x01
366 #define _PWM3CON_P3DC1 0x02
367 #define _PWM3CON_PDC1 0x02
368 #define _PWM3CON_P3DC2 0x04
369 #define _PWM3CON_PDC2 0x04
370 #define _PWM3CON_P3DC3 0x08
371 #define _PWM3CON_PDC3 0x08
372 #define _PWM3CON_P3DC4 0x10
373 #define _PWM3CON_PDC4 0x10
374 #define _PWM3CON_P3DC5 0x20
375 #define _PWM3CON_PDC5 0x20
376 #define _PWM3CON_P3DC6 0x40
377 #define _PWM3CON_PDC6 0x40
378 #define _PWM3CON_P3RSEN 0x80
379 #define _PWM3CON_PRSEN 0x80
380
381 //==============================================================================
382
383
384 //==============================================================================
385 // ECCP3AS Bits
386
387 extern __at(0x0F6A) __sfr ECCP3AS;
388
389 typedef union
390 {
391 struct
392 {
393 unsigned PSS3BD0 : 1;
394 unsigned PSS3BD1 : 1;
395 unsigned PSS3AC0 : 1;
396 unsigned PSS3AC1 : 1;
397 unsigned ECCP3AS0 : 1;
398 unsigned ECCP3AS1 : 1;
399 unsigned ECCP3AS2 : 1;
400 unsigned ECCP3ASE : 1;
401 };
402
403 struct
404 {
405 unsigned PSSBD0 : 1;
406 unsigned PSSBD1 : 1;
407 unsigned PSSAC0 : 1;
408 unsigned PSSAC1 : 1;
409 unsigned : 1;
410 unsigned : 1;
411 unsigned : 1;
412 unsigned : 1;
413 };
414
415 struct
416 {
417 unsigned PSS3BD : 2;
418 unsigned : 6;
419 };
420
421 struct
422 {
423 unsigned PSSBD : 2;
424 unsigned : 6;
425 };
426
427 struct
428 {
429 unsigned : 2;
430 unsigned PSSAC : 2;
431 unsigned : 4;
432 };
433
434 struct
435 {
436 unsigned : 2;
437 unsigned PSS3AC : 2;
438 unsigned : 4;
439 };
440
441 struct
442 {
443 unsigned : 4;
444 unsigned ECCP3AS : 3;
445 unsigned : 1;
446 };
447 } __ECCP3ASbits_t;
448
449 extern __at(0x0F6A) volatile __ECCP3ASbits_t ECCP3ASbits;
450
451 #define _ECCP3AS_PSS3BD0 0x01
452 #define _ECCP3AS_PSSBD0 0x01
453 #define _ECCP3AS_PSS3BD1 0x02
454 #define _ECCP3AS_PSSBD1 0x02
455 #define _ECCP3AS_PSS3AC0 0x04
456 #define _ECCP3AS_PSSAC0 0x04
457 #define _ECCP3AS_PSS3AC1 0x08
458 #define _ECCP3AS_PSSAC1 0x08
459 #define _ECCP3AS_ECCP3AS0 0x10
460 #define _ECCP3AS_ECCP3AS1 0x20
461 #define _ECCP3AS_ECCP3AS2 0x40
462 #define _ECCP3AS_ECCP3ASE 0x80
463
464 //==============================================================================
465
466
467 //==============================================================================
468 // RCSTA2 Bits
469
470 extern __at(0x0F6B) __sfr RCSTA2;
471
472 typedef union
473 {
474 struct
475 {
476 unsigned RX9D : 1;
477 unsigned OERR : 1;
478 unsigned FERR : 1;
479 unsigned ADDEN : 1;
480 unsigned CREN : 1;
481 unsigned SREN : 1;
482 unsigned RX9 : 1;
483 unsigned SPEN : 1;
484 };
485
486 struct
487 {
488 unsigned RX9D2 : 1;
489 unsigned OERR2 : 1;
490 unsigned FERR2 : 1;
491 unsigned ADEN : 1;
492 unsigned CREN2 : 1;
493 unsigned SREN2 : 1;
494 unsigned RX92 : 1;
495 unsigned SPEN2 : 1;
496 };
497
498 struct
499 {
500 unsigned : 1;
501 unsigned : 1;
502 unsigned : 1;
503 unsigned ADDEN2 : 1;
504 unsigned : 1;
505 unsigned : 1;
506 unsigned : 1;
507 unsigned : 1;
508 };
509
510 struct
511 {
512 unsigned : 1;
513 unsigned : 1;
514 unsigned : 1;
515 unsigned ADEN2 : 1;
516 unsigned : 1;
517 unsigned : 1;
518 unsigned : 1;
519 unsigned : 1;
520 };
521 } __RCSTA2bits_t;
522
523 extern __at(0x0F6B) volatile __RCSTA2bits_t RCSTA2bits;
524
525 #define _RCSTA2_RX9D 0x01
526 #define _RCSTA2_RX9D2 0x01
527 #define _RCSTA2_OERR 0x02
528 #define _RCSTA2_OERR2 0x02
529 #define _RCSTA2_FERR 0x04
530 #define _RCSTA2_FERR2 0x04
531 #define _RCSTA2_ADDEN 0x08
532 #define _RCSTA2_ADEN 0x08
533 #define _RCSTA2_ADDEN2 0x08
534 #define _RCSTA2_ADEN2 0x08
535 #define _RCSTA2_CREN 0x10
536 #define _RCSTA2_CREN2 0x10
537 #define _RCSTA2_SREN 0x20
538 #define _RCSTA2_SREN2 0x20
539 #define _RCSTA2_RX9 0x40
540 #define _RCSTA2_RX92 0x40
541 #define _RCSTA2_SPEN 0x80
542 #define _RCSTA2_SPEN2 0x80
543
544 //==============================================================================
545
546
547 //==============================================================================
548 // TXSTA2 Bits
549
550 extern __at(0x0F6C) __sfr TXSTA2;
551
552 typedef union
553 {
554 struct
555 {
556 unsigned TX9D : 1;
557 unsigned TRMT : 1;
558 unsigned BRGH : 1;
559 unsigned SENDB : 1;
560 unsigned SYNC : 1;
561 unsigned TXEN : 1;
562 unsigned TX9 : 1;
563 unsigned CSRC : 1;
564 };
565
566 struct
567 {
568 unsigned TX9D2 : 1;
569 unsigned TRMT2 : 1;
570 unsigned BRGH2 : 1;
571 unsigned SENDB2 : 1;
572 unsigned SYNC2 : 1;
573 unsigned TXEN2 : 1;
574 unsigned TX92 : 1;
575 unsigned CSRC2 : 1;
576 };
577 } __TXSTA2bits_t;
578
579 extern __at(0x0F6C) volatile __TXSTA2bits_t TXSTA2bits;
580
581 #define _TXSTA2_TX9D 0x01
582 #define _TXSTA2_TX9D2 0x01
583 #define _TXSTA2_TRMT 0x02
584 #define _TXSTA2_TRMT2 0x02
585 #define _TXSTA2_BRGH 0x04
586 #define _TXSTA2_BRGH2 0x04
587 #define _TXSTA2_SENDB 0x08
588 #define _TXSTA2_SENDB2 0x08
589 #define _TXSTA2_SYNC 0x10
590 #define _TXSTA2_SYNC2 0x10
591 #define _TXSTA2_TXEN 0x20
592 #define _TXSTA2_TXEN2 0x20
593 #define _TXSTA2_TX9 0x40
594 #define _TXSTA2_TX92 0x40
595 #define _TXSTA2_CSRC 0x80
596 #define _TXSTA2_CSRC2 0x80
597
598 //==============================================================================
599
600 extern __at(0x0F6D) __sfr TXREG2;
601 extern __at(0x0F6E) __sfr RCREG2;
602 extern __at(0x0F6F) __sfr SPBRG2;
603
604 //==============================================================================
605 // CCP5CON Bits
606
607 extern __at(0x0F70) __sfr CCP5CON;
608
609 typedef union
610 {
611 struct
612 {
613 unsigned CCP5M0 : 1;
614 unsigned CCP5M1 : 1;
615 unsigned CCP5M2 : 1;
616 unsigned CCP5M3 : 1;
617 unsigned CCP5Y : 1;
618 unsigned CCP5X : 1;
619 unsigned : 1;
620 unsigned : 1;
621 };
622
623 struct
624 {
625 unsigned : 1;
626 unsigned : 1;
627 unsigned : 1;
628 unsigned : 1;
629 unsigned DC5B0 : 1;
630 unsigned DC5B1 : 1;
631 unsigned : 1;
632 unsigned : 1;
633 };
634
635 struct
636 {
637 unsigned CCP5M : 4;
638 unsigned : 4;
639 };
640
641 struct
642 {
643 unsigned : 4;
644 unsigned DC5B : 2;
645 unsigned : 2;
646 };
647 } __CCP5CONbits_t;
648
649 extern __at(0x0F70) volatile __CCP5CONbits_t CCP5CONbits;
650
651 #define _CCP5M0 0x01
652 #define _CCP5M1 0x02
653 #define _CCP5M2 0x04
654 #define _CCP5M3 0x08
655 #define _CCP5Y 0x10
656 #define _DC5B0 0x10
657 #define _CCP5X 0x20
658 #define _DC5B1 0x20
659
660 //==============================================================================
661
662 extern __at(0x0F71) __sfr CCPR5;
663 extern __at(0x0F71) __sfr CCPR5L;
664 extern __at(0x0F72) __sfr CCPR5H;
665
666 //==============================================================================
667 // CCP4CON Bits
668
669 extern __at(0x0F73) __sfr CCP4CON;
670
671 typedef union
672 {
673 struct
674 {
675 unsigned CCP4M0 : 1;
676 unsigned CCP4M1 : 1;
677 unsigned CCP4M2 : 1;
678 unsigned CCP4M3 : 1;
679 unsigned CCP4Y : 1;
680 unsigned CCP4X : 1;
681 unsigned : 1;
682 unsigned : 1;
683 };
684
685 struct
686 {
687 unsigned : 1;
688 unsigned : 1;
689 unsigned : 1;
690 unsigned : 1;
691 unsigned DC4B0 : 1;
692 unsigned DC4B1 : 1;
693 unsigned : 1;
694 unsigned : 1;
695 };
696
697 struct
698 {
699 unsigned CCP4M : 4;
700 unsigned : 4;
701 };
702
703 struct
704 {
705 unsigned : 4;
706 unsigned DC4B : 2;
707 unsigned : 2;
708 };
709 } __CCP4CONbits_t;
710
711 extern __at(0x0F73) volatile __CCP4CONbits_t CCP4CONbits;
712
713 #define _CCP4M0 0x01
714 #define _CCP4M1 0x02
715 #define _CCP4M2 0x04
716 #define _CCP4M3 0x08
717 #define _CCP4Y 0x10
718 #define _DC4B0 0x10
719 #define _CCP4X 0x20
720 #define _DC4B1 0x20
721
722 //==============================================================================
723
724 extern __at(0x0F74) __sfr CCPR4;
725 extern __at(0x0F74) __sfr CCPR4L;
726 extern __at(0x0F75) __sfr CCPR4H;
727
728 //==============================================================================
729 // T4CON Bits
730
731 extern __at(0x0F76) __sfr T4CON;
732
733 typedef union
734 {
735 struct
736 {
737 unsigned T4CKPS0 : 1;
738 unsigned T4CKPS1 : 1;
739 unsigned TMR4ON : 1;
740 unsigned TOUTPS0 : 1;
741 unsigned TOUTPS1 : 1;
742 unsigned TOUTPS2 : 1;
743 unsigned TOUTPS3 : 1;
744 unsigned : 1;
745 };
746
747 struct
748 {
749 unsigned : 1;
750 unsigned : 1;
751 unsigned : 1;
752 unsigned T4OUTPS0 : 1;
753 unsigned T4OUTPS1 : 1;
754 unsigned T4OUTPS2 : 1;
755 unsigned T4OUTPS3 : 1;
756 unsigned : 1;
757 };
758
759 struct
760 {
761 unsigned T4CKPS : 2;
762 unsigned : 6;
763 };
764
765 struct
766 {
767 unsigned : 3;
768 unsigned T4OUTPS : 4;
769 unsigned : 1;
770 };
771
772 struct
773 {
774 unsigned : 3;
775 unsigned TOUTPS : 4;
776 unsigned : 1;
777 };
778 } __T4CONbits_t;
779
780 extern __at(0x0F76) volatile __T4CONbits_t T4CONbits;
781
782 #define _T4CKPS0 0x01
783 #define _T4CKPS1 0x02
784 #define _TMR4ON 0x04
785 #define _TOUTPS0 0x08
786 #define _T4OUTPS0 0x08
787 #define _TOUTPS1 0x10
788 #define _T4OUTPS1 0x10
789 #define _TOUTPS2 0x20
790 #define _T4OUTPS2 0x20
791 #define _TOUTPS3 0x40
792 #define _T4OUTPS3 0x40
793
794 //==============================================================================
795
796 extern __at(0x0F77) __sfr PR4;
797 extern __at(0x0F78) __sfr TMR4;
798
799 //==============================================================================
800 // ECCP1DEL Bits
801
802 extern __at(0x0F79) __sfr ECCP1DEL;
803
804 typedef union
805 {
806 struct
807 {
808 unsigned P1DC0 : 1;
809 unsigned P1DC1 : 1;
810 unsigned P1DC2 : 1;
811 unsigned P1DC3 : 1;
812 unsigned P1DC4 : 1;
813 unsigned P1DC5 : 1;
814 unsigned P1DC6 : 1;
815 unsigned P1RSEN : 1;
816 };
817
818 struct
819 {
820 unsigned PDC0 : 1;
821 unsigned PDC1 : 1;
822 unsigned PDC2 : 1;
823 unsigned PDC3 : 1;
824 unsigned PDC4 : 1;
825 unsigned PDC5 : 1;
826 unsigned PDC6 : 1;
827 unsigned P1DC7 : 1;
828 };
829
830 struct
831 {
832 unsigned : 1;
833 unsigned : 1;
834 unsigned : 1;
835 unsigned : 1;
836 unsigned : 1;
837 unsigned : 1;
838 unsigned : 1;
839 unsigned PRSEN : 1;
840 };
841
842 struct
843 {
844 unsigned PDC : 7;
845 unsigned : 1;
846 };
847 } __ECCP1DELbits_t;
848
849 extern __at(0x0F79) volatile __ECCP1DELbits_t ECCP1DELbits;
850
851 #define _P1DC0 0x01
852 #define _PDC0 0x01
853 #define _P1DC1 0x02
854 #define _PDC1 0x02
855 #define _P1DC2 0x04
856 #define _PDC2 0x04
857 #define _P1DC3 0x08
858 #define _PDC3 0x08
859 #define _P1DC4 0x10
860 #define _PDC4 0x10
861 #define _P1DC5 0x20
862 #define _PDC5 0x20
863 #define _P1DC6 0x40
864 #define _PDC6 0x40
865 #define _P1RSEN 0x80
866 #define _P1DC7 0x80
867 #define _PRSEN 0x80
868
869 //==============================================================================
870
871
872 //==============================================================================
873 // PWM1CON Bits
874
875 extern __at(0x0F79) __sfr PWM1CON;
876
877 typedef union
878 {
879 struct
880 {
881 unsigned P1DC0 : 1;
882 unsigned P1DC1 : 1;
883 unsigned P1DC2 : 1;
884 unsigned P1DC3 : 1;
885 unsigned P1DC4 : 1;
886 unsigned P1DC5 : 1;
887 unsigned P1DC6 : 1;
888 unsigned P1RSEN : 1;
889 };
890
891 struct
892 {
893 unsigned PDC0 : 1;
894 unsigned PDC1 : 1;
895 unsigned PDC2 : 1;
896 unsigned PDC3 : 1;
897 unsigned PDC4 : 1;
898 unsigned PDC5 : 1;
899 unsigned PDC6 : 1;
900 unsigned P1DC7 : 1;
901 };
902
903 struct
904 {
905 unsigned : 1;
906 unsigned : 1;
907 unsigned : 1;
908 unsigned : 1;
909 unsigned : 1;
910 unsigned : 1;
911 unsigned : 1;
912 unsigned PRSEN : 1;
913 };
914
915 struct
916 {
917 unsigned PDC : 7;
918 unsigned : 1;
919 };
920 } __PWM1CONbits_t;
921
922 extern __at(0x0F79) volatile __PWM1CONbits_t PWM1CONbits;
923
924 #define _PWM1CON_P1DC0 0x01
925 #define _PWM1CON_PDC0 0x01
926 #define _PWM1CON_P1DC1 0x02
927 #define _PWM1CON_PDC1 0x02
928 #define _PWM1CON_P1DC2 0x04
929 #define _PWM1CON_PDC2 0x04
930 #define _PWM1CON_P1DC3 0x08
931 #define _PWM1CON_PDC3 0x08
932 #define _PWM1CON_P1DC4 0x10
933 #define _PWM1CON_PDC4 0x10
934 #define _PWM1CON_P1DC5 0x20
935 #define _PWM1CON_PDC5 0x20
936 #define _PWM1CON_P1DC6 0x40
937 #define _PWM1CON_PDC6 0x40
938 #define _PWM1CON_P1RSEN 0x80
939 #define _PWM1CON_P1DC7 0x80
940 #define _PWM1CON_PRSEN 0x80
941
942 //==============================================================================
943
944
945 //==============================================================================
946 // BAUDCON2 Bits
947
948 extern __at(0x0F7C) __sfr BAUDCON2;
949
950 typedef union
951 {
952 struct
953 {
954 unsigned ABDEN : 1;
955 unsigned WUE : 1;
956 unsigned : 1;
957 unsigned BRG16 : 1;
958 unsigned SCKP : 1;
959 unsigned : 1;
960 unsigned RCIDL : 1;
961 unsigned : 1;
962 };
963
964 struct
965 {
966 unsigned ABDEN2 : 1;
967 unsigned WUE2 : 1;
968 unsigned : 1;
969 unsigned BRG162 : 1;
970 unsigned SCKP2 : 1;
971 unsigned : 1;
972 unsigned RCMT : 1;
973 unsigned : 1;
974 };
975
976 struct
977 {
978 unsigned : 1;
979 unsigned : 1;
980 unsigned : 1;
981 unsigned : 1;
982 unsigned : 1;
983 unsigned : 1;
984 unsigned RCIDL2 : 1;
985 unsigned : 1;
986 };
987 } __BAUDCON2bits_t;
988
989 extern __at(0x0F7C) volatile __BAUDCON2bits_t BAUDCON2bits;
990
991 #define _BAUDCON2_ABDEN 0x01
992 #define _BAUDCON2_ABDEN2 0x01
993 #define _BAUDCON2_WUE 0x02
994 #define _BAUDCON2_WUE2 0x02
995 #define _BAUDCON2_BRG16 0x08
996 #define _BAUDCON2_BRG162 0x08
997 #define _BAUDCON2_SCKP 0x10
998 #define _BAUDCON2_SCKP2 0x10
999 #define _BAUDCON2_RCIDL 0x40
1000 #define _BAUDCON2_RCMT 0x40
1001 #define _BAUDCON2_RCIDL2 0x40
1002
1003 //==============================================================================
1004
1005
1006 //==============================================================================
1007 // BAUDCTL2 Bits
1008
1009 extern __at(0x0F7C) __sfr BAUDCTL2;
1010
1011 typedef union
1012 {
1013 struct
1014 {
1015 unsigned ABDEN : 1;
1016 unsigned WUE : 1;
1017 unsigned : 1;
1018 unsigned BRG16 : 1;
1019 unsigned SCKP : 1;
1020 unsigned : 1;
1021 unsigned RCIDL : 1;
1022 unsigned : 1;
1023 };
1024
1025 struct
1026 {
1027 unsigned ABDEN2 : 1;
1028 unsigned WUE2 : 1;
1029 unsigned : 1;
1030 unsigned BRG162 : 1;
1031 unsigned SCKP2 : 1;
1032 unsigned : 1;
1033 unsigned RCMT : 1;
1034 unsigned : 1;
1035 };
1036
1037 struct
1038 {
1039 unsigned : 1;
1040 unsigned : 1;
1041 unsigned : 1;
1042 unsigned : 1;
1043 unsigned : 1;
1044 unsigned : 1;
1045 unsigned RCIDL2 : 1;
1046 unsigned : 1;
1047 };
1048 } __BAUDCTL2bits_t;
1049
1050 extern __at(0x0F7C) volatile __BAUDCTL2bits_t BAUDCTL2bits;
1051
1052 #define _BAUDCTL2_ABDEN 0x01
1053 #define _BAUDCTL2_ABDEN2 0x01
1054 #define _BAUDCTL2_WUE 0x02
1055 #define _BAUDCTL2_WUE2 0x02
1056 #define _BAUDCTL2_BRG16 0x08
1057 #define _BAUDCTL2_BRG162 0x08
1058 #define _BAUDCTL2_SCKP 0x10
1059 #define _BAUDCTL2_SCKP2 0x10
1060 #define _BAUDCTL2_RCIDL 0x40
1061 #define _BAUDCTL2_RCMT 0x40
1062 #define _BAUDCTL2_RCIDL2 0x40
1063
1064 //==============================================================================
1065
1066 extern __at(0x0F7D) __sfr SPBRGH2;
1067
1068 //==============================================================================
1069 // BAUDCON Bits
1070
1071 extern __at(0x0F7E) __sfr BAUDCON;
1072
1073 typedef union
1074 {
1075 struct
1076 {
1077 unsigned ABDEN : 1;
1078 unsigned WUE : 1;
1079 unsigned : 1;
1080 unsigned BRG16 : 1;
1081 unsigned SCKP : 1;
1082 unsigned : 1;
1083 unsigned RCIDL : 1;
1084 unsigned : 1;
1085 };
1086
1087 struct
1088 {
1089 unsigned : 1;
1090 unsigned : 1;
1091 unsigned : 1;
1092 unsigned : 1;
1093 unsigned : 1;
1094 unsigned : 1;
1095 unsigned RCMT : 1;
1096 unsigned : 1;
1097 };
1098 } __BAUDCONbits_t;
1099
1100 extern __at(0x0F7E) volatile __BAUDCONbits_t BAUDCONbits;
1101
1102 #define _ABDEN 0x01
1103 #define _WUE 0x02
1104 #define _BRG16 0x08
1105 #define _SCKP 0x10
1106 #define _RCIDL 0x40
1107 #define _RCMT 0x40
1108
1109 //==============================================================================
1110
1111
1112 //==============================================================================
1113 // BAUDCON1 Bits
1114
1115 extern __at(0x0F7E) __sfr BAUDCON1;
1116
1117 typedef union
1118 {
1119 struct
1120 {
1121 unsigned ABDEN : 1;
1122 unsigned WUE : 1;
1123 unsigned : 1;
1124 unsigned BRG16 : 1;
1125 unsigned SCKP : 1;
1126 unsigned : 1;
1127 unsigned RCIDL : 1;
1128 unsigned : 1;
1129 };
1130
1131 struct
1132 {
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1138 unsigned : 1;
1139 unsigned RCMT : 1;
1140 unsigned : 1;
1141 };
1142 } __BAUDCON1bits_t;
1143
1144 extern __at(0x0F7E) volatile __BAUDCON1bits_t BAUDCON1bits;
1145
1146 #define _BAUDCON1_ABDEN 0x01
1147 #define _BAUDCON1_WUE 0x02
1148 #define _BAUDCON1_BRG16 0x08
1149 #define _BAUDCON1_SCKP 0x10
1150 #define _BAUDCON1_RCIDL 0x40
1151 #define _BAUDCON1_RCMT 0x40
1152
1153 //==============================================================================
1154
1155
1156 //==============================================================================
1157 // BAUDCTL1 Bits
1158
1159 extern __at(0x0F7E) __sfr BAUDCTL1;
1160
1161 typedef union
1162 {
1163 struct
1164 {
1165 unsigned ABDEN : 1;
1166 unsigned WUE : 1;
1167 unsigned : 1;
1168 unsigned BRG16 : 1;
1169 unsigned SCKP : 1;
1170 unsigned : 1;
1171 unsigned RCIDL : 1;
1172 unsigned : 1;
1173 };
1174
1175 struct
1176 {
1177 unsigned : 1;
1178 unsigned : 1;
1179 unsigned : 1;
1180 unsigned : 1;
1181 unsigned : 1;
1182 unsigned : 1;
1183 unsigned RCMT : 1;
1184 unsigned : 1;
1185 };
1186 } __BAUDCTL1bits_t;
1187
1188 extern __at(0x0F7E) volatile __BAUDCTL1bits_t BAUDCTL1bits;
1189
1190 #define _BAUDCTL1_ABDEN 0x01
1191 #define _BAUDCTL1_WUE 0x02
1192 #define _BAUDCTL1_BRG16 0x08
1193 #define _BAUDCTL1_SCKP 0x10
1194 #define _BAUDCTL1_RCIDL 0x40
1195 #define _BAUDCTL1_RCMT 0x40
1196
1197 //==============================================================================
1198
1199 extern __at(0x0F7F) __sfr SPBRGH;
1200 extern __at(0x0F7F) __sfr SPBRGH1;
1201
1202 //==============================================================================
1203 // PORTA Bits
1204
1205 extern __at(0x0F80) __sfr PORTA;
1206
1207 typedef union
1208 {
1209 struct
1210 {
1211 unsigned RA0 : 1;
1212 unsigned RA1 : 1;
1213 unsigned RA2 : 1;
1214 unsigned RA3 : 1;
1215 unsigned RA4 : 1;
1216 unsigned RA5 : 1;
1217 unsigned RA6 : 1;
1218 unsigned : 1;
1219 };
1220
1221 struct
1222 {
1223 unsigned AN0 : 1;
1224 unsigned AN1 : 1;
1225 unsigned AN2 : 1;
1226 unsigned AN3 : 1;
1227 unsigned T0CKI : 1;
1228 unsigned AN4 : 1;
1229 unsigned OSC2 : 1;
1230 unsigned : 1;
1231 };
1232
1233 struct
1234 {
1235 unsigned : 1;
1236 unsigned : 1;
1237 unsigned VREFM : 1;
1238 unsigned VREFP : 1;
1239 unsigned : 1;
1240 unsigned LVDIN : 1;
1241 unsigned CLKO : 1;
1242 unsigned : 1;
1243 };
1244
1245 struct
1246 {
1247 unsigned RA : 7;
1248 unsigned : 1;
1249 };
1250 } __PORTAbits_t;
1251
1252 extern __at(0x0F80) volatile __PORTAbits_t PORTAbits;
1253
1254 #define _PORTA_RA0 0x01
1255 #define _PORTA_AN0 0x01
1256 #define _PORTA_RA1 0x02
1257 #define _PORTA_AN1 0x02
1258 #define _PORTA_RA2 0x04
1259 #define _PORTA_AN2 0x04
1260 #define _PORTA_VREFM 0x04
1261 #define _PORTA_RA3 0x08
1262 #define _PORTA_AN3 0x08
1263 #define _PORTA_VREFP 0x08
1264 #define _PORTA_RA4 0x10
1265 #define _PORTA_T0CKI 0x10
1266 #define _PORTA_RA5 0x20
1267 #define _PORTA_AN4 0x20
1268 #define _PORTA_LVDIN 0x20
1269 #define _PORTA_RA6 0x40
1270 #define _PORTA_OSC2 0x40
1271 #define _PORTA_CLKO 0x40
1272
1273 //==============================================================================
1274
1275
1276 //==============================================================================
1277 // PORTB Bits
1278
1279 extern __at(0x0F81) __sfr PORTB;
1280
1281 typedef union
1282 {
1283 struct
1284 {
1285 unsigned RB0 : 1;
1286 unsigned RB1 : 1;
1287 unsigned RB2 : 1;
1288 unsigned RB3 : 1;
1289 unsigned RB4 : 1;
1290 unsigned RB5 : 1;
1291 unsigned RB6 : 1;
1292 unsigned RB7 : 1;
1293 };
1294
1295 struct
1296 {
1297 unsigned INT0 : 1;
1298 unsigned INT1 : 1;
1299 unsigned INT2 : 1;
1300 unsigned INT3 : 1;
1301 unsigned KBI0 : 1;
1302 unsigned KBI1 : 1;
1303 unsigned KBI2 : 1;
1304 unsigned KBI3 : 1;
1305 };
1306
1307 struct
1308 {
1309 unsigned : 1;
1310 unsigned : 1;
1311 unsigned : 1;
1312 unsigned : 1;
1313 unsigned : 1;
1314 unsigned PGM : 1;
1315 unsigned PGC : 1;
1316 unsigned PGD : 1;
1317 };
1318
1319 struct
1320 {
1321 unsigned INT : 4;
1322 unsigned : 4;
1323 };
1324
1325 struct
1326 {
1327 unsigned : 4;
1328 unsigned KBI : 4;
1329 };
1330 } __PORTBbits_t;
1331
1332 extern __at(0x0F81) volatile __PORTBbits_t PORTBbits;
1333
1334 #define _PORTB_RB0 0x01
1335 #define _PORTB_INT0 0x01
1336 #define _PORTB_RB1 0x02
1337 #define _PORTB_INT1 0x02
1338 #define _PORTB_RB2 0x04
1339 #define _PORTB_INT2 0x04
1340 #define _PORTB_RB3 0x08
1341 #define _PORTB_INT3 0x08
1342 #define _PORTB_RB4 0x10
1343 #define _PORTB_KBI0 0x10
1344 #define _PORTB_RB5 0x20
1345 #define _PORTB_KBI1 0x20
1346 #define _PORTB_PGM 0x20
1347 #define _PORTB_RB6 0x40
1348 #define _PORTB_KBI2 0x40
1349 #define _PORTB_PGC 0x40
1350 #define _PORTB_RB7 0x80
1351 #define _PORTB_KBI3 0x80
1352 #define _PORTB_PGD 0x80
1353
1354 //==============================================================================
1355
1356
1357 //==============================================================================
1358 // PORTC Bits
1359
1360 extern __at(0x0F82) __sfr PORTC;
1361
1362 typedef union
1363 {
1364 struct
1365 {
1366 unsigned RC0 : 1;
1367 unsigned RC1 : 1;
1368 unsigned RC2 : 1;
1369 unsigned RC3 : 1;
1370 unsigned RC4 : 1;
1371 unsigned RC5 : 1;
1372 unsigned RC6 : 1;
1373 unsigned RC7 : 1;
1374 };
1375
1376 struct
1377 {
1378 unsigned T1OSO : 1;
1379 unsigned T1OSI : 1;
1380 unsigned CCP1 : 1;
1381 unsigned SCK : 1;
1382 unsigned SDI : 1;
1383 unsigned SDO : 1;
1384 unsigned TX1 : 1;
1385 unsigned RX1 : 1;
1386 };
1387
1388 struct
1389 {
1390 unsigned T13CKI : 1;
1391 unsigned : 1;
1392 unsigned P1A : 1;
1393 unsigned SCL : 1;
1394 unsigned SDA : 1;
1395 unsigned : 1;
1396 unsigned CK1 : 1;
1397 unsigned DT1 : 1;
1398 };
1399 } __PORTCbits_t;
1400
1401 extern __at(0x0F82) volatile __PORTCbits_t PORTCbits;
1402
1403 #define _PORTC_RC0 0x01
1404 #define _PORTC_T1OSO 0x01
1405 #define _PORTC_T13CKI 0x01
1406 #define _PORTC_RC1 0x02
1407 #define _PORTC_T1OSI 0x02
1408 #define _PORTC_RC2 0x04
1409 #define _PORTC_CCP1 0x04
1410 #define _PORTC_P1A 0x04
1411 #define _PORTC_RC3 0x08
1412 #define _PORTC_SCK 0x08
1413 #define _PORTC_SCL 0x08
1414 #define _PORTC_RC4 0x10
1415 #define _PORTC_SDI 0x10
1416 #define _PORTC_SDA 0x10
1417 #define _PORTC_RC5 0x20
1418 #define _PORTC_SDO 0x20
1419 #define _PORTC_RC6 0x40
1420 #define _PORTC_TX1 0x40
1421 #define _PORTC_CK1 0x40
1422 #define _PORTC_RC7 0x80
1423 #define _PORTC_RX1 0x80
1424 #define _PORTC_DT1 0x80
1425
1426 //==============================================================================
1427
1428
1429 //==============================================================================
1430 // PORTD Bits
1431
1432 extern __at(0x0F83) __sfr PORTD;
1433
1434 typedef union
1435 {
1436 struct
1437 {
1438 unsigned RD0 : 1;
1439 unsigned RD1 : 1;
1440 unsigned RD2 : 1;
1441 unsigned RD3 : 1;
1442 unsigned RD4 : 1;
1443 unsigned RD5 : 1;
1444 unsigned RD6 : 1;
1445 unsigned RD7 : 1;
1446 };
1447
1448 struct
1449 {
1450 unsigned PSP0 : 1;
1451 unsigned PSP1 : 1;
1452 unsigned PSP2 : 1;
1453 unsigned PSP3 : 1;
1454 unsigned PSP4 : 1;
1455 unsigned PSP5 : 1;
1456 unsigned PSP6 : 1;
1457 unsigned PSP7 : 1;
1458 };
1459 } __PORTDbits_t;
1460
1461 extern __at(0x0F83) volatile __PORTDbits_t PORTDbits;
1462
1463 #define _PORTD_RD0 0x01
1464 #define _PORTD_PSP0 0x01
1465 #define _PORTD_RD1 0x02
1466 #define _PORTD_PSP1 0x02
1467 #define _PORTD_RD2 0x04
1468 #define _PORTD_PSP2 0x04
1469 #define _PORTD_RD3 0x08
1470 #define _PORTD_PSP3 0x08
1471 #define _PORTD_RD4 0x10
1472 #define _PORTD_PSP4 0x10
1473 #define _PORTD_RD5 0x20
1474 #define _PORTD_PSP5 0x20
1475 #define _PORTD_RD6 0x40
1476 #define _PORTD_PSP6 0x40
1477 #define _PORTD_RD7 0x80
1478 #define _PORTD_PSP7 0x80
1479
1480 //==============================================================================
1481
1482
1483 //==============================================================================
1484 // PORTE Bits
1485
1486 extern __at(0x0F84) __sfr PORTE;
1487
1488 typedef union
1489 {
1490 struct
1491 {
1492 unsigned RE0 : 1;
1493 unsigned RE1 : 1;
1494 unsigned RE2 : 1;
1495 unsigned RE3 : 1;
1496 unsigned RE4 : 1;
1497 unsigned RE5 : 1;
1498 unsigned RE6 : 1;
1499 unsigned RE7 : 1;
1500 };
1501
1502 struct
1503 {
1504 unsigned RD : 1;
1505 unsigned WR : 1;
1506 unsigned CS : 1;
1507 unsigned P3C : 1;
1508 unsigned P3B : 1;
1509 unsigned P1C : 1;
1510 unsigned P1B : 1;
1511 unsigned : 1;
1512 };
1513
1514 struct
1515 {
1516 unsigned P2D : 1;
1517 unsigned P2C : 1;
1518 unsigned P2B : 1;
1519 unsigned : 1;
1520 unsigned : 1;
1521 unsigned : 1;
1522 unsigned : 1;
1523 unsigned : 1;
1524 };
1525 } __PORTEbits_t;
1526
1527 extern __at(0x0F84) volatile __PORTEbits_t PORTEbits;
1528
1529 #define _PORTE_RE0 0x01
1530 #define _PORTE_RD 0x01
1531 #define _PORTE_P2D 0x01
1532 #define _PORTE_RE1 0x02
1533 #define _PORTE_WR 0x02
1534 #define _PORTE_P2C 0x02
1535 #define _PORTE_RE2 0x04
1536 #define _PORTE_CS 0x04
1537 #define _PORTE_P2B 0x04
1538 #define _PORTE_RE3 0x08
1539 #define _PORTE_P3C 0x08
1540 #define _PORTE_RE4 0x10
1541 #define _PORTE_P3B 0x10
1542 #define _PORTE_RE5 0x20
1543 #define _PORTE_P1C 0x20
1544 #define _PORTE_RE6 0x40
1545 #define _PORTE_P1B 0x40
1546 #define _PORTE_RE7 0x80
1547
1548 //==============================================================================
1549
1550
1551 //==============================================================================
1552 // PORTF Bits
1553
1554 extern __at(0x0F85) __sfr PORTF;
1555
1556 typedef union
1557 {
1558 struct
1559 {
1560 unsigned RF0 : 1;
1561 unsigned RF1 : 1;
1562 unsigned RF2 : 1;
1563 unsigned RF3 : 1;
1564 unsigned RF4 : 1;
1565 unsigned RF5 : 1;
1566 unsigned RF6 : 1;
1567 unsigned RF7 : 1;
1568 };
1569
1570 struct
1571 {
1572 unsigned AN5 : 1;
1573 unsigned AN6 : 1;
1574 unsigned AN7 : 1;
1575 unsigned AN8 : 1;
1576 unsigned AN9 : 1;
1577 unsigned AN10 : 1;
1578 unsigned AN11 : 1;
1579 unsigned SS : 1;
1580 };
1581
1582 struct
1583 {
1584 unsigned : 1;
1585 unsigned C2OUTF : 1;
1586 unsigned C1OUTF : 1;
1587 unsigned : 1;
1588 unsigned : 1;
1589 unsigned CVREFF : 1;
1590 unsigned : 1;
1591 unsigned : 1;
1592 };
1593 } __PORTFbits_t;
1594
1595 extern __at(0x0F85) volatile __PORTFbits_t PORTFbits;
1596
1597 #define _PORTF_RF0 0x01
1598 #define _PORTF_AN5 0x01
1599 #define _PORTF_RF1 0x02
1600 #define _PORTF_AN6 0x02
1601 #define _PORTF_C2OUTF 0x02
1602 #define _PORTF_RF2 0x04
1603 #define _PORTF_AN7 0x04
1604 #define _PORTF_C1OUTF 0x04
1605 #define _PORTF_RF3 0x08
1606 #define _PORTF_AN8 0x08
1607 #define _PORTF_RF4 0x10
1608 #define _PORTF_AN9 0x10
1609 #define _PORTF_RF5 0x20
1610 #define _PORTF_AN10 0x20
1611 #define _PORTF_CVREFF 0x20
1612 #define _PORTF_RF6 0x40
1613 #define _PORTF_AN11 0x40
1614 #define _PORTF_RF7 0x80
1615 #define _PORTF_SS 0x80
1616
1617 //==============================================================================
1618
1619
1620 //==============================================================================
1621 // PORTG Bits
1622
1623 extern __at(0x0F86) __sfr PORTG;
1624
1625 typedef union
1626 {
1627 struct
1628 {
1629 unsigned RG0 : 1;
1630 unsigned RG1 : 1;
1631 unsigned RG2 : 1;
1632 unsigned RG3 : 1;
1633 unsigned RG4 : 1;
1634 unsigned RG5 : 1;
1635 unsigned : 1;
1636 unsigned : 1;
1637 };
1638
1639 struct
1640 {
1641 unsigned CCP3 : 1;
1642 unsigned TX2 : 1;
1643 unsigned RX2 : 1;
1644 unsigned CCP4 : 1;
1645 unsigned CCP5 : 1;
1646 unsigned MCLR : 1;
1647 unsigned : 1;
1648 unsigned : 1;
1649 };
1650
1651 struct
1652 {
1653 unsigned P3A : 1;
1654 unsigned CK2 : 1;
1655 unsigned DT2 : 1;
1656 unsigned P3D : 1;
1657 unsigned P1D : 1;
1658 unsigned VPP : 1;
1659 unsigned : 1;
1660 unsigned : 1;
1661 };
1662
1663 struct
1664 {
1665 unsigned RG : 6;
1666 unsigned : 2;
1667 };
1668 } __PORTGbits_t;
1669
1670 extern __at(0x0F86) volatile __PORTGbits_t PORTGbits;
1671
1672 #define _PORTG_RG0 0x01
1673 #define _PORTG_CCP3 0x01
1674 #define _PORTG_P3A 0x01
1675 #define _PORTG_RG1 0x02
1676 #define _PORTG_TX2 0x02
1677 #define _PORTG_CK2 0x02
1678 #define _PORTG_RG2 0x04
1679 #define _PORTG_RX2 0x04
1680 #define _PORTG_DT2 0x04
1681 #define _PORTG_RG3 0x08
1682 #define _PORTG_CCP4 0x08
1683 #define _PORTG_P3D 0x08
1684 #define _PORTG_RG4 0x10
1685 #define _PORTG_CCP5 0x10
1686 #define _PORTG_P1D 0x10
1687 #define _PORTG_RG5 0x20
1688 #define _PORTG_MCLR 0x20
1689 #define _PORTG_VPP 0x20
1690
1691 //==============================================================================
1692
1693
1694 //==============================================================================
1695 // LATA Bits
1696
1697 extern __at(0x0F89) __sfr LATA;
1698
1699 typedef union
1700 {
1701 struct
1702 {
1703 unsigned LATA0 : 1;
1704 unsigned LATA1 : 1;
1705 unsigned LATA2 : 1;
1706 unsigned LATA3 : 1;
1707 unsigned LATA4 : 1;
1708 unsigned LATA5 : 1;
1709 unsigned LATA6 : 1;
1710 unsigned : 1;
1711 };
1712
1713 struct
1714 {
1715 unsigned LATA : 7;
1716 unsigned : 1;
1717 };
1718 } __LATAbits_t;
1719
1720 extern __at(0x0F89) volatile __LATAbits_t LATAbits;
1721
1722 #define _LATA0 0x01
1723 #define _LATA1 0x02
1724 #define _LATA2 0x04
1725 #define _LATA3 0x08
1726 #define _LATA4 0x10
1727 #define _LATA5 0x20
1728 #define _LATA6 0x40
1729
1730 //==============================================================================
1731
1732
1733 //==============================================================================
1734 // LATB Bits
1735
1736 extern __at(0x0F8A) __sfr LATB;
1737
1738 typedef struct
1739 {
1740 unsigned LATB0 : 1;
1741 unsigned LATB1 : 1;
1742 unsigned LATB2 : 1;
1743 unsigned LATB3 : 1;
1744 unsigned LATB4 : 1;
1745 unsigned LATB5 : 1;
1746 unsigned LATB6 : 1;
1747 unsigned LATB7 : 1;
1748 } __LATBbits_t;
1749
1750 extern __at(0x0F8A) volatile __LATBbits_t LATBbits;
1751
1752 #define _LATB0 0x01
1753 #define _LATB1 0x02
1754 #define _LATB2 0x04
1755 #define _LATB3 0x08
1756 #define _LATB4 0x10
1757 #define _LATB5 0x20
1758 #define _LATB6 0x40
1759 #define _LATB7 0x80
1760
1761 //==============================================================================
1762
1763
1764 //==============================================================================
1765 // LATC Bits
1766
1767 extern __at(0x0F8B) __sfr LATC;
1768
1769 typedef struct
1770 {
1771 unsigned LATC0 : 1;
1772 unsigned LATC1 : 1;
1773 unsigned LATC2 : 1;
1774 unsigned LATC3 : 1;
1775 unsigned LATC4 : 1;
1776 unsigned LATC5 : 1;
1777 unsigned LATC6 : 1;
1778 unsigned LATC7 : 1;
1779 } __LATCbits_t;
1780
1781 extern __at(0x0F8B) volatile __LATCbits_t LATCbits;
1782
1783 #define _LATC0 0x01
1784 #define _LATC1 0x02
1785 #define _LATC2 0x04
1786 #define _LATC3 0x08
1787 #define _LATC4 0x10
1788 #define _LATC5 0x20
1789 #define _LATC6 0x40
1790 #define _LATC7 0x80
1791
1792 //==============================================================================
1793
1794
1795 //==============================================================================
1796 // LATD Bits
1797
1798 extern __at(0x0F8C) __sfr LATD;
1799
1800 typedef struct
1801 {
1802 unsigned LATD0 : 1;
1803 unsigned LATD1 : 1;
1804 unsigned LATD2 : 1;
1805 unsigned LATD3 : 1;
1806 unsigned LATD4 : 1;
1807 unsigned LATD5 : 1;
1808 unsigned LATD6 : 1;
1809 unsigned LATD7 : 1;
1810 } __LATDbits_t;
1811
1812 extern __at(0x0F8C) volatile __LATDbits_t LATDbits;
1813
1814 #define _LATD0 0x01
1815 #define _LATD1 0x02
1816 #define _LATD2 0x04
1817 #define _LATD3 0x08
1818 #define _LATD4 0x10
1819 #define _LATD5 0x20
1820 #define _LATD6 0x40
1821 #define _LATD7 0x80
1822
1823 //==============================================================================
1824
1825
1826 //==============================================================================
1827 // LATE Bits
1828
1829 extern __at(0x0F8D) __sfr LATE;
1830
1831 typedef struct
1832 {
1833 unsigned LATE0 : 1;
1834 unsigned LATE1 : 1;
1835 unsigned LATE2 : 1;
1836 unsigned LATE3 : 1;
1837 unsigned LATE4 : 1;
1838 unsigned LATE5 : 1;
1839 unsigned LATE6 : 1;
1840 unsigned LATE7 : 1;
1841 } __LATEbits_t;
1842
1843 extern __at(0x0F8D) volatile __LATEbits_t LATEbits;
1844
1845 #define _LATE0 0x01
1846 #define _LATE1 0x02
1847 #define _LATE2 0x04
1848 #define _LATE3 0x08
1849 #define _LATE4 0x10
1850 #define _LATE5 0x20
1851 #define _LATE6 0x40
1852 #define _LATE7 0x80
1853
1854 //==============================================================================
1855
1856
1857 //==============================================================================
1858 // LATF Bits
1859
1860 extern __at(0x0F8E) __sfr LATF;
1861
1862 typedef struct
1863 {
1864 unsigned LATF0 : 1;
1865 unsigned LATF1 : 1;
1866 unsigned LATF2 : 1;
1867 unsigned LATF3 : 1;
1868 unsigned LATF4 : 1;
1869 unsigned LATF5 : 1;
1870 unsigned LATF6 : 1;
1871 unsigned LATF7 : 1;
1872 } __LATFbits_t;
1873
1874 extern __at(0x0F8E) volatile __LATFbits_t LATFbits;
1875
1876 #define _LATF0 0x01
1877 #define _LATF1 0x02
1878 #define _LATF2 0x04
1879 #define _LATF3 0x08
1880 #define _LATF4 0x10
1881 #define _LATF5 0x20
1882 #define _LATF6 0x40
1883 #define _LATF7 0x80
1884
1885 //==============================================================================
1886
1887
1888 //==============================================================================
1889 // LATG Bits
1890
1891 extern __at(0x0F8F) __sfr LATG;
1892
1893 typedef union
1894 {
1895 struct
1896 {
1897 unsigned LATG0 : 1;
1898 unsigned LATG1 : 1;
1899 unsigned LATG2 : 1;
1900 unsigned LATG3 : 1;
1901 unsigned LATG4 : 1;
1902 unsigned : 1;
1903 unsigned : 1;
1904 unsigned : 1;
1905 };
1906
1907 struct
1908 {
1909 unsigned LATG : 5;
1910 unsigned : 3;
1911 };
1912 } __LATGbits_t;
1913
1914 extern __at(0x0F8F) volatile __LATGbits_t LATGbits;
1915
1916 #define _LATG0 0x01
1917 #define _LATG1 0x02
1918 #define _LATG2 0x04
1919 #define _LATG3 0x08
1920 #define _LATG4 0x10
1921
1922 //==============================================================================
1923
1924
1925 //==============================================================================
1926 // DDRA Bits
1927
1928 extern __at(0x0F92) __sfr DDRA;
1929
1930 typedef union
1931 {
1932 struct
1933 {
1934 unsigned TRISA0 : 1;
1935 unsigned TRISA1 : 1;
1936 unsigned TRISA2 : 1;
1937 unsigned TRISA3 : 1;
1938 unsigned TRISA4 : 1;
1939 unsigned TRISA5 : 1;
1940 unsigned TRISA6 : 1;
1941 unsigned : 1;
1942 };
1943
1944 struct
1945 {
1946 unsigned RA0 : 1;
1947 unsigned RA1 : 1;
1948 unsigned RA2 : 1;
1949 unsigned RA3 : 1;
1950 unsigned RA4 : 1;
1951 unsigned RA5 : 1;
1952 unsigned RA6 : 1;
1953 unsigned : 1;
1954 };
1955
1956 struct
1957 {
1958 unsigned TRISA : 7;
1959 unsigned : 1;
1960 };
1961
1962 struct
1963 {
1964 unsigned RA : 7;
1965 unsigned : 1;
1966 };
1967 } __DDRAbits_t;
1968
1969 extern __at(0x0F92) volatile __DDRAbits_t DDRAbits;
1970
1971 #define _TRISA0 0x01
1972 #define _RA0 0x01
1973 #define _TRISA1 0x02
1974 #define _RA1 0x02
1975 #define _TRISA2 0x04
1976 #define _RA2 0x04
1977 #define _TRISA3 0x08
1978 #define _RA3 0x08
1979 #define _TRISA4 0x10
1980 #define _RA4 0x10
1981 #define _TRISA5 0x20
1982 #define _RA5 0x20
1983 #define _TRISA6 0x40
1984 #define _RA6 0x40
1985
1986 //==============================================================================
1987
1988
1989 //==============================================================================
1990 // TRISA Bits
1991
1992 extern __at(0x0F92) __sfr TRISA;
1993
1994 typedef union
1995 {
1996 struct
1997 {
1998 unsigned TRISA0 : 1;
1999 unsigned TRISA1 : 1;
2000 unsigned TRISA2 : 1;
2001 unsigned TRISA3 : 1;
2002 unsigned TRISA4 : 1;
2003 unsigned TRISA5 : 1;
2004 unsigned TRISA6 : 1;
2005 unsigned : 1;
2006 };
2007
2008 struct
2009 {
2010 unsigned RA0 : 1;
2011 unsigned RA1 : 1;
2012 unsigned RA2 : 1;
2013 unsigned RA3 : 1;
2014 unsigned RA4 : 1;
2015 unsigned RA5 : 1;
2016 unsigned RA6 : 1;
2017 unsigned : 1;
2018 };
2019
2020 struct
2021 {
2022 unsigned TRISA : 7;
2023 unsigned : 1;
2024 };
2025
2026 struct
2027 {
2028 unsigned RA : 7;
2029 unsigned : 1;
2030 };
2031 } __TRISAbits_t;
2032
2033 extern __at(0x0F92) volatile __TRISAbits_t TRISAbits;
2034
2035 #define _TRISA_TRISA0 0x01
2036 #define _TRISA_RA0 0x01
2037 #define _TRISA_TRISA1 0x02
2038 #define _TRISA_RA1 0x02
2039 #define _TRISA_TRISA2 0x04
2040 #define _TRISA_RA2 0x04
2041 #define _TRISA_TRISA3 0x08
2042 #define _TRISA_RA3 0x08
2043 #define _TRISA_TRISA4 0x10
2044 #define _TRISA_RA4 0x10
2045 #define _TRISA_TRISA5 0x20
2046 #define _TRISA_RA5 0x20
2047 #define _TRISA_TRISA6 0x40
2048 #define _TRISA_RA6 0x40
2049
2050 //==============================================================================
2051
2052
2053 //==============================================================================
2054 // DDRB Bits
2055
2056 extern __at(0x0F93) __sfr DDRB;
2057
2058 typedef union
2059 {
2060 struct
2061 {
2062 unsigned TRISB0 : 1;
2063 unsigned TRISB1 : 1;
2064 unsigned TRISB2 : 1;
2065 unsigned TRISB3 : 1;
2066 unsigned TRISB4 : 1;
2067 unsigned TRISB5 : 1;
2068 unsigned TRISB6 : 1;
2069 unsigned TRISB7 : 1;
2070 };
2071
2072 struct
2073 {
2074 unsigned RB0 : 1;
2075 unsigned RB1 : 1;
2076 unsigned RB2 : 1;
2077 unsigned RB3 : 1;
2078 unsigned RB4 : 1;
2079 unsigned RB5 : 1;
2080 unsigned RB6 : 1;
2081 unsigned RB7 : 1;
2082 };
2083 } __DDRBbits_t;
2084
2085 extern __at(0x0F93) volatile __DDRBbits_t DDRBbits;
2086
2087 #define _TRISB0 0x01
2088 #define _RB0 0x01
2089 #define _TRISB1 0x02
2090 #define _RB1 0x02
2091 #define _TRISB2 0x04
2092 #define _RB2 0x04
2093 #define _TRISB3 0x08
2094 #define _RB3 0x08
2095 #define _TRISB4 0x10
2096 #define _RB4 0x10
2097 #define _TRISB5 0x20
2098 #define _RB5 0x20
2099 #define _TRISB6 0x40
2100 #define _RB6 0x40
2101 #define _TRISB7 0x80
2102 #define _RB7 0x80
2103
2104 //==============================================================================
2105
2106
2107 //==============================================================================
2108 // TRISB Bits
2109
2110 extern __at(0x0F93) __sfr TRISB;
2111
2112 typedef union
2113 {
2114 struct
2115 {
2116 unsigned TRISB0 : 1;
2117 unsigned TRISB1 : 1;
2118 unsigned TRISB2 : 1;
2119 unsigned TRISB3 : 1;
2120 unsigned TRISB4 : 1;
2121 unsigned TRISB5 : 1;
2122 unsigned TRISB6 : 1;
2123 unsigned TRISB7 : 1;
2124 };
2125
2126 struct
2127 {
2128 unsigned RB0 : 1;
2129 unsigned RB1 : 1;
2130 unsigned RB2 : 1;
2131 unsigned RB3 : 1;
2132 unsigned RB4 : 1;
2133 unsigned RB5 : 1;
2134 unsigned RB6 : 1;
2135 unsigned RB7 : 1;
2136 };
2137 } __TRISBbits_t;
2138
2139 extern __at(0x0F93) volatile __TRISBbits_t TRISBbits;
2140
2141 #define _TRISB_TRISB0 0x01
2142 #define _TRISB_RB0 0x01
2143 #define _TRISB_TRISB1 0x02
2144 #define _TRISB_RB1 0x02
2145 #define _TRISB_TRISB2 0x04
2146 #define _TRISB_RB2 0x04
2147 #define _TRISB_TRISB3 0x08
2148 #define _TRISB_RB3 0x08
2149 #define _TRISB_TRISB4 0x10
2150 #define _TRISB_RB4 0x10
2151 #define _TRISB_TRISB5 0x20
2152 #define _TRISB_RB5 0x20
2153 #define _TRISB_TRISB6 0x40
2154 #define _TRISB_RB6 0x40
2155 #define _TRISB_TRISB7 0x80
2156 #define _TRISB_RB7 0x80
2157
2158 //==============================================================================
2159
2160
2161 //==============================================================================
2162 // DDRC Bits
2163
2164 extern __at(0x0F94) __sfr DDRC;
2165
2166 typedef union
2167 {
2168 struct
2169 {
2170 unsigned TRISC0 : 1;
2171 unsigned TRISC1 : 1;
2172 unsigned TRISC2 : 1;
2173 unsigned TRISC3 : 1;
2174 unsigned TRISC4 : 1;
2175 unsigned TRISC5 : 1;
2176 unsigned TRISC6 : 1;
2177 unsigned TRISC7 : 1;
2178 };
2179
2180 struct
2181 {
2182 unsigned RC0 : 1;
2183 unsigned RC1 : 1;
2184 unsigned RC2 : 1;
2185 unsigned RC3 : 1;
2186 unsigned RC4 : 1;
2187 unsigned RC5 : 1;
2188 unsigned RC6 : 1;
2189 unsigned RC7 : 1;
2190 };
2191 } __DDRCbits_t;
2192
2193 extern __at(0x0F94) volatile __DDRCbits_t DDRCbits;
2194
2195 #define _TRISC0 0x01
2196 #define _RC0 0x01
2197 #define _TRISC1 0x02
2198 #define _RC1 0x02
2199 #define _TRISC2 0x04
2200 #define _RC2 0x04
2201 #define _TRISC3 0x08
2202 #define _RC3 0x08
2203 #define _TRISC4 0x10
2204 #define _RC4 0x10
2205 #define _TRISC5 0x20
2206 #define _RC5 0x20
2207 #define _TRISC6 0x40
2208 #define _RC6 0x40
2209 #define _TRISC7 0x80
2210 #define _RC7 0x80
2211
2212 //==============================================================================
2213
2214
2215 //==============================================================================
2216 // TRISC Bits
2217
2218 extern __at(0x0F94) __sfr TRISC;
2219
2220 typedef union
2221 {
2222 struct
2223 {
2224 unsigned TRISC0 : 1;
2225 unsigned TRISC1 : 1;
2226 unsigned TRISC2 : 1;
2227 unsigned TRISC3 : 1;
2228 unsigned TRISC4 : 1;
2229 unsigned TRISC5 : 1;
2230 unsigned TRISC6 : 1;
2231 unsigned TRISC7 : 1;
2232 };
2233
2234 struct
2235 {
2236 unsigned RC0 : 1;
2237 unsigned RC1 : 1;
2238 unsigned RC2 : 1;
2239 unsigned RC3 : 1;
2240 unsigned RC4 : 1;
2241 unsigned RC5 : 1;
2242 unsigned RC6 : 1;
2243 unsigned RC7 : 1;
2244 };
2245 } __TRISCbits_t;
2246
2247 extern __at(0x0F94) volatile __TRISCbits_t TRISCbits;
2248
2249 #define _TRISC_TRISC0 0x01
2250 #define _TRISC_RC0 0x01
2251 #define _TRISC_TRISC1 0x02
2252 #define _TRISC_RC1 0x02
2253 #define _TRISC_TRISC2 0x04
2254 #define _TRISC_RC2 0x04
2255 #define _TRISC_TRISC3 0x08
2256 #define _TRISC_RC3 0x08
2257 #define _TRISC_TRISC4 0x10
2258 #define _TRISC_RC4 0x10
2259 #define _TRISC_TRISC5 0x20
2260 #define _TRISC_RC5 0x20
2261 #define _TRISC_TRISC6 0x40
2262 #define _TRISC_RC6 0x40
2263 #define _TRISC_TRISC7 0x80
2264 #define _TRISC_RC7 0x80
2265
2266 //==============================================================================
2267
2268
2269 //==============================================================================
2270 // DDRD Bits
2271
2272 extern __at(0x0F95) __sfr DDRD;
2273
2274 typedef union
2275 {
2276 struct
2277 {
2278 unsigned TRISD0 : 1;
2279 unsigned TRISD1 : 1;
2280 unsigned TRISD2 : 1;
2281 unsigned TRISD3 : 1;
2282 unsigned TRISD4 : 1;
2283 unsigned TRISD5 : 1;
2284 unsigned TRISD6 : 1;
2285 unsigned TRISD7 : 1;
2286 };
2287
2288 struct
2289 {
2290 unsigned RD0 : 1;
2291 unsigned RD1 : 1;
2292 unsigned RD2 : 1;
2293 unsigned RD3 : 1;
2294 unsigned RD4 : 1;
2295 unsigned RD5 : 1;
2296 unsigned RD6 : 1;
2297 unsigned RD7 : 1;
2298 };
2299 } __DDRDbits_t;
2300
2301 extern __at(0x0F95) volatile __DDRDbits_t DDRDbits;
2302
2303 #define _TRISD0 0x01
2304 #define _RD0 0x01
2305 #define _TRISD1 0x02
2306 #define _RD1 0x02
2307 #define _TRISD2 0x04
2308 #define _RD2 0x04
2309 #define _TRISD3 0x08
2310 #define _RD3 0x08
2311 #define _TRISD4 0x10
2312 #define _RD4 0x10
2313 #define _TRISD5 0x20
2314 #define _RD5 0x20
2315 #define _TRISD6 0x40
2316 #define _RD6 0x40
2317 #define _TRISD7 0x80
2318 #define _RD7 0x80
2319
2320 //==============================================================================
2321
2322
2323 //==============================================================================
2324 // TRISD Bits
2325
2326 extern __at(0x0F95) __sfr TRISD;
2327
2328 typedef union
2329 {
2330 struct
2331 {
2332 unsigned TRISD0 : 1;
2333 unsigned TRISD1 : 1;
2334 unsigned TRISD2 : 1;
2335 unsigned TRISD3 : 1;
2336 unsigned TRISD4 : 1;
2337 unsigned TRISD5 : 1;
2338 unsigned TRISD6 : 1;
2339 unsigned TRISD7 : 1;
2340 };
2341
2342 struct
2343 {
2344 unsigned RD0 : 1;
2345 unsigned RD1 : 1;
2346 unsigned RD2 : 1;
2347 unsigned RD3 : 1;
2348 unsigned RD4 : 1;
2349 unsigned RD5 : 1;
2350 unsigned RD6 : 1;
2351 unsigned RD7 : 1;
2352 };
2353 } __TRISDbits_t;
2354
2355 extern __at(0x0F95) volatile __TRISDbits_t TRISDbits;
2356
2357 #define _TRISD_TRISD0 0x01
2358 #define _TRISD_RD0 0x01
2359 #define _TRISD_TRISD1 0x02
2360 #define _TRISD_RD1 0x02
2361 #define _TRISD_TRISD2 0x04
2362 #define _TRISD_RD2 0x04
2363 #define _TRISD_TRISD3 0x08
2364 #define _TRISD_RD3 0x08
2365 #define _TRISD_TRISD4 0x10
2366 #define _TRISD_RD4 0x10
2367 #define _TRISD_TRISD5 0x20
2368 #define _TRISD_RD5 0x20
2369 #define _TRISD_TRISD6 0x40
2370 #define _TRISD_RD6 0x40
2371 #define _TRISD_TRISD7 0x80
2372 #define _TRISD_RD7 0x80
2373
2374 //==============================================================================
2375
2376
2377 //==============================================================================
2378 // DDRE Bits
2379
2380 extern __at(0x0F96) __sfr DDRE;
2381
2382 typedef union
2383 {
2384 struct
2385 {
2386 unsigned TRISE0 : 1;
2387 unsigned TRISE1 : 1;
2388 unsigned TRISE2 : 1;
2389 unsigned TRISE3 : 1;
2390 unsigned TRISE4 : 1;
2391 unsigned TRISE5 : 1;
2392 unsigned TRISE6 : 1;
2393 unsigned TRISE7 : 1;
2394 };
2395
2396 struct
2397 {
2398 unsigned RE0 : 1;
2399 unsigned RE1 : 1;
2400 unsigned RE2 : 1;
2401 unsigned RE3 : 1;
2402 unsigned RE4 : 1;
2403 unsigned RE5 : 1;
2404 unsigned RE6 : 1;
2405 unsigned RE7 : 1;
2406 };
2407 } __DDREbits_t;
2408
2409 extern __at(0x0F96) volatile __DDREbits_t DDREbits;
2410
2411 #define _TRISE0 0x01
2412 #define _RE0 0x01
2413 #define _TRISE1 0x02
2414 #define _RE1 0x02
2415 #define _TRISE2 0x04
2416 #define _RE2 0x04
2417 #define _TRISE3 0x08
2418 #define _RE3 0x08
2419 #define _TRISE4 0x10
2420 #define _RE4 0x10
2421 #define _TRISE5 0x20
2422 #define _RE5 0x20
2423 #define _TRISE6 0x40
2424 #define _RE6 0x40
2425 #define _TRISE7 0x80
2426 #define _RE7 0x80
2427
2428 //==============================================================================
2429
2430
2431 //==============================================================================
2432 // TRISE Bits
2433
2434 extern __at(0x0F96) __sfr TRISE;
2435
2436 typedef union
2437 {
2438 struct
2439 {
2440 unsigned TRISE0 : 1;
2441 unsigned TRISE1 : 1;
2442 unsigned TRISE2 : 1;
2443 unsigned TRISE3 : 1;
2444 unsigned TRISE4 : 1;
2445 unsigned TRISE5 : 1;
2446 unsigned TRISE6 : 1;
2447 unsigned TRISE7 : 1;
2448 };
2449
2450 struct
2451 {
2452 unsigned RE0 : 1;
2453 unsigned RE1 : 1;
2454 unsigned RE2 : 1;
2455 unsigned RE3 : 1;
2456 unsigned RE4 : 1;
2457 unsigned RE5 : 1;
2458 unsigned RE6 : 1;
2459 unsigned RE7 : 1;
2460 };
2461 } __TRISEbits_t;
2462
2463 extern __at(0x0F96) volatile __TRISEbits_t TRISEbits;
2464
2465 #define _TRISE_TRISE0 0x01
2466 #define _TRISE_RE0 0x01
2467 #define _TRISE_TRISE1 0x02
2468 #define _TRISE_RE1 0x02
2469 #define _TRISE_TRISE2 0x04
2470 #define _TRISE_RE2 0x04
2471 #define _TRISE_TRISE3 0x08
2472 #define _TRISE_RE3 0x08
2473 #define _TRISE_TRISE4 0x10
2474 #define _TRISE_RE4 0x10
2475 #define _TRISE_TRISE5 0x20
2476 #define _TRISE_RE5 0x20
2477 #define _TRISE_TRISE6 0x40
2478 #define _TRISE_RE6 0x40
2479 #define _TRISE_TRISE7 0x80
2480 #define _TRISE_RE7 0x80
2481
2482 //==============================================================================
2483
2484
2485 //==============================================================================
2486 // DDRF Bits
2487
2488 extern __at(0x0F97) __sfr DDRF;
2489
2490 typedef union
2491 {
2492 struct
2493 {
2494 unsigned TRISF0 : 1;
2495 unsigned TRISF1 : 1;
2496 unsigned TRISF2 : 1;
2497 unsigned TRISF3 : 1;
2498 unsigned TRISF4 : 1;
2499 unsigned TRISF5 : 1;
2500 unsigned TRISF6 : 1;
2501 unsigned TRISF7 : 1;
2502 };
2503
2504 struct
2505 {
2506 unsigned RF0 : 1;
2507 unsigned RF1 : 1;
2508 unsigned RF2 : 1;
2509 unsigned RF3 : 1;
2510 unsigned RF4 : 1;
2511 unsigned RF5 : 1;
2512 unsigned RF6 : 1;
2513 unsigned RF7 : 1;
2514 };
2515 } __DDRFbits_t;
2516
2517 extern __at(0x0F97) volatile __DDRFbits_t DDRFbits;
2518
2519 #define _TRISF0 0x01
2520 #define _RF0 0x01
2521 #define _TRISF1 0x02
2522 #define _RF1 0x02
2523 #define _TRISF2 0x04
2524 #define _RF2 0x04
2525 #define _TRISF3 0x08
2526 #define _RF3 0x08
2527 #define _TRISF4 0x10
2528 #define _RF4 0x10
2529 #define _TRISF5 0x20
2530 #define _RF5 0x20
2531 #define _TRISF6 0x40
2532 #define _RF6 0x40
2533 #define _TRISF7 0x80
2534 #define _RF7 0x80
2535
2536 //==============================================================================
2537
2538
2539 //==============================================================================
2540 // TRISF Bits
2541
2542 extern __at(0x0F97) __sfr TRISF;
2543
2544 typedef union
2545 {
2546 struct
2547 {
2548 unsigned TRISF0 : 1;
2549 unsigned TRISF1 : 1;
2550 unsigned TRISF2 : 1;
2551 unsigned TRISF3 : 1;
2552 unsigned TRISF4 : 1;
2553 unsigned TRISF5 : 1;
2554 unsigned TRISF6 : 1;
2555 unsigned TRISF7 : 1;
2556 };
2557
2558 struct
2559 {
2560 unsigned RF0 : 1;
2561 unsigned RF1 : 1;
2562 unsigned RF2 : 1;
2563 unsigned RF3 : 1;
2564 unsigned RF4 : 1;
2565 unsigned RF5 : 1;
2566 unsigned RF6 : 1;
2567 unsigned RF7 : 1;
2568 };
2569 } __TRISFbits_t;
2570
2571 extern __at(0x0F97) volatile __TRISFbits_t TRISFbits;
2572
2573 #define _TRISF_TRISF0 0x01
2574 #define _TRISF_RF0 0x01
2575 #define _TRISF_TRISF1 0x02
2576 #define _TRISF_RF1 0x02
2577 #define _TRISF_TRISF2 0x04
2578 #define _TRISF_RF2 0x04
2579 #define _TRISF_TRISF3 0x08
2580 #define _TRISF_RF3 0x08
2581 #define _TRISF_TRISF4 0x10
2582 #define _TRISF_RF4 0x10
2583 #define _TRISF_TRISF5 0x20
2584 #define _TRISF_RF5 0x20
2585 #define _TRISF_TRISF6 0x40
2586 #define _TRISF_RF6 0x40
2587 #define _TRISF_TRISF7 0x80
2588 #define _TRISF_RF7 0x80
2589
2590 //==============================================================================
2591
2592
2593 //==============================================================================
2594 // DDRG Bits
2595
2596 extern __at(0x0F98) __sfr DDRG;
2597
2598 typedef union
2599 {
2600 struct
2601 {
2602 unsigned TRISG0 : 1;
2603 unsigned TRISG1 : 1;
2604 unsigned TRISG2 : 1;
2605 unsigned TRISG3 : 1;
2606 unsigned TRISG4 : 1;
2607 unsigned : 1;
2608 unsigned : 1;
2609 unsigned : 1;
2610 };
2611
2612 struct
2613 {
2614 unsigned RG0 : 1;
2615 unsigned RG1 : 1;
2616 unsigned RG2 : 1;
2617 unsigned RG3 : 1;
2618 unsigned RG4 : 1;
2619 unsigned : 1;
2620 unsigned : 1;
2621 unsigned : 1;
2622 };
2623
2624 struct
2625 {
2626 unsigned TRISG : 5;
2627 unsigned : 3;
2628 };
2629
2630 struct
2631 {
2632 unsigned RG : 5;
2633 unsigned : 3;
2634 };
2635 } __DDRGbits_t;
2636
2637 extern __at(0x0F98) volatile __DDRGbits_t DDRGbits;
2638
2639 #define _TRISG0 0x01
2640 #define _RG0 0x01
2641 #define _TRISG1 0x02
2642 #define _RG1 0x02
2643 #define _TRISG2 0x04
2644 #define _RG2 0x04
2645 #define _TRISG3 0x08
2646 #define _RG3 0x08
2647 #define _TRISG4 0x10
2648 #define _RG4 0x10
2649
2650 //==============================================================================
2651
2652
2653 //==============================================================================
2654 // TRISG Bits
2655
2656 extern __at(0x0F98) __sfr TRISG;
2657
2658 typedef union
2659 {
2660 struct
2661 {
2662 unsigned TRISG0 : 1;
2663 unsigned TRISG1 : 1;
2664 unsigned TRISG2 : 1;
2665 unsigned TRISG3 : 1;
2666 unsigned TRISG4 : 1;
2667 unsigned : 1;
2668 unsigned : 1;
2669 unsigned : 1;
2670 };
2671
2672 struct
2673 {
2674 unsigned RG0 : 1;
2675 unsigned RG1 : 1;
2676 unsigned RG2 : 1;
2677 unsigned RG3 : 1;
2678 unsigned RG4 : 1;
2679 unsigned : 1;
2680 unsigned : 1;
2681 unsigned : 1;
2682 };
2683
2684 struct
2685 {
2686 unsigned RG : 5;
2687 unsigned : 3;
2688 };
2689
2690 struct
2691 {
2692 unsigned TRISG : 5;
2693 unsigned : 3;
2694 };
2695 } __TRISGbits_t;
2696
2697 extern __at(0x0F98) volatile __TRISGbits_t TRISGbits;
2698
2699 #define _TRISG_TRISG0 0x01
2700 #define _TRISG_RG0 0x01
2701 #define _TRISG_TRISG1 0x02
2702 #define _TRISG_RG1 0x02
2703 #define _TRISG_TRISG2 0x04
2704 #define _TRISG_RG2 0x04
2705 #define _TRISG_TRISG3 0x08
2706 #define _TRISG_RG3 0x08
2707 #define _TRISG_TRISG4 0x10
2708 #define _TRISG_RG4 0x10
2709
2710 //==============================================================================
2711
2712
2713 //==============================================================================
2714 // PIE1 Bits
2715
2716 extern __at(0x0F9D) __sfr PIE1;
2717
2718 typedef union
2719 {
2720 struct
2721 {
2722 unsigned TMR1IE : 1;
2723 unsigned TMR2IE : 1;
2724 unsigned CCP1IE : 1;
2725 unsigned SSPIE : 1;
2726 unsigned TXIE : 1;
2727 unsigned RCIE : 1;
2728 unsigned ADIE : 1;
2729 unsigned PSPIE : 1;
2730 };
2731
2732 struct
2733 {
2734 unsigned : 1;
2735 unsigned : 1;
2736 unsigned : 1;
2737 unsigned : 1;
2738 unsigned TX1IE : 1;
2739 unsigned RC1IE : 1;
2740 unsigned : 1;
2741 unsigned : 1;
2742 };
2743 } __PIE1bits_t;
2744
2745 extern __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
2746
2747 #define _TMR1IE 0x01
2748 #define _TMR2IE 0x02
2749 #define _CCP1IE 0x04
2750 #define _SSPIE 0x08
2751 #define _TXIE 0x10
2752 #define _TX1IE 0x10
2753 #define _RCIE 0x20
2754 #define _RC1IE 0x20
2755 #define _ADIE 0x40
2756 #define _PSPIE 0x80
2757
2758 //==============================================================================
2759
2760
2761 //==============================================================================
2762 // PIR1 Bits
2763
2764 extern __at(0x0F9E) __sfr PIR1;
2765
2766 typedef union
2767 {
2768 struct
2769 {
2770 unsigned TMR1IF : 1;
2771 unsigned TMR2IF : 1;
2772 unsigned CCP1IF : 1;
2773 unsigned SSPIF : 1;
2774 unsigned TXIF : 1;
2775 unsigned RCIF : 1;
2776 unsigned ADIF : 1;
2777 unsigned PSPIF : 1;
2778 };
2779
2780 struct
2781 {
2782 unsigned : 1;
2783 unsigned : 1;
2784 unsigned : 1;
2785 unsigned : 1;
2786 unsigned TX1IF : 1;
2787 unsigned RC1IF : 1;
2788 unsigned : 1;
2789 unsigned : 1;
2790 };
2791 } __PIR1bits_t;
2792
2793 extern __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
2794
2795 #define _TMR1IF 0x01
2796 #define _TMR2IF 0x02
2797 #define _CCP1IF 0x04
2798 #define _SSPIF 0x08
2799 #define _TXIF 0x10
2800 #define _TX1IF 0x10
2801 #define _RCIF 0x20
2802 #define _RC1IF 0x20
2803 #define _ADIF 0x40
2804 #define _PSPIF 0x80
2805
2806 //==============================================================================
2807
2808
2809 //==============================================================================
2810 // IPR1 Bits
2811
2812 extern __at(0x0F9F) __sfr IPR1;
2813
2814 typedef union
2815 {
2816 struct
2817 {
2818 unsigned TMR1IP : 1;
2819 unsigned TMR2IP : 1;
2820 unsigned CCP1IP : 1;
2821 unsigned SSPIP : 1;
2822 unsigned TXIP : 1;
2823 unsigned RCIP : 1;
2824 unsigned ADIP : 1;
2825 unsigned PSPIP : 1;
2826 };
2827
2828 struct
2829 {
2830 unsigned : 1;
2831 unsigned : 1;
2832 unsigned : 1;
2833 unsigned : 1;
2834 unsigned TX1IP : 1;
2835 unsigned RC1IP : 1;
2836 unsigned : 1;
2837 unsigned : 1;
2838 };
2839 } __IPR1bits_t;
2840
2841 extern __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
2842
2843 #define _TMR1IP 0x01
2844 #define _TMR2IP 0x02
2845 #define _CCP1IP 0x04
2846 #define _SSPIP 0x08
2847 #define _TXIP 0x10
2848 #define _TX1IP 0x10
2849 #define _RCIP 0x20
2850 #define _RC1IP 0x20
2851 #define _ADIP 0x40
2852 #define _PSPIP 0x80
2853
2854 //==============================================================================
2855
2856
2857 //==============================================================================
2858 // PIE2 Bits
2859
2860 extern __at(0x0FA0) __sfr PIE2;
2861
2862 typedef struct
2863 {
2864 unsigned CCP2IE : 1;
2865 unsigned TMR3IE : 1;
2866 unsigned LVDIE : 1;
2867 unsigned BCLIE : 1;
2868 unsigned EEIE : 1;
2869 unsigned : 1;
2870 unsigned CMIE : 1;
2871 unsigned : 1;
2872 } __PIE2bits_t;
2873
2874 extern __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
2875
2876 #define _CCP2IE 0x01
2877 #define _TMR3IE 0x02
2878 #define _LVDIE 0x04
2879 #define _BCLIE 0x08
2880 #define _EEIE 0x10
2881 #define _CMIE 0x40
2882
2883 //==============================================================================
2884
2885
2886 //==============================================================================
2887 // PIR2 Bits
2888
2889 extern __at(0x0FA1) __sfr PIR2;
2890
2891 typedef struct
2892 {
2893 unsigned CCP2IF : 1;
2894 unsigned TMR3IF : 1;
2895 unsigned LVDIF : 1;
2896 unsigned BCLIF : 1;
2897 unsigned EEIF : 1;
2898 unsigned : 1;
2899 unsigned CMIF : 1;
2900 unsigned : 1;
2901 } __PIR2bits_t;
2902
2903 extern __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
2904
2905 #define _CCP2IF 0x01
2906 #define _TMR3IF 0x02
2907 #define _LVDIF 0x04
2908 #define _BCLIF 0x08
2909 #define _EEIF 0x10
2910 #define _CMIF 0x40
2911
2912 //==============================================================================
2913
2914
2915 //==============================================================================
2916 // IPR2 Bits
2917
2918 extern __at(0x0FA2) __sfr IPR2;
2919
2920 typedef struct
2921 {
2922 unsigned CCP2IP : 1;
2923 unsigned TMR3IP : 1;
2924 unsigned LVDIP : 1;
2925 unsigned BCLIP : 1;
2926 unsigned EEIP : 1;
2927 unsigned : 1;
2928 unsigned CMIP : 1;
2929 unsigned : 1;
2930 } __IPR2bits_t;
2931
2932 extern __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
2933
2934 #define _CCP2IP 0x01
2935 #define _TMR3IP 0x02
2936 #define _LVDIP 0x04
2937 #define _BCLIP 0x08
2938 #define _EEIP 0x10
2939 #define _CMIP 0x40
2940
2941 //==============================================================================
2942
2943
2944 //==============================================================================
2945 // PIE3 Bits
2946
2947 extern __at(0x0FA3) __sfr PIE3;
2948
2949 typedef struct
2950 {
2951 unsigned CCP3IE : 1;
2952 unsigned CCP4IE : 1;
2953 unsigned CCP5IE : 1;
2954 unsigned TMR4IE : 1;
2955 unsigned TX2IE : 1;
2956 unsigned RC2IE : 1;
2957 unsigned : 1;
2958 unsigned : 1;
2959 } __PIE3bits_t;
2960
2961 extern __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
2962
2963 #define _CCP3IE 0x01
2964 #define _CCP4IE 0x02
2965 #define _CCP5IE 0x04
2966 #define _TMR4IE 0x08
2967 #define _TX2IE 0x10
2968 #define _RC2IE 0x20
2969
2970 //==============================================================================
2971
2972
2973 //==============================================================================
2974 // PIR3 Bits
2975
2976 extern __at(0x0FA4) __sfr PIR3;
2977
2978 typedef struct
2979 {
2980 unsigned CCP3IF : 1;
2981 unsigned CCP4IF : 1;
2982 unsigned CCP5IF : 1;
2983 unsigned TMR4IF : 1;
2984 unsigned TX2IF : 1;
2985 unsigned RC2IF : 1;
2986 unsigned : 1;
2987 unsigned : 1;
2988 } __PIR3bits_t;
2989
2990 extern __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
2991
2992 #define _CCP3IF 0x01
2993 #define _CCP4IF 0x02
2994 #define _CCP5IF 0x04
2995 #define _TMR4IF 0x08
2996 #define _TX2IF 0x10
2997 #define _RC2IF 0x20
2998
2999 //==============================================================================
3000
3001
3002 //==============================================================================
3003 // IPR3 Bits
3004
3005 extern __at(0x0FA5) __sfr IPR3;
3006
3007 typedef struct
3008 {
3009 unsigned CCP3IP : 1;
3010 unsigned CCP4IP : 1;
3011 unsigned CCP5IP : 1;
3012 unsigned TMR4IP : 1;
3013 unsigned TX2IP : 1;
3014 unsigned RC2IP : 1;
3015 unsigned : 1;
3016 unsigned : 1;
3017 } __IPR3bits_t;
3018
3019 extern __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
3020
3021 #define _CCP3IP 0x01
3022 #define _CCP4IP 0x02
3023 #define _CCP5IP 0x04
3024 #define _TMR4IP 0x08
3025 #define _TX2IP 0x10
3026 #define _RC2IP 0x20
3027
3028 //==============================================================================
3029
3030
3031 //==============================================================================
3032 // EECON1 Bits
3033
3034 extern __at(0x0FA6) __sfr EECON1;
3035
3036 typedef struct
3037 {
3038 unsigned RD : 1;
3039 unsigned WR : 1;
3040 unsigned WREN : 1;
3041 unsigned WRERR : 1;
3042 unsigned FREE : 1;
3043 unsigned : 1;
3044 unsigned CFGS : 1;
3045 unsigned EEPGD : 1;
3046 } __EECON1bits_t;
3047
3048 extern __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
3049
3050 #define _RD 0x01
3051 #define _WR 0x02
3052 #define _WREN 0x04
3053 #define _WRERR 0x08
3054 #define _FREE 0x10
3055 #define _CFGS 0x40
3056 #define _EEPGD 0x80
3057
3058 //==============================================================================
3059
3060 extern __at(0x0FA7) __sfr EECON2;
3061 extern __at(0x0FA8) __sfr EEDATA;
3062 extern __at(0x0FA9) __sfr EEADR;
3063 extern __at(0x0FAA) __sfr EEADRH;
3064
3065 //==============================================================================
3066 // RCSTA Bits
3067
3068 extern __at(0x0FAB) __sfr RCSTA;
3069
3070 typedef union
3071 {
3072 struct
3073 {
3074 unsigned RX9D : 1;
3075 unsigned OERR : 1;
3076 unsigned FERR : 1;
3077 unsigned ADDEN : 1;
3078 unsigned CREN : 1;
3079 unsigned SREN : 1;
3080 unsigned RX9 : 1;
3081 unsigned SPEN : 1;
3082 };
3083
3084 struct
3085 {
3086 unsigned RX9D1 : 1;
3087 unsigned OERR1 : 1;
3088 unsigned FERR1 : 1;
3089 unsigned ADEN : 1;
3090 unsigned CREN1 : 1;
3091 unsigned SREN1 : 1;
3092 unsigned RX91 : 1;
3093 unsigned SPEN1 : 1;
3094 };
3095
3096 struct
3097 {
3098 unsigned : 1;
3099 unsigned : 1;
3100 unsigned : 1;
3101 unsigned ADDEN1 : 1;
3102 unsigned : 1;
3103 unsigned : 1;
3104 unsigned : 1;
3105 unsigned : 1;
3106 };
3107 } __RCSTAbits_t;
3108
3109 extern __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
3110
3111 #define _RX9D 0x01
3112 #define _RX9D1 0x01
3113 #define _OERR 0x02
3114 #define _OERR1 0x02
3115 #define _FERR 0x04
3116 #define _FERR1 0x04
3117 #define _ADDEN 0x08
3118 #define _ADEN 0x08
3119 #define _ADDEN1 0x08
3120 #define _CREN 0x10
3121 #define _CREN1 0x10
3122 #define _SREN 0x20
3123 #define _SREN1 0x20
3124 #define _RX9 0x40
3125 #define _RX91 0x40
3126 #define _SPEN 0x80
3127 #define _SPEN1 0x80
3128
3129 //==============================================================================
3130
3131
3132 //==============================================================================
3133 // RCSTA1 Bits
3134
3135 extern __at(0x0FAB) __sfr RCSTA1;
3136
3137 typedef union
3138 {
3139 struct
3140 {
3141 unsigned RX9D : 1;
3142 unsigned OERR : 1;
3143 unsigned FERR : 1;
3144 unsigned ADDEN : 1;
3145 unsigned CREN : 1;
3146 unsigned SREN : 1;
3147 unsigned RX9 : 1;
3148 unsigned SPEN : 1;
3149 };
3150
3151 struct
3152 {
3153 unsigned RX9D1 : 1;
3154 unsigned OERR1 : 1;
3155 unsigned FERR1 : 1;
3156 unsigned ADEN : 1;
3157 unsigned CREN1 : 1;
3158 unsigned SREN1 : 1;
3159 unsigned RX91 : 1;
3160 unsigned SPEN1 : 1;
3161 };
3162
3163 struct
3164 {
3165 unsigned : 1;
3166 unsigned : 1;
3167 unsigned : 1;
3168 unsigned ADDEN1 : 1;
3169 unsigned : 1;
3170 unsigned : 1;
3171 unsigned : 1;
3172 unsigned : 1;
3173 };
3174 } __RCSTA1bits_t;
3175
3176 extern __at(0x0FAB) volatile __RCSTA1bits_t RCSTA1bits;
3177
3178 #define _RCSTA1_RX9D 0x01
3179 #define _RCSTA1_RX9D1 0x01
3180 #define _RCSTA1_OERR 0x02
3181 #define _RCSTA1_OERR1 0x02
3182 #define _RCSTA1_FERR 0x04
3183 #define _RCSTA1_FERR1 0x04
3184 #define _RCSTA1_ADDEN 0x08
3185 #define _RCSTA1_ADEN 0x08
3186 #define _RCSTA1_ADDEN1 0x08
3187 #define _RCSTA1_CREN 0x10
3188 #define _RCSTA1_CREN1 0x10
3189 #define _RCSTA1_SREN 0x20
3190 #define _RCSTA1_SREN1 0x20
3191 #define _RCSTA1_RX9 0x40
3192 #define _RCSTA1_RX91 0x40
3193 #define _RCSTA1_SPEN 0x80
3194 #define _RCSTA1_SPEN1 0x80
3195
3196 //==============================================================================
3197
3198
3199 //==============================================================================
3200 // TXSTA Bits
3201
3202 extern __at(0x0FAC) __sfr TXSTA;
3203
3204 typedef union
3205 {
3206 struct
3207 {
3208 unsigned TX9D : 1;
3209 unsigned TRMT : 1;
3210 unsigned BRGH : 1;
3211 unsigned SENDB : 1;
3212 unsigned SYNC : 1;
3213 unsigned TXEN : 1;
3214 unsigned TX9 : 1;
3215 unsigned CSRC : 1;
3216 };
3217
3218 struct
3219 {
3220 unsigned TX9D1 : 1;
3221 unsigned TRMT1 : 1;
3222 unsigned BRGH1 : 1;
3223 unsigned SENDB1 : 1;
3224 unsigned SYNC1 : 1;
3225 unsigned TXEN1 : 1;
3226 unsigned TX91 : 1;
3227 unsigned CSRC1 : 1;
3228 };
3229 } __TXSTAbits_t;
3230
3231 extern __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
3232
3233 #define _TX9D 0x01
3234 #define _TX9D1 0x01
3235 #define _TRMT 0x02
3236 #define _TRMT1 0x02
3237 #define _BRGH 0x04
3238 #define _BRGH1 0x04
3239 #define _SENDB 0x08
3240 #define _SENDB1 0x08
3241 #define _SYNC 0x10
3242 #define _SYNC1 0x10
3243 #define _TXEN 0x20
3244 #define _TXEN1 0x20
3245 #define _TX9 0x40
3246 #define _TX91 0x40
3247 #define _CSRC 0x80
3248 #define _CSRC1 0x80
3249
3250 //==============================================================================
3251
3252
3253 //==============================================================================
3254 // TXSTA1 Bits
3255
3256 extern __at(0x0FAC) __sfr TXSTA1;
3257
3258 typedef union
3259 {
3260 struct
3261 {
3262 unsigned TX9D : 1;
3263 unsigned TRMT : 1;
3264 unsigned BRGH : 1;
3265 unsigned SENDB : 1;
3266 unsigned SYNC : 1;
3267 unsigned TXEN : 1;
3268 unsigned TX9 : 1;
3269 unsigned CSRC : 1;
3270 };
3271
3272 struct
3273 {
3274 unsigned TX9D1 : 1;
3275 unsigned TRMT1 : 1;
3276 unsigned BRGH1 : 1;
3277 unsigned SENDB1 : 1;
3278 unsigned SYNC1 : 1;
3279 unsigned TXEN1 : 1;
3280 unsigned TX91 : 1;
3281 unsigned CSRC1 : 1;
3282 };
3283 } __TXSTA1bits_t;
3284
3285 extern __at(0x0FAC) volatile __TXSTA1bits_t TXSTA1bits;
3286
3287 #define _TXSTA1_TX9D 0x01
3288 #define _TXSTA1_TX9D1 0x01
3289 #define _TXSTA1_TRMT 0x02
3290 #define _TXSTA1_TRMT1 0x02
3291 #define _TXSTA1_BRGH 0x04
3292 #define _TXSTA1_BRGH1 0x04
3293 #define _TXSTA1_SENDB 0x08
3294 #define _TXSTA1_SENDB1 0x08
3295 #define _TXSTA1_SYNC 0x10
3296 #define _TXSTA1_SYNC1 0x10
3297 #define _TXSTA1_TXEN 0x20
3298 #define _TXSTA1_TXEN1 0x20
3299 #define _TXSTA1_TX9 0x40
3300 #define _TXSTA1_TX91 0x40
3301 #define _TXSTA1_CSRC 0x80
3302 #define _TXSTA1_CSRC1 0x80
3303
3304 //==============================================================================
3305
3306 extern __at(0x0FAD) __sfr TXREG;
3307 extern __at(0x0FAD) __sfr TXREG1;
3308 extern __at(0x0FAE) __sfr RCREG;
3309 extern __at(0x0FAE) __sfr RCREG1;
3310 extern __at(0x0FAF) __sfr SPBRG;
3311 extern __at(0x0FAF) __sfr SPBRG1;
3312
3313 //==============================================================================
3314 // PSPCON Bits
3315
3316 extern __at(0x0FB0) __sfr PSPCON;
3317
3318 typedef struct
3319 {
3320 unsigned : 1;
3321 unsigned : 1;
3322 unsigned : 1;
3323 unsigned : 1;
3324 unsigned PSPMODE : 1;
3325 unsigned IBOV : 1;
3326 unsigned OBF : 1;
3327 unsigned IBF : 1;
3328 } __PSPCONbits_t;
3329
3330 extern __at(0x0FB0) volatile __PSPCONbits_t PSPCONbits;
3331
3332 #define _PSPMODE 0x10
3333 #define _IBOV 0x20
3334 #define _OBF 0x40
3335 #define _IBF 0x80
3336
3337 //==============================================================================
3338
3339
3340 //==============================================================================
3341 // T3CON Bits
3342
3343 extern __at(0x0FB1) __sfr T3CON;
3344
3345 typedef union
3346 {
3347 struct
3348 {
3349 unsigned TMR3ON : 1;
3350 unsigned TMR3CS : 1;
3351 unsigned NOT_T3SYNC : 1;
3352 unsigned T3CCP1 : 1;
3353 unsigned T3CKPS0 : 1;
3354 unsigned T3CKPS1 : 1;
3355 unsigned T3CCP2 : 1;
3356 unsigned RD16 : 1;
3357 };
3358
3359 struct
3360 {
3361 unsigned : 1;
3362 unsigned : 1;
3363 unsigned T3SYNC : 1;
3364 unsigned : 1;
3365 unsigned : 1;
3366 unsigned : 1;
3367 unsigned : 1;
3368 unsigned : 1;
3369 };
3370
3371 struct
3372 {
3373 unsigned : 1;
3374 unsigned : 1;
3375 unsigned T3NSYNC : 1;
3376 unsigned : 1;
3377 unsigned : 1;
3378 unsigned : 1;
3379 unsigned : 1;
3380 unsigned : 1;
3381 };
3382
3383 struct
3384 {
3385 unsigned : 4;
3386 unsigned T3CKPS : 2;
3387 unsigned : 2;
3388 };
3389 } __T3CONbits_t;
3390
3391 extern __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
3392
3393 #define _T3CON_TMR3ON 0x01
3394 #define _T3CON_TMR3CS 0x02
3395 #define _T3CON_NOT_T3SYNC 0x04
3396 #define _T3CON_T3SYNC 0x04
3397 #define _T3CON_T3NSYNC 0x04
3398 #define _T3CON_T3CCP1 0x08
3399 #define _T3CON_T3CKPS0 0x10
3400 #define _T3CON_T3CKPS1 0x20
3401 #define _T3CON_T3CCP2 0x40
3402 #define _T3CON_RD16 0x80
3403
3404 //==============================================================================
3405
3406 extern __at(0x0FB2) __sfr TMR3;
3407 extern __at(0x0FB2) __sfr TMR3L;
3408 extern __at(0x0FB3) __sfr TMR3H;
3409
3410 //==============================================================================
3411 // CMCON Bits
3412
3413 extern __at(0x0FB4) __sfr CMCON;
3414
3415 typedef union
3416 {
3417 struct
3418 {
3419 unsigned CM0 : 1;
3420 unsigned CM1 : 1;
3421 unsigned CM2 : 1;
3422 unsigned CIS : 1;
3423 unsigned C1INV : 1;
3424 unsigned C2INV : 1;
3425 unsigned C1OUT : 1;
3426 unsigned C2OUT : 1;
3427 };
3428
3429 struct
3430 {
3431 unsigned CM : 3;
3432 unsigned : 5;
3433 };
3434 } __CMCONbits_t;
3435
3436 extern __at(0x0FB4) volatile __CMCONbits_t CMCONbits;
3437
3438 #define _CM0 0x01
3439 #define _CM1 0x02
3440 #define _CM2 0x04
3441 #define _CIS 0x08
3442 #define _C1INV 0x10
3443 #define _C2INV 0x20
3444 #define _C1OUT 0x40
3445 #define _C2OUT 0x80
3446
3447 //==============================================================================
3448
3449
3450 //==============================================================================
3451 // CVRCON Bits
3452
3453 extern __at(0x0FB5) __sfr CVRCON;
3454
3455 typedef union
3456 {
3457 struct
3458 {
3459 unsigned CVR0 : 1;
3460 unsigned CVR1 : 1;
3461 unsigned CVR2 : 1;
3462 unsigned CVR3 : 1;
3463 unsigned CVRSS : 1;
3464 unsigned CVRR : 1;
3465 unsigned CVROE : 1;
3466 unsigned CVREN : 1;
3467 };
3468
3469 struct
3470 {
3471 unsigned : 1;
3472 unsigned : 1;
3473 unsigned : 1;
3474 unsigned : 1;
3475 unsigned CVREF : 1;
3476 unsigned : 1;
3477 unsigned : 1;
3478 unsigned : 1;
3479 };
3480
3481 struct
3482 {
3483 unsigned CVR : 4;
3484 unsigned : 4;
3485 };
3486 } __CVRCONbits_t;
3487
3488 extern __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
3489
3490 #define _CVR0 0x01
3491 #define _CVR1 0x02
3492 #define _CVR2 0x04
3493 #define _CVR3 0x08
3494 #define _CVRSS 0x10
3495 #define _CVREF 0x10
3496 #define _CVRR 0x20
3497 #define _CVROE 0x40
3498 #define _CVREN 0x80
3499
3500 //==============================================================================
3501
3502
3503 //==============================================================================
3504 // ECCP1AS Bits
3505
3506 extern __at(0x0FB6) __sfr ECCP1AS;
3507
3508 typedef union
3509 {
3510 struct
3511 {
3512 unsigned PSS1BD0 : 1;
3513 unsigned PSS1BD1 : 1;
3514 unsigned PSS1AC0 : 1;
3515 unsigned PSS1AC1 : 1;
3516 unsigned ECCP1AS0 : 1;
3517 unsigned ECCP1AS1 : 1;
3518 unsigned ECCP1AS2 : 1;
3519 unsigned ECCP1ASE : 1;
3520 };
3521
3522 struct
3523 {
3524 unsigned PSSBD0 : 1;
3525 unsigned PSSBD1 : 1;
3526 unsigned PSSAC0 : 1;
3527 unsigned PSSAC1 : 1;
3528 unsigned : 1;
3529 unsigned : 1;
3530 unsigned : 1;
3531 unsigned : 1;
3532 };
3533
3534 struct
3535 {
3536 unsigned PSSBD : 2;
3537 unsigned : 6;
3538 };
3539
3540 struct
3541 {
3542 unsigned PSS1BD : 2;
3543 unsigned : 6;
3544 };
3545
3546 struct
3547 {
3548 unsigned : 2;
3549 unsigned PSSAC : 2;
3550 unsigned : 4;
3551 };
3552
3553 struct
3554 {
3555 unsigned : 2;
3556 unsigned PSS1AC : 2;
3557 unsigned : 4;
3558 };
3559
3560 struct
3561 {
3562 unsigned : 4;
3563 unsigned ECCP1AS : 3;
3564 unsigned : 1;
3565 };
3566 } __ECCP1ASbits_t;
3567
3568 extern __at(0x0FB6) volatile __ECCP1ASbits_t ECCP1ASbits;
3569
3570 #define _PSS1BD0 0x01
3571 #define _PSSBD0 0x01
3572 #define _PSS1BD1 0x02
3573 #define _PSSBD1 0x02
3574 #define _PSS1AC0 0x04
3575 #define _PSSAC0 0x04
3576 #define _PSS1AC1 0x08
3577 #define _PSSAC1 0x08
3578 #define _ECCP1AS0 0x10
3579 #define _ECCP1AS1 0x20
3580 #define _ECCP1AS2 0x40
3581 #define _ECCP1ASE 0x80
3582
3583 //==============================================================================
3584
3585
3586 //==============================================================================
3587 // CCP3CON Bits
3588
3589 extern __at(0x0FB7) __sfr CCP3CON;
3590
3591 typedef union
3592 {
3593 struct
3594 {
3595 unsigned CCP3M0 : 1;
3596 unsigned CCP3M1 : 1;
3597 unsigned CCP3M2 : 1;
3598 unsigned CCP3M3 : 1;
3599 unsigned CCP3Y : 1;
3600 unsigned CCP3X : 1;
3601 unsigned P3M0 : 1;
3602 unsigned P3M1 : 1;
3603 };
3604
3605 struct
3606 {
3607 unsigned : 1;
3608 unsigned : 1;
3609 unsigned : 1;
3610 unsigned : 1;
3611 unsigned DC3B0 : 1;
3612 unsigned DC3B1 : 1;
3613 unsigned : 1;
3614 unsigned : 1;
3615 };
3616
3617 struct
3618 {
3619 unsigned CCP3M : 4;
3620 unsigned : 4;
3621 };
3622
3623 struct
3624 {
3625 unsigned : 4;
3626 unsigned DC3B : 2;
3627 unsigned : 2;
3628 };
3629
3630 struct
3631 {
3632 unsigned : 6;
3633 unsigned P3M : 2;
3634 };
3635 } __CCP3CONbits_t;
3636
3637 extern __at(0x0FB7) volatile __CCP3CONbits_t CCP3CONbits;
3638
3639 #define _CCP3M0 0x01
3640 #define _CCP3M1 0x02
3641 #define _CCP3M2 0x04
3642 #define _CCP3M3 0x08
3643 #define _CCP3Y 0x10
3644 #define _DC3B0 0x10
3645 #define _CCP3X 0x20
3646 #define _DC3B1 0x20
3647 #define _P3M0 0x40
3648 #define _P3M1 0x80
3649
3650 //==============================================================================
3651
3652 extern __at(0x0FB8) __sfr CCPR3;
3653 extern __at(0x0FB8) __sfr CCPR3L;
3654 extern __at(0x0FB9) __sfr CCPR3H;
3655
3656 //==============================================================================
3657 // CCP2CON Bits
3658
3659 extern __at(0x0FBA) __sfr CCP2CON;
3660
3661 typedef union
3662 {
3663 struct
3664 {
3665 unsigned CCP2M0 : 1;
3666 unsigned CCP2M1 : 1;
3667 unsigned CCP2M2 : 1;
3668 unsigned CCP2M3 : 1;
3669 unsigned DC2B0 : 1;
3670 unsigned DC2B1 : 1;
3671 unsigned P2M0 : 1;
3672 unsigned P2M1 : 1;
3673 };
3674
3675 struct
3676 {
3677 unsigned : 1;
3678 unsigned : 1;
3679 unsigned : 1;
3680 unsigned : 1;
3681 unsigned CCP2Y : 1;
3682 unsigned CCP2X : 1;
3683 unsigned : 1;
3684 unsigned : 1;
3685 };
3686
3687 struct
3688 {
3689 unsigned CCP2M : 4;
3690 unsigned : 4;
3691 };
3692
3693 struct
3694 {
3695 unsigned : 4;
3696 unsigned DC2B : 2;
3697 unsigned : 2;
3698 };
3699
3700 struct
3701 {
3702 unsigned : 6;
3703 unsigned P2M : 2;
3704 };
3705 } __CCP2CONbits_t;
3706
3707 extern __at(0x0FBA) volatile __CCP2CONbits_t CCP2CONbits;
3708
3709 #define _CCP2M0 0x01
3710 #define _CCP2M1 0x02
3711 #define _CCP2M2 0x04
3712 #define _CCP2M3 0x08
3713 #define _DC2B0 0x10
3714 #define _CCP2Y 0x10
3715 #define _DC2B1 0x20
3716 #define _CCP2X 0x20
3717 #define _P2M0 0x40
3718 #define _P2M1 0x80
3719
3720 //==============================================================================
3721
3722 extern __at(0x0FBB) __sfr CCPR2;
3723 extern __at(0x0FBB) __sfr CCPR2L;
3724 extern __at(0x0FBC) __sfr CCPR2H;
3725
3726 //==============================================================================
3727 // CCP1CON Bits
3728
3729 extern __at(0x0FBD) __sfr CCP1CON;
3730
3731 typedef union
3732 {
3733 struct
3734 {
3735 unsigned CCP1M0 : 1;
3736 unsigned CCP1M1 : 1;
3737 unsigned CCP1M2 : 1;
3738 unsigned CCP1M3 : 1;
3739 unsigned DC1B0 : 1;
3740 unsigned DC1B1 : 1;
3741 unsigned P1M0 : 1;
3742 unsigned P1M1 : 1;
3743 };
3744
3745 struct
3746 {
3747 unsigned : 1;
3748 unsigned : 1;
3749 unsigned : 1;
3750 unsigned : 1;
3751 unsigned CCP1Y : 1;
3752 unsigned CCP1X : 1;
3753 unsigned : 1;
3754 unsigned : 1;
3755 };
3756
3757 struct
3758 {
3759 unsigned CCP1M : 4;
3760 unsigned : 4;
3761 };
3762
3763 struct
3764 {
3765 unsigned : 4;
3766 unsigned DC1B : 2;
3767 unsigned : 2;
3768 };
3769
3770 struct
3771 {
3772 unsigned : 6;
3773 unsigned P1M : 2;
3774 };
3775 } __CCP1CONbits_t;
3776
3777 extern __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits;
3778
3779 #define _CCP1M0 0x01
3780 #define _CCP1M1 0x02
3781 #define _CCP1M2 0x04
3782 #define _CCP1M3 0x08
3783 #define _DC1B0 0x10
3784 #define _CCP1Y 0x10
3785 #define _DC1B1 0x20
3786 #define _CCP1X 0x20
3787 #define _P1M0 0x40
3788 #define _P1M1 0x80
3789
3790 //==============================================================================
3791
3792 extern __at(0x0FBE) __sfr CCPR1;
3793 extern __at(0x0FBE) __sfr CCPR1L;
3794 extern __at(0x0FBF) __sfr CCPR1H;
3795
3796 //==============================================================================
3797 // ADCON2 Bits
3798
3799 extern __at(0x0FC0) __sfr ADCON2;
3800
3801 typedef union
3802 {
3803 struct
3804 {
3805 unsigned ADCS0 : 1;
3806 unsigned ADCS1 : 1;
3807 unsigned ADCS2 : 1;
3808 unsigned ACQT0 : 1;
3809 unsigned ACQT1 : 1;
3810 unsigned ACQT2 : 1;
3811 unsigned : 1;
3812 unsigned ADFM : 1;
3813 };
3814
3815 struct
3816 {
3817 unsigned ADCS : 3;
3818 unsigned : 5;
3819 };
3820
3821 struct
3822 {
3823 unsigned : 3;
3824 unsigned ACQT : 3;
3825 unsigned : 2;
3826 };
3827 } __ADCON2bits_t;
3828
3829 extern __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
3830
3831 #define _ADCS0 0x01
3832 #define _ADCS1 0x02
3833 #define _ADCS2 0x04
3834 #define _ACQT0 0x08
3835 #define _ACQT1 0x10
3836 #define _ACQT2 0x20
3837 #define _ADFM 0x80
3838
3839 //==============================================================================
3840
3841
3842 //==============================================================================
3843 // ADCON1 Bits
3844
3845 extern __at(0x0FC1) __sfr ADCON1;
3846
3847 typedef union
3848 {
3849 struct
3850 {
3851 unsigned PCFG0 : 1;
3852 unsigned PCFG1 : 1;
3853 unsigned PCFG2 : 1;
3854 unsigned PCFG3 : 1;
3855 unsigned VCFG0 : 1;
3856 unsigned VCFG1 : 1;
3857 unsigned : 1;
3858 unsigned : 1;
3859 };
3860
3861 struct
3862 {
3863 unsigned PCFG : 4;
3864 unsigned : 4;
3865 };
3866
3867 struct
3868 {
3869 unsigned : 4;
3870 unsigned VCFG : 2;
3871 unsigned : 2;
3872 };
3873 } __ADCON1bits_t;
3874
3875 extern __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
3876
3877 #define _PCFG0 0x01
3878 #define _PCFG1 0x02
3879 #define _PCFG2 0x04
3880 #define _PCFG3 0x08
3881 #define _VCFG0 0x10
3882 #define _VCFG1 0x20
3883
3884 //==============================================================================
3885
3886
3887 //==============================================================================
3888 // ADCON0 Bits
3889
3890 extern __at(0x0FC2) __sfr ADCON0;
3891
3892 typedef union
3893 {
3894 struct
3895 {
3896 unsigned ADON : 1;
3897 unsigned GO_NOT_DONE : 1;
3898 unsigned CHS0 : 1;
3899 unsigned CHS1 : 1;
3900 unsigned CHS2 : 1;
3901 unsigned CHS3 : 1;
3902 unsigned : 1;
3903 unsigned : 1;
3904 };
3905
3906 struct
3907 {
3908 unsigned : 1;
3909 unsigned GO_DONE : 1;
3910 unsigned : 1;
3911 unsigned : 1;
3912 unsigned : 1;
3913 unsigned : 1;
3914 unsigned : 1;
3915 unsigned : 1;
3916 };
3917
3918 struct
3919 {
3920 unsigned : 1;
3921 unsigned DONE : 1;
3922 unsigned : 1;
3923 unsigned : 1;
3924 unsigned : 1;
3925 unsigned : 1;
3926 unsigned : 1;
3927 unsigned : 1;
3928 };
3929
3930 struct
3931 {
3932 unsigned : 1;
3933 unsigned GO : 1;
3934 unsigned : 1;
3935 unsigned : 1;
3936 unsigned : 1;
3937 unsigned : 1;
3938 unsigned : 1;
3939 unsigned : 1;
3940 };
3941
3942 struct
3943 {
3944 unsigned : 1;
3945 unsigned NOT_DONE : 1;
3946 unsigned : 1;
3947 unsigned : 1;
3948 unsigned : 1;
3949 unsigned : 1;
3950 unsigned : 1;
3951 unsigned : 1;
3952 };
3953
3954 struct
3955 {
3956 unsigned : 1;
3957 unsigned GODONE : 1;
3958 unsigned : 1;
3959 unsigned : 1;
3960 unsigned : 1;
3961 unsigned : 1;
3962 unsigned : 1;
3963 unsigned : 1;
3964 };
3965
3966 struct
3967 {
3968 unsigned : 2;
3969 unsigned CHS : 4;
3970 unsigned : 2;
3971 };
3972 } __ADCON0bits_t;
3973
3974 extern __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
3975
3976 #define _ADON 0x01
3977 #define _GO_NOT_DONE 0x02
3978 #define _GO_DONE 0x02
3979 #define _DONE 0x02
3980 #define _GO 0x02
3981 #define _NOT_DONE 0x02
3982 #define _GODONE 0x02
3983 #define _CHS0 0x04
3984 #define _CHS1 0x08
3985 #define _CHS2 0x10
3986 #define _CHS3 0x20
3987
3988 //==============================================================================
3989
3990 extern __at(0x0FC3) __sfr ADRES;
3991 extern __at(0x0FC3) __sfr ADRESL;
3992 extern __at(0x0FC4) __sfr ADRESH;
3993
3994 //==============================================================================
3995 // SSPCON2 Bits
3996
3997 extern __at(0x0FC5) __sfr SSPCON2;
3998
3999 typedef struct
4000 {
4001 unsigned SEN : 1;
4002 unsigned RSEN : 1;
4003 unsigned PEN : 1;
4004 unsigned RCEN : 1;
4005 unsigned ACKEN : 1;
4006 unsigned ACKDT : 1;
4007 unsigned ACKSTAT : 1;
4008 unsigned GCEN : 1;
4009 } __SSPCON2bits_t;
4010
4011 extern __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
4012
4013 #define _SEN 0x01
4014 #define _RSEN 0x02
4015 #define _PEN 0x04
4016 #define _RCEN 0x08
4017 #define _ACKEN 0x10
4018 #define _ACKDT 0x20
4019 #define _ACKSTAT 0x40
4020 #define _GCEN 0x80
4021
4022 //==============================================================================
4023
4024
4025 //==============================================================================
4026 // SSPCON1 Bits
4027
4028 extern __at(0x0FC6) __sfr SSPCON1;
4029
4030 typedef union
4031 {
4032 struct
4033 {
4034 unsigned SSPM0 : 1;
4035 unsigned SSPM1 : 1;
4036 unsigned SSPM2 : 1;
4037 unsigned SSPM3 : 1;
4038 unsigned CKP : 1;
4039 unsigned SSPEN : 1;
4040 unsigned SSPOV : 1;
4041 unsigned WCOL : 1;
4042 };
4043
4044 struct
4045 {
4046 unsigned SSPM : 4;
4047 unsigned : 4;
4048 };
4049 } __SSPCON1bits_t;
4050
4051 extern __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
4052
4053 #define _SSPM0 0x01
4054 #define _SSPM1 0x02
4055 #define _SSPM2 0x04
4056 #define _SSPM3 0x08
4057 #define _CKP 0x10
4058 #define _SSPEN 0x20
4059 #define _SSPOV 0x40
4060 #define _WCOL 0x80
4061
4062 //==============================================================================
4063
4064
4065 //==============================================================================
4066 // SSPSTAT Bits
4067
4068 extern __at(0x0FC7) __sfr SSPSTAT;
4069
4070 typedef union
4071 {
4072 struct
4073 {
4074 unsigned BF : 1;
4075 unsigned UA : 1;
4076 unsigned R_NOT_W : 1;
4077 unsigned S : 1;
4078 unsigned P : 1;
4079 unsigned D_NOT_A : 1;
4080 unsigned CKE : 1;
4081 unsigned SMP : 1;
4082 };
4083
4084 struct
4085 {
4086 unsigned : 1;
4087 unsigned : 1;
4088 unsigned R_W : 1;
4089 unsigned I2C_START : 1;
4090 unsigned I2C_STOP : 1;
4091 unsigned D_A : 1;
4092 unsigned : 1;
4093 unsigned : 1;
4094 };
4095
4096 struct
4097 {
4098 unsigned : 1;
4099 unsigned : 1;
4100 unsigned I2C_READ : 1;
4101 unsigned : 1;
4102 unsigned : 1;
4103 unsigned I2C_DAT : 1;
4104 unsigned : 1;
4105 unsigned : 1;
4106 };
4107
4108 struct
4109 {
4110 unsigned : 1;
4111 unsigned : 1;
4112 unsigned NOT_W : 1;
4113 unsigned : 1;
4114 unsigned : 1;
4115 unsigned NOT_A : 1;
4116 unsigned : 1;
4117 unsigned : 1;
4118 };
4119
4120 struct
4121 {
4122 unsigned : 1;
4123 unsigned : 1;
4124 unsigned NOT_WRITE : 1;
4125 unsigned : 1;
4126 unsigned : 1;
4127 unsigned NOT_ADDRESS : 1;
4128 unsigned : 1;
4129 unsigned : 1;
4130 };
4131
4132 struct
4133 {
4134 unsigned : 1;
4135 unsigned : 1;
4136 unsigned READ_WRITE : 1;
4137 unsigned : 1;
4138 unsigned : 1;
4139 unsigned DATA_ADDRESS : 1;
4140 unsigned : 1;
4141 unsigned : 1;
4142 };
4143
4144 struct
4145 {
4146 unsigned : 1;
4147 unsigned : 1;
4148 unsigned R : 1;
4149 unsigned : 1;
4150 unsigned : 1;
4151 unsigned D : 1;
4152 unsigned : 1;
4153 unsigned : 1;
4154 };
4155 } __SSPSTATbits_t;
4156
4157 extern __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
4158
4159 #define _BF 0x01
4160 #define _UA 0x02
4161 #define _R_NOT_W 0x04
4162 #define _R_W 0x04
4163 #define _I2C_READ 0x04
4164 #define _NOT_W 0x04
4165 #define _NOT_WRITE 0x04
4166 #define _READ_WRITE 0x04
4167 #define _R 0x04
4168 #define _S 0x08
4169 #define _I2C_START 0x08
4170 #define _P 0x10
4171 #define _I2C_STOP 0x10
4172 #define _D_NOT_A 0x20
4173 #define _D_A 0x20
4174 #define _I2C_DAT 0x20
4175 #define _NOT_A 0x20
4176 #define _NOT_ADDRESS 0x20
4177 #define _DATA_ADDRESS 0x20
4178 #define _D 0x20
4179 #define _CKE 0x40
4180 #define _SMP 0x80
4181
4182 //==============================================================================
4183
4184 extern __at(0x0FC8) __sfr SSPADD;
4185 extern __at(0x0FC9) __sfr SSPBUF;
4186
4187 //==============================================================================
4188 // T2CON Bits
4189
4190 extern __at(0x0FCA) __sfr T2CON;
4191
4192 typedef union
4193 {
4194 struct
4195 {
4196 unsigned T2CKPS0 : 1;
4197 unsigned T2CKPS1 : 1;
4198 unsigned TMR2ON : 1;
4199 unsigned T2OUTPS0 : 1;
4200 unsigned T2OUTPS1 : 1;
4201 unsigned T2OUTPS2 : 1;
4202 unsigned T2OUTPS3 : 1;
4203 unsigned : 1;
4204 };
4205
4206 struct
4207 {
4208 unsigned T2CKPS : 2;
4209 unsigned : 6;
4210 };
4211
4212 struct
4213 {
4214 unsigned : 3;
4215 unsigned T2OUTPS : 4;
4216 unsigned : 1;
4217 };
4218 } __T2CONbits_t;
4219
4220 extern __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
4221
4222 #define _T2CKPS0 0x01
4223 #define _T2CKPS1 0x02
4224 #define _TMR2ON 0x04
4225 #define _T2OUTPS0 0x08
4226 #define _T2OUTPS1 0x10
4227 #define _T2OUTPS2 0x20
4228 #define _T2OUTPS3 0x40
4229
4230 //==============================================================================
4231
4232 extern __at(0x0FCB) __sfr PR2;
4233 extern __at(0x0FCC) __sfr TMR2;
4234
4235 //==============================================================================
4236 // T1CON Bits
4237
4238 extern __at(0x0FCD) __sfr T1CON;
4239
4240 typedef union
4241 {
4242 struct
4243 {
4244 unsigned TMR1ON : 1;
4245 unsigned TMR1CS : 1;
4246 unsigned NOT_T1SYNC : 1;
4247 unsigned T1OSCEN : 1;
4248 unsigned T1CKPS0 : 1;
4249 unsigned T1CKPS1 : 1;
4250 unsigned : 1;
4251 unsigned RD16 : 1;
4252 };
4253
4254 struct
4255 {
4256 unsigned : 1;
4257 unsigned : 1;
4258 unsigned T1SYNC : 1;
4259 unsigned : 1;
4260 unsigned : 1;
4261 unsigned : 1;
4262 unsigned : 1;
4263 unsigned : 1;
4264 };
4265
4266 struct
4267 {
4268 unsigned : 1;
4269 unsigned : 1;
4270 unsigned T1INSYNC : 1;
4271 unsigned : 1;
4272 unsigned : 1;
4273 unsigned : 1;
4274 unsigned : 1;
4275 unsigned : 1;
4276 };
4277
4278 struct
4279 {
4280 unsigned : 4;
4281 unsigned T1CKPS : 2;
4282 unsigned : 2;
4283 };
4284 } __T1CONbits_t;
4285
4286 extern __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
4287
4288 #define _TMR1ON 0x01
4289 #define _TMR1CS 0x02
4290 #define _NOT_T1SYNC 0x04
4291 #define _T1SYNC 0x04
4292 #define _T1INSYNC 0x04
4293 #define _T1OSCEN 0x08
4294 #define _T1CKPS0 0x10
4295 #define _T1CKPS1 0x20
4296 #define _RD16 0x80
4297
4298 //==============================================================================
4299
4300 extern __at(0x0FCE) __sfr TMR1;
4301 extern __at(0x0FCE) __sfr TMR1L;
4302 extern __at(0x0FCF) __sfr TMR1H;
4303
4304 //==============================================================================
4305 // RCON Bits
4306
4307 extern __at(0x0FD0) __sfr RCON;
4308
4309 typedef union
4310 {
4311 struct
4312 {
4313 unsigned NOT_BOR : 1;
4314 unsigned NOT_POR : 1;
4315 unsigned NOT_PD : 1;
4316 unsigned NOT_TO : 1;
4317 unsigned NOT_RI : 1;
4318 unsigned : 1;
4319 unsigned : 1;
4320 unsigned IPEN : 1;
4321 };
4322
4323 struct
4324 {
4325 unsigned BOR : 1;
4326 unsigned POR : 1;
4327 unsigned PD : 1;
4328 unsigned TO : 1;
4329 unsigned RI : 1;
4330 unsigned : 1;
4331 unsigned : 1;
4332 unsigned NOT_IPEN : 1;
4333 };
4334 } __RCONbits_t;
4335
4336 extern __at(0x0FD0) volatile __RCONbits_t RCONbits;
4337
4338 #define _NOT_BOR 0x01
4339 #define _BOR 0x01
4340 #define _NOT_POR 0x02
4341 #define _POR 0x02
4342 #define _NOT_PD 0x04
4343 #define _PD 0x04
4344 #define _NOT_TO 0x08
4345 #define _TO 0x08
4346 #define _NOT_RI 0x10
4347 #define _RI 0x10
4348 #define _IPEN 0x80
4349 #define _NOT_IPEN 0x80
4350
4351 //==============================================================================
4352
4353
4354 //==============================================================================
4355 // WDTCON Bits
4356
4357 extern __at(0x0FD1) __sfr WDTCON;
4358
4359 typedef union
4360 {
4361 struct
4362 {
4363 unsigned SWDTEN : 1;
4364 unsigned : 1;
4365 unsigned : 1;
4366 unsigned : 1;
4367 unsigned : 1;
4368 unsigned : 1;
4369 unsigned : 1;
4370 unsigned : 1;
4371 };
4372
4373 struct
4374 {
4375 unsigned SWDTE : 1;
4376 unsigned : 1;
4377 unsigned : 1;
4378 unsigned : 1;
4379 unsigned : 1;
4380 unsigned : 1;
4381 unsigned : 1;
4382 unsigned : 1;
4383 };
4384 } __WDTCONbits_t;
4385
4386 extern __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
4387
4388 #define _SWDTEN 0x01
4389 #define _SWDTE 0x01
4390
4391 //==============================================================================
4392
4393
4394 //==============================================================================
4395 // LVDCON Bits
4396
4397 extern __at(0x0FD2) __sfr LVDCON;
4398
4399 typedef union
4400 {
4401 struct
4402 {
4403 unsigned LVDL0 : 1;
4404 unsigned LVDL1 : 1;
4405 unsigned LVDL2 : 1;
4406 unsigned LVDL3 : 1;
4407 unsigned LVDEN : 1;
4408 unsigned IRVST : 1;
4409 unsigned : 1;
4410 unsigned : 1;
4411 };
4412
4413 struct
4414 {
4415 unsigned LVV0 : 1;
4416 unsigned LVV1 : 1;
4417 unsigned LVV2 : 1;
4418 unsigned LVV3 : 1;
4419 unsigned : 1;
4420 unsigned BGST : 1;
4421 unsigned : 1;
4422 unsigned : 1;
4423 };
4424
4425 struct
4426 {
4427 unsigned LVDL : 4;
4428 unsigned : 4;
4429 };
4430
4431 struct
4432 {
4433 unsigned LVV : 4;
4434 unsigned : 4;
4435 };
4436 } __LVDCONbits_t;
4437
4438 extern __at(0x0FD2) volatile __LVDCONbits_t LVDCONbits;
4439
4440 #define _LVDL0 0x01
4441 #define _LVV0 0x01
4442 #define _LVDL1 0x02
4443 #define _LVV1 0x02
4444 #define _LVDL2 0x04
4445 #define _LVV2 0x04
4446 #define _LVDL3 0x08
4447 #define _LVV3 0x08
4448 #define _LVDEN 0x10
4449 #define _IRVST 0x20
4450 #define _BGST 0x20
4451
4452 //==============================================================================
4453
4454
4455 //==============================================================================
4456 // OSCCON Bits
4457
4458 extern __at(0x0FD3) __sfr OSCCON;
4459
4460 typedef union
4461 {
4462 struct
4463 {
4464 unsigned SCS0 : 1;
4465 unsigned SCS1 : 1;
4466 unsigned PLLEN : 1;
4467 unsigned LOCK : 1;
4468 unsigned : 1;
4469 unsigned : 1;
4470 unsigned : 1;
4471 unsigned : 1;
4472 };
4473
4474 struct
4475 {
4476 unsigned SCS : 2;
4477 unsigned : 6;
4478 };
4479 } __OSCCONbits_t;
4480
4481 extern __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
4482
4483 #define _SCS0 0x01
4484 #define _SCS1 0x02
4485 #define _PLLEN 0x04
4486 #define _LOCK 0x08
4487
4488 //==============================================================================
4489
4490
4491 //==============================================================================
4492 // T0CON Bits
4493
4494 extern __at(0x0FD5) __sfr T0CON;
4495
4496 typedef union
4497 {
4498 struct
4499 {
4500 unsigned T0PS0 : 1;
4501 unsigned T0PS1 : 1;
4502 unsigned T0PS2 : 1;
4503 unsigned PSA : 1;
4504 unsigned T0SE : 1;
4505 unsigned T0CS : 1;
4506 unsigned T08BIT : 1;
4507 unsigned TMR0ON : 1;
4508 };
4509
4510 struct
4511 {
4512 unsigned T0PS : 3;
4513 unsigned : 5;
4514 };
4515 } __T0CONbits_t;
4516
4517 extern __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
4518
4519 #define _T0PS0 0x01
4520 #define _T0PS1 0x02
4521 #define _T0PS2 0x04
4522 #define _PSA 0x08
4523 #define _T0SE 0x10
4524 #define _T0CS 0x20
4525 #define _T08BIT 0x40
4526 #define _TMR0ON 0x80
4527
4528 //==============================================================================
4529
4530 extern __at(0x0FD6) __sfr TMR0;
4531 extern __at(0x0FD6) __sfr TMR0L;
4532 extern __at(0x0FD7) __sfr TMR0H;
4533
4534 //==============================================================================
4535 // STATUS Bits
4536
4537 extern __at(0x0FD8) __sfr STATUS;
4538
4539 typedef struct
4540 {
4541 unsigned C : 1;
4542 unsigned DC : 1;
4543 unsigned Z : 1;
4544 unsigned OV : 1;
4545 unsigned N : 1;
4546 unsigned : 1;
4547 unsigned : 1;
4548 unsigned : 1;
4549 } __STATUSbits_t;
4550
4551 extern __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
4552
4553 #define _C 0x01
4554 #define _DC 0x02
4555 #define _Z 0x04
4556 #define _OV 0x08
4557 #define _N 0x10
4558
4559 //==============================================================================
4560
4561 extern __at(0x0FD9) __sfr FSR2L;
4562 extern __at(0x0FDA) __sfr FSR2H;
4563 extern __at(0x0FDB) __sfr PLUSW2;
4564 extern __at(0x0FDC) __sfr PREINC2;
4565 extern __at(0x0FDD) __sfr POSTDEC2;
4566 extern __at(0x0FDE) __sfr POSTINC2;
4567 extern __at(0x0FDF) __sfr INDF2;
4568 extern __at(0x0FE0) __sfr BSR;
4569 extern __at(0x0FE1) __sfr FSR1L;
4570 extern __at(0x0FE2) __sfr FSR1H;
4571 extern __at(0x0FE3) __sfr PLUSW1;
4572 extern __at(0x0FE4) __sfr PREINC1;
4573 extern __at(0x0FE5) __sfr POSTDEC1;
4574 extern __at(0x0FE6) __sfr POSTINC1;
4575 extern __at(0x0FE7) __sfr INDF1;
4576 extern __at(0x0FE8) __sfr WREG;
4577 extern __at(0x0FE9) __sfr FSR0L;
4578 extern __at(0x0FEA) __sfr FSR0H;
4579 extern __at(0x0FEB) __sfr PLUSW0;
4580 extern __at(0x0FEC) __sfr PREINC0;
4581 extern __at(0x0FED) __sfr POSTDEC0;
4582 extern __at(0x0FEE) __sfr POSTINC0;
4583 extern __at(0x0FEF) __sfr INDF0;
4584
4585 //==============================================================================
4586 // INTCON3 Bits
4587
4588 extern __at(0x0FF0) __sfr INTCON3;
4589
4590 typedef union
4591 {
4592 struct
4593 {
4594 unsigned INT1IF : 1;
4595 unsigned INT2IF : 1;
4596 unsigned INT3IF : 1;
4597 unsigned INT1IE : 1;
4598 unsigned INT2IE : 1;
4599 unsigned INT3IE : 1;
4600 unsigned INT1IP : 1;
4601 unsigned INT2IP : 1;
4602 };
4603
4604 struct
4605 {
4606 unsigned INT1F : 1;
4607 unsigned INT2F : 1;
4608 unsigned INT3F : 1;
4609 unsigned INT1E : 1;
4610 unsigned INT2E : 1;
4611 unsigned INT3E : 1;
4612 unsigned INT1P : 1;
4613 unsigned INT2P : 1;
4614 };
4615 } __INTCON3bits_t;
4616
4617 extern __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
4618
4619 #define _INT1IF 0x01
4620 #define _INT1F 0x01
4621 #define _INT2IF 0x02
4622 #define _INT2F 0x02
4623 #define _INT3IF 0x04
4624 #define _INT3F 0x04
4625 #define _INT1IE 0x08
4626 #define _INT1E 0x08
4627 #define _INT2IE 0x10
4628 #define _INT2E 0x10
4629 #define _INT3IE 0x20
4630 #define _INT3E 0x20
4631 #define _INT1IP 0x40
4632 #define _INT1P 0x40
4633 #define _INT2IP 0x80
4634 #define _INT2P 0x80
4635
4636 //==============================================================================
4637
4638
4639 //==============================================================================
4640 // INTCON2 Bits
4641
4642 extern __at(0x0FF1) __sfr INTCON2;
4643
4644 typedef union
4645 {
4646 struct
4647 {
4648 unsigned RBIP : 1;
4649 unsigned INT3IP : 1;
4650 unsigned TMR0IP : 1;
4651 unsigned INTEDG3 : 1;
4652 unsigned INTEDG2 : 1;
4653 unsigned INTEDG1 : 1;
4654 unsigned INTEDG0 : 1;
4655 unsigned NOT_RBPU : 1;
4656 };
4657
4658 struct
4659 {
4660 unsigned : 1;
4661 unsigned INT3P : 1;
4662 unsigned T0IP : 1;
4663 unsigned : 1;
4664 unsigned : 1;
4665 unsigned : 1;
4666 unsigned : 1;
4667 unsigned RBPU : 1;
4668 };
4669 } __INTCON2bits_t;
4670
4671 extern __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
4672
4673 #define _RBIP 0x01
4674 #define _INT3IP 0x02
4675 #define _INT3P 0x02
4676 #define _TMR0IP 0x04
4677 #define _T0IP 0x04
4678 #define _INTEDG3 0x08
4679 #define _INTEDG2 0x10
4680 #define _INTEDG1 0x20
4681 #define _INTEDG0 0x40
4682 #define _NOT_RBPU 0x80
4683 #define _RBPU 0x80
4684
4685 //==============================================================================
4686
4687
4688 //==============================================================================
4689 // INTCON Bits
4690
4691 extern __at(0x0FF2) __sfr INTCON;
4692
4693 typedef union
4694 {
4695 struct
4696 {
4697 unsigned RBIF : 1;
4698 unsigned INT0IF : 1;
4699 unsigned TMR0IF : 1;
4700 unsigned RBIE : 1;
4701 unsigned INT0IE : 1;
4702 unsigned TMR0IE : 1;
4703 unsigned PEIE_GIEL : 1;
4704 unsigned GIE_GIEH : 1;
4705 };
4706
4707 struct
4708 {
4709 unsigned : 1;
4710 unsigned INT0F : 1;
4711 unsigned T0IF : 1;
4712 unsigned : 1;
4713 unsigned INT0E : 1;
4714 unsigned T0IE : 1;
4715 unsigned PEIE : 1;
4716 unsigned GIE : 1;
4717 };
4718
4719 struct
4720 {
4721 unsigned : 1;
4722 unsigned : 1;
4723 unsigned : 1;
4724 unsigned : 1;
4725 unsigned : 1;
4726 unsigned : 1;
4727 unsigned GIEL : 1;
4728 unsigned GIEH : 1;
4729 };
4730 } __INTCONbits_t;
4731
4732 extern __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
4733
4734 #define _RBIF 0x01
4735 #define _INT0IF 0x02
4736 #define _INT0F 0x02
4737 #define _TMR0IF 0x04
4738 #define _T0IF 0x04
4739 #define _RBIE 0x08
4740 #define _INT0IE 0x10
4741 #define _INT0E 0x10
4742 #define _TMR0IE 0x20
4743 #define _T0IE 0x20
4744 #define _PEIE_GIEL 0x40
4745 #define _PEIE 0x40
4746 #define _GIEL 0x40
4747 #define _GIE_GIEH 0x80
4748 #define _GIE 0x80
4749 #define _GIEH 0x80
4750
4751 //==============================================================================
4752
4753 extern __at(0x0FF3) __sfr PROD;
4754 extern __at(0x0FF3) __sfr PRODL;
4755 extern __at(0x0FF4) __sfr PRODH;
4756 extern __at(0x0FF5) __sfr TABLAT;
4757 extern __at(0x0FF6) __sfr TBLPTR;
4758 extern __at(0x0FF6) __sfr TBLPTRL;
4759 extern __at(0x0FF7) __sfr TBLPTRH;
4760 extern __at(0x0FF8) __sfr TBLPTRU;
4761 extern __at(0x0FF9) __sfr PC;
4762 extern __at(0x0FF9) __sfr PCL;
4763 extern __at(0x0FFA) __sfr PCLATH;
4764 extern __at(0x0FFB) __sfr PCLATU;
4765
4766 //==============================================================================
4767 // STKPTR Bits
4768
4769 extern __at(0x0FFC) __sfr STKPTR;
4770
4771 typedef union
4772 {
4773 struct
4774 {
4775 unsigned STKPTR0 : 1;
4776 unsigned STKPTR1 : 1;
4777 unsigned STKPTR2 : 1;
4778 unsigned STKPTR3 : 1;
4779 unsigned STKPTR4 : 1;
4780 unsigned : 1;
4781 unsigned STKUNF : 1;
4782 unsigned STKFUL : 1;
4783 };
4784
4785 struct
4786 {
4787 unsigned : 1;
4788 unsigned : 1;
4789 unsigned : 1;
4790 unsigned : 1;
4791 unsigned : 1;
4792 unsigned : 1;
4793 unsigned : 1;
4794 unsigned STKOVF : 1;
4795 };
4796
4797 struct
4798 {
4799 unsigned STKPTR : 5;
4800 unsigned : 3;
4801 };
4802 } __STKPTRbits_t;
4803
4804 extern __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
4805
4806 #define _STKPTR0 0x01
4807 #define _STKPTR1 0x02
4808 #define _STKPTR2 0x04
4809 #define _STKPTR3 0x08
4810 #define _STKPTR4 0x10
4811 #define _STKUNF 0x40
4812 #define _STKFUL 0x80
4813 #define _STKOVF 0x80
4814
4815 //==============================================================================
4816
4817 extern __at(0x0FFD) __sfr TOS;
4818 extern __at(0x0FFD) __sfr TOSL;
4819 extern __at(0x0FFE) __sfr TOSH;
4820 extern __at(0x0FFF) __sfr TOSU;
4821
4822 //==============================================================================
4823 //
4824 // Configuration Bits
4825 //
4826 //==============================================================================
4827
4828 #define __CONFIG1H 0x300001
4829 #define __CONFIG2L 0x300002
4830 #define __CONFIG2H 0x300003
4831 #define __CONFIG3L 0x300004
4832 #define __CONFIG3H 0x300005
4833 #define __CONFIG4L 0x300006
4834 #define __CONFIG5L 0x300008
4835 #define __CONFIG5H 0x300009
4836 #define __CONFIG6L 0x30000A
4837 #define __CONFIG6H 0x30000B
4838 #define __CONFIG7L 0x30000C
4839 #define __CONFIG7H 0x30000D
4840
4841 //----------------------------- CONFIG1H Options -------------------------------
4842
4843 #define _OSC_LP_1H 0xF0 // LP oscillator.
4844 #define _OSC_XT_1H 0xF1 // XT oscillator.
4845 #define _OSC_HS_1H 0xF2 // HS oscillator.
4846 #define _OSC_RC_1H 0xF3 // RC oscillator with OSC2 configured as divide by 4 clock output.
4847 #define _OSC_EC_1H 0xF4 // EC oscillator with OSC2 configured as divide by 4 clock output.
4848 #define _OSC_ECIO_1H 0xF5 // EC oscillator with OSC2 configured as RA6.
4849 #define _OSC_HSPLL_1H 0xF6 // HS oscillator with HW enabled 4x PLL.
4850 #define _OSC_RCIO_1H 0xF7 // RC oscillator with OSC2 configured as RA6.
4851 #define _OSC_ECIOPLL_1H 0xFC // EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL.
4852 #define _OSC_ECIOSWPLL_1H 0xFD // EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL.
4853 #define _OSC_HSSWPLL_1H 0xFE // HS oscillator with SW enabled 4x PLL.
4854 #define _OSCS_ON_1H 0xDF // Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled).
4855 #define _OSCS_OFF_1H 0xFF // Oscillator system clock switch option is disabled (main oscillator is source).
4856
4857 //----------------------------- CONFIG2L Options -------------------------------
4858
4859 #define _PWRT_ON_2L 0xFE // PWRT enabled.
4860 #define _PWRT_OFF_2L 0xFF // PWRT disabled.
4861 #define _BOR_OFF_2L 0xFD // Brown-out Reset disabled.
4862 #define _BOR_ON_2L 0xFF // Brown-out Reset enabled.
4863 #define _BORV_45_2L 0xF3 // VBOR set to 4.5V.
4864 #define _BORV_42_2L 0xF7 // VBOR set to 4.2V.
4865 #define _BORV_27_2L 0xFB // VBOR set to 2.7V.
4866 #define _BORV_20_2L 0xFF // VBOR set to 2.0V.
4867
4868 //----------------------------- CONFIG2H Options -------------------------------
4869
4870 #define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit).
4871 #define _WDT_ON_2H 0xFF // WDT enabled.
4872 #define _WDTPS_1_2H 0xE1 // 1:1.
4873 #define _WDTPS_2_2H 0xE3 // 1:2.
4874 #define _WDTPS_4_2H 0xE5 // 1:4.
4875 #define _WDTPS_8_2H 0xE7 // 1:8.
4876 #define _WDTPS_16_2H 0xE9 // 1:16.
4877 #define _WDTPS_32_2H 0xEB // 1:32.
4878 #define _WDTPS_64_2H 0xED // 1:64.
4879 #define _WDTPS_128_2H 0xEF // 1:128.
4880 #define _WDTPS_256_2H 0xF1 // 1:256.
4881 #define _WDTPS_512_2H 0xF3 // 1:512.
4882 #define _WDTPS_1024_2H 0xF5 // 1:1024.
4883 #define _WDTPS_2048_2H 0xF7 // 1:2048.
4884 #define _WDTPS_4096_2H 0xF9 // 1:4096.
4885 #define _WDTPS_8192_2H 0xFB // 1:8192.
4886 #define _WDTPS_16384_2H 0xFD // 1:16384.
4887 #define _WDTPS_32768_2H 0xFF // 1:32768.
4888
4889 //----------------------------- CONFIG3L Options -------------------------------
4890
4891 #define _CCP2MX_PORTBE_3H 0xFE // Multiplexed with RB3 or RE7.
4892 #define _CCP2MX_PORTC_3H 0xFF // Multiplexed with RC1.
4893 #define _MCLRE_OFF_3H 0x7F // RG5 input enabled, MCLR disabled.
4894 #define _MCLRE_ON_3H 0xFF // MCLR pin enabled, RG5 input pin disabled.
4895
4896 //----------------------------- CONFIG3H Options -------------------------------
4897
4898 #define _CCP2MX_PORTBE_3H 0xFE // Multiplexed with RB3 or RE7.
4899 #define _CCP2MX_PORTC_3H 0xFF // Multiplexed with RC1.
4900 #define _MCLRE_OFF_3H 0x7F // RG5 input enabled, MCLR disabled.
4901 #define _MCLRE_ON_3H 0xFF // MCLR pin enabled, RG5 input pin disabled.
4902
4903 //----------------------------- CONFIG4L Options -------------------------------
4904
4905 #define _STVR_OFF_4L 0xFE // Stack full/underflow will not cause Reset.
4906 #define _STVR_ON_4L 0xFF // Stack full/underflow will cause Reset.
4907 #define _LVP_OFF_4L 0xFB // Low-Voltage ICSP disabled.
4908 #define _LVP_ON_4L 0xFF // Low-Voltage ICSP enabled.
4909 #define _DEBUG_ON_4L 0x7F // Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.
4910 #define _DEBUG_OFF_4L 0xFF // Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
4911
4912 //----------------------------- CONFIG5L Options -------------------------------
4913
4914 #define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected.
4915 #define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected.
4916 #define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected.
4917 #define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected.
4918 #define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected.
4919 #define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected.
4920
4921 //----------------------------- CONFIG5H Options -------------------------------
4922
4923 #define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected.
4924 #define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected.
4925 #define _CPD_ON_5H 0x7F // Data EEPROM code-protected.
4926 #define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected.
4927
4928 //----------------------------- CONFIG6L Options -------------------------------
4929
4930 #define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected.
4931 #define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected.
4932 #define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected.
4933 #define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected.
4934 #define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected.
4935 #define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected.
4936
4937 //----------------------------- CONFIG6H Options -------------------------------
4938
4939 #define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected.
4940 #define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected.
4941 #define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected.
4942 #define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected.
4943 #define _WRTD_ON_6H 0x7F // Data EEPROM write-protected.
4944 #define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected.
4945
4946 //----------------------------- CONFIG7L Options -------------------------------
4947
4948 #define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks.
4949 #define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks.
4950 #define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks.
4951 #define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks.
4952 #define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks.
4953 #define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks.
4954
4955 //----------------------------- CONFIG7H Options -------------------------------
4956
4957 #define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks.
4958 #define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks.
4959
4960 //==============================================================================
4961
4962 #define __DEVID1 0x3FFFFE
4963 #define __DEVID2 0x3FFFFF
4964
4965 #define __IDLOC0 0x200000
4966 #define __IDLOC1 0x200001
4967 #define __IDLOC2 0x200002
4968 #define __IDLOC3 0x200003
4969 #define __IDLOC4 0x200004
4970 #define __IDLOC5 0x200005
4971 #define __IDLOC6 0x200006
4972 #define __IDLOC7 0x200007
4973
4974 #endif // #ifndef __PIC18F6525_H__
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