?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
struct / union in initializer, RFE #901.
[sdcc.git] / sdcc / device / non-free / include / pic16 / pic18f8525.h
blobf2869b4dd176345e4f82d374cea56b42d1d32ac1
1 /*
2 * This declarations of the PIC18F8525 MCU.
3 *
4 * This file is part of the GNU PIC library for SDCC, originally
5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6 *
7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:51 UTC.
8 *
9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10 * this license covers the code to the compiler and other executables,
11 * but explicitly does not cover any code or objects generated by sdcc.
12 *
13 * For pic device libraries and header files which are derived from
14 * Microchip header (.inc) and linker script (.lkr) files Microchip
15 * requires that "The header files should state that they are only to be
16 * used with authentic Microchip devices" which makes them incompatible
17 * with the GPL. Pic device libraries and header files are located at
18 * non-free/lib and non-free/include directories respectively.
19 * Sdcc should be run with the --use-non-free command line option in
20 * order to include non-free header files and libraries.
21 *
22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23 */
24
25 #ifndef __PIC18F8525_H__
26 #define __PIC18F8525_H__
27
28 //==============================================================================
29
30 //==============================================================================
31 //
32 // Register Definitions
33 //
34 //==============================================================================
35
36
37 //==============================================================================
38 // ECCP2DEL Bits
39
40 extern __at(0x0F67) __sfr ECCP2DEL;
41
42 typedef union
43 {
44 struct
45 {
46 unsigned P2DC0 : 1;
47 unsigned P2DC1 : 1;
48 unsigned P2DC2 : 1;
49 unsigned P2DC3 : 1;
50 unsigned P2DC4 : 1;
51 unsigned P2DC5 : 1;
52 unsigned P2DC6 : 1;
53 unsigned P2RSEN : 1;
54 };
55
56 struct
57 {
58 unsigned PDC0 : 1;
59 unsigned PDC1 : 1;
60 unsigned PDC2 : 1;
61 unsigned PDC3 : 1;
62 unsigned PDC4 : 1;
63 unsigned PDC5 : 1;
64 unsigned PDC6 : 1;
65 unsigned PRSEN : 1;
66 };
67
68 struct
69 {
70 unsigned P2DC : 7;
71 unsigned : 1;
72 };
73
74 struct
75 {
76 unsigned PDC : 7;
77 unsigned : 1;
78 };
79 } __ECCP2DELbits_t;
80
81 extern __at(0x0F67) volatile __ECCP2DELbits_t ECCP2DELbits;
82
83 #define _ECCP2DEL_P2DC0 0x01
84 #define _ECCP2DEL_PDC0 0x01
85 #define _ECCP2DEL_P2DC1 0x02
86 #define _ECCP2DEL_PDC1 0x02
87 #define _ECCP2DEL_P2DC2 0x04
88 #define _ECCP2DEL_PDC2 0x04
89 #define _ECCP2DEL_P2DC3 0x08
90 #define _ECCP2DEL_PDC3 0x08
91 #define _ECCP2DEL_P2DC4 0x10
92 #define _ECCP2DEL_PDC4 0x10
93 #define _ECCP2DEL_P2DC5 0x20
94 #define _ECCP2DEL_PDC5 0x20
95 #define _ECCP2DEL_P2DC6 0x40
96 #define _ECCP2DEL_PDC6 0x40
97 #define _ECCP2DEL_P2RSEN 0x80
98 #define _ECCP2DEL_PRSEN 0x80
99
100 //==============================================================================
101
102
103 //==============================================================================
104 // PWM2CON Bits
105
106 extern __at(0x0F67) __sfr PWM2CON;
107
108 typedef union
109 {
110 struct
111 {
112 unsigned P2DC0 : 1;
113 unsigned P2DC1 : 1;
114 unsigned P2DC2 : 1;
115 unsigned P2DC3 : 1;
116 unsigned P2DC4 : 1;
117 unsigned P2DC5 : 1;
118 unsigned P2DC6 : 1;
119 unsigned P2RSEN : 1;
120 };
121
122 struct
123 {
124 unsigned PDC0 : 1;
125 unsigned PDC1 : 1;
126 unsigned PDC2 : 1;
127 unsigned PDC3 : 1;
128 unsigned PDC4 : 1;
129 unsigned PDC5 : 1;
130 unsigned PDC6 : 1;
131 unsigned PRSEN : 1;
132 };
133
134 struct
135 {
136 unsigned P2DC : 7;
137 unsigned : 1;
138 };
139
140 struct
141 {
142 unsigned PDC : 7;
143 unsigned : 1;
144 };
145 } __PWM2CONbits_t;
146
147 extern __at(0x0F67) volatile __PWM2CONbits_t PWM2CONbits;
148
149 #define _PWM2CON_P2DC0 0x01
150 #define _PWM2CON_PDC0 0x01
151 #define _PWM2CON_P2DC1 0x02
152 #define _PWM2CON_PDC1 0x02
153 #define _PWM2CON_P2DC2 0x04
154 #define _PWM2CON_PDC2 0x04
155 #define _PWM2CON_P2DC3 0x08
156 #define _PWM2CON_PDC3 0x08
157 #define _PWM2CON_P2DC4 0x10
158 #define _PWM2CON_PDC4 0x10
159 #define _PWM2CON_P2DC5 0x20
160 #define _PWM2CON_PDC5 0x20
161 #define _PWM2CON_P2DC6 0x40
162 #define _PWM2CON_PDC6 0x40
163 #define _PWM2CON_P2RSEN 0x80
164 #define _PWM2CON_PRSEN 0x80
165
166 //==============================================================================
167
168
169 //==============================================================================
170 // ECCP2AS Bits
171
172 extern __at(0x0F68) __sfr ECCP2AS;
173
174 typedef union
175 {
176 struct
177 {
178 unsigned PSS2BD0 : 1;
179 unsigned PSS2BD1 : 1;
180 unsigned PSS2AC0 : 1;
181 unsigned PSS2AC1 : 1;
182 unsigned ECCP2AS0 : 1;
183 unsigned ECCP2AS1 : 1;
184 unsigned ECCP2AS2 : 1;
185 unsigned ECCP2ASE : 1;
186 };
187
188 struct
189 {
190 unsigned PSSBD0 : 1;
191 unsigned PSSBD1 : 1;
192 unsigned PSSAC0 : 1;
193 unsigned PSSAC1 : 1;
194 unsigned : 1;
195 unsigned : 1;
196 unsigned : 1;
197 unsigned : 1;
198 };
199
200 struct
201 {
202 unsigned PSSBD : 2;
203 unsigned : 6;
204 };
205
206 struct
207 {
208 unsigned PSS2BD : 2;
209 unsigned : 6;
210 };
211
212 struct
213 {
214 unsigned : 2;
215 unsigned PSS2AC : 2;
216 unsigned : 4;
217 };
218
219 struct
220 {
221 unsigned : 2;
222 unsigned PSSAC : 2;
223 unsigned : 4;
224 };
225
226 struct
227 {
228 unsigned : 4;
229 unsigned ECCP2AS : 3;
230 unsigned : 1;
231 };
232 } __ECCP2ASbits_t;
233
234 extern __at(0x0F68) volatile __ECCP2ASbits_t ECCP2ASbits;
235
236 #define _ECCP2AS_PSS2BD0 0x01
237 #define _ECCP2AS_PSSBD0 0x01
238 #define _ECCP2AS_PSS2BD1 0x02
239 #define _ECCP2AS_PSSBD1 0x02
240 #define _ECCP2AS_PSS2AC0 0x04
241 #define _ECCP2AS_PSSAC0 0x04
242 #define _ECCP2AS_PSS2AC1 0x08
243 #define _ECCP2AS_PSSAC1 0x08
244 #define _ECCP2AS_ECCP2AS0 0x10
245 #define _ECCP2AS_ECCP2AS1 0x20
246 #define _ECCP2AS_ECCP2AS2 0x40
247 #define _ECCP2AS_ECCP2ASE 0x80
248
249 //==============================================================================
250
251
252 //==============================================================================
253 // ECCP3DEL Bits
254
255 extern __at(0x0F69) __sfr ECCP3DEL;
256
257 typedef union
258 {
259 struct
260 {
261 unsigned P3DC0 : 1;
262 unsigned P3DC1 : 1;
263 unsigned P3DC2 : 1;
264 unsigned P3DC3 : 1;
265 unsigned P3DC4 : 1;
266 unsigned P3DC5 : 1;
267 unsigned P3DC6 : 1;
268 unsigned P3RSEN : 1;
269 };
270
271 struct
272 {
273 unsigned PDC0 : 1;
274 unsigned PDC1 : 1;
275 unsigned PDC2 : 1;
276 unsigned PDC3 : 1;
277 unsigned PDC4 : 1;
278 unsigned PDC5 : 1;
279 unsigned PDC6 : 1;
280 unsigned PRSEN : 1;
281 };
282
283 struct
284 {
285 unsigned PDC : 7;
286 unsigned : 1;
287 };
288
289 struct
290 {
291 unsigned P3DC : 7;
292 unsigned : 1;
293 };
294 } __ECCP3DELbits_t;
295
296 extern __at(0x0F69) volatile __ECCP3DELbits_t ECCP3DELbits;
297
298 #define _ECCP3DEL_P3DC0 0x01
299 #define _ECCP3DEL_PDC0 0x01
300 #define _ECCP3DEL_P3DC1 0x02
301 #define _ECCP3DEL_PDC1 0x02
302 #define _ECCP3DEL_P3DC2 0x04
303 #define _ECCP3DEL_PDC2 0x04
304 #define _ECCP3DEL_P3DC3 0x08
305 #define _ECCP3DEL_PDC3 0x08
306 #define _ECCP3DEL_P3DC4 0x10
307 #define _ECCP3DEL_PDC4 0x10
308 #define _ECCP3DEL_P3DC5 0x20
309 #define _ECCP3DEL_PDC5 0x20
310 #define _ECCP3DEL_P3DC6 0x40
311 #define _ECCP3DEL_PDC6 0x40
312 #define _ECCP3DEL_P3RSEN 0x80
313 #define _ECCP3DEL_PRSEN 0x80
314
315 //==============================================================================
316
317
318 //==============================================================================
319 // PWM3CON Bits
320
321 extern __at(0x0F69) __sfr PWM3CON;
322
323 typedef union
324 {
325 struct
326 {
327 unsigned P3DC0 : 1;
328 unsigned P3DC1 : 1;
329 unsigned P3DC2 : 1;
330 unsigned P3DC3 : 1;
331 unsigned P3DC4 : 1;
332 unsigned P3DC5 : 1;
333 unsigned P3DC6 : 1;
334 unsigned P3RSEN : 1;
335 };
336
337 struct
338 {
339 unsigned PDC0 : 1;
340 unsigned PDC1 : 1;
341 unsigned PDC2 : 1;
342 unsigned PDC3 : 1;
343 unsigned PDC4 : 1;
344 unsigned PDC5 : 1;
345 unsigned PDC6 : 1;
346 unsigned PRSEN : 1;
347 };
348
349 struct
350 {
351 unsigned PDC : 7;
352 unsigned : 1;
353 };
354
355 struct
356 {
357 unsigned P3DC : 7;
358 unsigned : 1;
359 };
360 } __PWM3CONbits_t;
361
362 extern __at(0x0F69) volatile __PWM3CONbits_t PWM3CONbits;
363
364 #define _PWM3CON_P3DC0 0x01
365 #define _PWM3CON_PDC0 0x01
366 #define _PWM3CON_P3DC1 0x02
367 #define _PWM3CON_PDC1 0x02
368 #define _PWM3CON_P3DC2 0x04
369 #define _PWM3CON_PDC2 0x04
370 #define _PWM3CON_P3DC3 0x08
371 #define _PWM3CON_PDC3 0x08
372 #define _PWM3CON_P3DC4 0x10
373 #define _PWM3CON_PDC4 0x10
374 #define _PWM3CON_P3DC5 0x20
375 #define _PWM3CON_PDC5 0x20
376 #define _PWM3CON_P3DC6 0x40
377 #define _PWM3CON_PDC6 0x40
378 #define _PWM3CON_P3RSEN 0x80
379 #define _PWM3CON_PRSEN 0x80
380
381 //==============================================================================
382
383
384 //==============================================================================
385 // ECCP3AS Bits
386
387 extern __at(0x0F6A) __sfr ECCP3AS;
388
389 typedef union
390 {
391 struct
392 {
393 unsigned PSS3BD0 : 1;
394 unsigned PSS3BD1 : 1;
395 unsigned PSS3AC0 : 1;
396 unsigned PSS3AC1 : 1;
397 unsigned ECCP3AS0 : 1;
398 unsigned ECCP3AS1 : 1;
399 unsigned ECCP3AS2 : 1;
400 unsigned ECCP3ASE : 1;
401 };
402
403 struct
404 {
405 unsigned PSSBD0 : 1;
406 unsigned PSSBD1 : 1;
407 unsigned PSSAC0 : 1;
408 unsigned PSSAC1 : 1;
409 unsigned : 1;
410 unsigned : 1;
411 unsigned : 1;
412 unsigned : 1;
413 };
414
415 struct
416 {
417 unsigned PSS3BD : 2;
418 unsigned : 6;
419 };
420
421 struct
422 {
423 unsigned PSSBD : 2;
424 unsigned : 6;
425 };
426
427 struct
428 {
429 unsigned : 2;
430 unsigned PSSAC : 2;
431 unsigned : 4;
432 };
433
434 struct
435 {
436 unsigned : 2;
437 unsigned PSS3AC : 2;
438 unsigned : 4;
439 };
440
441 struct
442 {
443 unsigned : 4;
444 unsigned ECCP3AS : 3;
445 unsigned : 1;
446 };
447 } __ECCP3ASbits_t;
448
449 extern __at(0x0F6A) volatile __ECCP3ASbits_t ECCP3ASbits;
450
451 #define _ECCP3AS_PSS3BD0 0x01
452 #define _ECCP3AS_PSSBD0 0x01
453 #define _ECCP3AS_PSS3BD1 0x02
454 #define _ECCP3AS_PSSBD1 0x02
455 #define _ECCP3AS_PSS3AC0 0x04
456 #define _ECCP3AS_PSSAC0 0x04
457 #define _ECCP3AS_PSS3AC1 0x08
458 #define _ECCP3AS_PSSAC1 0x08
459 #define _ECCP3AS_ECCP3AS0 0x10
460 #define _ECCP3AS_ECCP3AS1 0x20
461 #define _ECCP3AS_ECCP3AS2 0x40
462 #define _ECCP3AS_ECCP3ASE 0x80
463
464 //==============================================================================
465
466
467 //==============================================================================
468 // RCSTA2 Bits
469
470 extern __at(0x0F6B) __sfr RCSTA2;
471
472 typedef union
473 {
474 struct
475 {
476 unsigned RX9D : 1;
477 unsigned OERR : 1;
478 unsigned FERR : 1;
479 unsigned ADDEN : 1;
480 unsigned CREN : 1;
481 unsigned SREN : 1;
482 unsigned RX9 : 1;
483 unsigned SPEN : 1;
484 };
485
486 struct
487 {
488 unsigned RX9D2 : 1;
489 unsigned OERR2 : 1;
490 unsigned FERR2 : 1;
491 unsigned ADEN : 1;
492 unsigned CREN2 : 1;
493 unsigned SREN2 : 1;
494 unsigned RX92 : 1;
495 unsigned SPEN2 : 1;
496 };
497
498 struct
499 {
500 unsigned : 1;
501 unsigned : 1;
502 unsigned : 1;
503 unsigned ADDEN2 : 1;
504 unsigned : 1;
505 unsigned : 1;
506 unsigned : 1;
507 unsigned : 1;
508 };
509
510 struct
511 {
512 unsigned : 1;
513 unsigned : 1;
514 unsigned : 1;
515 unsigned ADEN2 : 1;
516 unsigned : 1;
517 unsigned : 1;
518 unsigned : 1;
519 unsigned : 1;
520 };
521 } __RCSTA2bits_t;
522
523 extern __at(0x0F6B) volatile __RCSTA2bits_t RCSTA2bits;
524
525 #define _RCSTA2_RX9D 0x01
526 #define _RCSTA2_RX9D2 0x01
527 #define _RCSTA2_OERR 0x02
528 #define _RCSTA2_OERR2 0x02
529 #define _RCSTA2_FERR 0x04
530 #define _RCSTA2_FERR2 0x04
531 #define _RCSTA2_ADDEN 0x08
532 #define _RCSTA2_ADEN 0x08
533 #define _RCSTA2_ADDEN2 0x08
534 #define _RCSTA2_ADEN2 0x08
535 #define _RCSTA2_CREN 0x10
536 #define _RCSTA2_CREN2 0x10
537 #define _RCSTA2_SREN 0x20
538 #define _RCSTA2_SREN2 0x20
539 #define _RCSTA2_RX9 0x40
540 #define _RCSTA2_RX92 0x40
541 #define _RCSTA2_SPEN 0x80
542 #define _RCSTA2_SPEN2 0x80
543
544 //==============================================================================
545
546
547 //==============================================================================
548 // TXSTA2 Bits
549
550 extern __at(0x0F6C) __sfr TXSTA2;
551
552 typedef union
553 {
554 struct
555 {
556 unsigned TX9D : 1;
557 unsigned TRMT : 1;
558 unsigned BRGH : 1;
559 unsigned SENDB : 1;
560 unsigned SYNC : 1;
561 unsigned TXEN : 1;
562 unsigned TX9 : 1;
563 unsigned CSRC : 1;
564 };
565
566 struct
567 {
568 unsigned TX9D2 : 1;
569 unsigned TRMT2 : 1;
570 unsigned BRGH2 : 1;
571 unsigned SENDB2 : 1;
572 unsigned SYNC2 : 1;
573 unsigned TXEN2 : 1;
574 unsigned TX92 : 1;
575 unsigned CSRC2 : 1;
576 };
577 } __TXSTA2bits_t;
578
579 extern __at(0x0F6C) volatile __TXSTA2bits_t TXSTA2bits;
580
581 #define _TXSTA2_TX9D 0x01
582 #define _TXSTA2_TX9D2 0x01
583 #define _TXSTA2_TRMT 0x02
584 #define _TXSTA2_TRMT2 0x02
585 #define _TXSTA2_BRGH 0x04
586 #define _TXSTA2_BRGH2 0x04
587 #define _TXSTA2_SENDB 0x08
588 #define _TXSTA2_SENDB2 0x08
589 #define _TXSTA2_SYNC 0x10
590 #define _TXSTA2_SYNC2 0x10
591 #define _TXSTA2_TXEN 0x20
592 #define _TXSTA2_TXEN2 0x20
593 #define _TXSTA2_TX9 0x40
594 #define _TXSTA2_TX92 0x40
595 #define _TXSTA2_CSRC 0x80
596 #define _TXSTA2_CSRC2 0x80
597
598 //==============================================================================
599
600 extern __at(0x0F6D) __sfr TXREG2;
601 extern __at(0x0F6E) __sfr RCREG2;
602 extern __at(0x0F6F) __sfr SPBRG2;
603
604 //==============================================================================
605 // CCP5CON Bits
606
607 extern __at(0x0F70) __sfr CCP5CON;
608
609 typedef union
610 {
611 struct
612 {
613 unsigned CCP5M0 : 1;
614 unsigned CCP5M1 : 1;
615 unsigned CCP5M2 : 1;
616 unsigned CCP5M3 : 1;
617 unsigned CCP5Y : 1;
618 unsigned CCP5X : 1;
619 unsigned : 1;
620 unsigned : 1;
621 };
622
623 struct
624 {
625 unsigned : 1;
626 unsigned : 1;
627 unsigned : 1;
628 unsigned : 1;
629 unsigned DC5B0 : 1;
630 unsigned DC5B1 : 1;
631 unsigned : 1;
632 unsigned : 1;
633 };
634
635 struct
636 {
637 unsigned CCP5M : 4;
638 unsigned : 4;
639 };
640
641 struct
642 {
643 unsigned : 4;
644 unsigned DC5B : 2;
645 unsigned : 2;
646 };
647 } __CCP5CONbits_t;
648
649 extern __at(0x0F70) volatile __CCP5CONbits_t CCP5CONbits;
650
651 #define _CCP5M0 0x01
652 #define _CCP5M1 0x02
653 #define _CCP5M2 0x04
654 #define _CCP5M3 0x08
655 #define _CCP5Y 0x10
656 #define _DC5B0 0x10
657 #define _CCP5X 0x20
658 #define _DC5B1 0x20
659
660 //==============================================================================
661
662 extern __at(0x0F71) __sfr CCPR5;
663 extern __at(0x0F71) __sfr CCPR5L;
664 extern __at(0x0F72) __sfr CCPR5H;
665
666 //==============================================================================
667 // CCP4CON Bits
668
669 extern __at(0x0F73) __sfr CCP4CON;
670
671 typedef union
672 {
673 struct
674 {
675 unsigned CCP4M0 : 1;
676 unsigned CCP4M1 : 1;
677 unsigned CCP4M2 : 1;
678 unsigned CCP4M3 : 1;
679 unsigned CCP4Y : 1;
680 unsigned CCP4X : 1;
681 unsigned : 1;
682 unsigned : 1;
683 };
684
685 struct
686 {
687 unsigned : 1;
688 unsigned : 1;
689 unsigned : 1;
690 unsigned : 1;
691 unsigned DC4B0 : 1;
692 unsigned DC4B1 : 1;
693 unsigned : 1;
694 unsigned : 1;
695 };
696
697 struct
698 {
699 unsigned CCP4M : 4;
700 unsigned : 4;
701 };
702
703 struct
704 {
705 unsigned : 4;
706 unsigned DC4B : 2;
707 unsigned : 2;
708 };
709 } __CCP4CONbits_t;
710
711 extern __at(0x0F73) volatile __CCP4CONbits_t CCP4CONbits;
712
713 #define _CCP4M0 0x01
714 #define _CCP4M1 0x02
715 #define _CCP4M2 0x04
716 #define _CCP4M3 0x08
717 #define _CCP4Y 0x10
718 #define _DC4B0 0x10
719 #define _CCP4X 0x20
720 #define _DC4B1 0x20
721
722 //==============================================================================
723
724 extern __at(0x0F74) __sfr CCPR4;
725 extern __at(0x0F74) __sfr CCPR4L;
726 extern __at(0x0F75) __sfr CCPR4H;
727
728 //==============================================================================
729 // T4CON Bits
730
731 extern __at(0x0F76) __sfr T4CON;
732
733 typedef union
734 {
735 struct
736 {
737 unsigned T4CKPS0 : 1;
738 unsigned T4CKPS1 : 1;
739 unsigned TMR4ON : 1;
740 unsigned TOUTPS0 : 1;
741 unsigned TOUTPS1 : 1;
742 unsigned TOUTPS2 : 1;
743 unsigned TOUTPS3 : 1;
744 unsigned : 1;
745 };
746
747 struct
748 {
749 unsigned : 1;
750 unsigned : 1;
751 unsigned : 1;
752 unsigned T4OUTPS0 : 1;
753 unsigned T4OUTPS1 : 1;
754 unsigned T4OUTPS2 : 1;
755 unsigned T4OUTPS3 : 1;
756 unsigned : 1;
757 };
758
759 struct
760 {
761 unsigned T4CKPS : 2;
762 unsigned : 6;
763 };
764
765 struct
766 {
767 unsigned : 3;
768 unsigned T4OUTPS : 4;
769 unsigned : 1;
770 };
771
772 struct
773 {
774 unsigned : 3;
775 unsigned TOUTPS : 4;
776 unsigned : 1;
777 };
778 } __T4CONbits_t;
779
780 extern __at(0x0F76) volatile __T4CONbits_t T4CONbits;
781
782 #define _T4CKPS0 0x01
783 #define _T4CKPS1 0x02
784 #define _TMR4ON 0x04
785 #define _TOUTPS0 0x08
786 #define _T4OUTPS0 0x08
787 #define _TOUTPS1 0x10
788 #define _T4OUTPS1 0x10
789 #define _TOUTPS2 0x20
790 #define _T4OUTPS2 0x20
791 #define _TOUTPS3 0x40
792 #define _T4OUTPS3 0x40
793
794 //==============================================================================
795
796 extern __at(0x0F77) __sfr PR4;
797 extern __at(0x0F78) __sfr TMR4;
798
799 //==============================================================================
800 // ECCP1DEL Bits
801
802 extern __at(0x0F79) __sfr ECCP1DEL;
803
804 typedef union
805 {
806 struct
807 {
808 unsigned P1DC0 : 1;
809 unsigned P1DC1 : 1;
810 unsigned P1DC2 : 1;
811 unsigned P1DC3 : 1;
812 unsigned P1DC4 : 1;
813 unsigned P1DC5 : 1;
814 unsigned P1DC6 : 1;
815 unsigned P1RSEN : 1;
816 };
817
818 struct
819 {
820 unsigned PDC0 : 1;
821 unsigned PDC1 : 1;
822 unsigned PDC2 : 1;
823 unsigned PDC3 : 1;
824 unsigned PDC4 : 1;
825 unsigned PDC5 : 1;
826 unsigned PDC6 : 1;
827 unsigned P1DC7 : 1;
828 };
829
830 struct
831 {
832 unsigned : 1;
833 unsigned : 1;
834 unsigned : 1;
835 unsigned : 1;
836 unsigned : 1;
837 unsigned : 1;
838 unsigned : 1;
839 unsigned PRSEN : 1;
840 };
841
842 struct
843 {
844 unsigned PDC : 7;
845 unsigned : 1;
846 };
847 } __ECCP1DELbits_t;
848
849 extern __at(0x0F79) volatile __ECCP1DELbits_t ECCP1DELbits;
850
851 #define _P1DC0 0x01
852 #define _PDC0 0x01
853 #define _P1DC1 0x02
854 #define _PDC1 0x02
855 #define _P1DC2 0x04
856 #define _PDC2 0x04
857 #define _P1DC3 0x08
858 #define _PDC3 0x08
859 #define _P1DC4 0x10
860 #define _PDC4 0x10
861 #define _P1DC5 0x20
862 #define _PDC5 0x20
863 #define _P1DC6 0x40
864 #define _PDC6 0x40
865 #define _P1RSEN 0x80
866 #define _P1DC7 0x80
867 #define _PRSEN 0x80
868
869 //==============================================================================
870
871
872 //==============================================================================
873 // PWM1CON Bits
874
875 extern __at(0x0F79) __sfr PWM1CON;
876
877 typedef union
878 {
879 struct
880 {
881 unsigned P1DC0 : 1;
882 unsigned P1DC1 : 1;
883 unsigned P1DC2 : 1;
884 unsigned P1DC3 : 1;
885 unsigned P1DC4 : 1;
886 unsigned P1DC5 : 1;
887 unsigned P1DC6 : 1;
888 unsigned P1RSEN : 1;
889 };
890
891 struct
892 {
893 unsigned PDC0 : 1;
894 unsigned PDC1 : 1;
895 unsigned PDC2 : 1;
896 unsigned PDC3 : 1;
897 unsigned PDC4 : 1;
898 unsigned PDC5 : 1;
899 unsigned PDC6 : 1;
900 unsigned P1DC7 : 1;
901 };
902
903 struct
904 {
905 unsigned : 1;
906 unsigned : 1;
907 unsigned : 1;
908 unsigned : 1;
909 unsigned : 1;
910 unsigned : 1;
911 unsigned : 1;
912 unsigned PRSEN : 1;
913 };
914
915 struct
916 {
917 unsigned PDC : 7;
918 unsigned : 1;
919 };
920 } __PWM1CONbits_t;
921
922 extern __at(0x0F79) volatile __PWM1CONbits_t PWM1CONbits;
923
924 #define _PWM1CON_P1DC0 0x01
925 #define _PWM1CON_PDC0 0x01
926 #define _PWM1CON_P1DC1 0x02
927 #define _PWM1CON_PDC1 0x02
928 #define _PWM1CON_P1DC2 0x04
929 #define _PWM1CON_PDC2 0x04
930 #define _PWM1CON_P1DC3 0x08
931 #define _PWM1CON_PDC3 0x08
932 #define _PWM1CON_P1DC4 0x10
933 #define _PWM1CON_PDC4 0x10
934 #define _PWM1CON_P1DC5 0x20
935 #define _PWM1CON_PDC5 0x20
936 #define _PWM1CON_P1DC6 0x40
937 #define _PWM1CON_PDC6 0x40
938 #define _PWM1CON_P1RSEN 0x80
939 #define _PWM1CON_P1DC7 0x80
940 #define _PWM1CON_PRSEN 0x80
941
942 //==============================================================================
943
944
945 //==============================================================================
946 // BAUDCON2 Bits
947
948 extern __at(0x0F7C) __sfr BAUDCON2;
949
950 typedef union
951 {
952 struct
953 {
954 unsigned ABDEN : 1;
955 unsigned WUE : 1;
956 unsigned : 1;
957 unsigned BRG16 : 1;
958 unsigned SCKP : 1;
959 unsigned : 1;
960 unsigned RCIDL : 1;
961 unsigned : 1;
962 };
963
964 struct
965 {
966 unsigned ABDEN2 : 1;
967 unsigned WUE2 : 1;
968 unsigned : 1;
969 unsigned BRG162 : 1;
970 unsigned SCKP2 : 1;
971 unsigned : 1;
972 unsigned RCMT : 1;
973 unsigned : 1;
974 };
975
976 struct
977 {
978 unsigned : 1;
979 unsigned : 1;
980 unsigned : 1;
981 unsigned : 1;
982 unsigned : 1;
983 unsigned : 1;
984 unsigned RCIDL2 : 1;
985 unsigned : 1;
986 };
987 } __BAUDCON2bits_t;
988
989 extern __at(0x0F7C) volatile __BAUDCON2bits_t BAUDCON2bits;
990
991 #define _BAUDCON2_ABDEN 0x01
992 #define _BAUDCON2_ABDEN2 0x01
993 #define _BAUDCON2_WUE 0x02
994 #define _BAUDCON2_WUE2 0x02
995 #define _BAUDCON2_BRG16 0x08
996 #define _BAUDCON2_BRG162 0x08
997 #define _BAUDCON2_SCKP 0x10
998 #define _BAUDCON2_SCKP2 0x10
999 #define _BAUDCON2_RCIDL 0x40
1000 #define _BAUDCON2_RCMT 0x40
1001 #define _BAUDCON2_RCIDL2 0x40
1002
1003 //==============================================================================
1004
1005
1006 //==============================================================================
1007 // BAUDCTL2 Bits
1008
1009 extern __at(0x0F7C) __sfr BAUDCTL2;
1010
1011 typedef union
1012 {
1013 struct
1014 {
1015 unsigned ABDEN : 1;
1016 unsigned WUE : 1;
1017 unsigned : 1;
1018 unsigned BRG16 : 1;
1019 unsigned SCKP : 1;
1020 unsigned : 1;
1021 unsigned RCIDL : 1;
1022 unsigned : 1;
1023 };
1024
1025 struct
1026 {
1027 unsigned ABDEN2 : 1;
1028 unsigned WUE2 : 1;
1029 unsigned : 1;
1030 unsigned BRG162 : 1;
1031 unsigned SCKP2 : 1;
1032 unsigned : 1;
1033 unsigned RCMT : 1;
1034 unsigned : 1;
1035 };
1036
1037 struct
1038 {
1039 unsigned : 1;
1040 unsigned : 1;
1041 unsigned : 1;
1042 unsigned : 1;
1043 unsigned : 1;
1044 unsigned : 1;
1045 unsigned RCIDL2 : 1;
1046 unsigned : 1;
1047 };
1048 } __BAUDCTL2bits_t;
1049
1050 extern __at(0x0F7C) volatile __BAUDCTL2bits_t BAUDCTL2bits;
1051
1052 #define _BAUDCTL2_ABDEN 0x01
1053 #define _BAUDCTL2_ABDEN2 0x01
1054 #define _BAUDCTL2_WUE 0x02
1055 #define _BAUDCTL2_WUE2 0x02
1056 #define _BAUDCTL2_BRG16 0x08
1057 #define _BAUDCTL2_BRG162 0x08
1058 #define _BAUDCTL2_SCKP 0x10
1059 #define _BAUDCTL2_SCKP2 0x10
1060 #define _BAUDCTL2_RCIDL 0x40
1061 #define _BAUDCTL2_RCMT 0x40
1062 #define _BAUDCTL2_RCIDL2 0x40
1063
1064 //==============================================================================
1065
1066 extern __at(0x0F7D) __sfr SPBRGH2;
1067
1068 //==============================================================================
1069 // BAUDCON Bits
1070
1071 extern __at(0x0F7E) __sfr BAUDCON;
1072
1073 typedef union
1074 {
1075 struct
1076 {
1077 unsigned ABDEN : 1;
1078 unsigned WUE : 1;
1079 unsigned : 1;
1080 unsigned BRG16 : 1;
1081 unsigned SCKP : 1;
1082 unsigned : 1;
1083 unsigned RCIDL : 1;
1084 unsigned : 1;
1085 };
1086
1087 struct
1088 {
1089 unsigned : 1;
1090 unsigned : 1;
1091 unsigned : 1;
1092 unsigned : 1;
1093 unsigned : 1;
1094 unsigned : 1;
1095 unsigned RCMT : 1;
1096 unsigned : 1;
1097 };
1098 } __BAUDCONbits_t;
1099
1100 extern __at(0x0F7E) volatile __BAUDCONbits_t BAUDCONbits;
1101
1102 #define _ABDEN 0x01
1103 #define _WUE 0x02
1104 #define _BRG16 0x08
1105 #define _SCKP 0x10
1106 #define _RCIDL 0x40
1107 #define _RCMT 0x40
1108
1109 //==============================================================================
1110
1111
1112 //==============================================================================
1113 // BAUDCON1 Bits
1114
1115 extern __at(0x0F7E) __sfr BAUDCON1;
1116
1117 typedef union
1118 {
1119 struct
1120 {
1121 unsigned ABDEN : 1;
1122 unsigned WUE : 1;
1123 unsigned : 1;
1124 unsigned BRG16 : 1;
1125 unsigned SCKP : 1;
1126 unsigned : 1;
1127 unsigned RCIDL : 1;
1128 unsigned : 1;
1129 };
1130
1131 struct
1132 {
1133 unsigned : 1;
1134 unsigned : 1;
1135 unsigned : 1;
1136 unsigned : 1;
1137 unsigned : 1;
1138 unsigned : 1;
1139 unsigned RCMT : 1;
1140 unsigned : 1;
1141 };
1142 } __BAUDCON1bits_t;
1143
1144 extern __at(0x0F7E) volatile __BAUDCON1bits_t BAUDCON1bits;
1145
1146 #define _BAUDCON1_ABDEN 0x01
1147 #define _BAUDCON1_WUE 0x02
1148 #define _BAUDCON1_BRG16 0x08
1149 #define _BAUDCON1_SCKP 0x10
1150 #define _BAUDCON1_RCIDL 0x40
1151 #define _BAUDCON1_RCMT 0x40
1152
1153 //==============================================================================
1154
1155
1156 //==============================================================================
1157 // BAUDCTL1 Bits
1158
1159 extern __at(0x0F7E) __sfr BAUDCTL1;
1160
1161 typedef union
1162 {
1163 struct
1164 {
1165 unsigned ABDEN : 1;
1166 unsigned WUE : 1;
1167 unsigned : 1;
1168 unsigned BRG16 : 1;
1169 unsigned SCKP : 1;
1170 unsigned : 1;
1171 unsigned RCIDL : 1;
1172 unsigned : 1;
1173 };
1174
1175 struct
1176 {
1177 unsigned : 1;
1178 unsigned : 1;
1179 unsigned : 1;
1180 unsigned : 1;
1181 unsigned : 1;
1182 unsigned : 1;
1183 unsigned RCMT : 1;
1184 unsigned : 1;
1185 };
1186 } __BAUDCTL1bits_t;
1187
1188 extern __at(0x0F7E) volatile __BAUDCTL1bits_t BAUDCTL1bits;
1189
1190 #define _BAUDCTL1_ABDEN 0x01
1191 #define _BAUDCTL1_WUE 0x02
1192 #define _BAUDCTL1_BRG16 0x08
1193 #define _BAUDCTL1_SCKP 0x10
1194 #define _BAUDCTL1_RCIDL 0x40
1195 #define _BAUDCTL1_RCMT 0x40
1196
1197 //==============================================================================
1198
1199 extern __at(0x0F7F) __sfr SPBRGH;
1200 extern __at(0x0F7F) __sfr SPBRGH1;
1201
1202 //==============================================================================
1203 // PORTA Bits
1204
1205 extern __at(0x0F80) __sfr PORTA;
1206
1207 typedef union
1208 {
1209 struct
1210 {
1211 unsigned RA0 : 1;
1212 unsigned RA1 : 1;
1213 unsigned RA2 : 1;
1214 unsigned RA3 : 1;
1215 unsigned RA4 : 1;
1216 unsigned RA5 : 1;
1217 unsigned RA6 : 1;
1218 unsigned : 1;
1219 };
1220
1221 struct
1222 {
1223 unsigned AN0 : 1;
1224 unsigned AN1 : 1;
1225 unsigned AN2 : 1;
1226 unsigned AN3 : 1;
1227 unsigned T0CKI : 1;
1228 unsigned AN4 : 1;
1229 unsigned OSC2 : 1;
1230 unsigned : 1;
1231 };
1232
1233 struct
1234 {
1235 unsigned : 1;
1236 unsigned : 1;
1237 unsigned VREFM : 1;
1238 unsigned VREFP : 1;
1239 unsigned : 1;
1240 unsigned LVDIN : 1;
1241 unsigned CLKO : 1;
1242 unsigned : 1;
1243 };
1244
1245 struct
1246 {
1247 unsigned RA : 7;
1248 unsigned : 1;
1249 };
1250 } __PORTAbits_t;
1251
1252 extern __at(0x0F80) volatile __PORTAbits_t PORTAbits;
1253
1254 #define _PORTA_RA0 0x01
1255 #define _PORTA_AN0 0x01
1256 #define _PORTA_RA1 0x02
1257 #define _PORTA_AN1 0x02
1258 #define _PORTA_RA2 0x04
1259 #define _PORTA_AN2 0x04
1260 #define _PORTA_VREFM 0x04
1261 #define _PORTA_RA3 0x08
1262 #define _PORTA_AN3 0x08
1263 #define _PORTA_VREFP 0x08
1264 #define _PORTA_RA4 0x10
1265 #define _PORTA_T0CKI 0x10
1266 #define _PORTA_RA5 0x20
1267 #define _PORTA_AN4 0x20
1268 #define _PORTA_LVDIN 0x20
1269 #define _PORTA_RA6 0x40
1270 #define _PORTA_OSC2 0x40
1271 #define _PORTA_CLKO 0x40
1272
1273 //==============================================================================
1274
1275
1276 //==============================================================================
1277 // PORTB Bits
1278
1279 extern __at(0x0F81) __sfr PORTB;
1280
1281 typedef union
1282 {
1283 struct
1284 {
1285 unsigned RB0 : 1;
1286 unsigned RB1 : 1;
1287 unsigned RB2 : 1;
1288 unsigned RB3 : 1;
1289 unsigned RB4 : 1;
1290 unsigned RB5 : 1;
1291 unsigned RB6 : 1;
1292 unsigned RB7 : 1;
1293 };
1294
1295 struct
1296 {
1297 unsigned INT0 : 1;
1298 unsigned INT1 : 1;
1299 unsigned INT2 : 1;
1300 unsigned INT3 : 1;
1301 unsigned KBI0 : 1;
1302 unsigned KBI1 : 1;
1303 unsigned KBI2 : 1;
1304 unsigned KBI3 : 1;
1305 };
1306
1307 struct
1308 {
1309 unsigned : 1;
1310 unsigned : 1;
1311 unsigned : 1;
1312 unsigned : 1;
1313 unsigned : 1;
1314 unsigned PGM : 1;
1315 unsigned PGC : 1;
1316 unsigned PGD : 1;
1317 };
1318
1319 struct
1320 {
1321 unsigned INT : 4;
1322 unsigned : 4;
1323 };
1324
1325 struct
1326 {
1327 unsigned : 4;
1328 unsigned KBI : 4;
1329 };
1330 } __PORTBbits_t;
1331
1332 extern __at(0x0F81) volatile __PORTBbits_t PORTBbits;
1333
1334 #define _PORTB_RB0 0x01
1335 #define _PORTB_INT0 0x01
1336 #define _PORTB_RB1 0x02
1337 #define _PORTB_INT1 0x02
1338 #define _PORTB_RB2 0x04
1339 #define _PORTB_INT2 0x04
1340 #define _PORTB_RB3 0x08
1341 #define _PORTB_INT3 0x08
1342 #define _PORTB_RB4 0x10
1343 #define _PORTB_KBI0 0x10
1344 #define _PORTB_RB5 0x20
1345 #define _PORTB_KBI1 0x20
1346 #define _PORTB_PGM 0x20
1347 #define _PORTB_RB6 0x40
1348 #define _PORTB_KBI2 0x40
1349 #define _PORTB_PGC 0x40
1350 #define _PORTB_RB7 0x80
1351 #define _PORTB_KBI3 0x80
1352 #define _PORTB_PGD 0x80
1353
1354 //==============================================================================
1355
1356
1357 //==============================================================================
1358 // PORTC Bits
1359
1360 extern __at(0x0F82) __sfr PORTC;
1361
1362 typedef union
1363 {
1364 struct
1365 {
1366 unsigned RC0 : 1;
1367 unsigned RC1 : 1;
1368 unsigned RC2 : 1;
1369 unsigned RC3 : 1;
1370 unsigned RC4 : 1;
1371 unsigned RC5 : 1;
1372 unsigned RC6 : 1;
1373 unsigned RC7 : 1;
1374 };
1375
1376 struct
1377 {
1378 unsigned T1OSO : 1;
1379 unsigned T1OSI : 1;
1380 unsigned CCP1 : 1;
1381 unsigned SCK : 1;
1382 unsigned SDI : 1;
1383 unsigned SDO : 1;
1384 unsigned TX1 : 1;
1385 unsigned RX1 : 1;
1386 };
1387
1388 struct
1389 {
1390 unsigned T13CKI : 1;
1391 unsigned : 1;
1392 unsigned P1A : 1;
1393 unsigned SCL : 1;
1394 unsigned SDA : 1;
1395 unsigned : 1;
1396 unsigned CK1 : 1;
1397 unsigned DT1 : 1;
1398 };
1399 } __PORTCbits_t;
1400
1401 extern __at(0x0F82) volatile __PORTCbits_t PORTCbits;
1402
1403 #define _PORTC_RC0 0x01
1404 #define _PORTC_T1OSO 0x01
1405 #define _PORTC_T13CKI 0x01
1406 #define _PORTC_RC1 0x02
1407 #define _PORTC_T1OSI 0x02
1408 #define _PORTC_RC2 0x04
1409 #define _PORTC_CCP1 0x04
1410 #define _PORTC_P1A 0x04
1411 #define _PORTC_RC3 0x08
1412 #define _PORTC_SCK 0x08
1413 #define _PORTC_SCL 0x08
1414 #define _PORTC_RC4 0x10
1415 #define _PORTC_SDI 0x10
1416 #define _PORTC_SDA 0x10
1417 #define _PORTC_RC5 0x20
1418 #define _PORTC_SDO 0x20
1419 #define _PORTC_RC6 0x40
1420 #define _PORTC_TX1 0x40
1421 #define _PORTC_CK1 0x40
1422 #define _PORTC_RC7 0x80
1423 #define _PORTC_RX1 0x80
1424 #define _PORTC_DT1 0x80
1425
1426 //==============================================================================
1427
1428
1429 //==============================================================================
1430 // PORTD Bits
1431
1432 extern __at(0x0F83) __sfr PORTD;
1433
1434 typedef union
1435 {
1436 struct
1437 {
1438 unsigned RD0 : 1;
1439 unsigned RD1 : 1;
1440 unsigned RD2 : 1;
1441 unsigned RD3 : 1;
1442 unsigned RD4 : 1;
1443 unsigned RD5 : 1;
1444 unsigned RD6 : 1;
1445 unsigned RD7 : 1;
1446 };
1447
1448 struct
1449 {
1450 unsigned PSP0 : 1;
1451 unsigned PSP1 : 1;
1452 unsigned PSP2 : 1;
1453 unsigned PSP3 : 1;
1454 unsigned PSP4 : 1;
1455 unsigned PSP5 : 1;
1456 unsigned PSP6 : 1;
1457 unsigned PSP7 : 1;
1458 };
1459
1460 struct
1461 {
1462 unsigned AD0 : 1;
1463 unsigned AD1 : 1;
1464 unsigned AD2 : 1;
1465 unsigned AD3 : 1;
1466 unsigned AD4 : 1;
1467 unsigned AD5 : 1;
1468 unsigned AD6 : 1;
1469 unsigned AD7 : 1;
1470 };
1471 } __PORTDbits_t;
1472
1473 extern __at(0x0F83) volatile __PORTDbits_t PORTDbits;
1474
1475 #define _PORTD_RD0 0x01
1476 #define _PORTD_PSP0 0x01
1477 #define _PORTD_AD0 0x01
1478 #define _PORTD_RD1 0x02
1479 #define _PORTD_PSP1 0x02
1480 #define _PORTD_AD1 0x02
1481 #define _PORTD_RD2 0x04
1482 #define _PORTD_PSP2 0x04
1483 #define _PORTD_AD2 0x04
1484 #define _PORTD_RD3 0x08
1485 #define _PORTD_PSP3 0x08
1486 #define _PORTD_AD3 0x08
1487 #define _PORTD_RD4 0x10
1488 #define _PORTD_PSP4 0x10
1489 #define _PORTD_AD4 0x10
1490 #define _PORTD_RD5 0x20
1491 #define _PORTD_PSP5 0x20
1492 #define _PORTD_AD5 0x20
1493 #define _PORTD_RD6 0x40
1494 #define _PORTD_PSP6 0x40
1495 #define _PORTD_AD6 0x40
1496 #define _PORTD_RD7 0x80
1497 #define _PORTD_PSP7 0x80
1498 #define _PORTD_AD7 0x80
1499
1500 //==============================================================================
1501
1502
1503 //==============================================================================
1504 // PORTE Bits
1505
1506 extern __at(0x0F84) __sfr PORTE;
1507
1508 typedef union
1509 {
1510 struct
1511 {
1512 unsigned RE0 : 1;
1513 unsigned RE1 : 1;
1514 unsigned RE2 : 1;
1515 unsigned RE3 : 1;
1516 unsigned RE4 : 1;
1517 unsigned RE5 : 1;
1518 unsigned RE6 : 1;
1519 unsigned RE7 : 1;
1520 };
1521
1522 struct
1523 {
1524 unsigned RD : 1;
1525 unsigned WR : 1;
1526 unsigned CS : 1;
1527 unsigned AD11 : 1;
1528 unsigned AD12 : 1;
1529 unsigned AD13 : 1;
1530 unsigned AD14 : 1;
1531 unsigned AD15 : 1;
1532 };
1533
1534 struct
1535 {
1536 unsigned AD8 : 1;
1537 unsigned AD9 : 1;
1538 unsigned AD10 : 1;
1539 unsigned P3C : 1;
1540 unsigned P3B : 1;
1541 unsigned P1C : 1;
1542 unsigned P1B : 1;
1543 unsigned : 1;
1544 };
1545
1546 struct
1547 {
1548 unsigned P2D : 1;
1549 unsigned P2C : 1;
1550 unsigned P2B : 1;
1551 unsigned : 1;
1552 unsigned : 1;
1553 unsigned : 1;
1554 unsigned : 1;
1555 unsigned : 1;
1556 };
1557 } __PORTEbits_t;
1558
1559 extern __at(0x0F84) volatile __PORTEbits_t PORTEbits;
1560
1561 #define _PORTE_RE0 0x01
1562 #define _PORTE_RD 0x01
1563 #define _PORTE_AD8 0x01
1564 #define _PORTE_P2D 0x01
1565 #define _PORTE_RE1 0x02
1566 #define _PORTE_WR 0x02
1567 #define _PORTE_AD9 0x02
1568 #define _PORTE_P2C 0x02
1569 #define _PORTE_RE2 0x04
1570 #define _PORTE_CS 0x04
1571 #define _PORTE_AD10 0x04
1572 #define _PORTE_P2B 0x04
1573 #define _PORTE_RE3 0x08
1574 #define _PORTE_AD11 0x08
1575 #define _PORTE_P3C 0x08
1576 #define _PORTE_RE4 0x10
1577 #define _PORTE_AD12 0x10
1578 #define _PORTE_P3B 0x10
1579 #define _PORTE_RE5 0x20
1580 #define _PORTE_AD13 0x20
1581 #define _PORTE_P1C 0x20
1582 #define _PORTE_RE6 0x40
1583 #define _PORTE_AD14 0x40
1584 #define _PORTE_P1B 0x40
1585 #define _PORTE_RE7 0x80
1586 #define _PORTE_AD15 0x80
1587
1588 //==============================================================================
1589
1590
1591 //==============================================================================
1592 // PORTF Bits
1593
1594 extern __at(0x0F85) __sfr PORTF;
1595
1596 typedef union
1597 {
1598 struct
1599 {
1600 unsigned RF0 : 1;
1601 unsigned RF1 : 1;
1602 unsigned RF2 : 1;
1603 unsigned RF3 : 1;
1604 unsigned RF4 : 1;
1605 unsigned RF5 : 1;
1606 unsigned RF6 : 1;
1607 unsigned RF7 : 1;
1608 };
1609
1610 struct
1611 {
1612 unsigned AN5 : 1;
1613 unsigned AN6 : 1;
1614 unsigned AN7 : 1;
1615 unsigned AN8 : 1;
1616 unsigned AN9 : 1;
1617 unsigned AN10 : 1;
1618 unsigned AN11 : 1;
1619 unsigned SS : 1;
1620 };
1621
1622 struct
1623 {
1624 unsigned : 1;
1625 unsigned C2OUTF : 1;
1626 unsigned C1OUTF : 1;
1627 unsigned : 1;
1628 unsigned : 1;
1629 unsigned CVREFF : 1;
1630 unsigned : 1;
1631 unsigned : 1;
1632 };
1633 } __PORTFbits_t;
1634
1635 extern __at(0x0F85) volatile __PORTFbits_t PORTFbits;
1636
1637 #define _PORTF_RF0 0x01
1638 #define _PORTF_AN5 0x01
1639 #define _PORTF_RF1 0x02
1640 #define _PORTF_AN6 0x02
1641 #define _PORTF_C2OUTF 0x02
1642 #define _PORTF_RF2 0x04
1643 #define _PORTF_AN7 0x04
1644 #define _PORTF_C1OUTF 0x04
1645 #define _PORTF_RF3 0x08
1646 #define _PORTF_AN8 0x08
1647 #define _PORTF_RF4 0x10
1648 #define _PORTF_AN9 0x10
1649 #define _PORTF_RF5 0x20
1650 #define _PORTF_AN10 0x20
1651 #define _PORTF_CVREFF 0x20
1652 #define _PORTF_RF6 0x40
1653 #define _PORTF_AN11 0x40
1654 #define _PORTF_RF7 0x80
1655 #define _PORTF_SS 0x80
1656
1657 //==============================================================================
1658
1659
1660 //==============================================================================
1661 // PORTG Bits
1662
1663 extern __at(0x0F86) __sfr PORTG;
1664
1665 typedef union
1666 {
1667 struct
1668 {
1669 unsigned RG0 : 1;
1670 unsigned RG1 : 1;
1671 unsigned RG2 : 1;
1672 unsigned RG3 : 1;
1673 unsigned RG4 : 1;
1674 unsigned RG5 : 1;
1675 unsigned : 1;
1676 unsigned : 1;
1677 };
1678
1679 struct
1680 {
1681 unsigned CCP3 : 1;
1682 unsigned TX2 : 1;
1683 unsigned RX2 : 1;
1684 unsigned CCP4 : 1;
1685 unsigned CCP5 : 1;
1686 unsigned MCLR : 1;
1687 unsigned : 1;
1688 unsigned : 1;
1689 };
1690
1691 struct
1692 {
1693 unsigned P3A : 1;
1694 unsigned CK2 : 1;
1695 unsigned DT2 : 1;
1696 unsigned P3D : 1;
1697 unsigned P1D : 1;
1698 unsigned VPP : 1;
1699 unsigned : 1;
1700 unsigned : 1;
1701 };
1702
1703 struct
1704 {
1705 unsigned RG : 6;
1706 unsigned : 2;
1707 };
1708 } __PORTGbits_t;
1709
1710 extern __at(0x0F86) volatile __PORTGbits_t PORTGbits;
1711
1712 #define _PORTG_RG0 0x01
1713 #define _PORTG_CCP3 0x01
1714 #define _PORTG_P3A 0x01
1715 #define _PORTG_RG1 0x02
1716 #define _PORTG_TX2 0x02
1717 #define _PORTG_CK2 0x02
1718 #define _PORTG_RG2 0x04
1719 #define _PORTG_RX2 0x04
1720 #define _PORTG_DT2 0x04
1721 #define _PORTG_RG3 0x08
1722 #define _PORTG_CCP4 0x08
1723 #define _PORTG_P3D 0x08
1724 #define _PORTG_RG4 0x10
1725 #define _PORTG_CCP5 0x10
1726 #define _PORTG_P1D 0x10
1727 #define _PORTG_RG5 0x20
1728 #define _PORTG_MCLR 0x20
1729 #define _PORTG_VPP 0x20
1730
1731 //==============================================================================
1732
1733
1734 //==============================================================================
1735 // PORTH Bits
1736
1737 extern __at(0x0F87) __sfr PORTH;
1738
1739 typedef union
1740 {
1741 struct
1742 {
1743 unsigned RH0 : 1;
1744 unsigned RH1 : 1;
1745 unsigned RH2 : 1;
1746 unsigned RH3 : 1;
1747 unsigned RH4 : 1;
1748 unsigned RH5 : 1;
1749 unsigned RH6 : 1;
1750 unsigned RH7 : 1;
1751 };
1752
1753 struct
1754 {
1755 unsigned AD16 : 1;
1756 unsigned AD17 : 1;
1757 unsigned AD18 : 1;
1758 unsigned AD19 : 1;
1759 unsigned AN12 : 1;
1760 unsigned AN13 : 1;
1761 unsigned AN14 : 1;
1762 unsigned AN15 : 1;
1763 };
1764 } __PORTHbits_t;
1765
1766 extern __at(0x0F87) volatile __PORTHbits_t PORTHbits;
1767
1768 #define _PORTH_RH0 0x01
1769 #define _PORTH_AD16 0x01
1770 #define _PORTH_RH1 0x02
1771 #define _PORTH_AD17 0x02
1772 #define _PORTH_RH2 0x04
1773 #define _PORTH_AD18 0x04
1774 #define _PORTH_RH3 0x08
1775 #define _PORTH_AD19 0x08
1776 #define _PORTH_RH4 0x10
1777 #define _PORTH_AN12 0x10
1778 #define _PORTH_RH5 0x20
1779 #define _PORTH_AN13 0x20
1780 #define _PORTH_RH6 0x40
1781 #define _PORTH_AN14 0x40
1782 #define _PORTH_RH7 0x80
1783 #define _PORTH_AN15 0x80
1784
1785 //==============================================================================
1786
1787
1788 //==============================================================================
1789 // PORTJ Bits
1790
1791 extern __at(0x0F88) __sfr PORTJ;
1792
1793 typedef union
1794 {
1795 struct
1796 {
1797 unsigned RJ0 : 1;
1798 unsigned RJ1 : 1;
1799 unsigned RJ2 : 1;
1800 unsigned RJ3 : 1;
1801 unsigned RJ4 : 1;
1802 unsigned RJ5 : 1;
1803 unsigned RJ6 : 1;
1804 unsigned RJ7 : 1;
1805 };
1806
1807 struct
1808 {
1809 unsigned ALE : 1;
1810 unsigned OE : 1;
1811 unsigned WRL : 1;
1812 unsigned WRH : 1;
1813 unsigned BA0 : 1;
1814 unsigned CE : 1;
1815 unsigned LB : 1;
1816 unsigned UB : 1;
1817 };
1818 } __PORTJbits_t;
1819
1820 extern __at(0x0F88) volatile __PORTJbits_t PORTJbits;
1821
1822 #define _PORTJ_RJ0 0x01
1823 #define _PORTJ_ALE 0x01
1824 #define _PORTJ_RJ1 0x02
1825 #define _PORTJ_OE 0x02
1826 #define _PORTJ_RJ2 0x04
1827 #define _PORTJ_WRL 0x04
1828 #define _PORTJ_RJ3 0x08
1829 #define _PORTJ_WRH 0x08
1830 #define _PORTJ_RJ4 0x10
1831 #define _PORTJ_BA0 0x10
1832 #define _PORTJ_RJ5 0x20
1833 #define _PORTJ_CE 0x20
1834 #define _PORTJ_RJ6 0x40
1835 #define _PORTJ_LB 0x40
1836 #define _PORTJ_RJ7 0x80
1837 #define _PORTJ_UB 0x80
1838
1839 //==============================================================================
1840
1841
1842 //==============================================================================
1843 // LATA Bits
1844
1845 extern __at(0x0F89) __sfr LATA;
1846
1847 typedef union
1848 {
1849 struct
1850 {
1851 unsigned LATA0 : 1;
1852 unsigned LATA1 : 1;
1853 unsigned LATA2 : 1;
1854 unsigned LATA3 : 1;
1855 unsigned LATA4 : 1;
1856 unsigned LATA5 : 1;
1857 unsigned LATA6 : 1;
1858 unsigned : 1;
1859 };
1860
1861 struct
1862 {
1863 unsigned LATA : 7;
1864 unsigned : 1;
1865 };
1866 } __LATAbits_t;
1867
1868 extern __at(0x0F89) volatile __LATAbits_t LATAbits;
1869
1870 #define _LATA0 0x01
1871 #define _LATA1 0x02
1872 #define _LATA2 0x04
1873 #define _LATA3 0x08
1874 #define _LATA4 0x10
1875 #define _LATA5 0x20
1876 #define _LATA6 0x40
1877
1878 //==============================================================================
1879
1880
1881 //==============================================================================
1882 // LATB Bits
1883
1884 extern __at(0x0F8A) __sfr LATB;
1885
1886 typedef struct
1887 {
1888 unsigned LATB0 : 1;
1889 unsigned LATB1 : 1;
1890 unsigned LATB2 : 1;
1891 unsigned LATB3 : 1;
1892 unsigned LATB4 : 1;
1893 unsigned LATB5 : 1;
1894 unsigned LATB6 : 1;
1895 unsigned LATB7 : 1;
1896 } __LATBbits_t;
1897
1898 extern __at(0x0F8A) volatile __LATBbits_t LATBbits;
1899
1900 #define _LATB0 0x01
1901 #define _LATB1 0x02
1902 #define _LATB2 0x04
1903 #define _LATB3 0x08
1904 #define _LATB4 0x10
1905 #define _LATB5 0x20
1906 #define _LATB6 0x40
1907 #define _LATB7 0x80
1908
1909 //==============================================================================
1910
1911
1912 //==============================================================================
1913 // LATC Bits
1914
1915 extern __at(0x0F8B) __sfr LATC;
1916
1917 typedef struct
1918 {
1919 unsigned LATC0 : 1;
1920 unsigned LATC1 : 1;
1921 unsigned LATC2 : 1;
1922 unsigned LATC3 : 1;
1923 unsigned LATC4 : 1;
1924 unsigned LATC5 : 1;
1925 unsigned LATC6 : 1;
1926 unsigned LATC7 : 1;
1927 } __LATCbits_t;
1928
1929 extern __at(0x0F8B) volatile __LATCbits_t LATCbits;
1930
1931 #define _LATC0 0x01
1932 #define _LATC1 0x02
1933 #define _LATC2 0x04
1934 #define _LATC3 0x08
1935 #define _LATC4 0x10
1936 #define _LATC5 0x20
1937 #define _LATC6 0x40
1938 #define _LATC7 0x80
1939
1940 //==============================================================================
1941
1942
1943 //==============================================================================
1944 // LATD Bits
1945
1946 extern __at(0x0F8C) __sfr LATD;
1947
1948 typedef struct
1949 {
1950 unsigned LATD0 : 1;
1951 unsigned LATD1 : 1;
1952 unsigned LATD2 : 1;
1953 unsigned LATD3 : 1;
1954 unsigned LATD4 : 1;
1955 unsigned LATD5 : 1;
1956 unsigned LATD6 : 1;
1957 unsigned LATD7 : 1;
1958 } __LATDbits_t;
1959
1960 extern __at(0x0F8C) volatile __LATDbits_t LATDbits;
1961
1962 #define _LATD0 0x01
1963 #define _LATD1 0x02
1964 #define _LATD2 0x04
1965 #define _LATD3 0x08
1966 #define _LATD4 0x10
1967 #define _LATD5 0x20
1968 #define _LATD6 0x40
1969 #define _LATD7 0x80
1970
1971 //==============================================================================
1972
1973
1974 //==============================================================================
1975 // LATE Bits
1976
1977 extern __at(0x0F8D) __sfr LATE;
1978
1979 typedef struct
1980 {
1981 unsigned LATE0 : 1;
1982 unsigned LATE1 : 1;
1983 unsigned LATE2 : 1;
1984 unsigned LATE3 : 1;
1985 unsigned LATE4 : 1;
1986 unsigned LATE5 : 1;
1987 unsigned LATE6 : 1;
1988 unsigned LATE7 : 1;
1989 } __LATEbits_t;
1990
1991 extern __at(0x0F8D) volatile __LATEbits_t LATEbits;
1992
1993 #define _LATE0 0x01
1994 #define _LATE1 0x02
1995 #define _LATE2 0x04
1996 #define _LATE3 0x08
1997 #define _LATE4 0x10
1998 #define _LATE5 0x20
1999 #define _LATE6 0x40
2000 #define _LATE7 0x80
2001
2002 //==============================================================================
2003
2004
2005 //==============================================================================
2006 // LATF Bits
2007
2008 extern __at(0x0F8E) __sfr LATF;
2009
2010 typedef struct
2011 {
2012 unsigned LATF0 : 1;
2013 unsigned LATF1 : 1;
2014 unsigned LATF2 : 1;
2015 unsigned LATF3 : 1;
2016 unsigned LATF4 : 1;
2017 unsigned LATF5 : 1;
2018 unsigned LATF6 : 1;
2019 unsigned LATF7 : 1;
2020 } __LATFbits_t;
2021
2022 extern __at(0x0F8E) volatile __LATFbits_t LATFbits;
2023
2024 #define _LATF0 0x01
2025 #define _LATF1 0x02
2026 #define _LATF2 0x04
2027 #define _LATF3 0x08
2028 #define _LATF4 0x10
2029 #define _LATF5 0x20
2030 #define _LATF6 0x40
2031 #define _LATF7 0x80
2032
2033 //==============================================================================
2034
2035
2036 //==============================================================================
2037 // LATG Bits
2038
2039 extern __at(0x0F8F) __sfr LATG;
2040
2041 typedef union
2042 {
2043 struct
2044 {
2045 unsigned LATG0 : 1;
2046 unsigned LATG1 : 1;
2047 unsigned LATG2 : 1;
2048 unsigned LATG3 : 1;
2049 unsigned LATG4 : 1;
2050 unsigned : 1;
2051 unsigned : 1;
2052 unsigned : 1;
2053 };
2054
2055 struct
2056 {
2057 unsigned LATG : 5;
2058 unsigned : 3;
2059 };
2060 } __LATGbits_t;
2061
2062 extern __at(0x0F8F) volatile __LATGbits_t LATGbits;
2063
2064 #define _LATG0 0x01
2065 #define _LATG1 0x02
2066 #define _LATG2 0x04
2067 #define _LATG3 0x08
2068 #define _LATG4 0x10
2069
2070 //==============================================================================
2071
2072
2073 //==============================================================================
2074 // LATH Bits
2075
2076 extern __at(0x0F90) __sfr LATH;
2077
2078 typedef struct
2079 {
2080 unsigned LATH0 : 1;
2081 unsigned LATH1 : 1;
2082 unsigned LATH2 : 1;
2083 unsigned LATH3 : 1;
2084 unsigned LATH4 : 1;
2085 unsigned LATH5 : 1;
2086 unsigned LATH6 : 1;
2087 unsigned LATH7 : 1;
2088 } __LATHbits_t;
2089
2090 extern __at(0x0F90) volatile __LATHbits_t LATHbits;
2091
2092 #define _LATH0 0x01
2093 #define _LATH1 0x02
2094 #define _LATH2 0x04
2095 #define _LATH3 0x08
2096 #define _LATH4 0x10
2097 #define _LATH5 0x20
2098 #define _LATH6 0x40
2099 #define _LATH7 0x80
2100
2101 //==============================================================================
2102
2103
2104 //==============================================================================
2105 // LATJ Bits
2106
2107 extern __at(0x0F91) __sfr LATJ;
2108
2109 typedef struct
2110 {
2111 unsigned LATJ0 : 1;
2112 unsigned LATJ1 : 1;
2113 unsigned LATJ2 : 1;
2114 unsigned LATJ3 : 1;
2115 unsigned LATJ4 : 1;
2116 unsigned LATJ5 : 1;
2117 unsigned LATJ6 : 1;
2118 unsigned LATJ7 : 1;
2119 } __LATJbits_t;
2120
2121 extern __at(0x0F91) volatile __LATJbits_t LATJbits;
2122
2123 #define _LATJ0 0x01
2124 #define _LATJ1 0x02
2125 #define _LATJ2 0x04
2126 #define _LATJ3 0x08
2127 #define _LATJ4 0x10
2128 #define _LATJ5 0x20
2129 #define _LATJ6 0x40
2130 #define _LATJ7 0x80
2131
2132 //==============================================================================
2133
2134
2135 //==============================================================================
2136 // DDRA Bits
2137
2138 extern __at(0x0F92) __sfr DDRA;
2139
2140 typedef union
2141 {
2142 struct
2143 {
2144 unsigned TRISA0 : 1;
2145 unsigned TRISA1 : 1;
2146 unsigned TRISA2 : 1;
2147 unsigned TRISA3 : 1;
2148 unsigned TRISA4 : 1;
2149 unsigned TRISA5 : 1;
2150 unsigned TRISA6 : 1;
2151 unsigned : 1;
2152 };
2153
2154 struct
2155 {
2156 unsigned RA0 : 1;
2157 unsigned RA1 : 1;
2158 unsigned RA2 : 1;
2159 unsigned RA3 : 1;
2160 unsigned RA4 : 1;
2161 unsigned RA5 : 1;
2162 unsigned RA6 : 1;
2163 unsigned : 1;
2164 };
2165
2166 struct
2167 {
2168 unsigned TRISA : 7;
2169 unsigned : 1;
2170 };
2171
2172 struct
2173 {
2174 unsigned RA : 7;
2175 unsigned : 1;
2176 };
2177 } __DDRAbits_t;
2178
2179 extern __at(0x0F92) volatile __DDRAbits_t DDRAbits;
2180
2181 #define _TRISA0 0x01
2182 #define _RA0 0x01
2183 #define _TRISA1 0x02
2184 #define _RA1 0x02
2185 #define _TRISA2 0x04
2186 #define _RA2 0x04
2187 #define _TRISA3 0x08
2188 #define _RA3 0x08
2189 #define _TRISA4 0x10
2190 #define _RA4 0x10
2191 #define _TRISA5 0x20
2192 #define _RA5 0x20
2193 #define _TRISA6 0x40
2194 #define _RA6 0x40
2195
2196 //==============================================================================
2197
2198
2199 //==============================================================================
2200 // TRISA Bits
2201
2202 extern __at(0x0F92) __sfr TRISA;
2203
2204 typedef union
2205 {
2206 struct
2207 {
2208 unsigned TRISA0 : 1;
2209 unsigned TRISA1 : 1;
2210 unsigned TRISA2 : 1;
2211 unsigned TRISA3 : 1;
2212 unsigned TRISA4 : 1;
2213 unsigned TRISA5 : 1;
2214 unsigned TRISA6 : 1;
2215 unsigned : 1;
2216 };
2217
2218 struct
2219 {
2220 unsigned RA0 : 1;
2221 unsigned RA1 : 1;
2222 unsigned RA2 : 1;
2223 unsigned RA3 : 1;
2224 unsigned RA4 : 1;
2225 unsigned RA5 : 1;
2226 unsigned RA6 : 1;
2227 unsigned : 1;
2228 };
2229
2230 struct
2231 {
2232 unsigned RA : 7;
2233 unsigned : 1;
2234 };
2235
2236 struct
2237 {
2238 unsigned TRISA : 7;
2239 unsigned : 1;
2240 };
2241 } __TRISAbits_t;
2242
2243 extern __at(0x0F92) volatile __TRISAbits_t TRISAbits;
2244
2245 #define _TRISA_TRISA0 0x01
2246 #define _TRISA_RA0 0x01
2247 #define _TRISA_TRISA1 0x02
2248 #define _TRISA_RA1 0x02
2249 #define _TRISA_TRISA2 0x04
2250 #define _TRISA_RA2 0x04
2251 #define _TRISA_TRISA3 0x08
2252 #define _TRISA_RA3 0x08
2253 #define _TRISA_TRISA4 0x10
2254 #define _TRISA_RA4 0x10
2255 #define _TRISA_TRISA5 0x20
2256 #define _TRISA_RA5 0x20
2257 #define _TRISA_TRISA6 0x40
2258 #define _TRISA_RA6 0x40
2259
2260 //==============================================================================
2261
2262
2263 //==============================================================================
2264 // DDRB Bits
2265
2266 extern __at(0x0F93) __sfr DDRB;
2267
2268 typedef union
2269 {
2270 struct
2271 {
2272 unsigned TRISB0 : 1;
2273 unsigned TRISB1 : 1;
2274 unsigned TRISB2 : 1;
2275 unsigned TRISB3 : 1;
2276 unsigned TRISB4 : 1;
2277 unsigned TRISB5 : 1;
2278 unsigned TRISB6 : 1;
2279 unsigned TRISB7 : 1;
2280 };
2281
2282 struct
2283 {
2284 unsigned RB0 : 1;
2285 unsigned RB1 : 1;
2286 unsigned RB2 : 1;
2287 unsigned RB3 : 1;
2288 unsigned RB4 : 1;
2289 unsigned RB5 : 1;
2290 unsigned RB6 : 1;
2291 unsigned RB7 : 1;
2292 };
2293 } __DDRBbits_t;
2294
2295 extern __at(0x0F93) volatile __DDRBbits_t DDRBbits;
2296
2297 #define _TRISB0 0x01
2298 #define _RB0 0x01
2299 #define _TRISB1 0x02
2300 #define _RB1 0x02
2301 #define _TRISB2 0x04
2302 #define _RB2 0x04
2303 #define _TRISB3 0x08
2304 #define _RB3 0x08
2305 #define _TRISB4 0x10
2306 #define _RB4 0x10
2307 #define _TRISB5 0x20
2308 #define _RB5 0x20
2309 #define _TRISB6 0x40
2310 #define _RB6 0x40
2311 #define _TRISB7 0x80
2312 #define _RB7 0x80
2313
2314 //==============================================================================
2315
2316
2317 //==============================================================================
2318 // TRISB Bits
2319
2320 extern __at(0x0F93) __sfr TRISB;
2321
2322 typedef union
2323 {
2324 struct
2325 {
2326 unsigned TRISB0 : 1;
2327 unsigned TRISB1 : 1;
2328 unsigned TRISB2 : 1;
2329 unsigned TRISB3 : 1;
2330 unsigned TRISB4 : 1;
2331 unsigned TRISB5 : 1;
2332 unsigned TRISB6 : 1;
2333 unsigned TRISB7 : 1;
2334 };
2335
2336 struct
2337 {
2338 unsigned RB0 : 1;
2339 unsigned RB1 : 1;
2340 unsigned RB2 : 1;
2341 unsigned RB3 : 1;
2342 unsigned RB4 : 1;
2343 unsigned RB5 : 1;
2344 unsigned RB6 : 1;
2345 unsigned RB7 : 1;
2346 };
2347 } __TRISBbits_t;
2348
2349 extern __at(0x0F93) volatile __TRISBbits_t TRISBbits;
2350
2351 #define _TRISB_TRISB0 0x01
2352 #define _TRISB_RB0 0x01
2353 #define _TRISB_TRISB1 0x02
2354 #define _TRISB_RB1 0x02
2355 #define _TRISB_TRISB2 0x04
2356 #define _TRISB_RB2 0x04
2357 #define _TRISB_TRISB3 0x08
2358 #define _TRISB_RB3 0x08
2359 #define _TRISB_TRISB4 0x10
2360 #define _TRISB_RB4 0x10
2361 #define _TRISB_TRISB5 0x20
2362 #define _TRISB_RB5 0x20
2363 #define _TRISB_TRISB6 0x40
2364 #define _TRISB_RB6 0x40
2365 #define _TRISB_TRISB7 0x80
2366 #define _TRISB_RB7 0x80
2367
2368 //==============================================================================
2369
2370
2371 //==============================================================================
2372 // DDRC Bits
2373
2374 extern __at(0x0F94) __sfr DDRC;
2375
2376 typedef union
2377 {
2378 struct
2379 {
2380 unsigned TRISC0 : 1;
2381 unsigned TRISC1 : 1;
2382 unsigned TRISC2 : 1;
2383 unsigned TRISC3 : 1;
2384 unsigned TRISC4 : 1;
2385 unsigned TRISC5 : 1;
2386 unsigned TRISC6 : 1;
2387 unsigned TRISC7 : 1;
2388 };
2389
2390 struct
2391 {
2392 unsigned RC0 : 1;
2393 unsigned RC1 : 1;
2394 unsigned RC2 : 1;
2395 unsigned RC3 : 1;
2396 unsigned RC4 : 1;
2397 unsigned RC5 : 1;
2398 unsigned RC6 : 1;
2399 unsigned RC7 : 1;
2400 };
2401 } __DDRCbits_t;
2402
2403 extern __at(0x0F94) volatile __DDRCbits_t DDRCbits;
2404
2405 #define _TRISC0 0x01
2406 #define _RC0 0x01
2407 #define _TRISC1 0x02
2408 #define _RC1 0x02
2409 #define _TRISC2 0x04
2410 #define _RC2 0x04
2411 #define _TRISC3 0x08
2412 #define _RC3 0x08
2413 #define _TRISC4 0x10
2414 #define _RC4 0x10
2415 #define _TRISC5 0x20
2416 #define _RC5 0x20
2417 #define _TRISC6 0x40
2418 #define _RC6 0x40
2419 #define _TRISC7 0x80
2420 #define _RC7 0x80
2421
2422 //==============================================================================
2423
2424
2425 //==============================================================================
2426 // TRISC Bits
2427
2428 extern __at(0x0F94) __sfr TRISC;
2429
2430 typedef union
2431 {
2432 struct
2433 {
2434 unsigned TRISC0 : 1;
2435 unsigned TRISC1 : 1;
2436 unsigned TRISC2 : 1;
2437 unsigned TRISC3 : 1;
2438 unsigned TRISC4 : 1;
2439 unsigned TRISC5 : 1;
2440 unsigned TRISC6 : 1;
2441 unsigned TRISC7 : 1;
2442 };
2443
2444 struct
2445 {
2446 unsigned RC0 : 1;
2447 unsigned RC1 : 1;
2448 unsigned RC2 : 1;
2449 unsigned RC3 : 1;
2450 unsigned RC4 : 1;
2451 unsigned RC5 : 1;
2452 unsigned RC6 : 1;
2453 unsigned RC7 : 1;
2454 };
2455 } __TRISCbits_t;
2456
2457 extern __at(0x0F94) volatile __TRISCbits_t TRISCbits;
2458
2459 #define _TRISC_TRISC0 0x01
2460 #define _TRISC_RC0 0x01
2461 #define _TRISC_TRISC1 0x02
2462 #define _TRISC_RC1 0x02
2463 #define _TRISC_TRISC2 0x04
2464 #define _TRISC_RC2 0x04
2465 #define _TRISC_TRISC3 0x08
2466 #define _TRISC_RC3 0x08
2467 #define _TRISC_TRISC4 0x10
2468 #define _TRISC_RC4 0x10
2469 #define _TRISC_TRISC5 0x20
2470 #define _TRISC_RC5 0x20
2471 #define _TRISC_TRISC6 0x40
2472 #define _TRISC_RC6 0x40
2473 #define _TRISC_TRISC7 0x80
2474 #define _TRISC_RC7 0x80
2475
2476 //==============================================================================
2477
2478
2479 //==============================================================================
2480 // DDRD Bits
2481
2482 extern __at(0x0F95) __sfr DDRD;
2483
2484 typedef union
2485 {
2486 struct
2487 {
2488 unsigned TRISD0 : 1;
2489 unsigned TRISD1 : 1;
2490 unsigned TRISD2 : 1;
2491 unsigned TRISD3 : 1;
2492 unsigned TRISD4 : 1;
2493 unsigned TRISD5 : 1;
2494 unsigned TRISD6 : 1;
2495 unsigned TRISD7 : 1;
2496 };
2497
2498 struct
2499 {
2500 unsigned RD0 : 1;
2501 unsigned RD1 : 1;
2502 unsigned RD2 : 1;
2503 unsigned RD3 : 1;
2504 unsigned RD4 : 1;
2505 unsigned RD5 : 1;
2506 unsigned RD6 : 1;
2507 unsigned RD7 : 1;
2508 };
2509 } __DDRDbits_t;
2510
2511 extern __at(0x0F95) volatile __DDRDbits_t DDRDbits;
2512
2513 #define _TRISD0 0x01
2514 #define _RD0 0x01
2515 #define _TRISD1 0x02
2516 #define _RD1 0x02
2517 #define _TRISD2 0x04
2518 #define _RD2 0x04
2519 #define _TRISD3 0x08
2520 #define _RD3 0x08
2521 #define _TRISD4 0x10
2522 #define _RD4 0x10
2523 #define _TRISD5 0x20
2524 #define _RD5 0x20
2525 #define _TRISD6 0x40
2526 #define _RD6 0x40
2527 #define _TRISD7 0x80
2528 #define _RD7 0x80
2529
2530 //==============================================================================
2531
2532
2533 //==============================================================================
2534 // TRISD Bits
2535
2536 extern __at(0x0F95) __sfr TRISD;
2537
2538 typedef union
2539 {
2540 struct
2541 {
2542 unsigned TRISD0 : 1;
2543 unsigned TRISD1 : 1;
2544 unsigned TRISD2 : 1;
2545 unsigned TRISD3 : 1;
2546 unsigned TRISD4 : 1;
2547 unsigned TRISD5 : 1;
2548 unsigned TRISD6 : 1;
2549 unsigned TRISD7 : 1;
2550 };
2551
2552 struct
2553 {
2554 unsigned RD0 : 1;
2555 unsigned RD1 : 1;
2556 unsigned RD2 : 1;
2557 unsigned RD3 : 1;
2558 unsigned RD4 : 1;
2559 unsigned RD5 : 1;
2560 unsigned RD6 : 1;
2561 unsigned RD7 : 1;
2562 };
2563 } __TRISDbits_t;
2564
2565 extern __at(0x0F95) volatile __TRISDbits_t TRISDbits;
2566
2567 #define _TRISD_TRISD0 0x01
2568 #define _TRISD_RD0 0x01
2569 #define _TRISD_TRISD1 0x02
2570 #define _TRISD_RD1 0x02
2571 #define _TRISD_TRISD2 0x04
2572 #define _TRISD_RD2 0x04
2573 #define _TRISD_TRISD3 0x08
2574 #define _TRISD_RD3 0x08
2575 #define _TRISD_TRISD4 0x10
2576 #define _TRISD_RD4 0x10
2577 #define _TRISD_TRISD5 0x20
2578 #define _TRISD_RD5 0x20
2579 #define _TRISD_TRISD6 0x40
2580 #define _TRISD_RD6 0x40
2581 #define _TRISD_TRISD7 0x80
2582 #define _TRISD_RD7 0x80
2583
2584 //==============================================================================
2585
2586
2587 //==============================================================================
2588 // DDRE Bits
2589
2590 extern __at(0x0F96) __sfr DDRE;
2591
2592 typedef union
2593 {
2594 struct
2595 {
2596 unsigned TRISE0 : 1;
2597 unsigned TRISE1 : 1;
2598 unsigned TRISE2 : 1;
2599 unsigned TRISE3 : 1;
2600 unsigned TRISE4 : 1;
2601 unsigned TRISE5 : 1;
2602 unsigned TRISE6 : 1;
2603 unsigned TRISE7 : 1;
2604 };
2605
2606 struct
2607 {
2608 unsigned RE0 : 1;
2609 unsigned RE1 : 1;
2610 unsigned RE2 : 1;
2611 unsigned RE3 : 1;
2612 unsigned RE4 : 1;
2613 unsigned RE5 : 1;
2614 unsigned RE6 : 1;
2615 unsigned RE7 : 1;
2616 };
2617 } __DDREbits_t;
2618
2619 extern __at(0x0F96) volatile __DDREbits_t DDREbits;
2620
2621 #define _TRISE0 0x01
2622 #define _RE0 0x01
2623 #define _TRISE1 0x02
2624 #define _RE1 0x02
2625 #define _TRISE2 0x04
2626 #define _RE2 0x04
2627 #define _TRISE3 0x08
2628 #define _RE3 0x08
2629 #define _TRISE4 0x10
2630 #define _RE4 0x10
2631 #define _TRISE5 0x20
2632 #define _RE5 0x20
2633 #define _TRISE6 0x40
2634 #define _RE6 0x40
2635 #define _TRISE7 0x80
2636 #define _RE7 0x80
2637
2638 //==============================================================================
2639
2640
2641 //==============================================================================
2642 // TRISE Bits
2643
2644 extern __at(0x0F96) __sfr TRISE;
2645
2646 typedef union
2647 {
2648 struct
2649 {
2650 unsigned TRISE0 : 1;
2651 unsigned TRISE1 : 1;
2652 unsigned TRISE2 : 1;
2653 unsigned TRISE3 : 1;
2654 unsigned TRISE4 : 1;
2655 unsigned TRISE5 : 1;
2656 unsigned TRISE6 : 1;
2657 unsigned TRISE7 : 1;
2658 };
2659
2660 struct
2661 {
2662 unsigned RE0 : 1;
2663 unsigned RE1 : 1;
2664 unsigned RE2 : 1;
2665 unsigned RE3 : 1;
2666 unsigned RE4 : 1;
2667 unsigned RE5 : 1;
2668 unsigned RE6 : 1;
2669 unsigned RE7 : 1;
2670 };
2671 } __TRISEbits_t;
2672
2673 extern __at(0x0F96) volatile __TRISEbits_t TRISEbits;
2674
2675 #define _TRISE_TRISE0 0x01
2676 #define _TRISE_RE0 0x01
2677 #define _TRISE_TRISE1 0x02
2678 #define _TRISE_RE1 0x02
2679 #define _TRISE_TRISE2 0x04
2680 #define _TRISE_RE2 0x04
2681 #define _TRISE_TRISE3 0x08
2682 #define _TRISE_RE3 0x08
2683 #define _TRISE_TRISE4 0x10
2684 #define _TRISE_RE4 0x10
2685 #define _TRISE_TRISE5 0x20
2686 #define _TRISE_RE5 0x20
2687 #define _TRISE_TRISE6 0x40
2688 #define _TRISE_RE6 0x40
2689 #define _TRISE_TRISE7 0x80
2690 #define _TRISE_RE7 0x80
2691
2692 //==============================================================================
2693
2694
2695 //==============================================================================
2696 // DDRF Bits
2697
2698 extern __at(0x0F97) __sfr DDRF;
2699
2700 typedef union
2701 {
2702 struct
2703 {
2704 unsigned TRISF0 : 1;
2705 unsigned TRISF1 : 1;
2706 unsigned TRISF2 : 1;
2707 unsigned TRISF3 : 1;
2708 unsigned TRISF4 : 1;
2709 unsigned TRISF5 : 1;
2710 unsigned TRISF6 : 1;
2711 unsigned TRISF7 : 1;
2712 };
2713
2714 struct
2715 {
2716 unsigned RF0 : 1;
2717 unsigned RF1 : 1;
2718 unsigned RF2 : 1;
2719 unsigned RF3 : 1;
2720 unsigned RF4 : 1;
2721 unsigned RF5 : 1;
2722 unsigned RF6 : 1;
2723 unsigned RF7 : 1;
2724 };
2725 } __DDRFbits_t;
2726
2727 extern __at(0x0F97) volatile __DDRFbits_t DDRFbits;
2728
2729 #define _TRISF0 0x01
2730 #define _RF0 0x01
2731 #define _TRISF1 0x02
2732 #define _RF1 0x02
2733 #define _TRISF2 0x04
2734 #define _RF2 0x04
2735 #define _TRISF3 0x08
2736 #define _RF3 0x08
2737 #define _TRISF4 0x10
2738 #define _RF4 0x10
2739 #define _TRISF5 0x20
2740 #define _RF5 0x20
2741 #define _TRISF6 0x40
2742 #define _RF6 0x40
2743 #define _TRISF7 0x80
2744 #define _RF7 0x80
2745
2746 //==============================================================================
2747
2748
2749 //==============================================================================
2750 // TRISF Bits
2751
2752 extern __at(0x0F97) __sfr TRISF;
2753
2754 typedef union
2755 {
2756 struct
2757 {
2758 unsigned TRISF0 : 1;
2759 unsigned TRISF1 : 1;
2760 unsigned TRISF2 : 1;
2761 unsigned TRISF3 : 1;
2762 unsigned TRISF4 : 1;
2763 unsigned TRISF5 : 1;
2764 unsigned TRISF6 : 1;
2765 unsigned TRISF7 : 1;
2766 };
2767
2768 struct
2769 {
2770 unsigned RF0 : 1;
2771 unsigned RF1 : 1;
2772 unsigned RF2 : 1;
2773 unsigned RF3 : 1;
2774 unsigned RF4 : 1;
2775 unsigned RF5 : 1;
2776 unsigned RF6 : 1;
2777 unsigned RF7 : 1;
2778 };
2779 } __TRISFbits_t;
2780
2781 extern __at(0x0F97) volatile __TRISFbits_t TRISFbits;
2782
2783 #define _TRISF_TRISF0 0x01
2784 #define _TRISF_RF0 0x01
2785 #define _TRISF_TRISF1 0x02
2786 #define _TRISF_RF1 0x02
2787 #define _TRISF_TRISF2 0x04
2788 #define _TRISF_RF2 0x04
2789 #define _TRISF_TRISF3 0x08
2790 #define _TRISF_RF3 0x08
2791 #define _TRISF_TRISF4 0x10
2792 #define _TRISF_RF4 0x10
2793 #define _TRISF_TRISF5 0x20
2794 #define _TRISF_RF5 0x20
2795 #define _TRISF_TRISF6 0x40
2796 #define _TRISF_RF6 0x40
2797 #define _TRISF_TRISF7 0x80
2798 #define _TRISF_RF7 0x80
2799
2800 //==============================================================================
2801
2802
2803 //==============================================================================
2804 // DDRG Bits
2805
2806 extern __at(0x0F98) __sfr DDRG;
2807
2808 typedef union
2809 {
2810 struct
2811 {
2812 unsigned TRISG0 : 1;
2813 unsigned TRISG1 : 1;
2814 unsigned TRISG2 : 1;
2815 unsigned TRISG3 : 1;
2816 unsigned TRISG4 : 1;
2817 unsigned : 1;
2818 unsigned : 1;
2819 unsigned : 1;
2820 };
2821
2822 struct
2823 {
2824 unsigned RG0 : 1;
2825 unsigned RG1 : 1;
2826 unsigned RG2 : 1;
2827 unsigned RG3 : 1;
2828 unsigned RG4 : 1;
2829 unsigned : 1;
2830 unsigned : 1;
2831 unsigned : 1;
2832 };
2833
2834 struct
2835 {
2836 unsigned TRISG : 5;
2837 unsigned : 3;
2838 };
2839
2840 struct
2841 {
2842 unsigned RG : 5;
2843 unsigned : 3;
2844 };
2845 } __DDRGbits_t;
2846
2847 extern __at(0x0F98) volatile __DDRGbits_t DDRGbits;
2848
2849 #define _TRISG0 0x01
2850 #define _RG0 0x01
2851 #define _TRISG1 0x02
2852 #define _RG1 0x02
2853 #define _TRISG2 0x04
2854 #define _RG2 0x04
2855 #define _TRISG3 0x08
2856 #define _RG3 0x08
2857 #define _TRISG4 0x10
2858 #define _RG4 0x10
2859
2860 //==============================================================================
2861
2862
2863 //==============================================================================
2864 // TRISG Bits
2865
2866 extern __at(0x0F98) __sfr TRISG;
2867
2868 typedef union
2869 {
2870 struct
2871 {
2872 unsigned TRISG0 : 1;
2873 unsigned TRISG1 : 1;
2874 unsigned TRISG2 : 1;
2875 unsigned TRISG3 : 1;
2876 unsigned TRISG4 : 1;
2877 unsigned : 1;
2878 unsigned : 1;
2879 unsigned : 1;
2880 };
2881
2882 struct
2883 {
2884 unsigned RG0 : 1;
2885 unsigned RG1 : 1;
2886 unsigned RG2 : 1;
2887 unsigned RG3 : 1;
2888 unsigned RG4 : 1;
2889 unsigned : 1;
2890 unsigned : 1;
2891 unsigned : 1;
2892 };
2893
2894 struct
2895 {
2896 unsigned RG : 5;
2897 unsigned : 3;
2898 };
2899
2900 struct
2901 {
2902 unsigned TRISG : 5;
2903 unsigned : 3;
2904 };
2905 } __TRISGbits_t;
2906
2907 extern __at(0x0F98) volatile __TRISGbits_t TRISGbits;
2908
2909 #define _TRISG_TRISG0 0x01
2910 #define _TRISG_RG0 0x01
2911 #define _TRISG_TRISG1 0x02
2912 #define _TRISG_RG1 0x02
2913 #define _TRISG_TRISG2 0x04
2914 #define _TRISG_RG2 0x04
2915 #define _TRISG_TRISG3 0x08
2916 #define _TRISG_RG3 0x08
2917 #define _TRISG_TRISG4 0x10
2918 #define _TRISG_RG4 0x10
2919
2920 //==============================================================================
2921
2922
2923 //==============================================================================
2924 // DDRH Bits
2925
2926 extern __at(0x0F99) __sfr DDRH;
2927
2928 typedef union
2929 {
2930 struct
2931 {
2932 unsigned TRISH0 : 1;
2933 unsigned TRISH1 : 1;
2934 unsigned TRISH2 : 1;
2935 unsigned TRISH3 : 1;
2936 unsigned TRISH4 : 1;
2937 unsigned TRISH5 : 1;
2938 unsigned TRISH6 : 1;
2939 unsigned TRISH7 : 1;
2940 };
2941
2942 struct
2943 {
2944 unsigned RH0 : 1;
2945 unsigned RH1 : 1;
2946 unsigned RH2 : 1;
2947 unsigned RH3 : 1;
2948 unsigned RH4 : 1;
2949 unsigned RH5 : 1;
2950 unsigned RH6 : 1;
2951 unsigned RH7 : 1;
2952 };
2953 } __DDRHbits_t;
2954
2955 extern __at(0x0F99) volatile __DDRHbits_t DDRHbits;
2956
2957 #define _TRISH0 0x01
2958 #define _RH0 0x01
2959 #define _TRISH1 0x02
2960 #define _RH1 0x02
2961 #define _TRISH2 0x04
2962 #define _RH2 0x04
2963 #define _TRISH3 0x08
2964 #define _RH3 0x08
2965 #define _TRISH4 0x10
2966 #define _RH4 0x10
2967 #define _TRISH5 0x20
2968 #define _RH5 0x20
2969 #define _TRISH6 0x40
2970 #define _RH6 0x40
2971 #define _TRISH7 0x80
2972 #define _RH7 0x80
2973
2974 //==============================================================================
2975
2976
2977 //==============================================================================
2978 // TRISH Bits
2979
2980 extern __at(0x0F99) __sfr TRISH;
2981
2982 typedef union
2983 {
2984 struct
2985 {
2986 unsigned TRISH0 : 1;
2987 unsigned TRISH1 : 1;
2988 unsigned TRISH2 : 1;
2989 unsigned TRISH3 : 1;
2990 unsigned TRISH4 : 1;
2991 unsigned TRISH5 : 1;
2992 unsigned TRISH6 : 1;
2993 unsigned TRISH7 : 1;
2994 };
2995
2996 struct
2997 {
2998 unsigned RH0 : 1;
2999 unsigned RH1 : 1;
3000 unsigned RH2 : 1;
3001 unsigned RH3 : 1;
3002 unsigned RH4 : 1;
3003 unsigned RH5 : 1;
3004 unsigned RH6 : 1;
3005 unsigned RH7 : 1;
3006 };
3007 } __TRISHbits_t;
3008
3009 extern __at(0x0F99) volatile __TRISHbits_t TRISHbits;
3010
3011 #define _TRISH_TRISH0 0x01
3012 #define _TRISH_RH0 0x01
3013 #define _TRISH_TRISH1 0x02
3014 #define _TRISH_RH1 0x02
3015 #define _TRISH_TRISH2 0x04
3016 #define _TRISH_RH2 0x04
3017 #define _TRISH_TRISH3 0x08
3018 #define _TRISH_RH3 0x08
3019 #define _TRISH_TRISH4 0x10
3020 #define _TRISH_RH4 0x10
3021 #define _TRISH_TRISH5 0x20
3022 #define _TRISH_RH5 0x20
3023 #define _TRISH_TRISH6 0x40
3024 #define _TRISH_RH6 0x40
3025 #define _TRISH_TRISH7 0x80
3026 #define _TRISH_RH7 0x80
3027
3028 //==============================================================================
3029
3030
3031 //==============================================================================
3032 // DDRJ Bits
3033
3034 extern __at(0x0F9A) __sfr DDRJ;
3035
3036 typedef union
3037 {
3038 struct
3039 {
3040 unsigned TRISJ0 : 1;
3041 unsigned TRISJ1 : 1;
3042 unsigned TRISJ2 : 1;
3043 unsigned TRISJ3 : 1;
3044 unsigned TRISJ4 : 1;
3045 unsigned TRISJ5 : 1;
3046 unsigned TRISJ6 : 1;
3047 unsigned TRISJ7 : 1;
3048 };
3049
3050 struct
3051 {
3052 unsigned RJ0 : 1;
3053 unsigned RJ1 : 1;
3054 unsigned RJ2 : 1;
3055 unsigned RJ3 : 1;
3056 unsigned RJ4 : 1;
3057 unsigned RJ5 : 1;
3058 unsigned RJ6 : 1;
3059 unsigned RJ7 : 1;
3060 };
3061 } __DDRJbits_t;
3062
3063 extern __at(0x0F9A) volatile __DDRJbits_t DDRJbits;
3064
3065 #define _TRISJ0 0x01
3066 #define _RJ0 0x01
3067 #define _TRISJ1 0x02
3068 #define _RJ1 0x02
3069 #define _TRISJ2 0x04
3070 #define _RJ2 0x04
3071 #define _TRISJ3 0x08
3072 #define _RJ3 0x08
3073 #define _TRISJ4 0x10
3074 #define _RJ4 0x10
3075 #define _TRISJ5 0x20
3076 #define _RJ5 0x20
3077 #define _TRISJ6 0x40
3078 #define _RJ6 0x40
3079 #define _TRISJ7 0x80
3080 #define _RJ7 0x80
3081
3082 //==============================================================================
3083
3084
3085 //==============================================================================
3086 // TRISJ Bits
3087
3088 extern __at(0x0F9A) __sfr TRISJ;
3089
3090 typedef union
3091 {
3092 struct
3093 {
3094 unsigned TRISJ0 : 1;
3095 unsigned TRISJ1 : 1;
3096 unsigned TRISJ2 : 1;
3097 unsigned TRISJ3 : 1;
3098 unsigned TRISJ4 : 1;
3099 unsigned TRISJ5 : 1;
3100 unsigned TRISJ6 : 1;
3101 unsigned TRISJ7 : 1;
3102 };
3103
3104 struct
3105 {
3106 unsigned RJ0 : 1;
3107 unsigned RJ1 : 1;
3108 unsigned RJ2 : 1;
3109 unsigned RJ3 : 1;
3110 unsigned RJ4 : 1;
3111 unsigned RJ5 : 1;
3112 unsigned RJ6 : 1;
3113 unsigned RJ7 : 1;
3114 };
3115 } __TRISJbits_t;
3116
3117 extern __at(0x0F9A) volatile __TRISJbits_t TRISJbits;
3118
3119 #define _TRISJ_TRISJ0 0x01
3120 #define _TRISJ_RJ0 0x01
3121 #define _TRISJ_TRISJ1 0x02
3122 #define _TRISJ_RJ1 0x02
3123 #define _TRISJ_TRISJ2 0x04
3124 #define _TRISJ_RJ2 0x04
3125 #define _TRISJ_TRISJ3 0x08
3126 #define _TRISJ_RJ3 0x08
3127 #define _TRISJ_TRISJ4 0x10
3128 #define _TRISJ_RJ4 0x10
3129 #define _TRISJ_TRISJ5 0x20
3130 #define _TRISJ_RJ5 0x20
3131 #define _TRISJ_TRISJ6 0x40
3132 #define _TRISJ_RJ6 0x40
3133 #define _TRISJ_TRISJ7 0x80
3134 #define _TRISJ_RJ7 0x80
3135
3136 //==============================================================================
3137
3138
3139 //==============================================================================
3140 // MEMCON Bits
3141
3142 extern __at(0x0F9C) __sfr MEMCON;
3143
3144 typedef union
3145 {
3146 struct
3147 {
3148 unsigned WM0 : 1;
3149 unsigned WM1 : 1;
3150 unsigned : 1;
3151 unsigned : 1;
3152 unsigned WAIT0 : 1;
3153 unsigned WAIT1 : 1;
3154 unsigned : 1;
3155 unsigned EBDIS : 1;
3156 };
3157
3158 struct
3159 {
3160 unsigned WM : 2;
3161 unsigned : 6;
3162 };
3163
3164 struct
3165 {
3166 unsigned : 4;
3167 unsigned WAIT : 2;
3168 unsigned : 2;
3169 };
3170 } __MEMCONbits_t;
3171
3172 extern __at(0x0F9C) volatile __MEMCONbits_t MEMCONbits;
3173
3174 #define _WM0 0x01
3175 #define _WM1 0x02
3176 #define _WAIT0 0x10
3177 #define _WAIT1 0x20
3178 #define _EBDIS 0x80
3179
3180 //==============================================================================
3181
3182
3183 //==============================================================================
3184 // PIE1 Bits
3185
3186 extern __at(0x0F9D) __sfr PIE1;
3187
3188 typedef union
3189 {
3190 struct
3191 {
3192 unsigned TMR1IE : 1;
3193 unsigned TMR2IE : 1;
3194 unsigned CCP1IE : 1;
3195 unsigned SSPIE : 1;
3196 unsigned TXIE : 1;
3197 unsigned RCIE : 1;
3198 unsigned ADIE : 1;
3199 unsigned PSPIE : 1;
3200 };
3201
3202 struct
3203 {
3204 unsigned : 1;
3205 unsigned : 1;
3206 unsigned : 1;
3207 unsigned : 1;
3208 unsigned TX1IE : 1;
3209 unsigned RC1IE : 1;
3210 unsigned : 1;
3211 unsigned : 1;
3212 };
3213 } __PIE1bits_t;
3214
3215 extern __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
3216
3217 #define _TMR1IE 0x01
3218 #define _TMR2IE 0x02
3219 #define _CCP1IE 0x04
3220 #define _SSPIE 0x08
3221 #define _TXIE 0x10
3222 #define _TX1IE 0x10
3223 #define _RCIE 0x20
3224 #define _RC1IE 0x20
3225 #define _ADIE 0x40
3226 #define _PSPIE 0x80
3227
3228 //==============================================================================
3229
3230
3231 //==============================================================================
3232 // PIR1 Bits
3233
3234 extern __at(0x0F9E) __sfr PIR1;
3235
3236 typedef union
3237 {
3238 struct
3239 {
3240 unsigned TMR1IF : 1;
3241 unsigned TMR2IF : 1;
3242 unsigned CCP1IF : 1;
3243 unsigned SSPIF : 1;
3244 unsigned TXIF : 1;
3245 unsigned RCIF : 1;
3246 unsigned ADIF : 1;
3247 unsigned PSPIF : 1;
3248 };
3249
3250 struct
3251 {
3252 unsigned : 1;
3253 unsigned : 1;
3254 unsigned : 1;
3255 unsigned : 1;
3256 unsigned TX1IF : 1;
3257 unsigned RC1IF : 1;
3258 unsigned : 1;
3259 unsigned : 1;
3260 };
3261 } __PIR1bits_t;
3262
3263 extern __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
3264
3265 #define _TMR1IF 0x01
3266 #define _TMR2IF 0x02
3267 #define _CCP1IF 0x04
3268 #define _SSPIF 0x08
3269 #define _TXIF 0x10
3270 #define _TX1IF 0x10
3271 #define _RCIF 0x20
3272 #define _RC1IF 0x20
3273 #define _ADIF 0x40
3274 #define _PSPIF 0x80
3275
3276 //==============================================================================
3277
3278
3279 //==============================================================================
3280 // IPR1 Bits
3281
3282 extern __at(0x0F9F) __sfr IPR1;
3283
3284 typedef union
3285 {
3286 struct
3287 {
3288 unsigned TMR1IP : 1;
3289 unsigned TMR2IP : 1;
3290 unsigned CCP1IP : 1;
3291 unsigned SSPIP : 1;
3292 unsigned TXIP : 1;
3293 unsigned RCIP : 1;
3294 unsigned ADIP : 1;
3295 unsigned PSPIP : 1;
3296 };
3297
3298 struct
3299 {
3300 unsigned : 1;
3301 unsigned : 1;
3302 unsigned : 1;
3303 unsigned : 1;
3304 unsigned TX1IP : 1;
3305 unsigned RC1IP : 1;
3306 unsigned : 1;
3307 unsigned : 1;
3308 };
3309 } __IPR1bits_t;
3310
3311 extern __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
3312
3313 #define _TMR1IP 0x01
3314 #define _TMR2IP 0x02
3315 #define _CCP1IP 0x04
3316 #define _SSPIP 0x08
3317 #define _TXIP 0x10
3318 #define _TX1IP 0x10
3319 #define _RCIP 0x20
3320 #define _RC1IP 0x20
3321 #define _ADIP 0x40
3322 #define _PSPIP 0x80
3323
3324 //==============================================================================
3325
3326
3327 //==============================================================================
3328 // PIE2 Bits
3329
3330 extern __at(0x0FA0) __sfr PIE2;
3331
3332 typedef struct
3333 {
3334 unsigned CCP2IE : 1;
3335 unsigned TMR3IE : 1;
3336 unsigned LVDIE : 1;
3337 unsigned BCLIE : 1;
3338 unsigned EEIE : 1;
3339 unsigned : 1;
3340 unsigned CMIE : 1;
3341 unsigned : 1;
3342 } __PIE2bits_t;
3343
3344 extern __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
3345
3346 #define _CCP2IE 0x01
3347 #define _TMR3IE 0x02
3348 #define _LVDIE 0x04
3349 #define _BCLIE 0x08
3350 #define _EEIE 0x10
3351 #define _CMIE 0x40
3352
3353 //==============================================================================
3354
3355
3356 //==============================================================================
3357 // PIR2 Bits
3358
3359 extern __at(0x0FA1) __sfr PIR2;
3360
3361 typedef struct
3362 {
3363 unsigned CCP2IF : 1;
3364 unsigned TMR3IF : 1;
3365 unsigned LVDIF : 1;
3366 unsigned BCLIF : 1;
3367 unsigned EEIF : 1;
3368 unsigned : 1;
3369 unsigned CMIF : 1;
3370 unsigned : 1;
3371 } __PIR2bits_t;
3372
3373 extern __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
3374
3375 #define _CCP2IF 0x01
3376 #define _TMR3IF 0x02
3377 #define _LVDIF 0x04
3378 #define _BCLIF 0x08
3379 #define _EEIF 0x10
3380 #define _CMIF 0x40
3381
3382 //==============================================================================
3383
3384
3385 //==============================================================================
3386 // IPR2 Bits
3387
3388 extern __at(0x0FA2) __sfr IPR2;
3389
3390 typedef struct
3391 {
3392 unsigned CCP2IP : 1;
3393 unsigned TMR3IP : 1;
3394 unsigned LVDIP : 1;
3395 unsigned BCLIP : 1;
3396 unsigned EEIP : 1;
3397 unsigned : 1;
3398 unsigned CMIP : 1;
3399 unsigned : 1;
3400 } __IPR2bits_t;
3401
3402 extern __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
3403
3404 #define _CCP2IP 0x01
3405 #define _TMR3IP 0x02
3406 #define _LVDIP 0x04
3407 #define _BCLIP 0x08
3408 #define _EEIP 0x10
3409 #define _CMIP 0x40
3410
3411 //==============================================================================
3412
3413
3414 //==============================================================================
3415 // PIE3 Bits
3416
3417 extern __at(0x0FA3) __sfr PIE3;
3418
3419 typedef struct
3420 {
3421 unsigned CCP3IE : 1;
3422 unsigned CCP4IE : 1;
3423 unsigned CCP5IE : 1;
3424 unsigned TMR4IE : 1;
3425 unsigned TX2IE : 1;
3426 unsigned RC2IE : 1;
3427 unsigned : 1;
3428 unsigned : 1;
3429 } __PIE3bits_t;
3430
3431 extern __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
3432
3433 #define _CCP3IE 0x01
3434 #define _CCP4IE 0x02
3435 #define _CCP5IE 0x04
3436 #define _TMR4IE 0x08
3437 #define _TX2IE 0x10
3438 #define _RC2IE 0x20
3439
3440 //==============================================================================
3441
3442
3443 //==============================================================================
3444 // PIR3 Bits
3445
3446 extern __at(0x0FA4) __sfr PIR3;
3447
3448 typedef struct
3449 {
3450 unsigned CCP3IF : 1;
3451 unsigned CCP4IF : 1;
3452 unsigned CCP5IF : 1;
3453 unsigned TMR4IF : 1;
3454 unsigned TX2IF : 1;
3455 unsigned RC2IF : 1;
3456 unsigned : 1;
3457 unsigned : 1;
3458 } __PIR3bits_t;
3459
3460 extern __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
3461
3462 #define _CCP3IF 0x01
3463 #define _CCP4IF 0x02
3464 #define _CCP5IF 0x04
3465 #define _TMR4IF 0x08
3466 #define _TX2IF 0x10
3467 #define _RC2IF 0x20
3468
3469 //==============================================================================
3470
3471
3472 //==============================================================================
3473 // IPR3 Bits
3474
3475 extern __at(0x0FA5) __sfr IPR3;
3476
3477 typedef struct
3478 {
3479 unsigned CCP3IP : 1;
3480 unsigned CCP4IP : 1;
3481 unsigned CCP5IP : 1;
3482 unsigned TMR4IP : 1;
3483 unsigned TX2IP : 1;
3484 unsigned RC2IP : 1;
3485 unsigned : 1;
3486 unsigned : 1;
3487 } __IPR3bits_t;
3488
3489 extern __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
3490
3491 #define _CCP3IP 0x01
3492 #define _CCP4IP 0x02
3493 #define _CCP5IP 0x04
3494 #define _TMR4IP 0x08
3495 #define _TX2IP 0x10
3496 #define _RC2IP 0x20
3497
3498 //==============================================================================
3499
3500
3501 //==============================================================================
3502 // EECON1 Bits
3503
3504 extern __at(0x0FA6) __sfr EECON1;
3505
3506 typedef struct
3507 {
3508 unsigned RD : 1;
3509 unsigned WR : 1;
3510 unsigned WREN : 1;
3511 unsigned WRERR : 1;
3512 unsigned FREE : 1;
3513 unsigned : 1;
3514 unsigned CFGS : 1;
3515 unsigned EEPGD : 1;
3516 } __EECON1bits_t;
3517
3518 extern __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
3519
3520 #define _RD 0x01
3521 #define _WR 0x02
3522 #define _WREN 0x04
3523 #define _WRERR 0x08
3524 #define _FREE 0x10
3525 #define _CFGS 0x40
3526 #define _EEPGD 0x80
3527
3528 //==============================================================================
3529
3530 extern __at(0x0FA7) __sfr EECON2;
3531 extern __at(0x0FA8) __sfr EEDATA;
3532 extern __at(0x0FA9) __sfr EEADR;
3533 extern __at(0x0FAA) __sfr EEADRH;
3534
3535 //==============================================================================
3536 // RCSTA Bits
3537
3538 extern __at(0x0FAB) __sfr RCSTA;
3539
3540 typedef union
3541 {
3542 struct
3543 {
3544 unsigned RX9D : 1;
3545 unsigned OERR : 1;
3546 unsigned FERR : 1;
3547 unsigned ADDEN : 1;
3548 unsigned CREN : 1;
3549 unsigned SREN : 1;
3550 unsigned RX9 : 1;
3551 unsigned SPEN : 1;
3552 };
3553
3554 struct
3555 {
3556 unsigned RX9D1 : 1;
3557 unsigned OERR1 : 1;
3558 unsigned FERR1 : 1;
3559 unsigned ADEN : 1;
3560 unsigned CREN1 : 1;
3561 unsigned SREN1 : 1;
3562 unsigned RX91 : 1;
3563 unsigned SPEN1 : 1;
3564 };
3565
3566 struct
3567 {
3568 unsigned : 1;
3569 unsigned : 1;
3570 unsigned : 1;
3571 unsigned ADDEN1 : 1;
3572 unsigned : 1;
3573 unsigned : 1;
3574 unsigned : 1;
3575 unsigned : 1;
3576 };
3577 } __RCSTAbits_t;
3578
3579 extern __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
3580
3581 #define _RX9D 0x01
3582 #define _RX9D1 0x01
3583 #define _OERR 0x02
3584 #define _OERR1 0x02
3585 #define _FERR 0x04
3586 #define _FERR1 0x04
3587 #define _ADDEN 0x08
3588 #define _ADEN 0x08
3589 #define _ADDEN1 0x08
3590 #define _CREN 0x10
3591 #define _CREN1 0x10
3592 #define _SREN 0x20
3593 #define _SREN1 0x20
3594 #define _RX9 0x40
3595 #define _RX91 0x40
3596 #define _SPEN 0x80
3597 #define _SPEN1 0x80
3598
3599 //==============================================================================
3600
3601
3602 //==============================================================================
3603 // RCSTA1 Bits
3604
3605 extern __at(0x0FAB) __sfr RCSTA1;
3606
3607 typedef union
3608 {
3609 struct
3610 {
3611 unsigned RX9D : 1;
3612 unsigned OERR : 1;
3613 unsigned FERR : 1;
3614 unsigned ADDEN : 1;
3615 unsigned CREN : 1;
3616 unsigned SREN : 1;
3617 unsigned RX9 : 1;
3618 unsigned SPEN : 1;
3619 };
3620
3621 struct
3622 {
3623 unsigned RX9D1 : 1;
3624 unsigned OERR1 : 1;
3625 unsigned FERR1 : 1;
3626 unsigned ADEN : 1;
3627 unsigned CREN1 : 1;
3628 unsigned SREN1 : 1;
3629 unsigned RX91 : 1;
3630 unsigned SPEN1 : 1;
3631 };
3632
3633 struct
3634 {
3635 unsigned : 1;
3636 unsigned : 1;
3637 unsigned : 1;
3638 unsigned ADDEN1 : 1;
3639 unsigned : 1;
3640 unsigned : 1;
3641 unsigned : 1;
3642 unsigned : 1;
3643 };
3644 } __RCSTA1bits_t;
3645
3646 extern __at(0x0FAB) volatile __RCSTA1bits_t RCSTA1bits;
3647
3648 #define _RCSTA1_RX9D 0x01
3649 #define _RCSTA1_RX9D1 0x01
3650 #define _RCSTA1_OERR 0x02
3651 #define _RCSTA1_OERR1 0x02
3652 #define _RCSTA1_FERR 0x04
3653 #define _RCSTA1_FERR1 0x04
3654 #define _RCSTA1_ADDEN 0x08
3655 #define _RCSTA1_ADEN 0x08
3656 #define _RCSTA1_ADDEN1 0x08
3657 #define _RCSTA1_CREN 0x10
3658 #define _RCSTA1_CREN1 0x10
3659 #define _RCSTA1_SREN 0x20
3660 #define _RCSTA1_SREN1 0x20
3661 #define _RCSTA1_RX9 0x40
3662 #define _RCSTA1_RX91 0x40
3663 #define _RCSTA1_SPEN 0x80
3664 #define _RCSTA1_SPEN1 0x80
3665
3666 //==============================================================================
3667
3668
3669 //==============================================================================
3670 // TXSTA Bits
3671
3672 extern __at(0x0FAC) __sfr TXSTA;
3673
3674 typedef union
3675 {
3676 struct
3677 {
3678 unsigned TX9D : 1;
3679 unsigned TRMT : 1;
3680 unsigned BRGH : 1;
3681 unsigned SENDB : 1;
3682 unsigned SYNC : 1;
3683 unsigned TXEN : 1;
3684 unsigned TX9 : 1;
3685 unsigned CSRC : 1;
3686 };
3687
3688 struct
3689 {
3690 unsigned TX9D1 : 1;
3691 unsigned TRMT1 : 1;
3692 unsigned BRGH1 : 1;
3693 unsigned SENDB1 : 1;
3694 unsigned SYNC1 : 1;
3695 unsigned TXEN1 : 1;
3696 unsigned TX91 : 1;
3697 unsigned CSRC1 : 1;
3698 };
3699 } __TXSTAbits_t;
3700
3701 extern __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
3702
3703 #define _TX9D 0x01
3704 #define _TX9D1 0x01
3705 #define _TRMT 0x02
3706 #define _TRMT1 0x02
3707 #define _BRGH 0x04
3708 #define _BRGH1 0x04
3709 #define _SENDB 0x08
3710 #define _SENDB1 0x08
3711 #define _SYNC 0x10
3712 #define _SYNC1 0x10
3713 #define _TXEN 0x20
3714 #define _TXEN1 0x20
3715 #define _TX9 0x40
3716 #define _TX91 0x40
3717 #define _CSRC 0x80
3718 #define _CSRC1 0x80
3719
3720 //==============================================================================
3721
3722
3723 //==============================================================================
3724 // TXSTA1 Bits
3725
3726 extern __at(0x0FAC) __sfr TXSTA1;
3727
3728 typedef union
3729 {
3730 struct
3731 {
3732 unsigned TX9D : 1;
3733 unsigned TRMT : 1;
3734 unsigned BRGH : 1;
3735 unsigned SENDB : 1;
3736 unsigned SYNC : 1;
3737 unsigned TXEN : 1;
3738 unsigned TX9 : 1;
3739 unsigned CSRC : 1;
3740 };
3741
3742 struct
3743 {
3744 unsigned TX9D1 : 1;
3745 unsigned TRMT1 : 1;
3746 unsigned BRGH1 : 1;
3747 unsigned SENDB1 : 1;
3748 unsigned SYNC1 : 1;
3749 unsigned TXEN1 : 1;
3750 unsigned TX91 : 1;
3751 unsigned CSRC1 : 1;
3752 };
3753 } __TXSTA1bits_t;
3754
3755 extern __at(0x0FAC) volatile __TXSTA1bits_t TXSTA1bits;
3756
3757 #define _TXSTA1_TX9D 0x01
3758 #define _TXSTA1_TX9D1 0x01
3759 #define _TXSTA1_TRMT 0x02
3760 #define _TXSTA1_TRMT1 0x02
3761 #define _TXSTA1_BRGH 0x04
3762 #define _TXSTA1_BRGH1 0x04
3763 #define _TXSTA1_SENDB 0x08
3764 #define _TXSTA1_SENDB1 0x08
3765 #define _TXSTA1_SYNC 0x10
3766 #define _TXSTA1_SYNC1 0x10
3767 #define _TXSTA1_TXEN 0x20
3768 #define _TXSTA1_TXEN1 0x20
3769 #define _TXSTA1_TX9 0x40
3770 #define _TXSTA1_TX91 0x40
3771 #define _TXSTA1_CSRC 0x80
3772 #define _TXSTA1_CSRC1 0x80
3773
3774 //==============================================================================
3775
3776 extern __at(0x0FAD) __sfr TXREG;
3777 extern __at(0x0FAD) __sfr TXREG1;
3778 extern __at(0x0FAE) __sfr RCREG;
3779 extern __at(0x0FAE) __sfr RCREG1;
3780 extern __at(0x0FAF) __sfr SPBRG;
3781 extern __at(0x0FAF) __sfr SPBRG1;
3782
3783 //==============================================================================
3784 // PSPCON Bits
3785
3786 extern __at(0x0FB0) __sfr PSPCON;
3787
3788 typedef struct
3789 {
3790 unsigned : 1;
3791 unsigned : 1;
3792 unsigned : 1;
3793 unsigned : 1;
3794 unsigned PSPMODE : 1;
3795 unsigned IBOV : 1;
3796 unsigned OBF : 1;
3797 unsigned IBF : 1;
3798 } __PSPCONbits_t;
3799
3800 extern __at(0x0FB0) volatile __PSPCONbits_t PSPCONbits;
3801
3802 #define _PSPMODE 0x10
3803 #define _IBOV 0x20
3804 #define _OBF 0x40
3805 #define _IBF 0x80
3806
3807 //==============================================================================
3808
3809
3810 //==============================================================================
3811 // T3CON Bits
3812
3813 extern __at(0x0FB1) __sfr T3CON;
3814
3815 typedef union
3816 {
3817 struct
3818 {
3819 unsigned TMR3ON : 1;
3820 unsigned TMR3CS : 1;
3821 unsigned NOT_T3SYNC : 1;
3822 unsigned T3CCP1 : 1;
3823 unsigned T3CKPS0 : 1;
3824 unsigned T3CKPS1 : 1;
3825 unsigned T3CCP2 : 1;
3826 unsigned RD16 : 1;
3827 };
3828
3829 struct
3830 {
3831 unsigned : 1;
3832 unsigned : 1;
3833 unsigned T3SYNC : 1;
3834 unsigned : 1;
3835 unsigned : 1;
3836 unsigned : 1;
3837 unsigned : 1;
3838 unsigned : 1;
3839 };
3840
3841 struct
3842 {
3843 unsigned : 1;
3844 unsigned : 1;
3845 unsigned T3NSYNC : 1;
3846 unsigned : 1;
3847 unsigned : 1;
3848 unsigned : 1;
3849 unsigned : 1;
3850 unsigned : 1;
3851 };
3852
3853 struct
3854 {
3855 unsigned : 4;
3856 unsigned T3CKPS : 2;
3857 unsigned : 2;
3858 };
3859 } __T3CONbits_t;
3860
3861 extern __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
3862
3863 #define _T3CON_TMR3ON 0x01
3864 #define _T3CON_TMR3CS 0x02
3865 #define _T3CON_NOT_T3SYNC 0x04
3866 #define _T3CON_T3SYNC 0x04
3867 #define _T3CON_T3NSYNC 0x04
3868 #define _T3CON_T3CCP1 0x08
3869 #define _T3CON_T3CKPS0 0x10
3870 #define _T3CON_T3CKPS1 0x20
3871 #define _T3CON_T3CCP2 0x40
3872 #define _T3CON_RD16 0x80
3873
3874 //==============================================================================
3875
3876 extern __at(0x0FB2) __sfr TMR3;
3877 extern __at(0x0FB2) __sfr TMR3L;
3878 extern __at(0x0FB3) __sfr TMR3H;
3879
3880 //==============================================================================
3881 // CMCON Bits
3882
3883 extern __at(0x0FB4) __sfr CMCON;
3884
3885 typedef union
3886 {
3887 struct
3888 {
3889 unsigned CM0 : 1;
3890 unsigned CM1 : 1;
3891 unsigned CM2 : 1;
3892 unsigned CIS : 1;
3893 unsigned C1INV : 1;
3894 unsigned C2INV : 1;
3895 unsigned C1OUT : 1;
3896 unsigned C2OUT : 1;
3897 };
3898
3899 struct
3900 {
3901 unsigned CM : 3;
3902 unsigned : 5;
3903 };
3904 } __CMCONbits_t;
3905
3906 extern __at(0x0FB4) volatile __CMCONbits_t CMCONbits;
3907
3908 #define _CM0 0x01
3909 #define _CM1 0x02
3910 #define _CM2 0x04
3911 #define _CIS 0x08
3912 #define _C1INV 0x10
3913 #define _C2INV 0x20
3914 #define _C1OUT 0x40
3915 #define _C2OUT 0x80
3916
3917 //==============================================================================
3918
3919
3920 //==============================================================================
3921 // CVRCON Bits
3922
3923 extern __at(0x0FB5) __sfr CVRCON;
3924
3925 typedef union
3926 {
3927 struct
3928 {
3929 unsigned CVR0 : 1;
3930 unsigned CVR1 : 1;
3931 unsigned CVR2 : 1;
3932 unsigned CVR3 : 1;
3933 unsigned CVRSS : 1;
3934 unsigned CVRR : 1;
3935 unsigned CVROE : 1;
3936 unsigned CVREN : 1;
3937 };
3938
3939 struct
3940 {
3941 unsigned : 1;
3942 unsigned : 1;
3943 unsigned : 1;
3944 unsigned : 1;
3945 unsigned CVREF : 1;
3946 unsigned : 1;
3947 unsigned : 1;
3948 unsigned : 1;
3949 };
3950
3951 struct
3952 {
3953 unsigned CVR : 4;
3954 unsigned : 4;
3955 };
3956 } __CVRCONbits_t;
3957
3958 extern __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
3959
3960 #define _CVR0 0x01
3961 #define _CVR1 0x02
3962 #define _CVR2 0x04
3963 #define _CVR3 0x08
3964 #define _CVRSS 0x10
3965 #define _CVREF 0x10
3966 #define _CVRR 0x20
3967 #define _CVROE 0x40
3968 #define _CVREN 0x80
3969
3970 //==============================================================================
3971
3972
3973 //==============================================================================
3974 // ECCP1AS Bits
3975
3976 extern __at(0x0FB6) __sfr ECCP1AS;
3977
3978 typedef union
3979 {
3980 struct
3981 {
3982 unsigned PSS1BD0 : 1;
3983 unsigned PSS1BD1 : 1;
3984 unsigned PSS1AC0 : 1;
3985 unsigned PSS1AC1 : 1;
3986 unsigned ECCP1AS0 : 1;
3987 unsigned ECCP1AS1 : 1;
3988 unsigned ECCP1AS2 : 1;
3989 unsigned ECCP1ASE : 1;
3990 };
3991
3992 struct
3993 {
3994 unsigned PSSBD0 : 1;
3995 unsigned PSSBD1 : 1;
3996 unsigned PSSAC0 : 1;
3997 unsigned PSSAC1 : 1;
3998 unsigned : 1;
3999 unsigned : 1;
4000 unsigned : 1;
4001 unsigned : 1;
4002 };
4003
4004 struct
4005 {
4006 unsigned PSS1BD : 2;
4007 unsigned : 6;
4008 };
4009
4010 struct
4011 {
4012 unsigned PSSBD : 2;
4013 unsigned : 6;
4014 };
4015
4016 struct
4017 {
4018 unsigned : 2;
4019 unsigned PSSAC : 2;
4020 unsigned : 4;
4021 };
4022
4023 struct
4024 {
4025 unsigned : 2;
4026 unsigned PSS1AC : 2;
4027 unsigned : 4;
4028 };
4029
4030 struct
4031 {
4032 unsigned : 4;
4033 unsigned ECCP1AS : 3;
4034 unsigned : 1;
4035 };
4036 } __ECCP1ASbits_t;
4037
4038 extern __at(0x0FB6) volatile __ECCP1ASbits_t ECCP1ASbits;
4039
4040 #define _PSS1BD0 0x01
4041 #define _PSSBD0 0x01
4042 #define _PSS1BD1 0x02
4043 #define _PSSBD1 0x02
4044 #define _PSS1AC0 0x04
4045 #define _PSSAC0 0x04
4046 #define _PSS1AC1 0x08
4047 #define _PSSAC1 0x08
4048 #define _ECCP1AS0 0x10
4049 #define _ECCP1AS1 0x20
4050 #define _ECCP1AS2 0x40
4051 #define _ECCP1ASE 0x80
4052
4053 //==============================================================================
4054
4055
4056 //==============================================================================
4057 // CCP3CON Bits
4058
4059 extern __at(0x0FB7) __sfr CCP3CON;
4060
4061 typedef union
4062 {
4063 struct
4064 {
4065 unsigned CCP3M0 : 1;
4066 unsigned CCP3M1 : 1;
4067 unsigned CCP3M2 : 1;
4068 unsigned CCP3M3 : 1;
4069 unsigned CCP3Y : 1;
4070 unsigned CCP3X : 1;
4071 unsigned P3M0 : 1;
4072 unsigned P3M1 : 1;
4073 };
4074
4075 struct
4076 {
4077 unsigned : 1;
4078 unsigned : 1;
4079 unsigned : 1;
4080 unsigned : 1;
4081 unsigned DC3B0 : 1;
4082 unsigned DC3B1 : 1;
4083 unsigned : 1;
4084 unsigned : 1;
4085 };
4086
4087 struct
4088 {
4089 unsigned CCP3M : 4;
4090 unsigned : 4;
4091 };
4092
4093 struct
4094 {
4095 unsigned : 4;
4096 unsigned DC3B : 2;
4097 unsigned : 2;
4098 };
4099
4100 struct
4101 {
4102 unsigned : 6;
4103 unsigned P3M : 2;
4104 };
4105 } __CCP3CONbits_t;
4106
4107 extern __at(0x0FB7) volatile __CCP3CONbits_t CCP3CONbits;
4108
4109 #define _CCP3M0 0x01
4110 #define _CCP3M1 0x02
4111 #define _CCP3M2 0x04
4112 #define _CCP3M3 0x08
4113 #define _CCP3Y 0x10
4114 #define _DC3B0 0x10
4115 #define _CCP3X 0x20
4116 #define _DC3B1 0x20
4117 #define _P3M0 0x40
4118 #define _P3M1 0x80
4119
4120 //==============================================================================
4121
4122 extern __at(0x0FB8) __sfr CCPR3;
4123 extern __at(0x0FB8) __sfr CCPR3L;
4124 extern __at(0x0FB9) __sfr CCPR3H;
4125
4126 //==============================================================================
4127 // CCP2CON Bits
4128
4129 extern __at(0x0FBA) __sfr CCP2CON;
4130
4131 typedef union
4132 {
4133 struct
4134 {
4135 unsigned CCP2M0 : 1;
4136 unsigned CCP2M1 : 1;
4137 unsigned CCP2M2 : 1;
4138 unsigned CCP2M3 : 1;
4139 unsigned DC2B0 : 1;
4140 unsigned DC2B1 : 1;
4141 unsigned P2M0 : 1;
4142 unsigned P2M1 : 1;
4143 };
4144
4145 struct
4146 {
4147 unsigned : 1;
4148 unsigned : 1;
4149 unsigned : 1;
4150 unsigned : 1;
4151 unsigned CCP2Y : 1;
4152 unsigned CCP2X : 1;
4153 unsigned : 1;
4154 unsigned : 1;
4155 };
4156
4157 struct
4158 {
4159 unsigned CCP2M : 4;
4160 unsigned : 4;
4161 };
4162
4163 struct
4164 {
4165 unsigned : 4;
4166 unsigned DC2B : 2;
4167 unsigned : 2;
4168 };
4169
4170 struct
4171 {
4172 unsigned : 6;
4173 unsigned P2M : 2;
4174 };
4175 } __CCP2CONbits_t;
4176
4177 extern __at(0x0FBA) volatile __CCP2CONbits_t CCP2CONbits;
4178
4179 #define _CCP2M0 0x01
4180 #define _CCP2M1 0x02
4181 #define _CCP2M2 0x04
4182 #define _CCP2M3 0x08
4183 #define _DC2B0 0x10
4184 #define _CCP2Y 0x10
4185 #define _DC2B1 0x20
4186 #define _CCP2X 0x20
4187 #define _P2M0 0x40
4188 #define _P2M1 0x80
4189
4190 //==============================================================================
4191
4192 extern __at(0x0FBB) __sfr CCPR2;
4193 extern __at(0x0FBB) __sfr CCPR2L;
4194 extern __at(0x0FBC) __sfr CCPR2H;
4195
4196 //==============================================================================
4197 // CCP1CON Bits
4198
4199 extern __at(0x0FBD) __sfr CCP1CON;
4200
4201 typedef union
4202 {
4203 struct
4204 {
4205 unsigned CCP1M0 : 1;
4206 unsigned CCP1M1 : 1;
4207 unsigned CCP1M2 : 1;
4208 unsigned CCP1M3 : 1;
4209 unsigned DC1B0 : 1;
4210 unsigned DC1B1 : 1;
4211 unsigned P1M0 : 1;
4212 unsigned P1M1 : 1;
4213 };
4214
4215 struct
4216 {
4217 unsigned : 1;
4218 unsigned : 1;
4219 unsigned : 1;
4220 unsigned : 1;
4221 unsigned CCP1Y : 1;
4222 unsigned CCP1X : 1;
4223 unsigned : 1;
4224 unsigned : 1;
4225 };
4226
4227 struct
4228 {
4229 unsigned CCP1M : 4;
4230 unsigned : 4;
4231 };
4232
4233 struct
4234 {
4235 unsigned : 4;
4236 unsigned DC1B : 2;
4237 unsigned : 2;
4238 };
4239
4240 struct
4241 {
4242 unsigned : 6;
4243 unsigned P1M : 2;
4244 };
4245 } __CCP1CONbits_t;
4246
4247 extern __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits;
4248
4249 #define _CCP1M0 0x01
4250 #define _CCP1M1 0x02
4251 #define _CCP1M2 0x04
4252 #define _CCP1M3 0x08
4253 #define _DC1B0 0x10
4254 #define _CCP1Y 0x10
4255 #define _DC1B1 0x20
4256 #define _CCP1X 0x20
4257 #define _P1M0 0x40
4258 #define _P1M1 0x80
4259
4260 //==============================================================================
4261
4262 extern __at(0x0FBE) __sfr CCPR1;
4263 extern __at(0x0FBE) __sfr CCPR1L;
4264 extern __at(0x0FBF) __sfr CCPR1H;
4265
4266 //==============================================================================
4267 // ADCON2 Bits
4268
4269 extern __at(0x0FC0) __sfr ADCON2;
4270
4271 typedef union
4272 {
4273 struct
4274 {
4275 unsigned ADCS0 : 1;
4276 unsigned ADCS1 : 1;
4277 unsigned ADCS2 : 1;
4278 unsigned ACQT0 : 1;
4279 unsigned ACQT1 : 1;
4280 unsigned ACQT2 : 1;
4281 unsigned : 1;
4282 unsigned ADFM : 1;
4283 };
4284
4285 struct
4286 {
4287 unsigned ADCS : 3;
4288 unsigned : 5;
4289 };
4290
4291 struct
4292 {
4293 unsigned : 3;
4294 unsigned ACQT : 3;
4295 unsigned : 2;
4296 };
4297 } __ADCON2bits_t;
4298
4299 extern __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
4300
4301 #define _ADCS0 0x01
4302 #define _ADCS1 0x02
4303 #define _ADCS2 0x04
4304 #define _ACQT0 0x08
4305 #define _ACQT1 0x10
4306 #define _ACQT2 0x20
4307 #define _ADFM 0x80
4308
4309 //==============================================================================
4310
4311
4312 //==============================================================================
4313 // ADCON1 Bits
4314
4315 extern __at(0x0FC1) __sfr ADCON1;
4316
4317 typedef union
4318 {
4319 struct
4320 {
4321 unsigned PCFG0 : 1;
4322 unsigned PCFG1 : 1;
4323 unsigned PCFG2 : 1;
4324 unsigned PCFG3 : 1;
4325 unsigned VCFG0 : 1;
4326 unsigned VCFG1 : 1;
4327 unsigned : 1;
4328 unsigned : 1;
4329 };
4330
4331 struct
4332 {
4333 unsigned PCFG : 4;
4334 unsigned : 4;
4335 };
4336
4337 struct
4338 {
4339 unsigned : 4;
4340 unsigned VCFG : 2;
4341 unsigned : 2;
4342 };
4343 } __ADCON1bits_t;
4344
4345 extern __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
4346
4347 #define _PCFG0 0x01
4348 #define _PCFG1 0x02
4349 #define _PCFG2 0x04
4350 #define _PCFG3 0x08
4351 #define _VCFG0 0x10
4352 #define _VCFG1 0x20
4353
4354 //==============================================================================
4355
4356
4357 //==============================================================================
4358 // ADCON0 Bits
4359
4360 extern __at(0x0FC2) __sfr ADCON0;
4361
4362 typedef union
4363 {
4364 struct
4365 {
4366 unsigned ADON : 1;
4367 unsigned GO_NOT_DONE : 1;
4368 unsigned CHS0 : 1;
4369 unsigned CHS1 : 1;
4370 unsigned CHS2 : 1;
4371 unsigned CHS3 : 1;
4372 unsigned : 1;
4373 unsigned : 1;
4374 };
4375
4376 struct
4377 {
4378 unsigned : 1;
4379 unsigned GO_DONE : 1;
4380 unsigned : 1;
4381 unsigned : 1;
4382 unsigned : 1;
4383 unsigned : 1;
4384 unsigned : 1;
4385 unsigned : 1;
4386 };
4387
4388 struct
4389 {
4390 unsigned : 1;
4391 unsigned DONE : 1;
4392 unsigned : 1;
4393 unsigned : 1;
4394 unsigned : 1;
4395 unsigned : 1;
4396 unsigned : 1;
4397 unsigned : 1;
4398 };
4399
4400 struct
4401 {
4402 unsigned : 1;
4403 unsigned GO : 1;
4404 unsigned : 1;
4405 unsigned : 1;
4406 unsigned : 1;
4407 unsigned : 1;
4408 unsigned : 1;
4409 unsigned : 1;
4410 };
4411
4412 struct
4413 {
4414 unsigned : 1;
4415 unsigned NOT_DONE : 1;
4416 unsigned : 1;
4417 unsigned : 1;
4418 unsigned : 1;
4419 unsigned : 1;
4420 unsigned : 1;
4421 unsigned : 1;
4422 };
4423
4424 struct
4425 {
4426 unsigned : 1;
4427 unsigned GODONE : 1;
4428 unsigned : 1;
4429 unsigned : 1;
4430 unsigned : 1;
4431 unsigned : 1;
4432 unsigned : 1;
4433 unsigned : 1;
4434 };
4435
4436 struct
4437 {
4438 unsigned : 2;
4439 unsigned CHS : 4;
4440 unsigned : 2;
4441 };
4442 } __ADCON0bits_t;
4443
4444 extern __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
4445
4446 #define _ADON 0x01
4447 #define _GO_NOT_DONE 0x02
4448 #define _GO_DONE 0x02
4449 #define _DONE 0x02
4450 #define _GO 0x02
4451 #define _NOT_DONE 0x02
4452 #define _GODONE 0x02
4453 #define _CHS0 0x04
4454 #define _CHS1 0x08
4455 #define _CHS2 0x10
4456 #define _CHS3 0x20
4457
4458 //==============================================================================
4459
4460 extern __at(0x0FC3) __sfr ADRES;
4461 extern __at(0x0FC3) __sfr ADRESL;
4462 extern __at(0x0FC4) __sfr ADRESH;
4463
4464 //==============================================================================
4465 // SSPCON2 Bits
4466
4467 extern __at(0x0FC5) __sfr SSPCON2;
4468
4469 typedef struct
4470 {
4471 unsigned SEN : 1;
4472 unsigned RSEN : 1;
4473 unsigned PEN : 1;
4474 unsigned RCEN : 1;
4475 unsigned ACKEN : 1;
4476 unsigned ACKDT : 1;
4477 unsigned ACKSTAT : 1;
4478 unsigned GCEN : 1;
4479 } __SSPCON2bits_t;
4480
4481 extern __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
4482
4483 #define _SEN 0x01
4484 #define _RSEN 0x02
4485 #define _PEN 0x04
4486 #define _RCEN 0x08
4487 #define _ACKEN 0x10
4488 #define _ACKDT 0x20
4489 #define _ACKSTAT 0x40
4490 #define _GCEN 0x80
4491
4492 //==============================================================================
4493
4494
4495 //==============================================================================
4496 // SSPCON1 Bits
4497
4498 extern __at(0x0FC6) __sfr SSPCON1;
4499
4500 typedef union
4501 {
4502 struct
4503 {
4504 unsigned SSPM0 : 1;
4505 unsigned SSPM1 : 1;
4506 unsigned SSPM2 : 1;
4507 unsigned SSPM3 : 1;
4508 unsigned CKP : 1;
4509 unsigned SSPEN : 1;
4510 unsigned SSPOV : 1;
4511 unsigned WCOL : 1;
4512 };
4513
4514 struct
4515 {
4516 unsigned SSPM : 4;
4517 unsigned : 4;
4518 };
4519 } __SSPCON1bits_t;
4520
4521 extern __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
4522
4523 #define _SSPM0 0x01
4524 #define _SSPM1 0x02
4525 #define _SSPM2 0x04
4526 #define _SSPM3 0x08
4527 #define _CKP 0x10
4528 #define _SSPEN 0x20
4529 #define _SSPOV 0x40
4530 #define _WCOL 0x80
4531
4532 //==============================================================================
4533
4534
4535 //==============================================================================
4536 // SSPSTAT Bits
4537
4538 extern __at(0x0FC7) __sfr SSPSTAT;
4539
4540 typedef union
4541 {
4542 struct
4543 {
4544 unsigned BF : 1;
4545 unsigned UA : 1;
4546 unsigned R_NOT_W : 1;
4547 unsigned S : 1;
4548 unsigned P : 1;
4549 unsigned D_NOT_A : 1;
4550 unsigned CKE : 1;
4551 unsigned SMP : 1;
4552 };
4553
4554 struct
4555 {
4556 unsigned : 1;
4557 unsigned : 1;
4558 unsigned R_W : 1;
4559 unsigned I2C_START : 1;
4560 unsigned I2C_STOP : 1;
4561 unsigned D_A : 1;
4562 unsigned : 1;
4563 unsigned : 1;
4564 };
4565
4566 struct
4567 {
4568 unsigned : 1;
4569 unsigned : 1;
4570 unsigned I2C_READ : 1;
4571 unsigned : 1;
4572 unsigned : 1;
4573 unsigned I2C_DAT : 1;
4574 unsigned : 1;
4575 unsigned : 1;
4576 };
4577
4578 struct
4579 {
4580 unsigned : 1;
4581 unsigned : 1;
4582 unsigned NOT_W : 1;
4583 unsigned : 1;
4584 unsigned : 1;
4585 unsigned NOT_A : 1;
4586 unsigned : 1;
4587 unsigned : 1;
4588 };
4589
4590 struct
4591 {
4592 unsigned : 1;
4593 unsigned : 1;
4594 unsigned NOT_WRITE : 1;
4595 unsigned : 1;
4596 unsigned : 1;
4597 unsigned NOT_ADDRESS : 1;
4598 unsigned : 1;
4599 unsigned : 1;
4600 };
4601
4602 struct
4603 {
4604 unsigned : 1;
4605 unsigned : 1;
4606 unsigned READ_WRITE : 1;
4607 unsigned : 1;
4608 unsigned : 1;
4609 unsigned DATA_ADDRESS : 1;
4610 unsigned : 1;
4611 unsigned : 1;
4612 };
4613
4614 struct
4615 {
4616 unsigned : 1;
4617 unsigned : 1;
4618 unsigned R : 1;
4619 unsigned : 1;
4620 unsigned : 1;
4621 unsigned D : 1;
4622 unsigned : 1;
4623 unsigned : 1;
4624 };
4625 } __SSPSTATbits_t;
4626
4627 extern __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
4628
4629 #define _BF 0x01
4630 #define _UA 0x02
4631 #define _R_NOT_W 0x04
4632 #define _R_W 0x04
4633 #define _I2C_READ 0x04
4634 #define _NOT_W 0x04
4635 #define _NOT_WRITE 0x04
4636 #define _READ_WRITE 0x04
4637 #define _R 0x04
4638 #define _S 0x08
4639 #define _I2C_START 0x08
4640 #define _P 0x10
4641 #define _I2C_STOP 0x10
4642 #define _D_NOT_A 0x20
4643 #define _D_A 0x20
4644 #define _I2C_DAT 0x20
4645 #define _NOT_A 0x20
4646 #define _NOT_ADDRESS 0x20
4647 #define _DATA_ADDRESS 0x20
4648 #define _D 0x20
4649 #define _CKE 0x40
4650 #define _SMP 0x80
4651
4652 //==============================================================================
4653
4654 extern __at(0x0FC8) __sfr SSPADD;
4655 extern __at(0x0FC9) __sfr SSPBUF;
4656
4657 //==============================================================================
4658 // T2CON Bits
4659
4660 extern __at(0x0FCA) __sfr T2CON;
4661
4662 typedef union
4663 {
4664 struct
4665 {
4666 unsigned T2CKPS0 : 1;
4667 unsigned T2CKPS1 : 1;
4668 unsigned TMR2ON : 1;
4669 unsigned T2OUTPS0 : 1;
4670 unsigned T2OUTPS1 : 1;
4671 unsigned T2OUTPS2 : 1;
4672 unsigned T2OUTPS3 : 1;
4673 unsigned : 1;
4674 };
4675
4676 struct
4677 {
4678 unsigned T2CKPS : 2;
4679 unsigned : 6;
4680 };
4681
4682 struct
4683 {
4684 unsigned : 3;
4685 unsigned T2OUTPS : 4;
4686 unsigned : 1;
4687 };
4688 } __T2CONbits_t;
4689
4690 extern __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
4691
4692 #define _T2CKPS0 0x01
4693 #define _T2CKPS1 0x02
4694 #define _TMR2ON 0x04
4695 #define _T2OUTPS0 0x08
4696 #define _T2OUTPS1 0x10
4697 #define _T2OUTPS2 0x20
4698 #define _T2OUTPS3 0x40
4699
4700 //==============================================================================
4701
4702 extern __at(0x0FCB) __sfr PR2;
4703 extern __at(0x0FCC) __sfr TMR2;
4704
4705 //==============================================================================
4706 // T1CON Bits
4707
4708 extern __at(0x0FCD) __sfr T1CON;
4709
4710 typedef union
4711 {
4712 struct
4713 {
4714 unsigned TMR1ON : 1;
4715 unsigned TMR1CS : 1;
4716 unsigned NOT_T1SYNC : 1;
4717 unsigned T1OSCEN : 1;
4718 unsigned T1CKPS0 : 1;
4719 unsigned T1CKPS1 : 1;
4720 unsigned : 1;
4721 unsigned RD16 : 1;
4722 };
4723
4724 struct
4725 {
4726 unsigned : 1;
4727 unsigned : 1;
4728 unsigned T1SYNC : 1;
4729 unsigned : 1;
4730 unsigned : 1;
4731 unsigned : 1;
4732 unsigned : 1;
4733 unsigned : 1;
4734 };
4735
4736 struct
4737 {
4738 unsigned : 1;
4739 unsigned : 1;
4740 unsigned T1INSYNC : 1;
4741 unsigned : 1;
4742 unsigned : 1;
4743 unsigned : 1;
4744 unsigned : 1;
4745 unsigned : 1;
4746 };
4747
4748 struct
4749 {
4750 unsigned : 4;
4751 unsigned T1CKPS : 2;
4752 unsigned : 2;
4753 };
4754 } __T1CONbits_t;
4755
4756 extern __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
4757
4758 #define _TMR1ON 0x01
4759 #define _TMR1CS 0x02
4760 #define _NOT_T1SYNC 0x04
4761 #define _T1SYNC 0x04
4762 #define _T1INSYNC 0x04
4763 #define _T1OSCEN 0x08
4764 #define _T1CKPS0 0x10
4765 #define _T1CKPS1 0x20
4766 #define _RD16 0x80
4767
4768 //==============================================================================
4769
4770 extern __at(0x0FCE) __sfr TMR1;
4771 extern __at(0x0FCE) __sfr TMR1L;
4772 extern __at(0x0FCF) __sfr TMR1H;
4773
4774 //==============================================================================
4775 // RCON Bits
4776
4777 extern __at(0x0FD0) __sfr RCON;
4778
4779 typedef union
4780 {
4781 struct
4782 {
4783 unsigned NOT_BOR : 1;
4784 unsigned NOT_POR : 1;
4785 unsigned NOT_PD : 1;
4786 unsigned NOT_TO : 1;
4787 unsigned NOT_RI : 1;
4788 unsigned : 1;
4789 unsigned : 1;
4790 unsigned IPEN : 1;
4791 };
4792
4793 struct
4794 {
4795 unsigned BOR : 1;
4796 unsigned POR : 1;
4797 unsigned PD : 1;
4798 unsigned TO : 1;
4799 unsigned RI : 1;
4800 unsigned : 1;
4801 unsigned : 1;
4802 unsigned NOT_IPEN : 1;
4803 };
4804 } __RCONbits_t;
4805
4806 extern __at(0x0FD0) volatile __RCONbits_t RCONbits;
4807
4808 #define _NOT_BOR 0x01
4809 #define _BOR 0x01
4810 #define _NOT_POR 0x02
4811 #define _POR 0x02
4812 #define _NOT_PD 0x04
4813 #define _PD 0x04
4814 #define _NOT_TO 0x08
4815 #define _TO 0x08
4816 #define _NOT_RI 0x10
4817 #define _RI 0x10
4818 #define _IPEN 0x80
4819 #define _NOT_IPEN 0x80
4820
4821 //==============================================================================
4822
4823
4824 //==============================================================================
4825 // WDTCON Bits
4826
4827 extern __at(0x0FD1) __sfr WDTCON;
4828
4829 typedef union
4830 {
4831 struct
4832 {
4833 unsigned SWDTEN : 1;
4834 unsigned : 1;
4835 unsigned : 1;
4836 unsigned : 1;
4837 unsigned : 1;
4838 unsigned : 1;
4839 unsigned : 1;
4840 unsigned : 1;
4841 };
4842
4843 struct
4844 {
4845 unsigned SWDTE : 1;
4846 unsigned : 1;
4847 unsigned : 1;
4848 unsigned : 1;
4849 unsigned : 1;
4850 unsigned : 1;
4851 unsigned : 1;
4852 unsigned : 1;
4853 };
4854 } __WDTCONbits_t;
4855
4856 extern __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
4857
4858 #define _SWDTEN 0x01
4859 #define _SWDTE 0x01
4860
4861 //==============================================================================
4862
4863
4864 //==============================================================================
4865 // LVDCON Bits
4866
4867 extern __at(0x0FD2) __sfr LVDCON;
4868
4869 typedef union
4870 {
4871 struct
4872 {
4873 unsigned LVDL0 : 1;
4874 unsigned LVDL1 : 1;
4875 unsigned LVDL2 : 1;
4876 unsigned LVDL3 : 1;
4877 unsigned LVDEN : 1;
4878 unsigned IRVST : 1;
4879 unsigned : 1;
4880 unsigned : 1;
4881 };
4882
4883 struct
4884 {
4885 unsigned LVV0 : 1;
4886 unsigned LVV1 : 1;
4887 unsigned LVV2 : 1;
4888 unsigned LVV3 : 1;
4889 unsigned : 1;
4890 unsigned BGST : 1;
4891 unsigned : 1;
4892 unsigned : 1;
4893 };
4894
4895 struct
4896 {
4897 unsigned LVDL : 4;
4898 unsigned : 4;
4899 };
4900
4901 struct
4902 {
4903 unsigned LVV : 4;
4904 unsigned : 4;
4905 };
4906 } __LVDCONbits_t;
4907
4908 extern __at(0x0FD2) volatile __LVDCONbits_t LVDCONbits;
4909
4910 #define _LVDL0 0x01
4911 #define _LVV0 0x01
4912 #define _LVDL1 0x02
4913 #define _LVV1 0x02
4914 #define _LVDL2 0x04
4915 #define _LVV2 0x04
4916 #define _LVDL3 0x08
4917 #define _LVV3 0x08
4918 #define _LVDEN 0x10
4919 #define _IRVST 0x20
4920 #define _BGST 0x20
4921
4922 //==============================================================================
4923
4924
4925 //==============================================================================
4926 // OSCCON Bits
4927
4928 extern __at(0x0FD3) __sfr OSCCON;
4929
4930 typedef union
4931 {
4932 struct
4933 {
4934 unsigned SCS0 : 1;
4935 unsigned SCS1 : 1;
4936 unsigned PLLEN : 1;
4937 unsigned LOCK : 1;
4938 unsigned : 1;
4939 unsigned : 1;
4940 unsigned : 1;
4941 unsigned : 1;
4942 };
4943
4944 struct
4945 {
4946 unsigned SCS : 2;
4947 unsigned : 6;
4948 };
4949 } __OSCCONbits_t;
4950
4951 extern __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
4952
4953 #define _SCS0 0x01
4954 #define _SCS1 0x02
4955 #define _PLLEN 0x04
4956 #define _LOCK 0x08
4957
4958 //==============================================================================
4959
4960
4961 //==============================================================================
4962 // T0CON Bits
4963
4964 extern __at(0x0FD5) __sfr T0CON;
4965
4966 typedef union
4967 {
4968 struct
4969 {
4970 unsigned T0PS0 : 1;
4971 unsigned T0PS1 : 1;
4972 unsigned T0PS2 : 1;
4973 unsigned PSA : 1;
4974 unsigned T0SE : 1;
4975 unsigned T0CS : 1;
4976 unsigned T08BIT : 1;
4977 unsigned TMR0ON : 1;
4978 };
4979
4980 struct
4981 {
4982 unsigned T0PS : 3;
4983 unsigned : 5;
4984 };
4985 } __T0CONbits_t;
4986
4987 extern __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
4988
4989 #define _T0PS0 0x01
4990 #define _T0PS1 0x02
4991 #define _T0PS2 0x04
4992 #define _PSA 0x08
4993 #define _T0SE 0x10
4994 #define _T0CS 0x20
4995 #define _T08BIT 0x40
4996 #define _TMR0ON 0x80
4997
4998 //==============================================================================
4999
5000 extern __at(0x0FD6) __sfr TMR0;
5001 extern __at(0x0FD6) __sfr TMR0L;
5002 extern __at(0x0FD7) __sfr TMR0H;
5003
5004 //==============================================================================
5005 // STATUS Bits
5006
5007 extern __at(0x0FD8) __sfr STATUS;
5008
5009 typedef struct
5010 {
5011 unsigned C : 1;
5012 unsigned DC : 1;
5013 unsigned Z : 1;
5014 unsigned OV : 1;
5015 unsigned N : 1;
5016 unsigned : 1;
5017 unsigned : 1;
5018 unsigned : 1;
5019 } __STATUSbits_t;
5020
5021 extern __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
5022
5023 #define _C 0x01
5024 #define _DC 0x02
5025 #define _Z 0x04
5026 #define _OV 0x08
5027 #define _N 0x10
5028
5029 //==============================================================================
5030
5031 extern __at(0x0FD9) __sfr FSR2L;
5032 extern __at(0x0FDA) __sfr FSR2H;
5033 extern __at(0x0FDB) __sfr PLUSW2;
5034 extern __at(0x0FDC) __sfr PREINC2;
5035 extern __at(0x0FDD) __sfr POSTDEC2;
5036 extern __at(0x0FDE) __sfr POSTINC2;
5037 extern __at(0x0FDF) __sfr INDF2;
5038 extern __at(0x0FE0) __sfr BSR;
5039 extern __at(0x0FE1) __sfr FSR1L;
5040 extern __at(0x0FE2) __sfr FSR1H;
5041 extern __at(0x0FE3) __sfr PLUSW1;
5042 extern __at(0x0FE4) __sfr PREINC1;
5043 extern __at(0x0FE5) __sfr POSTDEC1;
5044 extern __at(0x0FE6) __sfr POSTINC1;
5045 extern __at(0x0FE7) __sfr INDF1;
5046 extern __at(0x0FE8) __sfr WREG;
5047 extern __at(0x0FE9) __sfr FSR0L;
5048 extern __at(0x0FEA) __sfr FSR0H;
5049 extern __at(0x0FEB) __sfr PLUSW0;
5050 extern __at(0x0FEC) __sfr PREINC0;
5051 extern __at(0x0FED) __sfr POSTDEC0;
5052 extern __at(0x0FEE) __sfr POSTINC0;
5053 extern __at(0x0FEF) __sfr INDF0;
5054
5055 //==============================================================================
5056 // INTCON3 Bits
5057
5058 extern __at(0x0FF0) __sfr INTCON3;
5059
5060 typedef union
5061 {
5062 struct
5063 {
5064 unsigned INT1IF : 1;
5065 unsigned INT2IF : 1;
5066 unsigned INT3IF : 1;
5067 unsigned INT1IE : 1;
5068 unsigned INT2IE : 1;
5069 unsigned INT3IE : 1;
5070 unsigned INT1IP : 1;
5071 unsigned INT2IP : 1;
5072 };
5073
5074 struct
5075 {
5076 unsigned INT1F : 1;
5077 unsigned INT2F : 1;
5078 unsigned INT3F : 1;
5079 unsigned INT1E : 1;
5080 unsigned INT2E : 1;
5081 unsigned INT3E : 1;
5082 unsigned INT1P : 1;
5083 unsigned INT2P : 1;
5084 };
5085 } __INTCON3bits_t;
5086
5087 extern __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
5088
5089 #define _INT1IF 0x01
5090 #define _INT1F 0x01
5091 #define _INT2IF 0x02
5092 #define _INT2F 0x02
5093 #define _INT3IF 0x04
5094 #define _INT3F 0x04
5095 #define _INT1IE 0x08
5096 #define _INT1E 0x08
5097 #define _INT2IE 0x10
5098 #define _INT2E 0x10
5099 #define _INT3IE 0x20
5100 #define _INT3E 0x20
5101 #define _INT1IP 0x40
5102 #define _INT1P 0x40
5103 #define _INT2IP 0x80
5104 #define _INT2P 0x80
5105
5106 //==============================================================================
5107
5108
5109 //==============================================================================
5110 // INTCON2 Bits
5111
5112 extern __at(0x0FF1) __sfr INTCON2;
5113
5114 typedef union
5115 {
5116 struct
5117 {
5118 unsigned RBIP : 1;
5119 unsigned INT3IP : 1;
5120 unsigned TMR0IP : 1;
5121 unsigned INTEDG3 : 1;
5122 unsigned INTEDG2 : 1;
5123 unsigned INTEDG1 : 1;
5124 unsigned INTEDG0 : 1;
5125 unsigned NOT_RBPU : 1;
5126 };
5127
5128 struct
5129 {
5130 unsigned : 1;
5131 unsigned INT3P : 1;
5132 unsigned T0IP : 1;
5133 unsigned : 1;
5134 unsigned : 1;
5135 unsigned : 1;
5136 unsigned : 1;
5137 unsigned RBPU : 1;
5138 };
5139 } __INTCON2bits_t;
5140
5141 extern __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
5142
5143 #define _RBIP 0x01
5144 #define _INT3IP 0x02
5145 #define _INT3P 0x02
5146 #define _TMR0IP 0x04
5147 #define _T0IP 0x04
5148 #define _INTEDG3 0x08
5149 #define _INTEDG2 0x10
5150 #define _INTEDG1 0x20
5151 #define _INTEDG0 0x40
5152 #define _NOT_RBPU 0x80
5153 #define _RBPU 0x80
5154
5155 //==============================================================================
5156
5157
5158 //==============================================================================
5159 // INTCON Bits
5160
5161 extern __at(0x0FF2) __sfr INTCON;
5162
5163 typedef union
5164 {
5165 struct
5166 {
5167 unsigned RBIF : 1;
5168 unsigned INT0IF : 1;
5169 unsigned TMR0IF : 1;
5170 unsigned RBIE : 1;
5171 unsigned INT0IE : 1;
5172 unsigned TMR0IE : 1;
5173 unsigned PEIE_GIEL : 1;
5174 unsigned GIE_GIEH : 1;
5175 };
5176
5177 struct
5178 {
5179 unsigned : 1;
5180 unsigned INT0F : 1;
5181 unsigned T0IF : 1;
5182 unsigned : 1;
5183 unsigned INT0E : 1;
5184 unsigned T0IE : 1;
5185 unsigned PEIE : 1;
5186 unsigned GIE : 1;
5187 };
5188
5189 struct
5190 {
5191 unsigned : 1;
5192 unsigned : 1;
5193 unsigned : 1;
5194 unsigned : 1;
5195 unsigned : 1;
5196 unsigned : 1;
5197 unsigned GIEL : 1;
5198 unsigned GIEH : 1;
5199 };
5200 } __INTCONbits_t;
5201
5202 extern __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
5203
5204 #define _RBIF 0x01
5205 #define _INT0IF 0x02
5206 #define _INT0F 0x02
5207 #define _TMR0IF 0x04
5208 #define _T0IF 0x04
5209 #define _RBIE 0x08
5210 #define _INT0IE 0x10
5211 #define _INT0E 0x10
5212 #define _TMR0IE 0x20
5213 #define _T0IE 0x20
5214 #define _PEIE_GIEL 0x40
5215 #define _PEIE 0x40
5216 #define _GIEL 0x40
5217 #define _GIE_GIEH 0x80
5218 #define _GIE 0x80
5219 #define _GIEH 0x80
5220
5221 //==============================================================================
5222
5223 extern __at(0x0FF3) __sfr PROD;
5224 extern __at(0x0FF3) __sfr PRODL;
5225 extern __at(0x0FF4) __sfr PRODH;
5226 extern __at(0x0FF5) __sfr TABLAT;
5227 extern __at(0x0FF6) __sfr TBLPTR;
5228 extern __at(0x0FF6) __sfr TBLPTRL;
5229 extern __at(0x0FF7) __sfr TBLPTRH;
5230 extern __at(0x0FF8) __sfr TBLPTRU;
5231 extern __at(0x0FF9) __sfr PC;
5232 extern __at(0x0FF9) __sfr PCL;
5233 extern __at(0x0FFA) __sfr PCLATH;
5234 extern __at(0x0FFB) __sfr PCLATU;
5235
5236 //==============================================================================
5237 // STKPTR Bits
5238
5239 extern __at(0x0FFC) __sfr STKPTR;
5240
5241 typedef union
5242 {
5243 struct
5244 {
5245 unsigned STKPTR0 : 1;
5246 unsigned STKPTR1 : 1;
5247 unsigned STKPTR2 : 1;
5248 unsigned STKPTR3 : 1;
5249 unsigned STKPTR4 : 1;
5250 unsigned : 1;
5251 unsigned STKUNF : 1;
5252 unsigned STKFUL : 1;
5253 };
5254
5255 struct
5256 {
5257 unsigned : 1;
5258 unsigned : 1;
5259 unsigned : 1;
5260 unsigned : 1;
5261 unsigned : 1;
5262 unsigned : 1;
5263 unsigned : 1;
5264 unsigned STKOVF : 1;
5265 };
5266
5267 struct
5268 {
5269 unsigned STKPTR : 5;
5270 unsigned : 3;
5271 };
5272 } __STKPTRbits_t;
5273
5274 extern __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
5275
5276 #define _STKPTR0 0x01
5277 #define _STKPTR1 0x02
5278 #define _STKPTR2 0x04
5279 #define _STKPTR3 0x08
5280 #define _STKPTR4 0x10
5281 #define _STKUNF 0x40
5282 #define _STKFUL 0x80
5283 #define _STKOVF 0x80
5284
5285 //==============================================================================
5286
5287 extern __at(0x0FFD) __sfr TOS;
5288 extern __at(0x0FFD) __sfr TOSL;
5289 extern __at(0x0FFE) __sfr TOSH;
5290 extern __at(0x0FFF) __sfr TOSU;
5291
5292 //==============================================================================
5293 //
5294 // Configuration Bits
5295 //
5296 //==============================================================================
5297
5298 #define __CONFIG1H 0x300001
5299 #define __CONFIG2L 0x300002
5300 #define __CONFIG2H 0x300003
5301 #define __CONFIG3L 0x300004
5302 #define __CONFIG3H 0x300005
5303 #define __CONFIG4L 0x300006
5304 #define __CONFIG5L 0x300008
5305 #define __CONFIG5H 0x300009
5306 #define __CONFIG6L 0x30000A
5307 #define __CONFIG6H 0x30000B
5308 #define __CONFIG7L 0x30000C
5309 #define __CONFIG7H 0x30000D
5310
5311 //----------------------------- CONFIG1H Options -------------------------------
5312
5313 #define _OSC_LP_1H 0xF0 // LP oscillator.
5314 #define _OSC_XT_1H 0xF1 // XT oscillator.
5315 #define _OSC_HS_1H 0xF2 // HS oscillator.
5316 #define _OSC_RC_1H 0xF3 // RC oscillator with OSC2 configured as divide by 4 clock output.
5317 #define _OSC_EC_1H 0xF4 // EC oscillator with OSC2 configured as divide by 4 clock output.
5318 #define _OSC_ECIO_1H 0xF5 // EC oscillator with OSC2 configured as RA6.
5319 #define _OSC_HSPLL_1H 0xF6 // HS oscillator with HW enabled 4x PLL.
5320 #define _OSC_RCIO_1H 0xF7 // RC oscillator with OSC2 configured as RA6.
5321 #define _OSC_ECIOPLL_1H 0xFC // EC oscillator with OSC2 configured as RA6 and HW enabled 4x PLL.
5322 #define _OSC_ECIOSWPLL_1H 0xFD // EC oscillator with OSC2 configured as RA6 and SW enabled 4x PLL.
5323 #define _OSC_HSSWPLL_1H 0xFE // HS oscillator with SW enabled 4x PLL.
5324 #define _OSCS_ON_1H 0xDF // Timer1 oscillator system clock switch option is enabled (oscillator switching is enabled).
5325 #define _OSCS_OFF_1H 0xFF // Oscillator system clock switch option is disabled (main oscillator is source).
5326
5327 //----------------------------- CONFIG2L Options -------------------------------
5328
5329 #define _PWRT_ON_2L 0xFE // PWRT enabled.
5330 #define _PWRT_OFF_2L 0xFF // PWRT disabled.
5331 #define _BOR_OFF_2L 0xFD // Brown-out Reset disabled.
5332 #define _BOR_ON_2L 0xFF // Brown-out Reset enabled.
5333 #define _BORV_45_2L 0xF3 // VBOR set to 4.5V.
5334 #define _BORV_42_2L 0xF7 // VBOR set to 4.2V.
5335 #define _BORV_27_2L 0xFB // VBOR set to 2.7V.
5336 #define _BORV_20_2L 0xFF // VBOR set to 2.0V.
5337
5338 //----------------------------- CONFIG2H Options -------------------------------
5339
5340 #define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit).
5341 #define _WDT_ON_2H 0xFF // WDT enabled.
5342 #define _WDTPS_1_2H 0xE1 // 1:1.
5343 #define _WDTPS_2_2H 0xE3 // 1:2.
5344 #define _WDTPS_4_2H 0xE5 // 1:4.
5345 #define _WDTPS_8_2H 0xE7 // 1:8.
5346 #define _WDTPS_16_2H 0xE9 // 1:16.
5347 #define _WDTPS_32_2H 0xEB // 1:32.
5348 #define _WDTPS_64_2H 0xED // 1:64.
5349 #define _WDTPS_128_2H 0xEF // 1:128.
5350 #define _WDTPS_256_2H 0xF1 // 1:256.
5351 #define _WDTPS_512_2H 0xF3 // 1:512.
5352 #define _WDTPS_1024_2H 0xF5 // 1:1024.
5353 #define _WDTPS_2048_2H 0xF7 // 1:2048.
5354 #define _WDTPS_4096_2H 0xF9 // 1:4096.
5355 #define _WDTPS_8192_2H 0xFB // 1:8192.
5356 #define _WDTPS_16384_2H 0xFD // 1:16384.
5357 #define _WDTPS_32768_2H 0xFF // 1:32768.
5358
5359 //----------------------------- CONFIG3L Options -------------------------------
5360
5361 #define _MODE_EM_3L 0xFC // Extended Microcontroller mode.
5362 #define _MODE_MPB_3L 0xFD // Microprocessor with Boot Block mode.
5363 #define _MODE_MP_3L 0xFE // Microprocessor mode.
5364 #define _MODE_MC_3L 0xFF // Microcontroller mode.
5365 #define _WAIT_ON_3L 0x7F // Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits (MEMCOM<5:4>).
5366 #define _WAIT_OFF_3L 0xFF // Wait selections unavailable for table reads and table writes.
5367
5368 //----------------------------- CONFIG3H Options -------------------------------
5369
5370 #define _CCP2MX_PORTBE_3H 0xFE // Multiplexed with RB3 or RE7.
5371 #define _CCP2MX_PORTC_3H 0xFF // Multiplexed with RC1.
5372 #define _ECCPMX_PORTH_3H 0xFD // ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RH7 through RH4.
5373 #define _ECCPMX_PORTE_3H 0xFF // ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RE6 through RE3.
5374 #define _MCLRE_OFF_3H 0x7F // RG5 input enabled, MCLR disabled.
5375 #define _MCLRE_ON_3H 0xFF // MCLR pin enabled, RG5 input pin disabled.
5376
5377 //----------------------------- CONFIG4L Options -------------------------------
5378
5379 #define _STVR_OFF_4L 0xFE // Stack full/underflow will not cause Reset.
5380 #define _STVR_ON_4L 0xFF // Stack full/underflow will cause Reset.
5381 #define _LVP_OFF_4L 0xFB // Low-Voltage ICSP disabled.
5382 #define _LVP_ON_4L 0xFF // Low-Voltage ICSP enabled.
5383 #define _DEBUG_ON_4L 0x7F // Background debugger enabled. RB6 and RB7 are dedicated to in-circuit debug.
5384 #define _DEBUG_OFF_4L 0xFF // Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
5385
5386 //----------------------------- CONFIG5L Options -------------------------------
5387
5388 #define _CP0_ON_5L 0xFE // Block 0 (000800-003FFFh) code-protected.
5389 #define _CP0_OFF_5L 0xFF // Block 0 (000800-003FFFh) not code-protected.
5390 #define _CP1_ON_5L 0xFD // Block 1 (004000-007FFFh) code-protected.
5391 #define _CP1_OFF_5L 0xFF // Block 1 (004000-007FFFh) not code-protected.
5392 #define _CP2_ON_5L 0xFB // Block 2 (008000-00BFFFh) code-protected.
5393 #define _CP2_OFF_5L 0xFF // Block 2 (008000-00BFFFh) not code-protected.
5394
5395 //----------------------------- CONFIG5H Options -------------------------------
5396
5397 #define _CPB_ON_5H 0xBF // Boot block (000000-0007FFh) code-protected.
5398 #define _CPB_OFF_5H 0xFF // Boot block (000000-0007FFh) not code-protected.
5399 #define _CPD_ON_5H 0x7F // Data EEPROM code-protected.
5400 #define _CPD_OFF_5H 0xFF // Data EEPROM not code-protected.
5401
5402 //----------------------------- CONFIG6L Options -------------------------------
5403
5404 #define _WRT0_ON_6L 0xFE // Block 0 (000800-003FFFh) write-protected.
5405 #define _WRT0_OFF_6L 0xFF // Block 0 (000800-003FFFh) not write-protected.
5406 #define _WRT1_ON_6L 0xFD // Block 1 (004000-007FFFh) write-protected.
5407 #define _WRT1_OFF_6L 0xFF // Block 1 (004000-007FFFh) not write-protected.
5408 #define _WRT2_ON_6L 0xFB // Block 2 (008000-00BFFFh) write-protected.
5409 #define _WRT2_OFF_6L 0xFF // Block 2 (008000-00BFFFh) not write-protected.
5410
5411 //----------------------------- CONFIG6H Options -------------------------------
5412
5413 #define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write-protected.
5414 #define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write-protected.
5415 #define _WRTB_ON_6H 0xBF // Boot block (000000-0007FFh) write-protected.
5416 #define _WRTB_OFF_6H 0xFF // Boot block (000000-0007FFh) not write-protected.
5417 #define _WRTD_ON_6H 0x7F // Data EEPROM write-protected.
5418 #define _WRTD_OFF_6H 0xFF // Data EEPROM not write-protected.
5419
5420 //----------------------------- CONFIG7L Options -------------------------------
5421
5422 #define _EBTR0_ON_7L 0xFE // Block 0 (000800-003FFFh) protected from table reads executed in other blocks.
5423 #define _EBTR0_OFF_7L 0xFF // Block 0 (000800-003FFFh) not protected from table reads executed in other blocks.
5424 #define _EBTR1_ON_7L 0xFD // Block 1 (004000-007FFFh) protected from table reads executed in other blocks.
5425 #define _EBTR1_OFF_7L 0xFF // Block 1 (004000-007FFFh) not protected from table reads executed in other blocks.
5426 #define _EBTR2_ON_7L 0xFB // Block 2 (008000-00BFFFh) protected from table reads executed in other blocks.
5427 #define _EBTR2_OFF_7L 0xFF // Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks.
5428
5429 //----------------------------- CONFIG7H Options -------------------------------
5430
5431 #define _EBTRB_ON_7H 0xBF // Boot block (000000-0007FFh) protected from table reads executed in other blocks.
5432 #define _EBTRB_OFF_7H 0xFF // Boot block (000000-0007FFh) not protected from table reads executed in other blocks.
5433
5434 //==============================================================================
5435
5436 #define __DEVID1 0x3FFFFE
5437 #define __DEVID2 0x3FFFFF
5438
5439 #define __IDLOC0 0x200000
5440 #define __IDLOC1 0x200001
5441 #define __IDLOC2 0x200002
5442 #define __IDLOC3 0x200003
5443 #define __IDLOC4 0x200004
5444 #define __IDLOC5 0x200005
5445 #define __IDLOC6 0x200006
5446 #define __IDLOC7 0x200007
5447
5448 #endif // #ifndef __PIC18F8525_H__
SDCC git mirror