sdcc/device/non-free/lib/pic14/libdev/pic12lf1552.c

   1 /*
   2  * This definitions of the PIC12LF1552 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:07 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic12lf1552.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF0;
  30
  31 __at(0x0001) __sfr INDF1;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR0;
  39
  40 __at(0x0004) __sfr FSR0L;
  41
  42 __at(0x0005) __sfr FSR0H;
  43
  44 __at(0x0006) __sfr FSR1;
  45
  46 __at(0x0006) __sfr FSR1L;
  47
  48 __at(0x0007) __sfr FSR1H;
  49
  50 __at(0x0008) __sfr BSR;
  51 __at(0x0008) volatile __BSRbits_t BSRbits;
  52
  53 __at(0x0009) __sfr WREG;
  54
  55 __at(0x000A) __sfr PCLATH;
  56
  57 __at(0x000B) __sfr INTCON;
  58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  59
  60 __at(0x000C) __sfr PORTA;
  61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
  62
  63 __at(0x0011) __sfr PIR1;
  64 __at(0x0011) volatile __PIR1bits_t PIR1bits;
  65
  66 __at(0x0012) __sfr PIR2;
  67 __at(0x0012) volatile __PIR2bits_t PIR2bits;
  68
  69 __at(0x0015) __sfr TMR0;
  70
  71 __at(0x008C) __sfr TRISA;
  72 __at(0x008C) volatile __TRISAbits_t TRISAbits;
  73
  74 __at(0x0091) __sfr PIE1;
  75 __at(0x0091) volatile __PIE1bits_t PIE1bits;
  76
  77 __at(0x0092) __sfr PIE2;
  78 __at(0x0092) volatile __PIE2bits_t PIE2bits;
  79
  80 __at(0x0095) __sfr OPTION_REG;
  81 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
  82
  83 __at(0x0096) __sfr PCON;
  84 __at(0x0096) volatile __PCONbits_t PCONbits;
  85
  86 __at(0x0097) __sfr WDTCON;
  87 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
  88
  89 __at(0x0099) __sfr OSCCON;
  90 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
  91
  92 __at(0x009A) __sfr OSCSTAT;
  93 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
  94
  95 __at(0x009B) __sfr ADRES;
  96
  97 __at(0x009B) __sfr ADRESL;
  98
  99 __at(0x009C) __sfr ADRESH;
 100
 101 __at(0x009D) __sfr ADCON0;
 102 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
 103
 104 __at(0x009E) __sfr ADCON1;
 105 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
 106
 107 __at(0x009F) __sfr ADCON2;
 108 __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
 109
 110 __at(0x010C) __sfr LATA;
 111 __at(0x010C) volatile __LATAbits_t LATAbits;
 112
 113 __at(0x0116) __sfr BORCON;
 114 __at(0x0116) volatile __BORCONbits_t BORCONbits;
 115
 116 __at(0x0117) __sfr FVRCON;
 117 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
 118
 119 __at(0x011D) __sfr APFCON;
 120 __at(0x011D) volatile __APFCONbits_t APFCONbits;
 121
 122 __at(0x011D) __sfr APFCON0;
 123 __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
 124
 125 __at(0x018C) __sfr ANSELA;
 126 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
 127
 128 __at(0x0191) __sfr PMADR;
 129
 130 __at(0x0191) __sfr PMADRL;
 131
 132 __at(0x0192) __sfr PMADRH;
 133
 134 __at(0x0193) __sfr PMDAT;
 135
 136 __at(0x0193) __sfr PMDATL;
 137
 138 __at(0x0194) __sfr PMDATH;
 139
 140 __at(0x0195) __sfr PMCON1;
 141 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
 142
 143 __at(0x0196) __sfr PMCON2;
 144
 145 __at(0x020C) __sfr WPUA;
 146 __at(0x020C) volatile __WPUAbits_t WPUAbits;
 147
 148 __at(0x0211) __sfr SSP1BUF;
 149
 150 __at(0x0211) __sfr SSPBUF;
 151
 152 __at(0x0212) __sfr SSP1ADD;
 153
 154 __at(0x0212) __sfr SSPADD;
 155
 156 __at(0x0213) __sfr SSP1MSK;
 157
 158 __at(0x0213) __sfr SSPMSK;
 159
 160 __at(0x0214) __sfr SSP1STAT;
 161 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
 162
 163 __at(0x0214) __sfr SSPSTAT;
 164 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
 165
 166 __at(0x0215) __sfr SSP1CON1;
 167 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
 168
 169 __at(0x0215) __sfr SSPCON;
 170 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
 171
 172 __at(0x0215) __sfr SSPCON1;
 173 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
 174
 175 __at(0x0216) __sfr SSP1CON2;
 176 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
 177
 178 __at(0x0216) __sfr SSPCON2;
 179 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
 180
 181 __at(0x0217) __sfr SSP1CON3;
 182 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
 183
 184 __at(0x0217) __sfr SSPCON3;
 185 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
 186
 187 __at(0x0391) __sfr IOCAP;
 188 __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
 189
 190 __at(0x0392) __sfr IOCAN;
 191 __at(0x0392) volatile __IOCANbits_t IOCANbits;
 192
 193 __at(0x0393) __sfr IOCAF;
 194 __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
 195
 196 __at(0x0711) __sfr AADCON0;
 197 __at(0x0711) volatile __AADCON0bits_t AADCON0bits;
 198
 199 __at(0x0712) __sfr AADCON1;
 200 __at(0x0712) volatile __AADCON1bits_t AADCON1bits;
 201
 202 __at(0x0713) __sfr AADCON2;
 203 __at(0x0713) volatile __AADCON2bits_t AADCON2bits;
 204
 205 __at(0x0714) __sfr AADCON3;
 206 __at(0x0714) volatile __AADCON3bits_t AADCON3bits;
 207
 208 __at(0x0715) __sfr AADSTAT;
 209 __at(0x0715) volatile __AADSTATbits_t AADSTATbits;
 210
 211 __at(0x0716) __sfr AADPRE;
 212 __at(0x0716) volatile __AADPREbits_t AADPREbits;
 213
 214 __at(0x0717) __sfr AADACQ;
 215 __at(0x0717) volatile __AADACQbits_t AADACQbits;
 216
 217 __at(0x0718) __sfr AADGRD;
 218 __at(0x0718) volatile __AADGRDbits_t AADGRDbits;
 219
 220 __at(0x0719) __sfr AADCAP;
 221 __at(0x0719) volatile __AADCAPbits_t AADCAPbits;
 222
 223 __at(0x071A) __sfr AADRES0;
 224
 225 __at(0x071A) __sfr AADRES0L;
 226
 227 __at(0x071A) __sfr AD1RES0;
 228
 229 __at(0x071A) __sfr ADRES0;
 230
 231 __at(0x071B) __sfr AADRES0H;
 232
 233 __at(0x071C) __sfr AADRES1;
 234
 235 __at(0x071C) __sfr AADRES1L;
 236
 237 __at(0x071C) __sfr AD1RES1;
 238
 239 __at(0x071C) __sfr ADRES1;
 240
 241 __at(0x071D) __sfr AADRES1H;
 242
 243 __at(0x0FE4) __sfr STATUS_SHAD;
 244 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
 245
 246 __at(0x0FE5) __sfr WREG_SHAD;
 247
 248 __at(0x0FE6) __sfr BSR_SHAD;
 249
 250 __at(0x0FE7) __sfr PCLATH_SHAD;
 251
 252 __at(0x0FE8) __sfr FSR0L_SHAD;
 253
 254 __at(0x0FE9) __sfr FSR0H_SHAD;
 255
 256 __at(0x0FEA) __sfr FSR1L_SHAD;
 257
 258 __at(0x0FEB) __sfr FSR1H_SHAD;
 259
 260 __at(0x0FED) __sfr STKPTR;
 261
 262 __at(0x0FEE) __sfr TOSL;
 263
 264 __at(0x0FEF) __sfr TOSH;