sdcc/device/non-free/lib/pic14/libdev/pic12lf1571.c

   1 /*
   2  * This definitions of the PIC12LF1571 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic12lf1571.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF0;
  30
  31 __at(0x0001) __sfr INDF1;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR0;
  39
  40 __at(0x0004) __sfr FSR0L;
  41
  42 __at(0x0005) __sfr FSR0H;
  43
  44 __at(0x0006) __sfr FSR1;
  45
  46 __at(0x0006) __sfr FSR1L;
  47
  48 __at(0x0007) __sfr FSR1H;
  49
  50 __at(0x0008) __sfr BSR;
  51 __at(0x0008) volatile __BSRbits_t BSRbits;
  52
  53 __at(0x0009) __sfr WREG;
  54
  55 __at(0x000A) __sfr PCLATH;
  56
  57 __at(0x000B) __sfr INTCON;
  58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  59
  60 __at(0x000C) __sfr PORTA;
  61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
  62
  63 __at(0x0011) __sfr PIR1;
  64 __at(0x0011) volatile __PIR1bits_t PIR1bits;
  65
  66 __at(0x0012) __sfr PIR2;
  67 __at(0x0012) volatile __PIR2bits_t PIR2bits;
  68
  69 __at(0x0013) __sfr PIR3;
  70 __at(0x0013) volatile __PIR3bits_t PIR3bits;
  71
  72 __at(0x0015) __sfr TMR0;
  73
  74 __at(0x0016) __sfr TMR1;
  75
  76 __at(0x0016) __sfr TMR1L;
  77
  78 __at(0x0017) __sfr TMR1H;
  79
  80 __at(0x0018) __sfr T1CON;
  81 __at(0x0018) volatile __T1CONbits_t T1CONbits;
  82
  83 __at(0x0019) __sfr T1GCON;
  84 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
  85
  86 __at(0x001A) __sfr TMR2;
  87
  88 __at(0x001B) __sfr PR2;
  89
  90 __at(0x001C) __sfr T2CON;
  91 __at(0x001C) volatile __T2CONbits_t T2CONbits;
  92
  93 __at(0x008C) __sfr TRISA;
  94 __at(0x008C) volatile __TRISAbits_t TRISAbits;
  95
  96 __at(0x0091) __sfr PIE1;
  97 __at(0x0091) volatile __PIE1bits_t PIE1bits;
  98
  99 __at(0x0092) __sfr PIE2;
 100 __at(0x0092) volatile __PIE2bits_t PIE2bits;
 101
 102 __at(0x0093) __sfr PIE3;
 103 __at(0x0093) volatile __PIE3bits_t PIE3bits;
 104
 105 __at(0x0095) __sfr OPTION_REG;
 106 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
 107
 108 __at(0x0096) __sfr PCON;
 109 __at(0x0096) volatile __PCONbits_t PCONbits;
 110
 111 __at(0x0097) __sfr WDTCON;
 112 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
 113
 114 __at(0x0098) __sfr OSCTUNE;
 115 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
 116
 117 __at(0x0099) __sfr OSCCON;
 118 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
 119
 120 __at(0x009A) __sfr OSCSTAT;
 121 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
 122
 123 __at(0x009B) __sfr ADRES;
 124
 125 __at(0x009B) __sfr ADRESL;
 126
 127 __at(0x009C) __sfr ADRESH;
 128
 129 __at(0x009D) __sfr ADCON0;
 130 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
 131
 132 __at(0x009E) __sfr ADCON1;
 133 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
 134
 135 __at(0x009F) __sfr ADCON2;
 136 __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
 137
 138 __at(0x010C) __sfr LATA;
 139 __at(0x010C) volatile __LATAbits_t LATAbits;
 140
 141 __at(0x0111) __sfr CM1CON0;
 142 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
 143
 144 __at(0x0112) __sfr CM1CON1;
 145 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
 146
 147 __at(0x0115) __sfr CMOUT;
 148 __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
 149
 150 __at(0x0116) __sfr BORCON;
 151 __at(0x0116) volatile __BORCONbits_t BORCONbits;
 152
 153 __at(0x0117) __sfr FVRCON;
 154 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
 155
 156 __at(0x0118) __sfr DACCON0;
 157 __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
 158
 159 __at(0x0119) __sfr DACCON1;
 160 __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
 161
 162 __at(0x011D) __sfr APFCON;
 163 __at(0x011D) volatile __APFCONbits_t APFCONbits;
 164
 165 __at(0x011D) __sfr APFCON0;
 166 __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
 167
 168 __at(0x018C) __sfr ANSELA;
 169 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
 170
 171 __at(0x0191) __sfr PMADR;
 172
 173 __at(0x0191) __sfr PMADRL;
 174
 175 __at(0x0192) __sfr PMADRH;
 176
 177 __at(0x0193) __sfr PMDAT;
 178
 179 __at(0x0193) __sfr PMDATL;
 180
 181 __at(0x0194) __sfr PMDATH;
 182
 183 __at(0x0195) __sfr PMCON1;
 184 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
 185
 186 __at(0x0196) __sfr PMCON2;
 187
 188 __at(0x020C) __sfr WPUA;
 189 __at(0x020C) volatile __WPUAbits_t WPUAbits;
 190
 191 __at(0x028C) __sfr ODCONA;
 192 __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
 193
 194 __at(0x030C) __sfr SLRCONA;
 195 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
 196
 197 __at(0x038C) __sfr INLVLA;
 198 __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
 199
 200 __at(0x0391) __sfr IOCAP;
 201 __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
 202
 203 __at(0x0392) __sfr IOCAN;
 204 __at(0x0392) volatile __IOCANbits_t IOCANbits;
 205
 206 __at(0x0393) __sfr IOCAF;
 207 __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
 208
 209 __at(0x0691) __sfr CWG1DBR;
 210 __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
 211
 212 __at(0x0692) __sfr CWG1DBF;
 213 __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
 214
 215 __at(0x0693) __sfr CWG1CON0;
 216 __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
 217
 218 __at(0x0694) __sfr CWG1CON1;
 219 __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
 220
 221 __at(0x0695) __sfr CWG1CON2;
 222 __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
 223
 224 __at(0x0D8E) __sfr PWMEN;
 225 __at(0x0D8E) volatile __PWMENbits_t PWMENbits;
 226
 227 __at(0x0D8F) __sfr PWMLD;
 228 __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits;
 229
 230 __at(0x0D90) __sfr PWMOUT;
 231 __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits;
 232
 233 __at(0x0D91) __sfr PWM1PH;
 234
 235 __at(0x0D91) __sfr PWM1PHL;
 236 __at(0x0D91) volatile __PWM1PHLbits_t PWM1PHLbits;
 237
 238 __at(0x0D92) __sfr PWM1PHH;
 239 __at(0x0D92) volatile __PWM1PHHbits_t PWM1PHHbits;
 240
 241 __at(0x0D93) __sfr PWM1DC;
 242
 243 __at(0x0D93) __sfr PWM1DCL;
 244 __at(0x0D93) volatile __PWM1DCLbits_t PWM1DCLbits;
 245
 246 __at(0x0D94) __sfr PWM1DCH;
 247 __at(0x0D94) volatile __PWM1DCHbits_t PWM1DCHbits;
 248
 249 __at(0x0D95) __sfr PWM1PR;
 250
 251 __at(0x0D95) __sfr PWM1PRL;
 252 __at(0x0D95) volatile __PWM1PRLbits_t PWM1PRLbits;
 253
 254 __at(0x0D96) __sfr PWM1PRH;
 255 __at(0x0D96) volatile __PWM1PRHbits_t PWM1PRHbits;
 256
 257 __at(0x0D97) __sfr PWM1OF;
 258
 259 __at(0x0D97) __sfr PWM1OFL;
 260 __at(0x0D97) volatile __PWM1OFLbits_t PWM1OFLbits;
 261
 262 __at(0x0D98) __sfr PWM1OFH;
 263 __at(0x0D98) volatile __PWM1OFHbits_t PWM1OFHbits;
 264
 265 __at(0x0D99) __sfr PWM1TMR;
 266
 267 __at(0x0D99) __sfr PWM1TMRL;
 268 __at(0x0D99) volatile __PWM1TMRLbits_t PWM1TMRLbits;
 269
 270 __at(0x0D9A) __sfr PWM1TMRH;
 271 __at(0x0D9A) volatile __PWM1TMRHbits_t PWM1TMRHbits;
 272
 273 __at(0x0D9B) __sfr PWM1CON;
 274 __at(0x0D9B) volatile __PWM1CONbits_t PWM1CONbits;
 275
 276 __at(0x0D9C) __sfr PWM1INTCON;
 277 __at(0x0D9C) volatile __PWM1INTCONbits_t PWM1INTCONbits;
 278
 279 __at(0x0D9C) __sfr PWM1INTE;
 280 __at(0x0D9C) volatile __PWM1INTEbits_t PWM1INTEbits;
 281
 282 __at(0x0D9D) __sfr PWM1INTF;
 283 __at(0x0D9D) volatile __PWM1INTFbits_t PWM1INTFbits;
 284
 285 __at(0x0D9D) __sfr PWM1INTFLG;
 286 __at(0x0D9D) volatile __PWM1INTFLGbits_t PWM1INTFLGbits;
 287
 288 __at(0x0D9E) __sfr PWM1CLKCON;
 289 __at(0x0D9E) volatile __PWM1CLKCONbits_t PWM1CLKCONbits;
 290
 291 __at(0x0D9F) __sfr PWM1LDCON;
 292 __at(0x0D9F) volatile __PWM1LDCONbits_t PWM1LDCONbits;
 293
 294 __at(0x0DA0) __sfr PWM1OFCON;
 295 __at(0x0DA0) volatile __PWM1OFCONbits_t PWM1OFCONbits;
 296
 297 __at(0x0DA1) __sfr PWM2PH;
 298
 299 __at(0x0DA1) __sfr PWM2PHL;
 300 __at(0x0DA1) volatile __PWM2PHLbits_t PWM2PHLbits;
 301
 302 __at(0x0DA2) __sfr PWM2PHH;
 303 __at(0x0DA2) volatile __PWM2PHHbits_t PWM2PHHbits;
 304
 305 __at(0x0DA3) __sfr PWM2DC;
 306
 307 __at(0x0DA3) __sfr PWM2DCL;
 308 __at(0x0DA3) volatile __PWM2DCLbits_t PWM2DCLbits;
 309
 310 __at(0x0DA4) __sfr PWM2DCH;
 311 __at(0x0DA4) volatile __PWM2DCHbits_t PWM2DCHbits;
 312
 313 __at(0x0DA5) __sfr PWM2PR;
 314
 315 __at(0x0DA5) __sfr PWM2PRL;
 316 __at(0x0DA5) volatile __PWM2PRLbits_t PWM2PRLbits;
 317
 318 __at(0x0DA6) __sfr PWM2PRH;
 319 __at(0x0DA6) volatile __PWM2PRHbits_t PWM2PRHbits;
 320
 321 __at(0x0DA7) __sfr PWM2OF;
 322
 323 __at(0x0DA7) __sfr PWM2OFL;
 324 __at(0x0DA7) volatile __PWM2OFLbits_t PWM2OFLbits;
 325
 326 __at(0x0DA8) __sfr PWM2OFH;
 327 __at(0x0DA8) volatile __PWM2OFHbits_t PWM2OFHbits;
 328
 329 __at(0x0DA9) __sfr PWM2TMR;
 330
 331 __at(0x0DA9) __sfr PWM2TMRL;
 332 __at(0x0DA9) volatile __PWM2TMRLbits_t PWM2TMRLbits;
 333
 334 __at(0x0DAA) __sfr PWM2TMRH;
 335 __at(0x0DAA) volatile __PWM2TMRHbits_t PWM2TMRHbits;
 336
 337 __at(0x0DAB) __sfr PWM2CON;
 338 __at(0x0DAB) volatile __PWM2CONbits_t PWM2CONbits;
 339
 340 __at(0x0DAC) __sfr PWM2INTCON;
 341 __at(0x0DAC) volatile __PWM2INTCONbits_t PWM2INTCONbits;
 342
 343 __at(0x0DAC) __sfr PWM2INTE;
 344 __at(0x0DAC) volatile __PWM2INTEbits_t PWM2INTEbits;
 345
 346 __at(0x0DAD) __sfr PWM2INTF;
 347 __at(0x0DAD) volatile __PWM2INTFbits_t PWM2INTFbits;
 348
 349 __at(0x0DAD) __sfr PWM2INTFLG;
 350 __at(0x0DAD) volatile __PWM2INTFLGbits_t PWM2INTFLGbits;
 351
 352 __at(0x0DAE) __sfr PWM2CLKCON;
 353 __at(0x0DAE) volatile __PWM2CLKCONbits_t PWM2CLKCONbits;
 354
 355 __at(0x0DAF) __sfr PWM2LDCON;
 356 __at(0x0DAF) volatile __PWM2LDCONbits_t PWM2LDCONbits;
 357
 358 __at(0x0DB0) __sfr PWM2OFCON;
 359 __at(0x0DB0) volatile __PWM2OFCONbits_t PWM2OFCONbits;
 360
 361 __at(0x0DB1) __sfr PWM3PH;
 362
 363 __at(0x0DB1) __sfr PWM3PHL;
 364 __at(0x0DB1) volatile __PWM3PHLbits_t PWM3PHLbits;
 365
 366 __at(0x0DB2) __sfr PWM3PHH;
 367 __at(0x0DB2) volatile __PWM3PHHbits_t PWM3PHHbits;
 368
 369 __at(0x0DB3) __sfr PWM3DC;
 370
 371 __at(0x0DB3) __sfr PWM3DCL;
 372 __at(0x0DB3) volatile __PWM3DCLbits_t PWM3DCLbits;
 373
 374 __at(0x0DB4) __sfr PWM3DCH;
 375 __at(0x0DB4) volatile __PWM3DCHbits_t PWM3DCHbits;
 376
 377 __at(0x0DB5) __sfr PWM3PR;
 378
 379 __at(0x0DB5) __sfr PWM3PRL;
 380 __at(0x0DB5) volatile __PWM3PRLbits_t PWM3PRLbits;
 381
 382 __at(0x0DB6) __sfr PWM3PRH;
 383 __at(0x0DB6) volatile __PWM3PRHbits_t PWM3PRHbits;
 384
 385 __at(0x0DB7) __sfr PWM3OF;
 386
 387 __at(0x0DB7) __sfr PWM3OFL;
 388 __at(0x0DB7) volatile __PWM3OFLbits_t PWM3OFLbits;
 389
 390 __at(0x0DB8) __sfr PWM3OFH;
 391 __at(0x0DB8) volatile __PWM3OFHbits_t PWM3OFHbits;
 392
 393 __at(0x0DB9) __sfr PWM3TMR;
 394
 395 __at(0x0DB9) __sfr PWM3TMRL;
 396 __at(0x0DB9) volatile __PWM3TMRLbits_t PWM3TMRLbits;
 397
 398 __at(0x0DBA) __sfr PWM3TMRH;
 399 __at(0x0DBA) volatile __PWM3TMRHbits_t PWM3TMRHbits;
 400
 401 __at(0x0DBB) __sfr PWM3CON;
 402 __at(0x0DBB) volatile __PWM3CONbits_t PWM3CONbits;
 403
 404 __at(0x0DBC) __sfr PWM3INTCON;
 405 __at(0x0DBC) volatile __PWM3INTCONbits_t PWM3INTCONbits;
 406
 407 __at(0x0DBC) __sfr PWM3INTE;
 408 __at(0x0DBC) volatile __PWM3INTEbits_t PWM3INTEbits;
 409
 410 __at(0x0DBD) __sfr PWM3INTF;
 411 __at(0x0DBD) volatile __PWM3INTFbits_t PWM3INTFbits;
 412
 413 __at(0x0DBD) __sfr PWM3INTFLG;
 414 __at(0x0DBD) volatile __PWM3INTFLGbits_t PWM3INTFLGbits;
 415
 416 __at(0x0DBE) __sfr PWM3CLKCON;
 417 __at(0x0DBE) volatile __PWM3CLKCONbits_t PWM3CLKCONbits;
 418
 419 __at(0x0DBF) __sfr PWM3LDCON;
 420 __at(0x0DBF) volatile __PWM3LDCONbits_t PWM3LDCONbits;
 421
 422 __at(0x0DC0) __sfr PWM3OFCON;
 423 __at(0x0DC0) volatile __PWM3OFCONbits_t PWM3OFCONbits;
 424
 425 __at(0x0FE4) __sfr STATUS_SHAD;
 426 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
 427
 428 __at(0x0FE5) __sfr WREG_SHAD;
 429
 430 __at(0x0FE6) __sfr BSR_SHAD;
 431
 432 __at(0x0FE7) __sfr PCLATH_SHAD;
 433
 434 __at(0x0FE8) __sfr FSR0L_SHAD;
 435
 436 __at(0x0FE8) __sfr FSR0_SHAD;
 437
 438 __at(0x0FE9) __sfr FSR0H_SHAD;
 439
 440 __at(0x0FEA) __sfr FSR1L_SHAD;
 441
 442 __at(0x0FEA) __sfr FSR1_SHAD;
 443
 444 __at(0x0FEB) __sfr FSR1H_SHAD;
 445
 446 __at(0x0FED) __sfr STKPTR;
 447
 448 __at(0x0FEE) __sfr TOS;
 449
 450 __at(0x0FEE) __sfr TOSL;
 451
 452 __at(0x0FEF) __sfr TOSH;