sdcc/device/non-free/lib/pic14/libdev/pic16f1512.c

   1 /*
   2  * This definitions of the PIC16F1512 MCU.
   3  *
   4  * This file is part of the GNU PIC library for SDCC, originally
   5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
   6  *
   7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:06 UTC.
   8  *
   9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
  10  * this license covers the code to the compiler and other executables,
  11  * but explicitly does not cover any code or objects generated by sdcc.
  12  *
  13  * For pic device libraries and header files which are derived from
  14  * Microchip header (.inc) and linker script (.lkr) files Microchip
  15  * requires that "The header files should state that they are only to be
  16  * used with authentic Microchip devices" which makes them incompatible
  17  * with the GPL. Pic device libraries and header files are located at
  18  * non-free/lib and non-free/include directories respectively.
  19  * Sdcc should be run with the --use-non-free command line option in
  20  * order to include non-free header files and libraries.
  21  *
  22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
  23  */
  24
  25 #include <pic16f1512.h>
  26
  27 //==============================================================================
  28
  29 __at(0x0000) __sfr INDF0;
  30
  31 __at(0x0001) __sfr INDF1;
  32
  33 __at(0x0002) __sfr PCL;
  34
  35 __at(0x0003) __sfr STATUS;
  36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
  37
  38 __at(0x0004) __sfr FSR0;
  39
  40 __at(0x0004) __sfr FSR0L;
  41
  42 __at(0x0005) __sfr FSR0H;
  43
  44 __at(0x0006) __sfr FSR1;
  45
  46 __at(0x0006) __sfr FSR1L;
  47
  48 __at(0x0007) __sfr FSR1H;
  49
  50 __at(0x0008) __sfr BSR;
  51 __at(0x0008) volatile __BSRbits_t BSRbits;
  52
  53 __at(0x0009) __sfr WREG;
  54
  55 __at(0x000A) __sfr PCLATH;
  56
  57 __at(0x000B) __sfr INTCON;
  58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
  59
  60 __at(0x000C) __sfr PORTA;
  61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
  62
  63 __at(0x000D) __sfr PORTB;
  64 __at(0x000D) volatile __PORTBbits_t PORTBbits;
  65
  66 __at(0x000E) __sfr PORTC;
  67 __at(0x000E) volatile __PORTCbits_t PORTCbits;
  68
  69 __at(0x0010) __sfr PORTE;
  70 __at(0x0010) volatile __PORTEbits_t PORTEbits;
  71
  72 __at(0x0011) __sfr PIR1;
  73 __at(0x0011) volatile __PIR1bits_t PIR1bits;
  74
  75 __at(0x0012) __sfr PIR2;
  76 __at(0x0012) volatile __PIR2bits_t PIR2bits;
  77
  78 __at(0x0015) __sfr TMR0;
  79
  80 __at(0x0016) __sfr TMR1;
  81
  82 __at(0x0016) __sfr TMR1L;
  83
  84 __at(0x0017) __sfr TMR1H;
  85
  86 __at(0x0018) __sfr T1CON;
  87 __at(0x0018) volatile __T1CONbits_t T1CONbits;
  88
  89 __at(0x0019) __sfr T1GCON;
  90 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
  91
  92 __at(0x001A) __sfr TMR2;
  93
  94 __at(0x001B) __sfr PR2;
  95
  96 __at(0x001C) __sfr T2CON;
  97 __at(0x001C) volatile __T2CONbits_t T2CONbits;
  98
  99 __at(0x008C) __sfr TRISA;
 100 __at(0x008C) volatile __TRISAbits_t TRISAbits;
 101
 102 __at(0x008D) __sfr TRISB;
 103 __at(0x008D) volatile __TRISBbits_t TRISBbits;
 104
 105 __at(0x008E) __sfr TRISC;
 106 __at(0x008E) volatile __TRISCbits_t TRISCbits;
 107
 108 __at(0x0090) __sfr TRISE;
 109
 110 __at(0x0091) __sfr PIE1;
 111 __at(0x0091) volatile __PIE1bits_t PIE1bits;
 112
 113 __at(0x0092) __sfr PIE2;
 114 __at(0x0092) volatile __PIE2bits_t PIE2bits;
 115
 116 __at(0x0095) __sfr OPTION_REG;
 117 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
 118
 119 __at(0x0096) __sfr PCON;
 120 __at(0x0096) volatile __PCONbits_t PCONbits;
 121
 122 __at(0x0097) __sfr WDTCON;
 123 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
 124
 125 __at(0x0099) __sfr OSCCON;
 126 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
 127
 128 __at(0x009A) __sfr OSCSTAT;
 129 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
 130
 131 __at(0x009B) __sfr ADRES;
 132
 133 __at(0x009B) __sfr ADRES0;
 134
 135 __at(0x009B) __sfr ADRES0L;
 136
 137 __at(0x009B) __sfr ADRESL;
 138
 139 __at(0x009C) __sfr ADRES0H;
 140
 141 __at(0x009C) __sfr ADRESH;
 142
 143 __at(0x009D) __sfr ADCON0;
 144 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
 145
 146 __at(0x009E) __sfr ADCON1;
 147 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
 148
 149 __at(0x010C) __sfr LATA;
 150 __at(0x010C) volatile __LATAbits_t LATAbits;
 151
 152 __at(0x010D) __sfr LATB;
 153 __at(0x010D) volatile __LATBbits_t LATBbits;
 154
 155 __at(0x010E) __sfr LATC;
 156 __at(0x010E) volatile __LATCbits_t LATCbits;
 157
 158 __at(0x0116) __sfr BORCON;
 159 __at(0x0116) volatile __BORCONbits_t BORCONbits;
 160
 161 __at(0x0117) __sfr FVRCON;
 162 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
 163
 164 __at(0x011D) __sfr APFCON;
 165 __at(0x011D) volatile __APFCONbits_t APFCONbits;
 166
 167 __at(0x018C) __sfr ANSELA;
 168 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
 169
 170 __at(0x018D) __sfr ANSELB;
 171 __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
 172
 173 __at(0x018E) __sfr ANSELC;
 174 __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
 175
 176 __at(0x0191) __sfr PMADR;
 177
 178 __at(0x0191) __sfr PMADRL;
 179
 180 __at(0x0192) __sfr PMADRH;
 181
 182 __at(0x0193) __sfr PMDAT;
 183
 184 __at(0x0193) __sfr PMDATL;
 185
 186 __at(0x0194) __sfr PMDATH;
 187
 188 __at(0x0195) __sfr PMCON1;
 189 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
 190
 191 __at(0x0196) __sfr PMCON2;
 192
 193 __at(0x0197) __sfr VREGCON;
 194 __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
 195
 196 __at(0x0199) __sfr RCREG;
 197
 198 __at(0x019A) __sfr TXREG;
 199
 200 __at(0x019B) __sfr SP1BRG;
 201
 202 __at(0x019B) __sfr SP1BRGL;
 203
 204 __at(0x019B) __sfr SPBRG;
 205
 206 __at(0x019B) __sfr SPBRGL;
 207
 208 __at(0x019C) __sfr SP1BRGH;
 209
 210 __at(0x019C) __sfr SPBRGH;
 211
 212 __at(0x019D) __sfr RCSTA;
 213 __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
 214
 215 __at(0x019E) __sfr TXSTA;
 216 __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
 217
 218 __at(0x019F) __sfr BAUDCON;
 219 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
 220
 221 __at(0x020D) __sfr WPUB;
 222 __at(0x020D) volatile __WPUBbits_t WPUBbits;
 223
 224 __at(0x0210) __sfr WPUE;
 225 __at(0x0210) volatile __WPUEbits_t WPUEbits;
 226
 227 __at(0x0211) __sfr SSP1BUF;
 228
 229 __at(0x0211) __sfr SSPBUF;
 230
 231 __at(0x0212) __sfr SSP1ADD;
 232
 233 __at(0x0212) __sfr SSPADD;
 234
 235 __at(0x0213) __sfr SSP1MSK;
 236
 237 __at(0x0213) __sfr SSPMSK;
 238
 239 __at(0x0214) __sfr SSP1STAT;
 240 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
 241
 242 __at(0x0214) __sfr SSPSTAT;
 243 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
 244
 245 __at(0x0215) __sfr SSP1CON1;
 246 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
 247
 248 __at(0x0215) __sfr SSPCON;
 249 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
 250
 251 __at(0x0215) __sfr SSPCON1;
 252 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
 253
 254 __at(0x0216) __sfr SSP1CON2;
 255 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
 256
 257 __at(0x0216) __sfr SSPCON2;
 258 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
 259
 260 __at(0x0217) __sfr SSP1CON3;
 261 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
 262
 263 __at(0x0217) __sfr SSPCON3;
 264 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
 265
 266 __at(0x0291) __sfr CCPR1;
 267
 268 __at(0x0291) __sfr CCPR1L;
 269
 270 __at(0x0292) __sfr CCPR1H;
 271
 272 __at(0x0293) __sfr CCP1CON;
 273 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits;
 274
 275 __at(0x0298) __sfr CCPR2;
 276
 277 __at(0x0298) __sfr CCPR2L;
 278
 279 __at(0x0299) __sfr CCPR2H;
 280
 281 __at(0x029A) __sfr CCP2CON;
 282 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits;
 283
 284 __at(0x0394) __sfr IOCBP;
 285 __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
 286
 287 __at(0x0395) __sfr IOCBN;
 288 __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
 289
 290 __at(0x0396) __sfr IOCBF;
 291 __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
 292
 293 __at(0x0711) __sfr AADCON0;
 294 __at(0x0711) volatile __AADCON0bits_t AADCON0bits;
 295
 296 __at(0x0712) __sfr AADCON1;
 297 __at(0x0712) volatile __AADCON1bits_t AADCON1bits;
 298
 299 __at(0x0713) __sfr AADCON2;
 300 __at(0x0713) volatile __AADCON2bits_t AADCON2bits;
 301
 302 __at(0x0714) __sfr AADCON3;
 303 __at(0x0714) volatile __AADCON3bits_t AADCON3bits;
 304
 305 __at(0x0715) __sfr AADSTAT;
 306 __at(0x0715) volatile __AADSTATbits_t AADSTATbits;
 307
 308 __at(0x0716) __sfr AADPRE;
 309 __at(0x0716) volatile __AADPREbits_t AADPREbits;
 310
 311 __at(0x0717) __sfr AADACQ;
 312 __at(0x0717) volatile __AADACQbits_t AADACQbits;
 313
 314 __at(0x0718) __sfr AADGRD;
 315 __at(0x0718) volatile __AADGRDbits_t AADGRDbits;
 316
 317 __at(0x0719) __sfr AADCAP;
 318 __at(0x0719) volatile __AADCAPbits_t AADCAPbits;
 319
 320 __at(0x071A) __sfr AADRES0;
 321
 322 __at(0x071A) __sfr AADRES0L;
 323
 324 __at(0x071A) __sfr AD1RES0;
 325
 326 __at(0x071B) __sfr AADRES0H;
 327
 328 __at(0x071C) __sfr AADRES1;
 329
 330 __at(0x071C) __sfr AADRES1L;
 331
 332 __at(0x071C) __sfr AD1RES1;
 333
 334 __at(0x071D) __sfr AADRES1H;
 335
 336 __at(0x0FE4) __sfr STATUS_SHAD;
 337 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
 338
 339 __at(0x0FE5) __sfr WREG_SHAD;
 340
 341 __at(0x0FE6) __sfr BSR_SHAD;
 342
 343 __at(0x0FE7) __sfr PCLATH_SHAD;
 344
 345 __at(0x0FE8) __sfr FSR0L_SHAD;
 346
 347 __at(0x0FE9) __sfr FSR0H_SHAD;
 348
 349 __at(0x0FEA) __sfr FSR1L_SHAD;
 350
 351 __at(0x0FEB) __sfr FSR1H_SHAD;
 352
 353 __at(0x0FED) __sfr STKPTR;
 354
 355 __at(0x0FEE) __sfr TOSL;
 356
 357 __at(0x0FEF) __sfr TOSH;